[PATCH] libata: clear ap->active_tag atomically w.r.t. command completion
[deliverable/linux.git] / drivers / scsi / libata-core.c
1 /*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
41 #include <linux/mm.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
58 #include <asm/io.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
61
62 #include "libata.h"
63
64 static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
68 static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
69 struct ata_device *dev);
70 static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
71
72 static unsigned int ata_unique_id = 1;
73 static struct workqueue_struct *ata_wq;
74
75 int atapi_enabled = 1;
76 module_param(atapi_enabled, int, 0444);
77 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
78
79 int atapi_dmadir = 0;
80 module_param(atapi_dmadir, int, 0444);
81 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
82
83 int libata_fua = 0;
84 module_param_named(fua, libata_fua, int, 0444);
85 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
86
87 MODULE_AUTHOR("Jeff Garzik");
88 MODULE_DESCRIPTION("Library module for ATA devices");
89 MODULE_LICENSE("GPL");
90 MODULE_VERSION(DRV_VERSION);
91
92
93 /**
94 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
95 * @tf: Taskfile to convert
96 * @fis: Buffer into which data will output
97 * @pmp: Port multiplier port
98 *
99 * Converts a standard ATA taskfile to a Serial ATA
100 * FIS structure (Register - Host to Device).
101 *
102 * LOCKING:
103 * Inherited from caller.
104 */
105
106 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
107 {
108 fis[0] = 0x27; /* Register - Host to Device FIS */
109 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
110 bit 7 indicates Command FIS */
111 fis[2] = tf->command;
112 fis[3] = tf->feature;
113
114 fis[4] = tf->lbal;
115 fis[5] = tf->lbam;
116 fis[6] = tf->lbah;
117 fis[7] = tf->device;
118
119 fis[8] = tf->hob_lbal;
120 fis[9] = tf->hob_lbam;
121 fis[10] = tf->hob_lbah;
122 fis[11] = tf->hob_feature;
123
124 fis[12] = tf->nsect;
125 fis[13] = tf->hob_nsect;
126 fis[14] = 0;
127 fis[15] = tf->ctl;
128
129 fis[16] = 0;
130 fis[17] = 0;
131 fis[18] = 0;
132 fis[19] = 0;
133 }
134
135 /**
136 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
137 * @fis: Buffer from which data will be input
138 * @tf: Taskfile to output
139 *
140 * Converts a serial ATA FIS structure to a standard ATA taskfile.
141 *
142 * LOCKING:
143 * Inherited from caller.
144 */
145
146 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
147 {
148 tf->command = fis[2]; /* status */
149 tf->feature = fis[3]; /* error */
150
151 tf->lbal = fis[4];
152 tf->lbam = fis[5];
153 tf->lbah = fis[6];
154 tf->device = fis[7];
155
156 tf->hob_lbal = fis[8];
157 tf->hob_lbam = fis[9];
158 tf->hob_lbah = fis[10];
159
160 tf->nsect = fis[12];
161 tf->hob_nsect = fis[13];
162 }
163
164 static const u8 ata_rw_cmds[] = {
165 /* pio multi */
166 ATA_CMD_READ_MULTI,
167 ATA_CMD_WRITE_MULTI,
168 ATA_CMD_READ_MULTI_EXT,
169 ATA_CMD_WRITE_MULTI_EXT,
170 0,
171 0,
172 0,
173 ATA_CMD_WRITE_MULTI_FUA_EXT,
174 /* pio */
175 ATA_CMD_PIO_READ,
176 ATA_CMD_PIO_WRITE,
177 ATA_CMD_PIO_READ_EXT,
178 ATA_CMD_PIO_WRITE_EXT,
179 0,
180 0,
181 0,
182 0,
183 /* dma */
184 ATA_CMD_READ,
185 ATA_CMD_WRITE,
186 ATA_CMD_READ_EXT,
187 ATA_CMD_WRITE_EXT,
188 0,
189 0,
190 0,
191 ATA_CMD_WRITE_FUA_EXT
192 };
193
194 /**
195 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
196 * @qc: command to examine and configure
197 *
198 * Examine the device configuration and tf->flags to calculate
199 * the proper read/write commands and protocol to use.
200 *
201 * LOCKING:
202 * caller.
203 */
204 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
205 {
206 struct ata_taskfile *tf = &qc->tf;
207 struct ata_device *dev = qc->dev;
208 u8 cmd;
209
210 int index, fua, lba48, write;
211
212 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
213 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
214 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
215
216 if (dev->flags & ATA_DFLAG_PIO) {
217 tf->protocol = ATA_PROT_PIO;
218 index = dev->multi_count ? 0 : 8;
219 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
220 /* Unable to use DMA due to host limitation */
221 tf->protocol = ATA_PROT_PIO;
222 index = dev->multi_count ? 0 : 8;
223 } else {
224 tf->protocol = ATA_PROT_DMA;
225 index = 16;
226 }
227
228 cmd = ata_rw_cmds[index + fua + lba48 + write];
229 if (cmd) {
230 tf->command = cmd;
231 return 0;
232 }
233 return -1;
234 }
235
236 /**
237 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
238 * @pio_mask: pio_mask
239 * @mwdma_mask: mwdma_mask
240 * @udma_mask: udma_mask
241 *
242 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
243 * unsigned int xfer_mask.
244 *
245 * LOCKING:
246 * None.
247 *
248 * RETURNS:
249 * Packed xfer_mask.
250 */
251 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
252 unsigned int mwdma_mask,
253 unsigned int udma_mask)
254 {
255 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
256 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
257 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258 }
259
260 /**
261 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
262 * @xfer_mask: xfer_mask to unpack
263 * @pio_mask: resulting pio_mask
264 * @mwdma_mask: resulting mwdma_mask
265 * @udma_mask: resulting udma_mask
266 *
267 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
268 * Any NULL distination masks will be ignored.
269 */
270 static void ata_unpack_xfermask(unsigned int xfer_mask,
271 unsigned int *pio_mask,
272 unsigned int *mwdma_mask,
273 unsigned int *udma_mask)
274 {
275 if (pio_mask)
276 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
277 if (mwdma_mask)
278 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
279 if (udma_mask)
280 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
281 }
282
283 static const struct ata_xfer_ent {
284 int shift, bits;
285 u8 base;
286 } ata_xfer_tbl[] = {
287 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
288 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
289 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
290 { -1, },
291 };
292
293 /**
294 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
295 * @xfer_mask: xfer_mask of interest
296 *
297 * Return matching XFER_* value for @xfer_mask. Only the highest
298 * bit of @xfer_mask is considered.
299 *
300 * LOCKING:
301 * None.
302 *
303 * RETURNS:
304 * Matching XFER_* value, 0 if no match found.
305 */
306 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
307 {
308 int highbit = fls(xfer_mask) - 1;
309 const struct ata_xfer_ent *ent;
310
311 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
312 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
313 return ent->base + highbit - ent->shift;
314 return 0;
315 }
316
317 /**
318 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
319 * @xfer_mode: XFER_* of interest
320 *
321 * Return matching xfer_mask for @xfer_mode.
322 *
323 * LOCKING:
324 * None.
325 *
326 * RETURNS:
327 * Matching xfer_mask, 0 if no match found.
328 */
329 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
330 {
331 const struct ata_xfer_ent *ent;
332
333 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
334 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
335 return 1 << (ent->shift + xfer_mode - ent->base);
336 return 0;
337 }
338
339 /**
340 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
341 * @xfer_mode: XFER_* of interest
342 *
343 * Return matching xfer_shift for @xfer_mode.
344 *
345 * LOCKING:
346 * None.
347 *
348 * RETURNS:
349 * Matching xfer_shift, -1 if no match found.
350 */
351 static int ata_xfer_mode2shift(unsigned int xfer_mode)
352 {
353 const struct ata_xfer_ent *ent;
354
355 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
356 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
357 return ent->shift;
358 return -1;
359 }
360
361 /**
362 * ata_mode_string - convert xfer_mask to string
363 * @xfer_mask: mask of bits supported; only highest bit counts.
364 *
365 * Determine string which represents the highest speed
366 * (highest bit in @modemask).
367 *
368 * LOCKING:
369 * None.
370 *
371 * RETURNS:
372 * Constant C string representing highest speed listed in
373 * @mode_mask, or the constant C string "<n/a>".
374 */
375 static const char *ata_mode_string(unsigned int xfer_mask)
376 {
377 static const char * const xfer_mode_str[] = {
378 "PIO0",
379 "PIO1",
380 "PIO2",
381 "PIO3",
382 "PIO4",
383 "MWDMA0",
384 "MWDMA1",
385 "MWDMA2",
386 "UDMA/16",
387 "UDMA/25",
388 "UDMA/33",
389 "UDMA/44",
390 "UDMA/66",
391 "UDMA/100",
392 "UDMA/133",
393 "UDMA7",
394 };
395 int highbit;
396
397 highbit = fls(xfer_mask) - 1;
398 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
399 return xfer_mode_str[highbit];
400 return "<n/a>";
401 }
402
403 static const char *sata_spd_string(unsigned int spd)
404 {
405 static const char * const spd_str[] = {
406 "1.5 Gbps",
407 "3.0 Gbps",
408 };
409
410 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
411 return "<unknown>";
412 return spd_str[spd - 1];
413 }
414
415 void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
416 {
417 if (ata_dev_enabled(dev)) {
418 printk(KERN_WARNING "ata%u: dev %u disabled\n",
419 ap->id, dev->devno);
420 dev->class++;
421 }
422 }
423
424 /**
425 * ata_pio_devchk - PATA device presence detection
426 * @ap: ATA channel to examine
427 * @device: Device to examine (starting at zero)
428 *
429 * This technique was originally described in
430 * Hale Landis's ATADRVR (www.ata-atapi.com), and
431 * later found its way into the ATA/ATAPI spec.
432 *
433 * Write a pattern to the ATA shadow registers,
434 * and if a device is present, it will respond by
435 * correctly storing and echoing back the
436 * ATA shadow register contents.
437 *
438 * LOCKING:
439 * caller.
440 */
441
442 static unsigned int ata_pio_devchk(struct ata_port *ap,
443 unsigned int device)
444 {
445 struct ata_ioports *ioaddr = &ap->ioaddr;
446 u8 nsect, lbal;
447
448 ap->ops->dev_select(ap, device);
449
450 outb(0x55, ioaddr->nsect_addr);
451 outb(0xaa, ioaddr->lbal_addr);
452
453 outb(0xaa, ioaddr->nsect_addr);
454 outb(0x55, ioaddr->lbal_addr);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 nsect = inb(ioaddr->nsect_addr);
460 lbal = inb(ioaddr->lbal_addr);
461
462 if ((nsect == 0x55) && (lbal == 0xaa))
463 return 1; /* we found a device */
464
465 return 0; /* nothing found */
466 }
467
468 /**
469 * ata_mmio_devchk - PATA device presence detection
470 * @ap: ATA channel to examine
471 * @device: Device to examine (starting at zero)
472 *
473 * This technique was originally described in
474 * Hale Landis's ATADRVR (www.ata-atapi.com), and
475 * later found its way into the ATA/ATAPI spec.
476 *
477 * Write a pattern to the ATA shadow registers,
478 * and if a device is present, it will respond by
479 * correctly storing and echoing back the
480 * ATA shadow register contents.
481 *
482 * LOCKING:
483 * caller.
484 */
485
486 static unsigned int ata_mmio_devchk(struct ata_port *ap,
487 unsigned int device)
488 {
489 struct ata_ioports *ioaddr = &ap->ioaddr;
490 u8 nsect, lbal;
491
492 ap->ops->dev_select(ap, device);
493
494 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 nsect = readb((void __iomem *) ioaddr->nsect_addr);
504 lbal = readb((void __iomem *) ioaddr->lbal_addr);
505
506 if ((nsect == 0x55) && (lbal == 0xaa))
507 return 1; /* we found a device */
508
509 return 0; /* nothing found */
510 }
511
512 /**
513 * ata_devchk - PATA device presence detection
514 * @ap: ATA channel to examine
515 * @device: Device to examine (starting at zero)
516 *
517 * Dispatch ATA device presence detection, depending
518 * on whether we are using PIO or MMIO to talk to the
519 * ATA shadow registers.
520 *
521 * LOCKING:
522 * caller.
523 */
524
525 static unsigned int ata_devchk(struct ata_port *ap,
526 unsigned int device)
527 {
528 if (ap->flags & ATA_FLAG_MMIO)
529 return ata_mmio_devchk(ap, device);
530 return ata_pio_devchk(ap, device);
531 }
532
533 /**
534 * ata_dev_classify - determine device type based on ATA-spec signature
535 * @tf: ATA taskfile register set for device to be identified
536 *
537 * Determine from taskfile register contents whether a device is
538 * ATA or ATAPI, as per "Signature and persistence" section
539 * of ATA/PI spec (volume 1, sect 5.14).
540 *
541 * LOCKING:
542 * None.
543 *
544 * RETURNS:
545 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
546 * the event of failure.
547 */
548
549 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
550 {
551 /* Apple's open source Darwin code hints that some devices only
552 * put a proper signature into the LBA mid/high registers,
553 * So, we only check those. It's sufficient for uniqueness.
554 */
555
556 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
557 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
558 DPRINTK("found ATA device by sig\n");
559 return ATA_DEV_ATA;
560 }
561
562 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
563 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
564 DPRINTK("found ATAPI device by sig\n");
565 return ATA_DEV_ATAPI;
566 }
567
568 DPRINTK("unknown device\n");
569 return ATA_DEV_UNKNOWN;
570 }
571
572 /**
573 * ata_dev_try_classify - Parse returned ATA device signature
574 * @ap: ATA channel to examine
575 * @device: Device to examine (starting at zero)
576 * @r_err: Value of error register on completion
577 *
578 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
579 * an ATA/ATAPI-defined set of values is placed in the ATA
580 * shadow registers, indicating the results of device detection
581 * and diagnostics.
582 *
583 * Select the ATA device, and read the values from the ATA shadow
584 * registers. Then parse according to the Error register value,
585 * and the spec-defined values examined by ata_dev_classify().
586 *
587 * LOCKING:
588 * caller.
589 *
590 * RETURNS:
591 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
592 */
593
594 static unsigned int
595 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
596 {
597 struct ata_taskfile tf;
598 unsigned int class;
599 u8 err;
600
601 ap->ops->dev_select(ap, device);
602
603 memset(&tf, 0, sizeof(tf));
604
605 ap->ops->tf_read(ap, &tf);
606 err = tf.feature;
607 if (r_err)
608 *r_err = err;
609
610 /* see if device passed diags */
611 if (err == 1)
612 /* do nothing */ ;
613 else if ((device == 0) && (err == 0x81))
614 /* do nothing */ ;
615 else
616 return ATA_DEV_NONE;
617
618 /* determine if device is ATA or ATAPI */
619 class = ata_dev_classify(&tf);
620
621 if (class == ATA_DEV_UNKNOWN)
622 return ATA_DEV_NONE;
623 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
624 return ATA_DEV_NONE;
625 return class;
626 }
627
628 /**
629 * ata_id_string - Convert IDENTIFY DEVICE page into string
630 * @id: IDENTIFY DEVICE results we will examine
631 * @s: string into which data is output
632 * @ofs: offset into identify device page
633 * @len: length of string to return. must be an even number.
634 *
635 * The strings in the IDENTIFY DEVICE page are broken up into
636 * 16-bit chunks. Run through the string, and output each
637 * 8-bit chunk linearly, regardless of platform.
638 *
639 * LOCKING:
640 * caller.
641 */
642
643 void ata_id_string(const u16 *id, unsigned char *s,
644 unsigned int ofs, unsigned int len)
645 {
646 unsigned int c;
647
648 while (len > 0) {
649 c = id[ofs] >> 8;
650 *s = c;
651 s++;
652
653 c = id[ofs] & 0xff;
654 *s = c;
655 s++;
656
657 ofs++;
658 len -= 2;
659 }
660 }
661
662 /**
663 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
664 * @id: IDENTIFY DEVICE results we will examine
665 * @s: string into which data is output
666 * @ofs: offset into identify device page
667 * @len: length of string to return. must be an odd number.
668 *
669 * This function is identical to ata_id_string except that it
670 * trims trailing spaces and terminates the resulting string with
671 * null. @len must be actual maximum length (even number) + 1.
672 *
673 * LOCKING:
674 * caller.
675 */
676 void ata_id_c_string(const u16 *id, unsigned char *s,
677 unsigned int ofs, unsigned int len)
678 {
679 unsigned char *p;
680
681 WARN_ON(!(len & 1));
682
683 ata_id_string(id, s, ofs, len - 1);
684
685 p = s + strnlen(s, len - 1);
686 while (p > s && p[-1] == ' ')
687 p--;
688 *p = '\0';
689 }
690
691 static u64 ata_id_n_sectors(const u16 *id)
692 {
693 if (ata_id_has_lba(id)) {
694 if (ata_id_has_lba48(id))
695 return ata_id_u64(id, 100);
696 else
697 return ata_id_u32(id, 60);
698 } else {
699 if (ata_id_current_chs_valid(id))
700 return ata_id_u32(id, 57);
701 else
702 return id[1] * id[3] * id[6];
703 }
704 }
705
706 /**
707 * ata_noop_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * This function performs no actual function.
712 *
713 * May be used as the dev_select() entry in ata_port_operations.
714 *
715 * LOCKING:
716 * caller.
717 */
718 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
719 {
720 }
721
722
723 /**
724 * ata_std_dev_select - Select device 0/1 on ATA bus
725 * @ap: ATA channel to manipulate
726 * @device: ATA device (numbered from zero) to select
727 *
728 * Use the method defined in the ATA specification to
729 * make either device 0, or device 1, active on the
730 * ATA channel. Works with both PIO and MMIO.
731 *
732 * May be used as the dev_select() entry in ata_port_operations.
733 *
734 * LOCKING:
735 * caller.
736 */
737
738 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739 {
740 u8 tmp;
741
742 if (device == 0)
743 tmp = ATA_DEVICE_OBS;
744 else
745 tmp = ATA_DEVICE_OBS | ATA_DEV1;
746
747 if (ap->flags & ATA_FLAG_MMIO) {
748 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
749 } else {
750 outb(tmp, ap->ioaddr.device_addr);
751 }
752 ata_pause(ap); /* needed; also flushes, for mmio */
753 }
754
755 /**
756 * ata_dev_select - Select device 0/1 on ATA bus
757 * @ap: ATA channel to manipulate
758 * @device: ATA device (numbered from zero) to select
759 * @wait: non-zero to wait for Status register BSY bit to clear
760 * @can_sleep: non-zero if context allows sleeping
761 *
762 * Use the method defined in the ATA specification to
763 * make either device 0, or device 1, active on the
764 * ATA channel.
765 *
766 * This is a high-level version of ata_std_dev_select(),
767 * which additionally provides the services of inserting
768 * the proper pauses and status polling, where needed.
769 *
770 * LOCKING:
771 * caller.
772 */
773
774 void ata_dev_select(struct ata_port *ap, unsigned int device,
775 unsigned int wait, unsigned int can_sleep)
776 {
777 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
778 ap->id, device, wait);
779
780 if (wait)
781 ata_wait_idle(ap);
782
783 ap->ops->dev_select(ap, device);
784
785 if (wait) {
786 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
787 msleep(150);
788 ata_wait_idle(ap);
789 }
790 }
791
792 /**
793 * ata_dump_id - IDENTIFY DEVICE info debugging output
794 * @id: IDENTIFY DEVICE page to dump
795 *
796 * Dump selected 16-bit words from the given IDENTIFY DEVICE
797 * page.
798 *
799 * LOCKING:
800 * caller.
801 */
802
803 static inline void ata_dump_id(const u16 *id)
804 {
805 DPRINTK("49==0x%04x "
806 "53==0x%04x "
807 "63==0x%04x "
808 "64==0x%04x "
809 "75==0x%04x \n",
810 id[49],
811 id[53],
812 id[63],
813 id[64],
814 id[75]);
815 DPRINTK("80==0x%04x "
816 "81==0x%04x "
817 "82==0x%04x "
818 "83==0x%04x "
819 "84==0x%04x \n",
820 id[80],
821 id[81],
822 id[82],
823 id[83],
824 id[84]);
825 DPRINTK("88==0x%04x "
826 "93==0x%04x\n",
827 id[88],
828 id[93]);
829 }
830
831 /**
832 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
833 * @id: IDENTIFY data to compute xfer mask from
834 *
835 * Compute the xfermask for this device. This is not as trivial
836 * as it seems if we must consider early devices correctly.
837 *
838 * FIXME: pre IDE drive timing (do we care ?).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Computed xfermask
845 */
846 static unsigned int ata_id_xfermask(const u16 *id)
847 {
848 unsigned int pio_mask, mwdma_mask, udma_mask;
849
850 /* Usual case. Word 53 indicates word 64 is valid */
851 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
852 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
853 pio_mask <<= 3;
854 pio_mask |= 0x7;
855 } else {
856 /* If word 64 isn't valid then Word 51 high byte holds
857 * the PIO timing number for the maximum. Turn it into
858 * a mask.
859 */
860 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
861
862 /* But wait.. there's more. Design your standards by
863 * committee and you too can get a free iordy field to
864 * process. However its the speeds not the modes that
865 * are supported... Note drivers using the timing API
866 * will get this right anyway
867 */
868 }
869
870 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
871
872 udma_mask = 0;
873 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
874 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
875
876 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
877 }
878
879 /**
880 * ata_port_queue_task - Queue port_task
881 * @ap: The ata_port to queue port_task for
882 *
883 * Schedule @fn(@data) for execution after @delay jiffies using
884 * port_task. There is one port_task per port and it's the
885 * user(low level driver)'s responsibility to make sure that only
886 * one task is active at any given time.
887 *
888 * libata core layer takes care of synchronization between
889 * port_task and EH. ata_port_queue_task() may be ignored for EH
890 * synchronization.
891 *
892 * LOCKING:
893 * Inherited from caller.
894 */
895 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
896 unsigned long delay)
897 {
898 int rc;
899
900 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
901 return;
902
903 PREPARE_WORK(&ap->port_task, fn, data);
904
905 if (!delay)
906 rc = queue_work(ata_wq, &ap->port_task);
907 else
908 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909
910 /* rc == 0 means that another user is using port task */
911 WARN_ON(rc == 0);
912 }
913
914 /**
915 * ata_port_flush_task - Flush port_task
916 * @ap: The ata_port to flush port_task for
917 *
918 * After this function completes, port_task is guranteed not to
919 * be running or scheduled.
920 *
921 * LOCKING:
922 * Kernel thread context (may sleep)
923 */
924 void ata_port_flush_task(struct ata_port *ap)
925 {
926 unsigned long flags;
927
928 DPRINTK("ENTER\n");
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
931 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("flush #1\n");
935 flush_workqueue(ata_wq);
936
937 /*
938 * At this point, if a task is running, it's guaranteed to see
939 * the FLUSH flag; thus, it will never queue pio tasks again.
940 * Cancel and flush.
941 */
942 if (!cancel_delayed_work(&ap->port_task)) {
943 DPRINTK("flush #2\n");
944 flush_workqueue(ata_wq);
945 }
946
947 spin_lock_irqsave(&ap->host_set->lock, flags);
948 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
950
951 DPRINTK("EXIT\n");
952 }
953
954 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
955 {
956 struct completion *waiting = qc->private_data;
957
958 qc->ap->ops->tf_read(qc->ap, &qc->tf);
959 complete(waiting);
960 }
961
962 /**
963 * ata_exec_internal - execute libata internal command
964 * @ap: Port to which the command is sent
965 * @dev: Device to which the command is sent
966 * @tf: Taskfile registers for the command and the result
967 * @cdb: CDB for packet command
968 * @dma_dir: Data tranfer direction of the command
969 * @buf: Data buffer of the command
970 * @buflen: Length of data buffer
971 *
972 * Executes libata internal command with timeout. @tf contains
973 * command on entry and result on return. Timeout and error
974 * conditions are reported via return value. No recovery action
975 * is taken after a command times out. It's caller's duty to
976 * clean up after timeout.
977 *
978 * LOCKING:
979 * None. Should be called with kernel context, might sleep.
980 */
981
982 unsigned ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
983 struct ata_taskfile *tf, const u8 *cdb,
984 int dma_dir, void *buf, unsigned int buflen)
985 {
986 u8 command = tf->command;
987 struct ata_queued_cmd *qc;
988 DECLARE_COMPLETION(wait);
989 unsigned long flags;
990 unsigned int err_mask;
991
992 spin_lock_irqsave(&ap->host_set->lock, flags);
993
994 qc = ata_qc_new_init(ap, dev);
995 BUG_ON(qc == NULL);
996
997 qc->tf = *tf;
998 if (cdb)
999 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1000 qc->dma_dir = dma_dir;
1001 if (dma_dir != DMA_NONE) {
1002 ata_sg_init_one(qc, buf, buflen);
1003 qc->nsect = buflen / ATA_SECT_SIZE;
1004 }
1005
1006 qc->private_data = &wait;
1007 qc->complete_fn = ata_qc_complete_internal;
1008
1009 ata_qc_issue(qc);
1010
1011 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1012
1013 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1014 ata_port_flush_task(ap);
1015
1016 spin_lock_irqsave(&ap->host_set->lock, flags);
1017
1018 /* We're racing with irq here. If we lose, the
1019 * following test prevents us from completing the qc
1020 * again. If completion irq occurs after here but
1021 * before the caller cleans up, it will result in a
1022 * spurious interrupt. We can live with that.
1023 */
1024 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1025 qc->err_mask = AC_ERR_TIMEOUT;
1026 ata_qc_complete(qc);
1027 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1028 ap->id, command);
1029 }
1030
1031 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1032 }
1033
1034 *tf = qc->tf;
1035 err_mask = qc->err_mask;
1036
1037 ata_qc_free(qc);
1038
1039 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1040 * Until those drivers are fixed, we detect the condition
1041 * here, fail the command with AC_ERR_SYSTEM and reenable the
1042 * port.
1043 *
1044 * Note that this doesn't change any behavior as internal
1045 * command failure results in disabling the device in the
1046 * higher layer for LLDDs without new reset/EH callbacks.
1047 *
1048 * Kill the following code as soon as those drivers are fixed.
1049 */
1050 if (ap->flags & ATA_FLAG_DISABLED) {
1051 err_mask |= AC_ERR_SYSTEM;
1052 ata_port_probe(ap);
1053 }
1054
1055 return err_mask;
1056 }
1057
1058 /**
1059 * ata_pio_need_iordy - check if iordy needed
1060 * @adev: ATA device
1061 *
1062 * Check if the current speed of the device requires IORDY. Used
1063 * by various controllers for chip configuration.
1064 */
1065
1066 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1067 {
1068 int pio;
1069 int speed = adev->pio_mode - XFER_PIO_0;
1070
1071 if (speed < 2)
1072 return 0;
1073 if (speed > 2)
1074 return 1;
1075
1076 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1077
1078 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1079 pio = adev->id[ATA_ID_EIDE_PIO];
1080 /* Is the speed faster than the drive allows non IORDY ? */
1081 if (pio) {
1082 /* This is cycle times not frequency - watch the logic! */
1083 if (pio > 240) /* PIO2 is 240nS per cycle */
1084 return 1;
1085 return 0;
1086 }
1087 }
1088 return 0;
1089 }
1090
1091 /**
1092 * ata_dev_read_id - Read ID data from the specified device
1093 * @ap: port on which target device resides
1094 * @dev: target device
1095 * @p_class: pointer to class of the target device (may be changed)
1096 * @post_reset: is this read ID post-reset?
1097 * @p_id: read IDENTIFY page (newly allocated)
1098 *
1099 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1100 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1101 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1102 * for pre-ATA4 drives.
1103 *
1104 * LOCKING:
1105 * Kernel thread context (may sleep)
1106 *
1107 * RETURNS:
1108 * 0 on success, -errno otherwise.
1109 */
1110 static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
1111 unsigned int *p_class, int post_reset, u16 **p_id)
1112 {
1113 unsigned int class = *p_class;
1114 struct ata_taskfile tf;
1115 unsigned int err_mask = 0;
1116 u16 *id;
1117 const char *reason;
1118 int rc;
1119
1120 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1121
1122 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1123
1124 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1125 if (id == NULL) {
1126 rc = -ENOMEM;
1127 reason = "out of memory";
1128 goto err_out;
1129 }
1130
1131 retry:
1132 ata_tf_init(ap, &tf, dev->devno);
1133
1134 switch (class) {
1135 case ATA_DEV_ATA:
1136 tf.command = ATA_CMD_ID_ATA;
1137 break;
1138 case ATA_DEV_ATAPI:
1139 tf.command = ATA_CMD_ID_ATAPI;
1140 break;
1141 default:
1142 rc = -ENODEV;
1143 reason = "unsupported class";
1144 goto err_out;
1145 }
1146
1147 tf.protocol = ATA_PROT_PIO;
1148
1149 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_FROM_DEVICE,
1150 id, sizeof(id[0]) * ATA_ID_WORDS);
1151 if (err_mask) {
1152 rc = -EIO;
1153 reason = "I/O error";
1154 goto err_out;
1155 }
1156
1157 swap_buf_le16(id, ATA_ID_WORDS);
1158
1159 /* sanity check */
1160 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1161 rc = -EINVAL;
1162 reason = "device reports illegal type";
1163 goto err_out;
1164 }
1165
1166 if (post_reset && class == ATA_DEV_ATA) {
1167 /*
1168 * The exact sequence expected by certain pre-ATA4 drives is:
1169 * SRST RESET
1170 * IDENTIFY
1171 * INITIALIZE DEVICE PARAMETERS
1172 * anything else..
1173 * Some drives were very specific about that exact sequence.
1174 */
1175 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1176 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
1177 if (err_mask) {
1178 rc = -EIO;
1179 reason = "INIT_DEV_PARAMS failed";
1180 goto err_out;
1181 }
1182
1183 /* current CHS translation info (id[53-58]) might be
1184 * changed. reread the identify device info.
1185 */
1186 post_reset = 0;
1187 goto retry;
1188 }
1189 }
1190
1191 *p_class = class;
1192 *p_id = id;
1193 return 0;
1194
1195 err_out:
1196 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1197 ap->id, dev->devno, reason);
1198 kfree(id);
1199 return rc;
1200 }
1201
1202 static inline u8 ata_dev_knobble(const struct ata_port *ap,
1203 struct ata_device *dev)
1204 {
1205 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1206 }
1207
1208 /**
1209 * ata_dev_configure - Configure the specified ATA/ATAPI device
1210 * @ap: Port on which target device resides
1211 * @dev: Target device to configure
1212 * @print_info: Enable device info printout
1213 *
1214 * Configure @dev according to @dev->id. Generic and low-level
1215 * driver specific fixups are also applied.
1216 *
1217 * LOCKING:
1218 * Kernel thread context (may sleep)
1219 *
1220 * RETURNS:
1221 * 0 on success, -errno otherwise
1222 */
1223 static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1224 int print_info)
1225 {
1226 const u16 *id = dev->id;
1227 unsigned int xfer_mask;
1228 int i, rc;
1229
1230 if (!ata_dev_enabled(dev)) {
1231 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1232 ap->id, dev->devno);
1233 return 0;
1234 }
1235
1236 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1237
1238 /* print device capabilities */
1239 if (print_info)
1240 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1241 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1242 ap->id, dev->devno, id[49], id[82], id[83],
1243 id[84], id[85], id[86], id[87], id[88]);
1244
1245 /* initialize to-be-configured parameters */
1246 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1247 dev->max_sectors = 0;
1248 dev->cdb_len = 0;
1249 dev->n_sectors = 0;
1250 dev->cylinders = 0;
1251 dev->heads = 0;
1252 dev->sectors = 0;
1253
1254 /*
1255 * common ATA, ATAPI feature tests
1256 */
1257
1258 /* find max transfer mode; for printk only */
1259 xfer_mask = ata_id_xfermask(id);
1260
1261 ata_dump_id(id);
1262
1263 /* ATA-specific feature tests */
1264 if (dev->class == ATA_DEV_ATA) {
1265 dev->n_sectors = ata_id_n_sectors(id);
1266
1267 if (ata_id_has_lba(id)) {
1268 const char *lba_desc;
1269
1270 lba_desc = "LBA";
1271 dev->flags |= ATA_DFLAG_LBA;
1272 if (ata_id_has_lba48(id)) {
1273 dev->flags |= ATA_DFLAG_LBA48;
1274 lba_desc = "LBA48";
1275 }
1276
1277 /* print device info to dmesg */
1278 if (print_info)
1279 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1280 "max %s, %Lu sectors: %s\n",
1281 ap->id, dev->devno,
1282 ata_id_major_version(id),
1283 ata_mode_string(xfer_mask),
1284 (unsigned long long)dev->n_sectors,
1285 lba_desc);
1286 } else {
1287 /* CHS */
1288
1289 /* Default translation */
1290 dev->cylinders = id[1];
1291 dev->heads = id[3];
1292 dev->sectors = id[6];
1293
1294 if (ata_id_current_chs_valid(id)) {
1295 /* Current CHS translation is valid. */
1296 dev->cylinders = id[54];
1297 dev->heads = id[55];
1298 dev->sectors = id[56];
1299 }
1300
1301 /* print device info to dmesg */
1302 if (print_info)
1303 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1304 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1305 ap->id, dev->devno,
1306 ata_id_major_version(id),
1307 ata_mode_string(xfer_mask),
1308 (unsigned long long)dev->n_sectors,
1309 dev->cylinders, dev->heads, dev->sectors);
1310 }
1311
1312 dev->cdb_len = 16;
1313 }
1314
1315 /* ATAPI-specific feature tests */
1316 else if (dev->class == ATA_DEV_ATAPI) {
1317 rc = atapi_cdb_len(id);
1318 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1319 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1320 rc = -EINVAL;
1321 goto err_out_nosup;
1322 }
1323 dev->cdb_len = (unsigned int) rc;
1324
1325 /* print device info to dmesg */
1326 if (print_info)
1327 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1328 ap->id, dev->devno, ata_mode_string(xfer_mask));
1329 }
1330
1331 ap->host->max_cmd_len = 0;
1332 for (i = 0; i < ATA_MAX_DEVICES; i++)
1333 ap->host->max_cmd_len = max_t(unsigned int,
1334 ap->host->max_cmd_len,
1335 ap->device[i].cdb_len);
1336
1337 /* limit bridge transfers to udma5, 200 sectors */
1338 if (ata_dev_knobble(ap, dev)) {
1339 if (print_info)
1340 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1341 ap->id, dev->devno);
1342 dev->udma_mask &= ATA_UDMA5;
1343 dev->max_sectors = ATA_MAX_SECTORS;
1344 }
1345
1346 if (ap->ops->dev_config)
1347 ap->ops->dev_config(ap, dev);
1348
1349 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1350 return 0;
1351
1352 err_out_nosup:
1353 DPRINTK("EXIT, err\n");
1354 return rc;
1355 }
1356
1357 /**
1358 * ata_bus_probe - Reset and probe ATA bus
1359 * @ap: Bus to probe
1360 *
1361 * Master ATA bus probing function. Initiates a hardware-dependent
1362 * bus reset, then attempts to identify any devices found on
1363 * the bus.
1364 *
1365 * LOCKING:
1366 * PCI/etc. bus probe sem.
1367 *
1368 * RETURNS:
1369 * Zero on success, negative errno otherwise.
1370 */
1371
1372 static int ata_bus_probe(struct ata_port *ap)
1373 {
1374 unsigned int classes[ATA_MAX_DEVICES];
1375 int tries[ATA_MAX_DEVICES];
1376 int i, rc, down_xfermask;
1377 struct ata_device *dev;
1378
1379 ata_port_probe(ap);
1380
1381 for (i = 0; i < ATA_MAX_DEVICES; i++)
1382 tries[i] = ATA_PROBE_MAX_TRIES;
1383
1384 retry:
1385 down_xfermask = 0;
1386
1387 /* reset and determine device classes */
1388 for (i = 0; i < ATA_MAX_DEVICES; i++)
1389 classes[i] = ATA_DEV_UNKNOWN;
1390
1391 if (ap->ops->probe_reset) {
1392 rc = ap->ops->probe_reset(ap, classes);
1393 if (rc) {
1394 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1395 return rc;
1396 }
1397 } else {
1398 ap->ops->phy_reset(ap);
1399
1400 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1401 if (!(ap->flags & ATA_FLAG_DISABLED))
1402 classes[i] = ap->device[i].class;
1403 ap->device[i].class = ATA_DEV_UNKNOWN;
1404 }
1405
1406 ata_port_probe(ap);
1407 }
1408
1409 for (i = 0; i < ATA_MAX_DEVICES; i++)
1410 if (classes[i] == ATA_DEV_UNKNOWN)
1411 classes[i] = ATA_DEV_NONE;
1412
1413 /* read IDENTIFY page and configure devices */
1414 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1415 dev = &ap->device[i];
1416
1417 if (tries[i])
1418 dev->class = classes[i];
1419
1420 if (!ata_dev_enabled(dev))
1421 continue;
1422
1423 kfree(dev->id);
1424 dev->id = NULL;
1425 rc = ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id);
1426 if (rc)
1427 goto fail;
1428
1429 rc = ata_dev_configure(ap, dev, 1);
1430 if (rc)
1431 goto fail;
1432 }
1433
1434 /* configure transfer mode */
1435 if (ap->ops->set_mode) {
1436 /* FIXME: make ->set_mode handle no device case and
1437 * return error code and failing device on failure as
1438 * ata_set_mode() does.
1439 */
1440 for (i = 0; i < ATA_MAX_DEVICES; i++)
1441 if (ata_dev_enabled(&ap->device[i])) {
1442 ap->ops->set_mode(ap);
1443 break;
1444 }
1445 rc = 0;
1446 } else
1447 rc = ata_set_mode(ap, &dev);
1448
1449 if (rc) {
1450 down_xfermask = 1;
1451 goto fail;
1452 }
1453
1454 for (i = 0; i < ATA_MAX_DEVICES; i++)
1455 if (ata_dev_enabled(&ap->device[i]))
1456 return 0;
1457
1458 /* no device present, disable port */
1459 ata_port_disable(ap);
1460 ap->ops->port_disable(ap);
1461 return -ENODEV;
1462
1463 fail:
1464 switch (rc) {
1465 case -EINVAL:
1466 case -ENODEV:
1467 tries[dev->devno] = 0;
1468 break;
1469 case -EIO:
1470 sata_down_spd_limit(ap);
1471 /* fall through */
1472 default:
1473 tries[dev->devno]--;
1474 if (down_xfermask &&
1475 ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
1476 tries[dev->devno] = 0;
1477 }
1478
1479 if (!tries[dev->devno]) {
1480 ata_down_xfermask_limit(ap, dev, 1);
1481 ata_dev_disable(ap, dev);
1482 }
1483
1484 goto retry;
1485 }
1486
1487 /**
1488 * ata_port_probe - Mark port as enabled
1489 * @ap: Port for which we indicate enablement
1490 *
1491 * Modify @ap data structure such that the system
1492 * thinks that the entire port is enabled.
1493 *
1494 * LOCKING: host_set lock, or some other form of
1495 * serialization.
1496 */
1497
1498 void ata_port_probe(struct ata_port *ap)
1499 {
1500 ap->flags &= ~ATA_FLAG_DISABLED;
1501 }
1502
1503 /**
1504 * sata_print_link_status - Print SATA link status
1505 * @ap: SATA port to printk link status about
1506 *
1507 * This function prints link speed and status of a SATA link.
1508 *
1509 * LOCKING:
1510 * None.
1511 */
1512 static void sata_print_link_status(struct ata_port *ap)
1513 {
1514 u32 sstatus, scontrol, tmp;
1515
1516 if (!ap->ops->scr_read)
1517 return;
1518
1519 sstatus = scr_read(ap, SCR_STATUS);
1520 scontrol = scr_read(ap, SCR_CONTROL);
1521
1522 if (sata_dev_present(ap)) {
1523 tmp = (sstatus >> 4) & 0xf;
1524 printk(KERN_INFO
1525 "ata%u: SATA link up %s (SStatus %X SControl %X)\n",
1526 ap->id, sata_spd_string(tmp), sstatus, scontrol);
1527 } else {
1528 printk(KERN_INFO
1529 "ata%u: SATA link down (SStatus %X SControl %X)\n",
1530 ap->id, sstatus, scontrol);
1531 }
1532 }
1533
1534 /**
1535 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1536 * @ap: SATA port associated with target SATA PHY.
1537 *
1538 * This function issues commands to standard SATA Sxxx
1539 * PHY registers, to wake up the phy (and device), and
1540 * clear any reset condition.
1541 *
1542 * LOCKING:
1543 * PCI/etc. bus probe sem.
1544 *
1545 */
1546 void __sata_phy_reset(struct ata_port *ap)
1547 {
1548 u32 sstatus;
1549 unsigned long timeout = jiffies + (HZ * 5);
1550
1551 if (ap->flags & ATA_FLAG_SATA_RESET) {
1552 /* issue phy wake/reset */
1553 scr_write_flush(ap, SCR_CONTROL, 0x301);
1554 /* Couldn't find anything in SATA I/II specs, but
1555 * AHCI-1.1 10.4.2 says at least 1 ms. */
1556 mdelay(1);
1557 }
1558 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1559
1560 /* wait for phy to become ready, if necessary */
1561 do {
1562 msleep(200);
1563 sstatus = scr_read(ap, SCR_STATUS);
1564 if ((sstatus & 0xf) != 1)
1565 break;
1566 } while (time_before(jiffies, timeout));
1567
1568 /* print link status */
1569 sata_print_link_status(ap);
1570
1571 /* TODO: phy layer with polling, timeouts, etc. */
1572 if (sata_dev_present(ap))
1573 ata_port_probe(ap);
1574 else
1575 ata_port_disable(ap);
1576
1577 if (ap->flags & ATA_FLAG_DISABLED)
1578 return;
1579
1580 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1581 ata_port_disable(ap);
1582 return;
1583 }
1584
1585 ap->cbl = ATA_CBL_SATA;
1586 }
1587
1588 /**
1589 * sata_phy_reset - Reset SATA bus.
1590 * @ap: SATA port associated with target SATA PHY.
1591 *
1592 * This function resets the SATA bus, and then probes
1593 * the bus for devices.
1594 *
1595 * LOCKING:
1596 * PCI/etc. bus probe sem.
1597 *
1598 */
1599 void sata_phy_reset(struct ata_port *ap)
1600 {
1601 __sata_phy_reset(ap);
1602 if (ap->flags & ATA_FLAG_DISABLED)
1603 return;
1604 ata_bus_reset(ap);
1605 }
1606
1607 /**
1608 * ata_dev_pair - return other device on cable
1609 * @ap: port
1610 * @adev: device
1611 *
1612 * Obtain the other device on the same cable, or if none is
1613 * present NULL is returned
1614 */
1615
1616 struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1617 {
1618 struct ata_device *pair = &ap->device[1 - adev->devno];
1619 if (!ata_dev_enabled(pair))
1620 return NULL;
1621 return pair;
1622 }
1623
1624 /**
1625 * ata_port_disable - Disable port.
1626 * @ap: Port to be disabled.
1627 *
1628 * Modify @ap data structure such that the system
1629 * thinks that the entire port is disabled, and should
1630 * never attempt to probe or communicate with devices
1631 * on this port.
1632 *
1633 * LOCKING: host_set lock, or some other form of
1634 * serialization.
1635 */
1636
1637 void ata_port_disable(struct ata_port *ap)
1638 {
1639 ap->device[0].class = ATA_DEV_NONE;
1640 ap->device[1].class = ATA_DEV_NONE;
1641 ap->flags |= ATA_FLAG_DISABLED;
1642 }
1643
1644 /**
1645 * sata_down_spd_limit - adjust SATA spd limit downward
1646 * @ap: Port to adjust SATA spd limit for
1647 *
1648 * Adjust SATA spd limit of @ap downward. Note that this
1649 * function only adjusts the limit. The change must be applied
1650 * using sata_set_spd().
1651 *
1652 * LOCKING:
1653 * Inherited from caller.
1654 *
1655 * RETURNS:
1656 * 0 on success, negative errno on failure
1657 */
1658 int sata_down_spd_limit(struct ata_port *ap)
1659 {
1660 u32 spd, mask;
1661 int highbit;
1662
1663 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1664 return -EOPNOTSUPP;
1665
1666 mask = ap->sata_spd_limit;
1667 if (mask <= 1)
1668 return -EINVAL;
1669 highbit = fls(mask) - 1;
1670 mask &= ~(1 << highbit);
1671
1672 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1673 if (spd <= 1)
1674 return -EINVAL;
1675 spd--;
1676 mask &= (1 << spd) - 1;
1677 if (!mask)
1678 return -EINVAL;
1679
1680 ap->sata_spd_limit = mask;
1681
1682 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1683 ap->id, sata_spd_string(fls(mask)));
1684
1685 return 0;
1686 }
1687
1688 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1689 {
1690 u32 spd, limit;
1691
1692 if (ap->sata_spd_limit == UINT_MAX)
1693 limit = 0;
1694 else
1695 limit = fls(ap->sata_spd_limit);
1696
1697 spd = (*scontrol >> 4) & 0xf;
1698 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1699
1700 return spd != limit;
1701 }
1702
1703 /**
1704 * sata_set_spd_needed - is SATA spd configuration needed
1705 * @ap: Port in question
1706 *
1707 * Test whether the spd limit in SControl matches
1708 * @ap->sata_spd_limit. This function is used to determine
1709 * whether hardreset is necessary to apply SATA spd
1710 * configuration.
1711 *
1712 * LOCKING:
1713 * Inherited from caller.
1714 *
1715 * RETURNS:
1716 * 1 if SATA spd configuration is needed, 0 otherwise.
1717 */
1718 int sata_set_spd_needed(struct ata_port *ap)
1719 {
1720 u32 scontrol;
1721
1722 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1723 return 0;
1724
1725 scontrol = scr_read(ap, SCR_CONTROL);
1726
1727 return __sata_set_spd_needed(ap, &scontrol);
1728 }
1729
1730 /**
1731 * sata_set_spd - set SATA spd according to spd limit
1732 * @ap: Port to set SATA spd for
1733 *
1734 * Set SATA spd of @ap according to sata_spd_limit.
1735 *
1736 * LOCKING:
1737 * Inherited from caller.
1738 *
1739 * RETURNS:
1740 * 0 if spd doesn't need to be changed, 1 if spd has been
1741 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1742 */
1743 int sata_set_spd(struct ata_port *ap)
1744 {
1745 u32 scontrol;
1746
1747 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1748 return -EOPNOTSUPP;
1749
1750 scontrol = scr_read(ap, SCR_CONTROL);
1751 if (!__sata_set_spd_needed(ap, &scontrol))
1752 return 0;
1753
1754 scr_write(ap, SCR_CONTROL, scontrol);
1755 return 1;
1756 }
1757
1758 /*
1759 * This mode timing computation functionality is ported over from
1760 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1761 */
1762 /*
1763 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1764 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1765 * for PIO 5, which is a nonstandard extension and UDMA6, which
1766 * is currently supported only by Maxtor drives.
1767 */
1768
1769 static const struct ata_timing ata_timing[] = {
1770
1771 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1772 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1773 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1774 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1775
1776 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1777 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1778 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1779
1780 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1781
1782 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1783 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1784 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1785
1786 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1787 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1788 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1789
1790 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1791 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1792 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1793
1794 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1795 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1796 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1797
1798 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1799
1800 { 0xFF }
1801 };
1802
1803 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1804 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1805
1806 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1807 {
1808 q->setup = EZ(t->setup * 1000, T);
1809 q->act8b = EZ(t->act8b * 1000, T);
1810 q->rec8b = EZ(t->rec8b * 1000, T);
1811 q->cyc8b = EZ(t->cyc8b * 1000, T);
1812 q->active = EZ(t->active * 1000, T);
1813 q->recover = EZ(t->recover * 1000, T);
1814 q->cycle = EZ(t->cycle * 1000, T);
1815 q->udma = EZ(t->udma * 1000, UT);
1816 }
1817
1818 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1819 struct ata_timing *m, unsigned int what)
1820 {
1821 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1822 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1823 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1824 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1825 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1826 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1827 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1828 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1829 }
1830
1831 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1832 {
1833 const struct ata_timing *t;
1834
1835 for (t = ata_timing; t->mode != speed; t++)
1836 if (t->mode == 0xFF)
1837 return NULL;
1838 return t;
1839 }
1840
1841 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1842 struct ata_timing *t, int T, int UT)
1843 {
1844 const struct ata_timing *s;
1845 struct ata_timing p;
1846
1847 /*
1848 * Find the mode.
1849 */
1850
1851 if (!(s = ata_timing_find_mode(speed)))
1852 return -EINVAL;
1853
1854 memcpy(t, s, sizeof(*s));
1855
1856 /*
1857 * If the drive is an EIDE drive, it can tell us it needs extended
1858 * PIO/MW_DMA cycle timing.
1859 */
1860
1861 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1862 memset(&p, 0, sizeof(p));
1863 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1864 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1865 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1866 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1867 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1868 }
1869 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1870 }
1871
1872 /*
1873 * Convert the timing to bus clock counts.
1874 */
1875
1876 ata_timing_quantize(t, t, T, UT);
1877
1878 /*
1879 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1880 * S.M.A.R.T * and some other commands. We have to ensure that the
1881 * DMA cycle timing is slower/equal than the fastest PIO timing.
1882 */
1883
1884 if (speed > XFER_PIO_4) {
1885 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1886 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1887 }
1888
1889 /*
1890 * Lengthen active & recovery time so that cycle time is correct.
1891 */
1892
1893 if (t->act8b + t->rec8b < t->cyc8b) {
1894 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1895 t->rec8b = t->cyc8b - t->act8b;
1896 }
1897
1898 if (t->active + t->recover < t->cycle) {
1899 t->active += (t->cycle - (t->active + t->recover)) / 2;
1900 t->recover = t->cycle - t->active;
1901 }
1902
1903 return 0;
1904 }
1905
1906 /**
1907 * ata_down_xfermask_limit - adjust dev xfer masks downward
1908 * @ap: Port associated with device @dev
1909 * @dev: Device to adjust xfer masks
1910 * @force_pio0: Force PIO0
1911 *
1912 * Adjust xfer masks of @dev downward. Note that this function
1913 * does not apply the change. Invoking ata_set_mode() afterwards
1914 * will apply the limit.
1915 *
1916 * LOCKING:
1917 * Inherited from caller.
1918 *
1919 * RETURNS:
1920 * 0 on success, negative errno on failure
1921 */
1922 int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1923 int force_pio0)
1924 {
1925 unsigned long xfer_mask;
1926 int highbit;
1927
1928 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1929 dev->udma_mask);
1930
1931 if (!xfer_mask)
1932 goto fail;
1933 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1934 if (xfer_mask & ATA_MASK_UDMA)
1935 xfer_mask &= ~ATA_MASK_MWDMA;
1936
1937 highbit = fls(xfer_mask) - 1;
1938 xfer_mask &= ~(1 << highbit);
1939 if (force_pio0)
1940 xfer_mask &= 1 << ATA_SHIFT_PIO;
1941 if (!xfer_mask)
1942 goto fail;
1943
1944 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1945 &dev->udma_mask);
1946
1947 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1948 ap->id, dev->devno, ata_mode_string(xfer_mask));
1949
1950 return 0;
1951
1952 fail:
1953 return -EINVAL;
1954 }
1955
1956 static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1957 {
1958 unsigned int err_mask;
1959 int rc;
1960
1961 dev->flags &= ~ATA_DFLAG_PIO;
1962 if (dev->xfer_shift == ATA_SHIFT_PIO)
1963 dev->flags |= ATA_DFLAG_PIO;
1964
1965 err_mask = ata_dev_set_xfermode(ap, dev);
1966 if (err_mask) {
1967 printk(KERN_ERR
1968 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1969 ap->id, err_mask);
1970 return -EIO;
1971 }
1972
1973 rc = ata_dev_revalidate(ap, dev, 0);
1974 if (rc)
1975 return rc;
1976
1977 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1978 dev->xfer_shift, (int)dev->xfer_mode);
1979
1980 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1981 ap->id, dev->devno,
1982 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1983 return 0;
1984 }
1985
1986 /**
1987 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1988 * @ap: port on which timings will be programmed
1989 * @r_failed_dev: out paramter for failed device
1990 *
1991 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1992 * ata_set_mode() fails, pointer to the failing device is
1993 * returned in @r_failed_dev.
1994 *
1995 * LOCKING:
1996 * PCI/etc. bus probe sem.
1997 *
1998 * RETURNS:
1999 * 0 on success, negative errno otherwise
2000 */
2001 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2002 {
2003 struct ata_device *dev;
2004 int i, rc = 0, used_dma = 0, found = 0;
2005
2006 /* step 1: calculate xfer_mask */
2007 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2008 unsigned int pio_mask, dma_mask;
2009
2010 dev = &ap->device[i];
2011
2012 if (!ata_dev_enabled(dev))
2013 continue;
2014
2015 ata_dev_xfermask(ap, dev);
2016
2017 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2018 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2019 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2020 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2021
2022 found = 1;
2023 if (dev->dma_mode)
2024 used_dma = 1;
2025 }
2026 if (!found)
2027 goto out;
2028
2029 /* step 2: always set host PIO timings */
2030 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2031 dev = &ap->device[i];
2032 if (!ata_dev_enabled(dev))
2033 continue;
2034
2035 if (!dev->pio_mode) {
2036 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
2037 ap->id, dev->devno);
2038 rc = -EINVAL;
2039 goto out;
2040 }
2041
2042 dev->xfer_mode = dev->pio_mode;
2043 dev->xfer_shift = ATA_SHIFT_PIO;
2044 if (ap->ops->set_piomode)
2045 ap->ops->set_piomode(ap, dev);
2046 }
2047
2048 /* step 3: set host DMA timings */
2049 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2050 dev = &ap->device[i];
2051
2052 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2053 continue;
2054
2055 dev->xfer_mode = dev->dma_mode;
2056 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2057 if (ap->ops->set_dmamode)
2058 ap->ops->set_dmamode(ap, dev);
2059 }
2060
2061 /* step 4: update devices' xfer mode */
2062 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2063 dev = &ap->device[i];
2064
2065 if (!ata_dev_enabled(dev))
2066 continue;
2067
2068 rc = ata_dev_set_mode(ap, dev);
2069 if (rc)
2070 goto out;
2071 }
2072
2073 /* Record simplex status. If we selected DMA then the other
2074 * host channels are not permitted to do so.
2075 */
2076 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2077 ap->host_set->simplex_claimed = 1;
2078
2079 /* step5: chip specific finalisation */
2080 if (ap->ops->post_set_mode)
2081 ap->ops->post_set_mode(ap);
2082
2083 out:
2084 if (rc)
2085 *r_failed_dev = dev;
2086 return rc;
2087 }
2088
2089 /**
2090 * ata_tf_to_host - issue ATA taskfile to host controller
2091 * @ap: port to which command is being issued
2092 * @tf: ATA taskfile register set
2093 *
2094 * Issues ATA taskfile register set to ATA host controller,
2095 * with proper synchronization with interrupt handler and
2096 * other threads.
2097 *
2098 * LOCKING:
2099 * spin_lock_irqsave(host_set lock)
2100 */
2101
2102 static inline void ata_tf_to_host(struct ata_port *ap,
2103 const struct ata_taskfile *tf)
2104 {
2105 ap->ops->tf_load(ap, tf);
2106 ap->ops->exec_command(ap, tf);
2107 }
2108
2109 /**
2110 * ata_busy_sleep - sleep until BSY clears, or timeout
2111 * @ap: port containing status register to be polled
2112 * @tmout_pat: impatience timeout
2113 * @tmout: overall timeout
2114 *
2115 * Sleep until ATA Status register bit BSY clears,
2116 * or a timeout occurs.
2117 *
2118 * LOCKING: None.
2119 */
2120
2121 unsigned int ata_busy_sleep (struct ata_port *ap,
2122 unsigned long tmout_pat, unsigned long tmout)
2123 {
2124 unsigned long timer_start, timeout;
2125 u8 status;
2126
2127 status = ata_busy_wait(ap, ATA_BUSY, 300);
2128 timer_start = jiffies;
2129 timeout = timer_start + tmout_pat;
2130 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2131 msleep(50);
2132 status = ata_busy_wait(ap, ATA_BUSY, 3);
2133 }
2134
2135 if (status & ATA_BUSY)
2136 printk(KERN_WARNING "ata%u is slow to respond, "
2137 "please be patient\n", ap->id);
2138
2139 timeout = timer_start + tmout;
2140 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2141 msleep(50);
2142 status = ata_chk_status(ap);
2143 }
2144
2145 if (status & ATA_BUSY) {
2146 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2147 ap->id, tmout / HZ);
2148 return 1;
2149 }
2150
2151 return 0;
2152 }
2153
2154 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2155 {
2156 struct ata_ioports *ioaddr = &ap->ioaddr;
2157 unsigned int dev0 = devmask & (1 << 0);
2158 unsigned int dev1 = devmask & (1 << 1);
2159 unsigned long timeout;
2160
2161 /* if device 0 was found in ata_devchk, wait for its
2162 * BSY bit to clear
2163 */
2164 if (dev0)
2165 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2166
2167 /* if device 1 was found in ata_devchk, wait for
2168 * register access, then wait for BSY to clear
2169 */
2170 timeout = jiffies + ATA_TMOUT_BOOT;
2171 while (dev1) {
2172 u8 nsect, lbal;
2173
2174 ap->ops->dev_select(ap, 1);
2175 if (ap->flags & ATA_FLAG_MMIO) {
2176 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2177 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2178 } else {
2179 nsect = inb(ioaddr->nsect_addr);
2180 lbal = inb(ioaddr->lbal_addr);
2181 }
2182 if ((nsect == 1) && (lbal == 1))
2183 break;
2184 if (time_after(jiffies, timeout)) {
2185 dev1 = 0;
2186 break;
2187 }
2188 msleep(50); /* give drive a breather */
2189 }
2190 if (dev1)
2191 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2192
2193 /* is all this really necessary? */
2194 ap->ops->dev_select(ap, 0);
2195 if (dev1)
2196 ap->ops->dev_select(ap, 1);
2197 if (dev0)
2198 ap->ops->dev_select(ap, 0);
2199 }
2200
2201 static unsigned int ata_bus_softreset(struct ata_port *ap,
2202 unsigned int devmask)
2203 {
2204 struct ata_ioports *ioaddr = &ap->ioaddr;
2205
2206 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2207
2208 /* software reset. causes dev0 to be selected */
2209 if (ap->flags & ATA_FLAG_MMIO) {
2210 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2211 udelay(20); /* FIXME: flush */
2212 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2213 udelay(20); /* FIXME: flush */
2214 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2215 } else {
2216 outb(ap->ctl, ioaddr->ctl_addr);
2217 udelay(10);
2218 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2219 udelay(10);
2220 outb(ap->ctl, ioaddr->ctl_addr);
2221 }
2222
2223 /* spec mandates ">= 2ms" before checking status.
2224 * We wait 150ms, because that was the magic delay used for
2225 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2226 * between when the ATA command register is written, and then
2227 * status is checked. Because waiting for "a while" before
2228 * checking status is fine, post SRST, we perform this magic
2229 * delay here as well.
2230 *
2231 * Old drivers/ide uses the 2mS rule and then waits for ready
2232 */
2233 msleep(150);
2234
2235 /* Before we perform post reset processing we want to see if
2236 * the bus shows 0xFF because the odd clown forgets the D7
2237 * pulldown resistor.
2238 */
2239 if (ata_check_status(ap) == 0xFF) {
2240 printk(KERN_ERR "ata%u: SRST failed (status 0xFF)\n", ap->id);
2241 return AC_ERR_OTHER;
2242 }
2243
2244 ata_bus_post_reset(ap, devmask);
2245
2246 return 0;
2247 }
2248
2249 /**
2250 * ata_bus_reset - reset host port and associated ATA channel
2251 * @ap: port to reset
2252 *
2253 * This is typically the first time we actually start issuing
2254 * commands to the ATA channel. We wait for BSY to clear, then
2255 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2256 * result. Determine what devices, if any, are on the channel
2257 * by looking at the device 0/1 error register. Look at the signature
2258 * stored in each device's taskfile registers, to determine if
2259 * the device is ATA or ATAPI.
2260 *
2261 * LOCKING:
2262 * PCI/etc. bus probe sem.
2263 * Obtains host_set lock.
2264 *
2265 * SIDE EFFECTS:
2266 * Sets ATA_FLAG_DISABLED if bus reset fails.
2267 */
2268
2269 void ata_bus_reset(struct ata_port *ap)
2270 {
2271 struct ata_ioports *ioaddr = &ap->ioaddr;
2272 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2273 u8 err;
2274 unsigned int dev0, dev1 = 0, devmask = 0;
2275
2276 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2277
2278 /* determine if device 0/1 are present */
2279 if (ap->flags & ATA_FLAG_SATA_RESET)
2280 dev0 = 1;
2281 else {
2282 dev0 = ata_devchk(ap, 0);
2283 if (slave_possible)
2284 dev1 = ata_devchk(ap, 1);
2285 }
2286
2287 if (dev0)
2288 devmask |= (1 << 0);
2289 if (dev1)
2290 devmask |= (1 << 1);
2291
2292 /* select device 0 again */
2293 ap->ops->dev_select(ap, 0);
2294
2295 /* issue bus reset */
2296 if (ap->flags & ATA_FLAG_SRST)
2297 if (ata_bus_softreset(ap, devmask))
2298 goto err_out;
2299
2300 /*
2301 * determine by signature whether we have ATA or ATAPI devices
2302 */
2303 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2304 if ((slave_possible) && (err != 0x81))
2305 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2306
2307 /* re-enable interrupts */
2308 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2309 ata_irq_on(ap);
2310
2311 /* is double-select really necessary? */
2312 if (ap->device[1].class != ATA_DEV_NONE)
2313 ap->ops->dev_select(ap, 1);
2314 if (ap->device[0].class != ATA_DEV_NONE)
2315 ap->ops->dev_select(ap, 0);
2316
2317 /* if no devices were detected, disable this port */
2318 if ((ap->device[0].class == ATA_DEV_NONE) &&
2319 (ap->device[1].class == ATA_DEV_NONE))
2320 goto err_out;
2321
2322 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2323 /* set up device control for ATA_FLAG_SATA_RESET */
2324 if (ap->flags & ATA_FLAG_MMIO)
2325 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2326 else
2327 outb(ap->ctl, ioaddr->ctl_addr);
2328 }
2329
2330 DPRINTK("EXIT\n");
2331 return;
2332
2333 err_out:
2334 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2335 ap->ops->port_disable(ap);
2336
2337 DPRINTK("EXIT\n");
2338 }
2339
2340 static int sata_phy_resume(struct ata_port *ap)
2341 {
2342 unsigned long timeout = jiffies + (HZ * 5);
2343 u32 scontrol, sstatus;
2344
2345 scontrol = scr_read(ap, SCR_CONTROL);
2346 scontrol = (scontrol & 0x0f0) | 0x300;
2347 scr_write_flush(ap, SCR_CONTROL, scontrol);
2348
2349 /* Wait for phy to become ready, if necessary. */
2350 do {
2351 msleep(200);
2352 sstatus = scr_read(ap, SCR_STATUS);
2353 if ((sstatus & 0xf) != 1)
2354 return 0;
2355 } while (time_before(jiffies, timeout));
2356
2357 return -1;
2358 }
2359
2360 /**
2361 * ata_std_probeinit - initialize probing
2362 * @ap: port to be probed
2363 *
2364 * @ap is about to be probed. Initialize it. This function is
2365 * to be used as standard callback for ata_drive_probe_reset().
2366 *
2367 * NOTE!!! Do not use this function as probeinit if a low level
2368 * driver implements only hardreset. Just pass NULL as probeinit
2369 * in that case. Using this function is probably okay but doing
2370 * so makes reset sequence different from the original
2371 * ->phy_reset implementation and Jeff nervous. :-P
2372 */
2373 void ata_std_probeinit(struct ata_port *ap)
2374 {
2375 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
2376 u32 spd;
2377
2378 /* set cable type and resume link */
2379 ap->cbl = ATA_CBL_SATA;
2380 sata_phy_resume(ap);
2381
2382 /* init sata_spd_limit to the current value */
2383 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2384 if (spd)
2385 ap->sata_spd_limit &= (1 << spd) - 1;
2386
2387 /* wait for device */
2388 if (sata_dev_present(ap))
2389 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2390 }
2391 }
2392
2393 /**
2394 * ata_std_softreset - reset host port via ATA SRST
2395 * @ap: port to reset
2396 * @classes: resulting classes of attached devices
2397 *
2398 * Reset host port using ATA SRST. This function is to be used
2399 * as standard callback for ata_drive_*_reset() functions.
2400 *
2401 * LOCKING:
2402 * Kernel thread context (may sleep)
2403 *
2404 * RETURNS:
2405 * 0 on success, -errno otherwise.
2406 */
2407 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2408 {
2409 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2410 unsigned int devmask = 0, err_mask;
2411 u8 err;
2412
2413 DPRINTK("ENTER\n");
2414
2415 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2416 classes[0] = ATA_DEV_NONE;
2417 goto out;
2418 }
2419
2420 /* determine if device 0/1 are present */
2421 if (ata_devchk(ap, 0))
2422 devmask |= (1 << 0);
2423 if (slave_possible && ata_devchk(ap, 1))
2424 devmask |= (1 << 1);
2425
2426 /* select device 0 again */
2427 ap->ops->dev_select(ap, 0);
2428
2429 /* issue bus reset */
2430 DPRINTK("about to softreset, devmask=%x\n", devmask);
2431 err_mask = ata_bus_softreset(ap, devmask);
2432 if (err_mask) {
2433 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2434 ap->id, err_mask);
2435 return -EIO;
2436 }
2437
2438 /* determine by signature whether we have ATA or ATAPI devices */
2439 classes[0] = ata_dev_try_classify(ap, 0, &err);
2440 if (slave_possible && err != 0x81)
2441 classes[1] = ata_dev_try_classify(ap, 1, &err);
2442
2443 out:
2444 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2445 return 0;
2446 }
2447
2448 /**
2449 * sata_std_hardreset - reset host port via SATA phy reset
2450 * @ap: port to reset
2451 * @class: resulting class of attached device
2452 *
2453 * SATA phy-reset host port using DET bits of SControl register.
2454 * This function is to be used as standard callback for
2455 * ata_drive_*_reset().
2456 *
2457 * LOCKING:
2458 * Kernel thread context (may sleep)
2459 *
2460 * RETURNS:
2461 * 0 on success, -errno otherwise.
2462 */
2463 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2464 {
2465 u32 scontrol;
2466
2467 DPRINTK("ENTER\n");
2468
2469 if (sata_set_spd_needed(ap)) {
2470 /* SATA spec says nothing about how to reconfigure
2471 * spd. To be on the safe side, turn off phy during
2472 * reconfiguration. This works for at least ICH7 AHCI
2473 * and Sil3124.
2474 */
2475 scontrol = scr_read(ap, SCR_CONTROL);
2476 scontrol = (scontrol & 0x0f0) | 0x302;
2477 scr_write_flush(ap, SCR_CONTROL, scontrol);
2478
2479 sata_set_spd(ap);
2480 }
2481
2482 /* issue phy wake/reset */
2483 scontrol = scr_read(ap, SCR_CONTROL);
2484 scontrol = (scontrol & 0x0f0) | 0x301;
2485 scr_write_flush(ap, SCR_CONTROL, scontrol);
2486
2487 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2488 * 10.4.2 says at least 1 ms.
2489 */
2490 msleep(1);
2491
2492 /* bring phy back */
2493 sata_phy_resume(ap);
2494
2495 /* TODO: phy layer with polling, timeouts, etc. */
2496 if (!sata_dev_present(ap)) {
2497 *class = ATA_DEV_NONE;
2498 DPRINTK("EXIT, link offline\n");
2499 return 0;
2500 }
2501
2502 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2503 printk(KERN_ERR
2504 "ata%u: COMRESET failed (device not ready)\n", ap->id);
2505 return -EIO;
2506 }
2507
2508 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2509
2510 *class = ata_dev_try_classify(ap, 0, NULL);
2511
2512 DPRINTK("EXIT, class=%u\n", *class);
2513 return 0;
2514 }
2515
2516 /**
2517 * ata_std_postreset - standard postreset callback
2518 * @ap: the target ata_port
2519 * @classes: classes of attached devices
2520 *
2521 * This function is invoked after a successful reset. Note that
2522 * the device might have been reset more than once using
2523 * different reset methods before postreset is invoked.
2524 *
2525 * This function is to be used as standard callback for
2526 * ata_drive_*_reset().
2527 *
2528 * LOCKING:
2529 * Kernel thread context (may sleep)
2530 */
2531 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2532 {
2533 DPRINTK("ENTER\n");
2534
2535 /* print link status */
2536 if (ap->cbl == ATA_CBL_SATA)
2537 sata_print_link_status(ap);
2538
2539 /* re-enable interrupts */
2540 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2541 ata_irq_on(ap);
2542
2543 /* is double-select really necessary? */
2544 if (classes[0] != ATA_DEV_NONE)
2545 ap->ops->dev_select(ap, 1);
2546 if (classes[1] != ATA_DEV_NONE)
2547 ap->ops->dev_select(ap, 0);
2548
2549 /* bail out if no device is present */
2550 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2551 DPRINTK("EXIT, no device\n");
2552 return;
2553 }
2554
2555 /* set up device control */
2556 if (ap->ioaddr.ctl_addr) {
2557 if (ap->flags & ATA_FLAG_MMIO)
2558 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2559 else
2560 outb(ap->ctl, ap->ioaddr.ctl_addr);
2561 }
2562
2563 DPRINTK("EXIT\n");
2564 }
2565
2566 /**
2567 * ata_std_probe_reset - standard probe reset method
2568 * @ap: prot to perform probe-reset
2569 * @classes: resulting classes of attached devices
2570 *
2571 * The stock off-the-shelf ->probe_reset method.
2572 *
2573 * LOCKING:
2574 * Kernel thread context (may sleep)
2575 *
2576 * RETURNS:
2577 * 0 on success, -errno otherwise.
2578 */
2579 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2580 {
2581 ata_reset_fn_t hardreset;
2582
2583 hardreset = NULL;
2584 if (ap->cbl == ATA_CBL_SATA && ap->ops->scr_read)
2585 hardreset = sata_std_hardreset;
2586
2587 return ata_drive_probe_reset(ap, ata_std_probeinit,
2588 ata_std_softreset, hardreset,
2589 ata_std_postreset, classes);
2590 }
2591
2592 int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
2593 ata_postreset_fn_t postreset, unsigned int *classes)
2594 {
2595 int i, rc;
2596
2597 for (i = 0; i < ATA_MAX_DEVICES; i++)
2598 classes[i] = ATA_DEV_UNKNOWN;
2599
2600 rc = reset(ap, classes);
2601 if (rc)
2602 return rc;
2603
2604 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2605 * is complete and convert all ATA_DEV_UNKNOWN to
2606 * ATA_DEV_NONE.
2607 */
2608 for (i = 0; i < ATA_MAX_DEVICES; i++)
2609 if (classes[i] != ATA_DEV_UNKNOWN)
2610 break;
2611
2612 if (i < ATA_MAX_DEVICES)
2613 for (i = 0; i < ATA_MAX_DEVICES; i++)
2614 if (classes[i] == ATA_DEV_UNKNOWN)
2615 classes[i] = ATA_DEV_NONE;
2616
2617 if (postreset)
2618 postreset(ap, classes);
2619
2620 return 0;
2621 }
2622
2623 /**
2624 * ata_drive_probe_reset - Perform probe reset with given methods
2625 * @ap: port to reset
2626 * @probeinit: probeinit method (can be NULL)
2627 * @softreset: softreset method (can be NULL)
2628 * @hardreset: hardreset method (can be NULL)
2629 * @postreset: postreset method (can be NULL)
2630 * @classes: resulting classes of attached devices
2631 *
2632 * Reset the specified port and classify attached devices using
2633 * given methods. This function prefers softreset but tries all
2634 * possible reset sequences to reset and classify devices. This
2635 * function is intended to be used for constructing ->probe_reset
2636 * callback by low level drivers.
2637 *
2638 * Reset methods should follow the following rules.
2639 *
2640 * - Return 0 on sucess, -errno on failure.
2641 * - If classification is supported, fill classes[] with
2642 * recognized class codes.
2643 * - If classification is not supported, leave classes[] alone.
2644 *
2645 * LOCKING:
2646 * Kernel thread context (may sleep)
2647 *
2648 * RETURNS:
2649 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2650 * if classification fails, and any error code from reset
2651 * methods.
2652 */
2653 int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2654 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2655 ata_postreset_fn_t postreset, unsigned int *classes)
2656 {
2657 int rc = -EINVAL;
2658
2659 if (probeinit)
2660 probeinit(ap);
2661
2662 if (softreset && !sata_set_spd_needed(ap)) {
2663 rc = ata_do_reset(ap, softreset, postreset, classes);
2664 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2665 goto done;
2666 printk(KERN_INFO "ata%u: softreset failed, will try "
2667 "hardreset in 5 secs\n", ap->id);
2668 ssleep(5);
2669 }
2670
2671 if (!hardreset)
2672 goto done;
2673
2674 while (1) {
2675 rc = ata_do_reset(ap, hardreset, postreset, classes);
2676 if (rc == 0) {
2677 if (classes[0] != ATA_DEV_UNKNOWN)
2678 goto done;
2679 break;
2680 }
2681
2682 if (sata_down_spd_limit(ap))
2683 goto done;
2684
2685 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2686 "in 5 secs\n", ap->id);
2687 ssleep(5);
2688 }
2689
2690 if (softreset) {
2691 printk(KERN_INFO "ata%u: hardreset succeeded without "
2692 "classification, will retry softreset in 5 secs\n",
2693 ap->id);
2694 ssleep(5);
2695
2696 rc = ata_do_reset(ap, softreset, postreset, classes);
2697 }
2698
2699 done:
2700 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2701 rc = -ENODEV;
2702 return rc;
2703 }
2704
2705 /**
2706 * ata_dev_same_device - Determine whether new ID matches configured device
2707 * @ap: port on which the device to compare against resides
2708 * @dev: device to compare against
2709 * @new_class: class of the new device
2710 * @new_id: IDENTIFY page of the new device
2711 *
2712 * Compare @new_class and @new_id against @dev and determine
2713 * whether @dev is the device indicated by @new_class and
2714 * @new_id.
2715 *
2716 * LOCKING:
2717 * None.
2718 *
2719 * RETURNS:
2720 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2721 */
2722 static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2723 unsigned int new_class, const u16 *new_id)
2724 {
2725 const u16 *old_id = dev->id;
2726 unsigned char model[2][41], serial[2][21];
2727 u64 new_n_sectors;
2728
2729 if (dev->class != new_class) {
2730 printk(KERN_INFO
2731 "ata%u: dev %u class mismatch %d != %d\n",
2732 ap->id, dev->devno, dev->class, new_class);
2733 return 0;
2734 }
2735
2736 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2737 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2738 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2739 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2740 new_n_sectors = ata_id_n_sectors(new_id);
2741
2742 if (strcmp(model[0], model[1])) {
2743 printk(KERN_INFO
2744 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2745 ap->id, dev->devno, model[0], model[1]);
2746 return 0;
2747 }
2748
2749 if (strcmp(serial[0], serial[1])) {
2750 printk(KERN_INFO
2751 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2752 ap->id, dev->devno, serial[0], serial[1]);
2753 return 0;
2754 }
2755
2756 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2757 printk(KERN_INFO
2758 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2759 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2760 (unsigned long long)new_n_sectors);
2761 return 0;
2762 }
2763
2764 return 1;
2765 }
2766
2767 /**
2768 * ata_dev_revalidate - Revalidate ATA device
2769 * @ap: port on which the device to revalidate resides
2770 * @dev: device to revalidate
2771 * @post_reset: is this revalidation after reset?
2772 *
2773 * Re-read IDENTIFY page and make sure @dev is still attached to
2774 * the port.
2775 *
2776 * LOCKING:
2777 * Kernel thread context (may sleep)
2778 *
2779 * RETURNS:
2780 * 0 on success, negative errno otherwise
2781 */
2782 int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2783 int post_reset)
2784 {
2785 unsigned int class = dev->class;
2786 u16 *id = NULL;
2787 int rc;
2788
2789 if (!ata_dev_enabled(dev)) {
2790 rc = -ENODEV;
2791 goto fail;
2792 }
2793
2794 /* allocate & read ID data */
2795 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2796 if (rc)
2797 goto fail;
2798
2799 /* is the device still there? */
2800 if (!ata_dev_same_device(ap, dev, class, id)) {
2801 rc = -ENODEV;
2802 goto fail;
2803 }
2804
2805 kfree(dev->id);
2806 dev->id = id;
2807
2808 /* configure device according to the new ID */
2809 rc = ata_dev_configure(ap, dev, 0);
2810 if (rc == 0)
2811 return 0;
2812
2813 fail:
2814 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2815 ap->id, dev->devno, rc);
2816 kfree(id);
2817 return rc;
2818 }
2819
2820 static const char * const ata_dma_blacklist [] = {
2821 "WDC AC11000H", NULL,
2822 "WDC AC22100H", NULL,
2823 "WDC AC32500H", NULL,
2824 "WDC AC33100H", NULL,
2825 "WDC AC31600H", NULL,
2826 "WDC AC32100H", "24.09P07",
2827 "WDC AC23200L", "21.10N21",
2828 "Compaq CRD-8241B", NULL,
2829 "CRD-8400B", NULL,
2830 "CRD-8480B", NULL,
2831 "CRD-8482B", NULL,
2832 "CRD-84", NULL,
2833 "SanDisk SDP3B", NULL,
2834 "SanDisk SDP3B-64", NULL,
2835 "SANYO CD-ROM CRD", NULL,
2836 "HITACHI CDR-8", NULL,
2837 "HITACHI CDR-8335", NULL,
2838 "HITACHI CDR-8435", NULL,
2839 "Toshiba CD-ROM XM-6202B", NULL,
2840 "TOSHIBA CD-ROM XM-1702BC", NULL,
2841 "CD-532E-A", NULL,
2842 "E-IDE CD-ROM CR-840", NULL,
2843 "CD-ROM Drive/F5A", NULL,
2844 "WPI CDD-820", NULL,
2845 "SAMSUNG CD-ROM SC-148C", NULL,
2846 "SAMSUNG CD-ROM SC", NULL,
2847 "SanDisk SDP3B-64", NULL,
2848 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2849 "_NEC DV5800A", NULL,
2850 "SAMSUNG CD-ROM SN-124", "N001"
2851 };
2852
2853 static int ata_strim(char *s, size_t len)
2854 {
2855 len = strnlen(s, len);
2856
2857 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2858 while ((len > 0) && (s[len - 1] == ' ')) {
2859 len--;
2860 s[len] = 0;
2861 }
2862 return len;
2863 }
2864
2865 static int ata_dma_blacklisted(const struct ata_device *dev)
2866 {
2867 unsigned char model_num[40];
2868 unsigned char model_rev[16];
2869 unsigned int nlen, rlen;
2870 int i;
2871
2872 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2873 sizeof(model_num));
2874 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2875 sizeof(model_rev));
2876 nlen = ata_strim(model_num, sizeof(model_num));
2877 rlen = ata_strim(model_rev, sizeof(model_rev));
2878
2879 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2880 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2881 if (ata_dma_blacklist[i+1] == NULL)
2882 return 1;
2883 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2884 return 1;
2885 }
2886 }
2887 return 0;
2888 }
2889
2890 /**
2891 * ata_dev_xfermask - Compute supported xfermask of the given device
2892 * @ap: Port on which the device to compute xfermask for resides
2893 * @dev: Device to compute xfermask for
2894 *
2895 * Compute supported xfermask of @dev and store it in
2896 * dev->*_mask. This function is responsible for applying all
2897 * known limits including host controller limits, device
2898 * blacklist, etc...
2899 *
2900 * FIXME: The current implementation limits all transfer modes to
2901 * the fastest of the lowested device on the port. This is not
2902 * required on most controllers.
2903 *
2904 * LOCKING:
2905 * None.
2906 */
2907 static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
2908 {
2909 struct ata_host_set *hs = ap->host_set;
2910 unsigned long xfer_mask;
2911 int i;
2912
2913 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2914 ap->mwdma_mask, ap->udma_mask);
2915
2916 /* Apply cable rule here. Don't apply it early because when
2917 * we handle hot plug the cable type can itself change.
2918 */
2919 if (ap->cbl == ATA_CBL_PATA40)
2920 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
2921
2922 /* FIXME: Use port-wide xfermask for now */
2923 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2924 struct ata_device *d = &ap->device[i];
2925
2926 if (ata_dev_absent(d))
2927 continue;
2928
2929 if (ata_dev_disabled(d)) {
2930 /* to avoid violating device selection timing */
2931 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2932 UINT_MAX, UINT_MAX);
2933 continue;
2934 }
2935
2936 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2937 d->mwdma_mask, d->udma_mask);
2938 xfer_mask &= ata_id_xfermask(d->id);
2939 if (ata_dma_blacklisted(d))
2940 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2941 }
2942
2943 if (ata_dma_blacklisted(dev))
2944 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2945 "disabling DMA\n", ap->id, dev->devno);
2946
2947 if (hs->flags & ATA_HOST_SIMPLEX) {
2948 if (hs->simplex_claimed)
2949 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2950 }
2951
2952 if (ap->ops->mode_filter)
2953 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2954
2955 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2956 &dev->mwdma_mask, &dev->udma_mask);
2957 }
2958
2959 /**
2960 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2961 * @ap: Port associated with device @dev
2962 * @dev: Device to which command will be sent
2963 *
2964 * Issue SET FEATURES - XFER MODE command to device @dev
2965 * on port @ap.
2966 *
2967 * LOCKING:
2968 * PCI/etc. bus probe sem.
2969 *
2970 * RETURNS:
2971 * 0 on success, AC_ERR_* mask otherwise.
2972 */
2973
2974 static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2975 struct ata_device *dev)
2976 {
2977 struct ata_taskfile tf;
2978 unsigned int err_mask;
2979
2980 /* set up set-features taskfile */
2981 DPRINTK("set features - xfer mode\n");
2982
2983 ata_tf_init(ap, &tf, dev->devno);
2984 tf.command = ATA_CMD_SET_FEATURES;
2985 tf.feature = SETFEATURES_XFER;
2986 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2987 tf.protocol = ATA_PROT_NODATA;
2988 tf.nsect = dev->xfer_mode;
2989
2990 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
2991
2992 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2993 return err_mask;
2994 }
2995
2996 /**
2997 * ata_dev_init_params - Issue INIT DEV PARAMS command
2998 * @ap: Port associated with device @dev
2999 * @dev: Device to which command will be sent
3000 *
3001 * LOCKING:
3002 * Kernel thread context (may sleep)
3003 *
3004 * RETURNS:
3005 * 0 on success, AC_ERR_* mask otherwise.
3006 */
3007
3008 static unsigned int ata_dev_init_params(struct ata_port *ap,
3009 struct ata_device *dev,
3010 u16 heads,
3011 u16 sectors)
3012 {
3013 struct ata_taskfile tf;
3014 unsigned int err_mask;
3015
3016 /* Number of sectors per track 1-255. Number of heads 1-16 */
3017 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3018 return AC_ERR_INVALID;
3019
3020 /* set up init dev params taskfile */
3021 DPRINTK("init dev params \n");
3022
3023 ata_tf_init(ap, &tf, dev->devno);
3024 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3025 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3026 tf.protocol = ATA_PROT_NODATA;
3027 tf.nsect = sectors;
3028 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3029
3030 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
3031
3032 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3033 return err_mask;
3034 }
3035
3036 /**
3037 * ata_sg_clean - Unmap DMA memory associated with command
3038 * @qc: Command containing DMA memory to be released
3039 *
3040 * Unmap all mapped DMA memory associated with this command.
3041 *
3042 * LOCKING:
3043 * spin_lock_irqsave(host_set lock)
3044 */
3045
3046 static void ata_sg_clean(struct ata_queued_cmd *qc)
3047 {
3048 struct ata_port *ap = qc->ap;
3049 struct scatterlist *sg = qc->__sg;
3050 int dir = qc->dma_dir;
3051 void *pad_buf = NULL;
3052
3053 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3054 WARN_ON(sg == NULL);
3055
3056 if (qc->flags & ATA_QCFLAG_SINGLE)
3057 WARN_ON(qc->n_elem > 1);
3058
3059 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3060
3061 /* if we padded the buffer out to 32-bit bound, and data
3062 * xfer direction is from-device, we must copy from the
3063 * pad buffer back into the supplied buffer
3064 */
3065 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3066 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3067
3068 if (qc->flags & ATA_QCFLAG_SG) {
3069 if (qc->n_elem)
3070 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3071 /* restore last sg */
3072 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3073 if (pad_buf) {
3074 struct scatterlist *psg = &qc->pad_sgent;
3075 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3076 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3077 kunmap_atomic(addr, KM_IRQ0);
3078 }
3079 } else {
3080 if (qc->n_elem)
3081 dma_unmap_single(ap->dev,
3082 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3083 dir);
3084 /* restore sg */
3085 sg->length += qc->pad_len;
3086 if (pad_buf)
3087 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3088 pad_buf, qc->pad_len);
3089 }
3090
3091 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3092 qc->__sg = NULL;
3093 }
3094
3095 /**
3096 * ata_fill_sg - Fill PCI IDE PRD table
3097 * @qc: Metadata associated with taskfile to be transferred
3098 *
3099 * Fill PCI IDE PRD (scatter-gather) table with segments
3100 * associated with the current disk command.
3101 *
3102 * LOCKING:
3103 * spin_lock_irqsave(host_set lock)
3104 *
3105 */
3106 static void ata_fill_sg(struct ata_queued_cmd *qc)
3107 {
3108 struct ata_port *ap = qc->ap;
3109 struct scatterlist *sg;
3110 unsigned int idx;
3111
3112 WARN_ON(qc->__sg == NULL);
3113 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3114
3115 idx = 0;
3116 ata_for_each_sg(sg, qc) {
3117 u32 addr, offset;
3118 u32 sg_len, len;
3119
3120 /* determine if physical DMA addr spans 64K boundary.
3121 * Note h/w doesn't support 64-bit, so we unconditionally
3122 * truncate dma_addr_t to u32.
3123 */
3124 addr = (u32) sg_dma_address(sg);
3125 sg_len = sg_dma_len(sg);
3126
3127 while (sg_len) {
3128 offset = addr & 0xffff;
3129 len = sg_len;
3130 if ((offset + sg_len) > 0x10000)
3131 len = 0x10000 - offset;
3132
3133 ap->prd[idx].addr = cpu_to_le32(addr);
3134 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3135 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3136
3137 idx++;
3138 sg_len -= len;
3139 addr += len;
3140 }
3141 }
3142
3143 if (idx)
3144 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3145 }
3146 /**
3147 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3148 * @qc: Metadata associated with taskfile to check
3149 *
3150 * Allow low-level driver to filter ATA PACKET commands, returning
3151 * a status indicating whether or not it is OK to use DMA for the
3152 * supplied PACKET command.
3153 *
3154 * LOCKING:
3155 * spin_lock_irqsave(host_set lock)
3156 *
3157 * RETURNS: 0 when ATAPI DMA can be used
3158 * nonzero otherwise
3159 */
3160 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3161 {
3162 struct ata_port *ap = qc->ap;
3163 int rc = 0; /* Assume ATAPI DMA is OK by default */
3164
3165 if (ap->ops->check_atapi_dma)
3166 rc = ap->ops->check_atapi_dma(qc);
3167
3168 return rc;
3169 }
3170 /**
3171 * ata_qc_prep - Prepare taskfile for submission
3172 * @qc: Metadata associated with taskfile to be prepared
3173 *
3174 * Prepare ATA taskfile for submission.
3175 *
3176 * LOCKING:
3177 * spin_lock_irqsave(host_set lock)
3178 */
3179 void ata_qc_prep(struct ata_queued_cmd *qc)
3180 {
3181 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3182 return;
3183
3184 ata_fill_sg(qc);
3185 }
3186
3187 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3188
3189 /**
3190 * ata_sg_init_one - Associate command with memory buffer
3191 * @qc: Command to be associated
3192 * @buf: Memory buffer
3193 * @buflen: Length of memory buffer, in bytes.
3194 *
3195 * Initialize the data-related elements of queued_cmd @qc
3196 * to point to a single memory buffer, @buf of byte length @buflen.
3197 *
3198 * LOCKING:
3199 * spin_lock_irqsave(host_set lock)
3200 */
3201
3202 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3203 {
3204 struct scatterlist *sg;
3205
3206 qc->flags |= ATA_QCFLAG_SINGLE;
3207
3208 memset(&qc->sgent, 0, sizeof(qc->sgent));
3209 qc->__sg = &qc->sgent;
3210 qc->n_elem = 1;
3211 qc->orig_n_elem = 1;
3212 qc->buf_virt = buf;
3213
3214 sg = qc->__sg;
3215 sg_init_one(sg, buf, buflen);
3216 }
3217
3218 /**
3219 * ata_sg_init - Associate command with scatter-gather table.
3220 * @qc: Command to be associated
3221 * @sg: Scatter-gather table.
3222 * @n_elem: Number of elements in s/g table.
3223 *
3224 * Initialize the data-related elements of queued_cmd @qc
3225 * to point to a scatter-gather table @sg, containing @n_elem
3226 * elements.
3227 *
3228 * LOCKING:
3229 * spin_lock_irqsave(host_set lock)
3230 */
3231
3232 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3233 unsigned int n_elem)
3234 {
3235 qc->flags |= ATA_QCFLAG_SG;
3236 qc->__sg = sg;
3237 qc->n_elem = n_elem;
3238 qc->orig_n_elem = n_elem;
3239 }
3240
3241 /**
3242 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3243 * @qc: Command with memory buffer to be mapped.
3244 *
3245 * DMA-map the memory buffer associated with queued_cmd @qc.
3246 *
3247 * LOCKING:
3248 * spin_lock_irqsave(host_set lock)
3249 *
3250 * RETURNS:
3251 * Zero on success, negative on error.
3252 */
3253
3254 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3255 {
3256 struct ata_port *ap = qc->ap;
3257 int dir = qc->dma_dir;
3258 struct scatterlist *sg = qc->__sg;
3259 dma_addr_t dma_address;
3260 int trim_sg = 0;
3261
3262 /* we must lengthen transfers to end on a 32-bit boundary */
3263 qc->pad_len = sg->length & 3;
3264 if (qc->pad_len) {
3265 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3266 struct scatterlist *psg = &qc->pad_sgent;
3267
3268 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3269
3270 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3271
3272 if (qc->tf.flags & ATA_TFLAG_WRITE)
3273 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3274 qc->pad_len);
3275
3276 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3277 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3278 /* trim sg */
3279 sg->length -= qc->pad_len;
3280 if (sg->length == 0)
3281 trim_sg = 1;
3282
3283 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3284 sg->length, qc->pad_len);
3285 }
3286
3287 if (trim_sg) {
3288 qc->n_elem--;
3289 goto skip_map;
3290 }
3291
3292 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3293 sg->length, dir);
3294 if (dma_mapping_error(dma_address)) {
3295 /* restore sg */
3296 sg->length += qc->pad_len;
3297 return -1;
3298 }
3299
3300 sg_dma_address(sg) = dma_address;
3301 sg_dma_len(sg) = sg->length;
3302
3303 skip_map:
3304 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3305 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3306
3307 return 0;
3308 }
3309
3310 /**
3311 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3312 * @qc: Command with scatter-gather table to be mapped.
3313 *
3314 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3315 *
3316 * LOCKING:
3317 * spin_lock_irqsave(host_set lock)
3318 *
3319 * RETURNS:
3320 * Zero on success, negative on error.
3321 *
3322 */
3323
3324 static int ata_sg_setup(struct ata_queued_cmd *qc)
3325 {
3326 struct ata_port *ap = qc->ap;
3327 struct scatterlist *sg = qc->__sg;
3328 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3329 int n_elem, pre_n_elem, dir, trim_sg = 0;
3330
3331 VPRINTK("ENTER, ata%u\n", ap->id);
3332 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3333
3334 /* we must lengthen transfers to end on a 32-bit boundary */
3335 qc->pad_len = lsg->length & 3;
3336 if (qc->pad_len) {
3337 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3338 struct scatterlist *psg = &qc->pad_sgent;
3339 unsigned int offset;
3340
3341 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3342
3343 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3344
3345 /*
3346 * psg->page/offset are used to copy to-be-written
3347 * data in this function or read data in ata_sg_clean.
3348 */
3349 offset = lsg->offset + lsg->length - qc->pad_len;
3350 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3351 psg->offset = offset_in_page(offset);
3352
3353 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3354 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3355 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3356 kunmap_atomic(addr, KM_IRQ0);
3357 }
3358
3359 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3360 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3361 /* trim last sg */
3362 lsg->length -= qc->pad_len;
3363 if (lsg->length == 0)
3364 trim_sg = 1;
3365
3366 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3367 qc->n_elem - 1, lsg->length, qc->pad_len);
3368 }
3369
3370 pre_n_elem = qc->n_elem;
3371 if (trim_sg && pre_n_elem)
3372 pre_n_elem--;
3373
3374 if (!pre_n_elem) {
3375 n_elem = 0;
3376 goto skip_map;
3377 }
3378
3379 dir = qc->dma_dir;
3380 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3381 if (n_elem < 1) {
3382 /* restore last sg */
3383 lsg->length += qc->pad_len;
3384 return -1;
3385 }
3386
3387 DPRINTK("%d sg elements mapped\n", n_elem);
3388
3389 skip_map:
3390 qc->n_elem = n_elem;
3391
3392 return 0;
3393 }
3394
3395 /**
3396 * ata_poll_qc_complete - turn irq back on and finish qc
3397 * @qc: Command to complete
3398 * @err_mask: ATA status register content
3399 *
3400 * LOCKING:
3401 * None. (grabs host lock)
3402 */
3403
3404 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
3405 {
3406 struct ata_port *ap = qc->ap;
3407 unsigned long flags;
3408
3409 spin_lock_irqsave(&ap->host_set->lock, flags);
3410 ap->flags &= ~ATA_FLAG_NOINTR;
3411 ata_irq_on(ap);
3412 ata_qc_complete(qc);
3413 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3414 }
3415
3416 /**
3417 * ata_pio_poll - poll using PIO, depending on current state
3418 * @qc: qc in progress
3419 *
3420 * LOCKING:
3421 * None. (executing in kernel thread context)
3422 *
3423 * RETURNS:
3424 * timeout value to use
3425 */
3426 static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
3427 {
3428 struct ata_port *ap = qc->ap;
3429 u8 status;
3430 unsigned int poll_state = HSM_ST_UNKNOWN;
3431 unsigned int reg_state = HSM_ST_UNKNOWN;
3432
3433 switch (ap->hsm_task_state) {
3434 case HSM_ST:
3435 case HSM_ST_POLL:
3436 poll_state = HSM_ST_POLL;
3437 reg_state = HSM_ST;
3438 break;
3439 case HSM_ST_LAST:
3440 case HSM_ST_LAST_POLL:
3441 poll_state = HSM_ST_LAST_POLL;
3442 reg_state = HSM_ST_LAST;
3443 break;
3444 default:
3445 BUG();
3446 break;
3447 }
3448
3449 status = ata_chk_status(ap);
3450 if (status & ATA_BUSY) {
3451 if (time_after(jiffies, ap->pio_task_timeout)) {
3452 qc->err_mask |= AC_ERR_TIMEOUT;
3453 ap->hsm_task_state = HSM_ST_TMOUT;
3454 return 0;
3455 }
3456 ap->hsm_task_state = poll_state;
3457 return ATA_SHORT_PAUSE;
3458 }
3459
3460 ap->hsm_task_state = reg_state;
3461 return 0;
3462 }
3463
3464 /**
3465 * ata_pio_complete - check if drive is busy or idle
3466 * @qc: qc to complete
3467 *
3468 * LOCKING:
3469 * None. (executing in kernel thread context)
3470 *
3471 * RETURNS:
3472 * Non-zero if qc completed, zero otherwise.
3473 */
3474 static int ata_pio_complete(struct ata_queued_cmd *qc)
3475 {
3476 struct ata_port *ap = qc->ap;
3477 u8 drv_stat;
3478
3479 /*
3480 * This is purely heuristic. This is a fast path. Sometimes when
3481 * we enter, BSY will be cleared in a chk-status or two. If not,
3482 * the drive is probably seeking or something. Snooze for a couple
3483 * msecs, then chk-status again. If still busy, fall back to
3484 * HSM_ST_POLL state.
3485 */
3486 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3487 if (drv_stat & ATA_BUSY) {
3488 msleep(2);
3489 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3490 if (drv_stat & ATA_BUSY) {
3491 ap->hsm_task_state = HSM_ST_LAST_POLL;
3492 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3493 return 0;
3494 }
3495 }
3496
3497 drv_stat = ata_wait_idle(ap);
3498 if (!ata_ok(drv_stat)) {
3499 qc->err_mask |= __ac_err_mask(drv_stat);
3500 ap->hsm_task_state = HSM_ST_ERR;
3501 return 0;
3502 }
3503
3504 ap->hsm_task_state = HSM_ST_IDLE;
3505
3506 WARN_ON(qc->err_mask);
3507 ata_poll_qc_complete(qc);
3508
3509 /* another command may start at this point */
3510
3511 return 1;
3512 }
3513
3514
3515 /**
3516 * swap_buf_le16 - swap halves of 16-bit words in place
3517 * @buf: Buffer to swap
3518 * @buf_words: Number of 16-bit words in buffer.
3519 *
3520 * Swap halves of 16-bit words if needed to convert from
3521 * little-endian byte order to native cpu byte order, or
3522 * vice-versa.
3523 *
3524 * LOCKING:
3525 * Inherited from caller.
3526 */
3527 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3528 {
3529 #ifdef __BIG_ENDIAN
3530 unsigned int i;
3531
3532 for (i = 0; i < buf_words; i++)
3533 buf[i] = le16_to_cpu(buf[i]);
3534 #endif /* __BIG_ENDIAN */
3535 }
3536
3537 /**
3538 * ata_mmio_data_xfer - Transfer data by MMIO
3539 * @ap: port to read/write
3540 * @buf: data buffer
3541 * @buflen: buffer length
3542 * @write_data: read/write
3543 *
3544 * Transfer data from/to the device data register by MMIO.
3545 *
3546 * LOCKING:
3547 * Inherited from caller.
3548 */
3549
3550 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3551 unsigned int buflen, int write_data)
3552 {
3553 unsigned int i;
3554 unsigned int words = buflen >> 1;
3555 u16 *buf16 = (u16 *) buf;
3556 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3557
3558 /* Transfer multiple of 2 bytes */
3559 if (write_data) {
3560 for (i = 0; i < words; i++)
3561 writew(le16_to_cpu(buf16[i]), mmio);
3562 } else {
3563 for (i = 0; i < words; i++)
3564 buf16[i] = cpu_to_le16(readw(mmio));
3565 }
3566
3567 /* Transfer trailing 1 byte, if any. */
3568 if (unlikely(buflen & 0x01)) {
3569 u16 align_buf[1] = { 0 };
3570 unsigned char *trailing_buf = buf + buflen - 1;
3571
3572 if (write_data) {
3573 memcpy(align_buf, trailing_buf, 1);
3574 writew(le16_to_cpu(align_buf[0]), mmio);
3575 } else {
3576 align_buf[0] = cpu_to_le16(readw(mmio));
3577 memcpy(trailing_buf, align_buf, 1);
3578 }
3579 }
3580 }
3581
3582 /**
3583 * ata_pio_data_xfer - Transfer data by PIO
3584 * @ap: port to read/write
3585 * @buf: data buffer
3586 * @buflen: buffer length
3587 * @write_data: read/write
3588 *
3589 * Transfer data from/to the device data register by PIO.
3590 *
3591 * LOCKING:
3592 * Inherited from caller.
3593 */
3594
3595 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3596 unsigned int buflen, int write_data)
3597 {
3598 unsigned int words = buflen >> 1;
3599
3600 /* Transfer multiple of 2 bytes */
3601 if (write_data)
3602 outsw(ap->ioaddr.data_addr, buf, words);
3603 else
3604 insw(ap->ioaddr.data_addr, buf, words);
3605
3606 /* Transfer trailing 1 byte, if any. */
3607 if (unlikely(buflen & 0x01)) {
3608 u16 align_buf[1] = { 0 };
3609 unsigned char *trailing_buf = buf + buflen - 1;
3610
3611 if (write_data) {
3612 memcpy(align_buf, trailing_buf, 1);
3613 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3614 } else {
3615 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3616 memcpy(trailing_buf, align_buf, 1);
3617 }
3618 }
3619 }
3620
3621 /**
3622 * ata_data_xfer - Transfer data from/to the data register.
3623 * @ap: port to read/write
3624 * @buf: data buffer
3625 * @buflen: buffer length
3626 * @do_write: read/write
3627 *
3628 * Transfer data from/to the device data register.
3629 *
3630 * LOCKING:
3631 * Inherited from caller.
3632 */
3633
3634 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3635 unsigned int buflen, int do_write)
3636 {
3637 /* Make the crap hardware pay the costs not the good stuff */
3638 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3639 unsigned long flags;
3640 local_irq_save(flags);
3641 if (ap->flags & ATA_FLAG_MMIO)
3642 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3643 else
3644 ata_pio_data_xfer(ap, buf, buflen, do_write);
3645 local_irq_restore(flags);
3646 } else {
3647 if (ap->flags & ATA_FLAG_MMIO)
3648 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3649 else
3650 ata_pio_data_xfer(ap, buf, buflen, do_write);
3651 }
3652 }
3653
3654 /**
3655 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3656 * @qc: Command on going
3657 *
3658 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3659 *
3660 * LOCKING:
3661 * Inherited from caller.
3662 */
3663
3664 static void ata_pio_sector(struct ata_queued_cmd *qc)
3665 {
3666 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3667 struct scatterlist *sg = qc->__sg;
3668 struct ata_port *ap = qc->ap;
3669 struct page *page;
3670 unsigned int offset;
3671 unsigned char *buf;
3672
3673 if (qc->cursect == (qc->nsect - 1))
3674 ap->hsm_task_state = HSM_ST_LAST;
3675
3676 page = sg[qc->cursg].page;
3677 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3678
3679 /* get the current page and offset */
3680 page = nth_page(page, (offset >> PAGE_SHIFT));
3681 offset %= PAGE_SIZE;
3682
3683 buf = kmap(page) + offset;
3684
3685 qc->cursect++;
3686 qc->cursg_ofs++;
3687
3688 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3689 qc->cursg++;
3690 qc->cursg_ofs = 0;
3691 }
3692
3693 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3694
3695 /* do the actual data transfer */
3696 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3697 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3698
3699 kunmap(page);
3700 }
3701
3702 /**
3703 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3704 * @qc: Command on going
3705 * @bytes: number of bytes
3706 *
3707 * Transfer Transfer data from/to the ATAPI device.
3708 *
3709 * LOCKING:
3710 * Inherited from caller.
3711 *
3712 */
3713
3714 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3715 {
3716 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3717 struct scatterlist *sg = qc->__sg;
3718 struct ata_port *ap = qc->ap;
3719 struct page *page;
3720 unsigned char *buf;
3721 unsigned int offset, count;
3722
3723 if (qc->curbytes + bytes >= qc->nbytes)
3724 ap->hsm_task_state = HSM_ST_LAST;
3725
3726 next_sg:
3727 if (unlikely(qc->cursg >= qc->n_elem)) {
3728 /*
3729 * The end of qc->sg is reached and the device expects
3730 * more data to transfer. In order not to overrun qc->sg
3731 * and fulfill length specified in the byte count register,
3732 * - for read case, discard trailing data from the device
3733 * - for write case, padding zero data to the device
3734 */
3735 u16 pad_buf[1] = { 0 };
3736 unsigned int words = bytes >> 1;
3737 unsigned int i;
3738
3739 if (words) /* warning if bytes > 1 */
3740 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3741 ap->id, bytes);
3742
3743 for (i = 0; i < words; i++)
3744 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3745
3746 ap->hsm_task_state = HSM_ST_LAST;
3747 return;
3748 }
3749
3750 sg = &qc->__sg[qc->cursg];
3751
3752 page = sg->page;
3753 offset = sg->offset + qc->cursg_ofs;
3754
3755 /* get the current page and offset */
3756 page = nth_page(page, (offset >> PAGE_SHIFT));
3757 offset %= PAGE_SIZE;
3758
3759 /* don't overrun current sg */
3760 count = min(sg->length - qc->cursg_ofs, bytes);
3761
3762 /* don't cross page boundaries */
3763 count = min(count, (unsigned int)PAGE_SIZE - offset);
3764
3765 buf = kmap(page) + offset;
3766
3767 bytes -= count;
3768 qc->curbytes += count;
3769 qc->cursg_ofs += count;
3770
3771 if (qc->cursg_ofs == sg->length) {
3772 qc->cursg++;
3773 qc->cursg_ofs = 0;
3774 }
3775
3776 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3777
3778 /* do the actual data transfer */
3779 ata_data_xfer(ap, buf, count, do_write);
3780
3781 kunmap(page);
3782
3783 if (bytes)
3784 goto next_sg;
3785 }
3786
3787 /**
3788 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3789 * @qc: Command on going
3790 *
3791 * Transfer Transfer data from/to the ATAPI device.
3792 *
3793 * LOCKING:
3794 * Inherited from caller.
3795 */
3796
3797 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3798 {
3799 struct ata_port *ap = qc->ap;
3800 struct ata_device *dev = qc->dev;
3801 unsigned int ireason, bc_lo, bc_hi, bytes;
3802 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3803
3804 ap->ops->tf_read(ap, &qc->tf);
3805 ireason = qc->tf.nsect;
3806 bc_lo = qc->tf.lbam;
3807 bc_hi = qc->tf.lbah;
3808 bytes = (bc_hi << 8) | bc_lo;
3809
3810 /* shall be cleared to zero, indicating xfer of data */
3811 if (ireason & (1 << 0))
3812 goto err_out;
3813
3814 /* make sure transfer direction matches expected */
3815 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3816 if (do_write != i_write)
3817 goto err_out;
3818
3819 __atapi_pio_bytes(qc, bytes);
3820
3821 return;
3822
3823 err_out:
3824 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3825 ap->id, dev->devno);
3826 qc->err_mask |= AC_ERR_HSM;
3827 ap->hsm_task_state = HSM_ST_ERR;
3828 }
3829
3830 /**
3831 * ata_pio_block - start PIO on a block
3832 * @qc: qc to transfer block for
3833 *
3834 * LOCKING:
3835 * None. (executing in kernel thread context)
3836 */
3837 static void ata_pio_block(struct ata_queued_cmd *qc)
3838 {
3839 struct ata_port *ap = qc->ap;
3840 u8 status;
3841
3842 /*
3843 * This is purely heuristic. This is a fast path.
3844 * Sometimes when we enter, BSY will be cleared in
3845 * a chk-status or two. If not, the drive is probably seeking
3846 * or something. Snooze for a couple msecs, then
3847 * chk-status again. If still busy, fall back to
3848 * HSM_ST_POLL state.
3849 */
3850 status = ata_busy_wait(ap, ATA_BUSY, 5);
3851 if (status & ATA_BUSY) {
3852 msleep(2);
3853 status = ata_busy_wait(ap, ATA_BUSY, 10);
3854 if (status & ATA_BUSY) {
3855 ap->hsm_task_state = HSM_ST_POLL;
3856 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3857 return;
3858 }
3859 }
3860
3861 /* check error */
3862 if (status & (ATA_ERR | ATA_DF)) {
3863 qc->err_mask |= AC_ERR_DEV;
3864 ap->hsm_task_state = HSM_ST_ERR;
3865 return;
3866 }
3867
3868 /* transfer data if any */
3869 if (is_atapi_taskfile(&qc->tf)) {
3870 /* DRQ=0 means no more data to transfer */
3871 if ((status & ATA_DRQ) == 0) {
3872 ap->hsm_task_state = HSM_ST_LAST;
3873 return;
3874 }
3875
3876 atapi_pio_bytes(qc);
3877 } else {
3878 /* handle BSY=0, DRQ=0 as error */
3879 if ((status & ATA_DRQ) == 0) {
3880 qc->err_mask |= AC_ERR_HSM;
3881 ap->hsm_task_state = HSM_ST_ERR;
3882 return;
3883 }
3884
3885 ata_pio_sector(qc);
3886 }
3887 }
3888
3889 static void ata_pio_error(struct ata_queued_cmd *qc)
3890 {
3891 struct ata_port *ap = qc->ap;
3892
3893 if (qc->tf.command != ATA_CMD_PACKET)
3894 printk(KERN_WARNING "ata%u: dev %u PIO error\n",
3895 ap->id, qc->dev->devno);
3896
3897 /* make sure qc->err_mask is available to
3898 * know what's wrong and recover
3899 */
3900 WARN_ON(qc->err_mask == 0);
3901
3902 ap->hsm_task_state = HSM_ST_IDLE;
3903
3904 ata_poll_qc_complete(qc);
3905 }
3906
3907 static void ata_pio_task(void *_data)
3908 {
3909 struct ata_queued_cmd *qc = _data;
3910 struct ata_port *ap = qc->ap;
3911 unsigned long timeout;
3912 int qc_completed;
3913
3914 fsm_start:
3915 timeout = 0;
3916 qc_completed = 0;
3917
3918 switch (ap->hsm_task_state) {
3919 case HSM_ST_IDLE:
3920 return;
3921
3922 case HSM_ST:
3923 ata_pio_block(qc);
3924 break;
3925
3926 case HSM_ST_LAST:
3927 qc_completed = ata_pio_complete(qc);
3928 break;
3929
3930 case HSM_ST_POLL:
3931 case HSM_ST_LAST_POLL:
3932 timeout = ata_pio_poll(qc);
3933 break;
3934
3935 case HSM_ST_TMOUT:
3936 case HSM_ST_ERR:
3937 ata_pio_error(qc);
3938 return;
3939 }
3940
3941 if (timeout)
3942 ata_port_queue_task(ap, ata_pio_task, qc, timeout);
3943 else if (!qc_completed)
3944 goto fsm_start;
3945 }
3946
3947 /**
3948 * atapi_packet_task - Write CDB bytes to hardware
3949 * @_data: qc in progress
3950 *
3951 * When device has indicated its readiness to accept
3952 * a CDB, this function is called. Send the CDB.
3953 * If DMA is to be performed, exit immediately.
3954 * Otherwise, we are in polling mode, so poll
3955 * status under operation succeeds or fails.
3956 *
3957 * LOCKING:
3958 * Kernel thread context (may sleep)
3959 */
3960 static void atapi_packet_task(void *_data)
3961 {
3962 struct ata_queued_cmd *qc = _data;
3963 struct ata_port *ap = qc->ap;
3964 u8 status;
3965
3966 /* sleep-wait for BSY to clear */
3967 DPRINTK("busy wait\n");
3968 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3969 qc->err_mask |= AC_ERR_TIMEOUT;
3970 goto err_out;
3971 }
3972
3973 /* make sure DRQ is set */
3974 status = ata_chk_status(ap);
3975 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3976 qc->err_mask |= AC_ERR_HSM;
3977 goto err_out;
3978 }
3979
3980 /* send SCSI cdb */
3981 DPRINTK("send cdb\n");
3982 WARN_ON(qc->dev->cdb_len < 12);
3983
3984 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3985 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3986 unsigned long flags;
3987
3988 /* Once we're done issuing command and kicking bmdma,
3989 * irq handler takes over. To not lose irq, we need
3990 * to clear NOINTR flag before sending cdb, but
3991 * interrupt handler shouldn't be invoked before we're
3992 * finished. Hence, the following locking.
3993 */
3994 spin_lock_irqsave(&ap->host_set->lock, flags);
3995 ap->flags &= ~ATA_FLAG_NOINTR;
3996 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3997 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3998 ap->ops->bmdma_start(qc); /* initiate bmdma */
3999 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4000 } else {
4001 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4002
4003 /* PIO commands are handled by polling */
4004 ap->hsm_task_state = HSM_ST;
4005 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4006 }
4007
4008 return;
4009
4010 err_out:
4011 ata_poll_qc_complete(qc);
4012 }
4013
4014 /**
4015 * ata_qc_new - Request an available ATA command, for queueing
4016 * @ap: Port associated with device @dev
4017 * @dev: Device from whom we request an available command structure
4018 *
4019 * LOCKING:
4020 * None.
4021 */
4022
4023 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4024 {
4025 struct ata_queued_cmd *qc = NULL;
4026 unsigned int i;
4027
4028 for (i = 0; i < ATA_MAX_QUEUE; i++)
4029 if (!test_and_set_bit(i, &ap->qactive)) {
4030 qc = ata_qc_from_tag(ap, i);
4031 break;
4032 }
4033
4034 if (qc)
4035 qc->tag = i;
4036
4037 return qc;
4038 }
4039
4040 /**
4041 * ata_qc_new_init - Request an available ATA command, and initialize it
4042 * @ap: Port associated with device @dev
4043 * @dev: Device from whom we request an available command structure
4044 *
4045 * LOCKING:
4046 * None.
4047 */
4048
4049 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4050 struct ata_device *dev)
4051 {
4052 struct ata_queued_cmd *qc;
4053
4054 qc = ata_qc_new(ap);
4055 if (qc) {
4056 qc->scsicmd = NULL;
4057 qc->ap = ap;
4058 qc->dev = dev;
4059
4060 ata_qc_reinit(qc);
4061 }
4062
4063 return qc;
4064 }
4065
4066 /**
4067 * ata_qc_free - free unused ata_queued_cmd
4068 * @qc: Command to complete
4069 *
4070 * Designed to free unused ata_queued_cmd object
4071 * in case something prevents using it.
4072 *
4073 * LOCKING:
4074 * spin_lock_irqsave(host_set lock)
4075 */
4076 void ata_qc_free(struct ata_queued_cmd *qc)
4077 {
4078 struct ata_port *ap = qc->ap;
4079 unsigned int tag;
4080
4081 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4082
4083 qc->flags = 0;
4084 tag = qc->tag;
4085 if (likely(ata_tag_valid(tag))) {
4086 qc->tag = ATA_TAG_POISON;
4087 clear_bit(tag, &ap->qactive);
4088 }
4089 }
4090
4091 void __ata_qc_complete(struct ata_queued_cmd *qc)
4092 {
4093 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4094 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4095
4096 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4097 ata_sg_clean(qc);
4098
4099 /* command should be marked inactive atomically with qc completion */
4100 qc->ap->active_tag = ATA_TAG_POISON;
4101
4102 /* atapi: mark qc as inactive to prevent the interrupt handler
4103 * from completing the command twice later, before the error handler
4104 * is called. (when rc != 0 and atapi request sense is needed)
4105 */
4106 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4107
4108 /* call completion callback */
4109 qc->complete_fn(qc);
4110 }
4111
4112 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4113 {
4114 struct ata_port *ap = qc->ap;
4115
4116 switch (qc->tf.protocol) {
4117 case ATA_PROT_DMA:
4118 case ATA_PROT_ATAPI_DMA:
4119 return 1;
4120
4121 case ATA_PROT_ATAPI:
4122 case ATA_PROT_PIO:
4123 if (ap->flags & ATA_FLAG_PIO_DMA)
4124 return 1;
4125
4126 /* fall through */
4127
4128 default:
4129 return 0;
4130 }
4131
4132 /* never reached */
4133 }
4134
4135 /**
4136 * ata_qc_issue - issue taskfile to device
4137 * @qc: command to issue to device
4138 *
4139 * Prepare an ATA command to submission to device.
4140 * This includes mapping the data into a DMA-able
4141 * area, filling in the S/G table, and finally
4142 * writing the taskfile to hardware, starting the command.
4143 *
4144 * LOCKING:
4145 * spin_lock_irqsave(host_set lock)
4146 */
4147 void ata_qc_issue(struct ata_queued_cmd *qc)
4148 {
4149 struct ata_port *ap = qc->ap;
4150
4151 qc->ap->active_tag = qc->tag;
4152 qc->flags |= ATA_QCFLAG_ACTIVE;
4153
4154 if (ata_should_dma_map(qc)) {
4155 if (qc->flags & ATA_QCFLAG_SG) {
4156 if (ata_sg_setup(qc))
4157 goto sg_err;
4158 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4159 if (ata_sg_setup_one(qc))
4160 goto sg_err;
4161 }
4162 } else {
4163 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4164 }
4165
4166 ap->ops->qc_prep(qc);
4167
4168 qc->err_mask |= ap->ops->qc_issue(qc);
4169 if (unlikely(qc->err_mask))
4170 goto err;
4171 return;
4172
4173 sg_err:
4174 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4175 qc->err_mask |= AC_ERR_SYSTEM;
4176 err:
4177 ata_qc_complete(qc);
4178 }
4179
4180 /**
4181 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4182 * @qc: command to issue to device
4183 *
4184 * Using various libata functions and hooks, this function
4185 * starts an ATA command. ATA commands are grouped into
4186 * classes called "protocols", and issuing each type of protocol
4187 * is slightly different.
4188 *
4189 * May be used as the qc_issue() entry in ata_port_operations.
4190 *
4191 * LOCKING:
4192 * spin_lock_irqsave(host_set lock)
4193 *
4194 * RETURNS:
4195 * Zero on success, AC_ERR_* mask on failure
4196 */
4197
4198 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4199 {
4200 struct ata_port *ap = qc->ap;
4201
4202 ata_dev_select(ap, qc->dev->devno, 1, 0);
4203
4204 switch (qc->tf.protocol) {
4205 case ATA_PROT_NODATA:
4206 ata_tf_to_host(ap, &qc->tf);
4207 break;
4208
4209 case ATA_PROT_DMA:
4210 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4211 ap->ops->bmdma_setup(qc); /* set up bmdma */
4212 ap->ops->bmdma_start(qc); /* initiate bmdma */
4213 break;
4214
4215 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4216 ata_qc_set_polling(qc);
4217 ata_tf_to_host(ap, &qc->tf);
4218 ap->hsm_task_state = HSM_ST;
4219 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4220 break;
4221
4222 case ATA_PROT_ATAPI:
4223 ata_qc_set_polling(qc);
4224 ata_tf_to_host(ap, &qc->tf);
4225 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4226 break;
4227
4228 case ATA_PROT_ATAPI_NODATA:
4229 ap->flags |= ATA_FLAG_NOINTR;
4230 ata_tf_to_host(ap, &qc->tf);
4231 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4232 break;
4233
4234 case ATA_PROT_ATAPI_DMA:
4235 ap->flags |= ATA_FLAG_NOINTR;
4236 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4237 ap->ops->bmdma_setup(qc); /* set up bmdma */
4238 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4239 break;
4240
4241 default:
4242 WARN_ON(1);
4243 return AC_ERR_SYSTEM;
4244 }
4245
4246 return 0;
4247 }
4248
4249 /**
4250 * ata_host_intr - Handle host interrupt for given (port, task)
4251 * @ap: Port on which interrupt arrived (possibly...)
4252 * @qc: Taskfile currently active in engine
4253 *
4254 * Handle host interrupt for given queued command. Currently,
4255 * only DMA interrupts are handled. All other commands are
4256 * handled via polling with interrupts disabled (nIEN bit).
4257 *
4258 * LOCKING:
4259 * spin_lock_irqsave(host_set lock)
4260 *
4261 * RETURNS:
4262 * One if interrupt was handled, zero if not (shared irq).
4263 */
4264
4265 inline unsigned int ata_host_intr (struct ata_port *ap,
4266 struct ata_queued_cmd *qc)
4267 {
4268 u8 status, host_stat;
4269
4270 switch (qc->tf.protocol) {
4271
4272 case ATA_PROT_DMA:
4273 case ATA_PROT_ATAPI_DMA:
4274 case ATA_PROT_ATAPI:
4275 /* check status of DMA engine */
4276 host_stat = ap->ops->bmdma_status(ap);
4277 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4278
4279 /* if it's not our irq... */
4280 if (!(host_stat & ATA_DMA_INTR))
4281 goto idle_irq;
4282
4283 /* before we do anything else, clear DMA-Start bit */
4284 ap->ops->bmdma_stop(qc);
4285
4286 /* fall through */
4287
4288 case ATA_PROT_ATAPI_NODATA:
4289 case ATA_PROT_NODATA:
4290 /* check altstatus */
4291 status = ata_altstatus(ap);
4292 if (status & ATA_BUSY)
4293 goto idle_irq;
4294
4295 /* check main status, clearing INTRQ */
4296 status = ata_chk_status(ap);
4297 if (unlikely(status & ATA_BUSY))
4298 goto idle_irq;
4299 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4300 ap->id, qc->tf.protocol, status);
4301
4302 /* ack bmdma irq events */
4303 ap->ops->irq_clear(ap);
4304
4305 /* complete taskfile transaction */
4306 qc->err_mask |= ac_err_mask(status);
4307 ata_qc_complete(qc);
4308 break;
4309
4310 default:
4311 goto idle_irq;
4312 }
4313
4314 return 1; /* irq handled */
4315
4316 idle_irq:
4317 ap->stats.idle_irq++;
4318
4319 #ifdef ATA_IRQ_TRAP
4320 if ((ap->stats.idle_irq % 1000) == 0) {
4321 ata_irq_ack(ap, 0); /* debug trap */
4322 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4323 return 1;
4324 }
4325 #endif
4326 return 0; /* irq not handled */
4327 }
4328
4329 /**
4330 * ata_interrupt - Default ATA host interrupt handler
4331 * @irq: irq line (unused)
4332 * @dev_instance: pointer to our ata_host_set information structure
4333 * @regs: unused
4334 *
4335 * Default interrupt handler for PCI IDE devices. Calls
4336 * ata_host_intr() for each port that is not disabled.
4337 *
4338 * LOCKING:
4339 * Obtains host_set lock during operation.
4340 *
4341 * RETURNS:
4342 * IRQ_NONE or IRQ_HANDLED.
4343 */
4344
4345 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4346 {
4347 struct ata_host_set *host_set = dev_instance;
4348 unsigned int i;
4349 unsigned int handled = 0;
4350 unsigned long flags;
4351
4352 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4353 spin_lock_irqsave(&host_set->lock, flags);
4354
4355 for (i = 0; i < host_set->n_ports; i++) {
4356 struct ata_port *ap;
4357
4358 ap = host_set->ports[i];
4359 if (ap &&
4360 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
4361 struct ata_queued_cmd *qc;
4362
4363 qc = ata_qc_from_tag(ap, ap->active_tag);
4364 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4365 (qc->flags & ATA_QCFLAG_ACTIVE))
4366 handled |= ata_host_intr(ap, qc);
4367 }
4368 }
4369
4370 spin_unlock_irqrestore(&host_set->lock, flags);
4371
4372 return IRQ_RETVAL(handled);
4373 }
4374
4375
4376 /*
4377 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4378 * without filling any other registers
4379 */
4380 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4381 u8 cmd)
4382 {
4383 struct ata_taskfile tf;
4384 int err;
4385
4386 ata_tf_init(ap, &tf, dev->devno);
4387
4388 tf.command = cmd;
4389 tf.flags |= ATA_TFLAG_DEVICE;
4390 tf.protocol = ATA_PROT_NODATA;
4391
4392 err = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
4393 if (err)
4394 printk(KERN_ERR "%s: ata command failed: %d\n",
4395 __FUNCTION__, err);
4396
4397 return err;
4398 }
4399
4400 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4401 {
4402 u8 cmd;
4403
4404 if (!ata_try_flush_cache(dev))
4405 return 0;
4406
4407 if (ata_id_has_flush_ext(dev->id))
4408 cmd = ATA_CMD_FLUSH_EXT;
4409 else
4410 cmd = ATA_CMD_FLUSH;
4411
4412 return ata_do_simple_cmd(ap, dev, cmd);
4413 }
4414
4415 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4416 {
4417 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4418 }
4419
4420 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4421 {
4422 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4423 }
4424
4425 /**
4426 * ata_device_resume - wakeup a previously suspended devices
4427 * @ap: port the device is connected to
4428 * @dev: the device to resume
4429 *
4430 * Kick the drive back into action, by sending it an idle immediate
4431 * command and making sure its transfer mode matches between drive
4432 * and host.
4433 *
4434 */
4435 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4436 {
4437 if (ap->flags & ATA_FLAG_SUSPENDED) {
4438 struct ata_device *failed_dev;
4439 ap->flags &= ~ATA_FLAG_SUSPENDED;
4440 while (ata_set_mode(ap, &failed_dev))
4441 ata_dev_disable(ap, failed_dev);
4442 }
4443 if (!ata_dev_enabled(dev))
4444 return 0;
4445 if (dev->class == ATA_DEV_ATA)
4446 ata_start_drive(ap, dev);
4447
4448 return 0;
4449 }
4450
4451 /**
4452 * ata_device_suspend - prepare a device for suspend
4453 * @ap: port the device is connected to
4454 * @dev: the device to suspend
4455 *
4456 * Flush the cache on the drive, if appropriate, then issue a
4457 * standbynow command.
4458 */
4459 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
4460 {
4461 if (!ata_dev_enabled(dev))
4462 return 0;
4463 if (dev->class == ATA_DEV_ATA)
4464 ata_flush_cache(ap, dev);
4465
4466 if (state.event != PM_EVENT_FREEZE)
4467 ata_standby_drive(ap, dev);
4468 ap->flags |= ATA_FLAG_SUSPENDED;
4469 return 0;
4470 }
4471
4472 /**
4473 * ata_port_start - Set port up for dma.
4474 * @ap: Port to initialize
4475 *
4476 * Called just after data structures for each port are
4477 * initialized. Allocates space for PRD table.
4478 *
4479 * May be used as the port_start() entry in ata_port_operations.
4480 *
4481 * LOCKING:
4482 * Inherited from caller.
4483 */
4484
4485 int ata_port_start (struct ata_port *ap)
4486 {
4487 struct device *dev = ap->dev;
4488 int rc;
4489
4490 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4491 if (!ap->prd)
4492 return -ENOMEM;
4493
4494 rc = ata_pad_alloc(ap, dev);
4495 if (rc) {
4496 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4497 return rc;
4498 }
4499
4500 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4501
4502 return 0;
4503 }
4504
4505
4506 /**
4507 * ata_port_stop - Undo ata_port_start()
4508 * @ap: Port to shut down
4509 *
4510 * Frees the PRD table.
4511 *
4512 * May be used as the port_stop() entry in ata_port_operations.
4513 *
4514 * LOCKING:
4515 * Inherited from caller.
4516 */
4517
4518 void ata_port_stop (struct ata_port *ap)
4519 {
4520 struct device *dev = ap->dev;
4521
4522 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4523 ata_pad_free(ap, dev);
4524 }
4525
4526 void ata_host_stop (struct ata_host_set *host_set)
4527 {
4528 if (host_set->mmio_base)
4529 iounmap(host_set->mmio_base);
4530 }
4531
4532
4533 /**
4534 * ata_host_remove - Unregister SCSI host structure with upper layers
4535 * @ap: Port to unregister
4536 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4537 *
4538 * LOCKING:
4539 * Inherited from caller.
4540 */
4541
4542 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4543 {
4544 struct Scsi_Host *sh = ap->host;
4545
4546 DPRINTK("ENTER\n");
4547
4548 if (do_unregister)
4549 scsi_remove_host(sh);
4550
4551 ap->ops->port_stop(ap);
4552 }
4553
4554 /**
4555 * ata_host_init - Initialize an ata_port structure
4556 * @ap: Structure to initialize
4557 * @host: associated SCSI mid-layer structure
4558 * @host_set: Collection of hosts to which @ap belongs
4559 * @ent: Probe information provided by low-level driver
4560 * @port_no: Port number associated with this ata_port
4561 *
4562 * Initialize a new ata_port structure, and its associated
4563 * scsi_host.
4564 *
4565 * LOCKING:
4566 * Inherited from caller.
4567 */
4568
4569 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4570 struct ata_host_set *host_set,
4571 const struct ata_probe_ent *ent, unsigned int port_no)
4572 {
4573 unsigned int i;
4574
4575 host->max_id = 16;
4576 host->max_lun = 1;
4577 host->max_channel = 1;
4578 host->unique_id = ata_unique_id++;
4579 host->max_cmd_len = 12;
4580
4581 ap->flags = ATA_FLAG_DISABLED;
4582 ap->id = host->unique_id;
4583 ap->host = host;
4584 ap->ctl = ATA_DEVCTL_OBS;
4585 ap->host_set = host_set;
4586 ap->dev = ent->dev;
4587 ap->port_no = port_no;
4588 ap->hard_port_no =
4589 ent->legacy_mode ? ent->hard_port_no : port_no;
4590 ap->pio_mask = ent->pio_mask;
4591 ap->mwdma_mask = ent->mwdma_mask;
4592 ap->udma_mask = ent->udma_mask;
4593 ap->flags |= ent->host_flags;
4594 ap->ops = ent->port_ops;
4595 ap->cbl = ATA_CBL_NONE;
4596 ap->sata_spd_limit = UINT_MAX;
4597 ap->active_tag = ATA_TAG_POISON;
4598 ap->last_ctl = 0xFF;
4599
4600 INIT_WORK(&ap->port_task, NULL, NULL);
4601 INIT_LIST_HEAD(&ap->eh_done_q);
4602
4603 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4604 struct ata_device *dev = &ap->device[i];
4605 dev->devno = i;
4606 dev->pio_mask = UINT_MAX;
4607 dev->mwdma_mask = UINT_MAX;
4608 dev->udma_mask = UINT_MAX;
4609 }
4610
4611 #ifdef ATA_IRQ_TRAP
4612 ap->stats.unhandled_irq = 1;
4613 ap->stats.idle_irq = 1;
4614 #endif
4615
4616 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4617 }
4618
4619 /**
4620 * ata_host_add - Attach low-level ATA driver to system
4621 * @ent: Information provided by low-level driver
4622 * @host_set: Collections of ports to which we add
4623 * @port_no: Port number associated with this host
4624 *
4625 * Attach low-level ATA driver to system.
4626 *
4627 * LOCKING:
4628 * PCI/etc. bus probe sem.
4629 *
4630 * RETURNS:
4631 * New ata_port on success, for NULL on error.
4632 */
4633
4634 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4635 struct ata_host_set *host_set,
4636 unsigned int port_no)
4637 {
4638 struct Scsi_Host *host;
4639 struct ata_port *ap;
4640 int rc;
4641
4642 DPRINTK("ENTER\n");
4643
4644 if (!ent->port_ops->probe_reset &&
4645 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4646 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4647 port_no);
4648 return NULL;
4649 }
4650
4651 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4652 if (!host)
4653 return NULL;
4654
4655 host->transportt = &ata_scsi_transport_template;
4656
4657 ap = ata_shost_to_port(host);
4658
4659 ata_host_init(ap, host, host_set, ent, port_no);
4660
4661 rc = ap->ops->port_start(ap);
4662 if (rc)
4663 goto err_out;
4664
4665 return ap;
4666
4667 err_out:
4668 scsi_host_put(host);
4669 return NULL;
4670 }
4671
4672 /**
4673 * ata_device_add - Register hardware device with ATA and SCSI layers
4674 * @ent: Probe information describing hardware device to be registered
4675 *
4676 * This function processes the information provided in the probe
4677 * information struct @ent, allocates the necessary ATA and SCSI
4678 * host information structures, initializes them, and registers
4679 * everything with requisite kernel subsystems.
4680 *
4681 * This function requests irqs, probes the ATA bus, and probes
4682 * the SCSI bus.
4683 *
4684 * LOCKING:
4685 * PCI/etc. bus probe sem.
4686 *
4687 * RETURNS:
4688 * Number of ports registered. Zero on error (no ports registered).
4689 */
4690
4691 int ata_device_add(const struct ata_probe_ent *ent)
4692 {
4693 unsigned int count = 0, i;
4694 struct device *dev = ent->dev;
4695 struct ata_host_set *host_set;
4696
4697 DPRINTK("ENTER\n");
4698 /* alloc a container for our list of ATA ports (buses) */
4699 host_set = kzalloc(sizeof(struct ata_host_set) +
4700 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4701 if (!host_set)
4702 return 0;
4703 spin_lock_init(&host_set->lock);
4704
4705 host_set->dev = dev;
4706 host_set->n_ports = ent->n_ports;
4707 host_set->irq = ent->irq;
4708 host_set->mmio_base = ent->mmio_base;
4709 host_set->private_data = ent->private_data;
4710 host_set->ops = ent->port_ops;
4711 host_set->flags = ent->host_set_flags;
4712
4713 /* register each port bound to this device */
4714 for (i = 0; i < ent->n_ports; i++) {
4715 struct ata_port *ap;
4716 unsigned long xfer_mode_mask;
4717
4718 ap = ata_host_add(ent, host_set, i);
4719 if (!ap)
4720 goto err_out;
4721
4722 host_set->ports[i] = ap;
4723 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4724 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4725 (ap->pio_mask << ATA_SHIFT_PIO);
4726
4727 /* print per-port info to dmesg */
4728 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4729 "bmdma 0x%lX irq %lu\n",
4730 ap->id,
4731 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4732 ata_mode_string(xfer_mode_mask),
4733 ap->ioaddr.cmd_addr,
4734 ap->ioaddr.ctl_addr,
4735 ap->ioaddr.bmdma_addr,
4736 ent->irq);
4737
4738 ata_chk_status(ap);
4739 host_set->ops->irq_clear(ap);
4740 count++;
4741 }
4742
4743 if (!count)
4744 goto err_free_ret;
4745
4746 /* obtain irq, that is shared between channels */
4747 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4748 DRV_NAME, host_set))
4749 goto err_out;
4750
4751 /* perform each probe synchronously */
4752 DPRINTK("probe begin\n");
4753 for (i = 0; i < count; i++) {
4754 struct ata_port *ap;
4755 int rc;
4756
4757 ap = host_set->ports[i];
4758
4759 DPRINTK("ata%u: bus probe begin\n", ap->id);
4760 rc = ata_bus_probe(ap);
4761 DPRINTK("ata%u: bus probe end\n", ap->id);
4762
4763 if (rc) {
4764 /* FIXME: do something useful here?
4765 * Current libata behavior will
4766 * tear down everything when
4767 * the module is removed
4768 * or the h/w is unplugged.
4769 */
4770 }
4771
4772 rc = scsi_add_host(ap->host, dev);
4773 if (rc) {
4774 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4775 ap->id);
4776 /* FIXME: do something useful here */
4777 /* FIXME: handle unconditional calls to
4778 * scsi_scan_host and ata_host_remove, below,
4779 * at the very least
4780 */
4781 }
4782 }
4783
4784 /* probes are done, now scan each port's disk(s) */
4785 DPRINTK("host probe begin\n");
4786 for (i = 0; i < count; i++) {
4787 struct ata_port *ap = host_set->ports[i];
4788
4789 ata_scsi_scan_host(ap);
4790 }
4791
4792 dev_set_drvdata(dev, host_set);
4793
4794 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4795 return ent->n_ports; /* success */
4796
4797 err_out:
4798 for (i = 0; i < count; i++) {
4799 ata_host_remove(host_set->ports[i], 1);
4800 scsi_host_put(host_set->ports[i]->host);
4801 }
4802 err_free_ret:
4803 kfree(host_set);
4804 VPRINTK("EXIT, returning 0\n");
4805 return 0;
4806 }
4807
4808 /**
4809 * ata_host_set_remove - PCI layer callback for device removal
4810 * @host_set: ATA host set that was removed
4811 *
4812 * Unregister all objects associated with this host set. Free those
4813 * objects.
4814 *
4815 * LOCKING:
4816 * Inherited from calling layer (may sleep).
4817 */
4818
4819 void ata_host_set_remove(struct ata_host_set *host_set)
4820 {
4821 struct ata_port *ap;
4822 unsigned int i;
4823
4824 for (i = 0; i < host_set->n_ports; i++) {
4825 ap = host_set->ports[i];
4826 scsi_remove_host(ap->host);
4827 }
4828
4829 free_irq(host_set->irq, host_set);
4830
4831 for (i = 0; i < host_set->n_ports; i++) {
4832 ap = host_set->ports[i];
4833
4834 ata_scsi_release(ap->host);
4835
4836 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4837 struct ata_ioports *ioaddr = &ap->ioaddr;
4838
4839 if (ioaddr->cmd_addr == 0x1f0)
4840 release_region(0x1f0, 8);
4841 else if (ioaddr->cmd_addr == 0x170)
4842 release_region(0x170, 8);
4843 }
4844
4845 scsi_host_put(ap->host);
4846 }
4847
4848 if (host_set->ops->host_stop)
4849 host_set->ops->host_stop(host_set);
4850
4851 kfree(host_set);
4852 }
4853
4854 /**
4855 * ata_scsi_release - SCSI layer callback hook for host unload
4856 * @host: libata host to be unloaded
4857 *
4858 * Performs all duties necessary to shut down a libata port...
4859 * Kill port kthread, disable port, and release resources.
4860 *
4861 * LOCKING:
4862 * Inherited from SCSI layer.
4863 *
4864 * RETURNS:
4865 * One.
4866 */
4867
4868 int ata_scsi_release(struct Scsi_Host *host)
4869 {
4870 struct ata_port *ap = ata_shost_to_port(host);
4871 int i;
4872
4873 DPRINTK("ENTER\n");
4874
4875 ap->ops->port_disable(ap);
4876 ata_host_remove(ap, 0);
4877 for (i = 0; i < ATA_MAX_DEVICES; i++)
4878 kfree(ap->device[i].id);
4879
4880 DPRINTK("EXIT\n");
4881 return 1;
4882 }
4883
4884 /**
4885 * ata_std_ports - initialize ioaddr with standard port offsets.
4886 * @ioaddr: IO address structure to be initialized
4887 *
4888 * Utility function which initializes data_addr, error_addr,
4889 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4890 * device_addr, status_addr, and command_addr to standard offsets
4891 * relative to cmd_addr.
4892 *
4893 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4894 */
4895
4896 void ata_std_ports(struct ata_ioports *ioaddr)
4897 {
4898 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4899 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4900 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4901 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4902 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4903 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4904 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4905 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4906 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4907 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4908 }
4909
4910
4911 #ifdef CONFIG_PCI
4912
4913 void ata_pci_host_stop (struct ata_host_set *host_set)
4914 {
4915 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4916
4917 pci_iounmap(pdev, host_set->mmio_base);
4918 }
4919
4920 /**
4921 * ata_pci_remove_one - PCI layer callback for device removal
4922 * @pdev: PCI device that was removed
4923 *
4924 * PCI layer indicates to libata via this hook that
4925 * hot-unplug or module unload event has occurred.
4926 * Handle this by unregistering all objects associated
4927 * with this PCI device. Free those objects. Then finally
4928 * release PCI resources and disable device.
4929 *
4930 * LOCKING:
4931 * Inherited from PCI layer (may sleep).
4932 */
4933
4934 void ata_pci_remove_one (struct pci_dev *pdev)
4935 {
4936 struct device *dev = pci_dev_to_dev(pdev);
4937 struct ata_host_set *host_set = dev_get_drvdata(dev);
4938
4939 ata_host_set_remove(host_set);
4940 pci_release_regions(pdev);
4941 pci_disable_device(pdev);
4942 dev_set_drvdata(dev, NULL);
4943 }
4944
4945 /* move to PCI subsystem */
4946 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4947 {
4948 unsigned long tmp = 0;
4949
4950 switch (bits->width) {
4951 case 1: {
4952 u8 tmp8 = 0;
4953 pci_read_config_byte(pdev, bits->reg, &tmp8);
4954 tmp = tmp8;
4955 break;
4956 }
4957 case 2: {
4958 u16 tmp16 = 0;
4959 pci_read_config_word(pdev, bits->reg, &tmp16);
4960 tmp = tmp16;
4961 break;
4962 }
4963 case 4: {
4964 u32 tmp32 = 0;
4965 pci_read_config_dword(pdev, bits->reg, &tmp32);
4966 tmp = tmp32;
4967 break;
4968 }
4969
4970 default:
4971 return -EINVAL;
4972 }
4973
4974 tmp &= bits->mask;
4975
4976 return (tmp == bits->val) ? 1 : 0;
4977 }
4978
4979 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4980 {
4981 pci_save_state(pdev);
4982 pci_disable_device(pdev);
4983 pci_set_power_state(pdev, PCI_D3hot);
4984 return 0;
4985 }
4986
4987 int ata_pci_device_resume(struct pci_dev *pdev)
4988 {
4989 pci_set_power_state(pdev, PCI_D0);
4990 pci_restore_state(pdev);
4991 pci_enable_device(pdev);
4992 pci_set_master(pdev);
4993 return 0;
4994 }
4995 #endif /* CONFIG_PCI */
4996
4997
4998 static int __init ata_init(void)
4999 {
5000 ata_wq = create_workqueue("ata");
5001 if (!ata_wq)
5002 return -ENOMEM;
5003
5004 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5005 return 0;
5006 }
5007
5008 static void __exit ata_exit(void)
5009 {
5010 destroy_workqueue(ata_wq);
5011 }
5012
5013 module_init(ata_init);
5014 module_exit(ata_exit);
5015
5016 static unsigned long ratelimit_time;
5017 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5018
5019 int ata_ratelimit(void)
5020 {
5021 int rc;
5022 unsigned long flags;
5023
5024 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5025
5026 if (time_after(jiffies, ratelimit_time)) {
5027 rc = 1;
5028 ratelimit_time = jiffies + (HZ/5);
5029 } else
5030 rc = 0;
5031
5032 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5033
5034 return rc;
5035 }
5036
5037 /**
5038 * ata_wait_register - wait until register value changes
5039 * @reg: IO-mapped register
5040 * @mask: Mask to apply to read register value
5041 * @val: Wait condition
5042 * @interval_msec: polling interval in milliseconds
5043 * @timeout_msec: timeout in milliseconds
5044 *
5045 * Waiting for some bits of register to change is a common
5046 * operation for ATA controllers. This function reads 32bit LE
5047 * IO-mapped register @reg and tests for the following condition.
5048 *
5049 * (*@reg & mask) != val
5050 *
5051 * If the condition is met, it returns; otherwise, the process is
5052 * repeated after @interval_msec until timeout.
5053 *
5054 * LOCKING:
5055 * Kernel thread context (may sleep)
5056 *
5057 * RETURNS:
5058 * The final register value.
5059 */
5060 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5061 unsigned long interval_msec,
5062 unsigned long timeout_msec)
5063 {
5064 unsigned long timeout;
5065 u32 tmp;
5066
5067 tmp = ioread32(reg);
5068
5069 /* Calculate timeout _after_ the first read to make sure
5070 * preceding writes reach the controller before starting to
5071 * eat away the timeout.
5072 */
5073 timeout = jiffies + (timeout_msec * HZ) / 1000;
5074
5075 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5076 msleep(interval_msec);
5077 tmp = ioread32(reg);
5078 }
5079
5080 return tmp;
5081 }
5082
5083 /*
5084 * libata is essentially a library of internal helper functions for
5085 * low-level ATA host controller drivers. As such, the API/ABI is
5086 * likely to change as new drivers are added and updated.
5087 * Do not depend on ABI/API stability.
5088 */
5089
5090 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5091 EXPORT_SYMBOL_GPL(ata_std_ports);
5092 EXPORT_SYMBOL_GPL(ata_device_add);
5093 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5094 EXPORT_SYMBOL_GPL(ata_sg_init);
5095 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5096 EXPORT_SYMBOL_GPL(__ata_qc_complete);
5097 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5098 EXPORT_SYMBOL_GPL(ata_tf_load);
5099 EXPORT_SYMBOL_GPL(ata_tf_read);
5100 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5101 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5102 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5103 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5104 EXPORT_SYMBOL_GPL(ata_check_status);
5105 EXPORT_SYMBOL_GPL(ata_altstatus);
5106 EXPORT_SYMBOL_GPL(ata_exec_command);
5107 EXPORT_SYMBOL_GPL(ata_port_start);
5108 EXPORT_SYMBOL_GPL(ata_port_stop);
5109 EXPORT_SYMBOL_GPL(ata_host_stop);
5110 EXPORT_SYMBOL_GPL(ata_interrupt);
5111 EXPORT_SYMBOL_GPL(ata_qc_prep);
5112 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5113 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5114 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5115 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5116 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5117 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5118 EXPORT_SYMBOL_GPL(ata_port_probe);
5119 EXPORT_SYMBOL_GPL(sata_set_spd);
5120 EXPORT_SYMBOL_GPL(sata_phy_reset);
5121 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5122 EXPORT_SYMBOL_GPL(ata_bus_reset);
5123 EXPORT_SYMBOL_GPL(ata_std_probeinit);
5124 EXPORT_SYMBOL_GPL(ata_std_softreset);
5125 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5126 EXPORT_SYMBOL_GPL(ata_std_postreset);
5127 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
5128 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
5129 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5130 EXPORT_SYMBOL_GPL(ata_dev_classify);
5131 EXPORT_SYMBOL_GPL(ata_dev_pair);
5132 EXPORT_SYMBOL_GPL(ata_port_disable);
5133 EXPORT_SYMBOL_GPL(ata_ratelimit);
5134 EXPORT_SYMBOL_GPL(ata_wait_register);
5135 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5136 EXPORT_SYMBOL_GPL(ata_port_queue_task);
5137 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5138 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5139 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5140 EXPORT_SYMBOL_GPL(ata_scsi_release);
5141 EXPORT_SYMBOL_GPL(ata_host_intr);
5142 EXPORT_SYMBOL_GPL(ata_id_string);
5143 EXPORT_SYMBOL_GPL(ata_id_c_string);
5144 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5145
5146 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5147 EXPORT_SYMBOL_GPL(ata_timing_compute);
5148 EXPORT_SYMBOL_GPL(ata_timing_merge);
5149
5150 #ifdef CONFIG_PCI
5151 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5152 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5153 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5154 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5155 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5156 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5157 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5158 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5159 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5160 #endif /* CONFIG_PCI */
5161
5162 EXPORT_SYMBOL_GPL(ata_device_suspend);
5163 EXPORT_SYMBOL_GPL(ata_device_resume);
5164 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5165 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
5166
5167 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5168 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5169 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
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