drivers/usb/gadget/pxa2xx_udc.h

   1 /*
   2  * linux/drivers/usb/gadget/pxa2xx_udc.h
   3  * Intel PXA2xx on-chip full speed USB device controller
   4  *
   5  * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
   6  * Copyright (C) 2003 David Brownell
   7  *
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22  */
  23
  24 #ifndef __LINUX_USB_GADGET_PXA2XX_H
  25 #define __LINUX_USB_GADGET_PXA2XX_H
  26
  27 #include <linux/types.h>
  28
  29 /*-------------------------------------------------------------------------*/
  30
  31 /* pxa2xx has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
  32 #define UFNRH_SIR       (1 << 7)        /* SOF interrupt request */
  33 #define UFNRH_SIM       (1 << 6)        /* SOF interrupt mask */
  34 #define UFNRH_IPE14     (1 << 5)        /* ISO packet error, ep14 */
  35 #define UFNRH_IPE9      (1 << 4)        /* ISO packet error, ep9 */
  36 #define UFNRH_IPE4      (1 << 3)        /* ISO packet error, ep4 */
  37
  38 /* pxa255 has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
  39 #define UDCCFR          UDC_RES2        /* UDC Control Function Register */
  40 #define UDCCFR_AREN     (1 << 7)        /* ACK response enable (now) */
  41 #define UDCCFR_ACM      (1 << 2)        /* ACK control mode (wait for AREN) */
  42
  43 /* latest pxa255 errata define new "must be one" bits in UDCCFR */
  44 #define UDCCFR_MB1      (0xff & ~(UDCCFR_AREN|UDCCFR_ACM))
  45
  46 /*-------------------------------------------------------------------------*/
  47
  48 struct pxa2xx_udc;
  49
  50 struct pxa2xx_ep {
  51         struct usb_ep                           ep;
  52         struct pxa2xx_udc                       *dev;
  53
  54         const struct usb_endpoint_descriptor    *desc;
  55         struct list_head                        queue;
  56         unsigned long                           pio_irqs;
  57         unsigned long                           dma_irqs;
  58         short                                   dma;
  59
  60         unsigned short                          fifo_size;
  61         u8                                      bEndpointAddress;
  62         u8                                      bmAttributes;
  63
  64         unsigned                                stopped : 1;
  65         unsigned                                dma_fixup : 1;
  66
  67         /* UDCCS = UDC Control/Status for this EP
  68          * UBCR = UDC Byte Count Remaining (contents of OUT fifo)
  69          * UDDR = UDC Endpoint Data Register (the fifo)
  70          * DRCM = DMA Request Channel Map
  71          */
  72         volatile u32                            *reg_udccs;
  73         volatile u32                            *reg_ubcr;
  74         volatile u32                            *reg_uddr;
  75 #ifdef USE_DMA
  76         volatile u32                    *reg_drcmr;
  77 #define drcmr(n)  .reg_drcmr = & DRCMR ## n ,
  78 #else
  79 #define drcmr(n)
  80 #endif
  81 };
  82
  83 struct pxa2xx_request {
  84         struct usb_request                      req;
  85         struct list_head                        queue;
  86 };
  87
  88 enum ep0_state {
  89         EP0_IDLE,
  90         EP0_IN_DATA_PHASE,
  91         EP0_OUT_DATA_PHASE,
  92         EP0_END_XFER,
  93         EP0_STALL,
  94 };
  95
  96 #define EP0_FIFO_SIZE   ((unsigned)16)
  97 #define BULK_FIFO_SIZE  ((unsigned)64)
  98 #define ISO_FIFO_SIZE   ((unsigned)256)
  99 #define INT_FIFO_SIZE   ((unsigned)8)
 100
 101 struct udc_stats {
 102         struct ep0stats {
 103                 unsigned long           ops;
 104                 unsigned long           bytes;
 105         } read, write;
 106         unsigned long                   irqs;
 107 };
 108
 109 #ifdef CONFIG_USB_PXA2XX_SMALL
 110 /* when memory's tight, SMALL config saves code+data.  */
 111 #undef  USE_DMA
 112 #define PXA_UDC_NUM_ENDPOINTS   3
 113 #endif
 114
 115 #ifndef PXA_UDC_NUM_ENDPOINTS
 116 #define PXA_UDC_NUM_ENDPOINTS   16
 117 #endif
 118
 119 struct pxa2xx_udc {
 120         struct usb_gadget                       gadget;
 121         struct usb_gadget_driver                *driver;
 122
 123         enum ep0_state                          ep0state;
 124         struct udc_stats                        stats;
 125         unsigned                                got_irq : 1,
 126                                                 vbus : 1,
 127                                                 pullup : 1,
 128                                                 has_cfr : 1,
 129                                                 req_pending : 1,
 130                                                 req_std : 1,
 131                                                 req_config : 1;
 132
 133 #define start_watchdog(dev) mod_timer(&dev->timer, jiffies + (HZ/200))
 134         struct timer_list                       timer;
 135
 136         struct device                           *dev;
 137         struct pxa2xx_udc_mach_info             *mach;
 138         u64                                     dma_mask;
 139         struct pxa2xx_ep                        ep [PXA_UDC_NUM_ENDPOINTS];
 140 };
 141
 142 /*-------------------------------------------------------------------------*/
 143
 144 #ifdef CONFIG_ARCH_LUBBOCK
 145 #include <asm/arch/lubbock.h>
 146 /* lubbock can also report usb connect/disconnect irqs */
 147
 148 #ifdef DEBUG
 149 #define HEX_DISPLAY(n)  if (machine_is_lubbock()) { LUB_HEXLED = (n); }
 150 #endif
 151
 152 #endif
 153
 154 /*-------------------------------------------------------------------------*/
 155
 156 /* LEDs are only for debug */
 157 #ifndef HEX_DISPLAY
 158 #define HEX_DISPLAY(n)          do {} while(0)
 159 #endif
 160
 161 #ifdef DEBUG
 162 #include <asm/leds.h>
 163
 164 #define LED_CONNECTED_ON        leds_event(led_green_on)
 165 #define LED_CONNECTED_OFF       do { \
 166                                         leds_event(led_green_off); \
 167                                         HEX_DISPLAY(0); \
 168                                 } while(0)
 169 #endif
 170
 171 #ifndef LED_CONNECTED_ON
 172 #define LED_CONNECTED_ON        do {} while(0)
 173 #define LED_CONNECTED_OFF       do {} while(0)
 174 #endif
 175
 176 /*-------------------------------------------------------------------------*/
 177
 178 static struct pxa2xx_udc *the_controller;
 179
 180 static inline int pxa_gpio_get(unsigned gpio)
 181 {
 182         return (GPLR(gpio) & GPIO_bit(gpio)) != 0;
 183 }
 184
 185 static inline void pxa_gpio_set(unsigned gpio, int is_on)
 186 {
 187         int mask = GPIO_bit(gpio);
 188
 189         if (is_on)
 190                 GPSR(gpio) = mask;
 191         else
 192                 GPCR(gpio) = mask;
 193 }
 194
 195 /*-------------------------------------------------------------------------*/
 196
 197 /*
 198  * Debugging support vanishes in non-debug builds.  DBG_NORMAL should be
 199  * mostly silent during normal use/testing, with no timing side-effects.
 200  */
 201 #define DBG_NORMAL      1       /* error paths, device state transitions */
 202 #define DBG_VERBOSE     2       /* add some success path trace info */
 203 #define DBG_NOISY       3       /* ... even more: request level */
 204 #define DBG_VERY_NOISY  4       /* ... even more: packet level */
 205
 206 #ifdef DEBUG
 207
 208 static const char *state_name[] = {
 209         "EP0_IDLE",
 210         "EP0_IN_DATA_PHASE", "EP0_OUT_DATA_PHASE",
 211         "EP0_END_XFER", "EP0_STALL"
 212 };
 213
 214 #define DMSG(stuff...) printk(KERN_DEBUG "udc: " stuff)
 215
 216 #ifdef VERBOSE
 217 #    define UDC_DEBUG DBG_VERBOSE
 218 #else
 219 #    define UDC_DEBUG DBG_NORMAL
 220 #endif
 221
 222 static void __attribute__ ((__unused__))
 223 dump_udccr(const char *label)
 224 {
 225         u32     udccr = UDCCR;
 226         DMSG("%s %02X =%s%s%s%s%s%s%s%s\n",
 227                 label, udccr,
 228                 (udccr & UDCCR_REM) ? " rem" : "",
 229                 (udccr & UDCCR_RSTIR) ? " rstir" : "",
 230                 (udccr & UDCCR_SRM) ? " srm" : "",
 231                 (udccr & UDCCR_SUSIR) ? " susir" : "",
 232                 (udccr & UDCCR_RESIR) ? " resir" : "",
 233                 (udccr & UDCCR_RSM) ? " rsm" : "",
 234                 (udccr & UDCCR_UDA) ? " uda" : "",
 235                 (udccr & UDCCR_UDE) ? " ude" : "");
 236 }
 237
 238 static void __attribute__ ((__unused__))
 239 dump_udccs0(const char *label)
 240 {
 241         u32             udccs0 = UDCCS0;
 242
 243         DMSG("%s %s %02X =%s%s%s%s%s%s%s%s\n",
 244                 label, state_name[the_controller->ep0state], udccs0,
 245                 (udccs0 & UDCCS0_SA) ? " sa" : "",
 246                 (udccs0 & UDCCS0_RNE) ? " rne" : "",
 247                 (udccs0 & UDCCS0_FST) ? " fst" : "",
 248                 (udccs0 & UDCCS0_SST) ? " sst" : "",
 249                 (udccs0 & UDCCS0_DRWF) ? " dwrf" : "",
 250                 (udccs0 & UDCCS0_FTF) ? " ftf" : "",
 251                 (udccs0 & UDCCS0_IPR) ? " ipr" : "",
 252                 (udccs0 & UDCCS0_OPR) ? " opr" : "");
 253 }
 254
 255 static void __attribute__ ((__unused__))
 256 dump_state(struct pxa2xx_udc *dev)
 257 {
 258         u32             tmp;
 259         unsigned        i;
 260
 261         DMSG("%s %s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
 262                 is_usb_connected() ? "host " : "disconnected",
 263                 state_name[dev->ep0state],
 264                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
 265         dump_udccr("udccr");
 266         if (dev->has_cfr) {
 267                 tmp = UDCCFR;
 268                 DMSG("udccfr %02X =%s%s\n", tmp,
 269                         (tmp & UDCCFR_AREN) ? " aren" : "",
 270                         (tmp & UDCCFR_ACM) ? " acm" : "");
 271         }
 272
 273         if (!dev->driver) {
 274                 DMSG("no gadget driver bound\n");
 275                 return;
 276         } else
 277                 DMSG("ep0 driver '%s'\n", dev->driver->driver.name);
 278
 279         if (!is_usb_connected())
 280                 return;
 281
 282         dump_udccs0 ("udccs0");
 283         DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n",
 284                 dev->stats.write.bytes, dev->stats.write.ops,
 285                 dev->stats.read.bytes, dev->stats.read.ops);
 286
 287         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) {
 288                 if (dev->ep [i].desc == 0)
 289                         continue;
 290                 DMSG ("udccs%d = %02x\n", i, *dev->ep->reg_udccs);
 291         }
 292 }
 293
 294 #else
 295
 296 #define DMSG(stuff...)          do{}while(0)
 297
 298 #define dump_udccr(x)   do{}while(0)
 299 #define dump_udccs0(x)  do{}while(0)
 300 #define dump_state(x)   do{}while(0)
 301
 302 #define UDC_DEBUG ((unsigned)0)
 303
 304 #endif
 305
 306 #define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0)
 307
 308 #define WARN(stuff...) printk(KERN_WARNING "udc: " stuff)
 309 #define INFO(stuff...) printk(KERN_INFO "udc: " stuff)
 310
 311
 312 #endif /* __LINUX_USB_GADGET_PXA2XX_H */