Use malloc/free in the dbgapi callbacks
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
1 /* Target-machine dependent code for Renesas H8/300, for GDB.
2
3 Copyright (C) 1988-2020 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 /*
21 Contributed by Steve Chamberlain
22 sac@cygnus.com
23 */
24
25 #include "defs.h"
26 #include "value.h"
27 #include "arch-utils.h"
28 #include "regcache.h"
29 #include "gdbcore.h"
30 #include "objfiles.h"
31 #include "dis-asm.h"
32 #include "dwarf2-frame.h"
33 #include "frame-base.h"
34 #include "frame-unwind.h"
35
36 enum gdb_regnum
37 {
38 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
39 E_RET0_REGNUM = E_R0_REGNUM,
40 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
41 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
42 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
43 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
44 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
45 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
46 E_SP_REGNUM,
47 E_CCR_REGNUM,
48 E_PC_REGNUM,
49 E_CYCLES_REGNUM,
50 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
51 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
52 E_INSTS_REGNUM,
53 E_MACH_REGNUM,
54 E_MACL_REGNUM,
55 E_SBR_REGNUM,
56 E_VBR_REGNUM
57 };
58
59 #define H8300_MAX_NUM_REGS 18
60
61 #define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
62 #define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
63
64 struct h8300_frame_cache
65 {
66 /* Base address. */
67 CORE_ADDR base;
68 CORE_ADDR sp_offset;
69 CORE_ADDR pc;
70
71 /* Flag showing that a frame has been created in the prologue code. */
72 int uses_fp;
73
74 /* Saved registers. */
75 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
76 CORE_ADDR saved_sp;
77 };
78
79 enum
80 {
81 h8300_reg_size = 2,
82 h8300h_reg_size = 4,
83 h8300_max_reg_size = 4,
84 };
85
86 static int is_h8300hmode (struct gdbarch *gdbarch);
87 static int is_h8300smode (struct gdbarch *gdbarch);
88 static int is_h8300sxmode (struct gdbarch *gdbarch);
89 static int is_h8300_normal_mode (struct gdbarch *gdbarch);
90
91 #define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
92 && !is_h8300_normal_mode (gdbarch)) \
93 ? h8300h_reg_size : h8300_reg_size)
94
95 /* Normal frames. */
96
97 /* Allocate and initialize a frame cache. */
98
99 static void
100 h8300_init_frame_cache (struct gdbarch *gdbarch,
101 struct h8300_frame_cache *cache)
102 {
103 int i;
104
105 /* Base address. */
106 cache->base = 0;
107 cache->sp_offset = 0;
108 cache->pc = 0;
109
110 /* Frameless until proven otherwise. */
111 cache->uses_fp = 0;
112
113 /* Saved registers. We initialize these to -1 since zero is a valid
114 offset (that's where %fp is supposed to be stored). */
115 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
116 cache->saved_regs[i] = -1;
117 }
118
119 #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
120 #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
121 #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
122 #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
123 #define IS_MOVB_EXT(x) ((x) == 0x7860)
124 #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
125 #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
126 #define IS_MOVW_EXT(x) ((x) == 0x78e0)
127 #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
128 /* Same instructions as mov.w, just prefixed with 0x0100. */
129 #define IS_MOVL_PRE(x) ((x) == 0x0100)
130 #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
131 #define IS_MOVL_EXT(x) ((x) == 0x78e0)
132 #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
133
134 #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
135 #define IS_PUSH_FP(x) ((x) == 0x01006df6)
136 #define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
137 #define IS_SUB2_SP(x) ((x) == 0x1b87)
138 #define IS_SUB4_SP(x) ((x) == 0x1b97)
139 #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
140 #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
141 #define IS_SUBL4_SP(x) ((x) == 0x1acf)
142 #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
143 #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
144 #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
145 #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
146
147 /* If the instruction at PC is an argument register spill, return its
148 length. Otherwise, return zero.
149
150 An argument register spill is an instruction that moves an argument
151 from the register in which it was passed to the stack slot in which
152 it really lives. It is a byte, word, or longword move from an
153 argument register to a negative offset from the frame pointer.
154
155 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
156 is used, it could be a byte, word or long move to registers r3-r5. */
157
158 static int
159 h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc)
160 {
161 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
162 int w = read_memory_unsigned_integer (pc, 2, byte_order);
163
164 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
165 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
166 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
167 return 2;
168
169 if (IS_MOVB_Rn16_SP (w)
170 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
171 {
172 /* ... and d:16 is negative. */
173 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
174 return 4;
175 }
176 else if (IS_MOVB_EXT (w))
177 {
178 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2,
179 2, byte_order)))
180 {
181 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
182
183 /* ... and d:24 is negative. */
184 if (disp < 0 && disp > 0xffffff)
185 return 8;
186 }
187 }
188 else if (IS_MOVW_Rn16_SP (w)
189 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
190 {
191 /* ... and d:16 is negative. */
192 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
193 return 4;
194 }
195 else if (IS_MOVW_EXT (w))
196 {
197 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2,
198 2, byte_order)))
199 {
200 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
201
202 /* ... and d:24 is negative. */
203 if (disp < 0 && disp > 0xffffff)
204 return 8;
205 }
206 }
207 else if (IS_MOVL_PRE (w))
208 {
209 int w2 = read_memory_integer (pc + 2, 2, byte_order);
210
211 if (IS_MOVL_Rn16_SP (w2)
212 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
213 {
214 /* ... and d:16 is negative. */
215 if (read_memory_integer (pc + 4, 2, byte_order) < 0)
216 return 6;
217 }
218 else if (IS_MOVL_EXT (w2))
219 {
220 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order)))
221 {
222 LONGEST disp = read_memory_integer (pc + 6, 4, byte_order);
223
224 /* ... and d:24 is negative. */
225 if (disp < 0 && disp > 0xffffff)
226 return 10;
227 }
228 }
229 }
230
231 return 0;
232 }
233
234 /* Do a full analysis of the prologue at PC and update CACHE
235 accordingly. Bail out early if CURRENT_PC is reached. Return the
236 address where the analysis stopped.
237
238 We handle all cases that can be generated by gcc.
239
240 For allocating a stack frame:
241
242 mov.w r6,@-sp
243 mov.w sp,r6
244 mov.w #-n,rN
245 add.w rN,sp
246
247 mov.w r6,@-sp
248 mov.w sp,r6
249 subs #2,sp
250 (repeat)
251
252 mov.l er6,@-sp
253 mov.l sp,er6
254 add.l #-n,sp
255
256 mov.w r6,@-sp
257 mov.w sp,r6
258 subs #4,sp
259 (repeat)
260
261 For saving registers:
262
263 mov.w rN,@-sp
264 mov.l erN,@-sp
265 stm.l reglist,@-sp
266
267 */
268
269 static CORE_ADDR
270 h8300_analyze_prologue (struct gdbarch *gdbarch,
271 CORE_ADDR pc, CORE_ADDR current_pc,
272 struct h8300_frame_cache *cache)
273 {
274 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
275 unsigned int op;
276 int regno, i, spill_size;
277
278 cache->sp_offset = 0;
279
280 if (pc >= current_pc)
281 return current_pc;
282
283 op = read_memory_unsigned_integer (pc, 4, byte_order);
284
285 if (IS_PUSHFP_MOVESPFP (op))
286 {
287 cache->saved_regs[E_FP_REGNUM] = 0;
288 cache->uses_fp = 1;
289 pc += 4;
290 }
291 else if (IS_PUSH_FP (op))
292 {
293 cache->saved_regs[E_FP_REGNUM] = 0;
294 pc += 4;
295 if (pc >= current_pc)
296 return current_pc;
297 op = read_memory_unsigned_integer (pc, 2, byte_order);
298 if (IS_MOV_SP_FP (op))
299 {
300 cache->uses_fp = 1;
301 pc += 2;
302 }
303 }
304
305 while (pc < current_pc)
306 {
307 op = read_memory_unsigned_integer (pc, 2, byte_order);
308 if (IS_SUB2_SP (op))
309 {
310 cache->sp_offset += 2;
311 pc += 2;
312 }
313 else if (IS_SUB4_SP (op))
314 {
315 cache->sp_offset += 4;
316 pc += 2;
317 }
318 else if (IS_ADD_IMM_SP (op))
319 {
320 cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order);
321 pc += 4;
322 }
323 else if (IS_SUB_IMM_SP (op))
324 {
325 cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order);
326 pc += 4;
327 }
328 else if (IS_SUBL4_SP (op))
329 {
330 cache->sp_offset += 4;
331 pc += 2;
332 }
333 else if (IS_MOV_IMM_Rn (op))
334 {
335 int offset = read_memory_integer (pc + 2, 2, byte_order);
336 regno = op & 0x000f;
337 op = read_memory_unsigned_integer (pc + 4, 2, byte_order);
338 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
339 {
340 cache->sp_offset -= offset;
341 pc += 6;
342 }
343 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
344 {
345 cache->sp_offset += offset;
346 pc += 6;
347 }
348 else
349 break;
350 }
351 else if (IS_PUSH (op))
352 {
353 regno = op & 0x000f;
354 cache->sp_offset += 2;
355 cache->saved_regs[regno] = cache->sp_offset;
356 pc += 2;
357 }
358 else if (op == 0x0100)
359 {
360 op = read_memory_unsigned_integer (pc + 2, 2, byte_order);
361 if (IS_PUSH (op))
362 {
363 regno = op & 0x000f;
364 cache->sp_offset += 4;
365 cache->saved_regs[regno] = cache->sp_offset;
366 pc += 4;
367 }
368 else
369 break;
370 }
371 else if ((op & 0xffcf) == 0x0100)
372 {
373 int op1;
374 op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order);
375 if (IS_PUSH (op1))
376 {
377 /* Since the prefix is 0x01x0, this is not a simple pushm but a
378 stm.l reglist,@-sp */
379 i = ((op & 0x0030) >> 4) + 1;
380 regno = op1 & 0x000f;
381 for (; i > 0; regno++, --i)
382 {
383 cache->sp_offset += 4;
384 cache->saved_regs[regno] = cache->sp_offset;
385 }
386 pc += 4;
387 }
388 else
389 break;
390 }
391 else
392 break;
393 }
394
395 /* Check for spilling an argument register to the stack frame.
396 This could also be an initializing store from non-prologue code,
397 but I don't think there's any harm in skipping that. */
398 while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0
399 && pc + spill_size <= current_pc)
400 pc += spill_size;
401
402 return pc;
403 }
404
405 static struct h8300_frame_cache *
406 h8300_frame_cache (struct frame_info *this_frame, void **this_cache)
407 {
408 struct gdbarch *gdbarch = get_frame_arch (this_frame);
409 struct h8300_frame_cache *cache;
410 int i;
411 CORE_ADDR current_pc;
412
413 if (*this_cache)
414 return (struct h8300_frame_cache *) *this_cache;
415
416 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
417 h8300_init_frame_cache (gdbarch, cache);
418 *this_cache = cache;
419
420 /* In principle, for normal frames, %fp holds the frame pointer,
421 which holds the base address for the current stack frame.
422 However, for functions that don't need it, the frame pointer is
423 optional. For these "frameless" functions the frame pointer is
424 actually the frame pointer of the calling frame. */
425
426 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
427 if (cache->base == 0)
428 return cache;
429
430 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
431
432 cache->pc = get_frame_func (this_frame);
433 current_pc = get_frame_pc (this_frame);
434 if (cache->pc != 0)
435 h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache);
436
437 if (!cache->uses_fp)
438 {
439 /* We didn't find a valid frame, which means that CACHE->base
440 currently holds the frame pointer for our calling frame. If
441 we're at the start of a function, or somewhere half-way its
442 prologue, the function's frame probably hasn't been fully
443 setup yet. Try to reconstruct the base address for the stack
444 frame by looking at the stack pointer. For truly "frameless"
445 functions this might work too. */
446
447 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM)
448 + cache->sp_offset;
449 cache->saved_sp = cache->base + BINWORD (gdbarch);
450 cache->saved_regs[E_PC_REGNUM] = 0;
451 }
452 else
453 {
454 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
455 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
456 }
457
458 /* Adjust all the saved registers such that they contain addresses
459 instead of offsets. */
460 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
461 if (cache->saved_regs[i] != -1)
462 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
463
464 return cache;
465 }
466
467 static void
468 h8300_frame_this_id (struct frame_info *this_frame, void **this_cache,
469 struct frame_id *this_id)
470 {
471 struct h8300_frame_cache *cache =
472 h8300_frame_cache (this_frame, this_cache);
473
474 /* This marks the outermost frame. */
475 if (cache->base == 0)
476 return;
477
478 *this_id = frame_id_build (cache->saved_sp, cache->pc);
479 }
480
481 static struct value *
482 h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache,
483 int regnum)
484 {
485 struct gdbarch *gdbarch = get_frame_arch (this_frame);
486 struct h8300_frame_cache *cache =
487 h8300_frame_cache (this_frame, this_cache);
488
489 gdb_assert (regnum >= 0);
490
491 if (regnum == E_SP_REGNUM && cache->saved_sp)
492 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
493
494 if (regnum < gdbarch_num_regs (gdbarch)
495 && cache->saved_regs[regnum] != -1)
496 return frame_unwind_got_memory (this_frame, regnum,
497 cache->saved_regs[regnum]);
498
499 return frame_unwind_got_register (this_frame, regnum, regnum);
500 }
501
502 static const struct frame_unwind h8300_frame_unwind = {
503 NORMAL_FRAME,
504 default_frame_unwind_stop_reason,
505 h8300_frame_this_id,
506 h8300_frame_prev_register,
507 NULL,
508 default_frame_sniffer
509 };
510
511 static CORE_ADDR
512 h8300_frame_base_address (struct frame_info *this_frame, void **this_cache)
513 {
514 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache);
515 return cache->base;
516 }
517
518 static const struct frame_base h8300_frame_base = {
519 &h8300_frame_unwind,
520 h8300_frame_base_address,
521 h8300_frame_base_address,
522 h8300_frame_base_address
523 };
524
525 static CORE_ADDR
526 h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
527 {
528 CORE_ADDR func_addr = 0 , func_end = 0;
529
530 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
531 {
532 struct symtab_and_line sal;
533 struct h8300_frame_cache cache;
534
535 /* Found a function. */
536 sal = find_pc_line (func_addr, 0);
537 if (sal.end && sal.end < func_end)
538 /* Found a line number, use it as end of prologue. */
539 return sal.end;
540
541 /* No useable line symbol. Use prologue parsing method. */
542 h8300_init_frame_cache (gdbarch, &cache);
543 return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache);
544 }
545
546 /* No function symbol -- just return the PC. */
547 return (CORE_ADDR) pc;
548 }
549
550 /* Function: push_dummy_call
551 Setup the function arguments for calling a function in the inferior.
552 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
553 on the H8/300H.
554
555 There are actually two ABI's here: -mquickcall (the default) and
556 -mno-quickcall. With -mno-quickcall, all arguments are passed on
557 the stack after the return address, word-aligned. With
558 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
559 GCC doesn't indicate in the object file which ABI was used to
560 compile it, GDB only supports the default --- -mquickcall.
561
562 Here are the rules for -mquickcall, in detail:
563
564 Each argument, whether scalar or aggregate, is padded to occupy a
565 whole number of words. Arguments smaller than a word are padded at
566 the most significant end; those larger than a word are padded at
567 the least significant end.
568
569 The initial arguments are passed in r0 -- r2. Earlier arguments go in
570 lower-numbered registers. Multi-word arguments are passed in
571 consecutive registers, with the most significant end in the
572 lower-numbered register.
573
574 If an argument doesn't fit entirely in the remaining registers, it
575 is passed entirely on the stack. Stack arguments begin just after
576 the return address. Once an argument has overflowed onto the stack
577 this way, all subsequent arguments are passed on the stack.
578
579 The above rule has odd consequences. For example, on the h8/300s,
580 if a function takes two longs and an int as arguments:
581 - the first long will be passed in r0/r1,
582 - the second long will be passed entirely on the stack, since it
583 doesn't fit in r2,
584 - and the int will be passed on the stack, even though it could fit
585 in r2.
586
587 A weird exception: if an argument is larger than a word, but not a
588 whole number of words in length (before padding), it is passed on
589 the stack following the rules for stack arguments above, even if
590 there are sufficient registers available to hold it. Stranger
591 still, the argument registers are still `used up' --- even though
592 there's nothing in them.
593
594 So, for example, on the h8/300s, if a function expects a three-byte
595 structure and an int, the structure will go on the stack, and the
596 int will go in r2, not r0.
597
598 If the function returns an aggregate type (struct, union, or class)
599 by value, the caller must allocate space to hold the return value,
600 and pass the callee a pointer to this space as an invisible first
601 argument, in R0.
602
603 For varargs functions, the last fixed argument and all the variable
604 arguments are always passed on the stack. This means that calls to
605 varargs functions don't work properly unless there is a prototype
606 in scope.
607
608 Basically, this ABI is not good, for the following reasons:
609 - You can't call vararg functions properly unless a prototype is in scope.
610 - Structure passing is inconsistent, to no purpose I can see.
611 - It often wastes argument registers, of which there are only three
612 to begin with. */
613
614 static CORE_ADDR
615 h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
616 struct regcache *regcache, CORE_ADDR bp_addr,
617 int nargs, struct value **args, CORE_ADDR sp,
618 function_call_return_method return_method,
619 CORE_ADDR struct_addr)
620 {
621 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
622 int stack_alloc = 0, stack_offset = 0;
623 int wordsize = BINWORD (gdbarch);
624 int reg = E_ARG0_REGNUM;
625 int argument;
626
627 /* First, make sure the stack is properly aligned. */
628 sp = align_down (sp, wordsize);
629
630 /* Now make sure there's space on the stack for the arguments. We
631 may over-allocate a little here, but that won't hurt anything. */
632 for (argument = 0; argument < nargs; argument++)
633 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
634 wordsize);
635 sp -= stack_alloc;
636
637 /* Now load as many arguments as possible into registers, and push
638 the rest onto the stack.
639 If we're returning a structure by value, then we must pass a
640 pointer to the buffer for the return value as an invisible first
641 argument. */
642 if (return_method == return_method_struct)
643 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
644
645 for (argument = 0; argument < nargs; argument++)
646 {
647 struct type *type = value_type (args[argument]);
648 int len = TYPE_LENGTH (type);
649 char *contents = (char *) value_contents (args[argument]);
650
651 /* Pad the argument appropriately. */
652 int padded_len = align_up (len, wordsize);
653 /* Use std::vector here to get zero initialization. */
654 std::vector<gdb_byte> padded (padded_len);
655
656 memcpy ((len < wordsize ? padded.data () + padded_len - len
657 : padded.data ()),
658 contents, len);
659
660 /* Could the argument fit in the remaining registers? */
661 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
662 {
663 /* Are we going to pass it on the stack anyway, for no good
664 reason? */
665 if (len > wordsize && len % wordsize)
666 {
667 /* I feel so unclean. */
668 write_memory (sp + stack_offset, padded.data (), padded_len);
669 stack_offset += padded_len;
670
671 /* That's right --- even though we passed the argument
672 on the stack, we consume the registers anyway! Love
673 me, love my dog. */
674 reg += padded_len / wordsize;
675 }
676 else
677 {
678 /* Heavens to Betsy --- it's really going in registers!
679 Note that on the h8/300s, there are gaps between the
680 registers in the register file. */
681 int offset;
682
683 for (offset = 0; offset < padded_len; offset += wordsize)
684 {
685 ULONGEST word
686 = extract_unsigned_integer (&padded[offset],
687 wordsize, byte_order);
688 regcache_cooked_write_unsigned (regcache, reg++, word);
689 }
690 }
691 }
692 else
693 {
694 /* It doesn't fit in registers! Onto the stack it goes. */
695 write_memory (sp + stack_offset, padded.data (), padded_len);
696 stack_offset += padded_len;
697
698 /* Once one argument has spilled onto the stack, all
699 subsequent arguments go on the stack. */
700 reg = E_ARGLAST_REGNUM + 1;
701 }
702 }
703
704 /* Store return address. */
705 sp -= wordsize;
706 write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr);
707
708 /* Update stack pointer. */
709 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
710
711 /* Return the new stack pointer minus the return address slot since
712 that's what DWARF2/GCC uses as the frame's CFA. */
713 return sp + wordsize;
714 }
715
716 /* Function: extract_return_value
717 Figure out where in REGBUF the called function has left its return value.
718 Copy that into VALBUF. Be sure to account for CPU type. */
719
720 static void
721 h8300_extract_return_value (struct type *type, struct regcache *regcache,
722 gdb_byte *valbuf)
723 {
724 struct gdbarch *gdbarch = regcache->arch ();
725 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
726 int len = TYPE_LENGTH (type);
727 ULONGEST c, addr;
728
729 switch (len)
730 {
731 case 1:
732 case 2:
733 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
734 store_unsigned_integer (valbuf, len, byte_order, c);
735 break;
736 case 4: /* Needs two registers on plain H8/300 */
737 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
738 store_unsigned_integer (valbuf, 2, byte_order, c);
739 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
740 store_unsigned_integer (valbuf + 2, 2, byte_order, c);
741 break;
742 case 8: /* long long is now 8 bytes. */
743 if (TYPE_CODE (type) == TYPE_CODE_INT)
744 {
745 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
746 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order);
747 store_unsigned_integer (valbuf, len, byte_order, c);
748 }
749 else
750 {
751 error (_("I don't know how this 8 byte value is returned."));
752 }
753 break;
754 }
755 }
756
757 static void
758 h8300h_extract_return_value (struct type *type, struct regcache *regcache,
759 gdb_byte *valbuf)
760 {
761 struct gdbarch *gdbarch = regcache->arch ();
762 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
763 ULONGEST c;
764
765 switch (TYPE_LENGTH (type))
766 {
767 case 1:
768 case 2:
769 case 4:
770 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
771 store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c);
772 break;
773 case 8: /* long long is now 8 bytes. */
774 if (TYPE_CODE (type) == TYPE_CODE_INT)
775 {
776 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
777 store_unsigned_integer (valbuf, 4, byte_order, c);
778 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
779 store_unsigned_integer (valbuf + 4, 4, byte_order, c);
780 }
781 else
782 {
783 error (_("I don't know how this 8 byte value is returned."));
784 }
785 break;
786 }
787 }
788
789 static int
790 h8300_use_struct_convention (struct type *value_type)
791 {
792 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
793 stack. */
794
795 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
796 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
797 return 1;
798 return !(TYPE_LENGTH (value_type) == 1
799 || TYPE_LENGTH (value_type) == 2
800 || TYPE_LENGTH (value_type) == 4);
801 }
802
803 static int
804 h8300h_use_struct_convention (struct type *value_type)
805 {
806 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
807 returned in R0/R1, everything else on the stack. */
808 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
809 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
810 return 1;
811 return !(TYPE_LENGTH (value_type) == 1
812 || TYPE_LENGTH (value_type) == 2
813 || TYPE_LENGTH (value_type) == 4
814 || (TYPE_LENGTH (value_type) == 8
815 && TYPE_CODE (value_type) == TYPE_CODE_INT));
816 }
817
818 /* Function: store_return_value
819 Place the appropriate value in the appropriate registers.
820 Primarily used by the RETURN command. */
821
822 static void
823 h8300_store_return_value (struct type *type, struct regcache *regcache,
824 const gdb_byte *valbuf)
825 {
826 struct gdbarch *gdbarch = regcache->arch ();
827 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
828 ULONGEST val;
829
830 switch (TYPE_LENGTH (type))
831 {
832 case 1:
833 case 2: /* short... */
834 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
835 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
836 break;
837 case 4: /* long, float */
838 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
839 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
840 (val >> 16) & 0xffff);
841 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
842 break;
843 case 8: /* long long, double and long double
844 are all defined as 4 byte types so
845 far so this shouldn't happen. */
846 error (_("I don't know how to return an 8 byte value."));
847 break;
848 }
849 }
850
851 static void
852 h8300h_store_return_value (struct type *type, struct regcache *regcache,
853 const gdb_byte *valbuf)
854 {
855 struct gdbarch *gdbarch = regcache->arch ();
856 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
857 ULONGEST val;
858
859 switch (TYPE_LENGTH (type))
860 {
861 case 1:
862 case 2:
863 case 4: /* long, float */
864 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
865 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
866 break;
867 case 8:
868 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
869 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
870 (val >> 32) & 0xffffffff);
871 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
872 val & 0xffffffff);
873 break;
874 }
875 }
876
877 static enum return_value_convention
878 h8300_return_value (struct gdbarch *gdbarch, struct value *function,
879 struct type *type, struct regcache *regcache,
880 gdb_byte *readbuf, const gdb_byte *writebuf)
881 {
882 if (h8300_use_struct_convention (type))
883 return RETURN_VALUE_STRUCT_CONVENTION;
884 if (writebuf)
885 h8300_store_return_value (type, regcache, writebuf);
886 else if (readbuf)
887 h8300_extract_return_value (type, regcache, readbuf);
888 return RETURN_VALUE_REGISTER_CONVENTION;
889 }
890
891 static enum return_value_convention
892 h8300h_return_value (struct gdbarch *gdbarch, struct value *function,
893 struct type *type, struct regcache *regcache,
894 gdb_byte *readbuf, const gdb_byte *writebuf)
895 {
896 if (h8300h_use_struct_convention (type))
897 {
898 if (readbuf)
899 {
900 ULONGEST addr;
901
902 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
903 read_memory (addr, readbuf, TYPE_LENGTH (type));
904 }
905
906 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
907 }
908 if (writebuf)
909 h8300h_store_return_value (type, regcache, writebuf);
910 else if (readbuf)
911 h8300h_extract_return_value (type, regcache, readbuf);
912 return RETURN_VALUE_REGISTER_CONVENTION;
913 }
914
915 /* Implementation of 'register_sim_regno' gdbarch method. */
916
917 static int
918 h8300_register_sim_regno (struct gdbarch *gdbarch, int regnum)
919 {
920 /* Only makes sense to supply raw registers. */
921 gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
922
923 /* We hide the raw ccr from the user by making it nameless. Because
924 the default register_sim_regno hook returns
925 LEGACY_SIM_REGNO_IGNORE for unnamed registers, we need to
926 override it. The sim register numbering is compatible with
927 gdb's. */
928 return regnum;
929 }
930
931 static const char *
932 h8300_register_name_common (const char *regnames[], int numregs,
933 struct gdbarch *gdbarch, int regno)
934 {
935 if (regno < 0
936 || regno >= numregs)
937 internal_error (__FILE__, __LINE__,
938 _("h8300_register_name_common: illegal register number %d"),
939 regno);
940 else
941 return regnames[regno];
942 }
943
944 static const char *
945 h8300_register_name (struct gdbarch *gdbarch, int regno)
946 {
947 /* The register names change depending on which h8300 processor
948 type is selected. */
949 static const char *register_names[] = {
950 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
951 "sp", "", "pc", "cycles", "tick", "inst",
952 "ccr", /* pseudo register */
953 };
954 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
955 gdbarch, regno);
956 }
957
958 static const char *
959 h8300h_register_name (struct gdbarch *gdbarch, int regno)
960 {
961 static const char *register_names[] = {
962 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
963 "sp", "", "pc", "cycles", "tick", "inst",
964 "ccr", /* pseudo register */
965 };
966 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
967 gdbarch, regno);
968 }
969
970 static const char *
971 h8300s_register_name (struct gdbarch *gdbarch, int regno)
972 {
973 static const char *register_names[] = {
974 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
975 "sp", "", "pc", "cycles", "", "tick", "inst",
976 "mach", "macl",
977 "ccr", "exr" /* pseudo registers */
978 };
979 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
980 gdbarch, regno);
981 }
982
983 static const char *
984 h8300sx_register_name (struct gdbarch *gdbarch, int regno)
985 {
986 static const char *register_names[] = {
987 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
988 "sp", "", "pc", "cycles", "", "tick", "inst",
989 "mach", "macl", "sbr", "vbr",
990 "ccr", "exr" /* pseudo registers */
991 };
992 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
993 gdbarch, regno);
994 }
995
996 static void
997 h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
998 struct frame_info *frame, int regno)
999 {
1000 LONGEST rval;
1001 const char *name = gdbarch_register_name (gdbarch, regno);
1002
1003 if (!name || !*name)
1004 return;
1005
1006 rval = get_frame_register_signed (frame, regno);
1007
1008 fprintf_filtered (file, "%-14s ", name);
1009 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
1010 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
1011 {
1012 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1013 print_longest (file, 'u', 1, rval);
1014 }
1015 else
1016 {
1017 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval,
1018 BINWORD (gdbarch)));
1019 print_longest (file, 'd', 1, rval);
1020 }
1021 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1022 {
1023 /* CCR register */
1024 int C, Z, N, V;
1025 unsigned char l = rval & 0xff;
1026 fprintf_filtered (file, "\t");
1027 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1028 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1029 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1030 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1031 N = (l & 0x8) != 0;
1032 Z = (l & 0x4) != 0;
1033 V = (l & 0x2) != 0;
1034 C = (l & 0x1) != 0;
1035 fprintf_filtered (file, "N-%d ", N);
1036 fprintf_filtered (file, "Z-%d ", Z);
1037 fprintf_filtered (file, "V-%d ", V);
1038 fprintf_filtered (file, "C-%d ", C);
1039 if ((C | Z) == 0)
1040 fprintf_filtered (file, "u> ");
1041 if ((C | Z) == 1)
1042 fprintf_filtered (file, "u<= ");
1043 if (C == 0)
1044 fprintf_filtered (file, "u>= ");
1045 if (C == 1)
1046 fprintf_filtered (file, "u< ");
1047 if (Z == 0)
1048 fprintf_filtered (file, "!= ");
1049 if (Z == 1)
1050 fprintf_filtered (file, "== ");
1051 if ((N ^ V) == 0)
1052 fprintf_filtered (file, ">= ");
1053 if ((N ^ V) == 1)
1054 fprintf_filtered (file, "< ");
1055 if ((Z | (N ^ V)) == 0)
1056 fprintf_filtered (file, "> ");
1057 if ((Z | (N ^ V)) == 1)
1058 fprintf_filtered (file, "<= ");
1059 }
1060 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
1061 {
1062 /* EXR register */
1063 unsigned char l = rval & 0xff;
1064 fprintf_filtered (file, "\t");
1065 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1066 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1067 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1068 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1069 }
1070 fprintf_filtered (file, "\n");
1071 }
1072
1073 static void
1074 h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1075 struct frame_info *frame, int regno, int cpregs)
1076 {
1077 if (regno < 0)
1078 {
1079 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1080 h8300_print_register (gdbarch, file, frame, regno);
1081 h8300_print_register (gdbarch, file, frame,
1082 E_PSEUDO_CCR_REGNUM (gdbarch));
1083 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1084 if (is_h8300smode (gdbarch))
1085 {
1086 h8300_print_register (gdbarch, file, frame,
1087 E_PSEUDO_EXR_REGNUM (gdbarch));
1088 if (is_h8300sxmode (gdbarch))
1089 {
1090 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1091 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1092 }
1093 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1094 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1095 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1096 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1097 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1098 }
1099 else
1100 {
1101 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1102 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1103 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1104 }
1105 }
1106 else
1107 {
1108 if (regno == E_CCR_REGNUM)
1109 h8300_print_register (gdbarch, file, frame,
1110 E_PSEUDO_CCR_REGNUM (gdbarch));
1111 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
1112 && is_h8300smode (gdbarch))
1113 h8300_print_register (gdbarch, file, frame,
1114 E_PSEUDO_EXR_REGNUM (gdbarch));
1115 else
1116 h8300_print_register (gdbarch, file, frame, regno);
1117 }
1118 }
1119
1120 static struct type *
1121 h8300_register_type (struct gdbarch *gdbarch, int regno)
1122 {
1123 if (regno < 0 || regno >= gdbarch_num_cooked_regs (gdbarch))
1124 internal_error (__FILE__, __LINE__,
1125 _("h8300_register_type: illegal register number %d"),
1126 regno);
1127 else
1128 {
1129 switch (regno)
1130 {
1131 case E_PC_REGNUM:
1132 return builtin_type (gdbarch)->builtin_func_ptr;
1133 case E_SP_REGNUM:
1134 case E_FP_REGNUM:
1135 return builtin_type (gdbarch)->builtin_data_ptr;
1136 default:
1137 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1138 return builtin_type (gdbarch)->builtin_uint8;
1139 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1140 return builtin_type (gdbarch)->builtin_uint8;
1141 else if (is_h8300hmode (gdbarch))
1142 return builtin_type (gdbarch)->builtin_int32;
1143 else
1144 return builtin_type (gdbarch)->builtin_int16;
1145 }
1146 }
1147 }
1148
1149 /* Helpers for h8300_pseudo_register_read. We expose ccr/exr as
1150 pseudo-registers to users with smaller sizes than the corresponding
1151 raw registers. These helpers extend/narrow the values. */
1152
1153 static enum register_status
1154 pseudo_from_raw_register (struct gdbarch *gdbarch, readable_regcache *regcache,
1155 gdb_byte *buf, int pseudo_regno, int raw_regno)
1156 {
1157 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1158 enum register_status status;
1159 ULONGEST val;
1160
1161 status = regcache->raw_read (raw_regno, &val);
1162 if (status == REG_VALID)
1163 store_unsigned_integer (buf,
1164 register_size (gdbarch, pseudo_regno),
1165 byte_order, val);
1166 return status;
1167 }
1168
1169 /* See pseudo_from_raw_register. */
1170
1171 static void
1172 raw_from_pseudo_register (struct gdbarch *gdbarch, struct regcache *regcache,
1173 const gdb_byte *buf, int raw_regno, int pseudo_regno)
1174 {
1175 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1176 ULONGEST val;
1177
1178 val = extract_unsigned_integer (buf, register_size (gdbarch, pseudo_regno),
1179 byte_order);
1180 regcache_raw_write_unsigned (regcache, raw_regno, val);
1181 }
1182
1183 static enum register_status
1184 h8300_pseudo_register_read (struct gdbarch *gdbarch,
1185 readable_regcache *regcache, int regno,
1186 gdb_byte *buf)
1187 {
1188 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1189 {
1190 return pseudo_from_raw_register (gdbarch, regcache, buf,
1191 regno, E_CCR_REGNUM);
1192 }
1193 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1194 {
1195 return pseudo_from_raw_register (gdbarch, regcache, buf,
1196 regno, E_EXR_REGNUM);
1197 }
1198 else
1199 return regcache->raw_read (regno, buf);
1200 }
1201
1202 static void
1203 h8300_pseudo_register_write (struct gdbarch *gdbarch,
1204 struct regcache *regcache, int regno,
1205 const gdb_byte *buf)
1206 {
1207 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1208 raw_from_pseudo_register (gdbarch, regcache, buf, E_CCR_REGNUM, regno);
1209 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1210 raw_from_pseudo_register (gdbarch, regcache, buf, E_EXR_REGNUM, regno);
1211 else
1212 regcache->raw_write (regno, buf);
1213 }
1214
1215 static int
1216 h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1217 {
1218 if (regno == E_CCR_REGNUM)
1219 return E_PSEUDO_CCR_REGNUM (gdbarch);
1220 return regno;
1221 }
1222
1223 static int
1224 h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1225 {
1226 if (regno == E_CCR_REGNUM)
1227 return E_PSEUDO_CCR_REGNUM (gdbarch);
1228 if (regno == E_EXR_REGNUM)
1229 return E_PSEUDO_EXR_REGNUM (gdbarch);
1230 return regno;
1231 }
1232
1233 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1234 constexpr gdb_byte h8300_break_insn[] = { 0x01, 0x80 }; /* Sleep */
1235
1236 typedef BP_MANIPULATION (h8300_break_insn) h8300_breakpoint;
1237
1238 static struct gdbarch *
1239 h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1240 {
1241 struct gdbarch *gdbarch;
1242
1243 arches = gdbarch_list_lookup_by_info (arches, &info);
1244 if (arches != NULL)
1245 return arches->gdbarch;
1246
1247 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1248 return NULL;
1249
1250 gdbarch = gdbarch_alloc (&info, 0);
1251
1252 set_gdbarch_register_sim_regno (gdbarch, h8300_register_sim_regno);
1253
1254 switch (info.bfd_arch_info->mach)
1255 {
1256 case bfd_mach_h8300:
1257 set_gdbarch_num_regs (gdbarch, 13);
1258 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1259 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1260 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1261 set_gdbarch_register_name (gdbarch, h8300_register_name);
1262 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1263 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1264 set_gdbarch_return_value (gdbarch, h8300_return_value);
1265 break;
1266 case bfd_mach_h8300h:
1267 case bfd_mach_h8300hn:
1268 set_gdbarch_num_regs (gdbarch, 13);
1269 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1270 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1271 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1272 set_gdbarch_register_name (gdbarch, h8300h_register_name);
1273 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1274 {
1275 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1276 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1277 }
1278 else
1279 {
1280 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1281 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1282 }
1283 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1284 break;
1285 case bfd_mach_h8300s:
1286 case bfd_mach_h8300sn:
1287 set_gdbarch_num_regs (gdbarch, 16);
1288 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1289 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1290 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1291 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1292 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1293 {
1294 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1295 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1296 }
1297 else
1298 {
1299 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1300 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1301 }
1302 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1303 break;
1304 case bfd_mach_h8300sx:
1305 case bfd_mach_h8300sxn:
1306 set_gdbarch_num_regs (gdbarch, 18);
1307 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1308 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1309 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1310 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1311 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1312 {
1313 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1314 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1315 }
1316 else
1317 {
1318 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1319 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1320 }
1321 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1322 break;
1323 }
1324
1325 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1326 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1327
1328 /*
1329 * Basic register fields and methods.
1330 */
1331
1332 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1333 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1334 set_gdbarch_register_type (gdbarch, h8300_register_type);
1335 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1336
1337 /*
1338 * Frame Info
1339 */
1340 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1341
1342 /* Frame unwinder. */
1343 frame_base_set_default (gdbarch, &h8300_frame_base);
1344
1345 /*
1346 * Miscellany
1347 */
1348 /* Stack grows up. */
1349 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1350
1351 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
1352 h8300_breakpoint::kind_from_pc);
1353 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
1354 h8300_breakpoint::bp_from_kind);
1355 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1356
1357 set_gdbarch_char_signed (gdbarch, 0);
1358 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1359 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1360 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1361
1362 set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1363 set_gdbarch_wchar_signed (gdbarch, 0);
1364
1365 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1366 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1367 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1368 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1369
1370 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1371
1372 /* Hook in the DWARF CFI frame unwinder. */
1373 dwarf2_append_unwinders (gdbarch);
1374 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind);
1375
1376 return gdbarch;
1377
1378 }
1379
1380 void
1381 _initialize_h8300_tdep (void)
1382 {
1383 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1384 }
1385
1386 static int
1387 is_h8300hmode (struct gdbarch *gdbarch)
1388 {
1389 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1390 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1391 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1392 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1393 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1394 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1395 }
1396
1397 static int
1398 is_h8300smode (struct gdbarch *gdbarch)
1399 {
1400 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1401 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1402 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1403 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1404 }
1405
1406 static int
1407 is_h8300sxmode (struct gdbarch *gdbarch)
1408 {
1409 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1410 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1411 }
1412
1413 static int
1414 is_h8300_normal_mode (struct gdbarch *gdbarch)
1415 {
1416 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1417 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1418 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1419 }
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