include/ChangeLog-2016

   1 2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
   2
   3         * elf/common.h: Add PRU ELF.
   4         * elf/pru.h: New file.
   5         * opcode/pru.h: New file.
   6         * dis-asm.h (print_insn_pru): Declare.
   7
   8 2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
   9
  10         * opcode/mips.h: Document `0', `1', `2', `3', `4' and `s'
  11         operand codes.
  12
  13 2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
  14
  15         * opcode/mips.h: Replace `0' and `4' operand codes with `.' and
  16         `F' respectively.
  17
  18 2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
  19
  20         * opcode/mips.h (INSN2_SHORT_ONLY): New macro.
  21
  22 2016-12-21  Alan Modra  <amodra@gmail.com>
  23
  24         * coff/pe.h: Fix comment chars with high bit set.
  25         * opcode/xgate.h: Likewise.
  26
  27 2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
  28
  29         * opcode/mips.h (mips_opcode_32bit_p): New inline function.
  30
  31 2016-12-20  Andrew Waterman  <andrew@sifive.com>
  32
  33         * elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
  34         (EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
  35         (EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
  36         (EF_RISCV_FLOAT_ABI_QUAD): Define.
  37
  38 2016-12-20  Andrew Waterman  <andrew@sifive.com>
  39             Kuan-Lin Chen  <kuanlinchentw@gmail.com>
  40
  41         * elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
  42
  43 2016-12-16  fincs  <fincs.alt1@gmail.com>
  44
  45         * bfdlink.h (struct bfd_link_info): Add gc_keep_exported.
  46
  47 2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
  48
  49         * elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
  50         typedef as `elf_internal_abiflags_v0'.
  51
  52 2016-12-13 Renlin Li <renlin.li@arm.com>
  53
  54         * opcode/aarch64.h (aarch64_operand_class): Remove
  55         AARCH64_OPND_CLASS_CP_REG.
  56         (enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn,
  57         AARCH64_OPND_Cm to AARCH64_OPND_CRm.
  58         (aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier.
  59
  60 2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
  61
  62         * opcode/mips.h: Remove references to `>' operand code.
  63
  64 2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
  65
  66         * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
  67
  68 2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
  69
  70         * opcode/mips.h (ASE_DSPR3): Add a comment.
  71
  72 2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  73
  74         * opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
  75         (ARM_ARCH_V8_3A): New.
  76
  77 2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
  78
  79         * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
  80         instruction classes.
  81
  82 2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
  83
  84         * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
  85         hwcaps2.
  86
  87 2016-11-22  Alan Modra  <amodra@gmail.com>
  88
  89         PR 20744
  90         * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
  91
  92 2016-11-03  David Tolnay <dtolnay@gmail.com>
  93             Mark Wielaard  <mark@klomp.org>
  94
  95         * demangle.h (DMGL_RUST): New macro.
  96         (DMGL_STYLE_MASK): Add DMGL_RUST.
  97         (demangling_styles): Add dlang_rust.
  98         (RUST_DEMANGLING_STYLE_STRING): New macro.
  99         (RUST_DEMANGLING): New macro.
 100         (rust_demangle): New prototype.
 101         (rust_is_mangled): Likewise.
 102         (rust_demangle_sym): Likewise.
 103
 104 2016-11-07  Jason Merrill  <jason@redhat.com>
 105
 106         * demangle.h (enum demangle_component_type): Add
 107         DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
 108
 109 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 110
 111         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
 112         AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
 113         (enum aarch64_op): Add OP_FCMLA_ELEM.
 114
 115 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 116
 117         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
 118         (enum aarch64_insn_class): Add ldst_imm10.
 119
 120 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 121
 122         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
 123
 124 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 125
 126         * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
 127         (AARCH64_ARCH_V8_3): Define.
 128         (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
 129
 130 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 131
 132         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
 133         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
 134         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
 135
 136 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
 137
 138         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
 139
 140 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
 141
 142         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
 143         fields.
 144         (struct arc_long_opcode): Delete.
 145         (struct arc_operand): Change types for insert and extract
 146         handlers.
 147
 148 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
 149
 150         * opcode/arc.h: Make macros 64-bit safe.
 151
 152 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
 153
 154         * opcode/arc.h (arc_opcode_len): Declare.
 155         (ARC_SHORT): Delete.
 156
 157 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
 158             Andrew Waterman <andrew@sifive.com>
 159
 160         Add support for RISC-V architecture.
 161         * dis-asm.h: Add prototypes for print_insn_riscv and
 162         print_riscv_disassembler_options.
 163         * elf/riscv.h: New file.
 164         * opcode/riscv-opc.h: New file.
 165         * opcode/riscv.h: New file.
 166
 167 2016-10-17  Nick Clifton  <nickc@redhat.com>
 168
 169         * elf/common.h (DT_SYMTAB_SHNDX): Define.
 170         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
 171         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
 172         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
 173         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
 174         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
 175         (ELFOSABI_OPENVOS): Define.
 176         (GRP_MASKOS, GRP_MASKPROC): Define.
 177
 178 2016-10-14  Pedro Alves  <palves@redhat.com>
 179
 180         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
 181         OVERRIDE): Define as empty.
 182         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
 183         __final.
 184         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
 185         empty.
 186
 187 2016-10-14  Pedro Alves  <palves@redhat.com>
 188
 189         * ansidecl.h (GCC_FINAL): Delete.
 190         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
 191
 192 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
 193
 194         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
 195
 196 2016-09-29  Alan Modra  <amodra@gmail.com>
 197
 198         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
 199
 200 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
 201
 202         * opcode/arc.h (insn_class_t): Add two new classes.
 203
 204 2016-09-26  Alan Modra  <amodra@gmail.com>
 205
 206         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
 207
 208 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 209
 210         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
 211
 212 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 213
 214         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
 215         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
 216         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
 217         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
 218
 219 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 220
 221         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
 222         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
 223         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
 224         aarch64_insn_classes.
 225
 226 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 227
 228         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 229         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 230         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 231
 232 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 233
 234         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 235         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 236         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 237
 238 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 239
 240         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 241         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 242         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 243         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 244         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 245         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 246         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 247         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 248         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 249         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 250         (aarch64_sve_dupm_mov_immediate_p): Declare.
 251
 252 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 253
 254         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 255         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 256         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 257         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 258         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 259
 260 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 261
 262         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 263         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 264         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 265         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 266         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 267         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 268         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 269         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 270         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 271         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 272         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 273         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 274         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 275         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 276         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 277         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 278         Likewise.
 279
 280 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 281
 282         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 283         aarch64_opnd.
 284         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 285         (aarch64_opnd_info): Make shifter.amount an int64_t and
 286         rearrange the fields.
 287
 288 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 289
 290         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 291         (AARCH64_OPND_SVE_PRFOP): Likewise.
 292         (aarch64_sve_pattern_array): Declare.
 293         (aarch64_sve_prfop_array): Likewise.
 294
 295 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 296
 297         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 298         (AARCH64_OPND_QLF_P_M): Likewise.
 299
 300 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 301
 302         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 303         aarch64_operand_class.
 304         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 305         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 306         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 307         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 308         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 309         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 310         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 311         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 312
 313 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 314
 315         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 316         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 317
 318 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 319
 320         * opcode/aarch64.h (F_STRICT): New flag.
 321
 322 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 323
 324         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 325
 326 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 327         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 328         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 329         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 330         relocation.
 331
 332 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 333
 334         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 335         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 336
 337 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 338
 339         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 340
 341 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 342
 343         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 344
 345 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 346
 347         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 348         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 349         ARC_NUM_ADDRTYPES.
 350         * opcode/arc.h: Add BMU to insn_class_t enum.
 351         * opcode/arc.h: Add PMU to insn_class_t enum.
 352
 353 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 354
 355         * dis-asm.h: Declare print_arc_disassembler_options.
 356
 357 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 358
 359         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 360         out_implib_bfd fields.
 361
 362 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 363
 364         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 365
 366 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 367
 368         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 369         (SHF_ARM_PURECODE): ... this.
 370
 371 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 372
 373         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 374         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 375         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 376         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 377
 378 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 379
 380         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 381         of enabled FPU features.
 382
 383 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 384
 385         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 386         SPARC_OPCODE_ARCH_MAX into the enum.
 387
 388 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 389
 390         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 391
 392 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 393
 394         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 395
 396 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 397
 398         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 399
 400 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 401
 402         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 403         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 404         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 405         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 406
 407 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 408
 409         * opcode/arc.h: Make insn_class_t alphabetical again.
 410
 411 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 412
 413         * elf/dlx.h: Wrap in extern C.
 414         * elf/xtensa.h: Likewise.
 415         * opcode/arc.h: Likewise.
 416
 417 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 418
 419         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 420         tilegx_pipeline.
 421
 422 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 423
 424         * opcode/arc.h: Add nps400 extension and instruction
 425         subclass.
 426         Remove ARC_OPCODE_NPS400
 427         * elf/arc.h: Remove E_ARC_MACH_NPS400
 428
 429 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 430
 431         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 432         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 433         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 434         SPARC_OPCODE_ARCH_V9M.
 435
 436 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 437
 438         * opcode/msp430-decode.h (MSP430_Size): Remove.
 439         (Msp430_Opcode_Decoded): Change type of size to int.
 440
 441 2016-06-11  Alan Modra  <amodra@gmail.com>
 442
 443         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 444
 445 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 446
 447         * opcode/sparc.h: Add missing documentation for hyperprivileged
 448         registers in rd (%) and rs1 ($).
 449
 450 2016-06-07  Alan Modra  <amodra@gmail.com>
 451
 452         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 453         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 454         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 455         PPC_APUINFO_VLE: Define.
 456
 457 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 458
 459         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 460         entries.
 461         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 462
 463 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 464
 465         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 466         (struct arc_long_opcode): New structure.
 467         (arc_long_opcodes): Declare.
 468         (arc_num_long_opcodes): Declare.
 469
 470 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 471
 472         * elf/mips.h: Add extern "C".
 473         * elf/sh.h: Likewise.
 474         * opcode/d10v.h: Likewise.
 475         * opcode/d30v.h: Likewise.
 476         * opcode/ia64.h: Likewise.
 477         * opcode/mips.h: Likewise.
 478         * opcode/ppc.h: Likewise.
 479         * opcode/sparc.h: Likewise.
 480         * opcode/tic6x.h: Likewise.
 481         * opcode/v850.h: Likewise.
 482
 483 2016-05-28  Alan Modra  <amodra@gmail.com>
 484
 485         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 486         Return void from multiple_definition, multiple_common,
 487         add_to_set, constructor, warning, undefined_symbol,
 488         reloc_overflow, reloc_dangerous and unattached_reloc.
 489
 490 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 491
 492         * opcode/metag.h: wrap declarations in extern "C".
 493
 494 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 495
 496         * opcode/arc.h (insn_subclass_t): Add COND.
 497         (flag_class_t): Add F_CLASS_EXTEND.
 498
 499 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 500
 501         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 502         insn_class.
 503         (struct arc_flag_class): Renamed attribute class to flag_class.
 504
 505 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 506
 507         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 508         plain symbol.
 509
 510 2016-04-29  Tom Tromey  <tom@tromey.com>
 511
 512         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 513         DW_LANG_Rust_old>: New constants.
 514
 515 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 516
 517         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 518         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 519         * opcode/mips.h (ASE_DSPR3): New macro.
 520
 521 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 522             Nick Clifton  <nickc@redhat.com>
 523
 524         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 525         enumerator.
 526         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 527         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 528         (ARM_SYM_BRANCH_TYPE): Replace by ...
 529         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 530         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 531         BFD_ASSERT is defined or not.
 532
 533 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 534
 535         * elf/arm.h (Tag_DSP_extension): Define.
 536
 537 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 538
 539         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 540
 541 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 542
 543         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 544         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 545         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 546         for the high core bits.
 547
 548 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 549
 550         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 551         (ARC_SYNTAX_NOP): Likewsie.
 552         (ARC_OP1_MUST_BE_IMM): Update defined value.
 553         (ARC_OP1_IMM_IMPLIED): Likewise.
 554         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 555
 556 2016-04-28  Nick Clifton  <nickc@redhat.com>
 557
 558         PR target/19722
 559         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 560
 561 2016-04-27  Alan Modra  <amodra@gmail.com>
 562
 563         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 564         undef.  Formatting.
 565
 566 2016-04-21  Nick Clifton  <nickc@redhat.com>
 567
 568         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 569
 570 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 571
 572         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 573
 574 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 575
 576         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 577
 578 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 579
 580         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 581
 582 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 583
 584         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 585
 586 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 587
 588         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 589         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 590
 591 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 592
 593         * opcode/arc.h (flag_class_t): Update.
 594         (ARC_OPCODE_NONE): Define.
 595         (ARC_OPCODE_ARCALL): Likewise.
 596         (ARC_OPCODE_ARCFPX): Likewise.
 597         (ARC_REGISTER_READONLY): Likewise.
 598         (ARC_REGISTER_WRITEONLY): Likewise.
 599         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 600         (arc_aux_reg): Add cpu.
 601
 602 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 603
 604         * opcode/arc.h (arc_num_opcodes): Remove.
 605         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 606         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 607         (ARC_SUFFIX_FLAG): Define.
 608         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 609         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 610         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 611         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 612         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 613         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 614         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 615         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 616         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 617         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 618
 619 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 620
 621         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 622         (ARC_FPUDA): Define.
 623         (arc_aux_reg): Add new field.
 624
 625 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 626
 627         * opcode/arc-func.h (replace_bits24): Changed.
 628         (replace_bits24_be): Created.
 629
 630 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 631
 632         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 633         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 634         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 635         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 636         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 637         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 638         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 639         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 640         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 641         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 642         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 643         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 644         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 645         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 646
 647 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 648
 649         * opcode/i960.h: Add const qualifiers.
 650         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 651
 652 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 653
 654         * opcodes/arc.h (insn_class_t): Add BITOP type.
 655
 656 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 657
 658         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 659         new classes instead.
 660
 661 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 662
 663         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 664         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 665
 666 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 667
 668         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 669
 670 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 671
 672         * elf/arc.h (EF_ARC_MACH): Delete.
 673         (EF_ARC_MACH_MSK): Remove out of date comment.
 674
 675 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 676
 677         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 678
 679 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 680
 681         PR ld/19807
 682         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 683
 684 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 685             Andrew Burgess  <andrew.burgess@embecosm.com>
 686
 687         * elf/arc-reloc.def: Add a call to ME within the formula for each
 688         relocation that requires middle-endian correction.
 689
 690 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 691
 692         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 693         * opcode/h8300.h (struct h8_opcode): Likewise.
 694         * opcode/hppa.h (struct pa_opcode): Likewise.
 695         * opcode/msp430.h: Likewise.
 696         * opcode/spu.h (struct spu_opcode): Likewise.
 697         * opcode/tic30.h (struct _register): Likewise.
 698         * opcode/tic4x.h (struct tic4x_register): Likewise.
 699         (struct tic4x_cond): Likewise.
 700         (struct tic4x_indirect): Likewise.
 701         (struct tic4x_inst): Likewise.
 702         * opcode/visium.h (struct reg_entry): Likewise.
 703
 704 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 705
 706         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 707         (ARM_CPU_HAS_FEATURE): Add comment.
 708
 709 2016-03-03  Than McIntosh <thanm@google.com>
 710
 711         * plugin-api.h: Add new hooks to the plugin transfer vector to
 712         to support querying section alignment and section size.
 713         (ld_plugin_get_input_section_alignment): New hook.
 714         (ld_plugin_get_input_section_size): New hook.
 715         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 716         and LDPT_GET_INPUT_SECTION_SIZE.
 717         (ld_plugin_tv): Add tv_get_input_section_alignment and
 718         tv_get_input_section_size.
 719
 720 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 721
 722         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 723
 724 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 725
 726         PR ld/19645
 727         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 728         (bfd_link_info): Add elf_stt_common.
 729
 730 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 731
 732         PR ld/19636
 733         PR ld/19704
 734         PR ld/19719
 735         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 736
 737 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 738             Jiong Wang  <jiong.wang@arm.com>
 739
 740         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 741
 742 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 743             Janek van Oirschot  <jvanoirs@synopsys.com>
 744
 745         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 746         (arc_num_relax_opcodes): Declare.
 747
 748 2016-02-09  Nick Clifton  <nickc@redhat.com>
 749
 750         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 751         * opcode/nds32.h (nds32_r45map): Likewise.
 752         (nds32_r54map): Likewise.
 753         * opcode/visium.h (gen_reg_table): Likewise.
 754         (fp_reg_table, cc_table, opcode_table): Likewise.
 755
 756 2016-02-09  Alan Modra  <amodra@gmail.com>
 757
 758         PR 16583
 759         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 760
 761 2016-02-04  Nick Clifton  <nickc@redhat.com>
 762
 763         PR target/19561
 764         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 765         (RRUX): Synthesise using case 2 rather than 7.
 766
 767 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 768
 769         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 770         (NT_FREEBSD_PROCSTAT_PROC): Define.
 771         (NT_FREEBSD_PROCSTAT_FILES): Define.
 772         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 773         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 774         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 775         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 776         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 777         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 778         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 779
 780 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 781             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 782
 783         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 784         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 785         (ARC_TLS_LE_32): Fixed formula.
 786         (ARC_TLS_GD_LD): Use new special function.
 787         * opcode/arc-func.h: Changed all the replacement
 788         functions to clear the patching bits before doing an or it with the value
 789         argument.
 790
 791 2016-01-18  Nick Clifton  <nickc@redhat.com>
 792
 793         PR ld/19440
 794         * coff/internal.h (internal_syment): Use int to hold section
 795         number.
 796         (N_UNDEF): Cast to int not short.
 797         (N_ABS): Likewise.
 798         (N_DEBUG): Likewise.
 799         (N_TV): Likewise.
 800         (P_TV): Likewise.
 801
 802 2016-01-11  Nick Clifton  <nickc@redhat.com>
 803
 804         Import this change from GCC mainline:
 805
 806         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 807
 808         * longlong.h: Change !__SHMEDIA__ to
 809         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 810         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 811
 812 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 813
 814         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 815
 816 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 817
 818         * libiberty.h (dupargv): Change arg to char * const *.
 819         (writeargv, countargv): Likewise.
 820
 821 2016-01-01  Alan Modra  <amodra@gmail.com>
 822
 823         Update year range in copyright notice of all files.
 824
 825 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 826 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 827 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 828 som/ChangeLog-1015, and vms/ChangeLog-1015
 829 \f
 830 Copyright (C) 2016 Free Software Foundation, Inc.
 831
 832 Copying and distribution of this file, with or without modification,
 833 are permitted in any medium without royalty provided the copyright
 834 notice and this notice are preserved.
 835
 836 Local Variables:
 837 mode: change-log
 838 left-margin: 8
 839 fill-column: 74
 840 version-control: never
 841 End: