8c96654bef16bb8cba98267f2f0e1a42e13e47bc
5 #include <linux/mod_devicetable.h>
7 #include <linux/bcma/bcma_driver_chipcommon.h>
8 #include <linux/bcma/bcma_driver_pci.h>
9 #include <linux/ssb/ssb.h> /* SPROM sharing */
11 #include "bcma_regs.h"
22 struct bcma_chipinfo
{
33 struct bcma_host_ops
{
34 u8 (*read8
)(struct bcma_device
*core
, u16 offset
);
35 u16 (*read16
)(struct bcma_device
*core
, u16 offset
);
36 u32 (*read32
)(struct bcma_device
*core
, u16 offset
);
37 void (*write8
)(struct bcma_device
*core
, u16 offset
, u8 value
);
38 void (*write16
)(struct bcma_device
*core
, u16 offset
, u16 value
);
39 void (*write32
)(struct bcma_device
*core
, u16 offset
, u32 value
);
40 #ifdef CONFIG_BCMA_BLOCKIO
41 void (*block_read
)(struct bcma_device
*core
, void *buffer
,
42 size_t count
, u16 offset
, u8 reg_width
);
43 void (*block_write
)(struct bcma_device
*core
, const void *buffer
,
44 size_t count
, u16 offset
, u8 reg_width
);
47 u32 (*aread32
)(struct bcma_device
*core
, u16 offset
);
48 void (*awrite32
)(struct bcma_device
*core
, u16 offset
, u32 value
);
51 /* Core manufacturers */
52 #define BCMA_MANUF_ARM 0x43B
53 #define BCMA_MANUF_MIPS 0x4A7
54 #define BCMA_MANUF_BCM 0x4BF
56 /* Core class values. */
57 #define BCMA_CL_SIM 0x0
58 #define BCMA_CL_EROM 0x1
59 #define BCMA_CL_CORESIGHT 0x9
60 #define BCMA_CL_VERIF 0xB
61 #define BCMA_CL_OPTIMO 0xD
62 #define BCMA_CL_GEN 0xE
63 #define BCMA_CL_PRIMECELL 0xF
66 #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
67 #define BCMA_CORE_INVALID 0x700
68 #define BCMA_CORE_CHIPCOMMON 0x800
69 #define BCMA_CORE_ILINE20 0x801
70 #define BCMA_CORE_SRAM 0x802
71 #define BCMA_CORE_SDRAM 0x803
72 #define BCMA_CORE_PCI 0x804
73 #define BCMA_CORE_MIPS 0x805
74 #define BCMA_CORE_ETHERNET 0x806
75 #define BCMA_CORE_V90 0x807
76 #define BCMA_CORE_USB11_HOSTDEV 0x808
77 #define BCMA_CORE_ADSL 0x809
78 #define BCMA_CORE_ILINE100 0x80A
79 #define BCMA_CORE_IPSEC 0x80B
80 #define BCMA_CORE_UTOPIA 0x80C
81 #define BCMA_CORE_PCMCIA 0x80D
82 #define BCMA_CORE_INTERNAL_MEM 0x80E
83 #define BCMA_CORE_MEMC_SDRAM 0x80F
84 #define BCMA_CORE_OFDM 0x810
85 #define BCMA_CORE_EXTIF 0x811
86 #define BCMA_CORE_80211 0x812
87 #define BCMA_CORE_PHY_A 0x813
88 #define BCMA_CORE_PHY_B 0x814
89 #define BCMA_CORE_PHY_G 0x815
90 #define BCMA_CORE_MIPS_3302 0x816
91 #define BCMA_CORE_USB11_HOST 0x817
92 #define BCMA_CORE_USB11_DEV 0x818
93 #define BCMA_CORE_USB20_HOST 0x819
94 #define BCMA_CORE_USB20_DEV 0x81A
95 #define BCMA_CORE_SDIO_HOST 0x81B
96 #define BCMA_CORE_ROBOSWITCH 0x81C
97 #define BCMA_CORE_PARA_ATA 0x81D
98 #define BCMA_CORE_SATA_XORDMA 0x81E
99 #define BCMA_CORE_ETHERNET_GBIT 0x81F
100 #define BCMA_CORE_PCIE 0x820
101 #define BCMA_CORE_PHY_N 0x821
102 #define BCMA_CORE_SRAM_CTL 0x822
103 #define BCMA_CORE_MINI_MACPHY 0x823
104 #define BCMA_CORE_ARM_1176 0x824
105 #define BCMA_CORE_ARM_7TDMI 0x825
106 #define BCMA_CORE_PHY_LP 0x826
107 #define BCMA_CORE_PMU 0x827
108 #define BCMA_CORE_PHY_SSN 0x828
109 #define BCMA_CORE_SDIO_DEV 0x829
110 #define BCMA_CORE_ARM_CM3 0x82A
111 #define BCMA_CORE_PHY_HT 0x82B
112 #define BCMA_CORE_MIPS_74K 0x82C
113 #define BCMA_CORE_MAC_GBIT 0x82D
114 #define BCMA_CORE_DDR12_MEM_CTL 0x82E
115 #define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */
116 #define BCMA_CORE_OCP_OCP_BRIDGE 0x830
117 #define BCMA_CORE_SHARED_COMMON 0x831
118 #define BCMA_CORE_OCP_AHB_BRIDGE 0x832
119 #define BCMA_CORE_SPI_HOST 0x833
120 #define BCMA_CORE_I2S 0x834
121 #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
122 #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
123 #define BCMA_CORE_DEFAULT 0xFFF
125 #define BCMA_MAX_NR_CORES 16
128 struct bcma_bus
*bus
;
129 struct bcma_device_id id
;
132 struct device
*dma_dev
;
142 struct list_head list
;
145 static inline void *bcma_get_drvdata(struct bcma_device
*core
)
147 return core
->drvdata
;
149 static inline void bcma_set_drvdata(struct bcma_device
*core
, void *drvdata
)
151 core
->drvdata
= drvdata
;
156 const struct bcma_device_id
*id_table
;
158 int (*probe
)(struct bcma_device
*dev
);
159 void (*remove
)(struct bcma_device
*dev
);
160 int (*suspend
)(struct bcma_device
*dev
, pm_message_t state
);
161 int (*resume
)(struct bcma_device
*dev
);
162 void (*shutdown
)(struct bcma_device
*dev
);
164 struct device_driver drv
;
167 int __bcma_driver_register(struct bcma_driver
*drv
, struct module
*owner
);
168 static inline int bcma_driver_register(struct bcma_driver
*drv
)
170 return __bcma_driver_register(drv
, THIS_MODULE
);
172 extern void bcma_driver_unregister(struct bcma_driver
*drv
);
178 const struct bcma_host_ops
*ops
;
180 enum bcma_hosttype hosttype
;
182 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
183 struct pci_dev
*host_pci
;
184 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
185 struct sdio_func
*host_sdio
;
188 struct bcma_chipinfo chipinfo
;
190 struct bcma_device
*mapped_core
;
191 struct list_head cores
;
194 struct bcma_drv_cc drv_cc
;
195 struct bcma_drv_pci drv_pci
;
197 /* We decided to share SPROM struct with SSB as long as we do not need
198 * any hacks for BCMA. This simplifies drivers code. */
199 struct ssb_sprom sprom
;
202 extern inline u32
bcma_read8(struct bcma_device
*core
, u16 offset
)
204 return core
->bus
->ops
->read8(core
, offset
);
206 extern inline u32
bcma_read16(struct bcma_device
*core
, u16 offset
)
208 return core
->bus
->ops
->read16(core
, offset
);
210 extern inline u32
bcma_read32(struct bcma_device
*core
, u16 offset
)
212 return core
->bus
->ops
->read32(core
, offset
);
215 void bcma_write8(struct bcma_device
*core
, u16 offset
, u32 value
)
217 core
->bus
->ops
->write8(core
, offset
, value
);
220 void bcma_write16(struct bcma_device
*core
, u16 offset
, u32 value
)
222 core
->bus
->ops
->write16(core
, offset
, value
);
225 void bcma_write32(struct bcma_device
*core
, u16 offset
, u32 value
)
227 core
->bus
->ops
->write32(core
, offset
, value
);
229 #ifdef CONFIG_BCMA_BLOCKIO
230 extern inline void bcma_block_read(struct bcma_device
*core
, void *buffer
,
231 size_t count
, u16 offset
, u8 reg_width
)
233 core
->bus
->ops
->block_read(core
, buffer
, count
, offset
, reg_width
);
235 extern inline void bcma_block_write(struct bcma_device
*core
, const void *buffer
,
236 size_t count
, u16 offset
, u8 reg_width
)
238 core
->bus
->ops
->block_write(core
, buffer
, count
, offset
, reg_width
);
241 extern inline u32
bcma_aread32(struct bcma_device
*core
, u16 offset
)
243 return core
->bus
->ops
->aread32(core
, offset
);
246 void bcma_awrite32(struct bcma_device
*core
, u16 offset
, u32 value
)
248 core
->bus
->ops
->awrite32(core
, offset
, value
);
251 #define bcma_mask32(cc, offset, mask) \
252 bcma_write32(cc, offset, bcma_read32(cc, offset) & (mask))
253 #define bcma_set32(cc, offset, set) \
254 bcma_write32(cc, offset, bcma_read32(cc, offset) | (set))
255 #define bcma_maskset32(cc, offset, mask, set) \
256 bcma_write32(cc, offset, (bcma_read32(cc, offset) & (mask)) | (set))
258 extern bool bcma_core_is_enabled(struct bcma_device
*core
);
259 extern void bcma_core_disable(struct bcma_device
*core
, u32 flags
);
260 extern int bcma_core_enable(struct bcma_device
*core
, u32 flags
);
261 extern void bcma_core_set_clockmode(struct bcma_device
*core
,
262 enum bcma_clkmode clkmode
);
263 extern void bcma_core_pll_ctl(struct bcma_device
*core
, u32 req
, u32 status
,
265 #define BCMA_DMA_TRANSLATION_MASK 0xC0000000
266 #define BCMA_DMA_TRANSLATION_NONE 0x00000000
267 #define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
268 #define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
269 extern u32
bcma_core_dma_translation(struct bcma_device
*core
);
271 #endif /* LINUX_BCMA_H_ */
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