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[PATCH] libata-dev: Cleanup unused enums/functions
[deliverable/linux.git] / include / linux / libata.h
1 /*
2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
24 */
25
26 #ifndef __LINUX_LIBATA_H__
27 #define __LINUX_LIBATA_H__
28
29 #include <linux/delay.h>
30 #include <linux/interrupt.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <asm/io.h>
34 #include <linux/ata.h>
35 #include <linux/workqueue.h>
36
37 /*
38 * compile-time options: to be removed as soon as all the drivers are
39 * converted to the new debugging mechanism
40 */
41 #undef ATA_DEBUG /* debugging output */
42 #undef ATA_VERBOSE_DEBUG /* yet more debugging output */
43 #undef ATA_IRQ_TRAP /* define to ack screaming irqs */
44 #undef ATA_NDEBUG /* define to disable quick runtime checks */
45 #undef ATA_ENABLE_PATA /* define to enable PATA support in some
46 * low-level drivers */
47 #undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
48
49
50 /* note: prints function name for you */
51 #ifdef ATA_DEBUG
52 #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
53 #ifdef ATA_VERBOSE_DEBUG
54 #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
55 #else
56 #define VPRINTK(fmt, args...)
57 #endif /* ATA_VERBOSE_DEBUG */
58 #else
59 #define DPRINTK(fmt, args...)
60 #define VPRINTK(fmt, args...)
61 #endif /* ATA_DEBUG */
62
63 #define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64
65 /* NEW: debug levels */
66 #define HAVE_LIBATA_MSG 1
67
68 enum {
69 ATA_MSG_DRV = 0x0001,
70 ATA_MSG_INFO = 0x0002,
71 ATA_MSG_PROBE = 0x0004,
72 ATA_MSG_WARN = 0x0008,
73 ATA_MSG_MALLOC = 0x0010,
74 ATA_MSG_CTL = 0x0020,
75 ATA_MSG_INTR = 0x0040,
76 ATA_MSG_ERR = 0x0080,
77 };
78
79 #define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
80 #define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
81 #define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
82 #define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
83 #define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
84 #define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
85 #define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
86 #define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
87
88 static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
89 {
90 if (dval < 0 || dval >= (sizeof(u32) * 8))
91 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
92 if (!dval)
93 return 0;
94 return (1 << dval) - 1;
95 }
96
97 /* defines only for the constants which don't work well as enums */
98 #define ATA_TAG_POISON 0xfafbfcfdU
99
100 /* move to PCI layer? */
101 static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
102 {
103 return &pdev->dev;
104 }
105
106 enum {
107 /* various global constants */
108 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
109 ATA_MAX_PORTS = 8,
110 ATA_DEF_QUEUE = 1,
111 ATA_MAX_QUEUE = 1,
112 ATA_MAX_SECTORS = 200, /* FIXME */
113 ATA_MAX_BUS = 2,
114 ATA_DEF_BUSY_WAIT = 10000,
115 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
116
117 ATA_SHT_EMULATED = 1,
118 ATA_SHT_CMD_PER_LUN = 1,
119 ATA_SHT_THIS_ID = -1,
120 ATA_SHT_USE_CLUSTERING = 1,
121
122 /* struct ata_device stuff */
123 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
124 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
125 ATA_DFLAG_LBA = (1 << 2), /* device supports LBA */
126 ATA_DFLAG_CDB_INTR = (1 << 3), /* device asserts INTRQ when ready for CDB */
127
128 ATA_DEV_UNKNOWN = 0, /* unknown device */
129 ATA_DEV_ATA = 1, /* ATA device */
130 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
131 ATA_DEV_ATAPI = 3, /* ATAPI device */
132 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
133 ATA_DEV_NONE = 5, /* no device */
134
135 /* struct ata_port flags */
136 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
137 /* (doesn't imply presence) */
138 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
139 ATA_FLAG_SATA = (1 << 3),
140 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
141 ATA_FLAG_SRST = (1 << 5), /* (obsolete) use ATA SRST, not E.D.D. */
142 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
143 ATA_FLAG_SATA_RESET = (1 << 7), /* (obsolete) use COMRESET */
144 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
145 ATA_FLAG_PIO_POLLING = (1 << 9), /* use polling PIO if LLD
146 * doesn't handle PIO interrupts */
147 ATA_FLAG_DEBUGMSG = (1 << 10),
148 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
149
150 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
151
152 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */
153 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */
154
155 ATA_FLAG_FLUSH_PORT_TASK = (1 << 15), /* Flush port task */
156 ATA_FLAG_IN_EH = (1 << 16), /* EH in progress */
157
158 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
159 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
160 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
161 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
162 ATA_QCFLAG_EH_SCHEDULED = (1 << 5), /* EH scheduled */
163
164 /* various lengths of time */
165 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
166 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
167 ATA_TMOUT_INTERNAL = 30 * HZ,
168 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
169
170 /* ATA bus states */
171 BUS_UNKNOWN = 0,
172 BUS_DMA = 1,
173 BUS_IDLE = 2,
174 BUS_NOINTR = 3,
175 BUS_NODATA = 4,
176 BUS_TIMER = 5,
177 BUS_PIO = 6,
178 BUS_EDD = 7,
179 BUS_IDENTIFY = 8,
180 BUS_PACKET = 9,
181
182 /* SATA port states */
183 PORT_UNKNOWN = 0,
184 PORT_ENABLED = 1,
185 PORT_DISABLED = 2,
186
187 /* encoding various smaller bitmaps into a single
188 * unsigned int bitmap
189 */
190 ATA_BITS_PIO = 5,
191 ATA_BITS_MWDMA = 3,
192 ATA_BITS_UDMA = 8,
193
194 ATA_SHIFT_PIO = 0,
195 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO,
196 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA,
197
198 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO,
199 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA,
200 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA,
201
202 /* size of buffer to pad xfers ending on unaligned boundaries */
203 ATA_DMA_PAD_SZ = 4,
204 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
205
206 /* Masks for port functions */
207 ATA_PORT_PRIMARY = (1 << 0),
208 ATA_PORT_SECONDARY = (1 << 1),
209 };
210
211 enum hsm_task_states {
212 HSM_ST_UNKNOWN, /* state unknown */
213 HSM_ST_IDLE, /* no command on going */
214 HSM_ST, /* (waiting the device to) transfer data */
215 HSM_ST_LAST, /* (waiting the device to) complete command */
216 HSM_ST_ERR, /* error */
217 HSM_ST_FIRST, /* (waiting the device to)
218 write CDB or first data block */
219 };
220
221 enum ata_completion_errors {
222 AC_ERR_DEV = (1 << 0), /* device reported error */
223 AC_ERR_HSM = (1 << 1), /* host state machine violation */
224 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
225 AC_ERR_MEDIA = (1 << 3), /* media error */
226 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
227 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
228 AC_ERR_SYSTEM = (1 << 6), /* system error */
229 AC_ERR_INVALID = (1 << 7), /* invalid argument */
230 AC_ERR_OTHER = (1 << 8), /* unknown */
231 };
232
233 /* forward declarations */
234 struct scsi_device;
235 struct ata_port_operations;
236 struct ata_port;
237 struct ata_queued_cmd;
238
239 /* typedefs */
240 typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
241 typedef void (*ata_probeinit_fn_t)(struct ata_port *);
242 typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *);
243 typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *);
244
245 struct ata_ioports {
246 unsigned long cmd_addr;
247 unsigned long data_addr;
248 unsigned long error_addr;
249 unsigned long feature_addr;
250 unsigned long nsect_addr;
251 unsigned long lbal_addr;
252 unsigned long lbam_addr;
253 unsigned long lbah_addr;
254 unsigned long device_addr;
255 unsigned long status_addr;
256 unsigned long command_addr;
257 unsigned long altstatus_addr;
258 unsigned long ctl_addr;
259 unsigned long bmdma_addr;
260 unsigned long scr_addr;
261 };
262
263 struct ata_probe_ent {
264 struct list_head node;
265 struct device *dev;
266 const struct ata_port_operations *port_ops;
267 struct scsi_host_template *sht;
268 struct ata_ioports port[ATA_MAX_PORTS];
269 unsigned int n_ports;
270 unsigned int hard_port_no;
271 unsigned int pio_mask;
272 unsigned int mwdma_mask;
273 unsigned int udma_mask;
274 unsigned int legacy_mode;
275 unsigned long irq;
276 unsigned int irq_flags;
277 unsigned long host_flags;
278 void __iomem *mmio_base;
279 void *private_data;
280 };
281
282 struct ata_host_set {
283 spinlock_t lock;
284 struct device *dev;
285 unsigned long irq;
286 void __iomem *mmio_base;
287 unsigned int n_ports;
288 void *private_data;
289 const struct ata_port_operations *ops;
290 struct ata_port * ports[0];
291 };
292
293 struct ata_queued_cmd {
294 struct ata_port *ap;
295 struct ata_device *dev;
296
297 struct scsi_cmnd *scsicmd;
298 void (*scsidone)(struct scsi_cmnd *);
299
300 struct ata_taskfile tf;
301 u8 cdb[ATAPI_CDB_LEN];
302
303 unsigned long flags; /* ATA_QCFLAG_xxx */
304 unsigned int tag;
305 unsigned int n_elem;
306 unsigned int orig_n_elem;
307
308 int dma_dir;
309
310 unsigned int pad_len;
311
312 unsigned int nsect;
313 unsigned int cursect;
314
315 unsigned int nbytes;
316 unsigned int curbytes;
317
318 unsigned int cursg;
319 unsigned int cursg_ofs;
320
321 struct scatterlist sgent;
322 struct scatterlist pad_sgent;
323 void *buf_virt;
324
325 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
326 struct scatterlist *__sg;
327
328 unsigned int err_mask;
329
330 ata_qc_cb_t complete_fn;
331
332 void *private_data;
333 };
334
335 struct ata_host_stats {
336 unsigned long unhandled_irq;
337 unsigned long idle_irq;
338 unsigned long rw_reqbuf;
339 };
340
341 struct ata_device {
342 u64 n_sectors; /* size of device, if ATA */
343 unsigned long flags; /* ATA_DFLAG_xxx */
344 unsigned int class; /* ATA_DEV_xxx */
345 unsigned int devno; /* 0 or 1 */
346 u16 *id; /* IDENTIFY xxx DEVICE data */
347 u8 pio_mode;
348 u8 dma_mode;
349 u8 xfer_mode;
350 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
351
352 unsigned int multi_count; /* sectors count for
353 READ/WRITE MULTIPLE */
354 unsigned int max_sectors; /* per-device max sectors */
355 unsigned int cdb_len;
356
357 /* per-dev xfer mask */
358 unsigned int pio_mask;
359 unsigned int mwdma_mask;
360 unsigned int udma_mask;
361
362 /* for CHS addressing */
363 u16 cylinders; /* Number of cylinders */
364 u16 heads; /* Number of heads */
365 u16 sectors; /* Number of sectors per track */
366 };
367
368 struct ata_port {
369 struct Scsi_Host *host; /* our co-allocated scsi host */
370 const struct ata_port_operations *ops;
371 unsigned long flags; /* ATA_FLAG_xxx */
372 unsigned int id; /* unique id req'd by scsi midlyr */
373 unsigned int port_no; /* unique port #; from zero */
374 unsigned int hard_port_no; /* hardware port #; from zero */
375
376 struct ata_prd *prd; /* our SG list */
377 dma_addr_t prd_dma; /* and its DMA mapping */
378
379 void *pad; /* array of DMA pad buffers */
380 dma_addr_t pad_dma;
381
382 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
383
384 u8 ctl; /* cache of ATA control register */
385 u8 last_ctl; /* Cache last written value */
386 unsigned int pio_mask;
387 unsigned int mwdma_mask;
388 unsigned int udma_mask;
389 unsigned int cbl; /* cable type; ATA_CBL_xxx */
390
391 struct ata_device device[ATA_MAX_DEVICES];
392
393 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
394 unsigned long qactive;
395 unsigned int active_tag;
396
397 struct ata_host_stats stats;
398 struct ata_host_set *host_set;
399 struct device *dev;
400
401 struct work_struct port_task;
402
403 unsigned int hsm_task_state;
404
405 u32 msg_enable;
406 struct list_head eh_done_q;
407
408 void *private_data;
409 };
410
411 struct ata_port_operations {
412 void (*port_disable) (struct ata_port *);
413
414 void (*dev_config) (struct ata_port *, struct ata_device *);
415
416 void (*set_piomode) (struct ata_port *, struct ata_device *);
417 void (*set_dmamode) (struct ata_port *, struct ata_device *);
418
419 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
420 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
421
422 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
423 u8 (*check_status)(struct ata_port *ap);
424 u8 (*check_altstatus)(struct ata_port *ap);
425 void (*dev_select)(struct ata_port *ap, unsigned int device);
426
427 void (*phy_reset) (struct ata_port *ap); /* obsolete */
428 int (*probe_reset) (struct ata_port *ap, unsigned int *classes);
429
430 void (*post_set_mode) (struct ata_port *ap);
431
432 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
433
434 void (*bmdma_setup) (struct ata_queued_cmd *qc);
435 void (*bmdma_start) (struct ata_queued_cmd *qc);
436
437 void (*qc_prep) (struct ata_queued_cmd *qc);
438 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
439
440 void (*eng_timeout) (struct ata_port *ap);
441
442 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
443 void (*irq_clear) (struct ata_port *);
444
445 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
446 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
447 u32 val);
448
449 int (*port_start) (struct ata_port *ap);
450 void (*port_stop) (struct ata_port *ap);
451
452 void (*host_stop) (struct ata_host_set *host_set);
453
454 void (*bmdma_stop) (struct ata_queued_cmd *qc);
455 u8 (*bmdma_status) (struct ata_port *ap);
456 };
457
458 struct ata_port_info {
459 struct scsi_host_template *sht;
460 unsigned long host_flags;
461 unsigned long pio_mask;
462 unsigned long mwdma_mask;
463 unsigned long udma_mask;
464 const struct ata_port_operations *port_ops;
465 void *private_data;
466 };
467
468 struct ata_timing {
469 unsigned short mode; /* ATA mode */
470 unsigned short setup; /* t1 */
471 unsigned short act8b; /* t2 for 8-bit I/O */
472 unsigned short rec8b; /* t2i for 8-bit I/O */
473 unsigned short cyc8b; /* t0 for 8-bit I/O */
474 unsigned short active; /* t2 or tD */
475 unsigned short recover; /* t2i or tK */
476 unsigned short cycle; /* t0 */
477 unsigned short udma; /* t2CYCTYP/2 */
478 };
479
480 #define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
481
482 extern void ata_port_probe(struct ata_port *);
483 extern void __sata_phy_reset(struct ata_port *ap);
484 extern void sata_phy_reset(struct ata_port *ap);
485 extern void ata_bus_reset(struct ata_port *ap);
486 extern int ata_drive_probe_reset(struct ata_port *ap,
487 ata_probeinit_fn_t probeinit,
488 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
489 ata_postreset_fn_t postreset, unsigned int *classes);
490 extern void ata_std_probeinit(struct ata_port *ap);
491 extern int ata_std_softreset(struct ata_port *ap, int verbose,
492 unsigned int *classes);
493 extern int sata_std_hardreset(struct ata_port *ap, int verbose,
494 unsigned int *class);
495 extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
496 extern int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
497 int post_reset);
498 extern void ata_port_disable(struct ata_port *);
499 extern void ata_std_ports(struct ata_ioports *ioaddr);
500 #ifdef CONFIG_PCI
501 extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
502 unsigned int n_ports);
503 extern void ata_pci_remove_one (struct pci_dev *pdev);
504 extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
505 extern int ata_pci_device_resume(struct pci_dev *pdev);
506 extern int ata_pci_clear_simplex(struct pci_dev *pdev);
507 #endif /* CONFIG_PCI */
508 extern int ata_device_add(const struct ata_probe_ent *ent);
509 extern void ata_host_set_remove(struct ata_host_set *host_set);
510 extern int ata_scsi_detect(struct scsi_host_template *sht);
511 extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
512 extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
513 extern int ata_scsi_error(struct Scsi_Host *host);
514 extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
515 extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
516 extern int ata_scsi_release(struct Scsi_Host *host);
517 extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
518 extern int ata_scsi_device_resume(struct scsi_device *);
519 extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t state);
520 extern int ata_device_resume(struct ata_port *, struct ata_device *);
521 extern int ata_device_suspend(struct ata_port *, struct ata_device *, pm_message_t state);
522 extern int ata_ratelimit(void);
523 extern unsigned int ata_busy_sleep(struct ata_port *ap,
524 unsigned long timeout_pat,
525 unsigned long timeout);
526 extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *),
527 void *data, unsigned long delay);
528
529 /*
530 * Default driver ops implementations
531 */
532 extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
533 extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
534 extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
535 extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
536 extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
537 extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
538 extern u8 ata_check_status(struct ata_port *ap);
539 extern u8 ata_altstatus(struct ata_port *ap);
540 extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
541 extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes);
542 extern int ata_port_start (struct ata_port *ap);
543 extern void ata_port_stop (struct ata_port *ap);
544 extern void ata_host_stop (struct ata_host_set *host_set);
545 extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
546 extern void ata_qc_prep(struct ata_queued_cmd *qc);
547 extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
548 extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
549 extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
550 unsigned int buflen);
551 extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
552 unsigned int n_elem);
553 extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
554 extern void ata_id_string(const u16 *id, unsigned char *s,
555 unsigned int ofs, unsigned int len);
556 extern void ata_id_c_string(const u16 *id, unsigned char *s,
557 unsigned int ofs, unsigned int len);
558 extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
559 extern void ata_bmdma_start (struct ata_queued_cmd *qc);
560 extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
561 extern u8 ata_bmdma_status(struct ata_port *ap);
562 extern void ata_bmdma_irq_clear(struct ata_port *ap);
563 extern void __ata_qc_complete(struct ata_queued_cmd *qc);
564 extern void ata_eng_timeout(struct ata_port *ap);
565 extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev,
566 struct scsi_cmnd *cmd,
567 void (*done)(struct scsi_cmnd *));
568 extern int ata_std_bios_param(struct scsi_device *sdev,
569 struct block_device *bdev,
570 sector_t capacity, int geom[]);
571 extern int ata_scsi_slave_config(struct scsi_device *sdev);
572 extern struct ata_device *ata_dev_pair(struct ata_port *ap,
573 struct ata_device *adev);
574
575 /*
576 * Timing helpers
577 */
578
579 extern unsigned int ata_pio_need_iordy(const struct ata_device *);
580 extern int ata_timing_compute(struct ata_device *, unsigned short,
581 struct ata_timing *, int, int);
582 extern void ata_timing_merge(const struct ata_timing *,
583 const struct ata_timing *, struct ata_timing *,
584 unsigned int);
585
586 enum {
587 ATA_TIMING_SETUP = (1 << 0),
588 ATA_TIMING_ACT8B = (1 << 1),
589 ATA_TIMING_REC8B = (1 << 2),
590 ATA_TIMING_CYC8B = (1 << 3),
591 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
592 ATA_TIMING_CYC8B,
593 ATA_TIMING_ACTIVE = (1 << 4),
594 ATA_TIMING_RECOVER = (1 << 5),
595 ATA_TIMING_CYCLE = (1 << 6),
596 ATA_TIMING_UDMA = (1 << 7),
597 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
598 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
599 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
600 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
601 };
602
603
604 #ifdef CONFIG_PCI
605 struct pci_bits {
606 unsigned int reg; /* PCI config register to read */
607 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
608 unsigned long mask;
609 unsigned long val;
610 };
611
612 extern void ata_pci_host_stop (struct ata_host_set *host_set);
613 extern struct ata_probe_ent *
614 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
615 extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
616 extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long);
617 #endif /* CONFIG_PCI */
618
619
620 static inline int
621 ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
622 {
623 if (sg == &qc->pad_sgent)
624 return 1;
625 if (qc->pad_len)
626 return 0;
627 if (((sg - qc->__sg) + 1) == qc->n_elem)
628 return 1;
629 return 0;
630 }
631
632 static inline struct scatterlist *
633 ata_qc_first_sg(struct ata_queued_cmd *qc)
634 {
635 if (qc->n_elem)
636 return qc->__sg;
637 if (qc->pad_len)
638 return &qc->pad_sgent;
639 return NULL;
640 }
641
642 static inline struct scatterlist *
643 ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
644 {
645 if (sg == &qc->pad_sgent)
646 return NULL;
647 if (++sg - qc->__sg < qc->n_elem)
648 return sg;
649 if (qc->pad_len)
650 return &qc->pad_sgent;
651 return NULL;
652 }
653
654 #define ata_for_each_sg(sg, qc) \
655 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc))
656
657 static inline unsigned int ata_tag_valid(unsigned int tag)
658 {
659 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
660 }
661
662 static inline unsigned int ata_class_present(unsigned int class)
663 {
664 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
665 }
666
667 static inline unsigned int ata_dev_present(const struct ata_device *dev)
668 {
669 return ata_class_present(dev->class);
670 }
671
672 static inline u8 ata_chk_status(struct ata_port *ap)
673 {
674 return ap->ops->check_status(ap);
675 }
676
677
678 /**
679 * ata_pause - Flush writes and pause 400 nanoseconds.
680 * @ap: Port to wait for.
681 *
682 * LOCKING:
683 * Inherited from caller.
684 */
685
686 static inline void ata_pause(struct ata_port *ap)
687 {
688 ata_altstatus(ap);
689 ndelay(400);
690 }
691
692
693 /**
694 * ata_busy_wait - Wait for a port status register
695 * @ap: Port to wait for.
696 *
697 * Waits up to max*10 microseconds for the selected bits in the port's
698 * status register to be cleared.
699 * Returns final value of status register.
700 *
701 * LOCKING:
702 * Inherited from caller.
703 */
704
705 static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
706 unsigned int max)
707 {
708 u8 status;
709
710 do {
711 udelay(10);
712 status = ata_chk_status(ap);
713 max--;
714 } while ((status & bits) && (max > 0));
715
716 return status;
717 }
718
719
720 /**
721 * ata_wait_idle - Wait for a port to be idle.
722 * @ap: Port to wait for.
723 *
724 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
725 * Returns final value of status register.
726 *
727 * LOCKING:
728 * Inherited from caller.
729 */
730
731 static inline u8 ata_wait_idle(struct ata_port *ap)
732 {
733 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
734
735 if (status & (ATA_BUSY | ATA_DRQ)) {
736 unsigned long l = ap->ioaddr.status_addr;
737 if (ata_msg_warn(ap))
738 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
739 status, l);
740 }
741
742 return status;
743 }
744
745 static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
746 {
747 qc->tf.ctl |= ATA_NIEN;
748 }
749
750 static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
751 unsigned int tag)
752 {
753 if (likely(ata_tag_valid(tag)))
754 return &ap->qcmd[tag];
755 return NULL;
756 }
757
758 static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
759 {
760 memset(tf, 0, sizeof(*tf));
761
762 tf->ctl = ap->ctl;
763 if (device == 0)
764 tf->device = ATA_DEVICE_OBS;
765 else
766 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
767 }
768
769 static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
770 {
771 qc->__sg = NULL;
772 qc->flags = 0;
773 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
774 qc->nsect = 0;
775 qc->nbytes = qc->curbytes = 0;
776 qc->err_mask = 0;
777
778 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
779 }
780
781 /**
782 * ata_qc_complete - Complete an active ATA command
783 * @qc: Command to complete
784 * @err_mask: ATA Status register contents
785 *
786 * Indicate to the mid and upper layers that an ATA
787 * command has completed, with either an ok or not-ok status.
788 *
789 * LOCKING:
790 * spin_lock_irqsave(host_set lock)
791 */
792 static inline void ata_qc_complete(struct ata_queued_cmd *qc)
793 {
794 if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED))
795 return;
796
797 __ata_qc_complete(qc);
798 }
799
800 /**
801 * ata_irq_on - Enable interrupts on a port.
802 * @ap: Port on which interrupts are enabled.
803 *
804 * Enable interrupts on a legacy IDE device using MMIO or PIO,
805 * wait for idle, clear any pending interrupts.
806 *
807 * LOCKING:
808 * Inherited from caller.
809 */
810
811 static inline u8 ata_irq_on(struct ata_port *ap)
812 {
813 struct ata_ioports *ioaddr = &ap->ioaddr;
814 u8 tmp;
815
816 ap->ctl &= ~ATA_NIEN;
817 ap->last_ctl = ap->ctl;
818
819 if (ap->flags & ATA_FLAG_MMIO)
820 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
821 else
822 outb(ap->ctl, ioaddr->ctl_addr);
823 tmp = ata_wait_idle(ap);
824
825 ap->ops->irq_clear(ap);
826
827 return tmp;
828 }
829
830
831 /**
832 * ata_irq_ack - Acknowledge a device interrupt.
833 * @ap: Port on which interrupts are enabled.
834 *
835 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
836 * or BUSY+DRQ clear). Obtain dma status and port status from
837 * device. Clear the interrupt. Return port status.
838 *
839 * LOCKING:
840 */
841
842 static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
843 {
844 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
845 u8 host_stat, post_stat, status;
846
847 status = ata_busy_wait(ap, bits, 1000);
848 if (status & bits)
849 if (ata_msg_err(ap))
850 printk(KERN_ERR "abnormal status 0x%X\n", status);
851
852 /* get controller status; clear intr, err bits */
853 if (ap->flags & ATA_FLAG_MMIO) {
854 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
855 host_stat = readb(mmio + ATA_DMA_STATUS);
856 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
857 mmio + ATA_DMA_STATUS);
858
859 post_stat = readb(mmio + ATA_DMA_STATUS);
860 } else {
861 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
862 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
863 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
864
865 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
866 }
867
868 if (ata_msg_intr(ap))
869 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
870 __FUNCTION__,
871 host_stat, post_stat, status);
872
873 return status;
874 }
875
876 static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
877 {
878 return ap->ops->scr_read(ap, reg);
879 }
880
881 static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
882 {
883 ap->ops->scr_write(ap, reg, val);
884 }
885
886 static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
887 u32 val)
888 {
889 ap->ops->scr_write(ap, reg, val);
890 (void) ap->ops->scr_read(ap, reg);
891 }
892
893 static inline unsigned int sata_dev_present(struct ata_port *ap)
894 {
895 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
896 }
897
898 static inline int ata_try_flush_cache(const struct ata_device *dev)
899 {
900 return ata_id_wcache_enabled(dev->id) ||
901 ata_id_has_flush(dev->id) ||
902 ata_id_has_flush_ext(dev->id);
903 }
904
905 static inline unsigned int ac_err_mask(u8 status)
906 {
907 if (status & ATA_BUSY)
908 return AC_ERR_HSM;
909 if (status & (ATA_ERR | ATA_DF))
910 return AC_ERR_DEV;
911 return 0;
912 }
913
914 static inline unsigned int __ac_err_mask(u8 status)
915 {
916 unsigned int mask = ac_err_mask(status);
917 if (mask == 0)
918 return AC_ERR_OTHER;
919 return mask;
920 }
921
922 static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
923 {
924 ap->pad_dma = 0;
925 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
926 &ap->pad_dma, GFP_KERNEL);
927 return (ap->pad == NULL) ? -ENOMEM : 0;
928 }
929
930 static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
931 {
932 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
933 }
934
935 #endif /* __LINUX_LIBATA_H__ */
Linux kernel - Deliverables
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