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[PATCH] libata: BMDMA handling updates
[deliverable/linux.git] / include / linux / libata.h
1 /*
2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
24 */
25
26 #ifndef __LINUX_LIBATA_H__
27 #define __LINUX_LIBATA_H__
28
29 #include <linux/delay.h>
30 #include <linux/interrupt.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <asm/io.h>
34 #include <linux/ata.h>
35 #include <linux/workqueue.h>
36
37 /*
38 * compile-time options: to be removed as soon as all the drivers are
39 * converted to the new debugging mechanism
40 */
41 #undef ATA_DEBUG /* debugging output */
42 #undef ATA_VERBOSE_DEBUG /* yet more debugging output */
43 #undef ATA_IRQ_TRAP /* define to ack screaming irqs */
44 #undef ATA_NDEBUG /* define to disable quick runtime checks */
45 #undef ATA_ENABLE_PATA /* define to enable PATA support in some
46 * low-level drivers */
47 #undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
48
49
50 /* note: prints function name for you */
51 #ifdef ATA_DEBUG
52 #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
53 #ifdef ATA_VERBOSE_DEBUG
54 #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
55 #else
56 #define VPRINTK(fmt, args...)
57 #endif /* ATA_VERBOSE_DEBUG */
58 #else
59 #define DPRINTK(fmt, args...)
60 #define VPRINTK(fmt, args...)
61 #endif /* ATA_DEBUG */
62
63 #define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64
65 /* NEW: debug levels */
66 #define HAVE_LIBATA_MSG 1
67
68 enum {
69 ATA_MSG_DRV = 0x0001,
70 ATA_MSG_INFO = 0x0002,
71 ATA_MSG_PROBE = 0x0004,
72 ATA_MSG_WARN = 0x0008,
73 ATA_MSG_MALLOC = 0x0010,
74 ATA_MSG_CTL = 0x0020,
75 ATA_MSG_INTR = 0x0040,
76 ATA_MSG_ERR = 0x0080,
77 };
78
79 #define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
80 #define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
81 #define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
82 #define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
83 #define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
84 #define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
85 #define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
86 #define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
87
88 static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
89 {
90 if (dval < 0 || dval >= (sizeof(u32) * 8))
91 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
92 if (!dval)
93 return 0;
94 return (1 << dval) - 1;
95 }
96
97 /* defines only for the constants which don't work well as enums */
98 #define ATA_TAG_POISON 0xfafbfcfdU
99
100 /* move to PCI layer? */
101 static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
102 {
103 return &pdev->dev;
104 }
105
106 enum {
107 /* various global constants */
108 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
109 ATA_MAX_PORTS = 8,
110 ATA_DEF_QUEUE = 1,
111 ATA_MAX_QUEUE = 1,
112 ATA_MAX_SECTORS = 200, /* FIXME */
113 ATA_MAX_BUS = 2,
114 ATA_DEF_BUSY_WAIT = 10000,
115 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
116
117 ATA_SHT_EMULATED = 1,
118 ATA_SHT_CMD_PER_LUN = 1,
119 ATA_SHT_THIS_ID = -1,
120 ATA_SHT_USE_CLUSTERING = 1,
121
122 /* struct ata_device stuff */
123 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
124 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
125 ATA_DFLAG_LBA = (1 << 2), /* device supports LBA */
126
127 ATA_DEV_UNKNOWN = 0, /* unknown device */
128 ATA_DEV_ATA = 1, /* ATA device */
129 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
130 ATA_DEV_ATAPI = 3, /* ATAPI device */
131 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
132 ATA_DEV_NONE = 5, /* no device */
133
134 /* struct ata_port flags */
135 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
136 /* (doesn't imply presence) */
137 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
138 ATA_FLAG_SATA = (1 << 3),
139 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
140 ATA_FLAG_SRST = (1 << 5), /* (obsolete) use ATA SRST, not E.D.D. */
141 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
142 ATA_FLAG_SATA_RESET = (1 << 7), /* (obsolete) use COMRESET */
143 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
144 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
145 * proper HSM is in place. */
146 ATA_FLAG_DEBUGMSG = (1 << 10),
147 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
148
149 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
150
151 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */
152 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */
153
154 ATA_FLAG_FLUSH_PORT_TASK = (1 << 15), /* Flush port task */
155 ATA_FLAG_IN_EH = (1 << 16), /* EH in progress */
156
157 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
158 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
159 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
160 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
161 ATA_QCFLAG_EH_SCHEDULED = (1 << 5), /* EH scheduled */
162
163 /* host set flags */
164 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host_set only */
165
166 /* various lengths of time */
167 ATA_TMOUT_PIO = 30 * HZ,
168 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
169 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
170 ATA_TMOUT_CDB = 30 * HZ,
171 ATA_TMOUT_CDB_QUICK = 5 * HZ,
172 ATA_TMOUT_INTERNAL = 30 * HZ,
173 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
174
175 /* ATA bus states */
176 BUS_UNKNOWN = 0,
177 BUS_DMA = 1,
178 BUS_IDLE = 2,
179 BUS_NOINTR = 3,
180 BUS_NODATA = 4,
181 BUS_TIMER = 5,
182 BUS_PIO = 6,
183 BUS_EDD = 7,
184 BUS_IDENTIFY = 8,
185 BUS_PACKET = 9,
186
187 /* SATA port states */
188 PORT_UNKNOWN = 0,
189 PORT_ENABLED = 1,
190 PORT_DISABLED = 2,
191
192 /* encoding various smaller bitmaps into a single
193 * unsigned int bitmap
194 */
195 ATA_BITS_PIO = 5,
196 ATA_BITS_MWDMA = 3,
197 ATA_BITS_UDMA = 8,
198
199 ATA_SHIFT_PIO = 0,
200 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO,
201 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA,
202
203 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO,
204 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA,
205 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA,
206
207 /* size of buffer to pad xfers ending on unaligned boundaries */
208 ATA_DMA_PAD_SZ = 4,
209 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
210
211 /* Masks for port functions */
212 ATA_PORT_PRIMARY = (1 << 0),
213 ATA_PORT_SECONDARY = (1 << 1),
214 };
215
216 enum hsm_task_states {
217 HSM_ST_UNKNOWN,
218 HSM_ST_IDLE,
219 HSM_ST_POLL,
220 HSM_ST_TMOUT,
221 HSM_ST,
222 HSM_ST_LAST,
223 HSM_ST_LAST_POLL,
224 HSM_ST_ERR,
225 };
226
227 enum ata_completion_errors {
228 AC_ERR_DEV = (1 << 0), /* device reported error */
229 AC_ERR_HSM = (1 << 1), /* host state machine violation */
230 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
231 AC_ERR_MEDIA = (1 << 3), /* media error */
232 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
233 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
234 AC_ERR_SYSTEM = (1 << 6), /* system error */
235 AC_ERR_INVALID = (1 << 7), /* invalid argument */
236 AC_ERR_OTHER = (1 << 8), /* unknown */
237 };
238
239 /* forward declarations */
240 struct scsi_device;
241 struct ata_port_operations;
242 struct ata_port;
243 struct ata_queued_cmd;
244
245 /* typedefs */
246 typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
247 typedef void (*ata_probeinit_fn_t)(struct ata_port *);
248 typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *);
249 typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *);
250
251 struct ata_ioports {
252 unsigned long cmd_addr;
253 unsigned long data_addr;
254 unsigned long error_addr;
255 unsigned long feature_addr;
256 unsigned long nsect_addr;
257 unsigned long lbal_addr;
258 unsigned long lbam_addr;
259 unsigned long lbah_addr;
260 unsigned long device_addr;
261 unsigned long status_addr;
262 unsigned long command_addr;
263 unsigned long altstatus_addr;
264 unsigned long ctl_addr;
265 unsigned long bmdma_addr;
266 unsigned long scr_addr;
267 };
268
269 struct ata_probe_ent {
270 struct list_head node;
271 struct device *dev;
272 const struct ata_port_operations *port_ops;
273 struct scsi_host_template *sht;
274 struct ata_ioports port[ATA_MAX_PORTS];
275 unsigned int n_ports;
276 unsigned int hard_port_no;
277 unsigned int pio_mask;
278 unsigned int mwdma_mask;
279 unsigned int udma_mask;
280 unsigned int legacy_mode;
281 unsigned long irq;
282 unsigned int irq_flags;
283 unsigned long host_flags;
284 unsigned long host_set_flags;
285 void __iomem *mmio_base;
286 void *private_data;
287 };
288
289 struct ata_host_set {
290 spinlock_t lock;
291 struct device *dev;
292 unsigned long irq;
293 void __iomem *mmio_base;
294 unsigned int n_ports;
295 void *private_data;
296 const struct ata_port_operations *ops;
297 struct ata_port * ports[0];
298 };
299
300 struct ata_queued_cmd {
301 struct ata_port *ap;
302 struct ata_device *dev;
303
304 struct scsi_cmnd *scsicmd;
305 void (*scsidone)(struct scsi_cmnd *);
306
307 struct ata_taskfile tf;
308 u8 cdb[ATAPI_CDB_LEN];
309
310 unsigned long flags; /* ATA_QCFLAG_xxx */
311 unsigned int tag;
312 unsigned int n_elem;
313 unsigned int orig_n_elem;
314
315 int dma_dir;
316
317 unsigned int pad_len;
318
319 unsigned int nsect;
320 unsigned int cursect;
321
322 unsigned int nbytes;
323 unsigned int curbytes;
324
325 unsigned int cursg;
326 unsigned int cursg_ofs;
327
328 struct scatterlist sgent;
329 struct scatterlist pad_sgent;
330 void *buf_virt;
331
332 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
333 struct scatterlist *__sg;
334
335 unsigned int err_mask;
336
337 ata_qc_cb_t complete_fn;
338
339 void *private_data;
340 };
341
342 struct ata_host_stats {
343 unsigned long unhandled_irq;
344 unsigned long idle_irq;
345 unsigned long rw_reqbuf;
346 };
347
348 struct ata_device {
349 u64 n_sectors; /* size of device, if ATA */
350 unsigned long flags; /* ATA_DFLAG_xxx */
351 unsigned int class; /* ATA_DEV_xxx */
352 unsigned int devno; /* 0 or 1 */
353 u16 *id; /* IDENTIFY xxx DEVICE data */
354 u8 pio_mode;
355 u8 dma_mode;
356 u8 xfer_mode;
357 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
358
359 unsigned int multi_count; /* sectors count for
360 READ/WRITE MULTIPLE */
361 unsigned int max_sectors; /* per-device max sectors */
362 unsigned int cdb_len;
363
364 /* per-dev xfer mask */
365 unsigned int pio_mask;
366 unsigned int mwdma_mask;
367 unsigned int udma_mask;
368
369 /* for CHS addressing */
370 u16 cylinders; /* Number of cylinders */
371 u16 heads; /* Number of heads */
372 u16 sectors; /* Number of sectors per track */
373 };
374
375 struct ata_port {
376 struct Scsi_Host *host; /* our co-allocated scsi host */
377 const struct ata_port_operations *ops;
378 unsigned long flags; /* ATA_FLAG_xxx */
379 unsigned int id; /* unique id req'd by scsi midlyr */
380 unsigned int port_no; /* unique port #; from zero */
381 unsigned int hard_port_no; /* hardware port #; from zero */
382
383 struct ata_prd *prd; /* our SG list */
384 dma_addr_t prd_dma; /* and its DMA mapping */
385
386 void *pad; /* array of DMA pad buffers */
387 dma_addr_t pad_dma;
388
389 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
390
391 u8 ctl; /* cache of ATA control register */
392 u8 last_ctl; /* Cache last written value */
393 unsigned int pio_mask;
394 unsigned int mwdma_mask;
395 unsigned int udma_mask;
396 unsigned int cbl; /* cable type; ATA_CBL_xxx */
397
398 struct ata_device device[ATA_MAX_DEVICES];
399
400 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
401 unsigned long qactive;
402 unsigned int active_tag;
403
404 struct ata_host_stats stats;
405 struct ata_host_set *host_set;
406 struct device *dev;
407
408 struct work_struct port_task;
409
410 unsigned int hsm_task_state;
411 unsigned long pio_task_timeout;
412
413 u32 msg_enable;
414 struct list_head eh_done_q;
415
416 void *private_data;
417 };
418
419 struct ata_port_operations {
420 void (*port_disable) (struct ata_port *);
421
422 void (*dev_config) (struct ata_port *, struct ata_device *);
423
424 void (*set_piomode) (struct ata_port *, struct ata_device *);
425 void (*set_dmamode) (struct ata_port *, struct ata_device *);
426
427 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
428 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
429
430 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
431 u8 (*check_status)(struct ata_port *ap);
432 u8 (*check_altstatus)(struct ata_port *ap);
433 void (*dev_select)(struct ata_port *ap, unsigned int device);
434
435 void (*phy_reset) (struct ata_port *ap); /* obsolete */
436 int (*probe_reset) (struct ata_port *ap, unsigned int *classes);
437
438 void (*post_set_mode) (struct ata_port *ap);
439
440 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
441
442 void (*bmdma_setup) (struct ata_queued_cmd *qc);
443 void (*bmdma_start) (struct ata_queued_cmd *qc);
444
445 void (*qc_prep) (struct ata_queued_cmd *qc);
446 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
447
448 void (*eng_timeout) (struct ata_port *ap);
449
450 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
451 void (*irq_clear) (struct ata_port *);
452
453 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
454 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
455 u32 val);
456
457 int (*port_start) (struct ata_port *ap);
458 void (*port_stop) (struct ata_port *ap);
459
460 void (*host_stop) (struct ata_host_set *host_set);
461
462 void (*bmdma_stop) (struct ata_queued_cmd *qc);
463 u8 (*bmdma_status) (struct ata_port *ap);
464 };
465
466 struct ata_port_info {
467 struct scsi_host_template *sht;
468 unsigned long host_flags;
469 unsigned long pio_mask;
470 unsigned long mwdma_mask;
471 unsigned long udma_mask;
472 const struct ata_port_operations *port_ops;
473 void *private_data;
474 };
475
476 struct ata_timing {
477 unsigned short mode; /* ATA mode */
478 unsigned short setup; /* t1 */
479 unsigned short act8b; /* t2 for 8-bit I/O */
480 unsigned short rec8b; /* t2i for 8-bit I/O */
481 unsigned short cyc8b; /* t0 for 8-bit I/O */
482 unsigned short active; /* t2 or tD */
483 unsigned short recover; /* t2i or tK */
484 unsigned short cycle; /* t0 */
485 unsigned short udma; /* t2CYCTYP/2 */
486 };
487
488 #define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
489
490 extern void ata_port_probe(struct ata_port *);
491 extern void __sata_phy_reset(struct ata_port *ap);
492 extern void sata_phy_reset(struct ata_port *ap);
493 extern void ata_bus_reset(struct ata_port *ap);
494 extern int ata_drive_probe_reset(struct ata_port *ap,
495 ata_probeinit_fn_t probeinit,
496 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
497 ata_postreset_fn_t postreset, unsigned int *classes);
498 extern void ata_std_probeinit(struct ata_port *ap);
499 extern int ata_std_softreset(struct ata_port *ap, int verbose,
500 unsigned int *classes);
501 extern int sata_std_hardreset(struct ata_port *ap, int verbose,
502 unsigned int *class);
503 extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
504 extern int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
505 int post_reset);
506 extern void ata_port_disable(struct ata_port *);
507 extern void ata_std_ports(struct ata_ioports *ioaddr);
508 #ifdef CONFIG_PCI
509 extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
510 unsigned int n_ports);
511 extern void ata_pci_remove_one (struct pci_dev *pdev);
512 extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
513 extern int ata_pci_device_resume(struct pci_dev *pdev);
514 extern int ata_pci_clear_simplex(struct pci_dev *pdev);
515 #endif /* CONFIG_PCI */
516 extern int ata_device_add(const struct ata_probe_ent *ent);
517 extern void ata_host_set_remove(struct ata_host_set *host_set);
518 extern int ata_scsi_detect(struct scsi_host_template *sht);
519 extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
520 extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
521 extern int ata_scsi_error(struct Scsi_Host *host);
522 extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
523 extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
524 extern int ata_scsi_release(struct Scsi_Host *host);
525 extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
526 extern int ata_scsi_device_resume(struct scsi_device *);
527 extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t state);
528 extern int ata_device_resume(struct ata_port *, struct ata_device *);
529 extern int ata_device_suspend(struct ata_port *, struct ata_device *, pm_message_t state);
530 extern int ata_ratelimit(void);
531 extern unsigned int ata_busy_sleep(struct ata_port *ap,
532 unsigned long timeout_pat,
533 unsigned long timeout);
534 extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *),
535 void *data, unsigned long delay);
536
537 /*
538 * Default driver ops implementations
539 */
540 extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
541 extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
542 extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
543 extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
544 extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
545 extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
546 extern u8 ata_check_status(struct ata_port *ap);
547 extern u8 ata_altstatus(struct ata_port *ap);
548 extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
549 extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes);
550 extern int ata_port_start (struct ata_port *ap);
551 extern void ata_port_stop (struct ata_port *ap);
552 extern void ata_host_stop (struct ata_host_set *host_set);
553 extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
554 extern void ata_qc_prep(struct ata_queued_cmd *qc);
555 extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
556 extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
557 extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
558 unsigned int buflen);
559 extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
560 unsigned int n_elem);
561 extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
562 extern void ata_id_string(const u16 *id, unsigned char *s,
563 unsigned int ofs, unsigned int len);
564 extern void ata_id_c_string(const u16 *id, unsigned char *s,
565 unsigned int ofs, unsigned int len);
566 extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
567 extern void ata_bmdma_start (struct ata_queued_cmd *qc);
568 extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
569 extern u8 ata_bmdma_status(struct ata_port *ap);
570 extern void ata_bmdma_irq_clear(struct ata_port *ap);
571 extern void __ata_qc_complete(struct ata_queued_cmd *qc);
572 extern void ata_eng_timeout(struct ata_port *ap);
573 extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev,
574 struct scsi_cmnd *cmd,
575 void (*done)(struct scsi_cmnd *));
576 extern int ata_std_bios_param(struct scsi_device *sdev,
577 struct block_device *bdev,
578 sector_t capacity, int geom[]);
579 extern int ata_scsi_slave_config(struct scsi_device *sdev);
580 extern struct ata_device *ata_dev_pair(struct ata_port *ap,
581 struct ata_device *adev);
582
583 /*
584 * Timing helpers
585 */
586
587 extern unsigned int ata_pio_need_iordy(const struct ata_device *);
588 extern int ata_timing_compute(struct ata_device *, unsigned short,
589 struct ata_timing *, int, int);
590 extern void ata_timing_merge(const struct ata_timing *,
591 const struct ata_timing *, struct ata_timing *,
592 unsigned int);
593
594 enum {
595 ATA_TIMING_SETUP = (1 << 0),
596 ATA_TIMING_ACT8B = (1 << 1),
597 ATA_TIMING_REC8B = (1 << 2),
598 ATA_TIMING_CYC8B = (1 << 3),
599 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
600 ATA_TIMING_CYC8B,
601 ATA_TIMING_ACTIVE = (1 << 4),
602 ATA_TIMING_RECOVER = (1 << 5),
603 ATA_TIMING_CYCLE = (1 << 6),
604 ATA_TIMING_UDMA = (1 << 7),
605 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
606 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
607 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
608 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
609 };
610
611
612 #ifdef CONFIG_PCI
613 struct pci_bits {
614 unsigned int reg; /* PCI config register to read */
615 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
616 unsigned long mask;
617 unsigned long val;
618 };
619
620 extern void ata_pci_host_stop (struct ata_host_set *host_set);
621 extern struct ata_probe_ent *
622 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
623 extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
624 extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long);
625 #endif /* CONFIG_PCI */
626
627
628 static inline int
629 ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
630 {
631 if (sg == &qc->pad_sgent)
632 return 1;
633 if (qc->pad_len)
634 return 0;
635 if (((sg - qc->__sg) + 1) == qc->n_elem)
636 return 1;
637 return 0;
638 }
639
640 static inline struct scatterlist *
641 ata_qc_first_sg(struct ata_queued_cmd *qc)
642 {
643 if (qc->n_elem)
644 return qc->__sg;
645 if (qc->pad_len)
646 return &qc->pad_sgent;
647 return NULL;
648 }
649
650 static inline struct scatterlist *
651 ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
652 {
653 if (sg == &qc->pad_sgent)
654 return NULL;
655 if (++sg - qc->__sg < qc->n_elem)
656 return sg;
657 if (qc->pad_len)
658 return &qc->pad_sgent;
659 return NULL;
660 }
661
662 #define ata_for_each_sg(sg, qc) \
663 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc))
664
665 static inline unsigned int ata_tag_valid(unsigned int tag)
666 {
667 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
668 }
669
670 static inline unsigned int ata_class_present(unsigned int class)
671 {
672 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
673 }
674
675 static inline unsigned int ata_dev_present(const struct ata_device *dev)
676 {
677 return ata_class_present(dev->class);
678 }
679
680 static inline u8 ata_chk_status(struct ata_port *ap)
681 {
682 return ap->ops->check_status(ap);
683 }
684
685
686 /**
687 * ata_pause - Flush writes and pause 400 nanoseconds.
688 * @ap: Port to wait for.
689 *
690 * LOCKING:
691 * Inherited from caller.
692 */
693
694 static inline void ata_pause(struct ata_port *ap)
695 {
696 ata_altstatus(ap);
697 ndelay(400);
698 }
699
700
701 /**
702 * ata_busy_wait - Wait for a port status register
703 * @ap: Port to wait for.
704 *
705 * Waits up to max*10 microseconds for the selected bits in the port's
706 * status register to be cleared.
707 * Returns final value of status register.
708 *
709 * LOCKING:
710 * Inherited from caller.
711 */
712
713 static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
714 unsigned int max)
715 {
716 u8 status;
717
718 do {
719 udelay(10);
720 status = ata_chk_status(ap);
721 max--;
722 } while ((status & bits) && (max > 0));
723
724 return status;
725 }
726
727
728 /**
729 * ata_wait_idle - Wait for a port to be idle.
730 * @ap: Port to wait for.
731 *
732 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
733 * Returns final value of status register.
734 *
735 * LOCKING:
736 * Inherited from caller.
737 */
738
739 static inline u8 ata_wait_idle(struct ata_port *ap)
740 {
741 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
742
743 if (status & (ATA_BUSY | ATA_DRQ)) {
744 unsigned long l = ap->ioaddr.status_addr;
745 if (ata_msg_warn(ap))
746 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
747 status, l);
748 }
749
750 return status;
751 }
752
753 static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
754 {
755 qc->tf.ctl |= ATA_NIEN;
756 }
757
758 static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
759 unsigned int tag)
760 {
761 if (likely(ata_tag_valid(tag)))
762 return &ap->qcmd[tag];
763 return NULL;
764 }
765
766 static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
767 {
768 memset(tf, 0, sizeof(*tf));
769
770 tf->ctl = ap->ctl;
771 if (device == 0)
772 tf->device = ATA_DEVICE_OBS;
773 else
774 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
775 }
776
777 static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
778 {
779 qc->__sg = NULL;
780 qc->flags = 0;
781 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
782 qc->nsect = 0;
783 qc->nbytes = qc->curbytes = 0;
784 qc->err_mask = 0;
785
786 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
787 }
788
789 /**
790 * ata_qc_complete - Complete an active ATA command
791 * @qc: Command to complete
792 * @err_mask: ATA Status register contents
793 *
794 * Indicate to the mid and upper layers that an ATA
795 * command has completed, with either an ok or not-ok status.
796 *
797 * LOCKING:
798 * spin_lock_irqsave(host_set lock)
799 */
800 static inline void ata_qc_complete(struct ata_queued_cmd *qc)
801 {
802 if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED))
803 return;
804
805 __ata_qc_complete(qc);
806 }
807
808 /**
809 * ata_irq_on - Enable interrupts on a port.
810 * @ap: Port on which interrupts are enabled.
811 *
812 * Enable interrupts on a legacy IDE device using MMIO or PIO,
813 * wait for idle, clear any pending interrupts.
814 *
815 * LOCKING:
816 * Inherited from caller.
817 */
818
819 static inline u8 ata_irq_on(struct ata_port *ap)
820 {
821 struct ata_ioports *ioaddr = &ap->ioaddr;
822 u8 tmp;
823
824 ap->ctl &= ~ATA_NIEN;
825 ap->last_ctl = ap->ctl;
826
827 if (ap->flags & ATA_FLAG_MMIO)
828 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
829 else
830 outb(ap->ctl, ioaddr->ctl_addr);
831 tmp = ata_wait_idle(ap);
832
833 ap->ops->irq_clear(ap);
834
835 return tmp;
836 }
837
838
839 /**
840 * ata_irq_ack - Acknowledge a device interrupt.
841 * @ap: Port on which interrupts are enabled.
842 *
843 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
844 * or BUSY+DRQ clear). Obtain dma status and port status from
845 * device. Clear the interrupt. Return port status.
846 *
847 * LOCKING:
848 */
849
850 static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
851 {
852 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
853 u8 host_stat, post_stat, status;
854
855 status = ata_busy_wait(ap, bits, 1000);
856 if (status & bits)
857 if (ata_msg_err(ap))
858 printk(KERN_ERR "abnormal status 0x%X\n", status);
859
860 /* get controller status; clear intr, err bits */
861 if (ap->flags & ATA_FLAG_MMIO) {
862 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
863 host_stat = readb(mmio + ATA_DMA_STATUS);
864 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
865 mmio + ATA_DMA_STATUS);
866
867 post_stat = readb(mmio + ATA_DMA_STATUS);
868 } else {
869 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
870 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
871 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
872
873 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
874 }
875
876 if (ata_msg_intr(ap))
877 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
878 __FUNCTION__,
879 host_stat, post_stat, status);
880
881 return status;
882 }
883
884 static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
885 {
886 return ap->ops->scr_read(ap, reg);
887 }
888
889 static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
890 {
891 ap->ops->scr_write(ap, reg, val);
892 }
893
894 static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
895 u32 val)
896 {
897 ap->ops->scr_write(ap, reg, val);
898 (void) ap->ops->scr_read(ap, reg);
899 }
900
901 static inline unsigned int sata_dev_present(struct ata_port *ap)
902 {
903 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
904 }
905
906 static inline int ata_try_flush_cache(const struct ata_device *dev)
907 {
908 return ata_id_wcache_enabled(dev->id) ||
909 ata_id_has_flush(dev->id) ||
910 ata_id_has_flush_ext(dev->id);
911 }
912
913 static inline unsigned int ac_err_mask(u8 status)
914 {
915 if (status & ATA_BUSY)
916 return AC_ERR_HSM;
917 if (status & (ATA_ERR | ATA_DF))
918 return AC_ERR_DEV;
919 return 0;
920 }
921
922 static inline unsigned int __ac_err_mask(u8 status)
923 {
924 unsigned int mask = ac_err_mask(status);
925 if (mask == 0)
926 return AC_ERR_OTHER;
927 return mask;
928 }
929
930 static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
931 {
932 ap->pad_dma = 0;
933 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
934 &ap->pad_dma, GFP_KERNEL);
935 return (ap->pad == NULL) ? -ENOMEM : 0;
936 }
937
938 static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
939 {
940 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
941 }
942
943 #endif /* __LINUX_LIBATA_H__ */
Linux kernel - Deliverables
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