1 2020-09-26 Alan Modra <amodra@gmail.com>
3 * csky-opc.h: Formatting.
4 (GENERAL_REG_BANK): Correct spelling. Update use throughout file.
5 (get_register_name): Mask arch with CSKY_ARCH_MASK for shift,
7 (get_register_number): Likewise.
8 * csky-dis.c (get_gr_name, get_cr_name): Don't mask mach_flag.
10 2020-09-24 Lili Cui <lili.cui@intel.com>
13 * i386-dis.c (enum): Put MOD_VEX_0F38* together.
15 2020-09-24 Andrew Burgess <andrew.burgess@embecosm.com>
17 * csky-dis.c (csky_output_operand): Enclose body of if in curly
20 2020-09-24 Lili Cui <lili.cui@intel.com>
22 * i386-dis.c (enum): Add PREFIX_0F01_REG_1_RM_5,
23 PREFIX_0F01_REG_1_RM_6, PREFIX_0F01_REG_1_RM_7,
24 X86_64_0F01_REG_1_RM_5_P_2, X86_64_0F01_REG_1_RM_6_P_2,
25 X86_64_0F01_REG_1_RM_7_P_2.
26 (prefix_table): Likewise.
27 (x86_64_table): Likewise.
29 * i386-gen.c (cpu_flag_init): Add CPU_TDX_FLAGS
30 and CPU_ANY_TDX_FLAGS.
31 (cpu_flags): Add CpuTDX.
32 * i386-opc.h (enum): Add CpuTDX.
33 (i386_cpu_flags): Add cputdx.
34 * i386-opc.tbl: Add TDX insns.
35 * i386-init.h: Regenerate.
36 * i386-tbl.h: Likewise.
38 2020-09-17 Cooper Qu <<cooper.qu@linux.alibaba.com>>
40 * csky-dis.c (using_abi): New.
41 (parse_csky_dis_options): New function.
42 (get_gr_name): New function.
43 (get_cr_name): New function.
44 (csky_output_operand): Use get_gr_name and get_cr_name to
45 disassemble and add handle of OPRND_TYPE_IMM5b_LS.
46 (print_insn_csky): Parse disassembler options.
47 * csky-opc.h (OPRND_TYPE_IMM5b_LS): New enum.
48 (GENARAL_REG_BANK): Define.
49 (REG_SUPPORT_ALL): Define.
50 (REG_SUPPORT_ALL): New.
52 (REG_SUPPORT_A): Define.
53 (REG_SUPPORT_B): Define.
54 (REG_SUPPORT_C): Define.
55 (REG_SUPPORT_D): Define.
56 (REG_SUPPORT_E): Define.
57 (csky_abiv1_general_regs): New.
58 (csky_abiv1_control_regs): New.
59 (csky_abiv2_general_regs): New.
60 (csky_abiv2_control_regs): New.
61 (get_register_name): New function.
62 (get_register_number): New function.
63 (csky_get_general_reg_name): New function.
64 (csky_get_general_regno): New function.
65 (csky_get_control_reg_name): New function.
66 (csky_get_control_regno): New function.
67 (csky_v2_opcodes): Prefer two oprerans format for bclri and
68 bseti, strengthen the operands legality check of addc, zext
71 2020-09-23 Lili Cui <lili.cui@intel.com>
73 * i386-dis.c (enum): Add REG_0F38D8_PREFIX_1,
74 MOD_0F38FA_PREFIX_1, MOD_0F38FB_PREFIX_1,
75 MOD_0F38DC_PREFIX_1, MOD_0F38DD_PREFIX_1,
76 MOD_0F38DE_PREFIX_1, MOD_0F38DF_PREFIX_1,
77 PREFIX_0F38D8, PREFIX_0F38FA, PREFIX_0F38FB.
78 (reg_table): New instructions (see prefixes above).
79 (prefix_table): Likewise.
80 (three_byte_table): Likewise.
82 * i386-gen.c (cpu_flag_init): Add CPU_KL_FLAGS, CPU_WIDE_KL_FLAGS,
83 CPU_ANY_KL_FLAGS and CPU_ANY_WIDE_KL_FLAGS.
84 (cpu_flags): Likewise.
85 (operand_type_init): Likewise.
86 * i386-opc.h (enum): Add CpuKL and CpuWide_KL.
87 (i386_cpu_flags): Add cpukl and cpuwide_kl.
88 * i386-opc.tbl: Add KL and WIDE_KL insns.
89 * i386-init.h: Regenerate.
90 * i386-tbl.h: Likewise.
92 2020-09-21 Alan Modra <amodra@gmail.com>
94 * rx-dis.c (flag_names): Add missing comma.
95 (register_names, flag_names, double_register_names),
96 (double_register_high_names, double_register_low_names),
97 (double_control_register_names, double_condition_names): Remove
100 2020-09-18 David Faust <david.faust@oracle.com>
102 * bpf-desc.c: Regenerate.
103 * bpf-desc.h: Likewise.
104 * bpf-opc.c: Likewise.
105 * bpf-opc.h: Likewise.
107 2020-09-16 Andrew Burgess <andrew.burgess@embecosm.com>
109 * csky-dis.c (csky_get_disassembler): Don't return NULL when there
112 2020-09-16 Alan Modra <amodra@gmail.com>
114 * ppc-dis.c (ppc_symbol_is_valid): Adjust elf_symbol_from invocation.
116 2020-09-10 Nick Clifton <nickc@redhat.com>
118 * ppc-dis.c (ppc_symbol_is_valid): New function. Returns false
119 for hidden, local, no-type symbols.
120 (disassemble_init_powerpc): Point the symbol_is_valid field in the
121 info structure at the new function.
123 2020-09-10 Cooper Qu <cooper.qu@linux.alibaba.com>
125 * csky-opc.h (csky_v2_opcodes): Add L2Cache instructions.
126 * testsuite/gas/csky/cskyv2_ck860.d : Adjust to icache.iva
129 2020-09-10 Nick Clifton <nickc@redhat.com>
131 * csky-dis.c (csky_output_operand): Coerce the immediate values to
132 long before printing.
134 2020-09-10 Alan Modra <amodra@gmail.com>
136 * csky-dis.c (csky_output_operand): Don't sprintf str to itself.
138 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com>
140 * csky-opc.h (csky_v2_opcodes): Change mvtc and mulsw's
143 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com>
145 * csky-dis.c (csky_output_operand): Add handlers for
146 OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
147 OPRND_TYPE_DFLOAT_FMOVI. Refine OPRND_TYPE_FREGLIST_DASH
148 to support FPUV3 instructions.
149 * csky-opc.h (enum operand_type): New enum OPRND_TYPE_IMM9b,
150 OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
151 OPRND_TYPE_DFLOAT_FMOVI.
152 (OPRND_MASK_4_5, OPRND_MASK_6, OPRND_MASK_6_7, OPRND_MASK_6_8,
153 OPRND_MASK_7, OPRND_MASK_7_8, OPRND_MASK_17_24,
154 OPRND_MASK_20, OPRND_MASK_20_21, OPRND_MASK_20_22,
155 OPRND_MASK_20_23, OPRND_MASK_20_24, OPRND_MASK_20_25,
156 OPRND_MASK_0_3or5_8, OPRND_MASK_0_3or6_7, OPRND_MASK_0_3or25,
157 OPRND_MASK_0_4or21_24, OPRND_MASK_5or20_21,
158 OPRND_MASK_5or20_22, OPRND_MASK_5or20_23, OPRND_MASK_5or20_24,
159 OPRND_MASK_5or20_25, OPRND_MASK_8_9or21_25,
160 OPRND_MASK_8_9or16_25, OPRND_MASK_4_6or20, OPRND_MASK_5_7or20,
161 OPRND_MASK_4_5or20or25, OPRND_MASK_4_6or20or25,
162 OPRND_MASK_4_7or20or25, OPRND_MASK_6_9or17_24,
163 OPRND_MASK_6_7or20, OPRND_MASK_6or20, OPRND_MASK_7or20,
164 OPRND_MASK_5or8_9or16_25, OPRND_MASK_5or8_9or20_25): Define.
165 (csky_v2_opcodes): Add FPUV3 instructions.
167 2020-09-08 Alex Coplan <alex.coplan@arm.com>
169 * aarch64-dis.c (print_operands): Pass CPU features to
170 aarch64_print_operand().
171 * aarch64-opc.c (aarch64_print_operand): Use CPU features to determine
172 preferred disassembly of system registers.
173 (SR_RNG): Refactor to use new SR_FEAT2 macro.
179 (SR_EXPAND_ELx): New.
180 (SR_EXPAND_EL12): New.
181 (aarch64_sys_regs): Specify which registers are only on
182 A-profile, add R-profile system registers.
186 (aarch64_sys_ins_reg_supported_p): Reject EL3 registers for
189 2020-09-08 Alex Coplan <alex.coplan@arm.com>
191 * aarch64-tbl.h (aarch64_feature_v8_r): New.
194 (aarch64_opcode_table): Add dfb.
195 * aarch64-opc-2.c: Regenerate.
196 * aarch64-asm-2.c: Regenerate.
197 * aarch64-dis-2.c: Regenerate.
199 2020-09-08 Alex Coplan <alex.coplan@arm.com>
201 * aarch64-dis.c (arch_variant): New.
202 (determine_disassembling_preference): Disassemble according to
204 (select_aarch64_variant): New.
205 (print_insn_aarch64): Set feature set.
207 2020-09-02 Alan Modra <amodra@gmail.com>
209 * v850-opc.c (insert_i5div1, insert_i5div2, insert_i5div3),
210 (insert_d5_4, insert_d8_6, insert_d8_7, insert_v8, insert_d9),
211 (insert_u16_loop, insert_d16_15, insert_d16_16, insert_d17_16),
212 (insert_d22, insert_d23, insert_d23_align1, insert_i9, insert_u9),
213 (insert_spe, insert_r4, insert_POS, insert_WIDTH, insert_SELID),
214 (insert_VECTOR8, insert_VECTOR5, insert_CACHEOP, insert_PREFOP),
215 (nsert_IMM10U, insert_SRSEL1, insert_SRSEL2): Use unsigned long
216 for value parameter and update code to suit.
217 (extract_d9, extract_d16_15, extract_d16_16, extract_d17_16),
218 (extract_d22, extract_d23, extract_i9): Use unsigned long variables.
220 2020-09-02 Alan Modra <amodra@gmail.com>
222 * i386-dis.c (OP_E_memory): Don't cast to signed type when
224 (get32, get32s): Use unsigned types in shift expressions.
226 2020-09-02 Alan Modra <amodra@gmail.com>
228 * csky-dis.c (print_insn_csky): Use unsigned type for "given".
230 2020-09-02 Alan Modra <amodra@gmail.com>
232 * crx-dis.c: Whitespace.
233 (print_arg): Use unsigned type for longdisp and mask variables,
234 and for left shift constant.
236 2020-09-02 Alan Modra <amodra@gmail.com>
238 * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift.
239 * bpf-ibld.c: Regenerate.
240 * epiphany-ibld.c: Regenerate.
241 * fr30-ibld.c: Regenerate.
242 * frv-ibld.c: Regenerate.
243 * ip2k-ibld.c: Regenerate.
244 * iq2000-ibld.c: Regenerate.
245 * lm32-ibld.c: Regenerate.
246 * m32c-ibld.c: Regenerate.
247 * m32r-ibld.c: Regenerate.
248 * mep-ibld.c: Regenerate.
249 * mt-ibld.c: Regenerate.
250 * or1k-ibld.c: Regenerate.
251 * xc16x-ibld.c: Regenerate.
252 * xstormy16-ibld.c: Regenerate.
254 2020-09-02 Alan Modra <amodra@gmail.com>
256 * bfin-dis.c (MASKBITS): Use SIGNBIT.
258 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
260 * csky-opc.h (csky_v2_opcodes): Move divul and divsl
261 to CSKYV2_ISA_3E3R3 instruction set.
263 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
265 * csky-opc.h (csky_v2_opcodes): Fix Encode of mulsws.
267 2020-09-01 Alan Modra <amodra@gmail.com>
269 * mep-ibld.c: Regenerate.
271 2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com>
273 * csky-dis.c (csky_output_operand): Assign dis_info.value for
276 2020-08-30 Alan Modra <amodra@gmail.com>
278 * cr16-dis.c: Formatting.
279 (parameter): Delete struct typedef. Use dwordU instead
281 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
283 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
285 2020-08-29 Alan Modra <amodra@gmail.com>
288 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
289 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
291 2020-08-28 Alan Modra <amodra@gmail.com>
295 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
296 (extract_normal): Likewise.
297 (insert_normal): Likewise, and move past zero length test.
298 (put_insn_int_value): Handle mask for zero length, use 1UL.
299 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
300 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
301 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
302 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
304 2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
306 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
307 (csky_dis_info): Add member isa.
308 (csky_find_inst_info): Skip instructions that do not belong to
310 (csky_get_disassembler): Get infomation from attribute section.
311 (print_insn_csky): Set defualt ISA flag.
312 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
313 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
314 isa_flag32'type to unsigned 64 bits.
316 2020-08-26 Jose E. Marchesi <jemarch@gnu.org>
318 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
320 2020-08-26 David Faust <david.faust@oracle.com>
322 * bpf-desc.c: Regenerate.
323 * bpf-desc.h: Likewise.
324 * bpf-opc.c: Likewise.
325 * bpf-opc.h: Likewise.
326 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
327 ISA when appropriate.
329 2020-08-25 Alan Modra <amodra@gmail.com>
332 * vax-dis.c (parse_disassembler_options): Always add at least one
333 to entry_addr_total_slots.
335 2020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com>
337 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
338 in other CPUs to speed up disassembling.
339 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
340 Change plsli.u16 to plsli.16, change sync's operand format.
342 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
344 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
346 2020-08-21 Nick Clifton <nickc@redhat.com>
348 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
351 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
353 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
355 2020-08-19 Alan Modra <amodra@gmail.com>
357 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
360 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
362 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
363 <xvcvbf16spn>: ...to this.
365 2020-08-12 Alex Coplan <alex.coplan@arm.com>
367 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
369 2020-08-12 Nick Clifton <nickc@redhat.com>
371 * po/sr.po: Updated Serbian translation.
373 2020-08-11 Alan Modra <amodra@gmail.com>
375 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
377 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
379 * aarch64-opc.c (aarch64_print_operand):
380 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
381 (aarch64_sys_reg_supported_p): Function removed.
382 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
383 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
386 2020-08-10 Alan Modra <amodra@gmail.com>
388 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
391 2020-08-10 Alan Modra <amodra@gmail.com>
393 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
394 Enable icbt for power5, miso for power8.
396 2020-08-10 Alan Modra <amodra@gmail.com>
398 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
399 mtvsrd, and similarly for mfvsrd.
401 2020-08-04 Christian Groessler <chris@groessler.org>
402 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
404 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
405 opcodes (special "out" to absolute address).
406 * z8k-opc.h: Regenerate.
408 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
411 * i386-opc.h (Prefix_Disp8): New.
412 (Prefix_Disp16): Likewise.
413 (Prefix_Disp32): Likewise.
414 (Prefix_Load): Likewise.
415 (Prefix_Store): Likewise.
416 (Prefix_VEX): Likewise.
417 (Prefix_VEX3): Likewise.
418 (Prefix_EVEX): Likewise.
419 (Prefix_REX): Likewise.
420 (Prefix_NoOptimize): Likewise.
421 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
422 * i386-tbl.h: Regenerated.
424 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
426 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
427 default case with abort() instead of printing an error message and
428 continuing, to avoid a maybe-uninitialized warning.
430 2020-07-24 Nick Clifton <nickc@redhat.com>
432 * po/de.po: Updated German translation.
434 2020-07-21 Jan Beulich <jbeulich@suse.com>
436 * i386-dis.c (OP_E_memory): Revert previous change.
438 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
441 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
442 without base nor index registers.
444 2020-07-15 Jan Beulich <jbeulich@suse.com>
446 * i386-dis.c (putop): Move 'V' and 'W' handling.
448 2020-07-15 Jan Beulich <jbeulich@suse.com>
450 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
451 construct for push/pop of register.
452 (putop): Honor cond when handling 'P'. Drop handling of plain
455 2020-07-15 Jan Beulich <jbeulich@suse.com>
457 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
458 description. Drop '&' description. Use P for push of immediate,
459 pushf/popf, enter, and leave. Use %LP for lret/retf.
460 (dis386_twobyte): Use P for push/pop of fs/gs.
461 (reg_table): Use P for push/pop. Use @ for near call/jmp.
462 (x86_64_table): Use P for far call/jmp.
463 (putop): Drop handling of 'U' and '&'. Move and adjust handling
464 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
466 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
467 and dqw_mode (unconditional).
469 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
472 * i386-dis.c (OP_E_memory): Without base nor index registers,
473 32-bit displacement to 64 bits.
475 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
477 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
478 faulty double register pair is detected.
480 2020-07-14 Jan Beulich <jbeulich@suse.com>
482 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
484 2020-07-14 Jan Beulich <jbeulich@suse.com>
486 * i386-dis.c (OP_R, Rm): Delete.
487 (MOD_0F24, MOD_0F26): Rename to ...
488 (X86_64_0F24, X86_64_0F26): ... respectively.
489 (dis386): Update 'L' and 'Z' comments.
490 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
492 (mod_table): Move opcode 0F24 and 0F26 entries ...
493 (x86_64_table): ... here.
494 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
497 2020-07-14 Jan Beulich <jbeulich@suse.com>
499 * i386-dis.c (Rd, Rdq, MaskR): Delete.
500 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
501 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
502 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
503 MOD_EVEX_0F387C): New enumerators.
504 (reg_table): Use Edq for rdssp.
505 (prefix_table): Use Edq for incssp.
506 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
507 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
508 ktest*, and kshift*. Use Edq / MaskE for kmov*.
509 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
510 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
511 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
512 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
513 0F3828_P_1 and 0F3838_P_1.
514 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
515 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
517 2020-07-14 Jan Beulich <jbeulich@suse.com>
519 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
520 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
521 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
522 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
523 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
524 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
525 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
526 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
527 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
528 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
529 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
530 (reg_table, prefix_table, three_byte_table, vex_table,
531 vex_len_table, mod_table, rm_table): Replace / remove respective
533 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
534 of PREFIX_DATA in used_prefixes.
536 2020-07-14 Jan Beulich <jbeulich@suse.com>
538 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
539 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
540 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
541 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
542 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
543 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
544 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
545 VEX_W_0F3A33_L_0): Delete.
546 (dis386): Adjust "BW" description.
547 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
548 0F3A31, 0F3A32, and 0F3A33.
549 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
551 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
554 2020-07-14 Jan Beulich <jbeulich@suse.com>
556 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
557 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
558 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
559 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
560 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
561 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
562 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
563 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
564 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
565 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
566 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
567 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
568 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
569 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
570 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
571 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
572 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
573 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
574 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
575 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
576 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
577 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
578 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
579 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
580 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
581 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
582 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
583 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
584 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
585 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
586 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
587 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
588 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
589 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
590 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
591 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
592 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
593 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
594 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
595 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
596 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
597 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
598 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
599 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
600 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
601 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
602 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
603 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
604 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
605 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
606 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
607 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
608 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
609 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
610 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
611 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
612 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
613 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
614 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
615 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
616 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
617 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
618 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
619 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
620 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
621 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
622 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
623 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
624 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
625 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
626 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
627 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
628 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
629 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
630 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
631 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
632 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
633 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
634 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
635 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
636 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
637 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
638 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
639 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
640 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
641 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
642 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
643 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
644 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
645 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
646 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
647 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
648 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
649 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
650 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
651 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
652 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
653 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
654 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
655 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
656 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
657 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
658 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
659 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
660 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
661 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
662 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
663 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
664 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
665 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
666 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
667 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
668 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
669 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
670 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
671 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
672 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
673 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
674 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
675 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
676 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
677 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
678 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
679 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
680 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
681 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
682 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
683 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
684 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
685 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
686 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
687 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
688 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
689 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
690 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
691 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
692 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
693 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
694 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
695 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
696 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
697 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
698 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
699 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
700 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
701 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
702 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
703 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
704 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
705 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
706 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
707 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
708 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
709 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
710 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
711 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
712 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
713 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
714 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
715 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
716 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
717 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
718 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
719 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
720 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
721 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
722 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
723 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
724 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
725 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
726 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
727 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
728 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
729 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
730 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
731 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
732 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
733 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
734 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
735 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
736 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
737 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
738 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
739 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
740 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
741 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
742 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
743 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
744 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
745 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
746 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
747 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
748 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
749 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
750 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
751 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
752 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
753 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
754 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
755 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
756 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
757 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
758 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
759 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
760 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
761 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
762 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
763 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
764 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
765 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
766 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
767 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
768 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
769 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
770 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
771 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
772 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
773 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
774 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
775 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
776 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
777 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
778 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
779 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
780 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
781 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
782 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
783 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
784 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
785 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
786 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
787 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
788 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
789 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
790 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
791 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
792 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
793 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
794 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
795 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
796 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
797 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
798 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
799 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
800 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
801 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
802 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
803 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
804 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
805 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
806 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
807 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
808 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
809 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
810 EVEX_W_0F3A72_P_2): Rename to ...
811 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
812 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
813 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
814 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
815 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
816 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
817 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
818 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
819 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
820 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
821 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
822 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
823 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
824 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
825 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
826 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
827 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
828 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
829 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
830 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
831 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
832 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
833 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
834 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
835 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
836 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
837 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
838 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
839 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
840 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
841 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
842 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
843 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
844 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
845 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
846 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
847 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
848 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
849 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
850 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
851 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
852 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
853 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
854 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
855 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
856 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
857 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
858 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
859 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
860 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
861 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
862 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
863 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
864 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
865 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
866 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
867 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
868 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
869 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
870 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
871 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
872 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
873 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
874 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
875 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
876 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
877 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
878 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
879 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
880 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
881 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
882 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
884 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
885 vex_w_table, mod_table): Replace / remove respective entries.
886 (print_insn): Move up dp->prefix_requirement handling. Handle
888 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
889 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
890 Replace / remove respective entries.
892 2020-07-14 Jan Beulich <jbeulich@suse.com>
894 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
895 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
896 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
897 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
898 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
900 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
901 0F2C, 0F2D, 0F2E, and 0F2F.
902 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
905 2020-07-14 Jan Beulich <jbeulich@suse.com>
907 * i386-dis.c (OP_VexR, VexScalarR): New.
908 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
909 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
910 need_vex_reg): Delete.
911 (prefix_table): Replace VexScalar by VexScalarR and
912 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
913 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
914 (vex_len_table): Replace EXqVexScalarS by EXqS.
915 (get_valid_dis386): Don't set need_vex_reg.
916 (print_insn): Don't initialize need_vex_reg.
917 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
918 q_scalar_swap_mode cases.
919 (OP_EX): Don't check for d_scalar_swap_mode and
921 (OP_VEX): Done check need_vex_reg.
922 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
923 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
924 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
926 2020-07-14 Jan Beulich <jbeulich@suse.com>
928 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
929 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
930 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
931 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
932 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
933 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
934 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
935 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
936 (vex_table): Replace Vex128 by Vex.
937 (vex_len_table): Likewise. Adjust referenced enum names.
938 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
939 referenced enum names.
940 (OP_VEX): Drop vex128_mode and vex256_mode cases.
941 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
943 2020-07-14 Jan Beulich <jbeulich@suse.com>
945 * i386-dis.c (dis386): "LW" description now applies to "DQ".
946 (putop): Handle "DQ". Don't handle "LW" anymore.
947 (prefix_table, mod_table): Replace %LW by %DQ.
948 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
950 2020-07-14 Jan Beulich <jbeulich@suse.com>
952 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
953 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
954 d_scalar_swap_mode case handling. Move shift adjsutment into
955 the case its applicable to.
957 2020-07-14 Jan Beulich <jbeulich@suse.com>
959 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
960 (EXbScalar, EXwScalar): Fold to ...
961 (EXbwUnit): ... this.
962 (b_scalar_mode, w_scalar_mode): Fold to ...
963 (bw_unit_mode): ... this.
964 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
965 w_scalar_mode handling by bw_unit_mode one.
966 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
968 * i386-dis-evex-prefix.h: ... here.
970 2020-07-14 Jan Beulich <jbeulich@suse.com>
972 * i386-dis.c (PCMPESTR_Fixup): Delete.
973 (dis386): Adjust "LQ" description.
974 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
975 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
976 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
977 vpcmpestrm, and vpcmpestri.
978 (putop): Honor "cond" when handling LQ.
979 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
980 vcvtsi2ss and vcvtusi2ss.
981 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
982 vcvtsi2sd and vcvtusi2sd.
984 2020-07-14 Jan Beulich <jbeulich@suse.com>
986 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
987 (simd_cmp_op): Add const.
988 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
989 (CMP_Fixup): Handle VEX case.
990 (prefix_table): Replace VCMP by CMP.
991 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
993 2020-07-14 Jan Beulich <jbeulich@suse.com>
995 * i386-dis.c (MOVBE_Fixup): Delete.
997 (prefix_table): Use Mv for movbe entries.
999 2020-07-14 Jan Beulich <jbeulich@suse.com>
1001 * i386-dis.c (CRC32_Fixup): Delete.
1002 (prefix_table): Use Eb/Ev for crc32 entries.
1004 2020-07-14 Jan Beulich <jbeulich@suse.com>
1006 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
1007 Conditionalize invocations of "USED_REX (0)".
1009 2020-07-14 Jan Beulich <jbeulich@suse.com>
1011 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
1012 CH, DH, BH, AX, DX): Delete.
1013 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
1014 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
1015 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
1017 2020-07-10 Lili Cui <lili.cui@intel.com>
1019 * i386-dis.c (TMM): New.
1022 (MVexSIBMEM): Likewise.
1023 (tmm_mode): Likewise.
1024 (vex_sibmem_mode): Likewise.
1025 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
1026 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
1027 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
1028 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
1029 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
1030 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
1031 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
1032 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
1033 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
1034 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
1035 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
1036 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
1037 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
1038 (PREFIX_VEX_0F3849_X86_64): Likewise.
1039 (PREFIX_VEX_0F384B_X86_64): Likewise.
1040 (PREFIX_VEX_0F385C_X86_64): Likewise.
1041 (PREFIX_VEX_0F385E_X86_64): Likewise.
1042 (X86_64_VEX_0F3849): Likewise.
1043 (X86_64_VEX_0F384B): Likewise.
1044 (X86_64_VEX_0F385C): Likewise.
1045 (X86_64_VEX_0F385E): Likewise.
1046 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
1047 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
1048 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
1049 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
1050 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
1051 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
1052 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
1053 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
1054 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
1055 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
1056 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
1057 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
1058 (VEX_W_0F3849_X86_64_P_0): Likewise.
1059 (VEX_W_0F3849_X86_64_P_2): Likewise.
1060 (VEX_W_0F3849_X86_64_P_3): Likewise.
1061 (VEX_W_0F384B_X86_64_P_1): Likewise.
1062 (VEX_W_0F384B_X86_64_P_2): Likewise.
1063 (VEX_W_0F384B_X86_64_P_3): Likewise.
1064 (VEX_W_0F385C_X86_64_P_1): Likewise.
1065 (VEX_W_0F385E_X86_64_P_0): Likewise.
1066 (VEX_W_0F385E_X86_64_P_1): Likewise.
1067 (VEX_W_0F385E_X86_64_P_2): Likewise.
1068 (VEX_W_0F385E_X86_64_P_3): Likewise.
1069 (names_tmm): Likewise.
1070 (att_names_tmm): Likewise.
1071 (intel_operand_size): Handle void_mode.
1072 (OP_XMM): Handle tmm_mode.
1075 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
1076 CpuAMX_BF16 and CpuAMX_TILE.
1077 (operand_type_shorthands): Add RegTMM.
1078 (operand_type_init): Likewise.
1079 (operand_types): Add Tmmword.
1080 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
1081 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
1082 * i386-opc.h (CpuAMX_INT8): New.
1083 (CpuAMX_BF16): Likewise.
1084 (CpuAMX_TILE): Likewise.
1086 (Tmmword): Likewise.
1087 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
1088 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
1089 (i386_operand_type): Add tmmword.
1090 * i386-opc.tbl: Add AMX instructions.
1091 * i386-reg.tbl: Add AMX registers.
1092 * i386-init.h: Regenerated.
1093 * i386-tbl.h: Likewise.
1095 2020-07-08 Jan Beulich <jbeulich@suse.com>
1097 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
1098 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
1100 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
1101 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
1103 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
1104 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
1105 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
1106 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
1107 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
1108 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
1109 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
1110 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
1111 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
1112 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
1113 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
1114 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
1115 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
1116 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
1117 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
1118 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
1119 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
1120 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
1121 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
1122 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
1123 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
1124 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
1125 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
1126 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
1127 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
1128 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
1129 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
1130 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
1131 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
1132 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
1133 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
1134 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
1135 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
1136 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
1137 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
1138 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
1139 (reg_table): Re-order XOP entries. Adjust their operands.
1140 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
1141 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
1142 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
1143 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
1144 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
1145 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
1146 entries by references ...
1147 (vex_len_table): ... to resepctive new entries here. For several
1148 new and existing entries reference ...
1149 (vex_w_table): ... new entries here.
1150 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
1152 2020-07-08 Jan Beulich <jbeulich@suse.com>
1154 * i386-dis.c (XMVexScalarI4): Define.
1155 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
1156 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
1157 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
1158 (vex_len_table): Move scalar FMA4 entries ...
1159 (prefix_table): ... here.
1160 (OP_REG_VexI4): Handle scalar_mode.
1161 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
1162 * i386-tbl.h: Re-generate.
1164 2020-07-08 Jan Beulich <jbeulich@suse.com>
1166 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
1167 Vex_2src_2): Delete.
1168 (OP_VexW, VexW): New.
1169 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
1170 for shifts and rotates by register.
1172 2020-07-08 Jan Beulich <jbeulich@suse.com>
1174 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
1175 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
1176 OP_EX_VexReg): Delete.
1177 (OP_VexI4, VexI4): New.
1178 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
1179 (prefix_table): ... here.
1180 (print_insn): Drop setting of vex_w_done.
1182 2020-07-08 Jan Beulich <jbeulich@suse.com>
1184 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
1185 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
1186 (xop_table): Replace operands of 4-operand insns.
1187 (OP_REG_VexI4): Move VEX.W based operand swaping here.
1189 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
1191 * arc-opc.c (insert_rbd): New function.
1194 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
1197 2020-07-07 Jan Beulich <jbeulich@suse.com>
1199 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
1200 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
1201 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
1202 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
1204 (putop): Handle "BW".
1205 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
1206 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
1208 * i386-dis-evex-prefix.h: ... here.
1210 2020-07-06 Jan Beulich <jbeulich@suse.com>
1212 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
1213 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
1214 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
1215 VEX_W_0FXOP_09_83): New enumerators.
1216 (xop_table): Reference the above.
1217 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
1218 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
1219 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
1220 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
1222 2020-07-06 Jan Beulich <jbeulich@suse.com>
1224 * i386-dis.c (EVEX_W_0F3838_P_1,
1225 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
1226 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
1227 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
1228 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
1229 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
1230 (putop): Centralize management of last[]. Delete SAVE_LAST.
1231 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
1232 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
1233 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
1234 * i386-dis-evex-prefix.h: here.
1236 2020-07-06 Jan Beulich <jbeulich@suse.com>
1238 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
1239 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
1240 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
1241 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
1243 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
1244 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
1245 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
1246 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
1247 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
1248 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
1249 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
1250 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
1251 these, respectively.
1252 * i386-dis-evex-len.h: Adjust comments.
1253 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
1254 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
1255 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
1256 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
1257 MOD_EVEX_0F385B_P_2_W_1 table entries.
1258 * i386-dis-evex-w.h: Reference mod_table[] for
1259 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
1262 2020-07-06 Jan Beulich <jbeulich@suse.com>
1264 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
1265 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
1267 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
1268 Likewise. Mark 256-bit entries invalid.
1270 2020-07-06 Jan Beulich <jbeulich@suse.com>
1272 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1273 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1274 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1275 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1276 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1277 PREFIX_EVEX_0F382B): Delete.
1278 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1279 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1280 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1281 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1282 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1284 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1285 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1286 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1287 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1289 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1290 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1291 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1292 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1293 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1294 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1295 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1296 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1297 PREFIX_EVEX_0F382B): Remove table entries.
1298 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1299 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1300 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1302 2020-07-06 Jan Beulich <jbeulich@suse.com>
1304 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1305 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1307 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1308 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1309 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1310 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1313 2020-07-06 Jan Beulich <jbeulich@suse.com>
1315 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1316 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1317 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1318 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1319 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1320 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1321 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1322 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1323 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1326 2020-07-06 Jan Beulich <jbeulich@suse.com>
1328 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1329 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1330 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1332 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1334 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1336 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1338 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1340 2020-07-06 Jan Beulich <jbeulich@suse.com>
1342 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1343 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1344 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1345 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1346 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1347 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1348 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1349 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1350 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1351 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1352 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1353 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1354 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1355 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1356 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1357 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1358 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1359 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1360 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1361 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1362 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1363 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1364 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1365 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1366 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1367 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1368 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1369 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1370 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1371 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1372 (prefix_table): Add EXxEVexR to FMA table entries.
1373 (OP_Rounding): Move abort() invocation.
1374 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1375 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1376 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1377 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1378 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1379 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1380 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1381 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1382 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1383 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1385 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1386 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1387 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1388 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1389 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1390 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1391 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1392 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1393 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1394 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1395 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1396 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1397 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1398 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1399 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1400 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1401 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1402 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1403 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1404 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1405 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1406 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1407 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1408 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1409 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1410 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1411 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1412 Delete table entries.
1413 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1414 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1415 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1418 2020-07-06 Jan Beulich <jbeulich@suse.com>
1420 * i386-dis.c (EXqScalarS): Delete.
1421 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1422 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1424 2020-07-06 Jan Beulich <jbeulich@suse.com>
1426 * i386-dis.c (safe-ctype.h): Include.
1427 (EXdScalar, EXqScalar): Delete.
1428 (d_scalar_mode, q_scalar_mode): Delete.
1429 (prefix_table, vex_len_table): Use EXxmm_md in place of
1430 EXdScalar and EXxmm_mq in place of EXqScalar.
1431 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1432 d_scalar_mode and q_scalar_mode.
1433 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1434 (vmovsd): Use EXxmm_mq.
1436 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1439 * arc-dis.c: Fix spelling mistake.
1440 * po/opcodes.pot: Regenerate.
1442 2020-07-06 Nick Clifton <nickc@redhat.com>
1444 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1445 * po/uk.po: Updated Ukranian translation.
1447 2020-07-04 Nick Clifton <nickc@redhat.com>
1449 * configure: Regenerate.
1450 * po/opcodes.pot: Regenerate.
1452 2020-07-04 Nick Clifton <nickc@redhat.com>
1454 Binutils 2.35 branch created.
1456 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1458 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1459 * i386-opc.h (VexSwapSources): New.
1460 (i386_opcode_modifier): Add vexswapsources.
1461 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1462 with two source operands swapped.
1463 * i386-tbl.h: Regenerated.
1465 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1467 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1468 unprivileged CSR can also be initialized.
1470 2020-06-29 Alan Modra <amodra@gmail.com>
1472 * arm-dis.c: Use C style comments.
1473 * cr16-opc.c: Likewise.
1474 * ft32-dis.c: Likewise.
1475 * moxie-opc.c: Likewise.
1476 * tic54x-dis.c: Likewise.
1477 * s12z-opc.c: Remove useless comment.
1478 * xgate-dis.c: Likewise.
1480 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1482 * i386-opc.tbl: Add a blank line.
1484 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1486 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1487 (VecSIB128): Renamed to ...
1489 (VecSIB256): Renamed to ...
1491 (VecSIB512): Renamed to ...
1493 (VecSIB): Renamed to ...
1495 (i386_opcode_modifier): Replace vecsib with sib.
1496 * i386-opc.tbl (VecSIB128): New.
1497 (VecSIB256): Likewise.
1498 (VecSIB512): Likewise.
1499 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1500 and VecSIB512, respectively.
1502 2020-06-26 Jan Beulich <jbeulich@suse.com>
1504 * i386-dis.c: Adjust description of I macro.
1505 (x86_64_table): Drop use of I.
1506 (float_mem): Replace use of I.
1507 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1509 2020-06-26 Jan Beulich <jbeulich@suse.com>
1511 * i386-dis.c: (print_insn): Avoid straight assignment to
1512 priv.orig_sizeflag when processing -M sub-options.
1514 2020-06-25 Jan Beulich <jbeulich@suse.com>
1516 * i386-dis.c: Adjust description of J macro.
1517 (dis386, x86_64_table, mod_table): Replace J.
1518 (putop): Remove handling of J.
1520 2020-06-25 Jan Beulich <jbeulich@suse.com>
1522 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1524 2020-06-25 Jan Beulich <jbeulich@suse.com>
1526 * i386-dis.c: Adjust description of "LQ" macro.
1527 (dis386_twobyte): Use LQ for sysret.
1528 (putop): Adjust handling of LQ.
1530 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1532 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1533 * riscv-dis.c: Include elfxx-riscv.h.
1535 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1537 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1539 2020-06-17 Lili Cui <lili.cui@intel.com>
1541 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1543 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1546 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1547 * i386-opc.tbl: Likewise.
1548 * i386-tbl.h: Regenerated.
1550 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1552 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1554 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1556 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1557 (SR_CORE): Likewise.
1558 (SR_FEAT): Likewise.
1560 (SR_V8_1): Likewise.
1561 (SR_V8_2): Likewise.
1562 (SR_V8_3): Likewise.
1563 (SR_V8_4): Likewise.
1566 (SR_SSBS): Likewise.
1568 (SR_ID_PFR2): Likewise.
1569 (SR_PROFILE): Likewise.
1570 (SR_MEMTAG): Likewise.
1571 (SR_SCXTNUM): Likewise.
1572 (aarch64_sys_regs): Refactor to store feature information in the table.
1573 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1574 that now describe their own features.
1575 (aarch64_pstatefield_supported_p): Likewise.
1577 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1579 * i386-dis.c (prefix_table): Fix a typo in comments.
1581 2020-06-09 Jan Beulich <jbeulich@suse.com>
1583 * i386-dis.c (rex_ignored): Delete.
1584 (ckprefix): Drop rex_ignored initialization.
1585 (get_valid_dis386): Drop setting of rex_ignored.
1586 (print_insn): Drop checking of rex_ignored. Don't record data
1587 size prefix as used with VEX-and-alike encodings.
1589 2020-06-09 Jan Beulich <jbeulich@suse.com>
1591 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1592 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1593 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1594 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1595 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1596 VEX_0F12, and VEX_0F16.
1597 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1598 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1599 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1600 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1601 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1602 MOD_VEX_0F16_PREFIX_2 entries.
1604 2020-06-09 Jan Beulich <jbeulich@suse.com>
1606 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1607 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1608 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1609 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1610 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1611 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1612 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1613 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1614 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1615 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1616 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1617 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1618 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1619 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1620 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1621 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1622 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1623 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1624 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1625 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1626 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1627 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1628 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1629 EVEX_W_0FC6_P_2): Delete.
1630 (print_insn): Add EVEX.W vs embedded prefix consistency check
1631 to prefix validation.
1632 * i386-dis-evex.h (evex_table): Don't further descend for
1633 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1634 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1636 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1637 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1638 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1639 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1640 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1641 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1642 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1643 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1644 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1645 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1646 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1647 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1648 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1649 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1650 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1651 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1652 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1653 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1654 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1655 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1656 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1657 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1658 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1659 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1660 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1661 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1662 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1664 2020-06-09 Jan Beulich <jbeulich@suse.com>
1666 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1667 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1668 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1670 (print_insn): Drop pointless check against bad_opcode. Split
1671 prefix validation into legacy and VEX-and-alike parts.
1672 (putop): Re-work 'X' macro handling.
1674 2020-06-09 Jan Beulich <jbeulich@suse.com>
1676 * i386-dis.c (MOD_0F51): Rename to ...
1677 (MOD_0F50): ... this.
1679 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1681 * arm-dis.c (arm_opcodes): Add dfb.
1682 (thumb32_opcodes): Add dfb.
1684 2020-06-08 Jan Beulich <jbeulich@suse.com>
1686 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1688 2020-06-06 Alan Modra <amodra@gmail.com>
1690 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1692 2020-06-05 Alan Modra <amodra@gmail.com>
1694 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1695 size is large enough.
1697 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1699 * disassemble.c (disassemble_init_for_target): Set endian_code for
1701 * bpf-desc.c: Regenerate.
1702 * bpf-opc.c: Likewise.
1703 * bpf-dis.c: Likewise.
1705 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1707 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1708 (cgen_put_insn_value): Likewise.
1709 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1710 * cgen-dis.in (print_insn): Likewise.
1711 * cgen-ibld.in (insert_1): Likewise.
1712 (insert_1): Likewise.
1713 (insert_insn_normal): Likewise.
1714 (extract_1): Likewise.
1715 * bpf-dis.c: Regenerate.
1716 * bpf-ibld.c: Likewise.
1717 * bpf-ibld.c: Likewise.
1718 * cgen-dis.in: Likewise.
1719 * cgen-ibld.in: Likewise.
1720 * cgen-opc.c: Likewise.
1721 * epiphany-dis.c: Likewise.
1722 * epiphany-ibld.c: Likewise.
1723 * fr30-dis.c: Likewise.
1724 * fr30-ibld.c: Likewise.
1725 * frv-dis.c: Likewise.
1726 * frv-ibld.c: Likewise.
1727 * ip2k-dis.c: Likewise.
1728 * ip2k-ibld.c: Likewise.
1729 * iq2000-dis.c: Likewise.
1730 * iq2000-ibld.c: Likewise.
1731 * lm32-dis.c: Likewise.
1732 * lm32-ibld.c: Likewise.
1733 * m32c-dis.c: Likewise.
1734 * m32c-ibld.c: Likewise.
1735 * m32r-dis.c: Likewise.
1736 * m32r-ibld.c: Likewise.
1737 * mep-dis.c: Likewise.
1738 * mep-ibld.c: Likewise.
1739 * mt-dis.c: Likewise.
1740 * mt-ibld.c: Likewise.
1741 * or1k-dis.c: Likewise.
1742 * or1k-ibld.c: Likewise.
1743 * xc16x-dis.c: Likewise.
1744 * xc16x-ibld.c: Likewise.
1745 * xstormy16-dis.c: Likewise.
1746 * xstormy16-ibld.c: Likewise.
1748 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1750 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1751 (print_insn_): Handle instruction endian.
1752 * bpf-dis.c: Regenerate.
1753 * bpf-desc.c: Regenerate.
1754 * epiphany-dis.c: Likewise.
1755 * epiphany-desc.c: Likewise.
1756 * fr30-dis.c: Likewise.
1757 * fr30-desc.c: Likewise.
1758 * frv-dis.c: Likewise.
1759 * frv-desc.c: Likewise.
1760 * ip2k-dis.c: Likewise.
1761 * ip2k-desc.c: Likewise.
1762 * iq2000-dis.c: Likewise.
1763 * iq2000-desc.c: Likewise.
1764 * lm32-dis.c: Likewise.
1765 * lm32-desc.c: Likewise.
1766 * m32c-dis.c: Likewise.
1767 * m32c-desc.c: Likewise.
1768 * m32r-dis.c: Likewise.
1769 * m32r-desc.c: Likewise.
1770 * mep-dis.c: Likewise.
1771 * mep-desc.c: Likewise.
1772 * mt-dis.c: Likewise.
1773 * mt-desc.c: Likewise.
1774 * or1k-dis.c: Likewise.
1775 * or1k-desc.c: Likewise.
1776 * xc16x-dis.c: Likewise.
1777 * xc16x-desc.c: Likewise.
1778 * xstormy16-dis.c: Likewise.
1779 * xstormy16-desc.c: Likewise.
1781 2020-06-03 Nick Clifton <nickc@redhat.com>
1783 * po/sr.po: Updated Serbian translation.
1785 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1787 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1788 (riscv_get_priv_spec_class): Likewise.
1790 2020-06-01 Alan Modra <amodra@gmail.com>
1792 * bpf-desc.c: Regenerate.
1794 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1795 David Faust <david.faust@oracle.com>
1797 * bpf-desc.c: Regenerate.
1798 * bpf-opc.h: Likewise.
1799 * bpf-opc.c: Likewise.
1800 * bpf-dis.c: Likewise.
1802 2020-05-28 Alan Modra <amodra@gmail.com>
1804 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1807 2020-05-28 Alan Modra <amodra@gmail.com>
1809 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1811 (print_insn_ns32k): Revert last change.
1813 2020-05-28 Nick Clifton <nickc@redhat.com>
1815 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1818 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1820 Fix extraction of signed constants in nios2 disassembler (again).
1822 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1823 extractions of signed fields.
1825 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1827 * s390-opc.txt: Relocate vector load/store instructions with
1828 additional alignment parameter and change architecture level
1829 constraint from z14 to z13.
1831 2020-05-21 Alan Modra <amodra@gmail.com>
1833 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1834 * sparc-dis.c: Likewise.
1835 * tic4x-dis.c: Likewise.
1836 * xtensa-dis.c: Likewise.
1837 * bpf-desc.c: Regenerate.
1838 * epiphany-desc.c: Regenerate.
1839 * fr30-desc.c: Regenerate.
1840 * frv-desc.c: Regenerate.
1841 * ip2k-desc.c: Regenerate.
1842 * iq2000-desc.c: Regenerate.
1843 * lm32-desc.c: Regenerate.
1844 * m32c-desc.c: Regenerate.
1845 * m32r-desc.c: Regenerate.
1846 * mep-asm.c: Regenerate.
1847 * mep-desc.c: Regenerate.
1848 * mt-desc.c: Regenerate.
1849 * or1k-desc.c: Regenerate.
1850 * xc16x-desc.c: Regenerate.
1851 * xstormy16-desc.c: Regenerate.
1853 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1855 * riscv-opc.c (riscv_ext_version_table): The table used to store
1856 all information about the supported spec and the corresponding ISA
1857 versions. Currently, only Zicsr is supported to verify the
1858 correctness of Z sub extension settings. Others will be supported
1859 in the future patches.
1860 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1861 classes and the corresponding strings.
1862 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1863 spec class by giving a ISA spec string.
1864 * riscv-opc.c (struct priv_spec_t): New structure.
1865 (struct priv_spec_t priv_specs): List for all supported privilege spec
1866 classes and the corresponding strings.
1867 (riscv_get_priv_spec_class): New function. Get the corresponding
1868 privilege spec class by giving a spec string.
1869 (riscv_get_priv_spec_name): New function. Get the corresponding
1870 privilege spec string by giving a CSR version class.
1871 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1872 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1873 according to the chosen version. Build a hash table riscv_csr_hash to
1874 store the valid CSR for the chosen pirv verison. Dump the direct
1875 CSR address rather than it's name if it is invalid.
1876 (parse_riscv_dis_option_without_args): New function. Parse the options
1878 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1879 parse the options without arguments first, and then handle the options
1880 with arguments. Add the new option -Mpriv-spec, which has argument.
1881 * riscv-dis.c (print_riscv_disassembler_options): Add description
1882 about the new OBJDUMP option.
1884 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1886 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1887 WC values on POWER10 sync, dcbf and wait instructions.
1888 (insert_pl, extract_pl): New functions.
1889 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1890 (LS3): New , 3-bit L for sync.
1891 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1892 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1893 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1894 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1895 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1896 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1897 <wait>: Enable PL operand on POWER10.
1898 <dcbf>: Enable L3OPT operand on POWER10.
1899 <sync>: Enable SC2 operand on POWER10.
1901 2020-05-19 Stafford Horne <shorne@gmail.com>
1904 * or1k-asm.c: Regenerate.
1905 * or1k-desc.c: Regenerate.
1906 * or1k-desc.h: Regenerate.
1907 * or1k-dis.c: Regenerate.
1908 * or1k-ibld.c: Regenerate.
1909 * or1k-opc.c: Regenerate.
1910 * or1k-opc.h: Regenerate.
1911 * or1k-opinst.c: Regenerate.
1913 2020-05-11 Alan Modra <amodra@gmail.com>
1915 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1918 2020-05-11 Alan Modra <amodra@gmail.com>
1920 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1921 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1923 2020-05-11 Alan Modra <amodra@gmail.com>
1925 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1927 2020-05-11 Alan Modra <amodra@gmail.com>
1929 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1930 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1932 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1934 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1937 2020-05-11 Alan Modra <amodra@gmail.com>
1939 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1940 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1941 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1942 (prefix_opcodes): Add xxeval.
1944 2020-05-11 Alan Modra <amodra@gmail.com>
1946 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1947 xxgenpcvwm, xxgenpcvdm.
1949 2020-05-11 Alan Modra <amodra@gmail.com>
1951 * ppc-opc.c (MP, VXVAM_MASK): Define.
1952 (VXVAPS_MASK): Use VXVA_MASK.
1953 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1954 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1955 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1956 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1958 2020-05-11 Alan Modra <amodra@gmail.com>
1959 Peter Bergner <bergner@linux.ibm.com>
1961 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1963 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1964 YMSK2, XA6a, XA6ap, XB6a entries.
1965 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1966 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1968 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1969 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1970 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1971 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1972 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1973 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1974 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1975 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1976 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1977 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1978 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1979 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1980 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1981 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1983 2020-05-11 Alan Modra <amodra@gmail.com>
1985 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1986 (insert_xts, extract_xts): New functions.
1987 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1988 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1989 (VXRC_MASK, VXSH_MASK): Define.
1990 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1991 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1992 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1993 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1994 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1995 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1996 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1998 2020-05-11 Alan Modra <amodra@gmail.com>
2000 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
2001 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
2002 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
2003 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
2004 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
2006 2020-05-11 Alan Modra <amodra@gmail.com>
2008 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
2009 (XTP, DQXP, DQXP_MASK): Define.
2010 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
2011 (prefix_opcodes): Add plxvp and pstxvp.
2013 2020-05-11 Alan Modra <amodra@gmail.com>
2015 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
2016 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
2017 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
2019 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
2021 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
2023 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
2025 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
2027 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
2029 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
2031 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
2033 2020-05-11 Alan Modra <amodra@gmail.com>
2035 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
2037 2020-05-11 Alan Modra <amodra@gmail.com>
2039 * ppc-dis.c (ppc_opts): Add "power10" entry.
2040 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
2041 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
2043 2020-05-11 Nick Clifton <nickc@redhat.com>
2045 * po/fr.po: Updated French translation.
2047 2020-04-30 Alex Coplan <alex.coplan@arm.com>
2049 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
2050 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
2051 (operand_general_constraint_met_p): validate
2052 AARCH64_OPND_UNDEFINED.
2053 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
2055 * aarch64-asm-2.c: Regenerated.
2056 * aarch64-dis-2.c: Regenerated.
2057 * aarch64-opc-2.c: Regenerated.
2059 2020-04-29 Nick Clifton <nickc@redhat.com>
2062 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
2065 2020-04-29 Nick Clifton <nickc@redhat.com>
2067 * po/sv.po: Updated Swedish translation.
2069 2020-04-29 Nick Clifton <nickc@redhat.com>
2072 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
2073 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
2074 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
2077 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
2080 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
2081 cmpi only on m68020up and cpu32.
2083 2020-04-20 Sudakshina Das <sudi.das@arm.com>
2085 * aarch64-asm.c (aarch64_ins_none): New.
2086 * aarch64-asm.h (ins_none): New declaration.
2087 * aarch64-dis.c (aarch64_ext_none): New.
2088 * aarch64-dis.h (ext_none): New declaration.
2089 * aarch64-opc.c (aarch64_print_operand): Update case for
2090 AARCH64_OPND_BARRIER_PSB.
2091 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
2092 (AARCH64_OPERANDS): Update inserter/extracter for
2093 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
2094 * aarch64-asm-2.c: Regenerated.
2095 * aarch64-dis-2.c: Regenerated.
2096 * aarch64-opc-2.c: Regenerated.
2098 2020-04-20 Sudakshina Das <sudi.das@arm.com>
2100 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
2101 (aarch64_feature_ras, RAS): Likewise.
2102 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
2103 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
2104 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
2105 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
2106 * aarch64-asm-2.c: Regenerated.
2107 * aarch64-dis-2.c: Regenerated.
2108 * aarch64-opc-2.c: Regenerated.
2110 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
2112 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
2113 (print_insn_neon): Support disassembly of conditional
2116 2020-02-16 David Faust <david.faust@oracle.com>
2118 * bpf-desc.c: Regenerate.
2119 * bpf-desc.h: Likewise.
2120 * bpf-opc.c: Regenerate.
2121 * bpf-opc.h: Likewise.
2123 2020-04-07 Lili Cui <lili.cui@intel.com>
2125 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
2126 (prefix_table): New instructions (see prefixes above).
2127 (rm_table): Likewise
2128 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
2129 CPU_ANY_TSXLDTRK_FLAGS.
2130 (cpu_flags): Add CpuTSXLDTRK.
2131 * i386-opc.h (enum): Add CpuTSXLDTRK.
2132 (i386_cpu_flags): Add cputsxldtrk.
2133 * i386-opc.tbl: Add XSUSPLDTRK insns.
2134 * i386-init.h: Regenerate.
2135 * i386-tbl.h: Likewise.
2137 2020-04-02 Lili Cui <lili.cui@intel.com>
2139 * i386-dis.c (prefix_table): New instructions serialize.
2140 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
2141 CPU_ANY_SERIALIZE_FLAGS.
2142 (cpu_flags): Add CpuSERIALIZE.
2143 * i386-opc.h (enum): Add CpuSERIALIZE.
2144 (i386_cpu_flags): Add cpuserialize.
2145 * i386-opc.tbl: Add SERIALIZE insns.
2146 * i386-init.h: Regenerate.
2147 * i386-tbl.h: Likewise.
2149 2020-03-26 Alan Modra <amodra@gmail.com>
2151 * disassemble.h (opcodes_assert): Declare.
2152 (OPCODES_ASSERT): Define.
2153 * disassemble.c: Don't include assert.h. Include opintl.h.
2154 (opcodes_assert): New function.
2155 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
2156 (bfd_h8_disassemble): Reduce size of data array. Correctly
2157 calculate maxlen. Omit insn decoding when insn length exceeds
2158 maxlen. Exit from nibble loop when looking for E, before
2159 accessing next data byte. Move processing of E outside loop.
2160 Replace tests of maxlen in loop with assertions.
2162 2020-03-26 Alan Modra <amodra@gmail.com>
2164 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
2166 2020-03-25 Alan Modra <amodra@gmail.com>
2168 * z80-dis.c (suffix): Init mybuf.
2170 2020-03-22 Alan Modra <amodra@gmail.com>
2172 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
2173 successflly read from section.
2175 2020-03-22 Alan Modra <amodra@gmail.com>
2177 * arc-dis.c (find_format): Use ISO C string concatenation rather
2178 than line continuation within a string. Don't access needs_limm
2179 before testing opcode != NULL.
2181 2020-03-22 Alan Modra <amodra@gmail.com>
2183 * ns32k-dis.c (print_insn_arg): Update comment.
2184 (print_insn_ns32k): Reduce size of index_offset array, and
2185 initialize, passing -1 to print_insn_arg for args that are not
2186 an index. Don't exit arg loop early. Abort on bad arg number.
2188 2020-03-22 Alan Modra <amodra@gmail.com>
2190 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
2191 * s12z-opc.c: Formatting.
2192 (operands_f): Return an int.
2193 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
2194 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
2195 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
2196 (exg_sex_discrim): Likewise.
2197 (create_immediate_operand, create_bitfield_operand),
2198 (create_register_operand_with_size, create_register_all_operand),
2199 (create_register_all16_operand, create_simple_memory_operand),
2200 (create_memory_operand, create_memory_auto_operand): Don't
2201 segfault on malloc failure.
2202 (z_ext24_decode): Return an int status, negative on fail, zero
2204 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
2205 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
2206 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
2207 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
2208 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
2209 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
2210 (loop_primitive_decode, shift_decode, psh_pul_decode),
2211 (bit_field_decode): Similarly.
2212 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
2213 to return value, update callers.
2214 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
2215 Don't segfault on NULL operand.
2216 (decode_operation): Return OP_INVALID on first fail.
2217 (decode_s12z): Check all reads, returning -1 on fail.
2219 2020-03-20 Alan Modra <amodra@gmail.com>
2221 * metag-dis.c (print_insn_metag): Don't ignore status from
2224 2020-03-20 Alan Modra <amodra@gmail.com>
2226 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
2227 Initialize parts of buffer not written when handling a possible
2228 2-byte insn at end of section. Don't attempt decoding of such
2229 an insn by the 4-byte machinery.
2231 2020-03-20 Alan Modra <amodra@gmail.com>
2233 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
2234 partially filled buffer. Prevent lookup of 4-byte insns when
2235 only VLE 2-byte insns are possible due to section size. Print
2236 ".word" rather than ".long" for 2-byte leftovers.
2238 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
2241 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
2243 2020-03-13 Jan Beulich <jbeulich@suse.com>
2245 * i386-dis.c (X86_64_0D): Rename to ...
2246 (X86_64_0E): ... this.
2248 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
2250 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
2251 * Makefile.in: Regenerated.
2253 2020-03-09 Jan Beulich <jbeulich@suse.com>
2255 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
2257 * i386-tbl.h: Re-generate.
2259 2020-03-09 Jan Beulich <jbeulich@suse.com>
2261 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
2262 vprot*, vpsha*, and vpshl*.
2263 * i386-tbl.h: Re-generate.
2265 2020-03-09 Jan Beulich <jbeulich@suse.com>
2267 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
2268 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
2269 * i386-tbl.h: Re-generate.
2271 2020-03-09 Jan Beulich <jbeulich@suse.com>
2273 * i386-gen.c (set_bitfield): Ignore zero-length field names.
2274 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2275 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2276 * i386-tbl.h: Re-generate.
2278 2020-03-09 Jan Beulich <jbeulich@suse.com>
2280 * i386-gen.c (struct template_arg, struct template_instance,
2281 struct template_param, struct template, templates,
2282 parse_template, expand_templates): New.
2283 (process_i386_opcodes): Various local variables moved to
2284 expand_templates. Call parse_template and expand_templates.
2285 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2286 * i386-tbl.h: Re-generate.
2288 2020-03-06 Jan Beulich <jbeulich@suse.com>
2290 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2291 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2292 register and memory source templates. Replace VexW= by VexW*
2294 * i386-tbl.h: Re-generate.
2296 2020-03-06 Jan Beulich <jbeulich@suse.com>
2298 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2299 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2300 * i386-tbl.h: Re-generate.
2302 2020-03-06 Jan Beulich <jbeulich@suse.com>
2304 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2305 * i386-tbl.h: Re-generate.
2307 2020-03-06 Jan Beulich <jbeulich@suse.com>
2309 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2310 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2311 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2312 VexW0 on SSE2AVX variants.
2313 (vmovq): Drop NoRex64 from XMM/XMM variants.
2314 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2315 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2316 applicable use VexW0.
2317 * i386-tbl.h: Re-generate.
2319 2020-03-06 Jan Beulich <jbeulich@suse.com>
2321 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2322 * i386-opc.h (Rex64): Delete.
2323 (struct i386_opcode_modifier): Remove rex64 field.
2324 * i386-opc.tbl (crc32): Drop Rex64.
2325 Replace Rex64 with Size64 everywhere else.
2326 * i386-tbl.h: Re-generate.
2328 2020-03-06 Jan Beulich <jbeulich@suse.com>
2330 * i386-dis.c (OP_E_memory): Exclude recording of used address
2331 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2332 addressed memory operands for MPX insns.
2334 2020-03-06 Jan Beulich <jbeulich@suse.com>
2336 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2337 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2338 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2339 (ptwrite): Split into non-64-bit and 64-bit forms.
2340 * i386-tbl.h: Re-generate.
2342 2020-03-06 Jan Beulich <jbeulich@suse.com>
2344 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2346 * i386-tbl.h: Re-generate.
2348 2020-03-04 Jan Beulich <jbeulich@suse.com>
2350 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2351 (prefix_table): Move vmmcall here. Add vmgexit.
2352 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2353 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2354 (cpu_flags): Add CpuSEV_ES entry.
2355 * i386-opc.h (CpuSEV_ES): New.
2356 (union i386_cpu_flags): Add cpusev_es field.
2357 * i386-opc.tbl (vmgexit): New.
2358 * i386-init.h, i386-tbl.h: Re-generate.
2360 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2362 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2364 * i386-opc.h (IGNORESIZE): New.
2365 (DEFAULTSIZE): Likewise.
2366 (IgnoreSize): Removed.
2367 (DefaultSize): Likewise.
2368 (MnemonicSize): New.
2369 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2371 * i386-opc.tbl (IgnoreSize): New.
2372 (DefaultSize): Likewise.
2373 * i386-tbl.h: Regenerated.
2375 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2378 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2381 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2384 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2385 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2386 * i386-tbl.h: Regenerated.
2388 2020-02-26 Alan Modra <amodra@gmail.com>
2390 * aarch64-asm.c: Indent labels correctly.
2391 * aarch64-dis.c: Likewise.
2392 * aarch64-gen.c: Likewise.
2393 * aarch64-opc.c: Likewise.
2394 * alpha-dis.c: Likewise.
2395 * i386-dis.c: Likewise.
2396 * nds32-asm.c: Likewise.
2397 * nfp-dis.c: Likewise.
2398 * visium-dis.c: Likewise.
2400 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2402 * arc-regs.h (int_vector_base): Make it available for all ARC
2405 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2407 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2410 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2412 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2413 c.mv/c.li if rs1 is zero.
2415 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2417 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2418 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2420 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2421 * i386-opc.h (CpuABM): Removed.
2423 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2424 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2425 popcnt. Remove CpuABM from lzcnt.
2426 * i386-init.h: Regenerated.
2427 * i386-tbl.h: Likewise.
2429 2020-02-17 Jan Beulich <jbeulich@suse.com>
2431 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2432 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2433 VexW1 instead of open-coding them.
2434 * i386-tbl.h: Re-generate.
2436 2020-02-17 Jan Beulich <jbeulich@suse.com>
2438 * i386-opc.tbl (AddrPrefixOpReg): Define.
2439 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2440 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2441 templates. Drop NoRex64.
2442 * i386-tbl.h: Re-generate.
2444 2020-02-17 Jan Beulich <jbeulich@suse.com>
2447 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2448 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2449 into Intel syntax instance (with Unpsecified) and AT&T one
2451 (vcvtneps2bf16): Likewise, along with folding the two so far
2453 * i386-tbl.h: Re-generate.
2455 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2457 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2458 CPU_ANY_SSE4A_FLAGS.
2460 2020-02-17 Alan Modra <amodra@gmail.com>
2462 * i386-gen.c (cpu_flag_init): Correct last change.
2464 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2466 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2469 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2471 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2474 2020-02-14 Jan Beulich <jbeulich@suse.com>
2477 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2478 destination for Cpu64-only variant.
2479 (movzx): Fold patterns.
2480 * i386-tbl.h: Re-generate.
2482 2020-02-13 Jan Beulich <jbeulich@suse.com>
2484 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2485 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2486 CPU_ANY_SSE4_FLAGS entry.
2487 * i386-init.h: Re-generate.
2489 2020-02-12 Jan Beulich <jbeulich@suse.com>
2491 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2492 with Unspecified, making the present one AT&T syntax only.
2493 * i386-tbl.h: Re-generate.
2495 2020-02-12 Jan Beulich <jbeulich@suse.com>
2497 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2498 * i386-tbl.h: Re-generate.
2500 2020-02-12 Jan Beulich <jbeulich@suse.com>
2503 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2504 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2505 Amd64 and Intel64 templates.
2506 (call, jmp): Likewise for far indirect variants. Dro
2508 * i386-tbl.h: Re-generate.
2510 2020-02-11 Jan Beulich <jbeulich@suse.com>
2512 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2513 * i386-opc.h (ShortForm): Delete.
2514 (struct i386_opcode_modifier): Remove shortform field.
2515 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2516 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2517 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2518 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2520 * i386-tbl.h: Re-generate.
2522 2020-02-11 Jan Beulich <jbeulich@suse.com>
2524 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2525 fucompi): Drop ShortForm from operand-less templates.
2526 * i386-tbl.h: Re-generate.
2528 2020-02-11 Alan Modra <amodra@gmail.com>
2530 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2531 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2532 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2533 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2534 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2536 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2538 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2539 (cde_opcodes): Add VCX* instructions.
2541 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2542 Matthew Malcomson <matthew.malcomson@arm.com>
2544 * arm-dis.c (struct cdeopcode32): New.
2545 (CDE_OPCODE): New macro.
2546 (cde_opcodes): New disassembly table.
2547 (regnames): New option to table.
2548 (cde_coprocs): New global variable.
2549 (print_insn_cde): New
2550 (print_insn_thumb32): Use print_insn_cde.
2551 (parse_arm_disassembler_options): Parse coprocN args.
2553 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2556 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2558 * i386-opc.h (AMD64): Removed.
2559 (Intel64): Likewose.
2561 (INTEL64): Likewise.
2562 (INTEL64ONLY): Likewise.
2563 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2564 * i386-opc.tbl (Amd64): New.
2565 (Intel64): Likewise.
2566 (Intel64Only): Likewise.
2567 Replace AMD64 with Amd64. Update sysenter/sysenter with
2568 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2569 * i386-tbl.h: Regenerated.
2571 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2574 * z80-dis.c: Add support for GBZ80 opcodes.
2576 2020-02-04 Alan Modra <amodra@gmail.com>
2578 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2580 2020-02-03 Alan Modra <amodra@gmail.com>
2582 * m32c-ibld.c: Regenerate.
2584 2020-02-01 Alan Modra <amodra@gmail.com>
2586 * frv-ibld.c: Regenerate.
2588 2020-01-31 Jan Beulich <jbeulich@suse.com>
2590 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2591 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2592 (OP_E_memory): Replace xmm_mdq_mode case label by
2593 vex_scalar_w_dq_mode one.
2594 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2596 2020-01-31 Jan Beulich <jbeulich@suse.com>
2598 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2599 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2600 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2601 (intel_operand_size): Drop vex_w_dq_mode case label.
2603 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2605 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2606 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2608 2020-01-30 Alan Modra <amodra@gmail.com>
2610 * m32c-ibld.c: Regenerate.
2612 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2614 * bpf-opc.c: Regenerate.
2616 2020-01-30 Jan Beulich <jbeulich@suse.com>
2618 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2619 (dis386): Use them to replace C2/C3 table entries.
2620 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2621 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2622 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2623 * i386-tbl.h: Re-generate.
2625 2020-01-30 Jan Beulich <jbeulich@suse.com>
2627 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2629 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2631 * i386-tbl.h: Re-generate.
2633 2020-01-30 Alan Modra <amodra@gmail.com>
2635 * tic4x-dis.c (tic4x_dp): Make unsigned.
2637 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2638 Jan Beulich <jbeulich@suse.com>
2641 * i386-dis.c (MOVSXD_Fixup): New function.
2642 (movsxd_mode): New enum.
2643 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2644 (intel_operand_size): Handle movsxd_mode.
2645 (OP_E_register): Likewise.
2647 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2648 register on movsxd. Add movsxd with 16-bit destination register
2649 for AMD64 and Intel64 ISAs.
2650 * i386-tbl.h: Regenerated.
2652 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2655 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2656 * aarch64-asm-2.c: Regenerate
2657 * aarch64-dis-2.c: Likewise.
2658 * aarch64-opc-2.c: Likewise.
2660 2020-01-21 Jan Beulich <jbeulich@suse.com>
2662 * i386-opc.tbl (sysret): Drop DefaultSize.
2663 * i386-tbl.h: Re-generate.
2665 2020-01-21 Jan Beulich <jbeulich@suse.com>
2667 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2669 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2670 * i386-tbl.h: Re-generate.
2672 2020-01-20 Nick Clifton <nickc@redhat.com>
2674 * po/de.po: Updated German translation.
2675 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2676 * po/uk.po: Updated Ukranian translation.
2678 2020-01-20 Alan Modra <amodra@gmail.com>
2680 * hppa-dis.c (fput_const): Remove useless cast.
2682 2020-01-20 Alan Modra <amodra@gmail.com>
2684 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2686 2020-01-18 Nick Clifton <nickc@redhat.com>
2688 * configure: Regenerate.
2689 * po/opcodes.pot: Regenerate.
2691 2020-01-18 Nick Clifton <nickc@redhat.com>
2693 Binutils 2.34 branch created.
2695 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2697 * opintl.h: Fix spelling error (seperate).
2699 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2701 * i386-opc.tbl: Add {vex} pseudo prefix.
2702 * i386-tbl.h: Regenerated.
2704 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2707 * arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2708 (neon_opcodes): Likewise.
2709 (select_arm_features): Make sure we enable MVE bits when selecting
2710 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2713 2020-01-16 Jan Beulich <jbeulich@suse.com>
2715 * i386-opc.tbl: Drop stale comment from XOP section.
2717 2020-01-16 Jan Beulich <jbeulich@suse.com>
2719 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2720 (extractps): Add VexWIG to SSE2AVX forms.
2721 * i386-tbl.h: Re-generate.
2723 2020-01-16 Jan Beulich <jbeulich@suse.com>
2725 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2726 Size64 from and use VexW1 on SSE2AVX forms.
2727 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2728 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2729 * i386-tbl.h: Re-generate.
2731 2020-01-15 Alan Modra <amodra@gmail.com>
2733 * tic4x-dis.c (tic4x_version): Make unsigned long.
2734 (optab, optab_special, registernames): New file scope vars.
2735 (tic4x_print_register): Set up registernames rather than
2736 malloc'd registertable.
2737 (tic4x_disassemble): Delete optable and optable_special. Use
2738 optab and optab_special instead. Throw away old optab,
2739 optab_special and registernames when info->mach changes.
2741 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2744 * z80-dis.c (suffix): Use .db instruction to generate double
2747 2020-01-14 Alan Modra <amodra@gmail.com>
2749 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2750 values to unsigned before shifting.
2752 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2754 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2756 (print_insn_thumb16, print_insn_thumb32): Likewise.
2757 (print_insn): Initialize the insn info.
2758 * i386-dis.c (print_insn): Initialize the insn info fields, and
2761 2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
2763 * arc-opc.c (C_NE): Make it required.
2765 2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
2767 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2768 reserved register name.
2770 2020-01-13 Alan Modra <amodra@gmail.com>
2772 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2773 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2775 2020-01-13 Alan Modra <amodra@gmail.com>
2777 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2778 result of wasm_read_leb128 in a uint64_t and check that bits
2779 are not lost when copying to other locals. Use uint32_t for
2780 most locals. Use PRId64 when printing int64_t.
2782 2020-01-13 Alan Modra <amodra@gmail.com>
2784 * score-dis.c: Formatting.
2785 * score7-dis.c: Formatting.
2787 2020-01-13 Alan Modra <amodra@gmail.com>
2789 * score-dis.c (print_insn_score48): Use unsigned variables for
2790 unsigned values. Don't left shift negative values.
2791 (print_insn_score32): Likewise.
2792 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2794 2020-01-13 Alan Modra <amodra@gmail.com>
2796 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2798 2020-01-13 Alan Modra <amodra@gmail.com>
2800 * fr30-ibld.c: Regenerate.
2802 2020-01-13 Alan Modra <amodra@gmail.com>
2804 * xgate-dis.c (print_insn): Don't left shift signed value.
2805 (ripBits): Formatting, use 1u.
2807 2020-01-10 Alan Modra <amodra@gmail.com>
2809 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2810 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2812 2020-01-10 Alan Modra <amodra@gmail.com>
2814 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2815 and XRREG value earlier to avoid a shift with negative exponent.
2816 * m10200-dis.c (disassemble): Similarly.
2818 2020-01-09 Nick Clifton <nickc@redhat.com>
2821 * z80-dis.c (ld_ii_ii): Use correct cast.
2823 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2826 * z80-dis.c (ld_ii_ii): Use character constant when checking
2829 2020-01-09 Jan Beulich <jbeulich@suse.com>
2831 * i386-dis.c (SEP_Fixup): New.
2833 (dis386_twobyte): Use it for sysenter/sysexit.
2834 (enum x86_64_isa): Change amd64 enumerator to value 1.
2835 (OP_J): Compare isa64 against intel64 instead of amd64.
2836 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2838 * i386-tbl.h: Re-generate.
2840 2020-01-08 Alan Modra <amodra@gmail.com>
2842 * z8k-dis.c: Include libiberty.h
2843 (instr_data_s): Make max_fetched unsigned.
2844 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2845 Don't exceed byte_info bounds.
2846 (output_instr): Make num_bytes unsigned.
2847 (unpack_instr): Likewise for nibl_count and loop.
2848 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2850 * z8k-opc.h: Regenerate.
2852 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2854 * arc-tbl.h (llock): Use 'LLOCK' as class.
2856 (scond): Use 'SCOND' as class.
2858 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2861 2020-01-06 Alan Modra <amodra@gmail.com>
2863 * m32c-ibld.c: Regenerate.
2865 2020-01-06 Alan Modra <amodra@gmail.com>
2868 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2869 Peek at next byte to prevent recursion on repeated prefix bytes.
2870 Ensure uninitialised "mybuf" is not accessed.
2871 (print_insn_z80): Don't zero n_fetch and n_used here,..
2872 (print_insn_z80_buf): ..do it here instead.
2874 2020-01-04 Alan Modra <amodra@gmail.com>
2876 * m32r-ibld.c: Regenerate.
2878 2020-01-04 Alan Modra <amodra@gmail.com>
2880 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2882 2020-01-04 Alan Modra <amodra@gmail.com>
2884 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2886 2020-01-04 Alan Modra <amodra@gmail.com>
2888 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2890 2020-01-03 Jan Beulich <jbeulich@suse.com>
2892 * aarch64-tbl.h (aarch64_opcode_table): Use
2893 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2895 2020-01-03 Jan Beulich <jbeulich@suse.com>
2897 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2898 forms of SUDOT and USDOT.
2900 2020-01-03 Jan Beulich <jbeulich@suse.com>
2902 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2904 * aarch64-dis-2.c: Re-generate.
2906 2020-01-03 Jan Beulich <jbeulich@suse.com>
2908 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2910 * aarch64-dis-2.c: Re-generate.
2912 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2914 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2916 2020-01-01 Alan Modra <amodra@gmail.com>
2918 Update year range in copyright notice of all files.
2920 For older changes see ChangeLog-2019
2922 Copyright (C) 2020 Free Software Foundation, Inc.
2924 Copying and distribution of this file, with or without modification,
2925 are permitted in any medium without royalty provided the copyright
2926 notice and this notice are preserved.
2932 version-control: never
projects / deliverable / binutils-gdb.git / blob