1 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
3 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
4 faulty double register pair is detected.
6 2020-07-14 Jan Beulich <jbeulich@suse.com>
8 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
10 2020-07-14 Jan Beulich <jbeulich@suse.com>
12 * i386-dis.c (OP_R, Rm): Delete.
13 (MOD_0F24, MOD_0F26): Rename to ...
14 (X86_64_0F24, X86_64_0F26): ... respectively.
15 (dis386): Update 'L' and 'Z' comments.
16 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
18 (mod_table): Move opcode 0F24 and 0F26 entries ...
19 (x86_64_table): ... here.
20 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
23 2020-07-14 Jan Beulich <jbeulich@suse.com>
25 * i386-dis.c (Rd, Rdq, MaskR): Delete.
26 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
27 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
28 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
29 MOD_EVEX_0F387C): New enumerators.
30 (reg_table): Use Edq for rdssp.
31 (prefix_table): Use Edq for incssp.
32 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
33 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
34 ktest*, and kshift*. Use Edq / MaskE for kmov*.
35 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
36 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
37 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
38 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
39 0F3828_P_1 and 0F3838_P_1.
40 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
41 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
43 2020-07-14 Jan Beulich <jbeulich@suse.com>
45 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
46 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
47 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
48 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
49 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
50 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
51 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
52 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
53 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
54 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
55 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
56 (reg_table, prefix_table, three_byte_table, vex_table,
57 vex_len_table, mod_table, rm_table): Replace / remove respective
59 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
60 of PREFIX_DATA in used_prefixes.
62 2020-07-14 Jan Beulich <jbeulich@suse.com>
64 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
65 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
66 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
67 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
68 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
69 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
70 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
71 VEX_W_0F3A33_L_0): Delete.
72 (dis386): Adjust "BW" description.
73 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
74 0F3A31, 0F3A32, and 0F3A33.
75 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
77 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
80 2020-07-14 Jan Beulich <jbeulich@suse.com>
82 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
83 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
84 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
85 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
86 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
87 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
88 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
89 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
90 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
91 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
92 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
93 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
94 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
95 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
96 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
97 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
98 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
99 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
100 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
101 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
102 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
103 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
104 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
105 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
106 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
107 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
108 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
109 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
110 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
111 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
112 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
113 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
114 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
115 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
116 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
117 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
118 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
119 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
120 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
121 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
122 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
123 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
124 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
125 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
126 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
127 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
128 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
129 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
130 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
131 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
132 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
133 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
134 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
135 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
136 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
137 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
138 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
139 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
140 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
141 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
142 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
143 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
144 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
145 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
146 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
147 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
148 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
149 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
150 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
151 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
152 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
153 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
154 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
155 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
156 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
157 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
158 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
159 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
160 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
161 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
162 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
163 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
164 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
165 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
166 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
167 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
168 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
169 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
170 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
171 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
172 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
173 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
174 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
175 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
176 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
177 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
178 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
179 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
180 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
181 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
182 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
183 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
184 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
185 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
186 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
187 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
188 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
189 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
190 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
191 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
192 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
193 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
194 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
195 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
196 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
197 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
198 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
199 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
200 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
201 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
202 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
203 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
204 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
205 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
206 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
207 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
208 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
209 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
210 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
211 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
212 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
213 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
214 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
215 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
216 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
217 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
218 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
219 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
220 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
221 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
222 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
223 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
224 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
225 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
226 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
227 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
228 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
229 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
230 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
231 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
232 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
233 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
234 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
235 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
236 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
237 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
238 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
239 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
240 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
241 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
242 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
243 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
244 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
245 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
246 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
247 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
248 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
249 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
250 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
251 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
252 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
253 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
254 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
255 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
256 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
257 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
258 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
259 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
260 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
261 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
262 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
263 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
264 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
265 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
266 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
267 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
268 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
269 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
270 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
271 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
272 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
273 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
274 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
275 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
276 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
277 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
278 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
279 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
280 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
281 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
282 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
283 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
284 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
285 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
286 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
287 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
288 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
289 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
290 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
291 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
292 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
293 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
294 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
295 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
296 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
297 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
298 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
299 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
300 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
301 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
302 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
303 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
304 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
305 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
306 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
307 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
308 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
309 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
310 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
311 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
312 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
313 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
314 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
315 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
316 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
317 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
318 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
319 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
320 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
321 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
322 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
323 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
324 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
325 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
326 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
327 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
328 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
329 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
330 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
331 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
332 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
333 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
334 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
335 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
336 EVEX_W_0F3A72_P_2): Rename to ...
337 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
338 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
339 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
340 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
341 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
342 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
343 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
344 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
345 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
346 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
347 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
348 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
349 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
350 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
351 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
352 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
353 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
354 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
355 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
356 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
357 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
358 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
359 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
360 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
361 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
362 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
363 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
364 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
365 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
366 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
367 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
368 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
369 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
370 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
371 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
372 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
373 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
374 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
375 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
376 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
377 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
378 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
379 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
380 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
381 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
382 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
383 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
384 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
385 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
386 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
387 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
388 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
389 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
390 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
391 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
392 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
393 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
394 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
395 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
396 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
397 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
398 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
399 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
400 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
401 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
402 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
403 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
404 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
405 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
406 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
407 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
408 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
410 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
411 vex_w_table, mod_table): Replace / remove respective entries.
412 (print_insn): Move up dp->prefix_requirement handling. Handle
414 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
415 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
416 Replace / remove respective entries.
418 2020-07-14 Jan Beulich <jbeulich@suse.com>
420 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
421 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
422 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
423 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
424 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
426 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
427 0F2C, 0F2D, 0F2E, and 0F2F.
428 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
431 2020-07-14 Jan Beulich <jbeulich@suse.com>
433 * i386-dis.c (OP_VexR, VexScalarR): New.
434 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
435 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
436 need_vex_reg): Delete.
437 (prefix_table): Replace VexScalar by VexScalarR and
438 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
439 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
440 (vex_len_table): Replace EXqVexScalarS by EXqS.
441 (get_valid_dis386): Don't set need_vex_reg.
442 (print_insn): Don't initialize need_vex_reg.
443 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
444 q_scalar_swap_mode cases.
445 (OP_EX): Don't check for d_scalar_swap_mode and
447 (OP_VEX): Done check need_vex_reg.
448 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
449 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
450 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
452 2020-07-14 Jan Beulich <jbeulich@suse.com>
454 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
455 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
456 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
457 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
458 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
459 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
460 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
461 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
462 (vex_table): Replace Vex128 by Vex.
463 (vex_len_table): Likewise. Adjust referenced enum names.
464 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
465 referenced enum names.
466 (OP_VEX): Drop vex128_mode and vex256_mode cases.
467 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
469 2020-07-14 Jan Beulich <jbeulich@suse.com>
471 * i386-dis.c (dis386): "LW" description now applies to "DQ".
472 (putop): Handle "DQ". Don't handle "LW" anymore.
473 (prefix_table, mod_table): Replace %LW by %DQ.
474 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
476 2020-07-14 Jan Beulich <jbeulich@suse.com>
478 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
479 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
480 d_scalar_swap_mode case handling. Move shift adjsutment into
481 the case its applicable to.
483 2020-07-14 Jan Beulich <jbeulich@suse.com>
485 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
486 (EXbScalar, EXwScalar): Fold to ...
487 (EXbwUnit): ... this.
488 (b_scalar_mode, w_scalar_mode): Fold to ...
489 (bw_unit_mode): ... this.
490 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
491 w_scalar_mode handling by bw_unit_mode one.
492 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
494 * i386-dis-evex-prefix.h: ... here.
496 2020-07-14 Jan Beulich <jbeulich@suse.com>
498 * i386-dis.c (PCMPESTR_Fixup): Delete.
499 (dis386): Adjust "LQ" description.
500 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
501 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
502 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
503 vpcmpestrm, and vpcmpestri.
504 (putop): Honor "cond" when handling LQ.
505 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
506 vcvtsi2ss and vcvtusi2ss.
507 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
508 vcvtsi2sd and vcvtusi2sd.
510 2020-07-14 Jan Beulich <jbeulich@suse.com>
512 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
513 (simd_cmp_op): Add const.
514 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
515 (CMP_Fixup): Handle VEX case.
516 (prefix_table): Replace VCMP by CMP.
517 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
519 2020-07-14 Jan Beulich <jbeulich@suse.com>
521 * i386-dis.c (MOVBE_Fixup): Delete.
523 (prefix_table): Use Mv for movbe entries.
525 2020-07-14 Jan Beulich <jbeulich@suse.com>
527 * i386-dis.c (CRC32_Fixup): Delete.
528 (prefix_table): Use Eb/Ev for crc32 entries.
530 2020-07-14 Jan Beulich <jbeulich@suse.com>
532 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
533 Conditionalize invocations of "USED_REX (0)".
535 2020-07-14 Jan Beulich <jbeulich@suse.com>
537 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
538 CH, DH, BH, AX, DX): Delete.
539 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
540 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
541 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
543 2020-07-10 Lili Cui <lili.cui@intel.com>
545 * i386-dis.c (TMM): New.
548 (MVexSIBMEM): Likewise.
549 (tmm_mode): Likewise.
550 (vex_sibmem_mode): Likewise.
551 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
552 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
553 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
554 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
555 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
556 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
557 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
558 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
559 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
560 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
561 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
562 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
563 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
564 (PREFIX_VEX_0F3849_X86_64): Likewise.
565 (PREFIX_VEX_0F384B_X86_64): Likewise.
566 (PREFIX_VEX_0F385C_X86_64): Likewise.
567 (PREFIX_VEX_0F385E_X86_64): Likewise.
568 (X86_64_VEX_0F3849): Likewise.
569 (X86_64_VEX_0F384B): Likewise.
570 (X86_64_VEX_0F385C): Likewise.
571 (X86_64_VEX_0F385E): Likewise.
572 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
573 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
574 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
575 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
576 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
577 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
578 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
579 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
580 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
581 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
582 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
583 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
584 (VEX_W_0F3849_X86_64_P_0): Likewise.
585 (VEX_W_0F3849_X86_64_P_2): Likewise.
586 (VEX_W_0F3849_X86_64_P_3): Likewise.
587 (VEX_W_0F384B_X86_64_P_1): Likewise.
588 (VEX_W_0F384B_X86_64_P_2): Likewise.
589 (VEX_W_0F384B_X86_64_P_3): Likewise.
590 (VEX_W_0F385C_X86_64_P_1): Likewise.
591 (VEX_W_0F385E_X86_64_P_0): Likewise.
592 (VEX_W_0F385E_X86_64_P_1): Likewise.
593 (VEX_W_0F385E_X86_64_P_2): Likewise.
594 (VEX_W_0F385E_X86_64_P_3): Likewise.
595 (names_tmm): Likewise.
596 (att_names_tmm): Likewise.
597 (intel_operand_size): Handle void_mode.
598 (OP_XMM): Handle tmm_mode.
601 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
602 CpuAMX_BF16 and CpuAMX_TILE.
603 (operand_type_shorthands): Add RegTMM.
604 (operand_type_init): Likewise.
605 (operand_types): Add Tmmword.
606 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
607 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
608 * i386-opc.h (CpuAMX_INT8): New.
609 (CpuAMX_BF16): Likewise.
610 (CpuAMX_TILE): Likewise.
613 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
614 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
615 (i386_operand_type): Add tmmword.
616 * i386-opc.tbl: Add AMX instructions.
617 * i386-reg.tbl: Add AMX registers.
618 * i386-init.h: Regenerated.
619 * i386-tbl.h: Likewise.
621 2020-07-08 Jan Beulich <jbeulich@suse.com>
623 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
624 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
626 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
627 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
629 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
630 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
631 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
632 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
633 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
634 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
635 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
636 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
637 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
638 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
639 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
640 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
641 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
642 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
643 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
644 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
645 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
646 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
647 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
648 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
649 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
650 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
651 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
652 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
653 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
654 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
655 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
656 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
657 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
658 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
659 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
660 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
661 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
662 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
663 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
664 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
665 (reg_table): Re-order XOP entries. Adjust their operands.
666 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
667 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
668 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
669 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
670 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
671 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
672 entries by references ...
673 (vex_len_table): ... to resepctive new entries here. For several
674 new and existing entries reference ...
675 (vex_w_table): ... new entries here.
676 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
678 2020-07-08 Jan Beulich <jbeulich@suse.com>
680 * i386-dis.c (XMVexScalarI4): Define.
681 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
682 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
683 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
684 (vex_len_table): Move scalar FMA4 entries ...
685 (prefix_table): ... here.
686 (OP_REG_VexI4): Handle scalar_mode.
687 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
688 * i386-tbl.h: Re-generate.
690 2020-07-08 Jan Beulich <jbeulich@suse.com>
692 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
694 (OP_VexW, VexW): New.
695 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
696 for shifts and rotates by register.
698 2020-07-08 Jan Beulich <jbeulich@suse.com>
700 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
701 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
702 OP_EX_VexReg): Delete.
703 (OP_VexI4, VexI4): New.
704 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
705 (prefix_table): ... here.
706 (print_insn): Drop setting of vex_w_done.
708 2020-07-08 Jan Beulich <jbeulich@suse.com>
710 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
711 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
712 (xop_table): Replace operands of 4-operand insns.
713 (OP_REG_VexI4): Move VEX.W based operand swaping here.
715 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
717 * arc-opc.c (insert_rbd): New function.
720 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
723 2020-07-07 Jan Beulich <jbeulich@suse.com>
725 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
726 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
727 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
728 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
730 (putop): Handle "BW".
731 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
732 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
734 * i386-dis-evex-prefix.h: ... here.
736 2020-07-06 Jan Beulich <jbeulich@suse.com>
738 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
739 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
740 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
741 VEX_W_0FXOP_09_83): New enumerators.
742 (xop_table): Reference the above.
743 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
744 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
745 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
746 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
748 2020-07-06 Jan Beulich <jbeulich@suse.com>
750 * i386-dis.c (EVEX_W_0F3838_P_1,
751 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
752 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
753 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
754 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
755 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
756 (putop): Centralize management of last[]. Delete SAVE_LAST.
757 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
758 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
759 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
760 * i386-dis-evex-prefix.h: here.
762 2020-07-06 Jan Beulich <jbeulich@suse.com>
764 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
765 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
766 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
767 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
769 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
770 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
771 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
772 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
773 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
774 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
775 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
776 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
778 * i386-dis-evex-len.h: Adjust comments.
779 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
780 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
781 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
782 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
783 MOD_EVEX_0F385B_P_2_W_1 table entries.
784 * i386-dis-evex-w.h: Reference mod_table[] for
785 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
788 2020-07-06 Jan Beulich <jbeulich@suse.com>
790 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
791 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
793 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
794 Likewise. Mark 256-bit entries invalid.
796 2020-07-06 Jan Beulich <jbeulich@suse.com>
798 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
799 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
800 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
801 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
802 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
803 PREFIX_EVEX_0F382B): Delete.
804 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
805 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
806 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
807 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
808 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
810 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
811 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
812 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
813 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
815 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
816 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
817 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
818 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
819 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
820 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
821 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
822 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
823 PREFIX_EVEX_0F382B): Remove table entries.
824 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
825 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
826 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
828 2020-07-06 Jan Beulich <jbeulich@suse.com>
830 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
831 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
833 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
834 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
835 EVEX_LEN_0F3A01_P_2_W_1 table entries.
836 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
839 2020-07-06 Jan Beulich <jbeulich@suse.com>
841 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
842 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
843 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
844 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
845 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
846 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
847 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
848 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
849 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
852 2020-07-06 Jan Beulich <jbeulich@suse.com>
854 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
855 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
856 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
858 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
860 * i386-dis-evex.h (evex_table): Reference VEX table entry for
862 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
864 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
866 2020-07-06 Jan Beulich <jbeulich@suse.com>
868 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
869 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
870 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
871 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
872 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
873 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
874 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
875 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
876 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
877 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
878 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
879 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
880 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
881 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
882 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
883 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
884 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
885 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
886 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
887 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
888 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
889 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
890 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
891 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
892 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
893 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
894 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
895 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
896 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
897 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
898 (prefix_table): Add EXxEVexR to FMA table entries.
899 (OP_Rounding): Move abort() invocation.
900 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
901 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
902 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
903 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
904 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
905 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
906 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
907 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
908 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
909 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
911 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
912 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
913 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
914 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
915 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
916 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
917 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
918 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
919 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
920 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
921 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
922 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
923 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
924 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
925 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
926 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
927 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
928 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
929 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
930 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
931 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
932 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
933 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
934 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
935 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
936 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
937 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
938 Delete table entries.
939 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
940 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
941 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
944 2020-07-06 Jan Beulich <jbeulich@suse.com>
946 * i386-dis.c (EXqScalarS): Delete.
947 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
948 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
950 2020-07-06 Jan Beulich <jbeulich@suse.com>
952 * i386-dis.c (safe-ctype.h): Include.
953 (EXdScalar, EXqScalar): Delete.
954 (d_scalar_mode, q_scalar_mode): Delete.
955 (prefix_table, vex_len_table): Use EXxmm_md in place of
956 EXdScalar and EXxmm_mq in place of EXqScalar.
957 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
958 d_scalar_mode and q_scalar_mode.
959 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
960 (vmovsd): Use EXxmm_mq.
962 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
965 * arc-dis.c: Fix spelling mistake.
966 * po/opcodes.pot: Regenerate.
968 2020-07-06 Nick Clifton <nickc@redhat.com>
970 * po/pt_BR.po: Updated Brazilian Portugugese translation.
971 * po/uk.po: Updated Ukranian translation.
973 2020-07-04 Nick Clifton <nickc@redhat.com>
975 * configure: Regenerate.
976 * po/opcodes.pot: Regenerate.
978 2020-07-04 Nick Clifton <nickc@redhat.com>
980 Binutils 2.35 branch created.
982 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
984 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
985 * i386-opc.h (VexSwapSources): New.
986 (i386_opcode_modifier): Add vexswapsources.
987 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
988 with two source operands swapped.
989 * i386-tbl.h: Regenerated.
991 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
993 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
994 unprivileged CSR can also be initialized.
996 2020-06-29 Alan Modra <amodra@gmail.com>
998 * arm-dis.c: Use C style comments.
999 * cr16-opc.c: Likewise.
1000 * ft32-dis.c: Likewise.
1001 * moxie-opc.c: Likewise.
1002 * tic54x-dis.c: Likewise.
1003 * s12z-opc.c: Remove useless comment.
1004 * xgate-dis.c: Likewise.
1006 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1008 * i386-opc.tbl: Add a blank line.
1010 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1012 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1013 (VecSIB128): Renamed to ...
1015 (VecSIB256): Renamed to ...
1017 (VecSIB512): Renamed to ...
1019 (VecSIB): Renamed to ...
1021 (i386_opcode_modifier): Replace vecsib with sib.
1022 * i386-opc.tbl (VecSIB128): New.
1023 (VecSIB256): Likewise.
1024 (VecSIB512): Likewise.
1025 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1026 and VecSIB512, respectively.
1028 2020-06-26 Jan Beulich <jbeulich@suse.com>
1030 * i386-dis.c: Adjust description of I macro.
1031 (x86_64_table): Drop use of I.
1032 (float_mem): Replace use of I.
1033 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1035 2020-06-26 Jan Beulich <jbeulich@suse.com>
1037 * i386-dis.c: (print_insn): Avoid straight assignment to
1038 priv.orig_sizeflag when processing -M sub-options.
1040 2020-06-25 Jan Beulich <jbeulich@suse.com>
1042 * i386-dis.c: Adjust description of J macro.
1043 (dis386, x86_64_table, mod_table): Replace J.
1044 (putop): Remove handling of J.
1046 2020-06-25 Jan Beulich <jbeulich@suse.com>
1048 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1050 2020-06-25 Jan Beulich <jbeulich@suse.com>
1052 * i386-dis.c: Adjust description of "LQ" macro.
1053 (dis386_twobyte): Use LQ for sysret.
1054 (putop): Adjust handling of LQ.
1056 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1058 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1059 * riscv-dis.c: Include elfxx-riscv.h.
1061 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1063 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1065 2020-06-17 Lili Cui <lili.cui@intel.com>
1067 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1069 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1072 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1073 * i386-opc.tbl: Likewise.
1074 * i386-tbl.h: Regenerated.
1076 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1078 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1080 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1082 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1083 (SR_CORE): Likewise.
1084 (SR_FEAT): Likewise.
1086 (SR_V8_1): Likewise.
1087 (SR_V8_2): Likewise.
1088 (SR_V8_3): Likewise.
1089 (SR_V8_4): Likewise.
1092 (SR_SSBS): Likewise.
1094 (SR_ID_PFR2): Likewise.
1095 (SR_PROFILE): Likewise.
1096 (SR_MEMTAG): Likewise.
1097 (SR_SCXTNUM): Likewise.
1098 (aarch64_sys_regs): Refactor to store feature information in the table.
1099 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1100 that now describe their own features.
1101 (aarch64_pstatefield_supported_p): Likewise.
1103 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1105 * i386-dis.c (prefix_table): Fix a typo in comments.
1107 2020-06-09 Jan Beulich <jbeulich@suse.com>
1109 * i386-dis.c (rex_ignored): Delete.
1110 (ckprefix): Drop rex_ignored initialization.
1111 (get_valid_dis386): Drop setting of rex_ignored.
1112 (print_insn): Drop checking of rex_ignored. Don't record data
1113 size prefix as used with VEX-and-alike encodings.
1115 2020-06-09 Jan Beulich <jbeulich@suse.com>
1117 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1118 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1119 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1120 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1121 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1122 VEX_0F12, and VEX_0F16.
1123 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1124 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1125 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1126 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1127 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1128 MOD_VEX_0F16_PREFIX_2 entries.
1130 2020-06-09 Jan Beulich <jbeulich@suse.com>
1132 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1133 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1134 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1135 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1136 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1137 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1138 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1139 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1140 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1141 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1142 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1143 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1144 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1145 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1146 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1147 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1148 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1149 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1150 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1151 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1152 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1153 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1154 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1155 EVEX_W_0FC6_P_2): Delete.
1156 (print_insn): Add EVEX.W vs embedded prefix consistency check
1157 to prefix validation.
1158 * i386-dis-evex.h (evex_table): Don't further descend for
1159 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1160 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1162 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1163 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1164 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1165 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1166 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1167 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1168 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1169 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1170 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1171 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1172 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1173 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1174 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1175 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1176 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1177 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1178 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1179 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1180 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1181 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1182 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1183 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1184 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1185 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1186 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1187 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1188 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1190 2020-06-09 Jan Beulich <jbeulich@suse.com>
1192 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1193 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1194 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1196 (print_insn): Drop pointless check against bad_opcode. Split
1197 prefix validation into legacy and VEX-and-alike parts.
1198 (putop): Re-work 'X' macro handling.
1200 2020-06-09 Jan Beulich <jbeulich@suse.com>
1202 * i386-dis.c (MOD_0F51): Rename to ...
1203 (MOD_0F50): ... this.
1205 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1207 * arm-dis.c (arm_opcodes): Add dfb.
1208 (thumb32_opcodes): Add dfb.
1210 2020-06-08 Jan Beulich <jbeulich@suse.com>
1212 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1214 2020-06-06 Alan Modra <amodra@gmail.com>
1216 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1218 2020-06-05 Alan Modra <amodra@gmail.com>
1220 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1221 size is large enough.
1223 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1225 * disassemble.c (disassemble_init_for_target): Set endian_code for
1227 * bpf-desc.c: Regenerate.
1228 * bpf-opc.c: Likewise.
1229 * bpf-dis.c: Likewise.
1231 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1233 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1234 (cgen_put_insn_value): Likewise.
1235 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1236 * cgen-dis.in (print_insn): Likewise.
1237 * cgen-ibld.in (insert_1): Likewise.
1238 (insert_1): Likewise.
1239 (insert_insn_normal): Likewise.
1240 (extract_1): Likewise.
1241 * bpf-dis.c: Regenerate.
1242 * bpf-ibld.c: Likewise.
1243 * bpf-ibld.c: Likewise.
1244 * cgen-dis.in: Likewise.
1245 * cgen-ibld.in: Likewise.
1246 * cgen-opc.c: Likewise.
1247 * epiphany-dis.c: Likewise.
1248 * epiphany-ibld.c: Likewise.
1249 * fr30-dis.c: Likewise.
1250 * fr30-ibld.c: Likewise.
1251 * frv-dis.c: Likewise.
1252 * frv-ibld.c: Likewise.
1253 * ip2k-dis.c: Likewise.
1254 * ip2k-ibld.c: Likewise.
1255 * iq2000-dis.c: Likewise.
1256 * iq2000-ibld.c: Likewise.
1257 * lm32-dis.c: Likewise.
1258 * lm32-ibld.c: Likewise.
1259 * m32c-dis.c: Likewise.
1260 * m32c-ibld.c: Likewise.
1261 * m32r-dis.c: Likewise.
1262 * m32r-ibld.c: Likewise.
1263 * mep-dis.c: Likewise.
1264 * mep-ibld.c: Likewise.
1265 * mt-dis.c: Likewise.
1266 * mt-ibld.c: Likewise.
1267 * or1k-dis.c: Likewise.
1268 * or1k-ibld.c: Likewise.
1269 * xc16x-dis.c: Likewise.
1270 * xc16x-ibld.c: Likewise.
1271 * xstormy16-dis.c: Likewise.
1272 * xstormy16-ibld.c: Likewise.
1274 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1276 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1277 (print_insn_): Handle instruction endian.
1278 * bpf-dis.c: Regenerate.
1279 * bpf-desc.c: Regenerate.
1280 * epiphany-dis.c: Likewise.
1281 * epiphany-desc.c: Likewise.
1282 * fr30-dis.c: Likewise.
1283 * fr30-desc.c: Likewise.
1284 * frv-dis.c: Likewise.
1285 * frv-desc.c: Likewise.
1286 * ip2k-dis.c: Likewise.
1287 * ip2k-desc.c: Likewise.
1288 * iq2000-dis.c: Likewise.
1289 * iq2000-desc.c: Likewise.
1290 * lm32-dis.c: Likewise.
1291 * lm32-desc.c: Likewise.
1292 * m32c-dis.c: Likewise.
1293 * m32c-desc.c: Likewise.
1294 * m32r-dis.c: Likewise.
1295 * m32r-desc.c: Likewise.
1296 * mep-dis.c: Likewise.
1297 * mep-desc.c: Likewise.
1298 * mt-dis.c: Likewise.
1299 * mt-desc.c: Likewise.
1300 * or1k-dis.c: Likewise.
1301 * or1k-desc.c: Likewise.
1302 * xc16x-dis.c: Likewise.
1303 * xc16x-desc.c: Likewise.
1304 * xstormy16-dis.c: Likewise.
1305 * xstormy16-desc.c: Likewise.
1307 2020-06-03 Nick Clifton <nickc@redhat.com>
1309 * po/sr.po: Updated Serbian translation.
1311 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1313 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1314 (riscv_get_priv_spec_class): Likewise.
1316 2020-06-01 Alan Modra <amodra@gmail.com>
1318 * bpf-desc.c: Regenerate.
1320 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1321 David Faust <david.faust@oracle.com>
1323 * bpf-desc.c: Regenerate.
1324 * bpf-opc.h: Likewise.
1325 * bpf-opc.c: Likewise.
1326 * bpf-dis.c: Likewise.
1328 2020-05-28 Alan Modra <amodra@gmail.com>
1330 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1333 2020-05-28 Alan Modra <amodra@gmail.com>
1335 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1337 (print_insn_ns32k): Revert last change.
1339 2020-05-28 Nick Clifton <nickc@redhat.com>
1341 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1344 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1346 Fix extraction of signed constants in nios2 disassembler (again).
1348 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1349 extractions of signed fields.
1351 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1353 * s390-opc.txt: Relocate vector load/store instructions with
1354 additional alignment parameter and change architecture level
1355 constraint from z14 to z13.
1357 2020-05-21 Alan Modra <amodra@gmail.com>
1359 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1360 * sparc-dis.c: Likewise.
1361 * tic4x-dis.c: Likewise.
1362 * xtensa-dis.c: Likewise.
1363 * bpf-desc.c: Regenerate.
1364 * epiphany-desc.c: Regenerate.
1365 * fr30-desc.c: Regenerate.
1366 * frv-desc.c: Regenerate.
1367 * ip2k-desc.c: Regenerate.
1368 * iq2000-desc.c: Regenerate.
1369 * lm32-desc.c: Regenerate.
1370 * m32c-desc.c: Regenerate.
1371 * m32r-desc.c: Regenerate.
1372 * mep-asm.c: Regenerate.
1373 * mep-desc.c: Regenerate.
1374 * mt-desc.c: Regenerate.
1375 * or1k-desc.c: Regenerate.
1376 * xc16x-desc.c: Regenerate.
1377 * xstormy16-desc.c: Regenerate.
1379 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1381 * riscv-opc.c (riscv_ext_version_table): The table used to store
1382 all information about the supported spec and the corresponding ISA
1383 versions. Currently, only Zicsr is supported to verify the
1384 correctness of Z sub extension settings. Others will be supported
1385 in the future patches.
1386 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1387 classes and the corresponding strings.
1388 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1389 spec class by giving a ISA spec string.
1390 * riscv-opc.c (struct priv_spec_t): New structure.
1391 (struct priv_spec_t priv_specs): List for all supported privilege spec
1392 classes and the corresponding strings.
1393 (riscv_get_priv_spec_class): New function. Get the corresponding
1394 privilege spec class by giving a spec string.
1395 (riscv_get_priv_spec_name): New function. Get the corresponding
1396 privilege spec string by giving a CSR version class.
1397 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1398 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1399 according to the chosen version. Build a hash table riscv_csr_hash to
1400 store the valid CSR for the chosen pirv verison. Dump the direct
1401 CSR address rather than it's name if it is invalid.
1402 (parse_riscv_dis_option_without_args): New function. Parse the options
1404 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1405 parse the options without arguments first, and then handle the options
1406 with arguments. Add the new option -Mpriv-spec, which has argument.
1407 * riscv-dis.c (print_riscv_disassembler_options): Add description
1408 about the new OBJDUMP option.
1410 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1412 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1413 WC values on POWER10 sync, dcbf and wait instructions.
1414 (insert_pl, extract_pl): New functions.
1415 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1416 (LS3): New , 3-bit L for sync.
1417 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1418 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1419 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1420 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1421 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1422 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1423 <wait>: Enable PL operand on POWER10.
1424 <dcbf>: Enable L3OPT operand on POWER10.
1425 <sync>: Enable SC2 operand on POWER10.
1427 2020-05-19 Stafford Horne <shorne@gmail.com>
1430 * or1k-asm.c: Regenerate.
1431 * or1k-desc.c: Regenerate.
1432 * or1k-desc.h: Regenerate.
1433 * or1k-dis.c: Regenerate.
1434 * or1k-ibld.c: Regenerate.
1435 * or1k-opc.c: Regenerate.
1436 * or1k-opc.h: Regenerate.
1437 * or1k-opinst.c: Regenerate.
1439 2020-05-11 Alan Modra <amodra@gmail.com>
1441 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1444 2020-05-11 Alan Modra <amodra@gmail.com>
1446 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1447 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1449 2020-05-11 Alan Modra <amodra@gmail.com>
1451 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1453 2020-05-11 Alan Modra <amodra@gmail.com>
1455 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1456 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1458 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1460 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1463 2020-05-11 Alan Modra <amodra@gmail.com>
1465 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1466 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1467 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1468 (prefix_opcodes): Add xxeval.
1470 2020-05-11 Alan Modra <amodra@gmail.com>
1472 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1473 xxgenpcvwm, xxgenpcvdm.
1475 2020-05-11 Alan Modra <amodra@gmail.com>
1477 * ppc-opc.c (MP, VXVAM_MASK): Define.
1478 (VXVAPS_MASK): Use VXVA_MASK.
1479 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1480 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1481 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1482 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1484 2020-05-11 Alan Modra <amodra@gmail.com>
1485 Peter Bergner <bergner@linux.ibm.com>
1487 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1489 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1490 YMSK2, XA6a, XA6ap, XB6a entries.
1491 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1492 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1494 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1495 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1496 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1497 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1498 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1499 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1500 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1501 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1502 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1503 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1504 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1505 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1506 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1507 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1509 2020-05-11 Alan Modra <amodra@gmail.com>
1511 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1512 (insert_xts, extract_xts): New functions.
1513 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1514 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1515 (VXRC_MASK, VXSH_MASK): Define.
1516 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1517 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1518 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1519 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1520 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1521 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1522 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1524 2020-05-11 Alan Modra <amodra@gmail.com>
1526 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1527 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1528 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1529 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1530 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1532 2020-05-11 Alan Modra <amodra@gmail.com>
1534 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1535 (XTP, DQXP, DQXP_MASK): Define.
1536 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1537 (prefix_opcodes): Add plxvp and pstxvp.
1539 2020-05-11 Alan Modra <amodra@gmail.com>
1541 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1542 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1543 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1545 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1547 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1549 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1551 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1553 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1555 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1557 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1559 2020-05-11 Alan Modra <amodra@gmail.com>
1561 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1563 2020-05-11 Alan Modra <amodra@gmail.com>
1565 * ppc-dis.c (ppc_opts): Add "power10" entry.
1566 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1567 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1569 2020-05-11 Nick Clifton <nickc@redhat.com>
1571 * po/fr.po: Updated French translation.
1573 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1575 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1576 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1577 (operand_general_constraint_met_p): validate
1578 AARCH64_OPND_UNDEFINED.
1579 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1581 * aarch64-asm-2.c: Regenerated.
1582 * aarch64-dis-2.c: Regenerated.
1583 * aarch64-opc-2.c: Regenerated.
1585 2020-04-29 Nick Clifton <nickc@redhat.com>
1588 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1591 2020-04-29 Nick Clifton <nickc@redhat.com>
1593 * po/sv.po: Updated Swedish translation.
1595 2020-04-29 Nick Clifton <nickc@redhat.com>
1598 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1599 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1600 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1603 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1606 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1607 cmpi only on m68020up and cpu32.
1609 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1611 * aarch64-asm.c (aarch64_ins_none): New.
1612 * aarch64-asm.h (ins_none): New declaration.
1613 * aarch64-dis.c (aarch64_ext_none): New.
1614 * aarch64-dis.h (ext_none): New declaration.
1615 * aarch64-opc.c (aarch64_print_operand): Update case for
1616 AARCH64_OPND_BARRIER_PSB.
1617 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1618 (AARCH64_OPERANDS): Update inserter/extracter for
1619 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1620 * aarch64-asm-2.c: Regenerated.
1621 * aarch64-dis-2.c: Regenerated.
1622 * aarch64-opc-2.c: Regenerated.
1624 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1626 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1627 (aarch64_feature_ras, RAS): Likewise.
1628 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1629 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1630 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1631 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1632 * aarch64-asm-2.c: Regenerated.
1633 * aarch64-dis-2.c: Regenerated.
1634 * aarch64-opc-2.c: Regenerated.
1636 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1638 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1639 (print_insn_neon): Support disassembly of conditional
1642 2020-02-16 David Faust <david.faust@oracle.com>
1644 * bpf-desc.c: Regenerate.
1645 * bpf-desc.h: Likewise.
1646 * bpf-opc.c: Regenerate.
1647 * bpf-opc.h: Likewise.
1649 2020-04-07 Lili Cui <lili.cui@intel.com>
1651 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1652 (prefix_table): New instructions (see prefixes above).
1653 (rm_table): Likewise
1654 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1655 CPU_ANY_TSXLDTRK_FLAGS.
1656 (cpu_flags): Add CpuTSXLDTRK.
1657 * i386-opc.h (enum): Add CpuTSXLDTRK.
1658 (i386_cpu_flags): Add cputsxldtrk.
1659 * i386-opc.tbl: Add XSUSPLDTRK insns.
1660 * i386-init.h: Regenerate.
1661 * i386-tbl.h: Likewise.
1663 2020-04-02 Lili Cui <lili.cui@intel.com>
1665 * i386-dis.c (prefix_table): New instructions serialize.
1666 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1667 CPU_ANY_SERIALIZE_FLAGS.
1668 (cpu_flags): Add CpuSERIALIZE.
1669 * i386-opc.h (enum): Add CpuSERIALIZE.
1670 (i386_cpu_flags): Add cpuserialize.
1671 * i386-opc.tbl: Add SERIALIZE insns.
1672 * i386-init.h: Regenerate.
1673 * i386-tbl.h: Likewise.
1675 2020-03-26 Alan Modra <amodra@gmail.com>
1677 * disassemble.h (opcodes_assert): Declare.
1678 (OPCODES_ASSERT): Define.
1679 * disassemble.c: Don't include assert.h. Include opintl.h.
1680 (opcodes_assert): New function.
1681 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1682 (bfd_h8_disassemble): Reduce size of data array. Correctly
1683 calculate maxlen. Omit insn decoding when insn length exceeds
1684 maxlen. Exit from nibble loop when looking for E, before
1685 accessing next data byte. Move processing of E outside loop.
1686 Replace tests of maxlen in loop with assertions.
1688 2020-03-26 Alan Modra <amodra@gmail.com>
1690 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1692 2020-03-25 Alan Modra <amodra@gmail.com>
1694 * z80-dis.c (suffix): Init mybuf.
1696 2020-03-22 Alan Modra <amodra@gmail.com>
1698 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1699 successflly read from section.
1701 2020-03-22 Alan Modra <amodra@gmail.com>
1703 * arc-dis.c (find_format): Use ISO C string concatenation rather
1704 than line continuation within a string. Don't access needs_limm
1705 before testing opcode != NULL.
1707 2020-03-22 Alan Modra <amodra@gmail.com>
1709 * ns32k-dis.c (print_insn_arg): Update comment.
1710 (print_insn_ns32k): Reduce size of index_offset array, and
1711 initialize, passing -1 to print_insn_arg for args that are not
1712 an index. Don't exit arg loop early. Abort on bad arg number.
1714 2020-03-22 Alan Modra <amodra@gmail.com>
1716 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1717 * s12z-opc.c: Formatting.
1718 (operands_f): Return an int.
1719 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1720 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1721 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1722 (exg_sex_discrim): Likewise.
1723 (create_immediate_operand, create_bitfield_operand),
1724 (create_register_operand_with_size, create_register_all_operand),
1725 (create_register_all16_operand, create_simple_memory_operand),
1726 (create_memory_operand, create_memory_auto_operand): Don't
1727 segfault on malloc failure.
1728 (z_ext24_decode): Return an int status, negative on fail, zero
1730 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1731 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1732 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1733 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1734 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1735 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1736 (loop_primitive_decode, shift_decode, psh_pul_decode),
1737 (bit_field_decode): Similarly.
1738 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1739 to return value, update callers.
1740 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1741 Don't segfault on NULL operand.
1742 (decode_operation): Return OP_INVALID on first fail.
1743 (decode_s12z): Check all reads, returning -1 on fail.
1745 2020-03-20 Alan Modra <amodra@gmail.com>
1747 * metag-dis.c (print_insn_metag): Don't ignore status from
1750 2020-03-20 Alan Modra <amodra@gmail.com>
1752 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1753 Initialize parts of buffer not written when handling a possible
1754 2-byte insn at end of section. Don't attempt decoding of such
1755 an insn by the 4-byte machinery.
1757 2020-03-20 Alan Modra <amodra@gmail.com>
1759 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1760 partially filled buffer. Prevent lookup of 4-byte insns when
1761 only VLE 2-byte insns are possible due to section size. Print
1762 ".word" rather than ".long" for 2-byte leftovers.
1764 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1767 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1769 2020-03-13 Jan Beulich <jbeulich@suse.com>
1771 * i386-dis.c (X86_64_0D): Rename to ...
1772 (X86_64_0E): ... this.
1774 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1776 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1777 * Makefile.in: Regenerated.
1779 2020-03-09 Jan Beulich <jbeulich@suse.com>
1781 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1783 * i386-tbl.h: Re-generate.
1785 2020-03-09 Jan Beulich <jbeulich@suse.com>
1787 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1788 vprot*, vpsha*, and vpshl*.
1789 * i386-tbl.h: Re-generate.
1791 2020-03-09 Jan Beulich <jbeulich@suse.com>
1793 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1794 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1795 * i386-tbl.h: Re-generate.
1797 2020-03-09 Jan Beulich <jbeulich@suse.com>
1799 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1800 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1801 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1802 * i386-tbl.h: Re-generate.
1804 2020-03-09 Jan Beulich <jbeulich@suse.com>
1806 * i386-gen.c (struct template_arg, struct template_instance,
1807 struct template_param, struct template, templates,
1808 parse_template, expand_templates): New.
1809 (process_i386_opcodes): Various local variables moved to
1810 expand_templates. Call parse_template and expand_templates.
1811 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1812 * i386-tbl.h: Re-generate.
1814 2020-03-06 Jan Beulich <jbeulich@suse.com>
1816 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1817 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1818 register and memory source templates. Replace VexW= by VexW*
1820 * i386-tbl.h: Re-generate.
1822 2020-03-06 Jan Beulich <jbeulich@suse.com>
1824 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1825 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1826 * i386-tbl.h: Re-generate.
1828 2020-03-06 Jan Beulich <jbeulich@suse.com>
1830 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1831 * i386-tbl.h: Re-generate.
1833 2020-03-06 Jan Beulich <jbeulich@suse.com>
1835 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1836 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1837 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1838 VexW0 on SSE2AVX variants.
1839 (vmovq): Drop NoRex64 from XMM/XMM variants.
1840 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1841 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1842 applicable use VexW0.
1843 * i386-tbl.h: Re-generate.
1845 2020-03-06 Jan Beulich <jbeulich@suse.com>
1847 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1848 * i386-opc.h (Rex64): Delete.
1849 (struct i386_opcode_modifier): Remove rex64 field.
1850 * i386-opc.tbl (crc32): Drop Rex64.
1851 Replace Rex64 with Size64 everywhere else.
1852 * i386-tbl.h: Re-generate.
1854 2020-03-06 Jan Beulich <jbeulich@suse.com>
1856 * i386-dis.c (OP_E_memory): Exclude recording of used address
1857 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1858 addressed memory operands for MPX insns.
1860 2020-03-06 Jan Beulich <jbeulich@suse.com>
1862 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
1863 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
1864 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
1865 (ptwrite): Split into non-64-bit and 64-bit forms.
1866 * i386-tbl.h: Re-generate.
1868 2020-03-06 Jan Beulich <jbeulich@suse.com>
1870 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
1872 * i386-tbl.h: Re-generate.
1874 2020-03-04 Jan Beulich <jbeulich@suse.com>
1876 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
1877 (prefix_table): Move vmmcall here. Add vmgexit.
1878 (rm_table): Replace vmmcall entry by prefix_table[] escape.
1879 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
1880 (cpu_flags): Add CpuSEV_ES entry.
1881 * i386-opc.h (CpuSEV_ES): New.
1882 (union i386_cpu_flags): Add cpusev_es field.
1883 * i386-opc.tbl (vmgexit): New.
1884 * i386-init.h, i386-tbl.h: Re-generate.
1886 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1888 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
1890 * i386-opc.h (IGNORESIZE): New.
1891 (DEFAULTSIZE): Likewise.
1892 (IgnoreSize): Removed.
1893 (DefaultSize): Likewise.
1894 (MnemonicSize): New.
1895 (i386_opcode_modifier): Replace ignoresize/defaultsize with
1897 * i386-opc.tbl (IgnoreSize): New.
1898 (DefaultSize): Likewise.
1899 * i386-tbl.h: Regenerated.
1901 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1904 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
1907 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1910 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
1911 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
1912 * i386-tbl.h: Regenerated.
1914 2020-02-26 Alan Modra <amodra@gmail.com>
1916 * aarch64-asm.c: Indent labels correctly.
1917 * aarch64-dis.c: Likewise.
1918 * aarch64-gen.c: Likewise.
1919 * aarch64-opc.c: Likewise.
1920 * alpha-dis.c: Likewise.
1921 * i386-dis.c: Likewise.
1922 * nds32-asm.c: Likewise.
1923 * nfp-dis.c: Likewise.
1924 * visium-dis.c: Likewise.
1926 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
1928 * arc-regs.h (int_vector_base): Make it available for all ARC
1931 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
1933 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
1936 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
1938 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
1939 c.mv/c.li if rs1 is zero.
1941 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
1943 * i386-gen.c (cpu_flag_init): Replace CpuABM with
1944 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
1946 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
1947 * i386-opc.h (CpuABM): Removed.
1949 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
1950 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
1951 popcnt. Remove CpuABM from lzcnt.
1952 * i386-init.h: Regenerated.
1953 * i386-tbl.h: Likewise.
1955 2020-02-17 Jan Beulich <jbeulich@suse.com>
1957 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
1958 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
1959 VexW1 instead of open-coding them.
1960 * i386-tbl.h: Re-generate.
1962 2020-02-17 Jan Beulich <jbeulich@suse.com>
1964 * i386-opc.tbl (AddrPrefixOpReg): Define.
1965 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
1966 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
1967 templates. Drop NoRex64.
1968 * i386-tbl.h: Re-generate.
1970 2020-02-17 Jan Beulich <jbeulich@suse.com>
1973 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
1974 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
1975 into Intel syntax instance (with Unpsecified) and AT&T one
1977 (vcvtneps2bf16): Likewise, along with folding the two so far
1979 * i386-tbl.h: Re-generate.
1981 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
1983 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
1984 CPU_ANY_SSE4A_FLAGS.
1986 2020-02-17 Alan Modra <amodra@gmail.com>
1988 * i386-gen.c (cpu_flag_init): Correct last change.
1990 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
1992 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
1995 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
1997 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2000 2020-02-14 Jan Beulich <jbeulich@suse.com>
2003 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2004 destination for Cpu64-only variant.
2005 (movzx): Fold patterns.
2006 * i386-tbl.h: Re-generate.
2008 2020-02-13 Jan Beulich <jbeulich@suse.com>
2010 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2011 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2012 CPU_ANY_SSE4_FLAGS entry.
2013 * i386-init.h: Re-generate.
2015 2020-02-12 Jan Beulich <jbeulich@suse.com>
2017 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2018 with Unspecified, making the present one AT&T syntax only.
2019 * i386-tbl.h: Re-generate.
2021 2020-02-12 Jan Beulich <jbeulich@suse.com>
2023 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2024 * i386-tbl.h: Re-generate.
2026 2020-02-12 Jan Beulich <jbeulich@suse.com>
2029 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2030 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2031 Amd64 and Intel64 templates.
2032 (call, jmp): Likewise for far indirect variants. Dro
2034 * i386-tbl.h: Re-generate.
2036 2020-02-11 Jan Beulich <jbeulich@suse.com>
2038 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2039 * i386-opc.h (ShortForm): Delete.
2040 (struct i386_opcode_modifier): Remove shortform field.
2041 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2042 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2043 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2044 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2046 * i386-tbl.h: Re-generate.
2048 2020-02-11 Jan Beulich <jbeulich@suse.com>
2050 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2051 fucompi): Drop ShortForm from operand-less templates.
2052 * i386-tbl.h: Re-generate.
2054 2020-02-11 Alan Modra <amodra@gmail.com>
2056 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2057 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2058 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2059 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2060 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2062 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2064 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2065 (cde_opcodes): Add VCX* instructions.
2067 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2068 Matthew Malcomson <matthew.malcomson@arm.com>
2070 * arm-dis.c (struct cdeopcode32): New.
2071 (CDE_OPCODE): New macro.
2072 (cde_opcodes): New disassembly table.
2073 (regnames): New option to table.
2074 (cde_coprocs): New global variable.
2075 (print_insn_cde): New
2076 (print_insn_thumb32): Use print_insn_cde.
2077 (parse_arm_disassembler_options): Parse coprocN args.
2079 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2082 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2084 * i386-opc.h (AMD64): Removed.
2085 (Intel64): Likewose.
2087 (INTEL64): Likewise.
2088 (INTEL64ONLY): Likewise.
2089 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2090 * i386-opc.tbl (Amd64): New.
2091 (Intel64): Likewise.
2092 (Intel64Only): Likewise.
2093 Replace AMD64 with Amd64. Update sysenter/sysenter with
2094 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2095 * i386-tbl.h: Regenerated.
2097 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2100 * z80-dis.c: Add support for GBZ80 opcodes.
2102 2020-02-04 Alan Modra <amodra@gmail.com>
2104 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2106 2020-02-03 Alan Modra <amodra@gmail.com>
2108 * m32c-ibld.c: Regenerate.
2110 2020-02-01 Alan Modra <amodra@gmail.com>
2112 * frv-ibld.c: Regenerate.
2114 2020-01-31 Jan Beulich <jbeulich@suse.com>
2116 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2117 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2118 (OP_E_memory): Replace xmm_mdq_mode case label by
2119 vex_scalar_w_dq_mode one.
2120 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2122 2020-01-31 Jan Beulich <jbeulich@suse.com>
2124 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2125 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2126 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2127 (intel_operand_size): Drop vex_w_dq_mode case label.
2129 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2131 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2132 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2134 2020-01-30 Alan Modra <amodra@gmail.com>
2136 * m32c-ibld.c: Regenerate.
2138 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2140 * bpf-opc.c: Regenerate.
2142 2020-01-30 Jan Beulich <jbeulich@suse.com>
2144 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2145 (dis386): Use them to replace C2/C3 table entries.
2146 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2147 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2148 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2149 * i386-tbl.h: Re-generate.
2151 2020-01-30 Jan Beulich <jbeulich@suse.com>
2153 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2155 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2157 * i386-tbl.h: Re-generate.
2159 2020-01-30 Alan Modra <amodra@gmail.com>
2161 * tic4x-dis.c (tic4x_dp): Make unsigned.
2163 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2164 Jan Beulich <jbeulich@suse.com>
2167 * i386-dis.c (MOVSXD_Fixup): New function.
2168 (movsxd_mode): New enum.
2169 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2170 (intel_operand_size): Handle movsxd_mode.
2171 (OP_E_register): Likewise.
2173 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2174 register on movsxd. Add movsxd with 16-bit destination register
2175 for AMD64 and Intel64 ISAs.
2176 * i386-tbl.h: Regenerated.
2178 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2181 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2182 * aarch64-asm-2.c: Regenerate
2183 * aarch64-dis-2.c: Likewise.
2184 * aarch64-opc-2.c: Likewise.
2186 2020-01-21 Jan Beulich <jbeulich@suse.com>
2188 * i386-opc.tbl (sysret): Drop DefaultSize.
2189 * i386-tbl.h: Re-generate.
2191 2020-01-21 Jan Beulich <jbeulich@suse.com>
2193 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2195 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2196 * i386-tbl.h: Re-generate.
2198 2020-01-20 Nick Clifton <nickc@redhat.com>
2200 * po/de.po: Updated German translation.
2201 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2202 * po/uk.po: Updated Ukranian translation.
2204 2020-01-20 Alan Modra <amodra@gmail.com>
2206 * hppa-dis.c (fput_const): Remove useless cast.
2208 2020-01-20 Alan Modra <amodra@gmail.com>
2210 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2212 2020-01-18 Nick Clifton <nickc@redhat.com>
2214 * configure: Regenerate.
2215 * po/opcodes.pot: Regenerate.
2217 2020-01-18 Nick Clifton <nickc@redhat.com>
2219 Binutils 2.34 branch created.
2221 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2223 * opintl.h: Fix spelling error (seperate).
2225 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2227 * i386-opc.tbl: Add {vex} pseudo prefix.
2228 * i386-tbl.h: Regenerated.
2230 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2233 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2234 (neon_opcodes): Likewise.
2235 (select_arm_features): Make sure we enable MVE bits when selecting
2236 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2239 2020-01-16 Jan Beulich <jbeulich@suse.com>
2241 * i386-opc.tbl: Drop stale comment from XOP section.
2243 2020-01-16 Jan Beulich <jbeulich@suse.com>
2245 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2246 (extractps): Add VexWIG to SSE2AVX forms.
2247 * i386-tbl.h: Re-generate.
2249 2020-01-16 Jan Beulich <jbeulich@suse.com>
2251 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2252 Size64 from and use VexW1 on SSE2AVX forms.
2253 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2254 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2255 * i386-tbl.h: Re-generate.
2257 2020-01-15 Alan Modra <amodra@gmail.com>
2259 * tic4x-dis.c (tic4x_version): Make unsigned long.
2260 (optab, optab_special, registernames): New file scope vars.
2261 (tic4x_print_register): Set up registernames rather than
2262 malloc'd registertable.
2263 (tic4x_disassemble): Delete optable and optable_special. Use
2264 optab and optab_special instead. Throw away old optab,
2265 optab_special and registernames when info->mach changes.
2267 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2270 * z80-dis.c (suffix): Use .db instruction to generate double
2273 2020-01-14 Alan Modra <amodra@gmail.com>
2275 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2276 values to unsigned before shifting.
2278 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2280 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2282 (print_insn_thumb16, print_insn_thumb32): Likewise.
2283 (print_insn): Initialize the insn info.
2284 * i386-dis.c (print_insn): Initialize the insn info fields, and
2287 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2289 * arc-opc.c (C_NE): Make it required.
2291 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2293 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2294 reserved register name.
2296 2020-01-13 Alan Modra <amodra@gmail.com>
2298 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2299 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2301 2020-01-13 Alan Modra <amodra@gmail.com>
2303 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2304 result of wasm_read_leb128 in a uint64_t and check that bits
2305 are not lost when copying to other locals. Use uint32_t for
2306 most locals. Use PRId64 when printing int64_t.
2308 2020-01-13 Alan Modra <amodra@gmail.com>
2310 * score-dis.c: Formatting.
2311 * score7-dis.c: Formatting.
2313 2020-01-13 Alan Modra <amodra@gmail.com>
2315 * score-dis.c (print_insn_score48): Use unsigned variables for
2316 unsigned values. Don't left shift negative values.
2317 (print_insn_score32): Likewise.
2318 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2320 2020-01-13 Alan Modra <amodra@gmail.com>
2322 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2324 2020-01-13 Alan Modra <amodra@gmail.com>
2326 * fr30-ibld.c: Regenerate.
2328 2020-01-13 Alan Modra <amodra@gmail.com>
2330 * xgate-dis.c (print_insn): Don't left shift signed value.
2331 (ripBits): Formatting, use 1u.
2333 2020-01-10 Alan Modra <amodra@gmail.com>
2335 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2336 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2338 2020-01-10 Alan Modra <amodra@gmail.com>
2340 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2341 and XRREG value earlier to avoid a shift with negative exponent.
2342 * m10200-dis.c (disassemble): Similarly.
2344 2020-01-09 Nick Clifton <nickc@redhat.com>
2347 * z80-dis.c (ld_ii_ii): Use correct cast.
2349 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2352 * z80-dis.c (ld_ii_ii): Use character constant when checking
2355 2020-01-09 Jan Beulich <jbeulich@suse.com>
2357 * i386-dis.c (SEP_Fixup): New.
2359 (dis386_twobyte): Use it for sysenter/sysexit.
2360 (enum x86_64_isa): Change amd64 enumerator to value 1.
2361 (OP_J): Compare isa64 against intel64 instead of amd64.
2362 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2364 * i386-tbl.h: Re-generate.
2366 2020-01-08 Alan Modra <amodra@gmail.com>
2368 * z8k-dis.c: Include libiberty.h
2369 (instr_data_s): Make max_fetched unsigned.
2370 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2371 Don't exceed byte_info bounds.
2372 (output_instr): Make num_bytes unsigned.
2373 (unpack_instr): Likewise for nibl_count and loop.
2374 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2376 * z8k-opc.h: Regenerate.
2378 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2380 * arc-tbl.h (llock): Use 'LLOCK' as class.
2382 (scond): Use 'SCOND' as class.
2384 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2387 2020-01-06 Alan Modra <amodra@gmail.com>
2389 * m32c-ibld.c: Regenerate.
2391 2020-01-06 Alan Modra <amodra@gmail.com>
2394 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2395 Peek at next byte to prevent recursion on repeated prefix bytes.
2396 Ensure uninitialised "mybuf" is not accessed.
2397 (print_insn_z80): Don't zero n_fetch and n_used here,..
2398 (print_insn_z80_buf): ..do it here instead.
2400 2020-01-04 Alan Modra <amodra@gmail.com>
2402 * m32r-ibld.c: Regenerate.
2404 2020-01-04 Alan Modra <amodra@gmail.com>
2406 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2408 2020-01-04 Alan Modra <amodra@gmail.com>
2410 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2412 2020-01-04 Alan Modra <amodra@gmail.com>
2414 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2416 2020-01-03 Jan Beulich <jbeulich@suse.com>
2418 * aarch64-tbl.h (aarch64_opcode_table): Use
2419 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2421 2020-01-03 Jan Beulich <jbeulich@suse.com>
2423 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2424 forms of SUDOT and USDOT.
2426 2020-01-03 Jan Beulich <jbeulich@suse.com>
2428 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2430 * opcodes/aarch64-dis-2.c: Re-generate.
2432 2020-01-03 Jan Beulich <jbeulich@suse.com>
2434 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2436 * opcodes/aarch64-dis-2.c: Re-generate.
2438 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2440 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2442 2020-01-01 Alan Modra <amodra@gmail.com>
2444 Update year range in copyright notice of all files.
2446 For older changes see ChangeLog-2019
2448 Copyright (C) 2020 Free Software Foundation, Inc.
2450 Copying and distribution of this file, with or without modification,
2451 are permitted in any medium without royalty provided the copyright
2452 notice and this notice are preserved.
2458 version-control: never