1 2020-08-21 Nick Clifton <nickc@redhat.com>
3 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
6 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
8 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
10 2020-08-19 Alan Modra <amodra@gmail.com>
12 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
15 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
17 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
18 <xvcvbf16spn>: ...to this.
20 2020-08-12 Alex Coplan <alex.coplan@arm.com>
22 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
24 2020-08-12 Nick Clifton <nickc@redhat.com>
26 * po/sr.po: Updated Serbian translation.
28 2020-08-11 Alan Modra <amodra@gmail.com>
30 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
32 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
34 * aarch64-opc.c (aarch64_print_operand):
35 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
36 (aarch64_sys_reg_supported_p): Function removed.
37 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
38 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
41 2020-08-10 Alan Modra <amodra@gmail.com>
43 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
46 2020-08-10 Alan Modra <amodra@gmail.com>
48 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
49 Enable icbt for power5, miso for power8.
51 2020-08-10 Alan Modra <amodra@gmail.com>
53 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
54 mtvsrd, and similarly for mfvsrd.
56 2020-08-04 Christian Groessler <chris@groessler.org>
57 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
59 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
60 opcodes (special "out" to absolute address).
61 * z8k-opc.h: Regenerate.
63 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
66 * i386-opc.h (Prefix_Disp8): New.
67 (Prefix_Disp16): Likewise.
68 (Prefix_Disp32): Likewise.
69 (Prefix_Load): Likewise.
70 (Prefix_Store): Likewise.
71 (Prefix_VEX): Likewise.
72 (Prefix_VEX3): Likewise.
73 (Prefix_EVEX): Likewise.
74 (Prefix_REX): Likewise.
75 (Prefix_NoOptimize): Likewise.
76 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
77 * i386-tbl.h: Regenerated.
79 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
81 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
82 default case with abort() instead of printing an error message and
83 continuing, to avoid a maybe-uninitialized warning.
85 2020-07-24 Nick Clifton <nickc@redhat.com>
87 * po/de.po: Updated German translation.
89 2020-07-21 Jan Beulich <jbeulich@suse.com>
91 * i386-dis.c (OP_E_memory): Revert previous change.
93 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
96 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
97 without base nor index registers.
99 2020-07-15 Jan Beulich <jbeulich@suse.com>
101 * i386-dis.c (putop): Move 'V' and 'W' handling.
103 2020-07-15 Jan Beulich <jbeulich@suse.com>
105 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
106 construct for push/pop of register.
107 (putop): Honor cond when handling 'P'. Drop handling of plain
110 2020-07-15 Jan Beulich <jbeulich@suse.com>
112 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
113 description. Drop '&' description. Use P for push of immediate,
114 pushf/popf, enter, and leave. Use %LP for lret/retf.
115 (dis386_twobyte): Use P for push/pop of fs/gs.
116 (reg_table): Use P for push/pop. Use @ for near call/jmp.
117 (x86_64_table): Use P for far call/jmp.
118 (putop): Drop handling of 'U' and '&'. Move and adjust handling
119 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
121 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
122 and dqw_mode (unconditional).
124 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
127 * i386-dis.c (OP_E_memory): Without base nor index registers,
128 32-bit displacement to 64 bits.
130 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
132 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
133 faulty double register pair is detected.
135 2020-07-14 Jan Beulich <jbeulich@suse.com>
137 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
139 2020-07-14 Jan Beulich <jbeulich@suse.com>
141 * i386-dis.c (OP_R, Rm): Delete.
142 (MOD_0F24, MOD_0F26): Rename to ...
143 (X86_64_0F24, X86_64_0F26): ... respectively.
144 (dis386): Update 'L' and 'Z' comments.
145 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
147 (mod_table): Move opcode 0F24 and 0F26 entries ...
148 (x86_64_table): ... here.
149 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
152 2020-07-14 Jan Beulich <jbeulich@suse.com>
154 * i386-dis.c (Rd, Rdq, MaskR): Delete.
155 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
156 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
157 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
158 MOD_EVEX_0F387C): New enumerators.
159 (reg_table): Use Edq for rdssp.
160 (prefix_table): Use Edq for incssp.
161 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
162 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
163 ktest*, and kshift*. Use Edq / MaskE for kmov*.
164 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
165 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
166 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
167 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
168 0F3828_P_1 and 0F3838_P_1.
169 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
170 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
172 2020-07-14 Jan Beulich <jbeulich@suse.com>
174 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
175 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
176 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
177 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
178 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
179 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
180 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
181 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
182 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
183 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
184 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
185 (reg_table, prefix_table, three_byte_table, vex_table,
186 vex_len_table, mod_table, rm_table): Replace / remove respective
188 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
189 of PREFIX_DATA in used_prefixes.
191 2020-07-14 Jan Beulich <jbeulich@suse.com>
193 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
194 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
195 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
196 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
197 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
198 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
199 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
200 VEX_W_0F3A33_L_0): Delete.
201 (dis386): Adjust "BW" description.
202 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
203 0F3A31, 0F3A32, and 0F3A33.
204 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
206 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
209 2020-07-14 Jan Beulich <jbeulich@suse.com>
211 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
212 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
213 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
214 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
215 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
216 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
217 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
218 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
219 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
220 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
221 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
222 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
223 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
224 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
225 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
226 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
227 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
228 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
229 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
230 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
231 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
232 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
233 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
234 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
235 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
236 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
237 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
238 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
239 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
240 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
241 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
242 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
243 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
244 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
245 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
246 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
247 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
248 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
249 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
250 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
251 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
252 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
253 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
254 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
255 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
256 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
257 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
258 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
259 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
260 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
261 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
262 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
263 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
264 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
265 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
266 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
267 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
268 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
269 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
270 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
271 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
272 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
273 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
274 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
275 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
276 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
277 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
278 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
279 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
280 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
281 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
282 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
283 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
284 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
285 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
286 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
287 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
288 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
289 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
290 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
291 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
292 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
293 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
294 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
295 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
296 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
297 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
298 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
299 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
300 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
301 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
302 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
303 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
304 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
305 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
306 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
307 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
308 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
309 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
310 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
311 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
312 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
313 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
314 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
315 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
316 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
317 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
318 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
319 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
320 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
321 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
322 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
323 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
324 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
325 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
326 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
327 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
328 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
329 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
330 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
331 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
332 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
333 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
334 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
335 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
336 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
337 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
338 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
339 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
340 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
341 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
342 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
343 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
344 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
345 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
346 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
347 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
348 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
349 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
350 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
351 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
352 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
353 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
354 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
355 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
356 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
357 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
358 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
359 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
360 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
361 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
362 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
363 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
364 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
365 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
366 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
367 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
368 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
369 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
370 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
371 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
372 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
373 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
374 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
375 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
376 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
377 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
378 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
379 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
380 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
381 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
382 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
383 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
384 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
385 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
386 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
387 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
388 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
389 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
390 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
391 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
392 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
393 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
394 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
395 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
396 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
397 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
398 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
399 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
400 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
401 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
402 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
403 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
404 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
405 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
406 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
407 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
408 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
409 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
410 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
411 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
412 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
413 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
414 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
415 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
416 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
417 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
418 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
419 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
420 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
421 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
422 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
423 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
424 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
425 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
426 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
427 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
428 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
429 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
430 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
431 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
432 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
433 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
434 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
435 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
436 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
437 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
438 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
439 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
440 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
441 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
442 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
443 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
444 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
445 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
446 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
447 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
448 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
449 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
450 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
451 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
452 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
453 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
454 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
455 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
456 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
457 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
458 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
459 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
460 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
461 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
462 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
463 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
464 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
465 EVEX_W_0F3A72_P_2): Rename to ...
466 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
467 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
468 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
469 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
470 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
471 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
472 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
473 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
474 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
475 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
476 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
477 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
478 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
479 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
480 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
481 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
482 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
483 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
484 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
485 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
486 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
487 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
488 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
489 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
490 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
491 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
492 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
493 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
494 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
495 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
496 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
497 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
498 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
499 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
500 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
501 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
502 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
503 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
504 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
505 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
506 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
507 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
508 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
509 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
510 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
511 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
512 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
513 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
514 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
515 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
516 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
517 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
518 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
519 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
520 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
521 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
522 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
523 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
524 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
525 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
526 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
527 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
528 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
529 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
530 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
531 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
532 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
533 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
534 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
535 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
536 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
537 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
539 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
540 vex_w_table, mod_table): Replace / remove respective entries.
541 (print_insn): Move up dp->prefix_requirement handling. Handle
543 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
544 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
545 Replace / remove respective entries.
547 2020-07-14 Jan Beulich <jbeulich@suse.com>
549 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
550 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
551 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
552 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
553 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
555 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
556 0F2C, 0F2D, 0F2E, and 0F2F.
557 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
560 2020-07-14 Jan Beulich <jbeulich@suse.com>
562 * i386-dis.c (OP_VexR, VexScalarR): New.
563 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
564 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
565 need_vex_reg): Delete.
566 (prefix_table): Replace VexScalar by VexScalarR and
567 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
568 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
569 (vex_len_table): Replace EXqVexScalarS by EXqS.
570 (get_valid_dis386): Don't set need_vex_reg.
571 (print_insn): Don't initialize need_vex_reg.
572 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
573 q_scalar_swap_mode cases.
574 (OP_EX): Don't check for d_scalar_swap_mode and
576 (OP_VEX): Done check need_vex_reg.
577 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
578 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
579 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
581 2020-07-14 Jan Beulich <jbeulich@suse.com>
583 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
584 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
585 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
586 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
587 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
588 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
589 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
590 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
591 (vex_table): Replace Vex128 by Vex.
592 (vex_len_table): Likewise. Adjust referenced enum names.
593 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
594 referenced enum names.
595 (OP_VEX): Drop vex128_mode and vex256_mode cases.
596 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
598 2020-07-14 Jan Beulich <jbeulich@suse.com>
600 * i386-dis.c (dis386): "LW" description now applies to "DQ".
601 (putop): Handle "DQ". Don't handle "LW" anymore.
602 (prefix_table, mod_table): Replace %LW by %DQ.
603 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
605 2020-07-14 Jan Beulich <jbeulich@suse.com>
607 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
608 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
609 d_scalar_swap_mode case handling. Move shift adjsutment into
610 the case its applicable to.
612 2020-07-14 Jan Beulich <jbeulich@suse.com>
614 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
615 (EXbScalar, EXwScalar): Fold to ...
616 (EXbwUnit): ... this.
617 (b_scalar_mode, w_scalar_mode): Fold to ...
618 (bw_unit_mode): ... this.
619 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
620 w_scalar_mode handling by bw_unit_mode one.
621 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
623 * i386-dis-evex-prefix.h: ... here.
625 2020-07-14 Jan Beulich <jbeulich@suse.com>
627 * i386-dis.c (PCMPESTR_Fixup): Delete.
628 (dis386): Adjust "LQ" description.
629 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
630 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
631 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
632 vpcmpestrm, and vpcmpestri.
633 (putop): Honor "cond" when handling LQ.
634 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
635 vcvtsi2ss and vcvtusi2ss.
636 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
637 vcvtsi2sd and vcvtusi2sd.
639 2020-07-14 Jan Beulich <jbeulich@suse.com>
641 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
642 (simd_cmp_op): Add const.
643 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
644 (CMP_Fixup): Handle VEX case.
645 (prefix_table): Replace VCMP by CMP.
646 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
648 2020-07-14 Jan Beulich <jbeulich@suse.com>
650 * i386-dis.c (MOVBE_Fixup): Delete.
652 (prefix_table): Use Mv for movbe entries.
654 2020-07-14 Jan Beulich <jbeulich@suse.com>
656 * i386-dis.c (CRC32_Fixup): Delete.
657 (prefix_table): Use Eb/Ev for crc32 entries.
659 2020-07-14 Jan Beulich <jbeulich@suse.com>
661 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
662 Conditionalize invocations of "USED_REX (0)".
664 2020-07-14 Jan Beulich <jbeulich@suse.com>
666 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
667 CH, DH, BH, AX, DX): Delete.
668 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
669 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
670 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
672 2020-07-10 Lili Cui <lili.cui@intel.com>
674 * i386-dis.c (TMM): New.
677 (MVexSIBMEM): Likewise.
678 (tmm_mode): Likewise.
679 (vex_sibmem_mode): Likewise.
680 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
681 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
682 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
683 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
684 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
685 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
686 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
687 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
688 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
689 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
690 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
691 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
692 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
693 (PREFIX_VEX_0F3849_X86_64): Likewise.
694 (PREFIX_VEX_0F384B_X86_64): Likewise.
695 (PREFIX_VEX_0F385C_X86_64): Likewise.
696 (PREFIX_VEX_0F385E_X86_64): Likewise.
697 (X86_64_VEX_0F3849): Likewise.
698 (X86_64_VEX_0F384B): Likewise.
699 (X86_64_VEX_0F385C): Likewise.
700 (X86_64_VEX_0F385E): Likewise.
701 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
702 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
703 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
704 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
705 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
706 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
707 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
708 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
709 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
710 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
711 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
712 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
713 (VEX_W_0F3849_X86_64_P_0): Likewise.
714 (VEX_W_0F3849_X86_64_P_2): Likewise.
715 (VEX_W_0F3849_X86_64_P_3): Likewise.
716 (VEX_W_0F384B_X86_64_P_1): Likewise.
717 (VEX_W_0F384B_X86_64_P_2): Likewise.
718 (VEX_W_0F384B_X86_64_P_3): Likewise.
719 (VEX_W_0F385C_X86_64_P_1): Likewise.
720 (VEX_W_0F385E_X86_64_P_0): Likewise.
721 (VEX_W_0F385E_X86_64_P_1): Likewise.
722 (VEX_W_0F385E_X86_64_P_2): Likewise.
723 (VEX_W_0F385E_X86_64_P_3): Likewise.
724 (names_tmm): Likewise.
725 (att_names_tmm): Likewise.
726 (intel_operand_size): Handle void_mode.
727 (OP_XMM): Handle tmm_mode.
730 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
731 CpuAMX_BF16 and CpuAMX_TILE.
732 (operand_type_shorthands): Add RegTMM.
733 (operand_type_init): Likewise.
734 (operand_types): Add Tmmword.
735 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
736 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
737 * i386-opc.h (CpuAMX_INT8): New.
738 (CpuAMX_BF16): Likewise.
739 (CpuAMX_TILE): Likewise.
742 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
743 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
744 (i386_operand_type): Add tmmword.
745 * i386-opc.tbl: Add AMX instructions.
746 * i386-reg.tbl: Add AMX registers.
747 * i386-init.h: Regenerated.
748 * i386-tbl.h: Likewise.
750 2020-07-08 Jan Beulich <jbeulich@suse.com>
752 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
753 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
755 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
756 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
758 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
759 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
760 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
761 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
762 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
763 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
764 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
765 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
766 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
767 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
768 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
769 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
770 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
771 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
772 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
773 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
774 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
775 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
776 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
777 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
778 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
779 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
780 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
781 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
782 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
783 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
784 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
785 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
786 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
787 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
788 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
789 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
790 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
791 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
792 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
793 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
794 (reg_table): Re-order XOP entries. Adjust their operands.
795 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
796 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
797 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
798 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
799 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
800 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
801 entries by references ...
802 (vex_len_table): ... to resepctive new entries here. For several
803 new and existing entries reference ...
804 (vex_w_table): ... new entries here.
805 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
807 2020-07-08 Jan Beulich <jbeulich@suse.com>
809 * i386-dis.c (XMVexScalarI4): Define.
810 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
811 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
812 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
813 (vex_len_table): Move scalar FMA4 entries ...
814 (prefix_table): ... here.
815 (OP_REG_VexI4): Handle scalar_mode.
816 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
817 * i386-tbl.h: Re-generate.
819 2020-07-08 Jan Beulich <jbeulich@suse.com>
821 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
823 (OP_VexW, VexW): New.
824 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
825 for shifts and rotates by register.
827 2020-07-08 Jan Beulich <jbeulich@suse.com>
829 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
830 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
831 OP_EX_VexReg): Delete.
832 (OP_VexI4, VexI4): New.
833 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
834 (prefix_table): ... here.
835 (print_insn): Drop setting of vex_w_done.
837 2020-07-08 Jan Beulich <jbeulich@suse.com>
839 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
840 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
841 (xop_table): Replace operands of 4-operand insns.
842 (OP_REG_VexI4): Move VEX.W based operand swaping here.
844 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
846 * arc-opc.c (insert_rbd): New function.
849 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
852 2020-07-07 Jan Beulich <jbeulich@suse.com>
854 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
855 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
856 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
857 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
859 (putop): Handle "BW".
860 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
861 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
863 * i386-dis-evex-prefix.h: ... here.
865 2020-07-06 Jan Beulich <jbeulich@suse.com>
867 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
868 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
869 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
870 VEX_W_0FXOP_09_83): New enumerators.
871 (xop_table): Reference the above.
872 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
873 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
874 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
875 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
877 2020-07-06 Jan Beulich <jbeulich@suse.com>
879 * i386-dis.c (EVEX_W_0F3838_P_1,
880 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
881 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
882 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
883 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
884 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
885 (putop): Centralize management of last[]. Delete SAVE_LAST.
886 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
887 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
888 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
889 * i386-dis-evex-prefix.h: here.
891 2020-07-06 Jan Beulich <jbeulich@suse.com>
893 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
894 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
895 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
896 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
898 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
899 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
900 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
901 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
902 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
903 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
904 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
905 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
907 * i386-dis-evex-len.h: Adjust comments.
908 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
909 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
910 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
911 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
912 MOD_EVEX_0F385B_P_2_W_1 table entries.
913 * i386-dis-evex-w.h: Reference mod_table[] for
914 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
917 2020-07-06 Jan Beulich <jbeulich@suse.com>
919 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
920 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
922 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
923 Likewise. Mark 256-bit entries invalid.
925 2020-07-06 Jan Beulich <jbeulich@suse.com>
927 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
928 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
929 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
930 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
931 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
932 PREFIX_EVEX_0F382B): Delete.
933 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
934 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
935 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
936 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
937 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
939 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
940 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
941 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
942 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
944 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
945 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
946 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
947 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
948 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
949 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
950 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
951 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
952 PREFIX_EVEX_0F382B): Remove table entries.
953 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
954 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
955 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
957 2020-07-06 Jan Beulich <jbeulich@suse.com>
959 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
960 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
962 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
963 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
964 EVEX_LEN_0F3A01_P_2_W_1 table entries.
965 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
968 2020-07-06 Jan Beulich <jbeulich@suse.com>
970 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
971 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
972 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
973 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
974 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
975 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
976 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
977 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
978 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
981 2020-07-06 Jan Beulich <jbeulich@suse.com>
983 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
984 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
985 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
987 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
989 * i386-dis-evex.h (evex_table): Reference VEX table entry for
991 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
993 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
995 2020-07-06 Jan Beulich <jbeulich@suse.com>
997 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
998 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
999 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1000 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1001 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1002 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1003 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1004 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1005 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1006 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1007 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1008 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1009 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1010 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1011 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1012 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1013 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1014 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1015 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1016 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1017 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1018 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1019 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1020 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1021 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1022 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1023 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1024 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1025 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1026 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1027 (prefix_table): Add EXxEVexR to FMA table entries.
1028 (OP_Rounding): Move abort() invocation.
1029 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1030 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1031 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1032 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1033 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1034 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1035 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1036 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1037 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1038 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1040 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1041 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1042 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1043 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1044 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1045 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1046 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1047 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1048 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1049 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1050 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1051 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1052 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1053 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1054 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1055 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1056 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1057 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1058 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1059 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1060 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1061 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1062 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1063 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1064 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1065 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1066 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1067 Delete table entries.
1068 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1069 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1070 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1073 2020-07-06 Jan Beulich <jbeulich@suse.com>
1075 * i386-dis.c (EXqScalarS): Delete.
1076 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1077 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1079 2020-07-06 Jan Beulich <jbeulich@suse.com>
1081 * i386-dis.c (safe-ctype.h): Include.
1082 (EXdScalar, EXqScalar): Delete.
1083 (d_scalar_mode, q_scalar_mode): Delete.
1084 (prefix_table, vex_len_table): Use EXxmm_md in place of
1085 EXdScalar and EXxmm_mq in place of EXqScalar.
1086 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1087 d_scalar_mode and q_scalar_mode.
1088 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1089 (vmovsd): Use EXxmm_mq.
1091 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1094 * arc-dis.c: Fix spelling mistake.
1095 * po/opcodes.pot: Regenerate.
1097 2020-07-06 Nick Clifton <nickc@redhat.com>
1099 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1100 * po/uk.po: Updated Ukranian translation.
1102 2020-07-04 Nick Clifton <nickc@redhat.com>
1104 * configure: Regenerate.
1105 * po/opcodes.pot: Regenerate.
1107 2020-07-04 Nick Clifton <nickc@redhat.com>
1109 Binutils 2.35 branch created.
1111 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1113 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1114 * i386-opc.h (VexSwapSources): New.
1115 (i386_opcode_modifier): Add vexswapsources.
1116 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1117 with two source operands swapped.
1118 * i386-tbl.h: Regenerated.
1120 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1122 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1123 unprivileged CSR can also be initialized.
1125 2020-06-29 Alan Modra <amodra@gmail.com>
1127 * arm-dis.c: Use C style comments.
1128 * cr16-opc.c: Likewise.
1129 * ft32-dis.c: Likewise.
1130 * moxie-opc.c: Likewise.
1131 * tic54x-dis.c: Likewise.
1132 * s12z-opc.c: Remove useless comment.
1133 * xgate-dis.c: Likewise.
1135 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1137 * i386-opc.tbl: Add a blank line.
1139 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1141 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1142 (VecSIB128): Renamed to ...
1144 (VecSIB256): Renamed to ...
1146 (VecSIB512): Renamed to ...
1148 (VecSIB): Renamed to ...
1150 (i386_opcode_modifier): Replace vecsib with sib.
1151 * i386-opc.tbl (VecSIB128): New.
1152 (VecSIB256): Likewise.
1153 (VecSIB512): Likewise.
1154 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1155 and VecSIB512, respectively.
1157 2020-06-26 Jan Beulich <jbeulich@suse.com>
1159 * i386-dis.c: Adjust description of I macro.
1160 (x86_64_table): Drop use of I.
1161 (float_mem): Replace use of I.
1162 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1164 2020-06-26 Jan Beulich <jbeulich@suse.com>
1166 * i386-dis.c: (print_insn): Avoid straight assignment to
1167 priv.orig_sizeflag when processing -M sub-options.
1169 2020-06-25 Jan Beulich <jbeulich@suse.com>
1171 * i386-dis.c: Adjust description of J macro.
1172 (dis386, x86_64_table, mod_table): Replace J.
1173 (putop): Remove handling of J.
1175 2020-06-25 Jan Beulich <jbeulich@suse.com>
1177 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1179 2020-06-25 Jan Beulich <jbeulich@suse.com>
1181 * i386-dis.c: Adjust description of "LQ" macro.
1182 (dis386_twobyte): Use LQ for sysret.
1183 (putop): Adjust handling of LQ.
1185 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1187 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1188 * riscv-dis.c: Include elfxx-riscv.h.
1190 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1192 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1194 2020-06-17 Lili Cui <lili.cui@intel.com>
1196 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1198 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1201 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1202 * i386-opc.tbl: Likewise.
1203 * i386-tbl.h: Regenerated.
1205 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1207 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1209 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1211 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1212 (SR_CORE): Likewise.
1213 (SR_FEAT): Likewise.
1215 (SR_V8_1): Likewise.
1216 (SR_V8_2): Likewise.
1217 (SR_V8_3): Likewise.
1218 (SR_V8_4): Likewise.
1221 (SR_SSBS): Likewise.
1223 (SR_ID_PFR2): Likewise.
1224 (SR_PROFILE): Likewise.
1225 (SR_MEMTAG): Likewise.
1226 (SR_SCXTNUM): Likewise.
1227 (aarch64_sys_regs): Refactor to store feature information in the table.
1228 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1229 that now describe their own features.
1230 (aarch64_pstatefield_supported_p): Likewise.
1232 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1234 * i386-dis.c (prefix_table): Fix a typo in comments.
1236 2020-06-09 Jan Beulich <jbeulich@suse.com>
1238 * i386-dis.c (rex_ignored): Delete.
1239 (ckprefix): Drop rex_ignored initialization.
1240 (get_valid_dis386): Drop setting of rex_ignored.
1241 (print_insn): Drop checking of rex_ignored. Don't record data
1242 size prefix as used with VEX-and-alike encodings.
1244 2020-06-09 Jan Beulich <jbeulich@suse.com>
1246 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1247 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1248 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1249 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1250 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1251 VEX_0F12, and VEX_0F16.
1252 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1253 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1254 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1255 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1256 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1257 MOD_VEX_0F16_PREFIX_2 entries.
1259 2020-06-09 Jan Beulich <jbeulich@suse.com>
1261 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1262 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1263 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1264 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1265 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1266 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1267 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1268 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1269 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1270 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1271 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1272 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1273 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1274 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1275 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1276 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1277 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1278 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1279 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1280 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1281 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1282 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1283 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1284 EVEX_W_0FC6_P_2): Delete.
1285 (print_insn): Add EVEX.W vs embedded prefix consistency check
1286 to prefix validation.
1287 * i386-dis-evex.h (evex_table): Don't further descend for
1288 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1289 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1291 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1292 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1293 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1294 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1295 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1296 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1297 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1298 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1299 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1300 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1301 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1302 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1303 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1304 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1305 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1306 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1307 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1308 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1309 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1310 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1311 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1312 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1313 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1314 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1315 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1316 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1317 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1319 2020-06-09 Jan Beulich <jbeulich@suse.com>
1321 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1322 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1323 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1325 (print_insn): Drop pointless check against bad_opcode. Split
1326 prefix validation into legacy and VEX-and-alike parts.
1327 (putop): Re-work 'X' macro handling.
1329 2020-06-09 Jan Beulich <jbeulich@suse.com>
1331 * i386-dis.c (MOD_0F51): Rename to ...
1332 (MOD_0F50): ... this.
1334 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1336 * arm-dis.c (arm_opcodes): Add dfb.
1337 (thumb32_opcodes): Add dfb.
1339 2020-06-08 Jan Beulich <jbeulich@suse.com>
1341 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1343 2020-06-06 Alan Modra <amodra@gmail.com>
1345 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1347 2020-06-05 Alan Modra <amodra@gmail.com>
1349 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1350 size is large enough.
1352 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1354 * disassemble.c (disassemble_init_for_target): Set endian_code for
1356 * bpf-desc.c: Regenerate.
1357 * bpf-opc.c: Likewise.
1358 * bpf-dis.c: Likewise.
1360 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1362 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1363 (cgen_put_insn_value): Likewise.
1364 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1365 * cgen-dis.in (print_insn): Likewise.
1366 * cgen-ibld.in (insert_1): Likewise.
1367 (insert_1): Likewise.
1368 (insert_insn_normal): Likewise.
1369 (extract_1): Likewise.
1370 * bpf-dis.c: Regenerate.
1371 * bpf-ibld.c: Likewise.
1372 * bpf-ibld.c: Likewise.
1373 * cgen-dis.in: Likewise.
1374 * cgen-ibld.in: Likewise.
1375 * cgen-opc.c: Likewise.
1376 * epiphany-dis.c: Likewise.
1377 * epiphany-ibld.c: Likewise.
1378 * fr30-dis.c: Likewise.
1379 * fr30-ibld.c: Likewise.
1380 * frv-dis.c: Likewise.
1381 * frv-ibld.c: Likewise.
1382 * ip2k-dis.c: Likewise.
1383 * ip2k-ibld.c: Likewise.
1384 * iq2000-dis.c: Likewise.
1385 * iq2000-ibld.c: Likewise.
1386 * lm32-dis.c: Likewise.
1387 * lm32-ibld.c: Likewise.
1388 * m32c-dis.c: Likewise.
1389 * m32c-ibld.c: Likewise.
1390 * m32r-dis.c: Likewise.
1391 * m32r-ibld.c: Likewise.
1392 * mep-dis.c: Likewise.
1393 * mep-ibld.c: Likewise.
1394 * mt-dis.c: Likewise.
1395 * mt-ibld.c: Likewise.
1396 * or1k-dis.c: Likewise.
1397 * or1k-ibld.c: Likewise.
1398 * xc16x-dis.c: Likewise.
1399 * xc16x-ibld.c: Likewise.
1400 * xstormy16-dis.c: Likewise.
1401 * xstormy16-ibld.c: Likewise.
1403 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1405 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1406 (print_insn_): Handle instruction endian.
1407 * bpf-dis.c: Regenerate.
1408 * bpf-desc.c: Regenerate.
1409 * epiphany-dis.c: Likewise.
1410 * epiphany-desc.c: Likewise.
1411 * fr30-dis.c: Likewise.
1412 * fr30-desc.c: Likewise.
1413 * frv-dis.c: Likewise.
1414 * frv-desc.c: Likewise.
1415 * ip2k-dis.c: Likewise.
1416 * ip2k-desc.c: Likewise.
1417 * iq2000-dis.c: Likewise.
1418 * iq2000-desc.c: Likewise.
1419 * lm32-dis.c: Likewise.
1420 * lm32-desc.c: Likewise.
1421 * m32c-dis.c: Likewise.
1422 * m32c-desc.c: Likewise.
1423 * m32r-dis.c: Likewise.
1424 * m32r-desc.c: Likewise.
1425 * mep-dis.c: Likewise.
1426 * mep-desc.c: Likewise.
1427 * mt-dis.c: Likewise.
1428 * mt-desc.c: Likewise.
1429 * or1k-dis.c: Likewise.
1430 * or1k-desc.c: Likewise.
1431 * xc16x-dis.c: Likewise.
1432 * xc16x-desc.c: Likewise.
1433 * xstormy16-dis.c: Likewise.
1434 * xstormy16-desc.c: Likewise.
1436 2020-06-03 Nick Clifton <nickc@redhat.com>
1438 * po/sr.po: Updated Serbian translation.
1440 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1442 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1443 (riscv_get_priv_spec_class): Likewise.
1445 2020-06-01 Alan Modra <amodra@gmail.com>
1447 * bpf-desc.c: Regenerate.
1449 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1450 David Faust <david.faust@oracle.com>
1452 * bpf-desc.c: Regenerate.
1453 * bpf-opc.h: Likewise.
1454 * bpf-opc.c: Likewise.
1455 * bpf-dis.c: Likewise.
1457 2020-05-28 Alan Modra <amodra@gmail.com>
1459 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1462 2020-05-28 Alan Modra <amodra@gmail.com>
1464 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1466 (print_insn_ns32k): Revert last change.
1468 2020-05-28 Nick Clifton <nickc@redhat.com>
1470 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1473 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1475 Fix extraction of signed constants in nios2 disassembler (again).
1477 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1478 extractions of signed fields.
1480 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1482 * s390-opc.txt: Relocate vector load/store instructions with
1483 additional alignment parameter and change architecture level
1484 constraint from z14 to z13.
1486 2020-05-21 Alan Modra <amodra@gmail.com>
1488 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1489 * sparc-dis.c: Likewise.
1490 * tic4x-dis.c: Likewise.
1491 * xtensa-dis.c: Likewise.
1492 * bpf-desc.c: Regenerate.
1493 * epiphany-desc.c: Regenerate.
1494 * fr30-desc.c: Regenerate.
1495 * frv-desc.c: Regenerate.
1496 * ip2k-desc.c: Regenerate.
1497 * iq2000-desc.c: Regenerate.
1498 * lm32-desc.c: Regenerate.
1499 * m32c-desc.c: Regenerate.
1500 * m32r-desc.c: Regenerate.
1501 * mep-asm.c: Regenerate.
1502 * mep-desc.c: Regenerate.
1503 * mt-desc.c: Regenerate.
1504 * or1k-desc.c: Regenerate.
1505 * xc16x-desc.c: Regenerate.
1506 * xstormy16-desc.c: Regenerate.
1508 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1510 * riscv-opc.c (riscv_ext_version_table): The table used to store
1511 all information about the supported spec and the corresponding ISA
1512 versions. Currently, only Zicsr is supported to verify the
1513 correctness of Z sub extension settings. Others will be supported
1514 in the future patches.
1515 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1516 classes and the corresponding strings.
1517 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1518 spec class by giving a ISA spec string.
1519 * riscv-opc.c (struct priv_spec_t): New structure.
1520 (struct priv_spec_t priv_specs): List for all supported privilege spec
1521 classes and the corresponding strings.
1522 (riscv_get_priv_spec_class): New function. Get the corresponding
1523 privilege spec class by giving a spec string.
1524 (riscv_get_priv_spec_name): New function. Get the corresponding
1525 privilege spec string by giving a CSR version class.
1526 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1527 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1528 according to the chosen version. Build a hash table riscv_csr_hash to
1529 store the valid CSR for the chosen pirv verison. Dump the direct
1530 CSR address rather than it's name if it is invalid.
1531 (parse_riscv_dis_option_without_args): New function. Parse the options
1533 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1534 parse the options without arguments first, and then handle the options
1535 with arguments. Add the new option -Mpriv-spec, which has argument.
1536 * riscv-dis.c (print_riscv_disassembler_options): Add description
1537 about the new OBJDUMP option.
1539 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1541 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1542 WC values on POWER10 sync, dcbf and wait instructions.
1543 (insert_pl, extract_pl): New functions.
1544 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1545 (LS3): New , 3-bit L for sync.
1546 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1547 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1548 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1549 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1550 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1551 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1552 <wait>: Enable PL operand on POWER10.
1553 <dcbf>: Enable L3OPT operand on POWER10.
1554 <sync>: Enable SC2 operand on POWER10.
1556 2020-05-19 Stafford Horne <shorne@gmail.com>
1559 * or1k-asm.c: Regenerate.
1560 * or1k-desc.c: Regenerate.
1561 * or1k-desc.h: Regenerate.
1562 * or1k-dis.c: Regenerate.
1563 * or1k-ibld.c: Regenerate.
1564 * or1k-opc.c: Regenerate.
1565 * or1k-opc.h: Regenerate.
1566 * or1k-opinst.c: Regenerate.
1568 2020-05-11 Alan Modra <amodra@gmail.com>
1570 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1573 2020-05-11 Alan Modra <amodra@gmail.com>
1575 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1576 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1578 2020-05-11 Alan Modra <amodra@gmail.com>
1580 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1582 2020-05-11 Alan Modra <amodra@gmail.com>
1584 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1585 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1587 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1589 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1592 2020-05-11 Alan Modra <amodra@gmail.com>
1594 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1595 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1596 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1597 (prefix_opcodes): Add xxeval.
1599 2020-05-11 Alan Modra <amodra@gmail.com>
1601 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1602 xxgenpcvwm, xxgenpcvdm.
1604 2020-05-11 Alan Modra <amodra@gmail.com>
1606 * ppc-opc.c (MP, VXVAM_MASK): Define.
1607 (VXVAPS_MASK): Use VXVA_MASK.
1608 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1609 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1610 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1611 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1613 2020-05-11 Alan Modra <amodra@gmail.com>
1614 Peter Bergner <bergner@linux.ibm.com>
1616 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1618 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1619 YMSK2, XA6a, XA6ap, XB6a entries.
1620 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1621 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1623 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1624 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1625 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1626 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1627 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1628 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1629 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1630 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1631 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1632 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1633 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1634 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1635 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1636 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1638 2020-05-11 Alan Modra <amodra@gmail.com>
1640 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1641 (insert_xts, extract_xts): New functions.
1642 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1643 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1644 (VXRC_MASK, VXSH_MASK): Define.
1645 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1646 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1647 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1648 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1649 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1650 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1651 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1653 2020-05-11 Alan Modra <amodra@gmail.com>
1655 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1656 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1657 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1658 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1659 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1661 2020-05-11 Alan Modra <amodra@gmail.com>
1663 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1664 (XTP, DQXP, DQXP_MASK): Define.
1665 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1666 (prefix_opcodes): Add plxvp and pstxvp.
1668 2020-05-11 Alan Modra <amodra@gmail.com>
1670 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1671 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1672 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1674 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1676 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1678 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1680 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1682 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1684 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1686 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1688 2020-05-11 Alan Modra <amodra@gmail.com>
1690 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1692 2020-05-11 Alan Modra <amodra@gmail.com>
1694 * ppc-dis.c (ppc_opts): Add "power10" entry.
1695 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1696 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1698 2020-05-11 Nick Clifton <nickc@redhat.com>
1700 * po/fr.po: Updated French translation.
1702 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1704 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1705 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1706 (operand_general_constraint_met_p): validate
1707 AARCH64_OPND_UNDEFINED.
1708 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1710 * aarch64-asm-2.c: Regenerated.
1711 * aarch64-dis-2.c: Regenerated.
1712 * aarch64-opc-2.c: Regenerated.
1714 2020-04-29 Nick Clifton <nickc@redhat.com>
1717 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1720 2020-04-29 Nick Clifton <nickc@redhat.com>
1722 * po/sv.po: Updated Swedish translation.
1724 2020-04-29 Nick Clifton <nickc@redhat.com>
1727 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1728 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1729 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1732 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1735 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1736 cmpi only on m68020up and cpu32.
1738 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1740 * aarch64-asm.c (aarch64_ins_none): New.
1741 * aarch64-asm.h (ins_none): New declaration.
1742 * aarch64-dis.c (aarch64_ext_none): New.
1743 * aarch64-dis.h (ext_none): New declaration.
1744 * aarch64-opc.c (aarch64_print_operand): Update case for
1745 AARCH64_OPND_BARRIER_PSB.
1746 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1747 (AARCH64_OPERANDS): Update inserter/extracter for
1748 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1749 * aarch64-asm-2.c: Regenerated.
1750 * aarch64-dis-2.c: Regenerated.
1751 * aarch64-opc-2.c: Regenerated.
1753 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1755 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1756 (aarch64_feature_ras, RAS): Likewise.
1757 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1758 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1759 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1760 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1761 * aarch64-asm-2.c: Regenerated.
1762 * aarch64-dis-2.c: Regenerated.
1763 * aarch64-opc-2.c: Regenerated.
1765 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1767 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1768 (print_insn_neon): Support disassembly of conditional
1771 2020-02-16 David Faust <david.faust@oracle.com>
1773 * bpf-desc.c: Regenerate.
1774 * bpf-desc.h: Likewise.
1775 * bpf-opc.c: Regenerate.
1776 * bpf-opc.h: Likewise.
1778 2020-04-07 Lili Cui <lili.cui@intel.com>
1780 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1781 (prefix_table): New instructions (see prefixes above).
1782 (rm_table): Likewise
1783 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1784 CPU_ANY_TSXLDTRK_FLAGS.
1785 (cpu_flags): Add CpuTSXLDTRK.
1786 * i386-opc.h (enum): Add CpuTSXLDTRK.
1787 (i386_cpu_flags): Add cputsxldtrk.
1788 * i386-opc.tbl: Add XSUSPLDTRK insns.
1789 * i386-init.h: Regenerate.
1790 * i386-tbl.h: Likewise.
1792 2020-04-02 Lili Cui <lili.cui@intel.com>
1794 * i386-dis.c (prefix_table): New instructions serialize.
1795 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1796 CPU_ANY_SERIALIZE_FLAGS.
1797 (cpu_flags): Add CpuSERIALIZE.
1798 * i386-opc.h (enum): Add CpuSERIALIZE.
1799 (i386_cpu_flags): Add cpuserialize.
1800 * i386-opc.tbl: Add SERIALIZE insns.
1801 * i386-init.h: Regenerate.
1802 * i386-tbl.h: Likewise.
1804 2020-03-26 Alan Modra <amodra@gmail.com>
1806 * disassemble.h (opcodes_assert): Declare.
1807 (OPCODES_ASSERT): Define.
1808 * disassemble.c: Don't include assert.h. Include opintl.h.
1809 (opcodes_assert): New function.
1810 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1811 (bfd_h8_disassemble): Reduce size of data array. Correctly
1812 calculate maxlen. Omit insn decoding when insn length exceeds
1813 maxlen. Exit from nibble loop when looking for E, before
1814 accessing next data byte. Move processing of E outside loop.
1815 Replace tests of maxlen in loop with assertions.
1817 2020-03-26 Alan Modra <amodra@gmail.com>
1819 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1821 2020-03-25 Alan Modra <amodra@gmail.com>
1823 * z80-dis.c (suffix): Init mybuf.
1825 2020-03-22 Alan Modra <amodra@gmail.com>
1827 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1828 successflly read from section.
1830 2020-03-22 Alan Modra <amodra@gmail.com>
1832 * arc-dis.c (find_format): Use ISO C string concatenation rather
1833 than line continuation within a string. Don't access needs_limm
1834 before testing opcode != NULL.
1836 2020-03-22 Alan Modra <amodra@gmail.com>
1838 * ns32k-dis.c (print_insn_arg): Update comment.
1839 (print_insn_ns32k): Reduce size of index_offset array, and
1840 initialize, passing -1 to print_insn_arg for args that are not
1841 an index. Don't exit arg loop early. Abort on bad arg number.
1843 2020-03-22 Alan Modra <amodra@gmail.com>
1845 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1846 * s12z-opc.c: Formatting.
1847 (operands_f): Return an int.
1848 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1849 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1850 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1851 (exg_sex_discrim): Likewise.
1852 (create_immediate_operand, create_bitfield_operand),
1853 (create_register_operand_with_size, create_register_all_operand),
1854 (create_register_all16_operand, create_simple_memory_operand),
1855 (create_memory_operand, create_memory_auto_operand): Don't
1856 segfault on malloc failure.
1857 (z_ext24_decode): Return an int status, negative on fail, zero
1859 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1860 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1861 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1862 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1863 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1864 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1865 (loop_primitive_decode, shift_decode, psh_pul_decode),
1866 (bit_field_decode): Similarly.
1867 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1868 to return value, update callers.
1869 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1870 Don't segfault on NULL operand.
1871 (decode_operation): Return OP_INVALID on first fail.
1872 (decode_s12z): Check all reads, returning -1 on fail.
1874 2020-03-20 Alan Modra <amodra@gmail.com>
1876 * metag-dis.c (print_insn_metag): Don't ignore status from
1879 2020-03-20 Alan Modra <amodra@gmail.com>
1881 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1882 Initialize parts of buffer not written when handling a possible
1883 2-byte insn at end of section. Don't attempt decoding of such
1884 an insn by the 4-byte machinery.
1886 2020-03-20 Alan Modra <amodra@gmail.com>
1888 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1889 partially filled buffer. Prevent lookup of 4-byte insns when
1890 only VLE 2-byte insns are possible due to section size. Print
1891 ".word" rather than ".long" for 2-byte leftovers.
1893 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1896 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1898 2020-03-13 Jan Beulich <jbeulich@suse.com>
1900 * i386-dis.c (X86_64_0D): Rename to ...
1901 (X86_64_0E): ... this.
1903 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1905 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1906 * Makefile.in: Regenerated.
1908 2020-03-09 Jan Beulich <jbeulich@suse.com>
1910 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1912 * i386-tbl.h: Re-generate.
1914 2020-03-09 Jan Beulich <jbeulich@suse.com>
1916 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1917 vprot*, vpsha*, and vpshl*.
1918 * i386-tbl.h: Re-generate.
1920 2020-03-09 Jan Beulich <jbeulich@suse.com>
1922 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1923 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1924 * i386-tbl.h: Re-generate.
1926 2020-03-09 Jan Beulich <jbeulich@suse.com>
1928 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1929 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1930 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1931 * i386-tbl.h: Re-generate.
1933 2020-03-09 Jan Beulich <jbeulich@suse.com>
1935 * i386-gen.c (struct template_arg, struct template_instance,
1936 struct template_param, struct template, templates,
1937 parse_template, expand_templates): New.
1938 (process_i386_opcodes): Various local variables moved to
1939 expand_templates. Call parse_template and expand_templates.
1940 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1941 * i386-tbl.h: Re-generate.
1943 2020-03-06 Jan Beulich <jbeulich@suse.com>
1945 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1946 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1947 register and memory source templates. Replace VexW= by VexW*
1949 * i386-tbl.h: Re-generate.
1951 2020-03-06 Jan Beulich <jbeulich@suse.com>
1953 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1954 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1955 * i386-tbl.h: Re-generate.
1957 2020-03-06 Jan Beulich <jbeulich@suse.com>
1959 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1960 * i386-tbl.h: Re-generate.
1962 2020-03-06 Jan Beulich <jbeulich@suse.com>
1964 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1965 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1966 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1967 VexW0 on SSE2AVX variants.
1968 (vmovq): Drop NoRex64 from XMM/XMM variants.
1969 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1970 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1971 applicable use VexW0.
1972 * i386-tbl.h: Re-generate.
1974 2020-03-06 Jan Beulich <jbeulich@suse.com>
1976 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1977 * i386-opc.h (Rex64): Delete.
1978 (struct i386_opcode_modifier): Remove rex64 field.
1979 * i386-opc.tbl (crc32): Drop Rex64.
1980 Replace Rex64 with Size64 everywhere else.
1981 * i386-tbl.h: Re-generate.
1983 2020-03-06 Jan Beulich <jbeulich@suse.com>
1985 * i386-dis.c (OP_E_memory): Exclude recording of used address
1986 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1987 addressed memory operands for MPX insns.
1989 2020-03-06 Jan Beulich <jbeulich@suse.com>
1991 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
1992 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
1993 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
1994 (ptwrite): Split into non-64-bit and 64-bit forms.
1995 * i386-tbl.h: Re-generate.
1997 2020-03-06 Jan Beulich <jbeulich@suse.com>
1999 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2001 * i386-tbl.h: Re-generate.
2003 2020-03-04 Jan Beulich <jbeulich@suse.com>
2005 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2006 (prefix_table): Move vmmcall here. Add vmgexit.
2007 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2008 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2009 (cpu_flags): Add CpuSEV_ES entry.
2010 * i386-opc.h (CpuSEV_ES): New.
2011 (union i386_cpu_flags): Add cpusev_es field.
2012 * i386-opc.tbl (vmgexit): New.
2013 * i386-init.h, i386-tbl.h: Re-generate.
2015 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2017 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2019 * i386-opc.h (IGNORESIZE): New.
2020 (DEFAULTSIZE): Likewise.
2021 (IgnoreSize): Removed.
2022 (DefaultSize): Likewise.
2023 (MnemonicSize): New.
2024 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2026 * i386-opc.tbl (IgnoreSize): New.
2027 (DefaultSize): Likewise.
2028 * i386-tbl.h: Regenerated.
2030 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2033 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2036 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2039 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2040 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2041 * i386-tbl.h: Regenerated.
2043 2020-02-26 Alan Modra <amodra@gmail.com>
2045 * aarch64-asm.c: Indent labels correctly.
2046 * aarch64-dis.c: Likewise.
2047 * aarch64-gen.c: Likewise.
2048 * aarch64-opc.c: Likewise.
2049 * alpha-dis.c: Likewise.
2050 * i386-dis.c: Likewise.
2051 * nds32-asm.c: Likewise.
2052 * nfp-dis.c: Likewise.
2053 * visium-dis.c: Likewise.
2055 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2057 * arc-regs.h (int_vector_base): Make it available for all ARC
2060 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2062 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2065 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2067 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2068 c.mv/c.li if rs1 is zero.
2070 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2072 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2073 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2075 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2076 * i386-opc.h (CpuABM): Removed.
2078 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2079 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2080 popcnt. Remove CpuABM from lzcnt.
2081 * i386-init.h: Regenerated.
2082 * i386-tbl.h: Likewise.
2084 2020-02-17 Jan Beulich <jbeulich@suse.com>
2086 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2087 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2088 VexW1 instead of open-coding them.
2089 * i386-tbl.h: Re-generate.
2091 2020-02-17 Jan Beulich <jbeulich@suse.com>
2093 * i386-opc.tbl (AddrPrefixOpReg): Define.
2094 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2095 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2096 templates. Drop NoRex64.
2097 * i386-tbl.h: Re-generate.
2099 2020-02-17 Jan Beulich <jbeulich@suse.com>
2102 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2103 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2104 into Intel syntax instance (with Unpsecified) and AT&T one
2106 (vcvtneps2bf16): Likewise, along with folding the two so far
2108 * i386-tbl.h: Re-generate.
2110 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2112 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2113 CPU_ANY_SSE4A_FLAGS.
2115 2020-02-17 Alan Modra <amodra@gmail.com>
2117 * i386-gen.c (cpu_flag_init): Correct last change.
2119 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2121 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2124 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2126 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2129 2020-02-14 Jan Beulich <jbeulich@suse.com>
2132 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2133 destination for Cpu64-only variant.
2134 (movzx): Fold patterns.
2135 * i386-tbl.h: Re-generate.
2137 2020-02-13 Jan Beulich <jbeulich@suse.com>
2139 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2140 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2141 CPU_ANY_SSE4_FLAGS entry.
2142 * i386-init.h: Re-generate.
2144 2020-02-12 Jan Beulich <jbeulich@suse.com>
2146 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2147 with Unspecified, making the present one AT&T syntax only.
2148 * i386-tbl.h: Re-generate.
2150 2020-02-12 Jan Beulich <jbeulich@suse.com>
2152 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2153 * i386-tbl.h: Re-generate.
2155 2020-02-12 Jan Beulich <jbeulich@suse.com>
2158 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2159 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2160 Amd64 and Intel64 templates.
2161 (call, jmp): Likewise for far indirect variants. Dro
2163 * i386-tbl.h: Re-generate.
2165 2020-02-11 Jan Beulich <jbeulich@suse.com>
2167 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2168 * i386-opc.h (ShortForm): Delete.
2169 (struct i386_opcode_modifier): Remove shortform field.
2170 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2171 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2172 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2173 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2175 * i386-tbl.h: Re-generate.
2177 2020-02-11 Jan Beulich <jbeulich@suse.com>
2179 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2180 fucompi): Drop ShortForm from operand-less templates.
2181 * i386-tbl.h: Re-generate.
2183 2020-02-11 Alan Modra <amodra@gmail.com>
2185 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2186 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2187 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2188 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2189 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2191 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2193 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2194 (cde_opcodes): Add VCX* instructions.
2196 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2197 Matthew Malcomson <matthew.malcomson@arm.com>
2199 * arm-dis.c (struct cdeopcode32): New.
2200 (CDE_OPCODE): New macro.
2201 (cde_opcodes): New disassembly table.
2202 (regnames): New option to table.
2203 (cde_coprocs): New global variable.
2204 (print_insn_cde): New
2205 (print_insn_thumb32): Use print_insn_cde.
2206 (parse_arm_disassembler_options): Parse coprocN args.
2208 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2211 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2213 * i386-opc.h (AMD64): Removed.
2214 (Intel64): Likewose.
2216 (INTEL64): Likewise.
2217 (INTEL64ONLY): Likewise.
2218 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2219 * i386-opc.tbl (Amd64): New.
2220 (Intel64): Likewise.
2221 (Intel64Only): Likewise.
2222 Replace AMD64 with Amd64. Update sysenter/sysenter with
2223 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2224 * i386-tbl.h: Regenerated.
2226 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2229 * z80-dis.c: Add support for GBZ80 opcodes.
2231 2020-02-04 Alan Modra <amodra@gmail.com>
2233 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2235 2020-02-03 Alan Modra <amodra@gmail.com>
2237 * m32c-ibld.c: Regenerate.
2239 2020-02-01 Alan Modra <amodra@gmail.com>
2241 * frv-ibld.c: Regenerate.
2243 2020-01-31 Jan Beulich <jbeulich@suse.com>
2245 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2246 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2247 (OP_E_memory): Replace xmm_mdq_mode case label by
2248 vex_scalar_w_dq_mode one.
2249 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2251 2020-01-31 Jan Beulich <jbeulich@suse.com>
2253 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2254 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2255 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2256 (intel_operand_size): Drop vex_w_dq_mode case label.
2258 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2260 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2261 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2263 2020-01-30 Alan Modra <amodra@gmail.com>
2265 * m32c-ibld.c: Regenerate.
2267 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2269 * bpf-opc.c: Regenerate.
2271 2020-01-30 Jan Beulich <jbeulich@suse.com>
2273 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2274 (dis386): Use them to replace C2/C3 table entries.
2275 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2276 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2277 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2278 * i386-tbl.h: Re-generate.
2280 2020-01-30 Jan Beulich <jbeulich@suse.com>
2282 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2284 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2286 * i386-tbl.h: Re-generate.
2288 2020-01-30 Alan Modra <amodra@gmail.com>
2290 * tic4x-dis.c (tic4x_dp): Make unsigned.
2292 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2293 Jan Beulich <jbeulich@suse.com>
2296 * i386-dis.c (MOVSXD_Fixup): New function.
2297 (movsxd_mode): New enum.
2298 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2299 (intel_operand_size): Handle movsxd_mode.
2300 (OP_E_register): Likewise.
2302 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2303 register on movsxd. Add movsxd with 16-bit destination register
2304 for AMD64 and Intel64 ISAs.
2305 * i386-tbl.h: Regenerated.
2307 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2310 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2311 * aarch64-asm-2.c: Regenerate
2312 * aarch64-dis-2.c: Likewise.
2313 * aarch64-opc-2.c: Likewise.
2315 2020-01-21 Jan Beulich <jbeulich@suse.com>
2317 * i386-opc.tbl (sysret): Drop DefaultSize.
2318 * i386-tbl.h: Re-generate.
2320 2020-01-21 Jan Beulich <jbeulich@suse.com>
2322 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2324 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2325 * i386-tbl.h: Re-generate.
2327 2020-01-20 Nick Clifton <nickc@redhat.com>
2329 * po/de.po: Updated German translation.
2330 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2331 * po/uk.po: Updated Ukranian translation.
2333 2020-01-20 Alan Modra <amodra@gmail.com>
2335 * hppa-dis.c (fput_const): Remove useless cast.
2337 2020-01-20 Alan Modra <amodra@gmail.com>
2339 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2341 2020-01-18 Nick Clifton <nickc@redhat.com>
2343 * configure: Regenerate.
2344 * po/opcodes.pot: Regenerate.
2346 2020-01-18 Nick Clifton <nickc@redhat.com>
2348 Binutils 2.34 branch created.
2350 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2352 * opintl.h: Fix spelling error (seperate).
2354 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2356 * i386-opc.tbl: Add {vex} pseudo prefix.
2357 * i386-tbl.h: Regenerated.
2359 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2362 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2363 (neon_opcodes): Likewise.
2364 (select_arm_features): Make sure we enable MVE bits when selecting
2365 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2368 2020-01-16 Jan Beulich <jbeulich@suse.com>
2370 * i386-opc.tbl: Drop stale comment from XOP section.
2372 2020-01-16 Jan Beulich <jbeulich@suse.com>
2374 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2375 (extractps): Add VexWIG to SSE2AVX forms.
2376 * i386-tbl.h: Re-generate.
2378 2020-01-16 Jan Beulich <jbeulich@suse.com>
2380 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2381 Size64 from and use VexW1 on SSE2AVX forms.
2382 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2383 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2384 * i386-tbl.h: Re-generate.
2386 2020-01-15 Alan Modra <amodra@gmail.com>
2388 * tic4x-dis.c (tic4x_version): Make unsigned long.
2389 (optab, optab_special, registernames): New file scope vars.
2390 (tic4x_print_register): Set up registernames rather than
2391 malloc'd registertable.
2392 (tic4x_disassemble): Delete optable and optable_special. Use
2393 optab and optab_special instead. Throw away old optab,
2394 optab_special and registernames when info->mach changes.
2396 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2399 * z80-dis.c (suffix): Use .db instruction to generate double
2402 2020-01-14 Alan Modra <amodra@gmail.com>
2404 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2405 values to unsigned before shifting.
2407 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2409 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2411 (print_insn_thumb16, print_insn_thumb32): Likewise.
2412 (print_insn): Initialize the insn info.
2413 * i386-dis.c (print_insn): Initialize the insn info fields, and
2416 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2418 * arc-opc.c (C_NE): Make it required.
2420 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2422 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2423 reserved register name.
2425 2020-01-13 Alan Modra <amodra@gmail.com>
2427 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2428 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2430 2020-01-13 Alan Modra <amodra@gmail.com>
2432 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2433 result of wasm_read_leb128 in a uint64_t and check that bits
2434 are not lost when copying to other locals. Use uint32_t for
2435 most locals. Use PRId64 when printing int64_t.
2437 2020-01-13 Alan Modra <amodra@gmail.com>
2439 * score-dis.c: Formatting.
2440 * score7-dis.c: Formatting.
2442 2020-01-13 Alan Modra <amodra@gmail.com>
2444 * score-dis.c (print_insn_score48): Use unsigned variables for
2445 unsigned values. Don't left shift negative values.
2446 (print_insn_score32): Likewise.
2447 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2449 2020-01-13 Alan Modra <amodra@gmail.com>
2451 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2453 2020-01-13 Alan Modra <amodra@gmail.com>
2455 * fr30-ibld.c: Regenerate.
2457 2020-01-13 Alan Modra <amodra@gmail.com>
2459 * xgate-dis.c (print_insn): Don't left shift signed value.
2460 (ripBits): Formatting, use 1u.
2462 2020-01-10 Alan Modra <amodra@gmail.com>
2464 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2465 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2467 2020-01-10 Alan Modra <amodra@gmail.com>
2469 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2470 and XRREG value earlier to avoid a shift with negative exponent.
2471 * m10200-dis.c (disassemble): Similarly.
2473 2020-01-09 Nick Clifton <nickc@redhat.com>
2476 * z80-dis.c (ld_ii_ii): Use correct cast.
2478 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2481 * z80-dis.c (ld_ii_ii): Use character constant when checking
2484 2020-01-09 Jan Beulich <jbeulich@suse.com>
2486 * i386-dis.c (SEP_Fixup): New.
2488 (dis386_twobyte): Use it for sysenter/sysexit.
2489 (enum x86_64_isa): Change amd64 enumerator to value 1.
2490 (OP_J): Compare isa64 against intel64 instead of amd64.
2491 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2493 * i386-tbl.h: Re-generate.
2495 2020-01-08 Alan Modra <amodra@gmail.com>
2497 * z8k-dis.c: Include libiberty.h
2498 (instr_data_s): Make max_fetched unsigned.
2499 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2500 Don't exceed byte_info bounds.
2501 (output_instr): Make num_bytes unsigned.
2502 (unpack_instr): Likewise for nibl_count and loop.
2503 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2505 * z8k-opc.h: Regenerate.
2507 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2509 * arc-tbl.h (llock): Use 'LLOCK' as class.
2511 (scond): Use 'SCOND' as class.
2513 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2516 2020-01-06 Alan Modra <amodra@gmail.com>
2518 * m32c-ibld.c: Regenerate.
2520 2020-01-06 Alan Modra <amodra@gmail.com>
2523 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2524 Peek at next byte to prevent recursion on repeated prefix bytes.
2525 Ensure uninitialised "mybuf" is not accessed.
2526 (print_insn_z80): Don't zero n_fetch and n_used here,..
2527 (print_insn_z80_buf): ..do it here instead.
2529 2020-01-04 Alan Modra <amodra@gmail.com>
2531 * m32r-ibld.c: Regenerate.
2533 2020-01-04 Alan Modra <amodra@gmail.com>
2535 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2537 2020-01-04 Alan Modra <amodra@gmail.com>
2539 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2541 2020-01-04 Alan Modra <amodra@gmail.com>
2543 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2545 2020-01-03 Jan Beulich <jbeulich@suse.com>
2547 * aarch64-tbl.h (aarch64_opcode_table): Use
2548 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2550 2020-01-03 Jan Beulich <jbeulich@suse.com>
2552 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2553 forms of SUDOT and USDOT.
2555 2020-01-03 Jan Beulich <jbeulich@suse.com>
2557 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2559 * opcodes/aarch64-dis-2.c: Re-generate.
2561 2020-01-03 Jan Beulich <jbeulich@suse.com>
2563 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2565 * opcodes/aarch64-dis-2.c: Re-generate.
2567 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2569 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2571 2020-01-01 Alan Modra <amodra@gmail.com>
2573 Update year range in copyright notice of all files.
2575 For older changes see ChangeLog-2019
2577 Copyright (C) 2020 Free Software Foundation, Inc.
2579 Copying and distribution of this file, with or without modification,
2580 are permitted in any medium without royalty provided the copyright
2581 notice and this notice are preserved.
2587 version-control: never
projects / deliverable / binutils-gdb.git / blob