1 2021-06-19 Mike Frysinger <vapier@gentoo.org>
3 * configure.ac: Delete AC_PATH_X call.
4 * configure: Regenerate.
6 2021-06-19 Mike Frysinger <vapier@gentoo.org>
8 * configure.ac: Delete AC_CHECK_LIB calls.
9 * configure: Regenerate.
11 2021-06-18 Mike Frysinger <vapier@gentoo.org>
13 * aclocal.m4, configure: Regenerate.
15 2021-06-18 Mike Frysinger <vapier@gentoo.org>
17 * Makefile.in (SIM_WERROR_CFLAGS): New variable.
18 * configure.ac: Delete call to SIM_AC_OPTION_WARNINGS.
19 * configure: Regenerate.
21 2021-06-18 Mike Frysinger <vapier@gentoo.org>
23 * interp.c: Include sim-signal.h.
25 2021-06-17 Mike Frysinger <vapier@gentoo.org>
27 * configure.ac: Delete SIM_AC_OPTION_ENDIAN call.
28 * aclocal.m4, configure: Regenerate.
30 2021-06-16 Mike Frysinger <vapier@gentoo.org>
32 * interp.c (dotrace): Make comment const.
33 * sim-main.h (dotrace): Likewise. Add ATTRIBUTE_PRINTF.
35 2021-06-16 Mike Frysinger <vapier@gentoo.org>
37 * interp.c (sim_monitor): Change ap type to address_word*.
38 (_P, P): New macros. Rewrite dynamic printf logic to use these.
40 2021-06-16 Mike Frysinger <vapier@gentoo.org>
42 * dv-tx3904sio.c (tx3904sio_fifo_push): Change next_buf to
45 2021-06-16 Mike Frysinger <vapier@gentoo.org>
47 * dv-tx3904irc.c (tx3904irc_io_write_buffer): Initialize
50 2021-06-16 Mike Frysinger <vapier@gentoo.org>
52 * configure: Regenerate.
54 2021-06-16 Mike Frysinger <vapier@gentoo.org>
56 * interp.c (sim_open): Change %lx to %x and PRIx macros.
58 2021-06-16 Mike Frysinger <vapier@gentoo.org>
60 * configure: Regenerate.
63 2021-06-15 Mike Frysinger <vapier@gentoo.org>
65 * config.in, configure: Regenerate.
67 2021-06-12 Mike Frysinger <vapier@gentoo.org>
69 * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
71 2021-06-12 Mike Frysinger <vapier@gentoo.org>
73 * aclocal.m4, config.in, configure: Regenerate.
75 2021-06-12 Mike Frysinger <vapier@gentoo.org>
77 * configure.ac: Delete call to AC_CHECK_FUNCS.
78 * config.in, configure: Regenerate.
80 2021-06-08 Mike Frysinger <vapier@gentoo.org>
82 * Makefile.in: Replace $(IGEN) with $(IGEN_RUN) and ../igen/igen
85 2021-05-29 Mike Frysinger <vapier@gentoo.org>
87 * interp.c [!HAVE_DV_SOCKSER] (sockser_addr): Define to NULL.
89 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
91 * interp.c (sim_open): Add shadow mappings from 32-bit
92 address space to 64-bit sign-extended address space.
94 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
96 * interp.c (sim_create_inferior): Only truncate sign extension
97 bits for 32-bit target models.
99 2021-05-17 Mike Frysinger <vapier@gentoo.org>
101 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
103 2021-05-17 Mike Frysinger <vapier@gentoo.org>
105 * interp.c (sim_open): Switch to sim_state_alloc_extra.
106 * micromips.igen: Change SD to mips_sim_state.
107 * micromipsrun.c (sim_engine_run): Likewise.
108 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
109 (watch_options_install): Delete.
110 (struct swatch): Delete.
111 (struct sim_state): Delete.
112 (struct mips_sim_state): New struct.
113 (MIPS_SIM_STATE): Define.
115 2021-05-16 Mike Frysinger <vapier@gentoo.org>
117 * interp.c: Replace config.h include with defs.h.
118 * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
119 dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
122 2021-05-16 Mike Frysinger <vapier@gentoo.org>
124 * config.in, configure: Regenerate.
126 2021-05-14 Mike Frysinger <vapier@gentoo.org>
128 * interp.c: Update include path.
130 2021-05-04 Mike Frysinger <vapier@gentoo.org>
132 * dv-tx3904sio.c: Include stdlib.h.
134 2021-05-04 Mike Frysinger <vapier@gentoo.org>
136 * configure.ac (hw_extra_devices): Inline contents into
137 SIM_AC_OPTION_HARDWARE and delete.
138 * configure: Regenerate.
140 2021-05-04 Mike Frysinger <vapier@gentoo.org>
142 * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
143 (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
144 * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
145 * configure: Regenerate.
147 2021-05-04 Mike Frysinger <vapier@gentoo.org>
149 * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
151 2021-05-04 Mike Frysinger <vapier@gentoo.org>
153 * configure: Regenerate.
155 2021-05-01 Mike Frysinger <vapier@gentoo.org>
157 * cp1.c (store_fcr): Mark static.
159 2021-05-01 Mike Frysinger <vapier@gentoo.org>
161 * config.in, configure: Regenerate.
163 2021-04-23 Mike Frysinger <vapier@gentoo.org>
165 * configure.ac (hw_enabled): Delete.
166 (SIM_AC_OPTION_HARDWARE): Delete first two args.
167 * configure: Regenerate.
169 2021-04-22 Tom Tromey <tom@tromey.com>
171 * configure, config.in: Rebuild.
173 2021-04-22 Tom Tromey <tom@tromey.com>
175 * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
177 (SIM_EXTRA_DEPS): New variable.
179 2021-04-22 Tom Tromey <tom@tromey.com>
181 * configure: Rebuild.
183 2021-04-21 Mike Frysinger <vapier@gentoo.org>
185 * aclocal.m4: Regenerate.
187 2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
189 * configure: Regenerate.
191 2021-04-18 Mike Frysinger <vapier@gentoo.org>
193 * configure: Regenerate.
195 2021-04-12 Mike Frysinger <vapier@gentoo.org>
197 * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
199 2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
201 * Makefile.in: Set ASAN_OPTIONS when running igen.
203 2021-04-04 Steve Ellcey <sellcey@mips.com>
204 Faraz Shahbazker <fshahbazker@wavecomp.com>
206 * interp.c (sim_monitor): Add switch entries for unlink (13),
207 lseek (14), and stat (15).
209 2021-04-02 Mike Frysinger <vapier@gentoo.org>
211 * Makefile.in (../igen/igen): Delete rule.
212 (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
214 2021-04-02 Mike Frysinger <vapier@gentoo.org>
216 * aclocal.m4, configure: Regenerate.
218 2021-02-28 Mike Frysinger <vapier@gentoo.org>
220 * configure: Regenerate.
222 2021-02-27 Mike Frysinger <vapier@gentoo.org>
224 * Makefile.in (SIM_EXTRA_ALL): Delete.
227 2021-02-21 Mike Frysinger <vapier@gentoo.org>
229 * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
230 * aclocal.m4, configure: Regenerate.
232 2021-02-13 Mike Frysinger <vapier@gentoo.org>
234 * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
235 * aclocal.m4, configure: Regenerate.
237 2021-02-06 Mike Frysinger <vapier@gentoo.org>
239 * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
241 2021-02-06 Mike Frysinger <vapier@gentoo.org>
243 * configure: Regenerate.
245 2021-01-30 Mike Frysinger <vapier@gentoo.org>
247 * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
249 2021-01-11 Mike Frysinger <vapier@gentoo.org>
251 * config.in, configure: Regenerate.
252 * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
253 and strings.h include.
255 2021-01-09 Mike Frysinger <vapier@gentoo.org>
257 * configure: Regenerate.
259 2021-01-09 Mike Frysinger <vapier@gentoo.org>
261 * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
262 * configure: Regenerate.
264 2021-01-08 Mike Frysinger <vapier@gentoo.org>
266 * configure: Regenerate.
268 2021-01-04 Mike Frysinger <vapier@gentoo.org>
270 * configure: Regenerate.
272 2020-12-31 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
274 * sim-main.c: Include <stdlib.h>.
276 2020-12-14 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
278 * cp1.c: Include <stdlib.h>.
280 2020-07-29 Simon Marchi <simon.marchi@efficios.com>
282 * configure: Re-generate.
284 2017-09-06 John Baldwin <jhb@FreeBSD.org>
286 * configure: Regenerate.
288 2016-11-11 Mike Frysinger <vapier@gentoo.org>
291 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
294 2016-11-11 Mike Frysinger <vapier@gentoo.org>
297 * mips.igen (check_u64): Enable for `r3900'.
299 2016-02-05 Mike Frysinger <vapier@gentoo.org>
301 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
303 * configure: Regenerate.
305 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
306 Maciej W. Rozycki <macro@imgtec.com>
309 * micromips.igen (delayslot_micromips): Enable for `micromips32',
310 `micromips64' and `micromipsdsp' only.
311 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
312 (do_micromips_jalr, do_micromips_jal): Likewise.
313 (compute_movep_src_reg): Likewise.
314 (compute_andi16_imm): Likewise.
315 (convert_fmt_micromips): Likewise.
316 (convert_fmt_micromips_cvt_d): Likewise.
317 (convert_fmt_micromips_cvt_s): Likewise.
318 (FMT_MICROMIPS): Likewise.
319 (FMT_MICROMIPS_CVT_D): Likewise.
320 (FMT_MICROMIPS_CVT_S): Likewise.
322 2016-01-12 Mike Frysinger <vapier@gentoo.org>
324 * interp.c: Include elf-bfd.h.
325 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
328 2016-01-10 Mike Frysinger <vapier@gentoo.org>
330 * config.in, configure: Regenerate.
332 2016-01-10 Mike Frysinger <vapier@gentoo.org>
334 * configure: Regenerate.
336 2016-01-10 Mike Frysinger <vapier@gentoo.org>
338 * configure: Regenerate.
340 2016-01-10 Mike Frysinger <vapier@gentoo.org>
342 * configure: Regenerate.
344 2016-01-10 Mike Frysinger <vapier@gentoo.org>
346 * configure: Regenerate.
348 2016-01-10 Mike Frysinger <vapier@gentoo.org>
350 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
351 * configure: Regenerate.
353 2016-01-10 Mike Frysinger <vapier@gentoo.org>
355 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
356 * configure: Regenerate.
358 2016-01-10 Mike Frysinger <vapier@gentoo.org>
360 * configure: Regenerate.
362 2016-01-10 Mike Frysinger <vapier@gentoo.org>
364 * configure: Regenerate.
366 2016-01-09 Mike Frysinger <vapier@gentoo.org>
368 * config.in, configure: Regenerate.
370 2016-01-06 Mike Frysinger <vapier@gentoo.org>
372 * interp.c (sim_open): Mark argv const.
373 (sim_create_inferior): Mark argv and env const.
375 2016-01-04 Mike Frysinger <vapier@gentoo.org>
377 * configure: Regenerate.
379 2016-01-03 Mike Frysinger <vapier@gentoo.org>
381 * interp.c (sim_open): Update sim_parse_args comment.
383 2016-01-03 Mike Frysinger <vapier@gentoo.org>
385 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
386 * configure: Regenerate.
388 2016-01-02 Mike Frysinger <vapier@gentoo.org>
390 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
391 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
392 * configure: Regenerate.
393 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
395 2016-01-02 Mike Frysinger <vapier@gentoo.org>
397 * dv-tx3904cpu.c (CPU, SD): Delete.
399 2015-12-30 Mike Frysinger <vapier@gentoo.org>
401 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
402 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
403 (sim_store_register): Rename to ...
404 (mips_reg_store): ... this. Delete local cpu var.
405 Update sim_io_eprintf calls.
406 (sim_fetch_register): Rename to ...
407 (mips_reg_fetch): ... this. Delete local cpu var.
408 Update sim_io_eprintf calls.
410 2015-12-27 Mike Frysinger <vapier@gentoo.org>
412 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
414 2015-12-26 Mike Frysinger <vapier@gentoo.org>
416 * config.in, configure: Regenerate.
418 2015-12-26 Mike Frysinger <vapier@gentoo.org>
420 * interp.c (sim_write, sim_read): Delete.
421 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
422 (load_word): Likewise.
423 * micromips.igen (cache): Likewise.
424 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
425 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
426 do_store_left, do_store_right, do_load_double, do_store_double):
428 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
429 (do_prefx): Likewise.
430 * sim-main.c (address_translation, prefetch): Delete.
431 (ifetch32, ifetch16): Delete call to AddressTranslation and set
433 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
434 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
435 (LoadMemory, StoreMemory): Delete CCA arg.
437 2015-12-24 Mike Frysinger <vapier@gentoo.org>
439 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
440 * configure: Regenerated.
442 2015-12-24 Mike Frysinger <vapier@gentoo.org>
444 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
447 2015-12-24 Mike Frysinger <vapier@gentoo.org>
449 * tconfig.h (SIM_HANDLES_LMA): Delete.
451 2015-12-24 Mike Frysinger <vapier@gentoo.org>
453 * sim-main.h (WITH_WATCHPOINTS): Delete.
455 2015-12-24 Mike Frysinger <vapier@gentoo.org>
457 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
459 2015-12-24 Mike Frysinger <vapier@gentoo.org>
461 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
463 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
465 * micromips.igen (process_isa_mode): Fix left shift of negative
468 2015-11-17 Mike Frysinger <vapier@gentoo.org>
470 * sim-main.h (WITH_MODULO_MEMORY): Delete.
472 2015-11-15 Mike Frysinger <vapier@gentoo.org>
474 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
476 2015-11-14 Mike Frysinger <vapier@gentoo.org>
478 * interp.c (sim_close): Rename to ...
479 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
481 * sim-main.h (mips_sim_close): Declare.
482 (SIM_CLOSE_HOOK): Define.
484 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
485 Ali Lown <ali.lown@imgtec.com>
487 * Makefile.in (tmp-micromips): New rule.
488 (tmp-mach-multi): Add support for micromips.
489 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
490 that works for both mips64 and micromips64.
491 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
493 Add build support for micromips.
494 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
495 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
496 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
497 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
498 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
499 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
500 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
501 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
502 Refactored instruction code to use these functions.
503 * dsp2.igen: Refactored instruction code to use the new functions.
504 * interp.c (decode_coproc): Refactored to work with any instruction
506 (isa_mode): New variable
507 (RSVD_INSTRUCTION): Changed to 0x00000039.
508 * m16.igen (BREAK16): Refactored instruction to use do_break16.
509 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
510 * micromips.dc: New file.
511 * micromips.igen: New file.
512 * micromips16.dc: New file.
513 * micromipsdsp.igen: New file.
514 * micromipsrun.c: New file.
515 * mips.igen (do_swc1): Changed to work with any instruction encoding.
516 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
517 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
518 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
519 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
520 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
521 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
522 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
523 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
524 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
525 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
526 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
527 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
528 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
529 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
530 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
531 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
532 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
533 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
535 Refactored instruction code to use these functions.
536 (RSVD): Changed to use new reserved instruction.
537 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
538 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
539 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
540 do_store_double): Added micromips32 and micromips64 models.
541 Added include for micromips.igen and micromipsdsp.igen
542 Add micromips32 and micromips64 models.
543 (DecodeCoproc): Updated to use new macro definition.
544 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
545 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
546 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
547 Refactored instruction code to use these functions.
548 * sim-main.h (CP0_operation): New enum.
549 (DecodeCoproc): Updated macro.
550 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
551 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
552 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
553 ISA_MODE_MICROMIPS): New defines.
554 (sim_state): Add isa_mode field.
556 2015-06-23 Mike Frysinger <vapier@gentoo.org>
558 * configure: Regenerate.
560 2015-06-12 Mike Frysinger <vapier@gentoo.org>
562 * configure.ac: Change configure.in to configure.ac.
563 * configure: Regenerate.
565 2015-06-12 Mike Frysinger <vapier@gentoo.org>
567 * configure: Regenerate.
569 2015-06-12 Mike Frysinger <vapier@gentoo.org>
571 * interp.c [TRACE]: Delete.
572 (TRACE): Change to WITH_TRACE_ANY_P.
573 [!WITH_TRACE_ANY_P] (open_trace): Define.
574 (mips_option_handler, open_trace, sim_close, dotrace):
575 Change defined(TRACE) to WITH_TRACE_ANY_P.
576 (sim_open): Delete TRACE ifdef check.
577 * sim-main.c (load_memory): Delete TRACE ifdef check.
578 (store_memory): Likewise.
579 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
580 [!WITH_TRACE_ANY_P] (dotrace): Define.
582 2015-04-18 Mike Frysinger <vapier@gentoo.org>
584 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
587 2015-04-18 Mike Frysinger <vapier@gentoo.org>
589 * sim-main.h (SIM_CPU): Delete.
591 2015-04-18 Mike Frysinger <vapier@gentoo.org>
593 * sim-main.h (sim_cia): Delete.
595 2015-04-17 Mike Frysinger <vapier@gentoo.org>
597 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
599 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
600 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
601 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
602 CIA_SET to CPU_PC_SET.
603 * sim-main.h (CIA_GET, CIA_SET): Delete.
605 2015-04-15 Mike Frysinger <vapier@gentoo.org>
607 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
608 * sim-main.h (STATE_CPU): Delete.
610 2015-04-13 Mike Frysinger <vapier@gentoo.org>
612 * configure: Regenerate.
614 2015-04-13 Mike Frysinger <vapier@gentoo.org>
616 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
617 * interp.c (mips_pc_get, mips_pc_set): New functions.
618 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
619 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
620 (sim_pc_get): Delete.
621 * sim-main.h (SIM_CPU): Define.
622 (struct sim_state): Change cpu to an array of pointers.
625 2015-04-13 Mike Frysinger <vapier@gentoo.org>
627 * interp.c (mips_option_handler, open_trace, sim_close,
628 sim_write, sim_read, sim_store_register, sim_fetch_register,
629 sim_create_inferior, pr_addr, pr_uword64): Convert old style
631 (sim_open): Convert old style prototype. Change casts with
632 sim_write to unsigned char *.
633 (fetch_str): Change null to unsigned char, and change cast to
635 (sim_monitor): Change c & ch to unsigned char. Change cast to
638 2015-04-12 Mike Frysinger <vapier@gentoo.org>
640 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
642 2015-04-06 Mike Frysinger <vapier@gentoo.org>
644 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
646 2015-04-01 Mike Frysinger <vapier@gentoo.org>
648 * tconfig.h (SIM_HAVE_PROFILE): Delete.
650 2015-03-31 Mike Frysinger <vapier@gentoo.org>
652 * config.in, configure: Regenerate.
654 2015-03-24 Mike Frysinger <vapier@gentoo.org>
656 * interp.c (sim_pc_get): New function.
658 2015-03-24 Mike Frysinger <vapier@gentoo.org>
660 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
661 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
663 2015-03-24 Mike Frysinger <vapier@gentoo.org>
665 * configure: Regenerate.
667 2015-03-23 Mike Frysinger <vapier@gentoo.org>
669 * configure: Regenerate.
671 2015-03-23 Mike Frysinger <vapier@gentoo.org>
673 * configure: Regenerate.
674 * configure.ac (mips_extra_objs): Delete.
675 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
676 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
678 2015-03-23 Mike Frysinger <vapier@gentoo.org>
680 * configure: Regenerate.
681 * configure.ac: Delete sim_hw checks for dv-sockser.
683 2015-03-16 Mike Frysinger <vapier@gentoo.org>
685 * config.in, configure: Regenerate.
686 * tconfig.in: Rename file ...
687 * tconfig.h: ... here.
689 2015-03-15 Mike Frysinger <vapier@gentoo.org>
691 * tconfig.in: Delete includes.
692 [HAVE_DV_SOCKSER]: Delete.
694 2015-03-14 Mike Frysinger <vapier@gentoo.org>
696 * Makefile.in (SIM_RUN_OBJS): Delete.
698 2015-03-14 Mike Frysinger <vapier@gentoo.org>
700 * configure.ac (AC_CHECK_HEADERS): Delete.
701 * aclocal.m4, configure: Regenerate.
703 2014-08-19 Alan Modra <amodra@gmail.com>
705 * configure: Regenerate.
707 2014-08-15 Roland McGrath <mcgrathr@google.com>
709 * configure: Regenerate.
710 * config.in: Regenerate.
712 2014-03-04 Mike Frysinger <vapier@gentoo.org>
714 * configure: Regenerate.
716 2013-09-23 Alan Modra <amodra@gmail.com>
718 * configure: Regenerate.
720 2013-06-03 Mike Frysinger <vapier@gentoo.org>
722 * aclocal.m4, configure: Regenerate.
724 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
726 * configure: Rebuild.
728 2013-03-26 Mike Frysinger <vapier@gentoo.org>
730 * configure: Regenerate.
732 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
734 * configure.ac: Address use of dv-sockser.o.
735 * tconfig.in: Conditionalize use of dv_sockser_install.
736 * configure: Regenerated.
737 * config.in: Regenerated.
739 2012-10-04 Chao-ying Fu <fu@mips.com>
740 Steve Ellcey <sellcey@mips.com>
742 * mips/mips3264r2.igen (rdhwr): New.
744 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
746 * configure.ac: Always link against dv-sockser.o.
747 * configure: Regenerate.
749 2012-06-15 Joel Brobecker <brobecker@adacore.com>
751 * config.in, configure: Regenerate.
753 2012-05-18 Nick Clifton <nickc@redhat.com>
756 * interp.c: Include config.h before system header files.
758 2012-03-24 Mike Frysinger <vapier@gentoo.org>
760 * aclocal.m4, config.in, configure: Regenerate.
762 2011-12-03 Mike Frysinger <vapier@gentoo.org>
764 * aclocal.m4: New file.
765 * configure: Regenerate.
767 2011-10-19 Mike Frysinger <vapier@gentoo.org>
769 * configure: Regenerate after common/acinclude.m4 update.
771 2011-10-17 Mike Frysinger <vapier@gentoo.org>
773 * configure.ac: Change include to common/acinclude.m4.
775 2011-10-17 Mike Frysinger <vapier@gentoo.org>
777 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
778 call. Replace common.m4 include with SIM_AC_COMMON.
779 * configure: Regenerate.
781 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
783 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
785 (tmp-mach-multi): Exit early when igen fails.
787 2011-07-05 Mike Frysinger <vapier@gentoo.org>
789 * interp.c (sim_do_command): Delete.
791 2011-02-14 Mike Frysinger <vapier@gentoo.org>
793 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
794 (tx3904sio_fifo_reset): Likewise.
795 * interp.c (sim_monitor): Likewise.
797 2010-04-14 Mike Frysinger <vapier@gentoo.org>
799 * interp.c (sim_write): Add const to buffer arg.
801 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
803 * interp.c: Don't include sysdep.h
805 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
807 * configure: Regenerate.
809 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
811 * config.in: Regenerate.
812 * configure: Likewise.
814 * configure: Regenerate.
816 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
818 * configure: Regenerate to track ../common/common.m4 changes.
821 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
822 Daniel Jacobowitz <dan@codesourcery.com>
823 Joseph Myers <joseph@codesourcery.com>
825 * configure: Regenerate.
827 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
829 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
830 that unconditionally allows fmt_ps.
831 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
832 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
833 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
834 filter from 64,f to 32,f.
835 (PREFX): Change filter from 64 to 32.
836 (LDXC1, LUXC1): Provide separate mips32r2 implementations
837 that use do_load_double instead of do_load. Make both LUXC1
838 versions unpredictable if SizeFGR () != 64.
839 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
840 instead of do_store. Remove unused variable. Make both SUXC1
841 versions unpredictable if SizeFGR () != 64.
843 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
845 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
846 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
847 shifts for that case.
849 2007-09-04 Nick Clifton <nickc@redhat.com>
851 * interp.c (options enum): Add OPTION_INFO_MEMORY.
852 (display_mem_info): New static variable.
853 (mips_option_handler): Handle OPTION_INFO_MEMORY.
854 (mips_options): Add info-memory and memory-info.
855 (sim_open): After processing the command line and board
856 specification, check display_mem_info. If it is set then
857 call the real handler for the --memory-info command line
860 2007-08-24 Joel Brobecker <brobecker@adacore.com>
862 * configure.ac: Change license of multi-run.c to GPL version 3.
863 * configure: Regenerate.
865 2007-06-28 Richard Sandiford <richard@codesourcery.com>
867 * configure.ac, configure: Revert last patch.
869 2007-06-26 Richard Sandiford <richard@codesourcery.com>
871 * configure.ac (sim_mipsisa3264_configs): New variable.
872 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
873 every configuration support all four targets, using the triplet to
874 determine the default.
875 * configure: Regenerate.
877 2007-06-25 Richard Sandiford <richard@codesourcery.com>
879 * Makefile.in (m16run.o): New rule.
881 2007-05-15 Thiemo Seufer <ths@mips.com>
883 * mips3264r2.igen (DSHD): Fix compile warning.
885 2007-05-14 Thiemo Seufer <ths@mips.com>
887 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
888 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
889 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
890 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
893 2007-03-01 Thiemo Seufer <ths@mips.com>
895 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
898 2007-02-20 Thiemo Seufer <ths@mips.com>
900 * dsp.igen: Update copyright notice.
901 * dsp2.igen: Fix copyright notice.
903 2007-02-20 Thiemo Seufer <ths@mips.com>
904 Chao-Ying Fu <fu@mips.com>
906 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
907 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
908 Add dsp2 to sim_igen_machine.
909 * configure: Regenerate.
910 * dsp.igen (do_ph_op): Add MUL support when op = 2.
911 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
912 (mulq_rs.ph): Use do_ph_mulq.
913 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
914 * mips.igen: Add dsp2 model and include dsp2.igen.
915 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
916 for *mips32r2, *mips64r2, *dsp.
917 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
918 for *mips32r2, *mips64r2, *dsp2.
919 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
921 2007-02-19 Thiemo Seufer <ths@mips.com>
922 Nigel Stephens <nigel@mips.com>
924 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
925 jumps with hazard barrier.
927 2007-02-19 Thiemo Seufer <ths@mips.com>
928 Nigel Stephens <nigel@mips.com>
930 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
931 after each call to sim_io_write.
933 2007-02-19 Thiemo Seufer <ths@mips.com>
934 Nigel Stephens <nigel@mips.com>
936 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
937 supported by this simulator.
938 (decode_coproc): Recognise additional CP0 Config registers
941 2007-02-19 Thiemo Seufer <ths@mips.com>
942 Nigel Stephens <nigel@mips.com>
943 David Ung <davidu@mips.com>
945 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
946 uninterpreted formats. If fmt is one of the uninterpreted types
947 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
948 fmt_word, and fmt_uninterpreted_64 like fmt_long.
949 (store_fpr): When writing an invalid odd register, set the
950 matching even register to fmt_unknown, not the following register.
951 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
952 the the memory window at offset 0 set by --memory-size command
954 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
956 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
958 (sim_monitor): When returning the memory size to the MIPS
959 application, use the value in STATE_MEM_SIZE, not an arbitrary
961 (cop_lw): Don' mess around with FPR_STATE, just pass
962 fmt_uninterpreted_32 to StoreFPR.
964 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
966 * mips.igen (not_word_value): Single version for mips32, mips64
969 2007-02-19 Thiemo Seufer <ths@mips.com>
970 Nigel Stephens <nigel@mips.com>
972 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
975 2007-02-17 Thiemo Seufer <ths@mips.com>
977 * configure.ac (mips*-sde-elf*): Move in front of generic machine
979 * configure: Regenerate.
981 2007-02-17 Thiemo Seufer <ths@mips.com>
983 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
984 Add mdmx to sim_igen_machine.
985 (mipsisa64*-*-*): Likewise. Remove dsp.
986 (mipsisa32*-*-*): Remove dsp.
987 * configure: Regenerate.
989 2007-02-13 Thiemo Seufer <ths@mips.com>
991 * configure.ac: Add mips*-sde-elf* target.
992 * configure: Regenerate.
994 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
996 * acconfig.h: Remove.
997 * config.in, configure: Regenerate.
999 2006-11-07 Thiemo Seufer <ths@mips.com>
1001 * dsp.igen (do_w_op): Fix compiler warning.
1003 2006-08-29 Thiemo Seufer <ths@mips.com>
1004 David Ung <davidu@mips.com>
1006 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
1008 * configure: Regenerate.
1009 * mips.igen (model): Add smartmips.
1010 (MADDU): Increment ACX if carry.
1011 (do_mult): Clear ACX.
1012 (ROR,RORV): Add smartmips.
1013 (include): Include smartmips.igen.
1014 * sim-main.h (ACX): Set to REGISTERS[89].
1015 * smartmips.igen: New file.
1017 2006-08-29 Thiemo Seufer <ths@mips.com>
1018 David Ung <davidu@mips.com>
1020 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
1021 mips3264r2.igen. Add missing dependency rules.
1022 * m16e.igen: Support for mips16e save/restore instructions.
1024 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
1026 * configure: Regenerated.
1028 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1030 * configure: Regenerated.
1032 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1034 * configure: Regenerated.
1036 2006-05-15 Chao-ying Fu <fu@mips.com>
1038 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
1040 2006-04-18 Nick Clifton <nickc@redhat.com>
1042 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
1045 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
1047 * configure: Regenerate.
1049 2005-12-14 Chao-ying Fu <fu@mips.com>
1051 * Makefile.in (SIM_OBJS): Add dsp.o.
1052 (dsp.o): New dependency.
1053 (IGEN_INCLUDE): Add dsp.igen.
1054 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
1055 mipsisa64*-*-*): Add dsp to sim_igen_machine.
1056 * configure: Regenerate.
1057 * mips.igen: Add dsp model and include dsp.igen.
1058 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
1059 because these instructions are extended in DSP ASE.
1060 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
1061 adding 6 DSP accumulator registers and 1 DSP control register.
1062 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
1063 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
1064 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
1065 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
1066 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
1067 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
1068 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
1069 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
1070 DSPCR_CCOND_SMASK): New define.
1071 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
1072 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
1074 2005-07-08 Ian Lance Taylor <ian@airs.com>
1076 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
1078 2005-06-16 David Ung <davidu@mips.com>
1079 Nigel Stephens <nigel@mips.com>
1081 * mips.igen: New mips16e model and include m16e.igen.
1082 (check_u64): Add mips16e tag.
1083 * m16e.igen: New file for MIPS16e instructions.
1084 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
1085 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
1087 * configure: Regenerate.
1089 2005-05-26 David Ung <davidu@mips.com>
1091 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
1092 tags to all instructions which are applicable to the new ISAs.
1093 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1095 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1097 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1099 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1100 * configure: Regenerate.
1102 2005-03-23 Mark Kettenis <kettenis@gnu.org>
1104 * configure: Regenerate.
1106 2005-01-14 Andrew Cagney <cagney@gnu.org>
1108 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
1109 explicit call to AC_CONFIG_HEADER.
1110 * configure: Regenerate.
1112 2005-01-12 Andrew Cagney <cagney@gnu.org>
1114 * configure.ac: Update to use ../common/common.m4.
1115 * configure: Re-generate.
1117 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
1119 * configure: Regenerated to track ../common/aclocal.m4 changes.
1121 2005-01-07 Andrew Cagney <cagney@gnu.org>
1123 * configure.ac: Rename configure.in, require autoconf 2.59.
1124 * configure: Re-generate.
1126 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
1128 * configure: Regenerate for ../common/aclocal.m4 update.
1130 2004-09-24 Monika Chaddha <monika@acmet.com>
1132 Committed by Andrew Cagney.
1133 * m16.igen (CMP, CMPI): Fix assembler.
1135 2004-08-18 Chris Demetriou <cgd@broadcom.com>
1137 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1138 * configure: Regenerate.
1140 2004-06-25 Chris Demetriou <cgd@broadcom.com>
1142 * configure.in (sim_m16_machine): Include mipsIII.
1143 * configure: Regenerate.
1145 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
1147 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1149 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1151 2004-04-10 Chris Demetriou <cgd@broadcom.com>
1153 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1155 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1157 * mips.igen (check_fmt): Remove.
1158 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1159 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1160 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1161 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1162 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1163 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1164 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1165 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1166 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1167 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1169 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1171 * sb1.igen (check_sbx): New function.
1172 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1174 2004-03-29 Chris Demetriou <cgd@broadcom.com>
1175 Richard Sandiford <rsandifo@redhat.com>
1177 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1178 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1179 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1180 separate implementations for mipsIV and mipsV. Use new macros to
1181 determine whether the restrictions apply.
1183 2004-01-19 Chris Demetriou <cgd@broadcom.com>
1185 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1186 (check_mult_hilo): Improve comments.
1187 (check_div_hilo): Likewise. Also, fork off a new version
1188 to handle mips32/mips64 (since there are no hazards to check
1191 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
1193 * mips.igen (do_dmultx): Fix check for negative operands.
1195 2003-05-16 Ian Lance Taylor <ian@airs.com>
1197 * Makefile.in (SHELL): Make sure this is defined.
1198 (various): Use $(SHELL) whenever we invoke move-if-change.
1200 2003-05-03 Chris Demetriou <cgd@broadcom.com>
1202 * cp1.c: Tweak attribution slightly.
1205 * mdmx.igen: Likewise.
1206 * mips3d.igen: Likewise.
1207 * sb1.igen: Likewise.
1209 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
1211 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1214 2003-02-27 Andrew Cagney <cagney@redhat.com>
1216 * interp.c (sim_open): Rename _bfd to bfd.
1217 (sim_create_inferior): Ditto.
1219 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1221 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1223 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1225 * mips.igen (EI, DI): Remove.
1227 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
1229 * Makefile.in (tmp-run-multi): Fix mips16 filter.
1231 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
1232 Andrew Cagney <ac131313@redhat.com>
1233 Gavin Romig-Koch <gavin@redhat.com>
1234 Graydon Hoare <graydon@redhat.com>
1235 Aldy Hernandez <aldyh@redhat.com>
1236 Dave Brolley <brolley@redhat.com>
1237 Chris Demetriou <cgd@broadcom.com>
1239 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1240 (sim_mach_default): New variable.
1241 (mips64vr-*-*, mips64vrel-*-*): New configurations.
1242 Add a new simulator generator, MULTI.
1243 * configure: Regenerate.
1244 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1245 (multi-run.o): New dependency.
1246 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1247 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1248 (tmp-multi): Combine them.
1249 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
1250 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1251 (distclean-extra): New rule.
1252 * sim-main.h: Include bfd.h.
1253 (MIPS_MACH): New macro.
1254 * mips.igen (vr4120, vr5400, vr5500): New models.
1255 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1256 * vr.igen: Replace with new version.
1258 2003-01-04 Chris Demetriou <cgd@broadcom.com>
1260 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1261 * configure: Regenerate.
1263 2002-12-31 Chris Demetriou <cgd@broadcom.com>
1265 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1266 * mips.igen: Remove all invocations of check_branch_bug and
1269 2002-12-16 Chris Demetriou <cgd@broadcom.com>
1271 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1273 2002-07-30 Chris Demetriou <cgd@broadcom.com>
1275 * mips.igen (do_load_double, do_store_double): New functions.
1276 (LDC1, SDC1): Rename to...
1277 (LDC1b, SDC1b): respectively.
1278 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1280 2002-07-29 Michael Snyder <msnyder@redhat.com>
1282 * cp1.c (fp_recip2): Modify initialization expression so that
1283 GCC will recognize it as constant.
1285 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1287 * mdmx.c (SD_): Delete.
1288 (Unpredictable): Re-define, for now, to directly invoke
1289 unpredictable_action().
1290 (mdmx_acc_op): Fix error in .ob immediate handling.
1292 2002-06-18 Andrew Cagney <cagney@redhat.com>
1294 * interp.c (sim_firmware_command): Initialize `address'.
1296 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1298 * configure: Regenerated to track ../common/aclocal.m4 changes.
1300 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1301 Ed Satterthwaite <ehs@broadcom.com>
1303 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1304 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1305 * mips.igen: Include mips3d.igen.
1306 (mips3d): New model name for MIPS-3D ASE instructions.
1307 (CVT.W.fmt): Don't use this instruction for word (source) format
1309 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1310 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1311 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1312 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1313 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1314 (RSquareRoot1, RSquareRoot2): New macros.
1315 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1316 (fp_rsqrt2): New functions.
1317 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1318 * configure: Regenerate.
1320 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1321 Ed Satterthwaite <ehs@broadcom.com>
1323 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1324 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1325 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1326 (convert): Note that this function is not used for paired-single
1328 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1329 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1330 (check_fmt_p): Enable paired-single support.
1331 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1332 (PUU.PS): New instructions.
1333 (CVT.S.fmt): Don't use this instruction for paired-single format
1335 * sim-main.h (FP_formats): New value 'fmt_ps.'
1336 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1337 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1339 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1341 * mips.igen: Fix formatting of function calls in
1344 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1346 * mips.igen (MOVN, MOVZ): Trace result.
1347 (TNEI): Print "tnei" as the opcode name in traces.
1348 (CEIL.W): Add disassembly string for traces.
1349 (RSQRT.fmt): Make location of disassembly string consistent
1350 with other instructions.
1352 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1354 * mips.igen (X): Delete unused function.
1356 2002-06-08 Andrew Cagney <cagney@redhat.com>
1358 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1360 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1361 Ed Satterthwaite <ehs@broadcom.com>
1363 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1364 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1365 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1366 (fp_nmsub): New prototypes.
1367 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1368 (NegMultiplySub): New defines.
1369 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1370 (MADD.D, MADD.S): Replace with...
1371 (MADD.fmt): New instruction.
1372 (MSUB.D, MSUB.S): Replace with...
1373 (MSUB.fmt): New instruction.
1374 (NMADD.D, NMADD.S): Replace with...
1375 (NMADD.fmt): New instruction.
1376 (NMSUB.D, MSUB.S): Replace with...
1377 (NMSUB.fmt): New instruction.
1379 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1380 Ed Satterthwaite <ehs@broadcom.com>
1382 * cp1.c: Fix more comment spelling and formatting.
1383 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1384 (denorm_mode): New function.
1385 (fpu_unary, fpu_binary): Round results after operation, collect
1386 status from rounding operations, and update the FCSR.
1387 (convert): Collect status from integer conversions and rounding
1388 operations, and update the FCSR. Adjust NaN values that result
1389 from conversions. Convert to use sim_io_eprintf rather than
1390 fprintf, and remove some debugging code.
1391 * cp1.h (fenr_FS): New define.
1393 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1395 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1396 rounding mode to sim FP rounding mode flag conversion code into...
1397 (rounding_mode): New function.
1399 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1401 * cp1.c: Clean up formatting of a few comments.
1402 (value_fpr): Reformat switch statement.
1404 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1405 Ed Satterthwaite <ehs@broadcom.com>
1408 * sim-main.h: Include cp1.h.
1409 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1410 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1411 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1412 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1413 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1414 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1415 * cp1.c: Don't include sim-fpu.h; already included by
1416 sim-main.h. Clean up formatting of some comments.
1417 (NaN, Equal, Less): Remove.
1418 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1419 (fp_cmp): New functions.
1420 * mips.igen (do_c_cond_fmt): Remove.
1421 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1422 Compare. Add result tracing.
1423 (CxC1): Remove, replace with...
1424 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1425 (DMxC1): Remove, replace with...
1426 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1427 (MxC1): Remove, replace with...
1428 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1430 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1432 * sim-main.h (FGRIDX): Remove, replace all uses with...
1433 (FGR_BASE): New macro.
1434 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1435 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1436 (NR_FGR, FGR): Likewise.
1437 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1438 * mips.igen: Likewise.
1440 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1442 * cp1.c: Add an FSF Copyright notice to this file.
1444 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1445 Ed Satterthwaite <ehs@broadcom.com>
1447 * cp1.c (Infinity): Remove.
1448 * sim-main.h (Infinity): Likewise.
1450 * cp1.c (fp_unary, fp_binary): New functions.
1451 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1452 (fp_sqrt): New functions, implemented in terms of the above.
1453 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1454 (Recip, SquareRoot): Remove (replaced by functions above).
1455 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1456 (fp_recip, fp_sqrt): New prototypes.
1457 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1458 (Recip, SquareRoot): Replace prototypes with #defines which
1459 invoke the functions above.
1461 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1463 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1464 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1465 file, remove PARAMS from prototypes.
1466 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1467 simulator state arguments.
1468 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1469 pass simulator state arguments.
1470 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1471 (store_fpr, convert): Remove 'sd' argument.
1472 (value_fpr): Likewise. Convert to use 'SD' instead.
1474 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1476 * cp1.c (Min, Max): Remove #if 0'd functions.
1477 * sim-main.h (Min, Max): Remove.
1479 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1481 * cp1.c: fix formatting of switch case and default labels.
1482 * interp.c: Likewise.
1483 * sim-main.c: Likewise.
1485 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1487 * cp1.c: Clean up comments which describe FP formats.
1488 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1490 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1491 Ed Satterthwaite <ehs@broadcom.com>
1493 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1494 Broadcom SiByte SB-1 processor configurations.
1495 * configure: Regenerate.
1496 * sb1.igen: New file.
1497 * mips.igen: Include sb1.igen.
1499 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1500 * mdmx.igen: Add "sb1" model to all appropriate functions and
1502 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1503 (ob_func, ob_acc): Reference the above.
1504 (qh_acc): Adjust to keep the same size as ob_acc.
1505 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1506 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1508 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1510 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1512 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1513 Ed Satterthwaite <ehs@broadcom.com>
1515 * mips.igen (mdmx): New (pseudo-)model.
1516 * mdmx.c, mdmx.igen: New files.
1517 * Makefile.in (SIM_OBJS): Add mdmx.o.
1518 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1520 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1521 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1522 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1523 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1524 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1525 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1526 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1527 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1528 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1529 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1530 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1531 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1532 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1533 (qh_fmtsel): New macros.
1534 (_sim_cpu): New member "acc".
1535 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1536 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1538 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1540 * interp.c: Use 'deprecated' rather than 'depreciated.'
1541 * sim-main.h: Likewise.
1543 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1545 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1546 which wouldn't compile anyway.
1547 * sim-main.h (unpredictable_action): New function prototype.
1548 (Unpredictable): Define to call igen function unpredictable().
1549 (NotWordValue): New macro to call igen function not_word_value().
1550 (UndefinedResult): Remove.
1551 * interp.c (undefined_result): Remove.
1552 (unpredictable_action): New function.
1553 * mips.igen (not_word_value, unpredictable): New functions.
1554 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1555 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1556 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1557 NotWordValue() to check for unpredictable inputs, then
1558 Unpredictable() to handle them.
1560 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1562 * mips.igen: Fix formatting of calls to Unpredictable().
1564 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1566 * interp.c (sim_open): Revert previous change.
1568 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1570 * interp.c (sim_open): Disable chunk of code that wrote code in
1571 vector table entries.
1573 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1575 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1576 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1579 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1581 * cp1.c: Fix many formatting issues.
1583 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1585 * cp1.c (fpu_format_name): New function to replace...
1586 (DOFMT): This. Delete, and update all callers.
1587 (fpu_rounding_mode_name): New function to replace...
1588 (RMMODE): This. Delete, and update all callers.
1590 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1592 * interp.c: Move FPU support routines from here to...
1593 * cp1.c: Here. New file.
1594 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1595 (cp1.o): New target.
1597 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1599 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1600 * mips.igen (mips32, mips64): New models, add to all instructions
1601 and functions as appropriate.
1602 (loadstore_ea, check_u64): New variant for model mips64.
1603 (check_fmt_p): New variant for models mipsV and mips64, remove
1604 mipsV model marking fro other variant.
1607 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1608 for mips32 and mips64.
1609 (DCLO, DCLZ): New instructions for mips64.
1611 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1613 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1614 immediate or code as a hex value with the "%#lx" format.
1615 (ANDI): Likewise, and fix printed instruction name.
1617 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1619 * sim-main.h (UndefinedResult, Unpredictable): New macros
1620 which currently do nothing.
1622 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1624 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1625 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1626 (status_CU3): New definitions.
1628 * sim-main.h (ExceptionCause): Add new values for MIPS32
1629 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1630 for DebugBreakPoint and NMIReset to note their status in
1632 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1633 (SignalExceptionCacheErr): New exception macros.
1635 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1637 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1638 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1640 (SignalExceptionCoProcessorUnusable): Take as argument the
1641 unusable coprocessor number.
1643 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1645 * mips.igen: Fix formatting of all SignalException calls.
1647 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1649 * sim-main.h (SIGNEXTEND): Remove.
1651 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1653 * mips.igen: Remove gencode comment from top of file, fix
1654 spelling in another comment.
1656 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1658 * mips.igen (check_fmt, check_fmt_p): New functions to check
1659 whether specific floating point formats are usable.
1660 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1661 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1662 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1663 Use the new functions.
1664 (do_c_cond_fmt): Remove format checks...
1665 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1667 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1669 * mips.igen: Fix formatting of check_fpu calls.
1671 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1673 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1675 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1677 * mips.igen: Remove whitespace at end of lines.
1679 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1681 * mips.igen (loadstore_ea): New function to do effective
1682 address calculations.
1683 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1684 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1685 CACHE): Use loadstore_ea to do effective address computations.
1687 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1689 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1690 * mips.igen (LL, CxC1, MxC1): Likewise.
1692 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1694 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1695 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1696 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1697 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1698 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1699 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1700 Don't split opcode fields by hand, use the opcode field values
1703 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1705 * mips.igen (do_divu): Fix spacing.
1707 * mips.igen (do_dsllv): Move to be right before DSLLV,
1708 to match the rest of the do_<shift> functions.
1710 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1712 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1713 DSRL32, do_dsrlv): Trace inputs and results.
1715 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1717 * mips.igen (CACHE): Provide instruction-printing string.
1719 * interp.c (signal_exception): Comment tokens after #endif.
1721 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1723 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1724 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1725 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1726 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1727 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1728 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1729 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1730 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1732 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1734 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1735 instruction-printing string.
1736 (LWU): Use '64' as the filter flag.
1738 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1740 * mips.igen (SDXC1): Fix instruction-printing string.
1742 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1744 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1745 filter flags "32,f".
1747 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1749 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1752 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1754 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1755 add a comma) so that it more closely match the MIPS ISA
1756 documentation opcode partitioning.
1757 (PREF): Put useful names on opcode fields, and include
1758 instruction-printing string.
1760 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1762 * mips.igen (check_u64): New function which in the future will
1763 check whether 64-bit instructions are usable and signal an
1764 exception if not. Currently a no-op.
1765 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1766 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1767 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1768 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1770 * mips.igen (check_fpu): New function which in the future will
1771 check whether FPU instructions are usable and signal an exception
1772 if not. Currently a no-op.
1773 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1774 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1775 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1776 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1777 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1778 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1779 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1780 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1782 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1784 * mips.igen (do_load_left, do_load_right): Move to be immediately
1786 (do_store_left, do_store_right): Move to be immediately following
1789 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1791 * mips.igen (mipsV): New model name. Also, add it to
1792 all instructions and functions where it is appropriate.
1794 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1796 * mips.igen: For all functions and instructions, list model
1797 names that support that instruction one per line.
1799 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1801 * mips.igen: Add some additional comments about supported
1802 models, and about which instructions go where.
1803 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1804 order as is used in the rest of the file.
1806 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1808 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1809 indicating that ALU32_END or ALU64_END are there to check
1811 (DADD): Likewise, but also remove previous comment about
1814 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1816 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1817 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1818 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1819 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1820 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1821 fields (i.e., add and move commas) so that they more closely
1822 match the MIPS ISA documentation opcode partitioning.
1824 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1826 * mips.igen (ADDI): Print immediate value.
1827 (BREAK): Print code.
1828 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1829 (SLL): Print "nop" specially, and don't run the code
1830 that does the shift for the "nop" case.
1832 2001-11-17 Fred Fish <fnf@redhat.com>
1834 * sim-main.h (float_operation): Move enum declaration outside
1835 of _sim_cpu struct declaration.
1837 2001-04-12 Jim Blandy <jimb@redhat.com>
1839 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1840 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1842 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1843 PENDING_FILL, and you can get the intended effect gracefully by
1844 calling PENDING_SCHED directly.
1846 2001-02-23 Ben Elliston <bje@redhat.com>
1848 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1849 already defined elsewhere.
1851 2001-02-19 Ben Elliston <bje@redhat.com>
1853 * sim-main.h (sim_monitor): Return an int.
1854 * interp.c (sim_monitor): Add return values.
1855 (signal_exception): Handle error conditions from sim_monitor.
1857 2001-02-08 Ben Elliston <bje@redhat.com>
1859 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1860 (store_memory): Likewise, pass cia to sim_core_write*.
1862 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1864 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1865 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1867 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1869 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1870 * Makefile.in: Don't delete *.igen when cleaning directory.
1872 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1874 * m16.igen (break): Call SignalException not sim_engine_halt.
1876 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1878 From Jason Eckhardt:
1879 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1881 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1883 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1885 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1887 * mips.igen (do_dmultx): Fix typo.
1889 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1891 * configure: Regenerated to track ../common/aclocal.m4 changes.
1893 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1895 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1897 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1899 * sim-main.h (GPR_CLEAR): Define macro.
1901 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1903 * interp.c (decode_coproc): Output long using %lx and not %s.
1905 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1907 * interp.c (sim_open): Sort & extend dummy memory regions for
1908 --board=jmr3904 for eCos.
1910 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1912 * configure: Regenerated.
1914 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1916 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1917 calls, conditional on the simulator being in verbose mode.
1919 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1921 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1922 cache don't get ReservedInstruction traps.
1924 1999-11-29 Mark Salter <msalter@cygnus.com>
1926 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1927 to clear status bits in sdisr register. This is how the hardware works.
1929 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1930 being used by cygmon.
1932 1999-11-11 Andrew Haley <aph@cygnus.com>
1934 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1937 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1939 * mips.igen (MULT): Correct previous mis-applied patch.
1941 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1943 * mips.igen (delayslot32): Handle sequence like
1944 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1945 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1946 (MULT): Actually pass the third register...
1948 1999-09-03 Mark Salter <msalter@cygnus.com>
1950 * interp.c (sim_open): Added more memory aliases for additional
1951 hardware being touched by cygmon on jmr3904 board.
1953 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1955 * configure: Regenerated to track ../common/aclocal.m4 changes.
1957 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1959 * interp.c (sim_store_register): Handle case where client - GDB -
1960 specifies that a 4 byte register is 8 bytes in size.
1961 (sim_fetch_register): Ditto.
1963 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1965 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1966 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1967 (idt_monitor_base): Base address for IDT monitor traps.
1968 (pmon_monitor_base): Ditto for PMON.
1969 (lsipmon_monitor_base): Ditto for LSI PMON.
1970 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1971 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1972 (sim_firmware_command): New function.
1973 (mips_option_handler): Call it for OPTION_FIRMWARE.
1974 (sim_open): Allocate memory for idt_monitor region. If "--board"
1975 option was given, add no monitor by default. Add BREAK hooks only if
1976 monitors are also there.
1978 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1980 * interp.c (sim_monitor): Flush output before reading input.
1982 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1984 * tconfig.in (SIM_HANDLES_LMA): Always define.
1986 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1988 From Mark Salter <msalter@cygnus.com>:
1989 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1990 (sim_open): Add setup for BSP board.
1992 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1994 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1995 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1996 them as unimplemented.
1998 1999-05-08 Felix Lee <flee@cygnus.com>
2000 * configure: Regenerated to track ../common/aclocal.m4 changes.
2002 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
2004 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
2006 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
2008 * configure.in: Any mips64vr5*-*-* target should have
2009 -DTARGET_ENABLE_FR=1.
2010 (default_endian): Any mips64vr*el-*-* target should default to
2012 * configure: Re-generate.
2014 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
2016 * mips.igen (ldl): Extend from _16_, not 32.
2018 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
2020 * interp.c (sim_store_register): Force registers written to by GDB
2021 into an un-interpreted state.
2023 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
2025 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
2026 CPU, start periodic background I/O polls.
2027 (tx3904sio_poll): New function: periodic I/O poller.
2029 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
2031 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
2033 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
2035 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
2038 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
2040 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
2041 (load_word): Call SIM_CORE_SIGNAL hook on error.
2042 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
2043 starting. For exception dispatching, pass PC instead of NULL_CIA.
2044 (decode_coproc): Use COP0_BADVADDR to store faulting address.
2045 * sim-main.h (COP0_BADVADDR): Define.
2046 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
2047 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
2048 (_sim_cpu): Add exc_* fields to store register value snapshots.
2049 * mips.igen (*): Replace memory-related SignalException* calls
2050 with references to SIM_CORE_SIGNAL hook.
2052 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
2054 * sim-main.c (*): Minor warning cleanups.
2056 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
2058 * m16.igen (DADDIU5): Correct type-o.
2060 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
2062 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
2065 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
2067 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
2069 (interp.o): Add dependency on itable.h
2070 (oengine.c, gencode): Delete remaining references.
2071 (BUILT_SRC_FROM_GEN): Clean up.
2073 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
2076 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
2077 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
2078 tmp-run-hack) : New.
2079 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
2080 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
2081 Drop the "64" qualifier to get the HACK generator working.
2082 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
2083 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
2084 qualifier to get the hack generator working.
2085 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
2086 (DSLL): Use do_dsll.
2087 (DSLLV): Use do_dsllv.
2088 (DSRA): Use do_dsra.
2089 (DSRL): Use do_dsrl.
2090 (DSRLV): Use do_dsrlv.
2091 (BC1): Move *vr4100 to get the HACK generator working.
2092 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2093 get the HACK generator working.
2094 (MACC) Rename to get the HACK generator working.
2095 (DMACC,MACCS,DMACCS): Add the 64.
2097 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
2099 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2100 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2102 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
2104 * mips/interp.c (DEBUG): Cleanups.
2106 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
2108 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2109 (tx3904sio_tickle): fflush after a stdout character output.
2111 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
2113 * interp.c (sim_close): Uninstall modules.
2115 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
2117 * sim-main.h, interp.c (sim_monitor): Change to global
2120 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2122 * configure.in (vr4100): Only include vr4100 instructions in
2124 * configure: Re-generate.
2125 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2127 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2129 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2130 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2133 * configure.in (sim_default_gen, sim_use_gen): Replace with
2135 (--enable-sim-igen): Delete config option. Always using IGEN.
2136 * configure: Re-generate.
2138 * Makefile.in (gencode): Kill, kill, kill.
2141 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2143 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2144 bit mips16 igen simulator.
2145 * configure: Re-generate.
2147 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2148 as part of vr4100 ISA.
2149 * vr.igen: Mark all instructions as 64 bit only.
2151 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2153 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2156 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
2158 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2159 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
2160 * configure: Re-generate.
2162 * m16.igen (BREAK): Define breakpoint instruction.
2163 (JALX32): Mark instruction as mips16 and not r3900.
2164 * mips.igen (C.cond.fmt): Fix typo in instruction format.
2166 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2168 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2170 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2171 insn as a debug breakpoint.
2173 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2175 (PENDING_SCHED): Clean up trace statement.
2176 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2177 (PENDING_FILL): Delay write by only one cycle.
2178 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2180 * sim-main.c (pending_tick): Clean up trace statements. Add trace
2182 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2184 (pending_tick): Move incrementing of index to FOR statement.
2185 (pending_tick): Only update PENDING_OUT after a write has occured.
2187 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2189 * configure: Re-generate.
2191 * interp.c (sim_engine_run OLD): Delete explicit call to
2192 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2194 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
2196 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2197 interrupt level number to match changed SignalExceptionInterrupt
2200 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
2202 * interp.c: #include "itable.h" if WITH_IGEN.
2203 (get_insn_name): New function.
2204 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2205 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2207 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
2209 * configure: Rebuilt to inhale new common/aclocal.m4.
2211 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
2213 * dv-tx3904sio.c: Include sim-assert.h.
2215 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
2217 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2218 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2219 Reorganize target-specific sim-hardware checks.
2220 * configure: rebuilt.
2221 * interp.c (sim_open): For tx39 target boards, set
2222 OPERATING_ENVIRONMENT, add tx3904sio devices.
2223 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2224 ROM executables. Install dv-sockser into sim-modules list.
2226 * dv-tx3904irc.c: Compiler warning clean-up.
2227 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
2228 frequent hw-trace messages.
2230 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2232 * vr.igen (MulAcc): Identify as a vr4100 specific function.
2234 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2236 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2238 * vr.igen: New file.
2239 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2240 * mips.igen: Define vr4100 model. Include vr.igen.
2241 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
2243 * mips.igen (check_mf_hilo): Correct check.
2245 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2247 * sim-main.h (interrupt_event): Add prototype.
2249 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2250 register_ptr, register_value.
2251 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2253 * sim-main.h (tracefh): Make extern.
2255 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
2257 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2258 Reduce unnecessarily high timer event frequency.
2259 * dv-tx3904cpu.c: Ditto for interrupt event.
2261 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
2263 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2265 (interrupt_event): Made non-static.
2267 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2268 interchange of configuration values for external vs. internal
2271 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
2273 * mips.igen (BREAK): Moved code to here for
2274 simulator-reserved break instructions.
2275 * gencode.c (build_instruction): Ditto.
2276 * interp.c (signal_exception): Code moved from here. Non-
2277 reserved instructions now use exception vector, rather
2279 * sim-main.h: Moved magic constants to here.
2281 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
2283 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2284 register upon non-zero interrupt event level, clear upon zero
2286 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2287 by passing zero event value.
2288 (*_io_{read,write}_buffer): Endianness fixes.
2289 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2290 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2292 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2293 serial I/O and timer module at base address 0xFFFF0000.
2295 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2297 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2300 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2302 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2304 * configure: Update.
2306 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2308 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2309 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2310 * configure.in: Include tx3904tmr in hw_device list.
2311 * configure: Rebuilt.
2312 * interp.c (sim_open): Instantiate three timer instances.
2313 Fix address typo of tx3904irc instance.
2315 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2317 * interp.c (signal_exception): SystemCall exception now uses
2318 the exception vector.
2320 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2322 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2325 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2327 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2329 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2331 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2333 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2334 sim-main.h. Declare a struct hw_descriptor instead of struct
2335 hw_device_descriptor.
2337 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2339 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2340 right bits and then re-align left hand bytes to correct byte
2341 lanes. Fix incorrect computation in do_store_left when loading
2342 bytes from second word.
2344 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2346 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2347 * interp.c (sim_open): Only create a device tree when HW is
2350 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2351 * interp.c (signal_exception): Ditto.
2353 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2355 * gencode.c: Mark BEGEZALL as LIKELY.
2357 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2359 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2360 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2362 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2364 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2365 modules. Recognize TX39 target with "mips*tx39" pattern.
2366 * configure: Rebuilt.
2367 * sim-main.h (*): Added many macros defining bits in
2368 TX39 control registers.
2369 (SignalInterrupt): Send actual PC instead of NULL.
2370 (SignalNMIReset): New exception type.
2371 * interp.c (board): New variable for future use to identify
2372 a particular board being simulated.
2373 (mips_option_handler,mips_options): Added "--board" option.
2374 (interrupt_event): Send actual PC.
2375 (sim_open): Make memory layout conditional on board setting.
2376 (signal_exception): Initial implementation of hardware interrupt
2377 handling. Accept another break instruction variant for simulator
2379 (decode_coproc): Implement RFE instruction for TX39.
2380 (mips.igen): Decode RFE instruction as such.
2381 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2382 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2383 bbegin to implement memory map.
2384 * dv-tx3904cpu.c: New file.
2385 * dv-tx3904irc.c: New file.
2387 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2389 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2391 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2393 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2394 with calls to check_div_hilo.
2396 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2398 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2399 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2400 Add special r3900 version of do_mult_hilo.
2401 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2402 with calls to check_mult_hilo.
2403 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2404 with calls to check_div_hilo.
2406 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2408 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2409 Document a replacement.
2411 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2413 * interp.c (sim_monitor): Make mon_printf work.
2415 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2417 * sim-main.h (INSN_NAME): New arg `cpu'.
2419 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2421 * configure: Regenerated to track ../common/aclocal.m4 changes.
2423 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2425 * configure: Regenerated to track ../common/aclocal.m4 changes.
2428 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2430 * acconfig.h: New file.
2431 * configure.in: Reverted change of Apr 24; use sinclude again.
2433 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2435 * configure: Regenerated to track ../common/aclocal.m4 changes.
2438 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2440 * configure.in: Don't call sinclude.
2442 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2444 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2446 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2448 * mips.igen (ERET): Implement.
2450 * interp.c (decode_coproc): Return sign-extended EPC.
2452 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2454 * interp.c (signal_exception): Do not ignore Trap.
2455 (signal_exception): On TRAP, restart at exception address.
2456 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2457 (signal_exception): Update.
2458 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2459 so that TRAP instructions are caught.
2461 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2463 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2464 contains HI/LO access history.
2465 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2466 (HIACCESS, LOACCESS): Delete, replace with
2467 (HIHISTORY, LOHISTORY): New macros.
2468 (CHECKHILO): Delete all, moved to mips.igen
2470 * gencode.c (build_instruction): Do not generate checks for
2471 correct HI/LO register usage.
2473 * interp.c (old_engine_run): Delete checks for correct HI/LO
2476 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2477 check_mf_cycles): New functions.
2478 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2479 do_divu, domultx, do_mult, do_multu): Use.
2481 * tx.igen ("madd", "maddu"): Use.
2483 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2485 * mips.igen (DSRAV): Use function do_dsrav.
2486 (SRAV): Use new function do_srav.
2488 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2489 (B): Sign extend 11 bit immediate.
2490 (EXT-B*): Shift 16 bit immediate left by 1.
2491 (ADDIU*): Don't sign extend immediate value.
2493 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2495 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2497 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2500 * mips.igen (delayslot32, nullify_next_insn): New functions.
2501 (m16.igen): Always include.
2502 (do_*): Add more tracing.
2504 * m16.igen (delayslot16): Add NIA argument, could be called by a
2505 32 bit MIPS16 instruction.
2507 * interp.c (ifetch16): Move function from here.
2508 * sim-main.c (ifetch16): To here.
2510 * sim-main.c (ifetch16, ifetch32): Update to match current
2511 implementations of LH, LW.
2512 (signal_exception): Don't print out incorrect hex value of illegal
2515 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2517 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2520 * m16.igen: Implement MIPS16 instructions.
2522 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2523 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2524 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2525 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2526 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2527 bodies of corresponding code from 32 bit insn to these. Also used
2528 by MIPS16 versions of functions.
2530 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2531 (IMEM16): Drop NR argument from macro.
2533 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2535 * Makefile.in (SIM_OBJS): Add sim-main.o.
2537 * sim-main.h (address_translation, load_memory, store_memory,
2538 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2540 (pr_addr, pr_uword64): Declare.
2541 (sim-main.c): Include when H_REVEALS_MODULE_P.
2543 * interp.c (address_translation, load_memory, store_memory,
2544 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2546 * sim-main.c: To here. Fix compilation problems.
2548 * configure.in: Enable inlining.
2549 * configure: Re-config.
2551 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2553 * configure: Regenerated to track ../common/aclocal.m4 changes.
2555 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2557 * mips.igen: Include tx.igen.
2558 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2559 * tx.igen: New file, contains MADD and MADDU.
2561 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2562 the hardwired constant `7'.
2563 (store_memory): Ditto.
2564 (LOADDRMASK): Move definition to sim-main.h.
2566 mips.igen (MTC0): Enable for r3900.
2569 mips.igen (do_load_byte): Delete.
2570 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2571 do_store_right): New functions.
2572 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2574 configure.in: Let the tx39 use igen again.
2577 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2579 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2580 not an address sized quantity. Return zero for cache sizes.
2582 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2584 * mips.igen (r3900): r3900 does not support 64 bit integer
2587 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2589 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2591 * configure : Rebuild.
2593 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2595 * configure: Regenerated to track ../common/aclocal.m4 changes.
2597 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2599 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2601 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2603 * configure: Regenerated to track ../common/aclocal.m4 changes.
2604 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2606 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2608 * configure: Regenerated to track ../common/aclocal.m4 changes.
2610 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2612 * interp.c (Max, Min): Comment out functions. Not yet used.
2614 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2616 * configure: Regenerated to track ../common/aclocal.m4 changes.
2618 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2620 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2621 configurable settings for stand-alone simulator.
2623 * configure.in: Added X11 search, just in case.
2625 * configure: Regenerated.
2627 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2629 * interp.c (sim_write, sim_read, load_memory, store_memory):
2630 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2632 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2634 * sim-main.h (GETFCC): Return an unsigned value.
2636 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2638 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2639 (DADD): Result destination is RD not RT.
2641 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2643 * sim-main.h (HIACCESS, LOACCESS): Always define.
2645 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2647 * interp.c (sim_info): Delete.
2649 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2651 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2652 (mips_option_handler): New argument `cpu'.
2653 (sim_open): Update call to sim_add_option_table.
2655 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2657 * mips.igen (CxC1): Add tracing.
2659 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2661 * sim-main.h (Max, Min): Declare.
2663 * interp.c (Max, Min): New functions.
2665 * mips.igen (BC1): Add tracing.
2667 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2669 * interp.c Added memory map for stack in vr4100
2671 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2673 * interp.c (load_memory): Add missing "break"'s.
2675 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2677 * interp.c (sim_store_register, sim_fetch_register): Pass in
2678 length parameter. Return -1.
2680 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2682 * interp.c: Added hardware init hook, fixed warnings.
2684 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2686 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2688 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2690 * interp.c (ifetch16): New function.
2692 * sim-main.h (IMEM32): Rename IMEM.
2693 (IMEM16_IMMED): Define.
2695 (DELAY_SLOT): Update.
2697 * m16run.c (sim_engine_run): New file.
2699 * m16.igen: All instructions except LB.
2700 (LB): Call do_load_byte.
2701 * mips.igen (do_load_byte): New function.
2702 (LB): Call do_load_byte.
2704 * mips.igen: Move spec for insn bit size and high bit from here.
2705 * Makefile.in (tmp-igen, tmp-m16): To here.
2707 * m16.dc: New file, decode mips16 instructions.
2709 * Makefile.in (SIM_NO_ALL): Define.
2710 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2712 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2714 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2715 point unit to 32 bit registers.
2716 * configure: Re-generate.
2718 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2720 * configure.in (sim_use_gen): Make IGEN the default simulator
2721 generator for generic 32 and 64 bit mips targets.
2722 * configure: Re-generate.
2724 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2726 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2729 * interp.c (sim_fetch_register, sim_store_register): Read/write
2730 FGR from correct location.
2731 (sim_open): Set size of FGR's according to
2732 WITH_TARGET_FLOATING_POINT_BITSIZE.
2734 * sim-main.h (FGR): Store floating point registers in a separate
2737 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2739 * configure: Regenerated to track ../common/aclocal.m4 changes.
2741 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2743 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2745 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2747 * interp.c (pending_tick): New function. Deliver pending writes.
2749 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2750 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2751 it can handle mixed sized quantites and single bits.
2753 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2755 * interp.c (oengine.h): Do not include when building with IGEN.
2756 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2757 (sim_info): Ditto for PROCESSOR_64BIT.
2758 (sim_monitor): Replace ut_reg with unsigned_word.
2759 (*): Ditto for t_reg.
2760 (LOADDRMASK): Define.
2761 (sim_open): Remove defunct check that host FP is IEEE compliant,
2762 using software to emulate floating point.
2763 (value_fpr, ...): Always compile, was conditional on HASFPU.
2765 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2767 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2770 * interp.c (SD, CPU): Define.
2771 (mips_option_handler): Set flags in each CPU.
2772 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2773 (sim_close): Do not clear STATE, deleted anyway.
2774 (sim_write, sim_read): Assume CPU zero's vm should be used for
2776 (sim_create_inferior): Set the PC for all processors.
2777 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2779 (mips16_entry): Pass correct nr of args to store_word, load_word.
2780 (ColdReset): Cold reset all cpu's.
2781 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2782 (sim_monitor, load_memory, store_memory, signal_exception): Use
2783 `CPU' instead of STATE_CPU.
2786 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2789 * sim-main.h (signal_exception): Add sim_cpu arg.
2790 (SignalException*): Pass both SD and CPU to signal_exception.
2791 * interp.c (signal_exception): Update.
2793 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2795 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2796 address_translation): Ditto
2797 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2799 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2801 * configure: Regenerated to track ../common/aclocal.m4 changes.
2803 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2805 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2807 * mips.igen (model): Map processor names onto BFD name.
2809 * sim-main.h (CPU_CIA): Delete.
2810 (SET_CIA, GET_CIA): Define
2812 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2814 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2817 * configure.in (default_endian): Configure a big-endian simulator
2819 * configure: Re-generate.
2821 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2823 * configure: Regenerated to track ../common/aclocal.m4 changes.
2825 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2827 * interp.c (sim_monitor): Handle Densan monitor outbyte
2828 and inbyte functions.
2830 1997-12-29 Felix Lee <flee@cygnus.com>
2832 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2834 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2836 * Makefile.in (tmp-igen): Arrange for $zero to always be
2837 reset to zero after every instruction.
2839 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2841 * configure: Regenerated to track ../common/aclocal.m4 changes.
2844 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2846 * mips.igen (MSUB): Fix to work like MADD.
2847 * gencode.c (MSUB): Similarly.
2849 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2851 * configure: Regenerated to track ../common/aclocal.m4 changes.
2853 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2855 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2857 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2859 * sim-main.h (sim-fpu.h): Include.
2861 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2862 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2863 using host independant sim_fpu module.
2865 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2867 * interp.c (signal_exception): Report internal errors with SIGABRT
2870 * sim-main.h (C0_CONFIG): New register.
2871 (signal.h): No longer include.
2873 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2875 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2877 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2879 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2881 * mips.igen: Tag vr5000 instructions.
2882 (ANDI): Was missing mipsIV model, fix assembler syntax.
2883 (do_c_cond_fmt): New function.
2884 (C.cond.fmt): Handle mips I-III which do not support CC field
2886 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2887 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2889 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2890 vr5000 which saves LO in a GPR separatly.
2892 * configure.in (enable-sim-igen): For vr5000, select vr5000
2893 specific instructions.
2894 * configure: Re-generate.
2896 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2898 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2900 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2901 fmt_uninterpreted_64 bit cases to switch. Convert to
2904 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2906 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2907 as specified in IV3.2 spec.
2908 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2910 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2912 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2913 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2914 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2915 PENDING_FILL versions of instructions. Simplify.
2917 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2919 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2921 (MTHI, MFHI): Disable code checking HI-LO.
2923 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2925 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2927 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2929 * gencode.c (build_mips16_operands): Replace IPC with cia.
2931 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2932 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2934 (UndefinedResult): Replace function with macro/function
2936 (sim_engine_run): Don't save PC in IPC.
2938 * sim-main.h (IPC): Delete.
2941 * interp.c (signal_exception, store_word, load_word,
2942 address_translation, load_memory, store_memory, cache_op,
2943 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2944 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2945 current instruction address - cia - argument.
2946 (sim_read, sim_write): Call address_translation directly.
2947 (sim_engine_run): Rename variable vaddr to cia.
2948 (signal_exception): Pass cia to sim_monitor
2950 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2951 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2952 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2954 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2955 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2958 * interp.c (signal_exception): Pass restart address to
2961 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2962 idecode.o): Add dependency.
2964 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2966 (DELAY_SLOT): Update NIA not PC with branch address.
2967 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2969 * mips.igen: Use CIA not PC in branch calculations.
2970 (illegal): Call SignalException.
2971 (BEQ, ADDIU): Fix assembler.
2973 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2975 * m16.igen (JALX): Was missing.
2977 * configure.in (enable-sim-igen): New configuration option.
2978 * configure: Re-generate.
2980 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2982 * interp.c (load_memory, store_memory): Delete parameter RAW.
2983 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2984 bypassing {load,store}_memory.
2986 * sim-main.h (ByteSwapMem): Delete definition.
2988 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2990 * interp.c (sim_do_command, sim_commands): Delete mips specific
2991 commands. Handled by module sim-options.
2993 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2994 (WITH_MODULO_MEMORY): Define.
2996 * interp.c (sim_info): Delete code printing memory size.
2998 * interp.c (mips_size): Nee sim_size, delete function.
3000 (monitor, monitor_base, monitor_size): Delete global variables.
3001 (sim_open, sim_close): Delete code creating monitor and other
3002 memory regions. Use sim-memopts module, via sim_do_commandf, to
3003 manage memory regions.
3004 (load_memory, store_memory): Use sim-core for memory model.
3006 * interp.c (address_translation): Delete all memory map code
3007 except line forcing 32 bit addresses.
3009 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
3011 * sim-main.h (WITH_TRACE): Delete definition. Enables common
3014 * interp.c (logfh, logfile): Delete globals.
3015 (sim_open, sim_close): Delete code opening & closing log file.
3016 (mips_option_handler): Delete -l and -n options.
3017 (OPTION mips_options): Ditto.
3019 * interp.c (OPTION mips_options): Rename option trace to dinero.
3020 (mips_option_handler): Update.
3022 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3024 * interp.c (fetch_str): New function.
3025 (sim_monitor): Rewrite using sim_read & sim_write.
3026 (sim_open): Check magic number.
3027 (sim_open): Write monitor vectors into memory using sim_write.
3028 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
3029 (sim_read, sim_write): Simplify - transfer data one byte at a
3031 (load_memory, store_memory): Clarify meaning of parameter RAW.
3033 * sim-main.h (isHOST): Defete definition.
3034 (isTARGET): Mark as depreciated.
3035 (address_translation): Delete parameter HOST.
3037 * interp.c (address_translation): Delete parameter HOST.
3039 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3043 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
3044 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
3046 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
3048 * mips.igen: Add model filter field to records.
3050 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3052 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
3054 interp.c (sim_engine_run): Do not compile function sim_engine_run
3055 when WITH_IGEN == 1.
3057 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
3058 target architecture.
3060 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
3061 igen. Replace with configuration variables sim_igen_flags /
3064 * m16.igen: New file. Copy mips16 insns here.
3065 * mips.igen: From here.
3067 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3069 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
3071 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
3073 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
3075 * gencode.c (build_instruction): Follow sim_write's lead in using
3076 BigEndianMem instead of !ByteSwapMem.
3078 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
3080 * configure.in (sim_gen): Dependent on target, select type of
3081 generator. Always select old style generator.
3083 configure: Re-generate.
3085 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
3087 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
3088 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
3089 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
3090 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
3091 SIM_@sim_gen@_*, set by autoconf.
3093 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3095 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3097 * interp.c (ColdReset): Remove #ifdef HASFPU, check
3098 CURRENT_FLOATING_POINT instead.
3100 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3101 (address_translation): Raise exception InstructionFetch when
3102 translation fails and isINSTRUCTION.
3104 * interp.c (sim_open, sim_write, sim_monitor, store_word,
3105 sim_engine_run): Change type of of vaddr and paddr to
3107 (address_translation, prefetch, load_memory, store_memory,
3108 cache_op): Change type of vAddr and pAddr to address_word.
3110 * gencode.c (build_instruction): Change type of vaddr and paddr to
3113 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
3115 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3116 macro to obtain result of ALU op.
3118 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3120 * interp.c (sim_info): Call profile_print.
3122 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3124 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3126 * sim-main.h (WITH_PROFILE): Do not define, defined in
3127 common/sim-config.h. Use sim-profile module.
3128 (simPROFILE): Delete defintion.
3130 * interp.c (PROFILE): Delete definition.
3131 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3132 (sim_close): Delete code writing profile histogram.
3133 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3135 (sim_engine_run): Delete code profiling the PC.
3137 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3139 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3141 * interp.c (sim_monitor): Make register pointers of type
3144 * sim-main.h: Make registers of type unsigned_word not
3147 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3149 * interp.c (sync_operation): Rename from SyncOperation, make
3150 global, add SD argument.
3151 (prefetch): Rename from Prefetch, make global, add SD argument.
3152 (decode_coproc): Make global.
3154 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3156 * gencode.c (build_instruction): Generate DecodeCoproc not
3157 decode_coproc calls.
3159 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3160 (SizeFGR): Move to sim-main.h
3161 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3162 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3163 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3165 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3166 FP_RM_TOMINF, GETRM): Move to sim-main.h.
3167 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3168 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3169 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3170 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3172 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3174 (sim-alu.h): Include.
3175 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3176 (sim_cia): Typedef to instruction_address.
3178 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
3180 * Makefile.in (interp.o): Rename generated file engine.c to
3185 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
3187 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3189 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3191 * gencode.c (build_instruction): For "FPSQRT", output correct
3192 number of arguments to Recip.
3194 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
3196 * Makefile.in (interp.o): Depends on sim-main.h
3198 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3200 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3201 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3202 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3203 STATE, DSSTATE): Define
3204 (GPR, FGRIDX, ..): Define.
3206 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3207 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3208 (GPR, FGRIDX, ...): Delete macros.
3210 * interp.c: Update names to match defines from sim-main.h
3212 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
3214 * interp.c (sim_monitor): Add SD argument.
3215 (sim_warning): Delete. Replace calls with calls to
3217 (sim_error): Delete. Replace calls with sim_io_error.
3218 (open_trace, writeout32, writeout16, getnum): Add SD argument.
3219 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3220 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3222 (mips_size): Rename from sim_size. Add SD argument.
3224 * interp.c (simulator): Delete global variable.
3225 (callback): Delete global variable.
3226 (mips_option_handler, sim_open, sim_write, sim_read,
3227 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3228 sim_size,sim_monitor): Use sim_io_* not callback->*.
3229 (sim_open): ZALLOC simulator struct.
3230 (PROFILE): Do not define.
3232 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3234 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3235 support.h with corresponding code.
3237 * sim-main.h (word64, uword64), support.h: Move definition to
3239 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3242 * Makefile.in: Update dependencies
3243 * interp.c: Do not include.
3245 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3247 * interp.c (address_translation, load_memory, store_memory,
3248 cache_op): Rename to from AddressTranslation et.al., make global,
3251 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3254 * interp.c (SignalException): Rename to signal_exception, make
3257 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3259 * sim-main.h (SignalException, SignalExceptionInterrupt,
3260 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3261 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3262 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3265 * interp.c, support.h: Use.
3267 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3269 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3270 to value_fpr / store_fpr. Add SD argument.
3271 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3272 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3274 * sim-main.h (ValueFPR, StoreFPR): Define.
3276 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3278 * interp.c (sim_engine_run): Check consistency between configure
3279 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3282 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3283 (mips_fpu): Configure WITH_FLOATING_POINT.
3284 (mips_endian): Configure WITH_TARGET_ENDIAN.
3285 * configure: Update.
3287 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3289 * configure: Regenerated to track ../common/aclocal.m4 changes.
3291 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3293 * configure: Regenerated.
3295 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3297 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3299 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3301 * gencode.c (print_igen_insn_models): Assume certain architectures
3302 include all mips* instructions.
3303 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3306 * Makefile.in (tmp.igen): Add target. Generate igen input from
3309 * gencode.c (FEATURE_IGEN): Define.
3310 (main): Add --igen option. Generate output in igen format.
3311 (process_instructions): Format output according to igen option.
3312 (print_igen_insn_format): New function.
3313 (print_igen_insn_models): New function.
3314 (process_instructions): Only issue warnings and ignore
3315 instructions when no FEATURE_IGEN.
3317 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3319 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3322 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3324 * configure: Regenerated to track ../common/aclocal.m4 changes.
3326 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3328 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3329 SIM_RESERVED_BITS): Delete, moved to common.
3330 (SIM_EXTRA_CFLAGS): Update.
3332 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3334 * configure.in: Configure non-strict memory alignment.
3335 * configure: Regenerated to track ../common/aclocal.m4 changes.
3337 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3339 * configure: Regenerated to track ../common/aclocal.m4 changes.
3341 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3343 * gencode.c (SDBBP,DERET): Added (3900) insns.
3344 (RFE): Turn on for 3900.
3345 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3346 (dsstate): Made global.
3347 (SUBTARGET_R3900): Added.
3348 (CANCELDELAYSLOT): New.
3349 (SignalException): Ignore SystemCall rather than ignore and
3350 terminate. Add DebugBreakPoint handling.
3351 (decode_coproc): New insns RFE, DERET; and new registers Debug
3352 and DEPC protected by SUBTARGET_R3900.
3353 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3355 * Makefile.in,configure.in: Add mips subtarget option.
3356 * configure: Update.
3358 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3360 * gencode.c: Add r3900 (tx39).
3363 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3365 * gencode.c (build_instruction): Don't need to subtract 4 for
3368 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3370 * interp.c: Correct some HASFPU problems.
3372 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3374 * configure: Regenerated to track ../common/aclocal.m4 changes.
3376 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3378 * interp.c (mips_options): Fix samples option short form, should
3381 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3383 * interp.c (sim_info): Enable info code. Was just returning.
3385 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3387 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3390 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3392 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3394 (build_instruction): Ditto for LL.
3396 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3398 * configure: Regenerated to track ../common/aclocal.m4 changes.
3400 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3402 * configure: Regenerated to track ../common/aclocal.m4 changes.
3405 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3407 * interp.c (sim_open): Add call to sim_analyze_program, update
3410 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3412 * interp.c (sim_kill): Delete.
3413 (sim_create_inferior): Add ABFD argument. Set PC from same.
3414 (sim_load): Move code initializing trap handlers from here.
3415 (sim_open): To here.
3416 (sim_load): Delete, use sim-hload.c.
3418 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3420 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3422 * configure: Regenerated to track ../common/aclocal.m4 changes.
3425 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3427 * interp.c (sim_open): Add ABFD argument.
3428 (sim_load): Move call to sim_config from here.
3429 (sim_open): To here. Check return status.
3431 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3433 * gencode.c (build_instruction): Two arg MADD should
3434 not assign result to $0.
3436 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3438 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3439 * sim/mips/configure.in: Regenerate.
3441 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3443 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3444 signed8, unsigned8 et.al. types.
3446 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3447 hosts when selecting subreg.
3449 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3451 * interp.c (sim_engine_run): Reset the ZERO register to zero
3452 regardless of FEATURE_WARN_ZERO.
3453 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3455 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3457 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3458 (SignalException): For BreakPoints ignore any mode bits and just
3460 (SignalException): Always set the CAUSE register.
3462 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3464 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3465 exception has been taken.
3467 * interp.c: Implement the ERET and mt/f sr instructions.
3469 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3471 * interp.c (SignalException): Don't bother restarting an
3474 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3476 * interp.c (SignalException): Really take an interrupt.
3477 (interrupt_event): Only deliver interrupts when enabled.
3479 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3481 * interp.c (sim_info): Only print info when verbose.
3482 (sim_info) Use sim_io_printf for output.
3484 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3486 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3489 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3491 * interp.c (sim_do_command): Check for common commands if a
3492 simulator specific command fails.
3494 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3496 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3497 and simBE when DEBUG is defined.
3499 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3501 * interp.c (interrupt_event): New function. Pass exception event
3502 onto exception handler.
3504 * configure.in: Check for stdlib.h.
3505 * configure: Regenerate.
3507 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3508 variable declaration.
3509 (build_instruction): Initialize memval1.
3510 (build_instruction): Add UNUSED attribute to byte, bigend,
3512 (build_operands): Ditto.
3514 * interp.c: Fix GCC warnings.
3515 (sim_get_quit_code): Delete.
3517 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3518 * Makefile.in: Ditto.
3519 * configure: Re-generate.
3521 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3523 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3525 * interp.c (mips_option_handler): New function parse argumes using
3527 (myname): Replace with STATE_MY_NAME.
3528 (sim_open): Delete check for host endianness - performed by
3530 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3531 (sim_open): Move much of the initialization from here.
3532 (sim_load): To here. After the image has been loaded and
3534 (sim_open): Move ColdReset from here.
3535 (sim_create_inferior): To here.
3536 (sim_open): Make FP check less dependant on host endianness.
3538 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3540 * interp.c (sim_set_callbacks): Delete.
3542 * interp.c (membank, membank_base, membank_size): Replace with
3543 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3544 (sim_open): Remove call to callback->init. gdb/run do this.
3548 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3550 * interp.c (big_endian_p): Delete, replaced by
3551 current_target_byte_order.
3553 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3555 * interp.c (host_read_long, host_read_word, host_swap_word,
3556 host_swap_long): Delete. Using common sim-endian.
3557 (sim_fetch_register, sim_store_register): Use H2T.
3558 (pipeline_ticks): Delete. Handled by sim-events.
3560 (sim_engine_run): Update.
3562 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3564 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3566 (SignalException): To here. Signal using sim_engine_halt.
3567 (sim_stop_reason): Delete, moved to common.
3569 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3571 * interp.c (sim_open): Add callback argument.
3572 (sim_set_callbacks): Delete SIM_DESC argument.
3575 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3577 * Makefile.in (SIM_OBJS): Add common modules.
3579 * interp.c (sim_set_callbacks): Also set SD callback.
3580 (set_endianness, xfer_*, swap_*): Delete.
3581 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3582 Change to functions using sim-endian macros.
3583 (control_c, sim_stop): Delete, use common version.
3584 (simulate): Convert into.
3585 (sim_engine_run): This function.
3586 (sim_resume): Delete.
3588 * interp.c (simulation): New variable - the simulator object.
3589 (sim_kind): Delete global - merged into simulation.
3590 (sim_load): Cleanup. Move PC assignment from here.
3591 (sim_create_inferior): To here.
3593 * sim-main.h: New file.
3594 * interp.c (sim-main.h): Include.
3596 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3598 * configure: Regenerated to track ../common/aclocal.m4 changes.
3600 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3602 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3604 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3606 * gencode.c (build_instruction): DIV instructions: check
3607 for division by zero and integer overflow before using
3608 host's division operation.
3610 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3612 * Makefile.in (SIM_OBJS): Add sim-load.o.
3613 * interp.c: #include bfd.h.
3614 (target_byte_order): Delete.
3615 (sim_kind, myname, big_endian_p): New static locals.
3616 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3617 after argument parsing. Recognize -E arg, set endianness accordingly.
3618 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3619 load file into simulator. Set PC from bfd.
3620 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3621 (set_endianness): Use big_endian_p instead of target_byte_order.
3623 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3625 * interp.c (sim_size): Delete prototype - conflicts with
3626 definition in remote-sim.h. Correct definition.
3628 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3630 * configure: Regenerated to track ../common/aclocal.m4 changes.
3633 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3635 * interp.c (sim_open): New arg `kind'.
3637 * configure: Regenerated to track ../common/aclocal.m4 changes.
3639 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3641 * configure: Regenerated to track ../common/aclocal.m4 changes.
3643 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3645 * interp.c (sim_open): Set optind to 0 before calling getopt.
3647 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3649 * configure: Regenerated to track ../common/aclocal.m4 changes.
3651 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3653 * interp.c : Replace uses of pr_addr with pr_uword64
3654 where the bit length is always 64 independent of SIM_ADDR.
3655 (pr_uword64) : added.
3657 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3659 * configure: Re-generate.
3661 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3663 * configure: Regenerate to track ../common/aclocal.m4 changes.
3665 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3667 * interp.c (sim_open): New SIM_DESC result. Argument is now
3669 (other sim_*): New SIM_DESC argument.
3671 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3673 * interp.c: Fix printing of addresses for non-64-bit targets.
3674 (pr_addr): Add function to print address based on size.
3676 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3678 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3680 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3682 * gencode.c (build_mips16_operands): Correct computation of base
3683 address for extended PC relative instruction.
3685 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3687 * interp.c (mips16_entry): Add support for floating point cases.
3688 (SignalException): Pass floating point cases to mips16_entry.
3689 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3691 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3693 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3694 and then set the state to fmt_uninterpreted.
3695 (COP_SW): Temporarily set the state to fmt_word while calling
3698 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3700 * gencode.c (build_instruction): The high order may be set in the
3701 comparison flags at any ISA level, not just ISA 4.
3703 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3705 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3706 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3707 * configure.in: sinclude ../common/aclocal.m4.
3708 * configure: Regenerated.
3710 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3712 * configure: Rebuild after change to aclocal.m4.
3714 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3716 * configure configure.in Makefile.in: Update to new configure
3717 scheme which is more compatible with WinGDB builds.
3718 * configure.in: Improve comment on how to run autoconf.
3719 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3720 * Makefile.in: Use autoconf substitution to install common
3723 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3725 * gencode.c (build_instruction): Use BigEndianCPU instead of
3728 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3730 * interp.c (sim_monitor): Make output to stdout visible in
3731 wingdb's I/O log window.
3733 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3735 * support.h: Undo previous change to SIGTRAP
3738 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3740 * interp.c (store_word, load_word): New static functions.
3741 (mips16_entry): New static function.
3742 (SignalException): Look for mips16 entry and exit instructions.
3743 (simulate): Use the correct index when setting fpr_state after
3744 doing a pending move.
3746 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3748 * interp.c: Fix byte-swapping code throughout to work on
3749 both little- and big-endian hosts.
3751 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3753 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3754 with gdb/config/i386/xm-windows.h.
3756 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3758 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3759 that messes up arithmetic shifts.
3761 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3763 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3764 SIGTRAP and SIGQUIT for _WIN32.
3766 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3768 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3769 force a 64 bit multiplication.
3770 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3771 destination register is 0, since that is the default mips16 nop
3774 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3776 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3777 (build_endian_shift): Don't check proc64.
3778 (build_instruction): Always set memval to uword64. Cast op2 to
3779 uword64 when shifting it left in memory instructions. Always use
3780 the same code for stores--don't special case proc64.
3782 * gencode.c (build_mips16_operands): Fix base PC value for PC
3784 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3786 * interp.c (simJALDELAYSLOT): Define.
3787 (JALDELAYSLOT): Define.
3788 (INDELAYSLOT, INJALDELAYSLOT): Define.
3789 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3791 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3793 * interp.c (sim_open): add flush_cache as a PMON routine
3794 (sim_monitor): handle flush_cache by ignoring it
3796 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3798 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3800 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3801 (BigEndianMem): Rename to ByteSwapMem and change sense.
3802 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3803 BigEndianMem references to !ByteSwapMem.
3804 (set_endianness): New function, with prototype.
3805 (sim_open): Call set_endianness.
3806 (sim_info): Use simBE instead of BigEndianMem.
3807 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3808 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3809 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3810 ifdefs, keeping the prototype declaration.
3811 (swap_word): Rewrite correctly.
3812 (ColdReset): Delete references to CONFIG. Delete endianness related
3813 code; moved to set_endianness.
3815 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3817 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3818 * interp.c (CHECKHILO): Define away.
3819 (simSIGINT): New macro.
3820 (membank_size): Increase from 1MB to 2MB.
3821 (control_c): New function.
3822 (sim_resume): Rename parameter signal to signal_number. Add local
3823 variable prev. Call signal before and after simulate.
3824 (sim_stop_reason): Add simSIGINT support.
3825 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3827 (sim_warning): Delete call to SignalException. Do call printf_filtered
3829 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3830 a call to sim_warning.
3832 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3834 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3835 16 bit instructions.
3837 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3839 Add support for mips16 (16 bit MIPS implementation):
3840 * gencode.c (inst_type): Add mips16 instruction encoding types.
3841 (GETDATASIZEINSN): Define.
3842 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3843 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3845 (MIPS16_DECODE): New table, for mips16 instructions.
3846 (bitmap_val): New static function.
3847 (struct mips16_op): Define.
3848 (mips16_op_table): New table, for mips16 operands.
3849 (build_mips16_operands): New static function.
3850 (process_instructions): If PC is odd, decode a mips16
3851 instruction. Break out instruction handling into new
3852 build_instruction function.
3853 (build_instruction): New static function, broken out of
3854 process_instructions. Check modifiers rather than flags for SHIFT
3855 bit count and m[ft]{hi,lo} direction.
3856 (usage): Pass program name to fprintf.
3857 (main): Remove unused variable this_option_optind. Change
3858 ``*loptarg++'' to ``loptarg++''.
3859 (my_strtoul): Parenthesize && within ||.
3860 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3861 (simulate): If PC is odd, fetch a 16 bit instruction, and
3862 increment PC by 2 rather than 4.
3863 * configure.in: Add case for mips16*-*-*.
3864 * configure: Rebuild.
3866 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3868 * interp.c: Allow -t to enable tracing in standalone simulator.
3869 Fix garbage output in trace file and error messages.
3871 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3873 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3874 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3875 * configure.in: Simplify using macros in ../common/aclocal.m4.
3876 * configure: Regenerated.
3877 * tconfig.in: New file.
3879 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3881 * interp.c: Fix bugs in 64-bit port.
3882 Use ansi function declarations for msvc compiler.
3883 Initialize and test file pointer in trace code.
3884 Prevent duplicate definition of LAST_EMED_REGNUM.
3886 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3888 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3890 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3892 * interp.c (SignalException): Check for explicit terminating
3894 * gencode.c: Pass instruction value through SignalException()
3895 calls for Trap, Breakpoint and Syscall.
3897 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3899 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3900 only used on those hosts that provide it.
3901 * configure.in: Add sqrt() to list of functions to be checked for.
3902 * config.in: Re-generated.
3903 * configure: Re-generated.
3905 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3907 * gencode.c (process_instructions): Call build_endian_shift when
3908 expanding STORE RIGHT, to fix swr.
3909 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3910 clear the high bits.
3911 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3912 Fix float to int conversions to produce signed values.
3914 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3916 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3917 (process_instructions): Correct handling of nor instruction.
3918 Correct shift count for 32 bit shift instructions. Correct sign
3919 extension for arithmetic shifts to not shift the number of bits in
3920 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3921 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3923 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3924 It's OK to have a mult follow a mult. What's not OK is to have a
3925 mult follow an mfhi.
3926 (Convert): Comment out incorrect rounding code.
3928 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3930 * interp.c (sim_monitor): Improved monitor printf
3931 simulation. Tidied up simulator warnings, and added "--log" option
3932 for directing warning message output.
3933 * gencode.c: Use sim_warning() rather than WARNING macro.
3935 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3937 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3938 getopt1.o, rather than on gencode.c. Link objects together.
3939 Don't link against -liberty.
3940 (gencode.o, getopt.o, getopt1.o): New targets.
3941 * gencode.c: Include <ctype.h> and "ansidecl.h".
3942 (AND): Undefine after including "ansidecl.h".
3943 (ULONG_MAX): Define if not defined.
3944 (OP_*): Don't define macros; now defined in opcode/mips.h.
3945 (main): Call my_strtoul rather than strtoul.
3946 (my_strtoul): New static function.
3948 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3950 * gencode.c (process_instructions): Generate word64 and uword64
3951 instead of `long long' and `unsigned long long' data types.
3952 * interp.c: #include sysdep.h to get signals, and define default
3954 * (Convert): Work around for Visual-C++ compiler bug with type
3956 * support.h: Make things compile under Visual-C++ by using
3957 __int64 instead of `long long'. Change many refs to long long
3958 into word64/uword64 typedefs.
3960 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3962 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3963 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3965 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3966 (AC_PROG_INSTALL): Added.
3967 (AC_PROG_CC): Moved to before configure.host call.
3968 * configure: Rebuilt.
3970 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3972 * configure.in: Define @SIMCONF@ depending on mips target.
3973 * configure: Rebuild.
3974 * Makefile.in (run): Add @SIMCONF@ to control simulator
3976 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3977 * interp.c: Remove some debugging, provide more detailed error
3978 messages, update memory accesses to use LOADDRMASK.
3980 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3982 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3983 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3985 * configure: Rebuild.
3986 * config.in: New file, generated by autoheader.
3987 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3988 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3989 HAVE_ANINT and HAVE_AINT, as appropriate.
3990 * Makefile.in (run): Use @LIBS@ rather than -lm.
3991 (interp.o): Depend upon config.h.
3992 (Makefile): Just rebuild Makefile.
3993 (clean): Remove stamp-h.
3994 (mostlyclean): Make the same as clean, not as distclean.
3995 (config.h, stamp-h): New targets.
3997 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3999 * interp.c (ColdReset): Fix boolean test. Make all simulator
4002 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
4004 * interp.c (xfer_direct_word, xfer_direct_long,
4005 swap_direct_word, swap_direct_long, xfer_big_word,
4006 xfer_big_long, xfer_little_word, xfer_little_long,
4007 swap_word,swap_long): Added.
4008 * interp.c (ColdReset): Provide function indirection to
4009 host<->simulated_target transfer routines.
4010 * interp.c (sim_store_register, sim_fetch_register): Updated to
4011 make use of indirected transfer routines.
4013 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
4015 * gencode.c (process_instructions): Ensure FP ABS instruction
4017 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
4018 system call support.
4020 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
4022 * interp.c (sim_do_command): Complain if callback structure not
4025 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
4027 * interp.c (Convert): Provide round-to-nearest and round-to-zero
4028 support for Sun hosts.
4029 * Makefile.in (gencode): Ensure the host compiler and libraries
4030 used for cross-hosted build.
4032 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
4034 * interp.c, gencode.c: Some more (TODO) tidying.
4036 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
4038 * gencode.c, interp.c: Replaced explicit long long references with
4039 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
4040 * support.h (SET64LO, SET64HI): Macros added.
4042 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
4044 * configure: Regenerate with autoconf 2.7.
4046 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
4048 * interp.c (LoadMemory): Enclose text following #endif in /* */.
4049 * support.h: Remove superfluous "1" from #if.
4050 * support.h (CHECKSIM): Remove stray 'a' at end of line.
4052 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
4054 * interp.c (StoreFPR): Control UndefinedResult() call on
4055 WARN_RESULT manifest.
4057 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
4059 * gencode.c: Tidied instruction decoding, and added FP instruction
4062 * interp.c: Added dineroIII, and BSD profiling support. Also
4063 run-time FP handling.
4065 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
4067 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
4068 gencode.c, interp.c, support.h: created.
projects / deliverable / binutils-gdb.git / blob