1 2021-06-21 Mike Frysinger <vapier@gentoo.org>
3 * aclocal.m4: Regenerate.
4 * configure: Regenerate.
6 2021-06-21 Mike Frysinger <vapier@gentoo.org>
8 * Makefile.in (SIM_EXTRA_HW_DEVICES): Define.
9 * configure.ac (SIM_AC_OPTION_HARDWARE): Delete call.
10 * configure: Regenerate.
12 2021-06-20 Mike Frysinger <vapier@gentoo.org>
14 * configure.ac (SIM_AC_COMMON): Delete.
15 * aclocal.m4, configure: Regenerate.
17 2021-06-20 Mike Frysinger <vapier@gentoo.org>
19 * aclocal.m4: Regenerate.
20 * configure: Regenerate.
22 2021-06-19 Mike Frysinger <vapier@gentoo.org>
24 * aclocal.m4: Regenerate.
25 * configure: Regenerate.
27 2021-06-19 Mike Frysinger <vapier@gentoo.org>
29 * configure.ac: Delete AC_PATH_X call.
30 * configure: Regenerate.
32 2021-06-19 Mike Frysinger <vapier@gentoo.org>
34 * configure.ac: Delete AC_CHECK_LIB calls.
35 * configure: Regenerate.
37 2021-06-18 Mike Frysinger <vapier@gentoo.org>
39 * aclocal.m4, configure: Regenerate.
41 2021-06-18 Mike Frysinger <vapier@gentoo.org>
43 * Makefile.in (SIM_WERROR_CFLAGS): New variable.
44 * configure.ac: Delete call to SIM_AC_OPTION_WARNINGS.
45 * configure: Regenerate.
47 2021-06-18 Mike Frysinger <vapier@gentoo.org>
49 * interp.c: Include sim-signal.h.
51 2021-06-17 Mike Frysinger <vapier@gentoo.org>
53 * configure.ac: Delete SIM_AC_OPTION_ENDIAN call.
54 * aclocal.m4, configure: Regenerate.
56 2021-06-16 Mike Frysinger <vapier@gentoo.org>
58 * interp.c (dotrace): Make comment const.
59 * sim-main.h (dotrace): Likewise. Add ATTRIBUTE_PRINTF.
61 2021-06-16 Mike Frysinger <vapier@gentoo.org>
63 * interp.c (sim_monitor): Change ap type to address_word*.
64 (_P, P): New macros. Rewrite dynamic printf logic to use these.
66 2021-06-16 Mike Frysinger <vapier@gentoo.org>
68 * dv-tx3904sio.c (tx3904sio_fifo_push): Change next_buf to
71 2021-06-16 Mike Frysinger <vapier@gentoo.org>
73 * dv-tx3904irc.c (tx3904irc_io_write_buffer): Initialize
76 2021-06-16 Mike Frysinger <vapier@gentoo.org>
78 * configure: Regenerate.
80 2021-06-16 Mike Frysinger <vapier@gentoo.org>
82 * interp.c (sim_open): Change %lx to %x and PRIx macros.
84 2021-06-16 Mike Frysinger <vapier@gentoo.org>
86 * configure: Regenerate.
89 2021-06-15 Mike Frysinger <vapier@gentoo.org>
91 * config.in, configure: Regenerate.
93 2021-06-12 Mike Frysinger <vapier@gentoo.org>
95 * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
97 2021-06-12 Mike Frysinger <vapier@gentoo.org>
99 * aclocal.m4, config.in, configure: Regenerate.
101 2021-06-12 Mike Frysinger <vapier@gentoo.org>
103 * configure.ac: Delete call to AC_CHECK_FUNCS.
104 * config.in, configure: Regenerate.
106 2021-06-08 Mike Frysinger <vapier@gentoo.org>
108 * Makefile.in: Replace $(IGEN) with $(IGEN_RUN) and ../igen/igen
111 2021-05-29 Mike Frysinger <vapier@gentoo.org>
113 * interp.c [!HAVE_DV_SOCKSER] (sockser_addr): Define to NULL.
115 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
117 * interp.c (sim_open): Add shadow mappings from 32-bit
118 address space to 64-bit sign-extended address space.
120 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
122 * interp.c (sim_create_inferior): Only truncate sign extension
123 bits for 32-bit target models.
125 2021-05-17 Mike Frysinger <vapier@gentoo.org>
127 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
129 2021-05-17 Mike Frysinger <vapier@gentoo.org>
131 * interp.c (sim_open): Switch to sim_state_alloc_extra.
132 * micromips.igen: Change SD to mips_sim_state.
133 * micromipsrun.c (sim_engine_run): Likewise.
134 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
135 (watch_options_install): Delete.
136 (struct swatch): Delete.
137 (struct sim_state): Delete.
138 (struct mips_sim_state): New struct.
139 (MIPS_SIM_STATE): Define.
141 2021-05-16 Mike Frysinger <vapier@gentoo.org>
143 * interp.c: Replace config.h include with defs.h.
144 * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
145 dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
148 2021-05-16 Mike Frysinger <vapier@gentoo.org>
150 * config.in, configure: Regenerate.
152 2021-05-14 Mike Frysinger <vapier@gentoo.org>
154 * interp.c: Update include path.
156 2021-05-04 Mike Frysinger <vapier@gentoo.org>
158 * dv-tx3904sio.c: Include stdlib.h.
160 2021-05-04 Mike Frysinger <vapier@gentoo.org>
162 * configure.ac (hw_extra_devices): Inline contents into
163 SIM_AC_OPTION_HARDWARE and delete.
164 * configure: Regenerate.
166 2021-05-04 Mike Frysinger <vapier@gentoo.org>
168 * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
169 (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
170 * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
171 * configure: Regenerate.
173 2021-05-04 Mike Frysinger <vapier@gentoo.org>
175 * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
177 2021-05-04 Mike Frysinger <vapier@gentoo.org>
179 * configure: Regenerate.
181 2021-05-01 Mike Frysinger <vapier@gentoo.org>
183 * cp1.c (store_fcr): Mark static.
185 2021-05-01 Mike Frysinger <vapier@gentoo.org>
187 * config.in, configure: Regenerate.
189 2021-04-23 Mike Frysinger <vapier@gentoo.org>
191 * configure.ac (hw_enabled): Delete.
192 (SIM_AC_OPTION_HARDWARE): Delete first two args.
193 * configure: Regenerate.
195 2021-04-22 Tom Tromey <tom@tromey.com>
197 * configure, config.in: Rebuild.
199 2021-04-22 Tom Tromey <tom@tromey.com>
201 * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
203 (SIM_EXTRA_DEPS): New variable.
205 2021-04-22 Tom Tromey <tom@tromey.com>
207 * configure: Rebuild.
209 2021-04-21 Mike Frysinger <vapier@gentoo.org>
211 * aclocal.m4: Regenerate.
213 2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
215 * configure: Regenerate.
217 2021-04-18 Mike Frysinger <vapier@gentoo.org>
219 * configure: Regenerate.
221 2021-04-12 Mike Frysinger <vapier@gentoo.org>
223 * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
225 2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
227 * Makefile.in: Set ASAN_OPTIONS when running igen.
229 2021-04-04 Steve Ellcey <sellcey@mips.com>
230 Faraz Shahbazker <fshahbazker@wavecomp.com>
232 * interp.c (sim_monitor): Add switch entries for unlink (13),
233 lseek (14), and stat (15).
235 2021-04-02 Mike Frysinger <vapier@gentoo.org>
237 * Makefile.in (../igen/igen): Delete rule.
238 (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
240 2021-04-02 Mike Frysinger <vapier@gentoo.org>
242 * aclocal.m4, configure: Regenerate.
244 2021-02-28 Mike Frysinger <vapier@gentoo.org>
246 * configure: Regenerate.
248 2021-02-27 Mike Frysinger <vapier@gentoo.org>
250 * Makefile.in (SIM_EXTRA_ALL): Delete.
253 2021-02-21 Mike Frysinger <vapier@gentoo.org>
255 * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
256 * aclocal.m4, configure: Regenerate.
258 2021-02-13 Mike Frysinger <vapier@gentoo.org>
260 * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
261 * aclocal.m4, configure: Regenerate.
263 2021-02-06 Mike Frysinger <vapier@gentoo.org>
265 * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
267 2021-02-06 Mike Frysinger <vapier@gentoo.org>
269 * configure: Regenerate.
271 2021-01-30 Mike Frysinger <vapier@gentoo.org>
273 * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
275 2021-01-11 Mike Frysinger <vapier@gentoo.org>
277 * config.in, configure: Regenerate.
278 * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
279 and strings.h include.
281 2021-01-09 Mike Frysinger <vapier@gentoo.org>
283 * configure: Regenerate.
285 2021-01-09 Mike Frysinger <vapier@gentoo.org>
287 * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
288 * configure: Regenerate.
290 2021-01-08 Mike Frysinger <vapier@gentoo.org>
292 * configure: Regenerate.
294 2021-01-04 Mike Frysinger <vapier@gentoo.org>
296 * configure: Regenerate.
298 2020-12-31 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
300 * sim-main.c: Include <stdlib.h>.
302 2020-12-14 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
304 * cp1.c: Include <stdlib.h>.
306 2020-07-29 Simon Marchi <simon.marchi@efficios.com>
308 * configure: Re-generate.
310 2017-09-06 John Baldwin <jhb@FreeBSD.org>
312 * configure: Regenerate.
314 2016-11-11 Mike Frysinger <vapier@gentoo.org>
317 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
320 2016-11-11 Mike Frysinger <vapier@gentoo.org>
323 * mips.igen (check_u64): Enable for `r3900'.
325 2016-02-05 Mike Frysinger <vapier@gentoo.org>
327 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
329 * configure: Regenerate.
331 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
332 Maciej W. Rozycki <macro@imgtec.com>
335 * micromips.igen (delayslot_micromips): Enable for `micromips32',
336 `micromips64' and `micromipsdsp' only.
337 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
338 (do_micromips_jalr, do_micromips_jal): Likewise.
339 (compute_movep_src_reg): Likewise.
340 (compute_andi16_imm): Likewise.
341 (convert_fmt_micromips): Likewise.
342 (convert_fmt_micromips_cvt_d): Likewise.
343 (convert_fmt_micromips_cvt_s): Likewise.
344 (FMT_MICROMIPS): Likewise.
345 (FMT_MICROMIPS_CVT_D): Likewise.
346 (FMT_MICROMIPS_CVT_S): Likewise.
348 2016-01-12 Mike Frysinger <vapier@gentoo.org>
350 * interp.c: Include elf-bfd.h.
351 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
354 2016-01-10 Mike Frysinger <vapier@gentoo.org>
356 * config.in, configure: Regenerate.
358 2016-01-10 Mike Frysinger <vapier@gentoo.org>
360 * configure: Regenerate.
362 2016-01-10 Mike Frysinger <vapier@gentoo.org>
364 * configure: Regenerate.
366 2016-01-10 Mike Frysinger <vapier@gentoo.org>
368 * configure: Regenerate.
370 2016-01-10 Mike Frysinger <vapier@gentoo.org>
372 * configure: Regenerate.
374 2016-01-10 Mike Frysinger <vapier@gentoo.org>
376 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
377 * configure: Regenerate.
379 2016-01-10 Mike Frysinger <vapier@gentoo.org>
381 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
382 * configure: Regenerate.
384 2016-01-10 Mike Frysinger <vapier@gentoo.org>
386 * configure: Regenerate.
388 2016-01-10 Mike Frysinger <vapier@gentoo.org>
390 * configure: Regenerate.
392 2016-01-09 Mike Frysinger <vapier@gentoo.org>
394 * config.in, configure: Regenerate.
396 2016-01-06 Mike Frysinger <vapier@gentoo.org>
398 * interp.c (sim_open): Mark argv const.
399 (sim_create_inferior): Mark argv and env const.
401 2016-01-04 Mike Frysinger <vapier@gentoo.org>
403 * configure: Regenerate.
405 2016-01-03 Mike Frysinger <vapier@gentoo.org>
407 * interp.c (sim_open): Update sim_parse_args comment.
409 2016-01-03 Mike Frysinger <vapier@gentoo.org>
411 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
412 * configure: Regenerate.
414 2016-01-02 Mike Frysinger <vapier@gentoo.org>
416 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
417 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
418 * configure: Regenerate.
419 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
421 2016-01-02 Mike Frysinger <vapier@gentoo.org>
423 * dv-tx3904cpu.c (CPU, SD): Delete.
425 2015-12-30 Mike Frysinger <vapier@gentoo.org>
427 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
428 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
429 (sim_store_register): Rename to ...
430 (mips_reg_store): ... this. Delete local cpu var.
431 Update sim_io_eprintf calls.
432 (sim_fetch_register): Rename to ...
433 (mips_reg_fetch): ... this. Delete local cpu var.
434 Update sim_io_eprintf calls.
436 2015-12-27 Mike Frysinger <vapier@gentoo.org>
438 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
440 2015-12-26 Mike Frysinger <vapier@gentoo.org>
442 * config.in, configure: Regenerate.
444 2015-12-26 Mike Frysinger <vapier@gentoo.org>
446 * interp.c (sim_write, sim_read): Delete.
447 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
448 (load_word): Likewise.
449 * micromips.igen (cache): Likewise.
450 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
451 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
452 do_store_left, do_store_right, do_load_double, do_store_double):
454 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
455 (do_prefx): Likewise.
456 * sim-main.c (address_translation, prefetch): Delete.
457 (ifetch32, ifetch16): Delete call to AddressTranslation and set
459 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
460 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
461 (LoadMemory, StoreMemory): Delete CCA arg.
463 2015-12-24 Mike Frysinger <vapier@gentoo.org>
465 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
466 * configure: Regenerated.
468 2015-12-24 Mike Frysinger <vapier@gentoo.org>
470 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
473 2015-12-24 Mike Frysinger <vapier@gentoo.org>
475 * tconfig.h (SIM_HANDLES_LMA): Delete.
477 2015-12-24 Mike Frysinger <vapier@gentoo.org>
479 * sim-main.h (WITH_WATCHPOINTS): Delete.
481 2015-12-24 Mike Frysinger <vapier@gentoo.org>
483 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
485 2015-12-24 Mike Frysinger <vapier@gentoo.org>
487 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
489 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
491 * micromips.igen (process_isa_mode): Fix left shift of negative
494 2015-11-17 Mike Frysinger <vapier@gentoo.org>
496 * sim-main.h (WITH_MODULO_MEMORY): Delete.
498 2015-11-15 Mike Frysinger <vapier@gentoo.org>
500 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
502 2015-11-14 Mike Frysinger <vapier@gentoo.org>
504 * interp.c (sim_close): Rename to ...
505 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
507 * sim-main.h (mips_sim_close): Declare.
508 (SIM_CLOSE_HOOK): Define.
510 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
511 Ali Lown <ali.lown@imgtec.com>
513 * Makefile.in (tmp-micromips): New rule.
514 (tmp-mach-multi): Add support for micromips.
515 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
516 that works for both mips64 and micromips64.
517 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
519 Add build support for micromips.
520 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
521 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
522 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
523 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
524 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
525 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
526 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
527 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
528 Refactored instruction code to use these functions.
529 * dsp2.igen: Refactored instruction code to use the new functions.
530 * interp.c (decode_coproc): Refactored to work with any instruction
532 (isa_mode): New variable
533 (RSVD_INSTRUCTION): Changed to 0x00000039.
534 * m16.igen (BREAK16): Refactored instruction to use do_break16.
535 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
536 * micromips.dc: New file.
537 * micromips.igen: New file.
538 * micromips16.dc: New file.
539 * micromipsdsp.igen: New file.
540 * micromipsrun.c: New file.
541 * mips.igen (do_swc1): Changed to work with any instruction encoding.
542 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
543 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
544 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
545 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
546 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
547 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
548 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
549 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
550 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
551 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
552 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
553 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
554 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
555 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
556 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
557 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
558 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
559 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
561 Refactored instruction code to use these functions.
562 (RSVD): Changed to use new reserved instruction.
563 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
564 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
565 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
566 do_store_double): Added micromips32 and micromips64 models.
567 Added include for micromips.igen and micromipsdsp.igen
568 Add micromips32 and micromips64 models.
569 (DecodeCoproc): Updated to use new macro definition.
570 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
571 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
572 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
573 Refactored instruction code to use these functions.
574 * sim-main.h (CP0_operation): New enum.
575 (DecodeCoproc): Updated macro.
576 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
577 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
578 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
579 ISA_MODE_MICROMIPS): New defines.
580 (sim_state): Add isa_mode field.
582 2015-06-23 Mike Frysinger <vapier@gentoo.org>
584 * configure: Regenerate.
586 2015-06-12 Mike Frysinger <vapier@gentoo.org>
588 * configure.ac: Change configure.in to configure.ac.
589 * configure: Regenerate.
591 2015-06-12 Mike Frysinger <vapier@gentoo.org>
593 * configure: Regenerate.
595 2015-06-12 Mike Frysinger <vapier@gentoo.org>
597 * interp.c [TRACE]: Delete.
598 (TRACE): Change to WITH_TRACE_ANY_P.
599 [!WITH_TRACE_ANY_P] (open_trace): Define.
600 (mips_option_handler, open_trace, sim_close, dotrace):
601 Change defined(TRACE) to WITH_TRACE_ANY_P.
602 (sim_open): Delete TRACE ifdef check.
603 * sim-main.c (load_memory): Delete TRACE ifdef check.
604 (store_memory): Likewise.
605 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
606 [!WITH_TRACE_ANY_P] (dotrace): Define.
608 2015-04-18 Mike Frysinger <vapier@gentoo.org>
610 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
613 2015-04-18 Mike Frysinger <vapier@gentoo.org>
615 * sim-main.h (SIM_CPU): Delete.
617 2015-04-18 Mike Frysinger <vapier@gentoo.org>
619 * sim-main.h (sim_cia): Delete.
621 2015-04-17 Mike Frysinger <vapier@gentoo.org>
623 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
625 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
626 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
627 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
628 CIA_SET to CPU_PC_SET.
629 * sim-main.h (CIA_GET, CIA_SET): Delete.
631 2015-04-15 Mike Frysinger <vapier@gentoo.org>
633 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
634 * sim-main.h (STATE_CPU): Delete.
636 2015-04-13 Mike Frysinger <vapier@gentoo.org>
638 * configure: Regenerate.
640 2015-04-13 Mike Frysinger <vapier@gentoo.org>
642 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
643 * interp.c (mips_pc_get, mips_pc_set): New functions.
644 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
645 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
646 (sim_pc_get): Delete.
647 * sim-main.h (SIM_CPU): Define.
648 (struct sim_state): Change cpu to an array of pointers.
651 2015-04-13 Mike Frysinger <vapier@gentoo.org>
653 * interp.c (mips_option_handler, open_trace, sim_close,
654 sim_write, sim_read, sim_store_register, sim_fetch_register,
655 sim_create_inferior, pr_addr, pr_uword64): Convert old style
657 (sim_open): Convert old style prototype. Change casts with
658 sim_write to unsigned char *.
659 (fetch_str): Change null to unsigned char, and change cast to
661 (sim_monitor): Change c & ch to unsigned char. Change cast to
664 2015-04-12 Mike Frysinger <vapier@gentoo.org>
666 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
668 2015-04-06 Mike Frysinger <vapier@gentoo.org>
670 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
672 2015-04-01 Mike Frysinger <vapier@gentoo.org>
674 * tconfig.h (SIM_HAVE_PROFILE): Delete.
676 2015-03-31 Mike Frysinger <vapier@gentoo.org>
678 * config.in, configure: Regenerate.
680 2015-03-24 Mike Frysinger <vapier@gentoo.org>
682 * interp.c (sim_pc_get): New function.
684 2015-03-24 Mike Frysinger <vapier@gentoo.org>
686 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
687 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
689 2015-03-24 Mike Frysinger <vapier@gentoo.org>
691 * configure: Regenerate.
693 2015-03-23 Mike Frysinger <vapier@gentoo.org>
695 * configure: Regenerate.
697 2015-03-23 Mike Frysinger <vapier@gentoo.org>
699 * configure: Regenerate.
700 * configure.ac (mips_extra_objs): Delete.
701 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
702 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
704 2015-03-23 Mike Frysinger <vapier@gentoo.org>
706 * configure: Regenerate.
707 * configure.ac: Delete sim_hw checks for dv-sockser.
709 2015-03-16 Mike Frysinger <vapier@gentoo.org>
711 * config.in, configure: Regenerate.
712 * tconfig.in: Rename file ...
713 * tconfig.h: ... here.
715 2015-03-15 Mike Frysinger <vapier@gentoo.org>
717 * tconfig.in: Delete includes.
718 [HAVE_DV_SOCKSER]: Delete.
720 2015-03-14 Mike Frysinger <vapier@gentoo.org>
722 * Makefile.in (SIM_RUN_OBJS): Delete.
724 2015-03-14 Mike Frysinger <vapier@gentoo.org>
726 * configure.ac (AC_CHECK_HEADERS): Delete.
727 * aclocal.m4, configure: Regenerate.
729 2014-08-19 Alan Modra <amodra@gmail.com>
731 * configure: Regenerate.
733 2014-08-15 Roland McGrath <mcgrathr@google.com>
735 * configure: Regenerate.
736 * config.in: Regenerate.
738 2014-03-04 Mike Frysinger <vapier@gentoo.org>
740 * configure: Regenerate.
742 2013-09-23 Alan Modra <amodra@gmail.com>
744 * configure: Regenerate.
746 2013-06-03 Mike Frysinger <vapier@gentoo.org>
748 * aclocal.m4, configure: Regenerate.
750 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
752 * configure: Rebuild.
754 2013-03-26 Mike Frysinger <vapier@gentoo.org>
756 * configure: Regenerate.
758 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
760 * configure.ac: Address use of dv-sockser.o.
761 * tconfig.in: Conditionalize use of dv_sockser_install.
762 * configure: Regenerated.
763 * config.in: Regenerated.
765 2012-10-04 Chao-ying Fu <fu@mips.com>
766 Steve Ellcey <sellcey@mips.com>
768 * mips/mips3264r2.igen (rdhwr): New.
770 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
772 * configure.ac: Always link against dv-sockser.o.
773 * configure: Regenerate.
775 2012-06-15 Joel Brobecker <brobecker@adacore.com>
777 * config.in, configure: Regenerate.
779 2012-05-18 Nick Clifton <nickc@redhat.com>
782 * interp.c: Include config.h before system header files.
784 2012-03-24 Mike Frysinger <vapier@gentoo.org>
786 * aclocal.m4, config.in, configure: Regenerate.
788 2011-12-03 Mike Frysinger <vapier@gentoo.org>
790 * aclocal.m4: New file.
791 * configure: Regenerate.
793 2011-10-19 Mike Frysinger <vapier@gentoo.org>
795 * configure: Regenerate after common/acinclude.m4 update.
797 2011-10-17 Mike Frysinger <vapier@gentoo.org>
799 * configure.ac: Change include to common/acinclude.m4.
801 2011-10-17 Mike Frysinger <vapier@gentoo.org>
803 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
804 call. Replace common.m4 include with SIM_AC_COMMON.
805 * configure: Regenerate.
807 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
809 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
811 (tmp-mach-multi): Exit early when igen fails.
813 2011-07-05 Mike Frysinger <vapier@gentoo.org>
815 * interp.c (sim_do_command): Delete.
817 2011-02-14 Mike Frysinger <vapier@gentoo.org>
819 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
820 (tx3904sio_fifo_reset): Likewise.
821 * interp.c (sim_monitor): Likewise.
823 2010-04-14 Mike Frysinger <vapier@gentoo.org>
825 * interp.c (sim_write): Add const to buffer arg.
827 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
829 * interp.c: Don't include sysdep.h
831 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
833 * configure: Regenerate.
835 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
837 * config.in: Regenerate.
838 * configure: Likewise.
840 * configure: Regenerate.
842 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
844 * configure: Regenerate to track ../common/common.m4 changes.
847 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
848 Daniel Jacobowitz <dan@codesourcery.com>
849 Joseph Myers <joseph@codesourcery.com>
851 * configure: Regenerate.
853 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
855 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
856 that unconditionally allows fmt_ps.
857 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
858 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
859 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
860 filter from 64,f to 32,f.
861 (PREFX): Change filter from 64 to 32.
862 (LDXC1, LUXC1): Provide separate mips32r2 implementations
863 that use do_load_double instead of do_load. Make both LUXC1
864 versions unpredictable if SizeFGR () != 64.
865 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
866 instead of do_store. Remove unused variable. Make both SUXC1
867 versions unpredictable if SizeFGR () != 64.
869 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
871 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
872 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
873 shifts for that case.
875 2007-09-04 Nick Clifton <nickc@redhat.com>
877 * interp.c (options enum): Add OPTION_INFO_MEMORY.
878 (display_mem_info): New static variable.
879 (mips_option_handler): Handle OPTION_INFO_MEMORY.
880 (mips_options): Add info-memory and memory-info.
881 (sim_open): After processing the command line and board
882 specification, check display_mem_info. If it is set then
883 call the real handler for the --memory-info command line
886 2007-08-24 Joel Brobecker <brobecker@adacore.com>
888 * configure.ac: Change license of multi-run.c to GPL version 3.
889 * configure: Regenerate.
891 2007-06-28 Richard Sandiford <richard@codesourcery.com>
893 * configure.ac, configure: Revert last patch.
895 2007-06-26 Richard Sandiford <richard@codesourcery.com>
897 * configure.ac (sim_mipsisa3264_configs): New variable.
898 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
899 every configuration support all four targets, using the triplet to
900 determine the default.
901 * configure: Regenerate.
903 2007-06-25 Richard Sandiford <richard@codesourcery.com>
905 * Makefile.in (m16run.o): New rule.
907 2007-05-15 Thiemo Seufer <ths@mips.com>
909 * mips3264r2.igen (DSHD): Fix compile warning.
911 2007-05-14 Thiemo Seufer <ths@mips.com>
913 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
914 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
915 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
916 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
919 2007-03-01 Thiemo Seufer <ths@mips.com>
921 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
924 2007-02-20 Thiemo Seufer <ths@mips.com>
926 * dsp.igen: Update copyright notice.
927 * dsp2.igen: Fix copyright notice.
929 2007-02-20 Thiemo Seufer <ths@mips.com>
930 Chao-Ying Fu <fu@mips.com>
932 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
933 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
934 Add dsp2 to sim_igen_machine.
935 * configure: Regenerate.
936 * dsp.igen (do_ph_op): Add MUL support when op = 2.
937 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
938 (mulq_rs.ph): Use do_ph_mulq.
939 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
940 * mips.igen: Add dsp2 model and include dsp2.igen.
941 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
942 for *mips32r2, *mips64r2, *dsp.
943 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
944 for *mips32r2, *mips64r2, *dsp2.
945 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
947 2007-02-19 Thiemo Seufer <ths@mips.com>
948 Nigel Stephens <nigel@mips.com>
950 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
951 jumps with hazard barrier.
953 2007-02-19 Thiemo Seufer <ths@mips.com>
954 Nigel Stephens <nigel@mips.com>
956 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
957 after each call to sim_io_write.
959 2007-02-19 Thiemo Seufer <ths@mips.com>
960 Nigel Stephens <nigel@mips.com>
962 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
963 supported by this simulator.
964 (decode_coproc): Recognise additional CP0 Config registers
967 2007-02-19 Thiemo Seufer <ths@mips.com>
968 Nigel Stephens <nigel@mips.com>
969 David Ung <davidu@mips.com>
971 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
972 uninterpreted formats. If fmt is one of the uninterpreted types
973 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
974 fmt_word, and fmt_uninterpreted_64 like fmt_long.
975 (store_fpr): When writing an invalid odd register, set the
976 matching even register to fmt_unknown, not the following register.
977 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
978 the the memory window at offset 0 set by --memory-size command
980 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
982 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
984 (sim_monitor): When returning the memory size to the MIPS
985 application, use the value in STATE_MEM_SIZE, not an arbitrary
987 (cop_lw): Don' mess around with FPR_STATE, just pass
988 fmt_uninterpreted_32 to StoreFPR.
990 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
992 * mips.igen (not_word_value): Single version for mips32, mips64
995 2007-02-19 Thiemo Seufer <ths@mips.com>
996 Nigel Stephens <nigel@mips.com>
998 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
1001 2007-02-17 Thiemo Seufer <ths@mips.com>
1003 * configure.ac (mips*-sde-elf*): Move in front of generic machine
1005 * configure: Regenerate.
1007 2007-02-17 Thiemo Seufer <ths@mips.com>
1009 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
1010 Add mdmx to sim_igen_machine.
1011 (mipsisa64*-*-*): Likewise. Remove dsp.
1012 (mipsisa32*-*-*): Remove dsp.
1013 * configure: Regenerate.
1015 2007-02-13 Thiemo Seufer <ths@mips.com>
1017 * configure.ac: Add mips*-sde-elf* target.
1018 * configure: Regenerate.
1020 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
1022 * acconfig.h: Remove.
1023 * config.in, configure: Regenerate.
1025 2006-11-07 Thiemo Seufer <ths@mips.com>
1027 * dsp.igen (do_w_op): Fix compiler warning.
1029 2006-08-29 Thiemo Seufer <ths@mips.com>
1030 David Ung <davidu@mips.com>
1032 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
1034 * configure: Regenerate.
1035 * mips.igen (model): Add smartmips.
1036 (MADDU): Increment ACX if carry.
1037 (do_mult): Clear ACX.
1038 (ROR,RORV): Add smartmips.
1039 (include): Include smartmips.igen.
1040 * sim-main.h (ACX): Set to REGISTERS[89].
1041 * smartmips.igen: New file.
1043 2006-08-29 Thiemo Seufer <ths@mips.com>
1044 David Ung <davidu@mips.com>
1046 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
1047 mips3264r2.igen. Add missing dependency rules.
1048 * m16e.igen: Support for mips16e save/restore instructions.
1050 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
1052 * configure: Regenerated.
1054 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1056 * configure: Regenerated.
1058 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1060 * configure: Regenerated.
1062 2006-05-15 Chao-ying Fu <fu@mips.com>
1064 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
1066 2006-04-18 Nick Clifton <nickc@redhat.com>
1068 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
1071 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
1073 * configure: Regenerate.
1075 2005-12-14 Chao-ying Fu <fu@mips.com>
1077 * Makefile.in (SIM_OBJS): Add dsp.o.
1078 (dsp.o): New dependency.
1079 (IGEN_INCLUDE): Add dsp.igen.
1080 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
1081 mipsisa64*-*-*): Add dsp to sim_igen_machine.
1082 * configure: Regenerate.
1083 * mips.igen: Add dsp model and include dsp.igen.
1084 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
1085 because these instructions are extended in DSP ASE.
1086 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
1087 adding 6 DSP accumulator registers and 1 DSP control register.
1088 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
1089 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
1090 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
1091 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
1092 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
1093 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
1094 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
1095 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
1096 DSPCR_CCOND_SMASK): New define.
1097 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
1098 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
1100 2005-07-08 Ian Lance Taylor <ian@airs.com>
1102 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
1104 2005-06-16 David Ung <davidu@mips.com>
1105 Nigel Stephens <nigel@mips.com>
1107 * mips.igen: New mips16e model and include m16e.igen.
1108 (check_u64): Add mips16e tag.
1109 * m16e.igen: New file for MIPS16e instructions.
1110 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
1111 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
1113 * configure: Regenerate.
1115 2005-05-26 David Ung <davidu@mips.com>
1117 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
1118 tags to all instructions which are applicable to the new ISAs.
1119 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1121 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1123 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1125 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1126 * configure: Regenerate.
1128 2005-03-23 Mark Kettenis <kettenis@gnu.org>
1130 * configure: Regenerate.
1132 2005-01-14 Andrew Cagney <cagney@gnu.org>
1134 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
1135 explicit call to AC_CONFIG_HEADER.
1136 * configure: Regenerate.
1138 2005-01-12 Andrew Cagney <cagney@gnu.org>
1140 * configure.ac: Update to use ../common/common.m4.
1141 * configure: Re-generate.
1143 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
1145 * configure: Regenerated to track ../common/aclocal.m4 changes.
1147 2005-01-07 Andrew Cagney <cagney@gnu.org>
1149 * configure.ac: Rename configure.in, require autoconf 2.59.
1150 * configure: Re-generate.
1152 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
1154 * configure: Regenerate for ../common/aclocal.m4 update.
1156 2004-09-24 Monika Chaddha <monika@acmet.com>
1158 Committed by Andrew Cagney.
1159 * m16.igen (CMP, CMPI): Fix assembler.
1161 2004-08-18 Chris Demetriou <cgd@broadcom.com>
1163 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1164 * configure: Regenerate.
1166 2004-06-25 Chris Demetriou <cgd@broadcom.com>
1168 * configure.in (sim_m16_machine): Include mipsIII.
1169 * configure: Regenerate.
1171 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
1173 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1175 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1177 2004-04-10 Chris Demetriou <cgd@broadcom.com>
1179 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1181 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1183 * mips.igen (check_fmt): Remove.
1184 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1185 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1186 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1187 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1188 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1189 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1190 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1191 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1192 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1193 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1195 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1197 * sb1.igen (check_sbx): New function.
1198 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1200 2004-03-29 Chris Demetriou <cgd@broadcom.com>
1201 Richard Sandiford <rsandifo@redhat.com>
1203 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1204 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1205 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1206 separate implementations for mipsIV and mipsV. Use new macros to
1207 determine whether the restrictions apply.
1209 2004-01-19 Chris Demetriou <cgd@broadcom.com>
1211 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1212 (check_mult_hilo): Improve comments.
1213 (check_div_hilo): Likewise. Also, fork off a new version
1214 to handle mips32/mips64 (since there are no hazards to check
1217 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
1219 * mips.igen (do_dmultx): Fix check for negative operands.
1221 2003-05-16 Ian Lance Taylor <ian@airs.com>
1223 * Makefile.in (SHELL): Make sure this is defined.
1224 (various): Use $(SHELL) whenever we invoke move-if-change.
1226 2003-05-03 Chris Demetriou <cgd@broadcom.com>
1228 * cp1.c: Tweak attribution slightly.
1231 * mdmx.igen: Likewise.
1232 * mips3d.igen: Likewise.
1233 * sb1.igen: Likewise.
1235 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
1237 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1240 2003-02-27 Andrew Cagney <cagney@redhat.com>
1242 * interp.c (sim_open): Rename _bfd to bfd.
1243 (sim_create_inferior): Ditto.
1245 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1247 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1249 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1251 * mips.igen (EI, DI): Remove.
1253 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
1255 * Makefile.in (tmp-run-multi): Fix mips16 filter.
1257 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
1258 Andrew Cagney <ac131313@redhat.com>
1259 Gavin Romig-Koch <gavin@redhat.com>
1260 Graydon Hoare <graydon@redhat.com>
1261 Aldy Hernandez <aldyh@redhat.com>
1262 Dave Brolley <brolley@redhat.com>
1263 Chris Demetriou <cgd@broadcom.com>
1265 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1266 (sim_mach_default): New variable.
1267 (mips64vr-*-*, mips64vrel-*-*): New configurations.
1268 Add a new simulator generator, MULTI.
1269 * configure: Regenerate.
1270 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1271 (multi-run.o): New dependency.
1272 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1273 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1274 (tmp-multi): Combine them.
1275 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
1276 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1277 (distclean-extra): New rule.
1278 * sim-main.h: Include bfd.h.
1279 (MIPS_MACH): New macro.
1280 * mips.igen (vr4120, vr5400, vr5500): New models.
1281 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1282 * vr.igen: Replace with new version.
1284 2003-01-04 Chris Demetriou <cgd@broadcom.com>
1286 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1287 * configure: Regenerate.
1289 2002-12-31 Chris Demetriou <cgd@broadcom.com>
1291 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1292 * mips.igen: Remove all invocations of check_branch_bug and
1295 2002-12-16 Chris Demetriou <cgd@broadcom.com>
1297 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1299 2002-07-30 Chris Demetriou <cgd@broadcom.com>
1301 * mips.igen (do_load_double, do_store_double): New functions.
1302 (LDC1, SDC1): Rename to...
1303 (LDC1b, SDC1b): respectively.
1304 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1306 2002-07-29 Michael Snyder <msnyder@redhat.com>
1308 * cp1.c (fp_recip2): Modify initialization expression so that
1309 GCC will recognize it as constant.
1311 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1313 * mdmx.c (SD_): Delete.
1314 (Unpredictable): Re-define, for now, to directly invoke
1315 unpredictable_action().
1316 (mdmx_acc_op): Fix error in .ob immediate handling.
1318 2002-06-18 Andrew Cagney <cagney@redhat.com>
1320 * interp.c (sim_firmware_command): Initialize `address'.
1322 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1324 * configure: Regenerated to track ../common/aclocal.m4 changes.
1326 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1327 Ed Satterthwaite <ehs@broadcom.com>
1329 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1330 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1331 * mips.igen: Include mips3d.igen.
1332 (mips3d): New model name for MIPS-3D ASE instructions.
1333 (CVT.W.fmt): Don't use this instruction for word (source) format
1335 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1336 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1337 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1338 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1339 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1340 (RSquareRoot1, RSquareRoot2): New macros.
1341 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1342 (fp_rsqrt2): New functions.
1343 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1344 * configure: Regenerate.
1346 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1347 Ed Satterthwaite <ehs@broadcom.com>
1349 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1350 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1351 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1352 (convert): Note that this function is not used for paired-single
1354 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1355 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1356 (check_fmt_p): Enable paired-single support.
1357 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1358 (PUU.PS): New instructions.
1359 (CVT.S.fmt): Don't use this instruction for paired-single format
1361 * sim-main.h (FP_formats): New value 'fmt_ps.'
1362 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1363 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1365 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1367 * mips.igen: Fix formatting of function calls in
1370 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1372 * mips.igen (MOVN, MOVZ): Trace result.
1373 (TNEI): Print "tnei" as the opcode name in traces.
1374 (CEIL.W): Add disassembly string for traces.
1375 (RSQRT.fmt): Make location of disassembly string consistent
1376 with other instructions.
1378 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1380 * mips.igen (X): Delete unused function.
1382 2002-06-08 Andrew Cagney <cagney@redhat.com>
1384 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1386 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1387 Ed Satterthwaite <ehs@broadcom.com>
1389 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1390 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1391 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1392 (fp_nmsub): New prototypes.
1393 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1394 (NegMultiplySub): New defines.
1395 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1396 (MADD.D, MADD.S): Replace with...
1397 (MADD.fmt): New instruction.
1398 (MSUB.D, MSUB.S): Replace with...
1399 (MSUB.fmt): New instruction.
1400 (NMADD.D, NMADD.S): Replace with...
1401 (NMADD.fmt): New instruction.
1402 (NMSUB.D, MSUB.S): Replace with...
1403 (NMSUB.fmt): New instruction.
1405 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1406 Ed Satterthwaite <ehs@broadcom.com>
1408 * cp1.c: Fix more comment spelling and formatting.
1409 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1410 (denorm_mode): New function.
1411 (fpu_unary, fpu_binary): Round results after operation, collect
1412 status from rounding operations, and update the FCSR.
1413 (convert): Collect status from integer conversions and rounding
1414 operations, and update the FCSR. Adjust NaN values that result
1415 from conversions. Convert to use sim_io_eprintf rather than
1416 fprintf, and remove some debugging code.
1417 * cp1.h (fenr_FS): New define.
1419 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1421 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1422 rounding mode to sim FP rounding mode flag conversion code into...
1423 (rounding_mode): New function.
1425 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1427 * cp1.c: Clean up formatting of a few comments.
1428 (value_fpr): Reformat switch statement.
1430 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1431 Ed Satterthwaite <ehs@broadcom.com>
1434 * sim-main.h: Include cp1.h.
1435 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1436 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1437 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1438 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1439 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1440 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1441 * cp1.c: Don't include sim-fpu.h; already included by
1442 sim-main.h. Clean up formatting of some comments.
1443 (NaN, Equal, Less): Remove.
1444 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1445 (fp_cmp): New functions.
1446 * mips.igen (do_c_cond_fmt): Remove.
1447 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1448 Compare. Add result tracing.
1449 (CxC1): Remove, replace with...
1450 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1451 (DMxC1): Remove, replace with...
1452 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1453 (MxC1): Remove, replace with...
1454 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1456 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1458 * sim-main.h (FGRIDX): Remove, replace all uses with...
1459 (FGR_BASE): New macro.
1460 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1461 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1462 (NR_FGR, FGR): Likewise.
1463 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1464 * mips.igen: Likewise.
1466 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1468 * cp1.c: Add an FSF Copyright notice to this file.
1470 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1471 Ed Satterthwaite <ehs@broadcom.com>
1473 * cp1.c (Infinity): Remove.
1474 * sim-main.h (Infinity): Likewise.
1476 * cp1.c (fp_unary, fp_binary): New functions.
1477 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1478 (fp_sqrt): New functions, implemented in terms of the above.
1479 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1480 (Recip, SquareRoot): Remove (replaced by functions above).
1481 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1482 (fp_recip, fp_sqrt): New prototypes.
1483 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1484 (Recip, SquareRoot): Replace prototypes with #defines which
1485 invoke the functions above.
1487 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1489 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1490 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1491 file, remove PARAMS from prototypes.
1492 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1493 simulator state arguments.
1494 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1495 pass simulator state arguments.
1496 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1497 (store_fpr, convert): Remove 'sd' argument.
1498 (value_fpr): Likewise. Convert to use 'SD' instead.
1500 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1502 * cp1.c (Min, Max): Remove #if 0'd functions.
1503 * sim-main.h (Min, Max): Remove.
1505 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1507 * cp1.c: fix formatting of switch case and default labels.
1508 * interp.c: Likewise.
1509 * sim-main.c: Likewise.
1511 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1513 * cp1.c: Clean up comments which describe FP formats.
1514 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1516 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1517 Ed Satterthwaite <ehs@broadcom.com>
1519 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1520 Broadcom SiByte SB-1 processor configurations.
1521 * configure: Regenerate.
1522 * sb1.igen: New file.
1523 * mips.igen: Include sb1.igen.
1525 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1526 * mdmx.igen: Add "sb1" model to all appropriate functions and
1528 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1529 (ob_func, ob_acc): Reference the above.
1530 (qh_acc): Adjust to keep the same size as ob_acc.
1531 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1532 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1534 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1536 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1538 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1539 Ed Satterthwaite <ehs@broadcom.com>
1541 * mips.igen (mdmx): New (pseudo-)model.
1542 * mdmx.c, mdmx.igen: New files.
1543 * Makefile.in (SIM_OBJS): Add mdmx.o.
1544 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1546 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1547 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1548 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1549 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1550 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1551 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1552 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1553 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1554 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1555 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1556 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1557 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1558 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1559 (qh_fmtsel): New macros.
1560 (_sim_cpu): New member "acc".
1561 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1562 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1564 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1566 * interp.c: Use 'deprecated' rather than 'depreciated.'
1567 * sim-main.h: Likewise.
1569 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1571 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1572 which wouldn't compile anyway.
1573 * sim-main.h (unpredictable_action): New function prototype.
1574 (Unpredictable): Define to call igen function unpredictable().
1575 (NotWordValue): New macro to call igen function not_word_value().
1576 (UndefinedResult): Remove.
1577 * interp.c (undefined_result): Remove.
1578 (unpredictable_action): New function.
1579 * mips.igen (not_word_value, unpredictable): New functions.
1580 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1581 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1582 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1583 NotWordValue() to check for unpredictable inputs, then
1584 Unpredictable() to handle them.
1586 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1588 * mips.igen: Fix formatting of calls to Unpredictable().
1590 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1592 * interp.c (sim_open): Revert previous change.
1594 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1596 * interp.c (sim_open): Disable chunk of code that wrote code in
1597 vector table entries.
1599 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1601 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1602 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1605 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1607 * cp1.c: Fix many formatting issues.
1609 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1611 * cp1.c (fpu_format_name): New function to replace...
1612 (DOFMT): This. Delete, and update all callers.
1613 (fpu_rounding_mode_name): New function to replace...
1614 (RMMODE): This. Delete, and update all callers.
1616 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1618 * interp.c: Move FPU support routines from here to...
1619 * cp1.c: Here. New file.
1620 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1621 (cp1.o): New target.
1623 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1625 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1626 * mips.igen (mips32, mips64): New models, add to all instructions
1627 and functions as appropriate.
1628 (loadstore_ea, check_u64): New variant for model mips64.
1629 (check_fmt_p): New variant for models mipsV and mips64, remove
1630 mipsV model marking fro other variant.
1633 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1634 for mips32 and mips64.
1635 (DCLO, DCLZ): New instructions for mips64.
1637 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1639 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1640 immediate or code as a hex value with the "%#lx" format.
1641 (ANDI): Likewise, and fix printed instruction name.
1643 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1645 * sim-main.h (UndefinedResult, Unpredictable): New macros
1646 which currently do nothing.
1648 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1650 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1651 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1652 (status_CU3): New definitions.
1654 * sim-main.h (ExceptionCause): Add new values for MIPS32
1655 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1656 for DebugBreakPoint and NMIReset to note their status in
1658 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1659 (SignalExceptionCacheErr): New exception macros.
1661 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1663 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1664 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1666 (SignalExceptionCoProcessorUnusable): Take as argument the
1667 unusable coprocessor number.
1669 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1671 * mips.igen: Fix formatting of all SignalException calls.
1673 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1675 * sim-main.h (SIGNEXTEND): Remove.
1677 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1679 * mips.igen: Remove gencode comment from top of file, fix
1680 spelling in another comment.
1682 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1684 * mips.igen (check_fmt, check_fmt_p): New functions to check
1685 whether specific floating point formats are usable.
1686 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1687 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1688 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1689 Use the new functions.
1690 (do_c_cond_fmt): Remove format checks...
1691 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1693 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1695 * mips.igen: Fix formatting of check_fpu calls.
1697 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1699 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1701 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1703 * mips.igen: Remove whitespace at end of lines.
1705 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1707 * mips.igen (loadstore_ea): New function to do effective
1708 address calculations.
1709 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1710 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1711 CACHE): Use loadstore_ea to do effective address computations.
1713 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1715 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1716 * mips.igen (LL, CxC1, MxC1): Likewise.
1718 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1720 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1721 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1722 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1723 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1724 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1725 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1726 Don't split opcode fields by hand, use the opcode field values
1729 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1731 * mips.igen (do_divu): Fix spacing.
1733 * mips.igen (do_dsllv): Move to be right before DSLLV,
1734 to match the rest of the do_<shift> functions.
1736 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1738 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1739 DSRL32, do_dsrlv): Trace inputs and results.
1741 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1743 * mips.igen (CACHE): Provide instruction-printing string.
1745 * interp.c (signal_exception): Comment tokens after #endif.
1747 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1749 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1750 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1751 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1752 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1753 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1754 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1755 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1756 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1758 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1760 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1761 instruction-printing string.
1762 (LWU): Use '64' as the filter flag.
1764 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1766 * mips.igen (SDXC1): Fix instruction-printing string.
1768 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1770 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1771 filter flags "32,f".
1773 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1775 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1778 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1780 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1781 add a comma) so that it more closely match the MIPS ISA
1782 documentation opcode partitioning.
1783 (PREF): Put useful names on opcode fields, and include
1784 instruction-printing string.
1786 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1788 * mips.igen (check_u64): New function which in the future will
1789 check whether 64-bit instructions are usable and signal an
1790 exception if not. Currently a no-op.
1791 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1792 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1793 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1794 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1796 * mips.igen (check_fpu): New function which in the future will
1797 check whether FPU instructions are usable and signal an exception
1798 if not. Currently a no-op.
1799 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1800 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1801 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1802 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1803 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1804 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1805 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1806 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1808 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1810 * mips.igen (do_load_left, do_load_right): Move to be immediately
1812 (do_store_left, do_store_right): Move to be immediately following
1815 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1817 * mips.igen (mipsV): New model name. Also, add it to
1818 all instructions and functions where it is appropriate.
1820 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1822 * mips.igen: For all functions and instructions, list model
1823 names that support that instruction one per line.
1825 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1827 * mips.igen: Add some additional comments about supported
1828 models, and about which instructions go where.
1829 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1830 order as is used in the rest of the file.
1832 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1834 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1835 indicating that ALU32_END or ALU64_END are there to check
1837 (DADD): Likewise, but also remove previous comment about
1840 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1842 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1843 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1844 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1845 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1846 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1847 fields (i.e., add and move commas) so that they more closely
1848 match the MIPS ISA documentation opcode partitioning.
1850 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1852 * mips.igen (ADDI): Print immediate value.
1853 (BREAK): Print code.
1854 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1855 (SLL): Print "nop" specially, and don't run the code
1856 that does the shift for the "nop" case.
1858 2001-11-17 Fred Fish <fnf@redhat.com>
1860 * sim-main.h (float_operation): Move enum declaration outside
1861 of _sim_cpu struct declaration.
1863 2001-04-12 Jim Blandy <jimb@redhat.com>
1865 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1866 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1868 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1869 PENDING_FILL, and you can get the intended effect gracefully by
1870 calling PENDING_SCHED directly.
1872 2001-02-23 Ben Elliston <bje@redhat.com>
1874 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1875 already defined elsewhere.
1877 2001-02-19 Ben Elliston <bje@redhat.com>
1879 * sim-main.h (sim_monitor): Return an int.
1880 * interp.c (sim_monitor): Add return values.
1881 (signal_exception): Handle error conditions from sim_monitor.
1883 2001-02-08 Ben Elliston <bje@redhat.com>
1885 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1886 (store_memory): Likewise, pass cia to sim_core_write*.
1888 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1890 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1891 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1893 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1895 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1896 * Makefile.in: Don't delete *.igen when cleaning directory.
1898 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1900 * m16.igen (break): Call SignalException not sim_engine_halt.
1902 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1904 From Jason Eckhardt:
1905 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1907 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1909 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1911 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1913 * mips.igen (do_dmultx): Fix typo.
1915 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1917 * configure: Regenerated to track ../common/aclocal.m4 changes.
1919 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1921 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1923 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1925 * sim-main.h (GPR_CLEAR): Define macro.
1927 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1929 * interp.c (decode_coproc): Output long using %lx and not %s.
1931 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1933 * interp.c (sim_open): Sort & extend dummy memory regions for
1934 --board=jmr3904 for eCos.
1936 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1938 * configure: Regenerated.
1940 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1942 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1943 calls, conditional on the simulator being in verbose mode.
1945 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1947 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1948 cache don't get ReservedInstruction traps.
1950 1999-11-29 Mark Salter <msalter@cygnus.com>
1952 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1953 to clear status bits in sdisr register. This is how the hardware works.
1955 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1956 being used by cygmon.
1958 1999-11-11 Andrew Haley <aph@cygnus.com>
1960 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1963 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1965 * mips.igen (MULT): Correct previous mis-applied patch.
1967 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1969 * mips.igen (delayslot32): Handle sequence like
1970 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1971 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1972 (MULT): Actually pass the third register...
1974 1999-09-03 Mark Salter <msalter@cygnus.com>
1976 * interp.c (sim_open): Added more memory aliases for additional
1977 hardware being touched by cygmon on jmr3904 board.
1979 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1981 * configure: Regenerated to track ../common/aclocal.m4 changes.
1983 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1985 * interp.c (sim_store_register): Handle case where client - GDB -
1986 specifies that a 4 byte register is 8 bytes in size.
1987 (sim_fetch_register): Ditto.
1989 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1991 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1992 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1993 (idt_monitor_base): Base address for IDT monitor traps.
1994 (pmon_monitor_base): Ditto for PMON.
1995 (lsipmon_monitor_base): Ditto for LSI PMON.
1996 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1997 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1998 (sim_firmware_command): New function.
1999 (mips_option_handler): Call it for OPTION_FIRMWARE.
2000 (sim_open): Allocate memory for idt_monitor region. If "--board"
2001 option was given, add no monitor by default. Add BREAK hooks only if
2002 monitors are also there.
2004 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
2006 * interp.c (sim_monitor): Flush output before reading input.
2008 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
2010 * tconfig.in (SIM_HANDLES_LMA): Always define.
2012 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
2014 From Mark Salter <msalter@cygnus.com>:
2015 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
2016 (sim_open): Add setup for BSP board.
2018 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
2020 * mips.igen (MULT, MULTU): Add syntax for two operand version.
2021 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
2022 them as unimplemented.
2024 1999-05-08 Felix Lee <flee@cygnus.com>
2026 * configure: Regenerated to track ../common/aclocal.m4 changes.
2028 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
2030 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
2032 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
2034 * configure.in: Any mips64vr5*-*-* target should have
2035 -DTARGET_ENABLE_FR=1.
2036 (default_endian): Any mips64vr*el-*-* target should default to
2038 * configure: Re-generate.
2040 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
2042 * mips.igen (ldl): Extend from _16_, not 32.
2044 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
2046 * interp.c (sim_store_register): Force registers written to by GDB
2047 into an un-interpreted state.
2049 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
2051 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
2052 CPU, start periodic background I/O polls.
2053 (tx3904sio_poll): New function: periodic I/O poller.
2055 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
2057 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
2059 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
2061 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
2064 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
2066 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
2067 (load_word): Call SIM_CORE_SIGNAL hook on error.
2068 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
2069 starting. For exception dispatching, pass PC instead of NULL_CIA.
2070 (decode_coproc): Use COP0_BADVADDR to store faulting address.
2071 * sim-main.h (COP0_BADVADDR): Define.
2072 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
2073 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
2074 (_sim_cpu): Add exc_* fields to store register value snapshots.
2075 * mips.igen (*): Replace memory-related SignalException* calls
2076 with references to SIM_CORE_SIGNAL hook.
2078 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
2080 * sim-main.c (*): Minor warning cleanups.
2082 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
2084 * m16.igen (DADDIU5): Correct type-o.
2086 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
2088 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
2091 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
2093 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
2095 (interp.o): Add dependency on itable.h
2096 (oengine.c, gencode): Delete remaining references.
2097 (BUILT_SRC_FROM_GEN): Clean up.
2099 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
2102 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
2103 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
2104 tmp-run-hack) : New.
2105 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
2106 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
2107 Drop the "64" qualifier to get the HACK generator working.
2108 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
2109 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
2110 qualifier to get the hack generator working.
2111 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
2112 (DSLL): Use do_dsll.
2113 (DSLLV): Use do_dsllv.
2114 (DSRA): Use do_dsra.
2115 (DSRL): Use do_dsrl.
2116 (DSRLV): Use do_dsrlv.
2117 (BC1): Move *vr4100 to get the HACK generator working.
2118 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2119 get the HACK generator working.
2120 (MACC) Rename to get the HACK generator working.
2121 (DMACC,MACCS,DMACCS): Add the 64.
2123 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
2125 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2126 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2128 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
2130 * mips/interp.c (DEBUG): Cleanups.
2132 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
2134 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2135 (tx3904sio_tickle): fflush after a stdout character output.
2137 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
2139 * interp.c (sim_close): Uninstall modules.
2141 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
2143 * sim-main.h, interp.c (sim_monitor): Change to global
2146 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2148 * configure.in (vr4100): Only include vr4100 instructions in
2150 * configure: Re-generate.
2151 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2153 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2155 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2156 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2159 * configure.in (sim_default_gen, sim_use_gen): Replace with
2161 (--enable-sim-igen): Delete config option. Always using IGEN.
2162 * configure: Re-generate.
2164 * Makefile.in (gencode): Kill, kill, kill.
2167 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2169 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2170 bit mips16 igen simulator.
2171 * configure: Re-generate.
2173 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2174 as part of vr4100 ISA.
2175 * vr.igen: Mark all instructions as 64 bit only.
2177 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2179 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2182 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
2184 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2185 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
2186 * configure: Re-generate.
2188 * m16.igen (BREAK): Define breakpoint instruction.
2189 (JALX32): Mark instruction as mips16 and not r3900.
2190 * mips.igen (C.cond.fmt): Fix typo in instruction format.
2192 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2194 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2196 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2197 insn as a debug breakpoint.
2199 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2201 (PENDING_SCHED): Clean up trace statement.
2202 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2203 (PENDING_FILL): Delay write by only one cycle.
2204 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2206 * sim-main.c (pending_tick): Clean up trace statements. Add trace
2208 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2210 (pending_tick): Move incrementing of index to FOR statement.
2211 (pending_tick): Only update PENDING_OUT after a write has occured.
2213 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2215 * configure: Re-generate.
2217 * interp.c (sim_engine_run OLD): Delete explicit call to
2218 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2220 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
2222 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2223 interrupt level number to match changed SignalExceptionInterrupt
2226 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
2228 * interp.c: #include "itable.h" if WITH_IGEN.
2229 (get_insn_name): New function.
2230 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2231 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2233 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
2235 * configure: Rebuilt to inhale new common/aclocal.m4.
2237 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
2239 * dv-tx3904sio.c: Include sim-assert.h.
2241 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
2243 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2244 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2245 Reorganize target-specific sim-hardware checks.
2246 * configure: rebuilt.
2247 * interp.c (sim_open): For tx39 target boards, set
2248 OPERATING_ENVIRONMENT, add tx3904sio devices.
2249 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2250 ROM executables. Install dv-sockser into sim-modules list.
2252 * dv-tx3904irc.c: Compiler warning clean-up.
2253 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
2254 frequent hw-trace messages.
2256 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2258 * vr.igen (MulAcc): Identify as a vr4100 specific function.
2260 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2262 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2264 * vr.igen: New file.
2265 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2266 * mips.igen: Define vr4100 model. Include vr.igen.
2267 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
2269 * mips.igen (check_mf_hilo): Correct check.
2271 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2273 * sim-main.h (interrupt_event): Add prototype.
2275 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2276 register_ptr, register_value.
2277 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2279 * sim-main.h (tracefh): Make extern.
2281 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
2283 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2284 Reduce unnecessarily high timer event frequency.
2285 * dv-tx3904cpu.c: Ditto for interrupt event.
2287 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
2289 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2291 (interrupt_event): Made non-static.
2293 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2294 interchange of configuration values for external vs. internal
2297 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
2299 * mips.igen (BREAK): Moved code to here for
2300 simulator-reserved break instructions.
2301 * gencode.c (build_instruction): Ditto.
2302 * interp.c (signal_exception): Code moved from here. Non-
2303 reserved instructions now use exception vector, rather
2305 * sim-main.h: Moved magic constants to here.
2307 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
2309 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2310 register upon non-zero interrupt event level, clear upon zero
2312 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2313 by passing zero event value.
2314 (*_io_{read,write}_buffer): Endianness fixes.
2315 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2316 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2318 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2319 serial I/O and timer module at base address 0xFFFF0000.
2321 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2323 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2326 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2328 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2330 * configure: Update.
2332 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2334 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2335 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2336 * configure.in: Include tx3904tmr in hw_device list.
2337 * configure: Rebuilt.
2338 * interp.c (sim_open): Instantiate three timer instances.
2339 Fix address typo of tx3904irc instance.
2341 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2343 * interp.c (signal_exception): SystemCall exception now uses
2344 the exception vector.
2346 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2348 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2351 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2353 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2355 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2357 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2359 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2360 sim-main.h. Declare a struct hw_descriptor instead of struct
2361 hw_device_descriptor.
2363 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2365 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2366 right bits and then re-align left hand bytes to correct byte
2367 lanes. Fix incorrect computation in do_store_left when loading
2368 bytes from second word.
2370 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2372 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2373 * interp.c (sim_open): Only create a device tree when HW is
2376 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2377 * interp.c (signal_exception): Ditto.
2379 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2381 * gencode.c: Mark BEGEZALL as LIKELY.
2383 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2385 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2386 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2388 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2390 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2391 modules. Recognize TX39 target with "mips*tx39" pattern.
2392 * configure: Rebuilt.
2393 * sim-main.h (*): Added many macros defining bits in
2394 TX39 control registers.
2395 (SignalInterrupt): Send actual PC instead of NULL.
2396 (SignalNMIReset): New exception type.
2397 * interp.c (board): New variable for future use to identify
2398 a particular board being simulated.
2399 (mips_option_handler,mips_options): Added "--board" option.
2400 (interrupt_event): Send actual PC.
2401 (sim_open): Make memory layout conditional on board setting.
2402 (signal_exception): Initial implementation of hardware interrupt
2403 handling. Accept another break instruction variant for simulator
2405 (decode_coproc): Implement RFE instruction for TX39.
2406 (mips.igen): Decode RFE instruction as such.
2407 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2408 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2409 bbegin to implement memory map.
2410 * dv-tx3904cpu.c: New file.
2411 * dv-tx3904irc.c: New file.
2413 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2415 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2417 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2419 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2420 with calls to check_div_hilo.
2422 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2424 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2425 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2426 Add special r3900 version of do_mult_hilo.
2427 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2428 with calls to check_mult_hilo.
2429 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2430 with calls to check_div_hilo.
2432 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2434 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2435 Document a replacement.
2437 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2439 * interp.c (sim_monitor): Make mon_printf work.
2441 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2443 * sim-main.h (INSN_NAME): New arg `cpu'.
2445 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2447 * configure: Regenerated to track ../common/aclocal.m4 changes.
2449 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2451 * configure: Regenerated to track ../common/aclocal.m4 changes.
2454 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2456 * acconfig.h: New file.
2457 * configure.in: Reverted change of Apr 24; use sinclude again.
2459 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2461 * configure: Regenerated to track ../common/aclocal.m4 changes.
2464 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2466 * configure.in: Don't call sinclude.
2468 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2470 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2472 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2474 * mips.igen (ERET): Implement.
2476 * interp.c (decode_coproc): Return sign-extended EPC.
2478 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2480 * interp.c (signal_exception): Do not ignore Trap.
2481 (signal_exception): On TRAP, restart at exception address.
2482 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2483 (signal_exception): Update.
2484 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2485 so that TRAP instructions are caught.
2487 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2489 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2490 contains HI/LO access history.
2491 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2492 (HIACCESS, LOACCESS): Delete, replace with
2493 (HIHISTORY, LOHISTORY): New macros.
2494 (CHECKHILO): Delete all, moved to mips.igen
2496 * gencode.c (build_instruction): Do not generate checks for
2497 correct HI/LO register usage.
2499 * interp.c (old_engine_run): Delete checks for correct HI/LO
2502 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2503 check_mf_cycles): New functions.
2504 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2505 do_divu, domultx, do_mult, do_multu): Use.
2507 * tx.igen ("madd", "maddu"): Use.
2509 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2511 * mips.igen (DSRAV): Use function do_dsrav.
2512 (SRAV): Use new function do_srav.
2514 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2515 (B): Sign extend 11 bit immediate.
2516 (EXT-B*): Shift 16 bit immediate left by 1.
2517 (ADDIU*): Don't sign extend immediate value.
2519 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2521 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2523 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2526 * mips.igen (delayslot32, nullify_next_insn): New functions.
2527 (m16.igen): Always include.
2528 (do_*): Add more tracing.
2530 * m16.igen (delayslot16): Add NIA argument, could be called by a
2531 32 bit MIPS16 instruction.
2533 * interp.c (ifetch16): Move function from here.
2534 * sim-main.c (ifetch16): To here.
2536 * sim-main.c (ifetch16, ifetch32): Update to match current
2537 implementations of LH, LW.
2538 (signal_exception): Don't print out incorrect hex value of illegal
2541 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2543 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2546 * m16.igen: Implement MIPS16 instructions.
2548 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2549 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2550 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2551 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2552 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2553 bodies of corresponding code from 32 bit insn to these. Also used
2554 by MIPS16 versions of functions.
2556 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2557 (IMEM16): Drop NR argument from macro.
2559 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2561 * Makefile.in (SIM_OBJS): Add sim-main.o.
2563 * sim-main.h (address_translation, load_memory, store_memory,
2564 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2566 (pr_addr, pr_uword64): Declare.
2567 (sim-main.c): Include when H_REVEALS_MODULE_P.
2569 * interp.c (address_translation, load_memory, store_memory,
2570 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2572 * sim-main.c: To here. Fix compilation problems.
2574 * configure.in: Enable inlining.
2575 * configure: Re-config.
2577 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2579 * configure: Regenerated to track ../common/aclocal.m4 changes.
2581 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2583 * mips.igen: Include tx.igen.
2584 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2585 * tx.igen: New file, contains MADD and MADDU.
2587 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2588 the hardwired constant `7'.
2589 (store_memory): Ditto.
2590 (LOADDRMASK): Move definition to sim-main.h.
2592 mips.igen (MTC0): Enable for r3900.
2595 mips.igen (do_load_byte): Delete.
2596 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2597 do_store_right): New functions.
2598 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2600 configure.in: Let the tx39 use igen again.
2603 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2605 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2606 not an address sized quantity. Return zero for cache sizes.
2608 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2610 * mips.igen (r3900): r3900 does not support 64 bit integer
2613 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2615 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2617 * configure : Rebuild.
2619 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2621 * configure: Regenerated to track ../common/aclocal.m4 changes.
2623 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2625 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2627 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2629 * configure: Regenerated to track ../common/aclocal.m4 changes.
2630 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2632 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2634 * configure: Regenerated to track ../common/aclocal.m4 changes.
2636 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2638 * interp.c (Max, Min): Comment out functions. Not yet used.
2640 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2642 * configure: Regenerated to track ../common/aclocal.m4 changes.
2644 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2646 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2647 configurable settings for stand-alone simulator.
2649 * configure.in: Added X11 search, just in case.
2651 * configure: Regenerated.
2653 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2655 * interp.c (sim_write, sim_read, load_memory, store_memory):
2656 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2658 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2660 * sim-main.h (GETFCC): Return an unsigned value.
2662 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2664 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2665 (DADD): Result destination is RD not RT.
2667 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2669 * sim-main.h (HIACCESS, LOACCESS): Always define.
2671 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2673 * interp.c (sim_info): Delete.
2675 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2677 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2678 (mips_option_handler): New argument `cpu'.
2679 (sim_open): Update call to sim_add_option_table.
2681 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2683 * mips.igen (CxC1): Add tracing.
2685 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2687 * sim-main.h (Max, Min): Declare.
2689 * interp.c (Max, Min): New functions.
2691 * mips.igen (BC1): Add tracing.
2693 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2695 * interp.c Added memory map for stack in vr4100
2697 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2699 * interp.c (load_memory): Add missing "break"'s.
2701 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2703 * interp.c (sim_store_register, sim_fetch_register): Pass in
2704 length parameter. Return -1.
2706 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2708 * interp.c: Added hardware init hook, fixed warnings.
2710 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2712 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2714 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2716 * interp.c (ifetch16): New function.
2718 * sim-main.h (IMEM32): Rename IMEM.
2719 (IMEM16_IMMED): Define.
2721 (DELAY_SLOT): Update.
2723 * m16run.c (sim_engine_run): New file.
2725 * m16.igen: All instructions except LB.
2726 (LB): Call do_load_byte.
2727 * mips.igen (do_load_byte): New function.
2728 (LB): Call do_load_byte.
2730 * mips.igen: Move spec for insn bit size and high bit from here.
2731 * Makefile.in (tmp-igen, tmp-m16): To here.
2733 * m16.dc: New file, decode mips16 instructions.
2735 * Makefile.in (SIM_NO_ALL): Define.
2736 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2738 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2740 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2741 point unit to 32 bit registers.
2742 * configure: Re-generate.
2744 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2746 * configure.in (sim_use_gen): Make IGEN the default simulator
2747 generator for generic 32 and 64 bit mips targets.
2748 * configure: Re-generate.
2750 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2752 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2755 * interp.c (sim_fetch_register, sim_store_register): Read/write
2756 FGR from correct location.
2757 (sim_open): Set size of FGR's according to
2758 WITH_TARGET_FLOATING_POINT_BITSIZE.
2760 * sim-main.h (FGR): Store floating point registers in a separate
2763 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2765 * configure: Regenerated to track ../common/aclocal.m4 changes.
2767 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2769 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2771 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2773 * interp.c (pending_tick): New function. Deliver pending writes.
2775 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2776 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2777 it can handle mixed sized quantites and single bits.
2779 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2781 * interp.c (oengine.h): Do not include when building with IGEN.
2782 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2783 (sim_info): Ditto for PROCESSOR_64BIT.
2784 (sim_monitor): Replace ut_reg with unsigned_word.
2785 (*): Ditto for t_reg.
2786 (LOADDRMASK): Define.
2787 (sim_open): Remove defunct check that host FP is IEEE compliant,
2788 using software to emulate floating point.
2789 (value_fpr, ...): Always compile, was conditional on HASFPU.
2791 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2793 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2796 * interp.c (SD, CPU): Define.
2797 (mips_option_handler): Set flags in each CPU.
2798 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2799 (sim_close): Do not clear STATE, deleted anyway.
2800 (sim_write, sim_read): Assume CPU zero's vm should be used for
2802 (sim_create_inferior): Set the PC for all processors.
2803 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2805 (mips16_entry): Pass correct nr of args to store_word, load_word.
2806 (ColdReset): Cold reset all cpu's.
2807 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2808 (sim_monitor, load_memory, store_memory, signal_exception): Use
2809 `CPU' instead of STATE_CPU.
2812 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2815 * sim-main.h (signal_exception): Add sim_cpu arg.
2816 (SignalException*): Pass both SD and CPU to signal_exception.
2817 * interp.c (signal_exception): Update.
2819 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2821 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2822 address_translation): Ditto
2823 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2825 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2827 * configure: Regenerated to track ../common/aclocal.m4 changes.
2829 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2831 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2833 * mips.igen (model): Map processor names onto BFD name.
2835 * sim-main.h (CPU_CIA): Delete.
2836 (SET_CIA, GET_CIA): Define
2838 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2840 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2843 * configure.in (default_endian): Configure a big-endian simulator
2845 * configure: Re-generate.
2847 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2849 * configure: Regenerated to track ../common/aclocal.m4 changes.
2851 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2853 * interp.c (sim_monitor): Handle Densan monitor outbyte
2854 and inbyte functions.
2856 1997-12-29 Felix Lee <flee@cygnus.com>
2858 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2860 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2862 * Makefile.in (tmp-igen): Arrange for $zero to always be
2863 reset to zero after every instruction.
2865 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2867 * configure: Regenerated to track ../common/aclocal.m4 changes.
2870 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2872 * mips.igen (MSUB): Fix to work like MADD.
2873 * gencode.c (MSUB): Similarly.
2875 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2877 * configure: Regenerated to track ../common/aclocal.m4 changes.
2879 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2881 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2883 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2885 * sim-main.h (sim-fpu.h): Include.
2887 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2888 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2889 using host independant sim_fpu module.
2891 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2893 * interp.c (signal_exception): Report internal errors with SIGABRT
2896 * sim-main.h (C0_CONFIG): New register.
2897 (signal.h): No longer include.
2899 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2901 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2903 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2905 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2907 * mips.igen: Tag vr5000 instructions.
2908 (ANDI): Was missing mipsIV model, fix assembler syntax.
2909 (do_c_cond_fmt): New function.
2910 (C.cond.fmt): Handle mips I-III which do not support CC field
2912 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2913 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2915 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2916 vr5000 which saves LO in a GPR separatly.
2918 * configure.in (enable-sim-igen): For vr5000, select vr5000
2919 specific instructions.
2920 * configure: Re-generate.
2922 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2924 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2926 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2927 fmt_uninterpreted_64 bit cases to switch. Convert to
2930 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2932 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2933 as specified in IV3.2 spec.
2934 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2936 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2938 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2939 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2940 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2941 PENDING_FILL versions of instructions. Simplify.
2943 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2945 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2947 (MTHI, MFHI): Disable code checking HI-LO.
2949 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2951 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2953 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2955 * gencode.c (build_mips16_operands): Replace IPC with cia.
2957 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2958 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2960 (UndefinedResult): Replace function with macro/function
2962 (sim_engine_run): Don't save PC in IPC.
2964 * sim-main.h (IPC): Delete.
2967 * interp.c (signal_exception, store_word, load_word,
2968 address_translation, load_memory, store_memory, cache_op,
2969 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2970 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2971 current instruction address - cia - argument.
2972 (sim_read, sim_write): Call address_translation directly.
2973 (sim_engine_run): Rename variable vaddr to cia.
2974 (signal_exception): Pass cia to sim_monitor
2976 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2977 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2978 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2980 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2981 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2984 * interp.c (signal_exception): Pass restart address to
2987 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2988 idecode.o): Add dependency.
2990 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2992 (DELAY_SLOT): Update NIA not PC with branch address.
2993 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2995 * mips.igen: Use CIA not PC in branch calculations.
2996 (illegal): Call SignalException.
2997 (BEQ, ADDIU): Fix assembler.
2999 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3001 * m16.igen (JALX): Was missing.
3003 * configure.in (enable-sim-igen): New configuration option.
3004 * configure: Re-generate.
3006 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
3008 * interp.c (load_memory, store_memory): Delete parameter RAW.
3009 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
3010 bypassing {load,store}_memory.
3012 * sim-main.h (ByteSwapMem): Delete definition.
3014 * Makefile.in (SIM_OBJS): Add sim-memopt module.
3016 * interp.c (sim_do_command, sim_commands): Delete mips specific
3017 commands. Handled by module sim-options.
3019 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
3020 (WITH_MODULO_MEMORY): Define.
3022 * interp.c (sim_info): Delete code printing memory size.
3024 * interp.c (mips_size): Nee sim_size, delete function.
3026 (monitor, monitor_base, monitor_size): Delete global variables.
3027 (sim_open, sim_close): Delete code creating monitor and other
3028 memory regions. Use sim-memopts module, via sim_do_commandf, to
3029 manage memory regions.
3030 (load_memory, store_memory): Use sim-core for memory model.
3032 * interp.c (address_translation): Delete all memory map code
3033 except line forcing 32 bit addresses.
3035 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
3037 * sim-main.h (WITH_TRACE): Delete definition. Enables common
3040 * interp.c (logfh, logfile): Delete globals.
3041 (sim_open, sim_close): Delete code opening & closing log file.
3042 (mips_option_handler): Delete -l and -n options.
3043 (OPTION mips_options): Ditto.
3045 * interp.c (OPTION mips_options): Rename option trace to dinero.
3046 (mips_option_handler): Update.
3048 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3050 * interp.c (fetch_str): New function.
3051 (sim_monitor): Rewrite using sim_read & sim_write.
3052 (sim_open): Check magic number.
3053 (sim_open): Write monitor vectors into memory using sim_write.
3054 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
3055 (sim_read, sim_write): Simplify - transfer data one byte at a
3057 (load_memory, store_memory): Clarify meaning of parameter RAW.
3059 * sim-main.h (isHOST): Defete definition.
3060 (isTARGET): Mark as depreciated.
3061 (address_translation): Delete parameter HOST.
3063 * interp.c (address_translation): Delete parameter HOST.
3065 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3069 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
3070 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
3072 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
3074 * mips.igen: Add model filter field to records.
3076 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3078 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
3080 interp.c (sim_engine_run): Do not compile function sim_engine_run
3081 when WITH_IGEN == 1.
3083 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
3084 target architecture.
3086 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
3087 igen. Replace with configuration variables sim_igen_flags /
3090 * m16.igen: New file. Copy mips16 insns here.
3091 * mips.igen: From here.
3093 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3095 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
3097 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
3099 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
3101 * gencode.c (build_instruction): Follow sim_write's lead in using
3102 BigEndianMem instead of !ByteSwapMem.
3104 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
3106 * configure.in (sim_gen): Dependent on target, select type of
3107 generator. Always select old style generator.
3109 configure: Re-generate.
3111 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
3113 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
3114 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
3115 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
3116 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
3117 SIM_@sim_gen@_*, set by autoconf.
3119 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3121 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3123 * interp.c (ColdReset): Remove #ifdef HASFPU, check
3124 CURRENT_FLOATING_POINT instead.
3126 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3127 (address_translation): Raise exception InstructionFetch when
3128 translation fails and isINSTRUCTION.
3130 * interp.c (sim_open, sim_write, sim_monitor, store_word,
3131 sim_engine_run): Change type of of vaddr and paddr to
3133 (address_translation, prefetch, load_memory, store_memory,
3134 cache_op): Change type of vAddr and pAddr to address_word.
3136 * gencode.c (build_instruction): Change type of vaddr and paddr to
3139 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
3141 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3142 macro to obtain result of ALU op.
3144 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3146 * interp.c (sim_info): Call profile_print.
3148 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3150 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3152 * sim-main.h (WITH_PROFILE): Do not define, defined in
3153 common/sim-config.h. Use sim-profile module.
3154 (simPROFILE): Delete defintion.
3156 * interp.c (PROFILE): Delete definition.
3157 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3158 (sim_close): Delete code writing profile histogram.
3159 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3161 (sim_engine_run): Delete code profiling the PC.
3163 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3165 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3167 * interp.c (sim_monitor): Make register pointers of type
3170 * sim-main.h: Make registers of type unsigned_word not
3173 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3175 * interp.c (sync_operation): Rename from SyncOperation, make
3176 global, add SD argument.
3177 (prefetch): Rename from Prefetch, make global, add SD argument.
3178 (decode_coproc): Make global.
3180 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3182 * gencode.c (build_instruction): Generate DecodeCoproc not
3183 decode_coproc calls.
3185 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3186 (SizeFGR): Move to sim-main.h
3187 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3188 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3189 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3191 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3192 FP_RM_TOMINF, GETRM): Move to sim-main.h.
3193 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3194 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3195 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3196 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3198 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3200 (sim-alu.h): Include.
3201 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3202 (sim_cia): Typedef to instruction_address.
3204 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
3206 * Makefile.in (interp.o): Rename generated file engine.c to
3211 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
3213 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3215 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3217 * gencode.c (build_instruction): For "FPSQRT", output correct
3218 number of arguments to Recip.
3220 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
3222 * Makefile.in (interp.o): Depends on sim-main.h
3224 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3226 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3227 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3228 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3229 STATE, DSSTATE): Define
3230 (GPR, FGRIDX, ..): Define.
3232 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3233 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3234 (GPR, FGRIDX, ...): Delete macros.
3236 * interp.c: Update names to match defines from sim-main.h
3238 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
3240 * interp.c (sim_monitor): Add SD argument.
3241 (sim_warning): Delete. Replace calls with calls to
3243 (sim_error): Delete. Replace calls with sim_io_error.
3244 (open_trace, writeout32, writeout16, getnum): Add SD argument.
3245 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3246 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3248 (mips_size): Rename from sim_size. Add SD argument.
3250 * interp.c (simulator): Delete global variable.
3251 (callback): Delete global variable.
3252 (mips_option_handler, sim_open, sim_write, sim_read,
3253 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3254 sim_size,sim_monitor): Use sim_io_* not callback->*.
3255 (sim_open): ZALLOC simulator struct.
3256 (PROFILE): Do not define.
3258 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3260 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3261 support.h with corresponding code.
3263 * sim-main.h (word64, uword64), support.h: Move definition to
3265 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3268 * Makefile.in: Update dependencies
3269 * interp.c: Do not include.
3271 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3273 * interp.c (address_translation, load_memory, store_memory,
3274 cache_op): Rename to from AddressTranslation et.al., make global,
3277 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3280 * interp.c (SignalException): Rename to signal_exception, make
3283 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3285 * sim-main.h (SignalException, SignalExceptionInterrupt,
3286 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3287 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3288 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3291 * interp.c, support.h: Use.
3293 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3295 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3296 to value_fpr / store_fpr. Add SD argument.
3297 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3298 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3300 * sim-main.h (ValueFPR, StoreFPR): Define.
3302 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3304 * interp.c (sim_engine_run): Check consistency between configure
3305 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3308 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3309 (mips_fpu): Configure WITH_FLOATING_POINT.
3310 (mips_endian): Configure WITH_TARGET_ENDIAN.
3311 * configure: Update.
3313 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3315 * configure: Regenerated to track ../common/aclocal.m4 changes.
3317 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3319 * configure: Regenerated.
3321 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3323 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3325 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3327 * gencode.c (print_igen_insn_models): Assume certain architectures
3328 include all mips* instructions.
3329 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3332 * Makefile.in (tmp.igen): Add target. Generate igen input from
3335 * gencode.c (FEATURE_IGEN): Define.
3336 (main): Add --igen option. Generate output in igen format.
3337 (process_instructions): Format output according to igen option.
3338 (print_igen_insn_format): New function.
3339 (print_igen_insn_models): New function.
3340 (process_instructions): Only issue warnings and ignore
3341 instructions when no FEATURE_IGEN.
3343 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3345 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3348 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3350 * configure: Regenerated to track ../common/aclocal.m4 changes.
3352 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3354 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3355 SIM_RESERVED_BITS): Delete, moved to common.
3356 (SIM_EXTRA_CFLAGS): Update.
3358 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3360 * configure.in: Configure non-strict memory alignment.
3361 * configure: Regenerated to track ../common/aclocal.m4 changes.
3363 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3365 * configure: Regenerated to track ../common/aclocal.m4 changes.
3367 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3369 * gencode.c (SDBBP,DERET): Added (3900) insns.
3370 (RFE): Turn on for 3900.
3371 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3372 (dsstate): Made global.
3373 (SUBTARGET_R3900): Added.
3374 (CANCELDELAYSLOT): New.
3375 (SignalException): Ignore SystemCall rather than ignore and
3376 terminate. Add DebugBreakPoint handling.
3377 (decode_coproc): New insns RFE, DERET; and new registers Debug
3378 and DEPC protected by SUBTARGET_R3900.
3379 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3381 * Makefile.in,configure.in: Add mips subtarget option.
3382 * configure: Update.
3384 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3386 * gencode.c: Add r3900 (tx39).
3389 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3391 * gencode.c (build_instruction): Don't need to subtract 4 for
3394 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3396 * interp.c: Correct some HASFPU problems.
3398 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3400 * configure: Regenerated to track ../common/aclocal.m4 changes.
3402 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3404 * interp.c (mips_options): Fix samples option short form, should
3407 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3409 * interp.c (sim_info): Enable info code. Was just returning.
3411 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3413 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3416 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3418 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3420 (build_instruction): Ditto for LL.
3422 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3424 * configure: Regenerated to track ../common/aclocal.m4 changes.
3426 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3428 * configure: Regenerated to track ../common/aclocal.m4 changes.
3431 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3433 * interp.c (sim_open): Add call to sim_analyze_program, update
3436 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3438 * interp.c (sim_kill): Delete.
3439 (sim_create_inferior): Add ABFD argument. Set PC from same.
3440 (sim_load): Move code initializing trap handlers from here.
3441 (sim_open): To here.
3442 (sim_load): Delete, use sim-hload.c.
3444 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3446 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3448 * configure: Regenerated to track ../common/aclocal.m4 changes.
3451 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3453 * interp.c (sim_open): Add ABFD argument.
3454 (sim_load): Move call to sim_config from here.
3455 (sim_open): To here. Check return status.
3457 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3459 * gencode.c (build_instruction): Two arg MADD should
3460 not assign result to $0.
3462 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3464 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3465 * sim/mips/configure.in: Regenerate.
3467 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3469 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3470 signed8, unsigned8 et.al. types.
3472 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3473 hosts when selecting subreg.
3475 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3477 * interp.c (sim_engine_run): Reset the ZERO register to zero
3478 regardless of FEATURE_WARN_ZERO.
3479 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3481 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3483 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3484 (SignalException): For BreakPoints ignore any mode bits and just
3486 (SignalException): Always set the CAUSE register.
3488 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3490 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3491 exception has been taken.
3493 * interp.c: Implement the ERET and mt/f sr instructions.
3495 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3497 * interp.c (SignalException): Don't bother restarting an
3500 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3502 * interp.c (SignalException): Really take an interrupt.
3503 (interrupt_event): Only deliver interrupts when enabled.
3505 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3507 * interp.c (sim_info): Only print info when verbose.
3508 (sim_info) Use sim_io_printf for output.
3510 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3512 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3515 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3517 * interp.c (sim_do_command): Check for common commands if a
3518 simulator specific command fails.
3520 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3522 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3523 and simBE when DEBUG is defined.
3525 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3527 * interp.c (interrupt_event): New function. Pass exception event
3528 onto exception handler.
3530 * configure.in: Check for stdlib.h.
3531 * configure: Regenerate.
3533 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3534 variable declaration.
3535 (build_instruction): Initialize memval1.
3536 (build_instruction): Add UNUSED attribute to byte, bigend,
3538 (build_operands): Ditto.
3540 * interp.c: Fix GCC warnings.
3541 (sim_get_quit_code): Delete.
3543 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3544 * Makefile.in: Ditto.
3545 * configure: Re-generate.
3547 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3549 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3551 * interp.c (mips_option_handler): New function parse argumes using
3553 (myname): Replace with STATE_MY_NAME.
3554 (sim_open): Delete check for host endianness - performed by
3556 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3557 (sim_open): Move much of the initialization from here.
3558 (sim_load): To here. After the image has been loaded and
3560 (sim_open): Move ColdReset from here.
3561 (sim_create_inferior): To here.
3562 (sim_open): Make FP check less dependant on host endianness.
3564 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3566 * interp.c (sim_set_callbacks): Delete.
3568 * interp.c (membank, membank_base, membank_size): Replace with
3569 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3570 (sim_open): Remove call to callback->init. gdb/run do this.
3574 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3576 * interp.c (big_endian_p): Delete, replaced by
3577 current_target_byte_order.
3579 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3581 * interp.c (host_read_long, host_read_word, host_swap_word,
3582 host_swap_long): Delete. Using common sim-endian.
3583 (sim_fetch_register, sim_store_register): Use H2T.
3584 (pipeline_ticks): Delete. Handled by sim-events.
3586 (sim_engine_run): Update.
3588 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3590 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3592 (SignalException): To here. Signal using sim_engine_halt.
3593 (sim_stop_reason): Delete, moved to common.
3595 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3597 * interp.c (sim_open): Add callback argument.
3598 (sim_set_callbacks): Delete SIM_DESC argument.
3601 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3603 * Makefile.in (SIM_OBJS): Add common modules.
3605 * interp.c (sim_set_callbacks): Also set SD callback.
3606 (set_endianness, xfer_*, swap_*): Delete.
3607 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3608 Change to functions using sim-endian macros.
3609 (control_c, sim_stop): Delete, use common version.
3610 (simulate): Convert into.
3611 (sim_engine_run): This function.
3612 (sim_resume): Delete.
3614 * interp.c (simulation): New variable - the simulator object.
3615 (sim_kind): Delete global - merged into simulation.
3616 (sim_load): Cleanup. Move PC assignment from here.
3617 (sim_create_inferior): To here.
3619 * sim-main.h: New file.
3620 * interp.c (sim-main.h): Include.
3622 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3624 * configure: Regenerated to track ../common/aclocal.m4 changes.
3626 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3628 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3630 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3632 * gencode.c (build_instruction): DIV instructions: check
3633 for division by zero and integer overflow before using
3634 host's division operation.
3636 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3638 * Makefile.in (SIM_OBJS): Add sim-load.o.
3639 * interp.c: #include bfd.h.
3640 (target_byte_order): Delete.
3641 (sim_kind, myname, big_endian_p): New static locals.
3642 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3643 after argument parsing. Recognize -E arg, set endianness accordingly.
3644 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3645 load file into simulator. Set PC from bfd.
3646 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3647 (set_endianness): Use big_endian_p instead of target_byte_order.
3649 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3651 * interp.c (sim_size): Delete prototype - conflicts with
3652 definition in remote-sim.h. Correct definition.
3654 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3656 * configure: Regenerated to track ../common/aclocal.m4 changes.
3659 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3661 * interp.c (sim_open): New arg `kind'.
3663 * configure: Regenerated to track ../common/aclocal.m4 changes.
3665 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3667 * configure: Regenerated to track ../common/aclocal.m4 changes.
3669 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3671 * interp.c (sim_open): Set optind to 0 before calling getopt.
3673 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3675 * configure: Regenerated to track ../common/aclocal.m4 changes.
3677 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3679 * interp.c : Replace uses of pr_addr with pr_uword64
3680 where the bit length is always 64 independent of SIM_ADDR.
3681 (pr_uword64) : added.
3683 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3685 * configure: Re-generate.
3687 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3689 * configure: Regenerate to track ../common/aclocal.m4 changes.
3691 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3693 * interp.c (sim_open): New SIM_DESC result. Argument is now
3695 (other sim_*): New SIM_DESC argument.
3697 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3699 * interp.c: Fix printing of addresses for non-64-bit targets.
3700 (pr_addr): Add function to print address based on size.
3702 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3704 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3706 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3708 * gencode.c (build_mips16_operands): Correct computation of base
3709 address for extended PC relative instruction.
3711 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3713 * interp.c (mips16_entry): Add support for floating point cases.
3714 (SignalException): Pass floating point cases to mips16_entry.
3715 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3717 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3719 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3720 and then set the state to fmt_uninterpreted.
3721 (COP_SW): Temporarily set the state to fmt_word while calling
3724 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3726 * gencode.c (build_instruction): The high order may be set in the
3727 comparison flags at any ISA level, not just ISA 4.
3729 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3731 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3732 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3733 * configure.in: sinclude ../common/aclocal.m4.
3734 * configure: Regenerated.
3736 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3738 * configure: Rebuild after change to aclocal.m4.
3740 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3742 * configure configure.in Makefile.in: Update to new configure
3743 scheme which is more compatible with WinGDB builds.
3744 * configure.in: Improve comment on how to run autoconf.
3745 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3746 * Makefile.in: Use autoconf substitution to install common
3749 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3751 * gencode.c (build_instruction): Use BigEndianCPU instead of
3754 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3756 * interp.c (sim_monitor): Make output to stdout visible in
3757 wingdb's I/O log window.
3759 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3761 * support.h: Undo previous change to SIGTRAP
3764 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3766 * interp.c (store_word, load_word): New static functions.
3767 (mips16_entry): New static function.
3768 (SignalException): Look for mips16 entry and exit instructions.
3769 (simulate): Use the correct index when setting fpr_state after
3770 doing a pending move.
3772 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3774 * interp.c: Fix byte-swapping code throughout to work on
3775 both little- and big-endian hosts.
3777 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3779 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3780 with gdb/config/i386/xm-windows.h.
3782 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3784 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3785 that messes up arithmetic shifts.
3787 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3789 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3790 SIGTRAP and SIGQUIT for _WIN32.
3792 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3794 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3795 force a 64 bit multiplication.
3796 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3797 destination register is 0, since that is the default mips16 nop
3800 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3802 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3803 (build_endian_shift): Don't check proc64.
3804 (build_instruction): Always set memval to uword64. Cast op2 to
3805 uword64 when shifting it left in memory instructions. Always use
3806 the same code for stores--don't special case proc64.
3808 * gencode.c (build_mips16_operands): Fix base PC value for PC
3810 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3812 * interp.c (simJALDELAYSLOT): Define.
3813 (JALDELAYSLOT): Define.
3814 (INDELAYSLOT, INJALDELAYSLOT): Define.
3815 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3817 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3819 * interp.c (sim_open): add flush_cache as a PMON routine
3820 (sim_monitor): handle flush_cache by ignoring it
3822 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3824 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3826 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3827 (BigEndianMem): Rename to ByteSwapMem and change sense.
3828 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3829 BigEndianMem references to !ByteSwapMem.
3830 (set_endianness): New function, with prototype.
3831 (sim_open): Call set_endianness.
3832 (sim_info): Use simBE instead of BigEndianMem.
3833 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3834 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3835 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3836 ifdefs, keeping the prototype declaration.
3837 (swap_word): Rewrite correctly.
3838 (ColdReset): Delete references to CONFIG. Delete endianness related
3839 code; moved to set_endianness.
3841 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3843 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3844 * interp.c (CHECKHILO): Define away.
3845 (simSIGINT): New macro.
3846 (membank_size): Increase from 1MB to 2MB.
3847 (control_c): New function.
3848 (sim_resume): Rename parameter signal to signal_number. Add local
3849 variable prev. Call signal before and after simulate.
3850 (sim_stop_reason): Add simSIGINT support.
3851 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3853 (sim_warning): Delete call to SignalException. Do call printf_filtered
3855 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3856 a call to sim_warning.
3858 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3860 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3861 16 bit instructions.
3863 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3865 Add support for mips16 (16 bit MIPS implementation):
3866 * gencode.c (inst_type): Add mips16 instruction encoding types.
3867 (GETDATASIZEINSN): Define.
3868 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3869 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3871 (MIPS16_DECODE): New table, for mips16 instructions.
3872 (bitmap_val): New static function.
3873 (struct mips16_op): Define.
3874 (mips16_op_table): New table, for mips16 operands.
3875 (build_mips16_operands): New static function.
3876 (process_instructions): If PC is odd, decode a mips16
3877 instruction. Break out instruction handling into new
3878 build_instruction function.
3879 (build_instruction): New static function, broken out of
3880 process_instructions. Check modifiers rather than flags for SHIFT
3881 bit count and m[ft]{hi,lo} direction.
3882 (usage): Pass program name to fprintf.
3883 (main): Remove unused variable this_option_optind. Change
3884 ``*loptarg++'' to ``loptarg++''.
3885 (my_strtoul): Parenthesize && within ||.
3886 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3887 (simulate): If PC is odd, fetch a 16 bit instruction, and
3888 increment PC by 2 rather than 4.
3889 * configure.in: Add case for mips16*-*-*.
3890 * configure: Rebuild.
3892 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3894 * interp.c: Allow -t to enable tracing in standalone simulator.
3895 Fix garbage output in trace file and error messages.
3897 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3899 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3900 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3901 * configure.in: Simplify using macros in ../common/aclocal.m4.
3902 * configure: Regenerated.
3903 * tconfig.in: New file.
3905 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3907 * interp.c: Fix bugs in 64-bit port.
3908 Use ansi function declarations for msvc compiler.
3909 Initialize and test file pointer in trace code.
3910 Prevent duplicate definition of LAST_EMED_REGNUM.
3912 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3914 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3916 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3918 * interp.c (SignalException): Check for explicit terminating
3920 * gencode.c: Pass instruction value through SignalException()
3921 calls for Trap, Breakpoint and Syscall.
3923 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3925 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3926 only used on those hosts that provide it.
3927 * configure.in: Add sqrt() to list of functions to be checked for.
3928 * config.in: Re-generated.
3929 * configure: Re-generated.
3931 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3933 * gencode.c (process_instructions): Call build_endian_shift when
3934 expanding STORE RIGHT, to fix swr.
3935 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3936 clear the high bits.
3937 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3938 Fix float to int conversions to produce signed values.
3940 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3942 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3943 (process_instructions): Correct handling of nor instruction.
3944 Correct shift count for 32 bit shift instructions. Correct sign
3945 extension for arithmetic shifts to not shift the number of bits in
3946 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3947 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3949 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3950 It's OK to have a mult follow a mult. What's not OK is to have a
3951 mult follow an mfhi.
3952 (Convert): Comment out incorrect rounding code.
3954 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3956 * interp.c (sim_monitor): Improved monitor printf
3957 simulation. Tidied up simulator warnings, and added "--log" option
3958 for directing warning message output.
3959 * gencode.c: Use sim_warning() rather than WARNING macro.
3961 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3963 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3964 getopt1.o, rather than on gencode.c. Link objects together.
3965 Don't link against -liberty.
3966 (gencode.o, getopt.o, getopt1.o): New targets.
3967 * gencode.c: Include <ctype.h> and "ansidecl.h".
3968 (AND): Undefine after including "ansidecl.h".
3969 (ULONG_MAX): Define if not defined.
3970 (OP_*): Don't define macros; now defined in opcode/mips.h.
3971 (main): Call my_strtoul rather than strtoul.
3972 (my_strtoul): New static function.
3974 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3976 * gencode.c (process_instructions): Generate word64 and uword64
3977 instead of `long long' and `unsigned long long' data types.
3978 * interp.c: #include sysdep.h to get signals, and define default
3980 * (Convert): Work around for Visual-C++ compiler bug with type
3982 * support.h: Make things compile under Visual-C++ by using
3983 __int64 instead of `long long'. Change many refs to long long
3984 into word64/uword64 typedefs.
3986 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3988 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3989 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3991 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3992 (AC_PROG_INSTALL): Added.
3993 (AC_PROG_CC): Moved to before configure.host call.
3994 * configure: Rebuilt.
3996 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3998 * configure.in: Define @SIMCONF@ depending on mips target.
3999 * configure: Rebuild.
4000 * Makefile.in (run): Add @SIMCONF@ to control simulator
4002 * gencode.c: Change LOADDRMASK to 64bit memory model only.
4003 * interp.c: Remove some debugging, provide more detailed error
4004 messages, update memory accesses to use LOADDRMASK.
4006 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
4008 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
4009 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
4011 * configure: Rebuild.
4012 * config.in: New file, generated by autoheader.
4013 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
4014 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
4015 HAVE_ANINT and HAVE_AINT, as appropriate.
4016 * Makefile.in (run): Use @LIBS@ rather than -lm.
4017 (interp.o): Depend upon config.h.
4018 (Makefile): Just rebuild Makefile.
4019 (clean): Remove stamp-h.
4020 (mostlyclean): Make the same as clean, not as distclean.
4021 (config.h, stamp-h): New targets.
4023 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
4025 * interp.c (ColdReset): Fix boolean test. Make all simulator
4028 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
4030 * interp.c (xfer_direct_word, xfer_direct_long,
4031 swap_direct_word, swap_direct_long, xfer_big_word,
4032 xfer_big_long, xfer_little_word, xfer_little_long,
4033 swap_word,swap_long): Added.
4034 * interp.c (ColdReset): Provide function indirection to
4035 host<->simulated_target transfer routines.
4036 * interp.c (sim_store_register, sim_fetch_register): Updated to
4037 make use of indirected transfer routines.
4039 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
4041 * gencode.c (process_instructions): Ensure FP ABS instruction
4043 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
4044 system call support.
4046 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
4048 * interp.c (sim_do_command): Complain if callback structure not
4051 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
4053 * interp.c (Convert): Provide round-to-nearest and round-to-zero
4054 support for Sun hosts.
4055 * Makefile.in (gencode): Ensure the host compiler and libraries
4056 used for cross-hosted build.
4058 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
4060 * interp.c, gencode.c: Some more (TODO) tidying.
4062 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
4064 * gencode.c, interp.c: Replaced explicit long long references with
4065 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
4066 * support.h (SET64LO, SET64HI): Macros added.
4068 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
4070 * configure: Regenerate with autoconf 2.7.
4072 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
4074 * interp.c (LoadMemory): Enclose text following #endif in /* */.
4075 * support.h: Remove superfluous "1" from #if.
4076 * support.h (CHECKSIM): Remove stray 'a' at end of line.
4078 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
4080 * interp.c (StoreFPR): Control UndefinedResult() call on
4081 WARN_RESULT manifest.
4083 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
4085 * gencode.c: Tidied instruction decoding, and added FP instruction
4088 * interp.c: Added dineroIII, and BSD profiling support. Also
4089 run-time FP handling.
4091 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
4093 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
4094 gencode.c, interp.c, support.h: created.
projects / deliverable / binutils-gdb.git / blob