dmaengine/dw_dmac: Update maintainer-ship

[deliverable/linux.git] / drivers / dma / dw_dmac_regs.h

diff --git a/drivers/dma/dw_dmac_regs.h b/drivers/dma/dw_dmac_regs.h
index 9a32964bf795fe9eac352817f2a67a41360377bb..c3419518d701dbe3a0671cbc906a88c7ee3823a3 100644 (file)
--- a/drivers/dma/dw_dmac_regs.h
+++ b/drivers/dma/dw_dmac_regs.h
@@ -2,6 +2,7 @@
  * Driver for the Synopsys DesignWare AHB DMA Controller
  *
  * Copyright (C) 2005-2007 Atmel Corporation
+ * Copyright (C) 2010-2011 ST Microelectronics
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -138,6 +139,7 @@ struct dw_dma_chan {
        void __iomem            *ch_regs;
        u8                      mask;
        u8                      priority;
+       bool                    paused;
 
        spinlock_t              lock;
 
@@ -159,9 +161,9 @@ __dwc_regs(struct dw_dma_chan *dwc)
 }
 
 #define channel_readl(dwc, name) \
-       __raw_readl(&(__dwc_regs(dwc)->name))
+       readl(&(__dwc_regs(dwc)->name))
 #define channel_writel(dwc, name, val) \
-       __raw_writel((val), &(__dwc_regs(dwc)->name))
+       writel((val), &(__dwc_regs(dwc)->name))
 
 static inline struct dw_dma_chan *to_dw_dma_chan(struct dma_chan *chan)
 {
@@ -185,9 +187,9 @@ static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma *dw)
 }
 
 #define dma_readl(dw, name) \
-       __raw_readl(&(__dw_regs(dw)->name))
+       readl(&(__dw_regs(dw)->name))
 #define dma_writel(dw, name, val) \
-       __raw_writel((val), &(__dw_regs(dw)->name))
+       writel((val), &(__dw_regs(dw)->name))
 
 #define channel_set_bit(dw, reg, mask) \
        dma_writel(dw, reg, ((mask) << 8) | (mask))