+2016-06-21 Graham Markall <graham.markall@embecosm.com>
+
+ * config/tc-arc.c (check_cpu_feature, md_parse_option):
+ Add nps400 option and feature. Add check for nps400
+ feature. Refactor existing checks to check subclass before
+ feature enablement.
+ (md_show_usage): Document flags for NPS-400 and add some other
+ undocumented flags.
+ (cpu_type): Remove nps400 CPU type entry
+ (check_zol): Remove bfd_mach_arc_nps400 case.
+ (md_show_usage): Add help on -mcpu=nps400.
+ (cpu_types): Add entry for nps400 as arc700 plus nps400 extension
+ set.
+ * doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and
+ -fpuda flags. Document -mcpu=nps400.
+ * testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change
+ expected flags to match ARC700 instead of NPS400.
+ * testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400.
+ * testsuite/gas/arc/nps-400-2.d: Likewise.
+ * testsuite/gas/arc/nps-400-3.d: Likewise.
+ * testsuite/gas/arc/nps-400-4.d: Likewise.
+ * testsuite/gas/arc/nps-400-5.d: Likewise.
+ * testsuite/gas/arc/nps-400-6.d: Likewise.
+ * testsuite/gas/arc/nps-400-7.d: Likewise.
+ * testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to
+ avoid clash with cbba instruction.
+ * testsuite/gas/arc/textinsn2op01.d: Likewise.
+ * testsuite/gas/arc/textinsn3op.d: Likewise.
+ * testsuite/gas/arc/textinsn3op.s: Likewise.
+ * testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using
+ -mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags.
+
+2016-06-20 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/r6-64-n32.d: Change the `name' tag.
+ * testsuite/gas/mips/r6-64-n64.d: Likewise.
+
+2016-06-20 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): Update comment on jump
+ reloc conversion.
+
+2016-06-20 Virendra Pathak <virendra.pathak@broadcom.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Update vulcan feature set.
+
+2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (hpriv_reg_table): Add registers %hmcdper,
+ %hmcddfr and %hva_mask_nz.
+ (sparc_ip): New handling of asr/privileged/hyperprivileged
+ registers, adapted to the new form of the sparc opcodes table.
+ * testsuite/gas/sparc/rdasr.s: New file.
+ * testsuite/gas/sparc/rdasr.d: Likewise.
+ * testsuite/gas/sparc/wrasr.s: Likewise.
+ * testsuite/gas/sparc/wrasr.d: Likewise.
+ * testsuite/gas/sparc/sparc.exp (sparc_elf_setup): Add rdasr and
+ wrasr tests.
+ * testsuite/gas/sparc/rdpr.d: Use -Av9m, as some privileged
+ registers require it.
+ * testsuite/gas/sparc/wrpr.s: Complete to cover all privileged
+ registers and write instruction modalities.
+ * testsuite/gas/sparc/wrpr.d: Likewise.
+ * testsuite/gas/sparc/rdhpr.s: Likewise for hyperprivileged
+ registers.
+ * testsuite/gas/sparc/rdhpr.d: Likewise.
+ * testsuite/gas/sparc/wrhpr.s: Likewise.
+ * testsuite/gas/sparc/wrhpr.d: Likewise.
+
+2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (sparc_arch_table): adjust the GAS
+ architectures to use the right opcode architecture.
+ (sparc_md_end): Handle v9{c,d,e,v,m}.
+ (sparc_ip): Fix some comments.
+ * testsuite/gas/sparc/ldx_efsr.d: Fix the architecture of this
+ instruction, which is v9d.
+ * testsuite/gas/sparc/mwait.s: Remove the `rd %mwait,%g1'
+ instruction from the test, as %mwait is not readable.
+ * testsuite/gas/sparc/mwait.d: Likewise.
+ * testsuite/gas/sparc/mism-1.s: Expand to check v9b and v9e
+ mismatch architecture errors.
+ * testsuite/gas/sparc/mism-2.s: New file.
+
+2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (priv_reg_table): Use NULL instead of the
+ empty string to mark the end of the array.
+ (hpriv_reg_table): Likewise.
+ (v9a_asr_table): Likewise.
+ (cmp_reg_entry): Handle entries with NULL names.
+ (F_POP_V9): Define.
+ (F_POP_PCREL): Likewise.
+ (F_POP_TLS_CALL): Likewise.
+ (F_POP_POSTFIX): Likewise.
+ (struct pop_entry): New type.
+ (pop_table): New variable.
+ (enum pop_entry_type): New type.
+ (struct perc_entry): Likewise.
+ (NUM_PERC_ENTRIES): Define.
+ (perc_table): New variable.
+ (cmp_perc_entry): New function.
+ (md_begin): Sort hpriv_reg_table and v9a_asr_table, and initialize
+ perc_table.
+ (sparc_ip): Handle entries with NULL names in priv_reg_table,
+ hpriv_reg_table and v9a_asr_table. Use perc_table to handle
+ %-pseudo-ops.
+
+2016-06-15 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-ft32.c (md_assemble): Call dwarf2_emit_insn with the
+ instruction size.
+ * config/tc-mcore.c (md_assemble): Likewise.
+ * config/tc-mn10200.c (md_assemble): Likewise.
+ * config/tc-moxie.c (md_assemble): Likewise.
+ * config/tc-pj.c (md_apply_fix): Handle BFD_RELOC_PJ_CODE_REL32.
+ * testsuite/gas/all/gas.exp (diff1 test): Alpha sort list of
+ exception targets. Add alpha, hppa, microblaze and rl78 to list
+ of exceptions.
+ (forward): Add microblaze to list of exceptions.
+ (fwdexp): Add alpha to list of exceptions.
+ (redef2): Add arm-epoc-pe and rl78 to list of exceptions.
+ (redef3): Add rl78 and x86_64 cygwin to list of exceptions.
+ (do_930509a): Alpha sort list of exception targets. Add h8300 and
+ mn10200 to list of exceptions.
+ (align2): Expect to fail for nds32.
+ (cond): Add alpha and rl78 to list of exceptions.
+ * testsuite/gas/all/none.d: Skip for ft32 and hppa.
+ * testsuite/gas/all/string.d: Skip for tic4x.
+ * testsuite/gas/alpha/alpha.exp: Note that the alpha-linuxecoff
+ target does not support ELF.
+ * testsuite/gas/arm/blx-bl-convert.dL Skip for the nto target.
+ * testsuite/gas/cfi/cfi-alpha-2.d: All extended format names.
+ * testsuite/gas/cfi/cfi.exp: Alpha sort list of targets. Skip SH
+ tests for sh-pe and sh-rtemscoff targets.
+ * testsuite/gas/elf/elf.exp (redef): Add rl78, xgate and vax to
+ list of exceptions.
+ (type): Run the noifunc version for alpha-freebsd and visium.
+ * testsuite/gas/elf/warn-2.s: Do not expect to fail on the mcore,
+ mn10200 or moxie targets.
+ * testsuite/gas/ft32/insn.d: Update expected disassembly.
+ * testsuite/gas/i386/i386.exp (x86-64-pcrel): Skip for cygwin
+ targets.
+ * testsuite/gas/lns/lns.exp (lns-common-1): No longer skip for
+ mcore and rx targets.
+ * testsuite/gas/macros/macros.exp (dot): Add exceptions for ns32k,
+ rl78 and vax.
+ (purge): Expect to fail on the ns32k and vax.
+ * testsuite/gas/nds32/alu-2.d: Update expected disassembly.
+ * testsuite/gas/nds32/ls.d: Likewise.
+ * testsuite/gas/nds32/sys-reg.d: Likewise.
+ * testsuite/gas/nds32/usr-spe-reg.d: Likewise.
+ * testsuite/gas/pe/aligncomm-d.d: Skip for the sh.
+ * testsuite/gas/pe/section-align-3.d: Likewise.
+ * testsuite/gas/pe/section-exclude.d: Likewise.
+ * testsuite/gas/ppc/test2xcoff32.d: Pass once all the required
+ data has been seen.
+ * testsuite/gas/ppc/textalign-xcoff-001.d: Fix up regexp to allow
+ for variations in whitespace.
+ * testsuite/gas/tilepro/t_constants.d: Pass once all the required
+ data has been seen.
+ * testsuite/gas/tilepro/t_constants.s (.safe_word): New macro.
+ Installs a 32-bit value without generating warnings on 64-bit
+ hosts.
+ Use the new macro to replace the .word directives.
+
+2016-06-15 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/add_s.d: New file.
+ * testsuite/gas/arc/add_s.s: New file.
+
+2016-06-14 Graham Markall <graham.markall@embecosm.com>
+
+ * testsuite/gas/arc/nps400-6.s: Add tests of ldbit.
+ * testsuite/gas/arc/nps400-6.d: Likewise.
+
+2016-06-14 Graham Markall <graham.markall@embecosm.com>
+
+ * testsuite/gas/arc/nps400-6.s: Add tests of hash, tr, utf8, e4by, and
+ addf.
+ * testsuite/gas/arc/nps400-6.d: Likewise.
+
+2016-06-14 Graham Markall <graham.markall@embecosm.com>
+
+ * testsuite/gas/arc/nps400-6.s: Add tests of calcbsd, calcbxd,
+ calckey, calcxkey, mxb, imxb, addl, subl, andl, orl, xorl, andab, orab,
+ lbdsize, bdlen, csms, csma, cbba, zncv, and hofs.
+ * testsuite/gas/arc/nps400-6.d: Likewise.
+
+2016-06-14 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-nds32.c (nds32_get_align): Avoid left shifting a
+ signed constant.
+
+2016-06-13 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): Don't convert RELA
+ JALR relocations on R6.
+ * testsuite/gas/mips/jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/mips1@jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/r3000@jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local.d: New test.
+ * testsuite/gas/mips/jal-svr4pic-local-n32.d: New test.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: New
+ test.
+ * testsuite/gas/mips/jal-svr4pic-local-n64.d: New test.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: New
+ test.
+ * testsuite/gas/mips/jal-svr4pic-local.s: New test source.
+ * testsuite/gas/mips/jal-svr4pic-local-newabi.s: New test
+ source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-13 Virendra Pathak <virendra.pathak@broadcom.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add Broadcom Vulcan.
+ * doc/c-aarch64.texi: Document that vulcan is a valid processor
+ name.
+
+2016-06-13 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c: For non-ELF based targets skip ARM feature sets
+ that are not supported.
+
+ * config/tc-arc.c (md_apply_fix): Avoid left shifting a signed
+ constant.
+ * config/tc-cr16.c (check_range): Likewise.
+ * config/tc-nios2.c (nios2_check_overflow): Likewise.
+
+2016-06-08 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (print_operands): Substitute size.
+ (output_operand_error_record): Likewise.
+
+2016-06-07 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
+ PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
+ PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
+ (ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
+ by vle_opcodes, and that vle flag doesn't enable opcodes. Don't
+ add vle_opcodes twice.
+ (ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
+
+2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
+ (arm_ext_ras): Renamed from arm_ext_v8_2.
+ (insns): Update for arm_ext_v8_2 renaming.
+ (arm_extensions): Add "ras".
+ * doc/c-arm.texi (ARM Options): Add an entry for "ras".
+ * testsuite/gas/arm/armv8-a+ras.d: New.
+ * testsuite/gas/arm/armv8_2-a.d: Add explicit command line
+ options.
+
+2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * itbl-parse.y (yyerror): Use modern argument declaration style.
+
+2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-sh.c (parse_reg): Change type of mode argument to
+ sh_arg_type.
+ (get_operand): Adjust.
+ (insert): Change type of how to bfd_reloc_code_real_type.
+ (insert4): Likewise.
+ * config/tc-sh64.c (shmedia_get_operand): Adjust.
+ (shmedia_parse_reg): Change type of mode to shmedia_arg_type.
+
+2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-nds32.c (nds32_parse_option): Make the type of ptr_arg
+ const char *.
+
+2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR binutils/20196
+ * gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
+ stbcx., sthcx., stwcx., stdcx.>: Add tests.
+ * gas/testsuite/gas/ppc/e6500.d: Likewise.
+ * gas/testsuite/gas/ppc/power8.s: Likewise.
+ * gas/testsuite/gas/ppc/power8.d: Likewise.
+ * gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
+ stdcx.>: Add tests.
+ * gas/testsuite/gas/ppc/power4.d: Likewise.
+
+2016-06-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutis/18386
+ * testsuite/gas/i386/i386.exp: Run x86-64-branch-4.
+ * testsuite/gas/i386/x86-64-branch.d: Updated.
+ * testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
+ * testsuite/gas/i386/x86-64-branch-4.l: New file.
+ * testsuite/gas/i386/x86-64-branch-4.s: Likewise.
+
+2016-06-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add cortex-a73 entry.
+ * doc/c-aarch64.texi (-mcpu): Document cortex-a73 value.
+
+2016-06-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-a73 entry.
+ * doc/c-arm.texi (-mcpu=): Document cortex-a73 value.
+
+2016-06-02 Vineet Gupta <Vineet.Gupta1@synopsys.com>
+
+ * configure.tgt: Replace -uclibc with *.
+
+2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (parse_opcode_flags): New function.
+ (find_opcode_match): Move flag parsing code out to new function.
+ Ignore operands marked IGNORE.
+ (build_fake_opcode_hash_entry): New function.
+ (find_special_case_long_opcode): New function.
+ (find_special_case): Lookup long opcodes.
+ * testsuite/gas/arc/nps400-7.d: New file.
+ * testsuite/gas/arc/nps400-7.s: New file.
+
+2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ns32k.c: Remove definition of input_line_pointer.
+
+2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-avr.c (avr_parse_cons_expression): Replace iteration to
+ sentinal with iteration to array size.
+
+2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/xtensa-relax.h: Move typedefs of enums to the enums
+ definition.
+
+2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ns32k.c (bit_fix_new): Replace obstack-alloc with XOBNEW
+ macro.
+
+2016-06-01 Graham Markall <graham.markall@embecosm.com>
+
+ * testsuite/gas/arc/nps-400-1.s: Add rflt variants with
+ operands of types a,b,u6, 0,b,u6, and 0,b,limm.
+ * testsuite/gas/arc/nps-400-1.d: Likewise.
+
+2016-05-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20145
+ * config/tc-i386.c (cpu_noarch): Add noavx512f, noavx512cd,
+ noavx512er, noavx512pf, noavx512dq, noavx512bw, noavx512vl,
+ noavx512ifma and noavx512vbmi.
+ * doc/c-i386.texi: Mention noavx512f, noavx512cd, noavx512er,
+ noavx512pf, noavx512dq, noavx512bw, noavx512vl, noavx512ifma
+ and noavx512vbmi.
+ * testsuite/gas/i386/i386.exp: Run noavx512-1 and noavx512-2.
+ * testsuite/gas/i386/noavx512-1.l: New file.
+ * testsuite/gas/i386/noavx512-1.s: Likewise.
+ * testsuite/gas/i386/noavx512-2.l: Likewise.
+ * testsuite/gas/i386/noavx512-2.s: Likewise.
+
+2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20145
+ * config/tc-i386.c (cpu_arch): Add 687.
+ (cpu_noarch): Add no287, no387, no687, nosse2, nosse3, nossse3,
+ nosse4.1, nosse4.2, nosse4 and noavx2.
+ (parse_real_register): Check cpuregmmx instead of cpummx for MMX
+ register. Check cpuregxmm instead of cpusse for XMM register.
+ Check cpuregymm instead of cpuavx for YMM register. Check
+ cpuregzmm/cpuregmask instead of cpuavx512f for ZMMM/mask register.
+ * doc/c-i386.texi: Mention 687, no287, no387, no687, nosse2,
+ nosse3, nossse3, nosse4.1, nosse4.2, nosse4 and noavx2.
+ * testsuite/gas/i386/arch-10-prefetchw.d (as): Add mmx.
+ * testsuite/gas/i386/arch-10.d (as): Likewise.
+ * testsuite/gas/i386/arch-11.s: Add ".arch .mmx".
+ * testsuite/gas/i386/i386.exp: Pass mmx to assembler for
+ arch-10-3 and arch-10-4. Run no87-3, nosse-4, nosse-5, noavx-3
+ and noavx-4.
+ * testsuite/gas/i386/no87-3.l: New file.
+ * testsuite/gas/i386/no87-3.s: Likewise.
+ * testsuite/gas/i386/noavx-3.l: Likewise.
+ * testsuite/gas/i386/noavx-3.s: Likewise.
+ * testsuite/gas/i386/noavx-4.d: Likewise.
+ * testsuite/gas/i386/noavx-4.s: Likewise.
+ * testsuite/gas/i386/nosse-4.l: Likewise.
+ * testsuite/gas/i386/nosse-4.s: Likewise.
+ * testsuite/gas/i386/nosse-5.d: Likewise.
+ * testsuite/gas/i386/nosse-5.s: Likewise.
+
+2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20154
+ * config/tc-i386.c (cpu_flags_match): Don't set cpuamd64 nor
+ cpuintel64.
+ (match_template): Check Intel64/AMD64 ISA.
+
+2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20154
+ * config/tc-i386.c (intel64): New.
+ (cpu_flags_match): Set cpuamd64 and cpuintel64.
+ (md_parse_option): Set intel64 instead of cpuamd64 and
+ cpuintel64.
+
+2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_flags_match): Don't clear cpu64 nor
+ cpuno64.
+
+2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
+
+ * testsuite/gas/ppc/altivec3.d <vmsumudm>: Add test.
+ * testsuite/gas/ppc/altivec3.s: Likewise.
+ * testsuite/gas/ppc/power9.d <addex[.], lwzmx, vmsumudm>: Add tests.
+ * testsuite/gas/ppc/power9.s: Likewise.
+
+2016-05-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/avx512vl-2.l: Append "#pass".
+ * testsuite/gas/i386/noavx-1.l: Likewise.
+ * testsuite/gas/i386/nommx-1.l: Likewise.
+ * testsuite/gas/i386/nosse-1.l: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
+ * testsuite/gas/i386/avx512vl-2.s: Append ".p2align 4".
+ * testsuite/gas/i386/noavx-1.s: Likewise.
+ * testsuite/gas/i386/nommx-1.s: Likewise.
+ * testsuite/gas/i386/nosse-1.s: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
+
+2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-metag.c (metag_handle_align): Make the type of noop
+ unsigned char.
+
+2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-rx.c (md_convert_frag): Make the type of reloc_type
+ bfd_reloc_code_real_type.
+
+2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20140
+ * config/tc-i386.c (cpu_flags_match): Require another match
+ for AVX512VL.
+ * testsuite/gas/i386/i386.exp: Run avx512vl-1, avx512vl-2,
+ x86-64-avx512vl-1 and x86-64-avx512vl-2.
+ * testsuite/gas/i386/avx512vl-1.l: New file.
+ * testsuite/gas/i386/avx512vl-1.s: Likewise.
+ * testsuite/gas/i386/avx512vl-2.l: Likewise.
+ * testsuite/gas/i386/avx512vl-2.s: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-1.l: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-1.s: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
+
+2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/20141
+ * testsuite/gas/i386/i386.exp: Run x86-64-pr20141.
+ * testsuite/gas/i386/x86-64-pr20141.d: New file.
+ * testsuite/gas/i386/x86-64-pr20141.s: Likewise.
+
+2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (arch_entry): Remove negated.
+ (noarch_entry): New struct.
+ (cpu_arch): Updated. Remove .no87, .nommx, .nosse and .noavx.
+ (cpu_noarch): New.
+ (set_cpu_arch): Check cpu_noarch after cpu_arch.
+ (md_parse_option): Allow -march=+nosse. Check cpu_noarch after
+ cpu_arch.
+ (output_message): New function.
+ (show_arch): Use it. Handle cpu_noarch.
+ * testsuite/gas/i386/i386.exp: Run nommx-1, nommx-2, nommx-3,
+ nosse-1, nosse-2, nosse-3, noavx-1 and noavx-2.
+ * testsuite/gas/i386/noavx-1.l: New file.
+ * testsuite/gas/i386/noavx-1.s: Likewise.
+ * testsuite/gas/i386/noavx-2.s: Likewise.
+ * testsuite/gas/i386/noavx-2.l: Likewise.
+ * testsuite/gas/i386/nommx-1.s: Likewise.
+ * testsuite/gas/i386/nommx-1.l: Likewise.
+ * testsuite/gas/i386/nommx-2.s: Likewise.
+ * testsuite/gas/i386/nommx-2.l: Likewise.
+ * testsuite/gas/i386/nommx-3.s: Likewise.
+ * testsuite/gas/i386/nommx-3.l: Likewise.
+ * testsuite/gas/i386/nosse-1.s: Likewise.
+ * testsuite/gas/i386/nosse-1.l: Likewise.
+ * testsuite/gas/i386/nosse-2.s: Likewise.
+ * testsuite/gas/i386/nosse-2.l: Likewise.
+ * testsuite/gas/i386/nosse-3.s: Likewise.
+ * testsuite/gas/i386/nosse-3.l: Likewise.
+
+2016-05-25 Chua Zheng Leong <chuazl@comp.nus.edu.sg>
+
+ PR target/20067
+ * config/tc-arm.c (move_or_literal_pool): Only generate a VMOV.I64
+ instruction if supported by the currently selected fpu variant.
+ * testsuite/gas/arm/vfpv3-ldr_immediate.s: Add test of this PR.
+ * testsuite/gas/arm/vfpv3-ldr_immediate.d: Update expected disassembly.
+
+2016-05-24 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_fix_adjustable): Also return 0 for
+ jump relocations against MIPS16 or microMIPS symbols on RELA
+ targets.
+ * testsuite/gas/mips/jalx-local.d: New test.
+ * testsuite/gas/mips/jalx-local-n32.d: New test.
+ * testsuite/gas/mips/jalx-local-n64.d: New test.
+ * testsuite/gas/mips/jalx-local.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-05-24 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (md_apply_fix)
+ <BFD_RELOC_MIPS16_TLS_TPREL_LO16>: Remove fall-through, adjust
+ code accordingly.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-xtensa.c (struct suffix_reloc_map): Change type of field
+ operator to operatorT.
+ (map_suffix_reloc_to_operator): Change return type to operatorT.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-d30v.c (find_format): Change type of X_op to operatorT.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-mmix.c (mmix_parse_predefined_name): Change type of
+ handler_charp to const char *.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ft32.h (DEFAULT_TARGET_FORMAT): Remove.
+ (ft32_target_format): Likewise.
+ (TARGET_FORMAT): Adjust.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ia64.c (dot_rot): simplify allocations from obstacks.
+ (ia64_frob_label): Likewise.
+
+2016-05-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-cr16.c (check_range): Make type of retval op_err.
+ * config/tc-crx.c: Likewise.
+
+2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (md_begin): Add XY registers.
+ (cpu_types): Code density is default off for ARC EM.
+
+2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
+
+ * config/tc-arc.c (attributes_t): Renamed attribute class to
+ attr_class.
+ (find_opcode_match, assemble_insn, tokenize_extinsn): Changed.
+
+2016-05-23 Kuba Sejdak <jakub.sejdak@phoesys.com>
+
+ * configuse.tgt: Add entry for arm-phoenix.
+
+2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-tic54x.c (tic54x_sect): simplify string creation.
+
+2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-spu.c (APUOP): Use OPCODE as an unsigned constant.
+
+2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-tic54x.c (tic54x_mmregs): Adjust.
+ (md_begin): Likewise.
+ (encode_condition): Likewise.
+ (encode_cc3): Likewise.
+ (encode_cc2): Likewise.
+ (encode_operand): Likewise.
+ (tic54x_undefined_symbol): Likewise.
+
+2016-05-20 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Update comment. Add
+ p6600 entry.
+ * doc/c-mips.texi: Document p6600 -march option.
+
+2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19600
+ * config/tc-i386.c (md_apply_fix): Preserve addend for
+ BFD_RELOC_386_GOT32 and BFD_RELOC_X86_64_GOT32.
+ * testsuite/gas/i386/addend.d: New file.
+ * testsuite/gas/i386/addend.s: Likewise.
+ * testsuite/gas/i386/x86-64-addend.d: Likewise.
+ * testsuite/gas/i386/x86-64-addend.s: Likewise.
+ * testsuite/gas/i386/i386.exp: Run addend and x86-64-addend.
+ * testsuite/gas/i386/reloc32.d: Updated.
+
+2016-05-20 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (append_insn): Correct the encoding of a
+ constant argument for microMIPS JALX.
+ (tc_gen_reloc): Correct the encoding of an in-place addend for
+ microMIPS JALX.
+ * testsuite/gas/mips/jalx-addend.d: New test.
+ * testsuite/gas/mips/jalx-addend-n32.d: New test.
+ * testsuite/gas/mips/jalx-addend-n64.d: New test.
+ * testsuite/gas/mips/jalx-imm.d: New test.
+ * testsuite/gas/mips/jalx-imm-n32.d: New test.
+ * testsuite/gas/mips/jalx-imm-n64.d: New test.
+ * testsuite/gas/mips/jalx-addend.s: New test source.
+ * testsuite/gas/mips/jalx-imm.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-05-20 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c: Correct tab-after-space formatting mistakes
+ throughout.
+
+2016-05-18 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (find_opcode_match): Remove casting away of
+ const.
+ * config/tc-arc.h (struct arc_flags): Make flgp field const.
+
+2016-05-18 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (md_pcrel_from_section): Use BFD_VMA_FMT where
+ appropriate.
+ (md_convert_frag): Likewise.
+
+2016-05-18 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (arc_opcode_hash_entry_iterator_next): Set
+ cached opcode to NULL when we reach a non-matching opcode.
+ * testsuite/gas/arc/asm-errors-2.d: New file.
+ * testsuite/gas/arc/asm-errors-2.err: New file.
+ * testsuite/gas/arc/asm-errors-2.s: New file.
+
+2016-05-18 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (tokenize_arguments): Add checks for array
+ overflow.
+ * testsuite/gas/arc/asm-errors.s: Addition test line added.
+ * testsuite/gas/arc/asm-errors.err: Update expected results.
+
+2016-05-18 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-rx.c (struct cpu_type): Change the type of a field from
+ int to enum rx_cpu_types.
+
+2016-05-18 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-dlx.c (struct machine_it): change the type of a field from
+ int to bfd_reloc_code_real_type.
+ * config/tc-tic4x.c: Likewise.
+
+2016-05-18 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-v850.c (v850_target_arch): change type to enum
+ bfd_architecture.
+ * config/tc-v850.h (v850_target_arch): Likewise.
+
+2016-05-18 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_insert_operand): Trim PPC_OPERAND_SIGNOPT
+ allowed negative range.
+ * testsuite/gas/ppc/power9.s: Test xxspltib of -128, not -256.
+ * testsuite/gas/ppc/power9.d: Update.
+
+2016-05-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
+ disassembling and stop skipping targets.
+ * testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+ * testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
+ instruction for targets that have stronger alignment requirement.
+ * testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
+ * testsuite/gas/arm/archv8m-main.d: Likewise.
+ * testsuite/gas/arm/archv8m.s: Add label.
+ * testsuite/gas/arm/archv8m-cmse.s: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-main.s: Likewise.
+
+2016-05-16 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-m32r.c (mach_table): Make static and const.
+
+2016-05-16 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-vax.c (flonum_gen2vax): Adjust prototype to match
+ definition.
+
+2016-05-16 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-mn10300.c (md_begin): set linkrelax here instead of
+ defining it.
+ * config/tc-msp430.c (md_begin): Likewise.
+
+2016-05-16 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-m68hc11.c (fixup8): Change variables type from int to
+ bfd_reloc_code_real_type where appropriate.
+ (fixup16): Likewise.
+ (fixup8_xg): Likewise.
+
+2016-05-15 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-sh64.c (shmedia_check_limits): Constify `msg'.
+
+2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
+
+ * testsuite/gas/ppc/power9.d <xxspltib>: Add additional operand tests.
+ * testsuite/gas/ppc/power9.s: Likewise.
+
+2016-05-13 Alan Modra <amodra@gmail.com>
+
+ * config/obj-coff.c (weak_uniquify): Delete unused var.
+
+2016-05-13 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * app.c (app_push): Use XNEW and related macros.
+ * as.c (parse_args): Likewise.
+ * cgen.c (make_right_shifted_expr): Likewise.
+ (gas_cgen_tc_gen_reloc): Likewise.
+ * config/bfin-defs.h: Likewise.
+ * config/bfin-parse.y: Likewise.
+ * config/obj-coff.c (stack_init): Likewise.
+ (stack_push): Likewise.
+ (coff_obj_symbol_new_hook): Likewise.
+ (coff_obj_symbol_clone_hook): Likewise.
+ (add_lineno): Likewise.
+ (coff_frob_symbol): Likewise.
+ * config/obj-elf.c (obj_elf_section_name): Likewise.
+ (build_group_lists): Likewise.
+ * config/obj-evax.c (evax_symbol_new_hook): Likewise.
+ * config/obj-macho.c (obj_mach_o_indirect_symbol): Likewise.
+ * config/tc-aarch64.c (insert_reg_alias): Likewise.
+ (find_or_make_literal_pool): Likewise.
+ (add_to_lit_pool): Likewise.
+ (fill_instruction_hash_table): Likewise.
+ * config/tc-alpha.c (load_expression): Likewise.
+ (emit_jsrjmp): Likewise.
+ (s_alpha_ent): Likewise.
+ (s_alpha_end): Likewise.
+ (s_alpha_linkage): Likewise.
+ (md_begin): Likewise.
+ (tc_gen_reloc): Likewise.
+ * config/tc-arc.c (arc_insert_opcode): Likewise.
+ (arc_extcorereg): Likewise.
+ * config/tc-bfin.c: Likewise.
+ * config/tc-cr16.c: Likewise.
+ * config/tc-cris.c: Likewise.
+ * config/tc-crx.c (preprocess_reglist): Likewise.
+ * config/tc-d10v.c: Likewise.
+ * config/tc-frv.c (frv_insert_vliw_insn): Likewise.
+ (frv_tomcat_shuffle): Likewise.
+ * config/tc-h8300.c: Likewise.
+ * config/tc-i370.c (i370_macro): Likewise.
+ * config/tc-i386.c (lex_got): Likewise.
+ (md_parse_option): Likewise.
+ * config/tc-ia64.c (alloc_record): Likewise.
+ (set_imask): Likewise.
+ (save_prologue_count): Likewise.
+ (dot_proc): Likewise.
+ (dot_endp): Likewise.
+ (ia64_frob_label): Likewise.
+ (add_qp_imply): Likewise.
+ (add_qp_mutex): Likewise.
+ (mark_resource): Likewise.
+ (dot_alias): Likewise.
+ * config/tc-m68hc11.c: Likewise.
+ * config/tc-m68k.c (m68k_frob_label): Likewise.
+ (s_save): Likewise.
+ (mri_control_label): Likewise.
+ (push_mri_control): Likewise.
+ (build_mri_control_operand): Likewise.
+ (s_mri_else): Likewise.
+ (s_mri_break): Likewise.
+ (s_mri_next): Likewise.
+ (s_mri_for): Likewise.
+ (s_mri_endw): Likewise.
+ * config/tc-metag.c (create_mnemonic_htab): Likewise.
+ * config/tc-microblaze.c: Likewise.
+ * config/tc-mmix.c (s_loc): Likewise.
+ * config/tc-nds32.c (nds32_relax_hint): Likewise.
+ * config/tc-nios2.c (nios2_insn_reloc_new): Likewise.
+ * config/tc-rl78.c: Likewise.
+ * config/tc-rx.c (rx_include): Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-sh64.c (shmedia_frob_section_type): Likewise.
+ * config/tc-sparc.c: Likewise.
+ * config/tc-spu.c: Likewise.
+ * config/tc-tic6x.c (static tic6x_unwind_info *tic6x_get_unwind): Likewise.
+ (tic6x_start_unwind_section): Likewise.
+ * config/tc-tilegx.c: Likewise.
+ * config/tc-tilepro.c: Likewise.
+ * config/tc-v850.c: Likewise.
+ * config/tc-visium.c: Likewise.
+ * config/tc-xgate.c: Likewise.
+ * config/tc-xtensa.c (xtensa_translate_old_userreg_ops): Likewise.
+ (new_resource_table): Likewise.
+ (resize_resource_table): Likewise.
+ (xtensa_create_trampoline_frag): Likewise.
+ (xtensa_maybe_create_literal_pool_frag): Likewise.
+ (cache_literal_section): Likewise.
+ * config/xtensa-relax.c (append_transition): Likewise.
+ (append_condition): Likewise.
+ (append_value_condition): Likewise.
+ (append_constant_value_condition): Likewise.
+ (append_literal_op): Likewise.
+ (append_label_op): Likewise.
+ (append_constant_op): Likewise.
+ (append_field_op): Likewise.
+ (append_user_fn_field_op): Likewise.
+ (enter_opname_n): Likewise.
+ (enter_opname): Likewise.
+ (split_string): Likewise.
+ (parse_insn_templ): Likewise.
+ (clone_req_or_option_list): Likewise.
+ (clone_req_option_list): Likewise.
+ (parse_option_cond): Likewise.
+ (parse_insn_pattern): Likewise.
+ (parse_insn_repl): Likewise.
+ (build_transition): Likewise.
+ (build_transition_table): Likewise.
+ * dw2gencfi.c (alloc_fde_entry): Likewise.
+ (alloc_cfi_insn_data): Likewise.
+ (cfi_add_CFA_remember_state): Likewise.
+ (dot_cfi_escape): Likewise.
+ (dot_cfi_fde_data): Likewise.
+ (select_cie_for_fde): Likewise.
+ * dwarf2dbg.c (dwarf2_directive_loc): Likewise.
+ * ecoff.c (ecoff_add_bytes): Likewise.
+ (ecoff_build_debug): Likewise.
+ * input-scrub.c (input_scrub_push): Likewise.
+ (input_scrub_begin): Likewise.
+ (input_scrub_next_buffer): Likewise.
+ * itbl-ops.c (append_insns_as_macros): Likewise.
+ (alloc_entry): Likewise.
+ (alloc_field): Likewise.
+ * listing.c (listing_newline): Likewise.
+ (listing_listing): Likewise.
+ * macro.c (get_any_string): Likewise.
+ (delete_macro): Likewise.
+ * stabs.c (generate_asm_file): Likewise.
+ (stabs_generate_asm_lineno): Likewise.
+ * subsegs.c (subseg_change): Likewise.
+ (subseg_get): Likewise.
+ * symbols.c (define_dollar_label): Likewise.
+ (symbol_relc_make_sym): Likewise.
+ * write.c (write_relocs): Likewise.
+
+2016-05-13 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/obj-coff.c (obj_coff_def): Simplify string copying.
+ (weak_name2altname): Likewise.
+ (weak_uniquify): Likewise.
+ (obj_coff_section): Likewise.
+ (obj_coff_init_stab_section): Likewise.
+ * config/obj-elf.c (obj_elf_section_name): Likewise.
+ (obj_elf_init_stab_section): Likewise.
+ * config/obj-evax.c (evax_shorten_name): Likewise.
+ * config/obj-macho.c (obj_mach_o_make_or_get_sect): Likewise.
+ * config/tc-aarch64.c (create_register_alias): Likewise.
+ * config/tc-alpha.c (load_expression): Likewise.
+ (s_alpha_file): Likewise.
+ (s_alpha_section_name): Likewise.
+ (tc_gen_reloc): Likewise.
+ * config/tc-arc.c (md_assemble): Likewise.
+ * config/tc-arm.c (create_neon_reg_alias): Likewise.
+ (start_unwind_section): Likewise.
+ * config/tc-hppa.c (pa_build_unwind_subspace): Likewise.
+ (hppa_elf_mark_end_of_function): Likewise.
+ * config/tc-nios2.c (nios2_modify_arg): Likewise.
+ (nios2_negate_arg): Likewise.
+ * config/tc-rx.c (rx_section): Likewise.
+ * config/tc-sh64.c (sh64_consume_datalabel): Likewise.
+ * config/tc-tic30.c (tic30_find_parallel_insn): Likewise.
+ * config/tc-tic54x.c (tic54x_include): Likewise.
+ (tic54x_macro_info): Likewise.
+ (subsym_get_arg): Likewise.
+ (subsym_substitute): Likewise.
+ (tic54x_start_line_hook): Likewise.
+ * config/tc-xtensa.c (xtensa_literal_prefix): Likewise.
+ (xg_reverse_shift_count): Likewise.
+ * config/xtensa-relax.c (enter_opname_n): Likewise.
+ (split_string): Likewise.
+ * dwarf2dbg.c (get_filenum): Likewise.
+ (process_entries): Likewise.
+ * expr.c (operand): Likewise.
+ * itbl-ops.c (alloc_entry): Likewise.
+ * listing.c (listing_message): Likewise.
+ (listing_title): Likewise.
+ * macro.c (check_macro): Likewise.
+ * stabs.c (s_xstab): Likewise.
+ * symbols.c (symbol_relc_make_expr): Likewise.
+ * write.c (compress_debug): Likewise.
+
+2016-05-12 Nick Clifton <nickc@redhat.com>
+
+ PR target/20068
+ * testsuite/gas/arm/pr20068.d: Use correct regexp syntax.
+
+2016-05-11 Nick Clifton <nickc@redhat.com>
+
+ PR target/20068
+ * testsuite/gas/arm/pr20068.d: Adjust expected output to allow for
+ big endian ARM configurations.
+
+2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
+ Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (options): Add OPTION_DSPR3 and
+ OPTION_NO_DSPR3.
+ (md_longopts): Likewise.
+ (md_show_usage): Add help for -mdspr3 and -mno-dspr3.
+ (mips_ases): Define availability for DSPr3.
+ (mips_ase_groups): Add ASE_DSPR3 to the DSP group.
+ (mips_convert_ase_flags): Map ASE_DSPR3 to AFL_ASE_DSPR3.
+ * doc/as.texinfo: Document -mdspr3, -mno-dspr3. Fix -mdspr2
+ formatting.
+ * doc/c-mips.texi: Document -mdspr3, -mno-dspr3, .set dspr3 and
+ .set nodspr3. Fix -mdspr2 formatting.
+ * testsuite/gas/mips/mips32-dspr3.d: New file.
+ * testsuite/gas/mips/mips32-dspr3.s: Likewise.
+ * testsuite/gas/mips/mips.exp: Run mips32-dspr3 test.
+
+2016-05-11 Nick Clifton <nickc@redhat.com>
+
+ PR target/20068
+ * config/tc-arm.c (add_to_lit_pool): Ensure that the padding added
+ to the pool uses O_constant.
+ * testsuite/gas/arm/pr20068.s: New test.
+ * testsuite/gas/arm/pr20068.d: Test driver.
+
+2016-05-11 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/arm/archv8m-cmse-base.d: Skip for non-ELF ARM targets.
+ * testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+
+2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
+
+ * testsuite/gas/i386/i386.exp: Run RDPID tests.
+ * testsuite/gas/i386/prefix.d: Adjust.
+ * testsuite/gas/i386/rdpid.s: New test.
+ * testsuite/gas/i386/rdpid.d: Ditto.
+ * testsuite/gas/i386/rdpid-intel.d: Ditto.
+ * testsuite/gas/i386/x86-64-rdpid.s: Ditto.
+ * testsuite/gas/i386/x86-64-rdpid.d: Ditto.
+ * testsuite/gas/i386/x86-64-rdpid-intel.d: Ditto.
+
+2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add RDPID.
+ * doc/c-i386.texi: Document RDPID.
+
+2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (arm_adjust_symtab): Use ARM_SET_SYM_BRANCH_TYPE to
+ set branch type of a symbol.
+
+2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions.
+ * config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP
+ instructions.
+ (arm_extensions): Add dsp extension for ARMv8-M Mainline.
+ (aeabi_set_public_attributes): Memorize the feature bits of the
+ architecture selected for Tag_CPU_arch. Use it to set
+ Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension.
+ (arm_convert_symbolic_attribute): Define Tag_DSP_extension.
+ * testsuite/gas/arm/arch7em-bad.d: Rename to ...
+ * testsuite/gas/arm/arch7em-bad-1.d: This.
+ * testsuite/gas/arm/arch7em-bad-2.d: New file.
+ * testsuite/gas/arm/arch7em-bad-3.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise.
+ * testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise.
+
+2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (struct arm_option_extension_value_table): Make
+ allowed_archs an array with 2 entries.
+ (ARM_EXT_OPT): Adapt to only fill the first entry of allowed_archs.
+ (ARM_EXT_OPT2): New macro filling the two entries of allowed_archs.
+ (arm_extensions): Use separate entries in allowed_archs when several
+ archs are allowed to use an extension and change ARCH_ANY in
+ ARM_ARCH_NONE in allowed_archs.
+ (arm_parse_extension): Check that, for each allowed_archs entry, all
+ bits are set in the current architecture, ignoring ARM_ANY entries.
+ (s_arm_arch_extension): Likewise.
+
+2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (arm_ext_m): Add feature bit ARM_EXT2_V8M_MAIN.
+ (arm_ext_v8m_main): New feature set for bit ARM_EXT2_V8M_MAIN.
+ (arm_ext_v8m_m_only): New feature set for instructions in ARMv8-M not
+ shared with a non M profile architecture.
+ (do_rn): New function.
+ (known_t32_only_insn): Check opcode against arm_ext_v8m_m_only rather
+ than arm_ext_v8m.
+ (v7m_psrs): Add ARMv8-M security extensions new special registers.
+ (insns): Add ARMv8-M Security Extensions instructions.
+ (aeabi_set_public_attributes): Use arm_ext_v8m_m_only instead of
+ arm_ext_v8m_m to decide the profile and the Thumb ISA.
+ * testsuite/gas/arm/archv8m-cmse.s: New file.
+ * testsuite/gas/arm/archv8m-cmse-main.s: Likewise..
+ * testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
+ * testsuite/gas/arm/any-cmse.d: Likewise.
+ * testsuite/gas/arm/any-cmse-main.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+
+2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/sparc/sparc5vis4.s: Fix mnemonic of faligndatai.
+ * testsuite/gas/sparc/sparc5vis4.d: Likewise.
+
+2016-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (fpu_arch_vfp_v1): Mark with ATTRIBUTE_UNUSED.
+ (fpu_arch_vfp_v3): Likewise.
+ (fpu_arch_neon_v1): Likewise.
+ (arm_arch_full): Likewise.
+ (parse_neon_el_struct_list): Initialize fields of firsttype.
+
+2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (syntaxclass): Add SYNTAX_NOP and SYNTAX_1OP.
+ (arc_extinsn): Handle new introduced syntax.
+ * testsuite/gas/arc/textinsn1op.d: New file.
+ * testsuite/gas/arc/textinsn1op.s: Likewise.
+ * doc/c-arc.texi: Document SYNTAX_NOP and SYNTAX_1OP.
+
+2016-05-03 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
+
+ * testsuite/gas/lns/lns.exp: Add avr to list of targets using
+ DW_LNS_fixed_advance_pc.
+
+2016-04-27 Alan Modra <amodra@gmail.com>
+
+ * as.h (inline, __PTR_TO_INT, __INT_TO_PTR): Don't define.
+ (xmemdup0): New inline function.
+
+2016-04-22 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (code_option_type): New enum.
+ (parse_code_option): Return status indicating option type.
+ (s_mipsset): Update `parse_code_option' call site accordingly.
+ Always set register sizes from the ISA with ISA overrides.
+ (s_module): Update `parse_code_option' call site.
+ * testsuite/gas/mips/isa-override-1.d: New test.
+ * testsuite/gas/mips/micromips@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips1@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips2@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips32@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips32r2@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips32r3@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips32r5@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips32r6@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips64r2@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips64r3@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips64r5@isa-override-1.d: New test.
+ * testsuite/gas/mips/mips64r6@isa-override-1.d: New test.
+ * testsuite/gas/mips/r3000@isa-override-1.d: New test.
+ * testsuite/gas/mips/r3900@isa-override-1.d: New test.
+ * testsuite/gas/mips/r5900@isa-override-1.d: New test.
+ * testsuite/gas/mips/octeon@isa-override-1.d: New test.
+ * testsuite/gas/mips/octeon3@isa-override-1.d: New test.
+ * testsuite/gas/mips/isa-override-2.l: New list test.
+ * testsuite/gas/mips/mips1@isa-override-2.l: New list test.
+ * testsuite/gas/mips/mips2@isa-override-2.l: New list test.
+ * testsuite/gas/mips/mips32@isa-override-2.l: New list test.
+ * testsuite/gas/mips/mips32r2@isa-override-2.l: New list test.
+ * testsuite/gas/mips/mips32r3@isa-override-2.l: New list test.
+ * testsuite/gas/mips/mips32r5@isa-override-2.l: New list test.
+ * testsuite/gas/mips/mips32r6@isa-override-2.l: New list test.
+ * testsuite/gas/mips/r3000@isa-override-2.l: New list test.
+ * testsuite/gas/mips/r3900@isa-override-2.l: New list test.
+ * testsuite/gas/mips/octeon3@isa-override-2.l: New list test.
+ * testsuite/gas/mips/octeon3@isa-override-1.l: New stderr
+ output.
+ * testsuite/gas/mips/isa-override-1.s: New test source.
+ * testsuite/gas/mips/r5900@isa-override-1.s: New test source.
+ * testsuite/gas/mips/isa-override-2.s: New test source.
+ * testsuite/gas/mips/mips1@isa-override-2.s: New test source.
+ * testsuite/gas/mips/mips2@isa-override-2.s: New test source.
+ * testsuite/gas/mips/mips32@isa-override-2.s: New test source.
+ * testsuite/gas/mips/mips32r2@isa-override-2.s: New test source.
+ * testsuite/gas/mips/mips32r3@isa-override-2.s: New test source.
+ * testsuite/gas/mips/mips32r5@isa-override-2.s: New test source.
+ * testsuite/gas/mips/mips32r6@isa-override-2.s: New test source.
+ * testsuite/gas/mips/r3000@isa-override-2.s: New test source.
+ * testsuite/gas/mips/r3900@isa-override-2.s: New test source.
+ * testsuite/gas/mips/octeon3@isa-override-2.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * cgen.c: Likewise.
+ * config/tc-bfin.c: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-mep.c: Likewise.
+ * config/tc-metag.c: Likewise.
+ * config/tc-nios2.c: Likewise.
+ * config/tc-rl78.c: Likewise.
+
+2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * doc/c-arc.texi (ARC Options): Add nps400 to list of valus for
+ -mcpu. Add cross reference to .cpu directive from -mcpu option.
+ (ARC Directives): Add NPS400 to .cpu directive list.
+
+2016-04-20 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-aarch64.c (aarch64_features): Add "ras".
+ * doc/c-aarch64.texi (AArch64 Extensions): Add "ras".
+ * testsuite/gas/aarch64/armv8-ras-1.d: New.
+ * testsuite/gas/aarch64/armv8-ras-1.s: New.
+ * testsuite/gas/aarch64/illegal-ras-1.d: New.
+ * testsuite/gas/aarch64/illegal-ras-1.s: New.
+
+2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/nps400-6.d: New file.
+ * testsuite/gas/arc/nps400-6.s: New file.
+
+2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/nps400-4.d: New file.
+ * testsuite/gas/arc/nps400-4.s: New file.
+ * testsuite/gas/arc/nps400-5.d: New file.
+ * testsuite/gas/arc/nps400-5.s: New file.
+
+2016-04-19 Martin Galvan <martin.galvan@tallertechnologies.com>
+
+ * doc/as.texinfo (.cfi_remember_state, .cfi_restore_state): Improve
+ documentation.
+
+2016-04-17 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ Revert prevous change.
+ * config/tc-arc.c (arc_option): Make .cpu directive
+ case-sensitive again.
+
+2016-04-16 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (arc_option): Make .cpu directive
+ case-insensitive.
+
+2016-04-16 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (arc_option): Allow NPS400 in .cpu directive.
+
+2016-04-15 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-mips.c (md_begin): Remove useless assignment.
+
+2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.in: Regenerated with automake 1.11.6.
+ * aclocal.m4: Likewise.
+ * doc/Makefile.in: Likewise.
+
+2016-04-15 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (toc_reloc_types): Wrap in #ifdef OBJ_ELF
+
+2016-04-14 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-nios2.c (nios2_as_options): Make file static.
+ * config/tc-ppc.c (toc_reloc_ypes): Likewise.
+ * config/tc-sparc.c (native_op_table): Likewise.
+
+2016-04-14 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-m32c.c (M32C_Macros): Remove.
+ * config/tc-msp430.c (option_numbers): Likewise.
+
+2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/nps400-3.d: New file.
+ * testsuite/gas/arc/nps400-3.s: New file.
+
+2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/add_s-err.s: Update target pattern.
+ * testsuite/gas/arc/warn.s: Likewise.
+ * testsuite/gas/elf/elf.exp: Run test for arc.
+
+2016-04-14 Nick Clifton <nickc@redhat.com>
+
+ PR target/19938
+ * testsuite/gas/i386/ilp32/x86-64-unwind.d: Allow for the string
+ sections possibly having the SHF_STRINGS flag bit set.
+ * testsuite/gas/i386/x86-64-unwind.d: Likewise.
+
+2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (mach_type_specified_p): Change type to
+ bfd_boolean.
+ (arc_option): Set private flags when parsing cpu pseudo-op.
+ (md_parse_option): Set mach_type_specified_p to TRUE.
+
+2016-04-13 Nick Clifton <nickc@redhat.com>
+
+ PR target/19937
+ * testsuite/gas/v850/pr19937.s: New test.
+ * testsuite/gas/v850/pr19937.d: New test control file.
+ * testsuite/gas/v850/basic.exp: Run the new test.
+
+2016-04-13 Maciej W. Rozycki <macro@imgtec.com>
+ Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * config/tc-mips.c (relaxed_branch_length): Use the long
+ sequence where the target is a weak symbol.
+ (relaxed_micromips_32bit_branch_length): Likewise.
+ (relaxed_micromips_16bit_branch_length): Likewise.
+ * testsuite/gas/mips/branch-weak-1.d: New test.
+ * testsuite/gas/mips/branch-weak-2.d: New test.
+ * testsuite/gas/mips/branch-weak-3.d: New test.
+ * testsuite/gas/mips/branch-weak-4.d: New test.
+ * testsuite/gas/mips/branch-weak-5.d: New test.
+ * testsuite/gas/mips/branch-weak.l: New stderr output.
+ * testsuite/gas/mips/branch-weak.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-13 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (relaxed_branch_length): Use the long
+ sequence where the distance cannot be determined.
+ (relaxed_micromips_32bit_branch_length): Likewise.
+ * testsuite/gas/mips/branch-extern-1.d: New test.
+ * testsuite/gas/mips/branch-extern-2.d: New test.
+ * testsuite/gas/mips/branch-extern-3.d: New test.
+ * testsuite/gas/mips/branch-extern-4.d: New test.
+ * testsuite/gas/mips/branch-extern.l: New stderr output.
+ * testsuite/gas/mips/branch-extern.s: New test source.
+ * testsuite/gas/mips/branch-section-1.d: New test.
+ * testsuite/gas/mips/branch-section-2.d: New test.
+ * testsuite/gas/mips/branch-section-3.d: New test.
+ * testsuite/gas/mips/branch-section-4.d: New test.
+ * testsuite/gas/mips/branch-section.l: New stderr output.
+ * testsuite/gas/mips/branch-section.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/arc/textauxregister.d: New file.
+ * testsuite/gas/arc/textauxregister.s: Likewise.
+ * testsuite/gas/arc/textcondcode.d: Likewise.
+ * testsuite/gas/arc/textcondcode.s: Likewise.
+ * testsuite/gas/arc/textcoreregister.d: Likewise.
+ * testsuite/gas/arc/textcoreregister.s: Likewise.
+ * testsuite/gas/arc/textpseudoop.d: Likewise.
+ * testsuite/gas/arc/textpseudoop.s: Likewise.
+ * testsuite/gas/arc/ld2.d: Update test.
+ * testsuite/gas/arc/st.d: Likewise.
+ * testsuite/gas/arc/taux.d: Likewise.
+ * doc/c-arc.texi (ARC Directives): Add .extCondCode,
+ .extCoreRegister and .extAuxRegister documentation.
+ * config/tc-arc.c (arc_extcorereg): New function.
+ (md_pseudo_table): Add .extCondCode, .extCoreRegister and
+ .extAuxRegister pseudo-ops.
+ (extRegister_t): New type.
+ (ext_condcode, arc_aux_hash): New global variable.
+ (find_opcode_match): Check for extensions.
+ (preprocess_operands): Likewise.
+ (md_begin): Add aux registers in a hash.
+ (assemble_insn): Update use arc_flags member.
+ (tokenize_extregister): New function.
+ (create_extcore_section): Likewise.
+ * config/tc-arc.h (arc_flags): Delete code, add flgp.
+
+2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/arc/noargs_a7.d: New file.
+ * testsuite/gas/arc/noargs_a7.s: Likewise.
+ * testsuite/gas/arc/noargs_hs.d: Likewise.
+ * testsuite/gas/arc/noargs_hs.s: Likewise.
+
+2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/arc/textinsn-errors.d: New File.
+ * testsuite/gas/arc/textinsn-errors.err: Likewise.
+ * testsuite/gas/arc/textinsn-errors.s: Likewise.
+ * testsuite/gas/arc/textinsn2op.d: Likewise.
+ * testsuite/gas/arc/textinsn2op.s: Likewise.
+ * testsuite/gas/arc/textinsn2op01.d: Likewise.
+ * testsuite/gas/arc/textinsn2op01.s: Likewise.
+ * testsuite/gas/arc/textinsn3op.d: Likewise.
+ * testsuite/gas/arc/textinsn3op.s: Likewise.
+ * doc/c-arc.texi (ARC Directives): Add .extInstruction
+ documentation.
+ * config/tc-arc.c (arcext_section): New variable.
+ (arc_extinsn): New function.
+ (md_pseudo_table): Add .extInstruction pseudo op.
+ (attributes_t): New type.
+ (suffixclass, syntaxclass, syntaxclassmod): New constant
+ structures.
+ (find_opcode_match): Remove arc_num_opcodes.
+ (md_begin): Likewise.
+ (tokenize_extinsn): New function.
+ (arc_set_ext_seg): Likewise.
+ (create_extinst_section): Likewise.
+
+2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (preprocess_operands): Mark AUX symbol.
+ (arc_adjust_symtab): New function.
+ * config/tc-arc.h (ARC_FLAG_AUX): Define.
+ (obj_adjust_symtab): Likewise.
+ * testsuite/gas/arc/taux.d: New file.
+ * testsuite/gas/arc/taux.s: Likewise.
+
+2016-04-09 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (s_option): Sanitize `.option picX'
+ pseudo-op.
+ * testsuite/gas/mips/option-pic-1.d: New test.
+ * testsuite/gas/mips/option-pic-2.l: New list test.
+ * testsuite/gas/mips/option-pic-1.s: New test source.
+ * testsuite/gas/mips/option-pic-2.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-09 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (s_option): Reject `.option picX' if VxWorks
+ PIC.
+ * testsuite/gas/mips/option-pic-vxworks-1.l: New list test.
+ * testsuite/gas/mips/option-pic-vxworks-2.l: New list test.
+ * testsuite/gas/mips/option-pic-vxworks-1.s: New test source.
+ * testsuite/gas/mips/option-pic-vxworks-2.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-09 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (can_swap_branch_p): Correct call formatting.
+
+2016-04-09 Maciej W. Rozycki <macro@imgtec.com>
+
+ * messages.c (as_bad): Fix a typo in description.
+
+2016-04-09 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_check_options): Unify messages.
+
+2016-04-09 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_check_options): Use `opts->isa'
+ consistently.
+
+2016-04-08 Nick Clifton <nickc@redhat.com>
+
+ PR target/19910
+ * testsuite/gas/sparc/pr19910-1.d: Adjust regexps to work with
+ COFF and AOUT sparc targets.
+
+2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7.
+ * testsuite/gas/arc/nps400-2.d: New file.
+ * testsuite/gas/arc/nps400-2.s: New file.
+
+2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (struct arc_opcode_hash_entry_iterator): New
+ structure.
+ (arc_opcode_hash_entry_iterator_init): New function.
+ (arc_opcode_hash_entry_iterator_next): New function.
+ (find_opcode_match): Iterate over all arc_opcode entries
+ referenced by the arc_opcode_hash_entry passed in as a parameter.
+
+2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (arc_find_opcode): Now returns
+ arc_opcode_hash_entry pointer.
+ (find_opcode_match): Update argument type, extract arc_opcode from
+ incoming arc_opcode_hash_entry.
+ (find_special_case_pseudo): Update return type.
+ (find_special_case_flag): Update return type.
+ (find_special_case): Update return type.
+ (assemble_tokens): Lookup arc_opcode_hash_entry based on
+ instruction mnemonic, then use find_opcode_match to identify
+ specific arc_opcode.
+
+2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (struct arc_opcode_hash_entry): New structure.
+ (arc_find_opcode): New function.
+ (find_special_case_pseudo): Use arc_find_opcode.
+ (find_special_case_flag): Likewise.
+ (assemble_tokens): Likewise.
+ (md_begin): Build hash using struct arc_opcode_hash_entry.
+
+2016-04-07 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (arc_option): Prepare string for automatic
+ translation.
+ (declare_register): Likewise.
+
+2016-04-06 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * doc/c-aarch64.texi (Architecture Extensions): Add entry for LSE.
+ Correct entry for RDMA. Alpha sort entries.
+
+2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (tokenize_flags): Allow greater range of
+ characters into flag names.
+
+2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (find_opcode_match): Handle O_symbol case, add
+ new de_fault label.
+ (preprocess_operands): Delete.
+ (assemble_tokens): Remove call to preprocess_operands.
+
+2016-04-07 Nick Clifton <nickc@redhat.com>
+
+ PR gas/19910
+ * config/tc-sparc.c (sparc_ip): Report an error if the expression
+ inside a %-macro could not be fully parsed.
+ * expr.c (integer_constant): Accept and ignore U suffixes to
+ integers.
+ (operand): When a missing closing parenthesis is encountered,
+ report the character that was found instead.
+ * testsuite/gas/mips/tls-ill.l: Update expected error message.
+ * testsuite/gas/sparc/pr19910-1.d: New test driver.
+ * testsuite/gas/sparc/pr19910-1.s: New test.
+ * testsuite/gas/sparc/pr19910-2.l: Expected error output.
+ * testsuite/gas/sparc/pr19910-2.s: New test.
+ * testsuite/gas/sparc/sparc.exp: Run the new tests.
+
+2016-04-06 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c (msp430_operands): Check for a NOP preceding
+ an EINT instruction. Warn/fix as necessary.
+ * testsuite/gas/msp430/bad.s: Add test of EINT without preceding NOP.
+ * testsuite/gas/msp430/bad.l: Update expected messages.
+
+2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/nps400-1.d: Update expected results.
+ * testsuite/gas/arc/nps400-1.s: Additional test cases.
+
+2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (is_code_density_p): Compare directly the
+ subclass field.
+ (is_spfp_p, is_dpfp_p, is_spfp_p): Define.
+ (check_cpu_feature): New function.
+ (find_opcode_match): Use check_cpu_feature function.
+ (preprocess_operands): Likewise.
+ (md_parse_option): Use mfpuda, mdpfp, mspfp options.
+ * testsuite/gas/arc/tdpfp.d: New file.
+ * testsuite/gas/arc/tfpuda.d: Likewise.
+ * testsuite/gas/arc/tfpx.s: Likewise.
+
+2016-04-05 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-arm.c (do_neon_mac_maybe_scalar): Allow F16.
+ * testsuite/gas/arm/armv8-2-fp16-simd.s: New tests.
+ * testsuite/gas/arm/armv8-2-fp16-simd.d: New expected results.
+ * testsuite/gas/arm/armv8-2-fp16-simd-thum.d: Likewise for Thumb.
+ * testsuite/gas/arm/armv8-2-fp16-simd-warning.l: New warning results.
+ * testsuite/gas/arm/simd_by_scalar_low_regbank.s: New test source.
+ * testsuite/gas/arm/simd_by_scalar_low_regbank.d: New testcase.
+ * testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d: Likewise
+ for Thumb.
+ * testsuite/gas/arm/simd_by_scalar_low_regbank.l: New warning results.
+
+2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (assemble_insn): Prohibit pc-rel relocations for
+ JUMP instructions type.
+ * testsuite/gas/arc/relocs-errors.d: New file.
+ * testsuite/gas/arc/relocs-errors.err: Likewise.
+ * testsuite/gas/arc/relocs-errors.s: Likewise.
+
+2016-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19909
+ * config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding
+ only if i.disp_encoding != disp_encoding_32bit.
+ * gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32.
+ * gas/testsuite/gas/i386/x86-64-disp32.s: Likewise.
+ * gas/testsuite/gas/i386/disp32.d: Updated.
+ * gas/testsuite/gas/i386/x86-64-disp32.d: Likewise.
+
+2016-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19498
+ * testsuite/gas/i386/i386.exp: Run pr19498.
+ * testsuite/gas/i386/pr19498.d: New file.
+ * testsuite/gas/i386/pr19498.s: Likewise.
+
+2016-04-04 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.h: Include 'opcode/arc.h'.
+ (MAX_INSN_ARGS): Delete.
+ (MAX_INSN_FLGS): Delete.
+
+2016-04-04 Alan Modra <amodra@gmail.com>
+
+ PR 19498
+ * symbols.c (resolve_symbol_value): Clear sy_resolving on exit
+ from function on all paths that set sy_resolving.
+
+2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * app.c (app_push): use XNEW macro.
+ * as.c: Likewise.
+ * config/obj-elf.c (obj_elf_change_section): Likewise.
+ (elf_copy_symbol_attributes): Likewise.
+ (obj_elf_size): Likewise.
+ (build_group_lists): Likewise.
+ * config/tc-aarch64.c (add_operand_error_record): Likewise.
+ (md_assemble): Likewise.
+ (tc_gen_reloc): Likewise.
+ (get_upper_str): Likewise.
+ (aarch64_parse_features): Likewise.
+ * config/tc-arm.c (insert_reg_alias): Likewise.
+ (insert_neon_reg_alias): Likewise.
+ (find_or_make_literal_pool): Likewise.
+ (s_arm_elf_cons): Likewise.
+ (add_unwind_opcode): Likewise.
+ (arm_parse_extension): Likewise.
+ * config/tc-avr.c (create_record_for_frag): Likewise.
+ * config/tc-crx.c: Likewise.
+ * config/tc-d30v.c: Likewise.
+ * config/tc-dlx.c (s_proc): Likewise.
+ * config/tc-ft32.c: Likewise.
+ * config/tc-h8300.c: Likewise.
+ * config/tc-hppa.c (pa_proc): Likewise.
+ (create_new_space): Likewise.
+ (create_new_subspace): Likewise.
+ * config/tc-i860.c: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-iq2000.c (iq2000_add_macro): Likewise.
+ (iq2000_record_hi16): Likewise.
+ * config/tc-m32c.c (m32c_indirect_operand): Likewise.
+ * config/tc-m32r.c (debug_sym): Likewise.
+ (m32r_record_hi16): Likewise.
+ * config/tc-m68k.c (m68k_ip): Likewise.
+ (md_begin): Likewise.
+ * config/tc-mcore.c: Likewise.
+ * config/tc-microblaze.c (check_got): Likewise.
+ * config/tc-mips.c (append_insn): Likewise.
+ (s_mipsset): Likewise.
+ (mips_record_label): Likewise.
+ (s_mips_end): Likewise.
+ * config/tc-mmix.c (mmix_frob_file): Likewise.
+ * config/tc-mn10200.c: Likewise.
+ * config/tc-mn10300.c: Likewise.
+ * config/tc-moxie.c: Likewise.
+ * config/tc-msp430.c: Likewise.
+ * config/tc-nds32.c (nds32_elf_save_pseudo_pattern): Likewise.
+ * config/tc-ns32k.c: Likewise.
+ * config/tc-or1k.c: Likewise.
+ * config/tc-pdp11.c: Likewise.
+ * config/tc-pj.c (fake_opcode): Likewise.
+ * config/tc-ppc.c (ppc_apuinfo_section_add): Likewise.
+ (ppc_macro): Likewise.
+ (ppc_dwsect): Likewise.
+ (ppc_machine): Likewise.
+ * config/tc-rl78.c (rl78_frag_init): Likewise.
+ * config/tc-rx.c (rx_frag_init): Likewise.
+ * config/tc-s390.c (s390_lit_suffix): Likewise.
+ (s390_machine): Likewise.
+ (s390_machinemode): Likewise.
+ * config/tc-score.c (s3_insert_reg): Likewise.
+ (s3_gen_reloc): Likewise.
+ * config/tc-score7.c (s7_insert_reg): Likewise.
+ (s7_gen_reloc): Likewise.
+ * config/tc-tic30.c (tic30_operand): Likewise.
+ * config/tc-tic4x.c (tic4x_inst_make): Likewise.
+ * config/tc-tic54x.c (stag_add_field): Likewise.
+ (tic54x_struct): Likewise.
+ (tic54x_space): Likewise.
+ (tic54x_field): Likewise.
+ (tic54x_mlib): Likewise.
+ (subsym_substitute): Likewise.
+ * config/tc-tic6x.c (tic6x_frob_label): Likewise.
+ * config/tc-vax.c: Likewise.
+ * config/tc-xc16x.c: Likewise.
+ * config/tc-xtensa.c (xtensa_add_insn_label): Likewise.
+ (directive_push): Likewise.
+ (xtensa_begin_directive): Likewise.
+ (tokenize_arguments): Likewise.
+ (xtensa_add_literal_sym): Likewise.
+ (new_resource_table): Likewise.
+ (resize_resource_table): Likewise.
+ (emit_single_op): Likewise.
+ (xtensa_create_trampoline_frag): Likewise.
+ (xtensa_maybe_create_literal_pool_frag): Likewise.
+ (xtensa_add_config_info): Likewise.
+ (xtensa_realloc_fixup_cache): Likewise.
+ (add_subseg_info): Likewise.
+ (cache_literal_section): Likewise.
+ (add_xt_block_frags): Likewise.
+ (add_xt_prop_frags): Likewise.
+ (init_op_placement_info_table): Likewise.
+ (build_section_rename): Likewise.
+ * config/tc-z80.c: Likewise.
+ * config/tc-z8k.c: Likewise.
+ * depend.c (register_dependency): Likewise.
+ * dwarf2dbg.c (get_line_subseg): Likewise.
+ (dwarf2_gen_line_info_1): Likewise.
+ (get_filenum): Likewise.
+ * ecoff.c (allocate_scope): Likewise.
+ (allocate_vlinks): Likewise.
+ (allocate_shash): Likewise.
+ (allocate_thash): Likewise.
+ (allocate_tag): Likewise.
+ (allocate_forward): Likewise.
+ (allocate_thead): Likewise.
+ (allocate_lineno_list): Likewise.
+ * expr.c (make_expr_symbol): Likewise.
+ * hash.c (hash_new_sized): Likewise.
+ * input-file.c (input_file_push): Likewise.
+ * listing.c (file_info): Likewise.
+ (listing_newline): Likewise.
+ * macro.c (new_formal): Likewise.
+ (define_macro): Likewise.
+ * remap.c (add_debug_prefix_map): Likewise.
+ * symbols.c (symbol_find_noref): Likewise.
+ (define_dollar_label): Likewise.
+ (fb_label_instance_inc): Likewise.
+ (symbol_relc_make_value): Likewise.
+
+2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/obj-elf.c (obj_elf_vendor_attribute): Use xstrdup.
+ * config/tc-ppc.c (ppc_frob_file_before_adjust): Likewise.
+ (ppc_znop): Likewise.
+ (ppc_pe_section): Likewise.
+ (ppc_frob_symbol): Likewise.
+ * config/tc-tic30.c (tic30_operand): Likewise.
+ * config/tc-tic4x.c (tic4x_sect): Likewise.
+ (tic4x_usect): Likewise.
+
+2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-alpha.c: Const qualify FLT_CHARS.
+ * config/atof-ieee.c: Remove declarations of FLT_CHARS and EXP_CHARS.
+ * config/tc-cris.h: Likewise.
+ * expr.c: Likewise.
+ * config/tc-mmix.c (md_atof): Adjust comment.
+ * config/tc-mmix.h: Stop defining FLT_CHARS and EXP_CHARS as macros.
+ * tc.h: Declare FLT_CHARS and EXP_CHARS.
+
+2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-score.c (s3_gen_reloc): Add const qualifiers.
+ * config/tc-score7.c (s7_gen_reloc): Likewise.
+
+2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-arm.c (do_t_branch): Change the type of reloc to
+ bfd_reloc_code_real_type.
+
+2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/bfin-parse.y (current_inputline): Remove definition.
+ * config/tc-bfin.c (md_assemble): Simplify use of current_inputline.
+
+2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-avr.c (md_parse_option): Use strcasecmp () to compare
+ strings.
+
+2016-04-02 Alan Modra <amodra@gmail.com>
+
+ PR 19896
+ * read.c (assign_symbol): Consume rest of line after an error
+ rather than continuing to process the line.
+
+2016-04-01 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.h (MAX_FLAG_NAME_LENGHT): Rename to...
+ (MAX_FLAG_NAME_LENGTH): ...this.
+ (struct arc_flags): Update to use MAX_FLAG_NAME_LENGTH.
+ * config/tc-arc.c (tokenize_flags): Likewise.
+
+2016-04-01 Alan Modra <amodra@gmail.com>
+
+ * cgen.c (weak_operand_overflow_check): Return const char*.
+ * messages.c (as_internal_value_out_of_range): Formatting.
+ (as_warn_value_out_of_range): Consify prefix param.
+ (as_bad_value_out_of_range): Likewise.
+ * read.c (s_errwarn): Constify msg..
+ (s_float_space, float_cons): ..and err.
+ * as.h (as_warn_value_out_of_range, as_bad_value_out_of_range,
+ ieee_md_atof, vax_md_atof): Update prototypes.
+ * tc.h (md_atof): Update prototype.
+ * config/atof-ieee.c (ieee_md_atof): Return const char*.
+ * config/atof-vax.c (vax_md_atof): Likewise.
+ * config/obj-elf.c (obj_elf_parse_section_letters): Constify bad_msg.
+ * config/tc-aarch64.c (md_atof): Return const char*.
+ * config/tc-alpha.c (s_alpha_section_name): Likewise.
+ (s_alpha_comm): Constify sec_name.
+ (section_name): Constify.
+ (s_alpha_section): Consify name..
+ (alpha_elf_section_letter): ..and ptr_msg param..
+ (md_atof): ..and return.
+ * config/tc-alpha.h (alpha_elf_section_letter): Update prototype.
+ * config/tc-arc.c (md_atof): Return const char*.
+ * config/tc-arm.c (md_atof): Likewise.
+ * config/tc-avr.c (md_atof): Likewise.
+ * config/tc-bfin.c (md_atof): Likewise.
+ * config/tc-cr16.c (md_atof): Likewise.
+ * config/tc-cris.c (md_atof): Likewise.
+ * config/tc-crx.c (md_atof): Likewise.
+ * config/tc-d10v.c (md_atof): Likewise.
+ * config/tc-d30v.c (md_atof): Likewise.
+ * config/tc-dlx.c (md_atof): Likewise.
+ * config/tc-epiphany.c (md_atof): Likewise.
+ * config/tc-fr30.c (md_atof): Likewise.
+ * config/tc-frv.c (md_atof): Likewise.
+ * config/tc-ft32.c (md_atof): Likewise.
+ * config/tc-h8300.c (md_atof): Likewise.
+ * config/tc-hppa.c (struct default_subspace_dict): Constify name.
+ (struct default_space_dict): Likewise.
+ (create_new_space): Constify name param.
+ (create_new_subspace): Likewise.
+ (is_defined_space, is_defined_subspace): Likewise.
+ (pa_parse_space_stmt): Constify space_name param.
+ (md_atof): Return const char*.
+ (pa_spaces_begin): Constify name.
+ * config/tc-i370.c (md_atof): Return const char*.
+ * config/tc-i386.c (md_atof): Likewise.
+ (x86_64_section_letter): Constify ptr_msg param.
+ * config/tc-i386.h (x86_64_section_letter): Update prototype.
+ * config/tc-i860.c (struct i860_it): Constify error.
+ (md_atof): Return const char*.
+ * config/tc-i960.c (md_atof): Likewise.
+ * config/tc-ia64.c (md_atof): Likewise.
+ (ia64_elf_section_letter): Constify ptr_msg param.
+ * config/tc-ia64.h (ia64_elf_section_letter): Update prototype.
+ * config/tc-ip2k.c (md_atof): Return const char*.
+ * config/tc-iq2000.c (md_atof): Likewise.
+ * config/tc-lm32.c (md_atof): Likewise.
+ * config/tc-m32c.c (md_atof): Likewise.
+ * config/tc-m32r.c (md_atof): Likewise.
+ * config/tc-m68hc11.c (md_atof): Likewise.
+ * config/tc-m68k.c (md_atof): Likewise.
+ * config/tc-mcore.c (md_atof): Likewise.
+ * config/tc-mep.c (md_atof): Likewise.
+ (mep_elf_section_letter): Constify ptr_msg param.
+ * config/tc-mep.h (mep_elf_section_letter): Update prototype.
+ * config/tc-metag.c (md_atof): Return const char*.
+ * config/tc-microblaze.c (md_atof): Likewise.
+ * config/tc-microblaze.h (md_atof): Delete prototype.
+ * config/tc-mips.c (mips_parse_argument_token): Constify err.
+ (md_atof): Return const char*.
+ * config/tc-mmix.c (md_atof): Likewise.
+ * config/tc-mn10200.c (md_atof): Likewise.
+ * config/tc-mn10300.c (md_atof): Likewise.
+ * config/tc-moxie.c (md_atof): Likewise.
+ * config/tc-msp430.c (md_atof): Likewise.
+ * config/tc-mt.c (md_atof): Likewise.
+ * config/tc-nds32.c (md_atof): Likewise.
+ * config/tc-nios2.c (md_atof): Likewise.
+ (nios2_elf_section_letter): Constify ptr_msg param.
+ * config/tc-nios2.h (nios2_elf_section_letter): Update prototype.
+ * config/tc-ns32k.c (md_atof): Return const char*.
+ * config/tc-or1k.c (md_atof): Likewise.
+ * config/tc-pdp11.c (struct pdp11_code): Constify error.
+ (md_atof): Return const char*.
+ * config/tc-pj.c (md_atof): Likewise.
+ * config/tc-ppc.c (md_atof): Likewise.
+ * config/tc-rl78.c (md_atof): Likewise.
+ * config/tc-rx.c (md_atof): Likewise.
+ * config/tc-s390.c (md_atof): Likewise.
+ * config/tc-score.c (s3_atof, md_atof): Likewise.
+ * config/tc-sh.c (md_atof): Likewise.
+ * config/tc-sparc.c (struct sparc_it): Constify error.
+ (md_atof): Return const char*.
+ * config/tc-spu.c (md_atof): Likewise.
+ * config/tc-tic30.c (md_atof): Likewise.
+ * config/tc-tic4x.c (md_atof): Likewise.
+ * config/tc-tic54x.c (md_atof): Likewise.
+ * config/tc-tic6x.c (md_atof): Likewise.
+ * config/tc-tilegx.c (md_atof): Likewise.
+ * config/tc-tilepro.c (md_atof): Likewise.
+ * config/tc-v850.c (parse_register_list, md_atof): Likewise.
+ * config/tc-vax.c (md_atof): Likewise.
+ * config/tc-visium.c (md_atof): Likewise.
+ * config/tc-xc16x.c (md_atof): Likewise.
+ * config/tc-xgate.c (md_atof): Likewise.
+ * config/tc-xstormy16.c (md_atof): Likewise.
+ * config/tc-xtensa.c (md_atof): Likewise.
+ * config/tc-z80.c (md_atof): Likewise.
+ * config/tc-z8k.c (md_atof): Likewise.
+
+2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-xtensa.c (struct rename_section_struct): Make old_name
+ const.
+ (xtensa_section_rename): Make argument type const char *.
+ * config/tc-xtensa.h (xtensa_section_rename): Adjust.
+
+2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-i960.c (parse_ldconst): Cast to char * when assigning to
+ args[0].
+
+2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-m32c.c (m32c_md_end): cast the argument to md_assemble to
+ char *.
+ (m32c_indirect_operand): Likewise.
+ * config/tc-nds32.c (do_pseudo_b): Likewise.
+ (do_pseudo_bal): Likewise.
+ (do_pseudo_ls_bhw): Likewise.
+
+2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * as.c (parse_args): Cast literal to char * when assigning to optarg.
+
+2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ia64.c (md_assemble): Add temporary variable to pass to
+ get_symbol_name ().
+ * config/tc-sparc.c (s_register): Cast a literal to char * in
+ assignment.
+
+2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-i960.c (parse_expr): Cast to char * when assigning to
+ input_line_pointer.
+ * config/tc-m32r.c (expand_debug_syms): Likewise.
+ * config/tc-msp430.c (msp430_dstoperand): Likewise.
+ * config/tc-z80.c (md_begin): Likewise.
+ * stabs.c (stabs_generate_asm_func): Likewise.
+
+2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * cgen.c: Modernize the way functions declare arguments.
+ * config/tc-bfin.c: Likewise.
+ * config/tc-pdp11.c: Likewise.
+ * literal.c: Likewise.
+ * read.c: Likewise.
+ * stabs.c: Likewise.
+
+2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-aarch64.c (aarch64_handle_align): Make the type of some
+ variables unsigned char[].
+ * config/tc-alpha.c (alpha_handle_align): Likewise.
+ * config/tc-arm.c (arm_handle_align): Likewise.
+ * config/tc-z80.c: Likewise.
+
+2016-03-30 Nick Clifton <nickc@redhat.com>
+
+ PR target/19880
+ * config/tc-arm.c (do_t_push_pop): Cast bitmask to unsigned before
+ shifting.
+
+2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/all/gas.exp: Don't xfail on ARC.
+ * testsuite/gas/elf/elf.exp: Likewise.
+ * testsuite/gas/all/redef3.d: Allow execution for ARC.
+
+2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/arc/warn.exp: Fix matching pattern.
+
+2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/arc/ext2op.d: New file.
+ * testsuite/gas/arc/ext2op.s: Likewise.
+ * testsuite/gas/arc/ext3op.d: Likewise.
+ * testsuite/gas/arc/ext3op.s: Likewise.
+
+2016-03-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-aarch64.c (struct aarch64_long_option_table): Ad const
+ qualifier.
+ * config/tc-alpha.c (md_parse_option): Likewise.
+ * config/tc-arc.c (md_parse_option): Likewise.
+ * config/tc-arm.c (struct arm_long_option_table): Likewise.
+ (md_parse_option): Likewise.
+ * config/tc-avr.c (md_parse_option): Likewise.
+ * config/tc-bfin.c (md_parse_option): Likewise.
+ * config/tc-cr16.c (md_parse_option): Likewise.
+ * config/tc-cris.c (s_cris_arch): Likewise.
+ (md_parse_option): Likewise.
+ * config/tc-crx.c (md_parse_option): Likewise.
+ * config/tc-d10v.c (md_parse_option): Likewise.
+ * config/tc-d30v.c (md_parse_option): Likewise.
+ * config/tc-dlx.c (md_parse_option): Likewise.
+ * config/tc-epiphany.c (md_parse_option): Likewise.
+ * config/tc-fr30.c (md_parse_option): Likewise.
+ * config/tc-frv.c (md_parse_option): Likewise.
+ * config/tc-ft32.c (md_parse_option): Likewise.
+ * config/tc-h8300.c (md_parse_option): Likewise.
+ * config/tc-hppa.c (md_parse_option): Likewise.
+ * config/tc-i370.c (md_parse_option): Likewise.
+ * config/tc-i386.c (md_parse_option): Likewise.
+ * config/tc-i860.c (md_parse_option): Likewise.
+ * config/tc-i960.c (md_parse_option): Likewise.
+ * config/tc-ia64.c (md_parse_option): Likewise.
+ * config/tc-ip2k.c (md_parse_option): Likewise.
+ * config/tc-iq2000.c (md_parse_option): Likewise.
+ * config/tc-lm32.c (md_parse_option): Likewise.
+ * config/tc-m32c.c (md_parse_option): Likewise.
+ * config/tc-m32r.c (md_parse_option): Likewise.
+ * config/tc-m68hc11.c (md_parse_option): Likewise.
+ * config/tc-m68k.c (md_parse_option): Likewise.
+ * config/tc-mcore.c (md_parse_option): Likewise.
+ * config/tc-mep.c (md_parse_option): Likewise.
+ * config/tc-metag.c (struct metag_long_option): Likewise.
+ (md_parse_option): Likewise.
+ * config/tc-microblaze.c (md_parse_option): Likewise.
+ * config/tc-microblaze.h (md_parse_option): Remove prototype.
+ * config/tc-mips.c (md_parse_option): Adjust.
+ * config/tc-mmix.c (md_parse_option): Likewise.
+ * config/tc-mn10200.c (md_parse_option): Likewise.
+ * config/tc-mn10300.c (md_parse_option): Likewise.
+ * config/tc-moxie.c (md_parse_option): Likewise.
+ * config/tc-msp430.c (md_parse_option): Likewise.
+ * config/tc-mt.c (md_parse_option): Likewise.
+ * config/tc-nds32.c (md_parse_option): Likewise.
+ * config/tc-nds32.h (nds32_parse_option): Likewise.
+ * config/tc-nios2.c (md_parse_option): Likewise.
+ * config/tc-ns32k.c (md_parse_option): Likewise.
+ * config/tc-or1k.c (md_parse_option): Likewise.
+ * config/tc-pdp11.c (md_parse_option): Likewise.
+ * config/tc-pj.c (md_parse_option): Likewise.
+ * config/tc-ppc.c (md_parse_option): Likewise.
+ * config/tc-rl78.c (md_parse_option): Likewise.
+ * config/tc-rx.c (md_parse_option): Likewise.
+ * config/tc-s390.c (s390_parse_cpu): Likewise.
+ * config/tc-score.c (md_parse_option): Likewise.
+ * config/tc-sh.c (md_parse_option): Likewise.
+ * config/tc-sparc.c (md_parse_option): Likewise.
+ * config/tc-spu.c (md_parse_option): Likewise.
+ * config/tc-tic30.c (md_parse_option): Likewise.
+ * config/tc-tic4x.c (md_parse_option): Likewise.
+ * config/tc-tic54x.c (md_parse_option): Likewise.
+ * config/tc-tic6x.c (md_parse_option): Likewise.
+ * config/tc-tilegx.c (md_parse_option): Likewise.
+ * config/tc-tilepro.c (md_parse_option): Likewise.
+ * config/tc-v850.c (md_parse_option): Likewise.
+ * config/tc-vax.c (md_parse_option): Likewise.
+ * config/tc-visium.c (struct visium_long_option_table): Likewise.
+ * config/tc-xc16x.c (md_parse_option): Likewise.
+ * config/tc-xgate.c (md_parse_option): Likewise.
+ * config/tc-xstormy16.c (md_parse_option): Likewise.
+ * config/tc-xtensa.c (md_parse_option): Likewise.
+ * config/tc-z80.c (md_parse_option): Likewise.
+ * config/tc-z8k.c (md_parse_option): Likewise.
+ * tc.h (md_parse_option): Likewise.
+
+2016-03-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-bfin.c (gencode): Use XOBNEW obstack_alloc () wrapper.
+ * config/tc-hppa.c (fix_new_hppa): Likewise.
+ (pa_vtable_entry): Likewise.
+ (pa_vtable_inherit): Likewise.
+ * config/tc-m68k.c (md_begin): Likewise.
+
+2016-03-28 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/obj-elf.c (obj_elf_section_name): Return const char *.
+ * config/obj-elf.h (obj_elf_section_name): Adjust.
+ * config/tc-aarch64.c (aarch64_parse_features): Likewise.
+ (aarch64_parse_cpu): Likewise.
+ (aarch64_parse_arch): Likewise.
+ * config/tc-arm.c (arm_parse_extension): Likewise.
+ (arm_parse_cpu): Likewise.
+ (arm_parse_arch): Likewise.
+ * config/tc-nds32.c: Likewise.
+ * config/xtensa-relax.c (parse_special_fn): Likewise.
+ * stabs.c (generate_asm_file): Likewise.
+
+2016-03-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-cr16.c (cr16_assemble): New function.
+ (md_assemble): Call cr16_assemble.
+
+2016-03-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * as.c (parse_args): Adjust.
+ * as.h (flag_size_check): Rename to flag_allow_nonconst_size.
+ * config/obj-elf.c (elf_frob_symbol): Adjust.
+
+2016-03-24 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (sparc_ip): Remove the V9 restriction on ASR
+ registers to be in the 16..31 range.
+
+2016-03-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-microblaze.c (md_assemble): Cast opc to char * when calling
+ frag_var ().
+
+2016-03-24 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-visium.c (md_atof): Localize the string returned on
+ failure.
+
+2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-h8300.c (h8300_elf_section): Add const qualifiers.
+ * config/tc-ia64.c (obj_elf_vms_common): Likewise.
+ * config/tc-m68hc11.c (md_begin): Likewise.
+ (print_opcode_list): Likewise.
+ * config/tc-msp430.c (msp430_section): Likewise.
+ * config/tc-score.c (struct s3_insn_to_dependency): Likewise.
+ (s3_build_dependency_insn_hsh): Likewise.
+ * config/tc-score7.c (struct s7_insn_to_dependency): Likewise.
+ (s7_build_dependency_insn_hsh): Likewise.
+ * config/tc-tic4x.c: Likewise.
+ * config/tc-tic54x.c (tic54x_set_default_include): Likewise.
+ (subsym_get_arg): Likewise.
+ * config/tc-xtensa.c (struct suffix_reloc_map): Likewise.
+ (get_directive): Likewise.
+ (cache_literal_section): Likewise.
+ * config/xtensa-relax.c: Likewise.
+ * symbols.c (symbol_create): Likewise.
+ (local_symbol_make): Likewise.
+ (symbol_relc_make_expr): Likewise.
+
+2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-pdp11.c (md_assemble): Remove useless if and assignment to
+ str.
+
+2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-sparc.c (sparc_regname_to_dw2regnum): Replace strchr ()
+ call with a switch.
+
+2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-ia64.c (ia64_do_align): Remove.
+ (ia64_cons_align): Call do_align () directly.
+ (dot_proc): Likewise.
+ (stmt_float_cons): Likewise.
+
+2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * listing.c (listing_message): Use XNEW style allocation macros.
+ * read.c (read_a_source_file): Likewise.
+ (read_symbol_name): Likewise.
+ (s_mri_common): Likewise.
+ (assign_symbol): Likewise.
+ (s_reloc): Likewise.
+ (emit_expr_with_reloc): Likewise.
+ (s_incbin): Likewise.
+ (s_include): Likewise.
+ * sb.c (sb_build): Likewise.
+ (sb_check): Likewise.
+
+2016-03-22 Alan Modra <amodra@gmail.com>
+
+ * write.c (record_alignment): Revert 2016-02-18 change.
+
+2016-03-22 Alan Modra <amodra@gmail.com>
+
+ * config/tc-alpha.c (load_expression): Replace alloca with xmalloc.
+ (emit_jsrjmp, tc_gen_reloc): Likewise.
+ * config/tc-i370.c (i370_macro): Likewise.
+
+2016-03-22 Nick Clifton <nickc@redhat.com>
+
+ * configure: Regenerate.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/nps400-0.d: New file.
+ * testsuite/gas/arc/nps400-0.s: New file.
+ * testsuite/gas/arc/nps400-1.d: New file.
+ * testsuite/gas/arc/nps400-1.s: New file.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (find_opcode_match): Move lnflg, and i
+ declarations to start of block. Reset code on all flags before
+ attempting to match them. Handle multiple hits on the same flag.
+ Handle flag class.
+ * testsuite/gas/arc/asm-errors.d: New file.
+ * testsuite/gas/arc/asm-errors.err: New file.
+ * testsuite/gas/arc/asm-errors.s: New file.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (cpu_types): Add nps400 entry.
+ (check_zol): Handle nps400.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (arc_select_cpu): Remove use of
+ EF_ARC_CPU_GENERIC.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * config/tc-arc.c (arc_target): Delay initialisation until
+ arc_select_cpu.
+ (arc_target_name): Likewise.
+ (arc_features): Likewise.
+ (arc_mach_type): Likewise.
+ (cpu_types): Remove "all" entry.
+ (arc_select_cpu): New function, most of the content is from...
+ (md_parse_option): ... here. Call new arc_select_cpu.
+ (md_begin): Call arc_select_cpu if needed, default is now arc700.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/inline-data-1.d: Add target restriction.
+ * testsuite/gas/arc/inline-data-2.d: New file.
+
+2016-03-21 Nick Clifton <nickc@redhat.com>
+
+ * atof-generic.c: Replace use of alloca with call to xmalloc.
+ * cgen.c: Likewise.
+ * dwarf2dbg.c: Likewise.
+ * macro.c: Likewise.
+ * remap.c: Likewise.
+ * stabs.c: Likewise.
+ * symbols.c: Likewise.
+ * config/obj-elf.c: Likewise.
+ * config/tc-aarch64.c: Likewise.
+ * config/tc-arc.c: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-avr.c: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-mips.c: Likewise.
+ * config/tc-msp430.c: Likewise.
+ * config/tc-nds32.c: Likewise.
+ * config/tc-ppc.c: Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-tic30.c: Likewise.
+ * config/tc-tic54x.c: Likewise.
+ * config/tc-xstormy16.c: Likewise.
+ * config/te-vms.c: Likewise.
+ * configure: Regenerate.
+
+2016-03-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * tc-i386.c (f32_1): Change type to unsigned char[].
+ (f32_2): Likewise.
+ (f32_3): Likewise.
+ (f32_4): Likewise.
+ (f32_5): Likewise.
+ (f32_6): Likewise.
+ (f32_7): Likewise.
+ (f32_8): Likewise.
+ (f32_9): Likewise.
+ (f32_10): Likewise.
+ (f32_11): Likewise.
+ (f32_12): Likewise.
+ (f32_13): Likewise.
+ (f32_14): Likewise.
+ (f16_3): Likewise.
+ (f16_4): Likewise.
+ (f16_5): Likewise.
+ (f16_6): Likewise.
+ (f16_7): Likewise.
+ (f16_8): Likewise.
+ (jump_31): Likewise.
+ (f32_patt): Likewise.
+ (f16_patt): Likewise.
+ (alt_3): Likewise.
+ (alt_4): Likewise.
+ (alt_5): Likewise.
+ (alt_6): Likewise.
+ (alt_7): Likewise.
+ (alt_8): Likewise.
+ (alt_9): Likewise.
+ (alt_10): Likewise.
+ (alt_patt): Likewise.
+
+2016-03-18 Nick Clifton <nickc@redhat.com>
+
+ * doc/c-aarch64.texi (AArch64 Directives): Add descriptions of
+ .cpu, .dword, .even, .inst. .tlsdescadd, .tlsdesccall,
+ .tlsdescldr and .xword directives.
+
+ PR target/19721
+ * testsuite/gas/aarch64/pr19721.s: New test source file.
+ * testsuite/gas/aarch64/pr19721.d: New test driver file.
+
+ * doc/as.texinfo: Place the target specific command line options
+ into their own man page section.
+
+2016-03-16 Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-arm.c (N_S_32): New.
+ (N_F_16_32): Likewise.
+ (N_SUF_32): Support N_F16.
+ (N_IF_32): Likewise.
+ (neon_dyadic_misc): Likewise.
+ (do_neon_cmp): Likewise.
+ (do_neon_cmp_inv): Likewise.
+ (do_neon_mul): Likewise.
+ (do_neon_fcmp_absolute): Likewise.
+ (do_neon_step): Likewise.
+ (do_neon_abs_neg): Likewise.
+ (CVT_FLAVOR_VAR): Likewise.
+ (do_neon_cvt_1): Likewise.
+ (do_neon_recip_est): Likewise.
+ (do_vmaxnm): Likewise.
+ (do_vrint_1): Likewise.
+ (neon_check_type): Check architecture support for FP16 extension.
+ (insns): Update comments.
+ * testsuite/gas/arm/armv8-2-fp16-simd.s: New test source.
+ * testsuite/gas/arm/armv8-2-fp16-simd.d: New testcase for arm mode.
+ * testsuite/gas/arm/armv8-2-fp16-simd-thumb.d: Likewise for thumb mode.
+ * testsuite/gas/arm/armv8-2-fp16-simd-warning.d: New rejection test for
+ arm mode.
+ * testsuite/gas/arm/armv8-2-fp16-simd-warning-thumb.d: Likewise for
+ thumb mode.
+ * testsuite/gas/arm/armv8-2-fp16-simd-warning.l: New expected rejection
+ error file.
+
+2016-03-16 Nick Clifton <nickc@redhat.com>
+
+ * read.c (emit_expr_with_reloc): Add code check a bignum with
+ nbytes == 1.
+ * config/rx/rx-parse.y (rx_intop): Accept bignum values for sizes
+ other than 32-bits.
+ * testsuite/gas/elf/bignum.s: New test source file.
+ * testsuite/gas/elf/bignum.d: New test driver file.
+ * testsuite/gas/elf/elf.exp: Run the new test.
+
+2016-03-15 Ulrich Drepper <drepper@gmail.com>
+
+ * doc/c-i386.texi (Register Naming): Update to details of the
+ latest architecture version.
+
+2016-03-10 Mickael Guene <mickael.guene@st.com>
+
+ PR gas/19744
+ * config/tc-arm.c (do_arit): Protect against bad relocations usage.
+ (do_mov): Likewise.
+ (do_t_add_sub): Allow pcrop relocations for Thumb-2 targets.
+ (do_t_mov_cmp): Likewise.
+ (do_t_add_sub): Protect against bad relocations usage.
+ (do_t_mov_cmp): Likewise.
+ * testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.s: New.
+ * testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.d: New.
+ * testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.s: New.
+ * testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.d: New.
+
+2016-03-09 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-arm.c (neon_alignment_bit): Rename do_align to
+ do_alignment.
+ (do_neon_ld_st_lane): Likewise.
+ (do_neon_ld_dup): Likewise.
+
+2016-03-08 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/arc/inline-data-1.d: New file.
+ * testsuite/gas/arc/inline-data-1.s: New file.
+
+2016-03-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-r8.
+ * doc/c-arm.texi: Add cortex-r8.
+
+2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * config/tc-arc.c: Add const qualifiers.
+ * config/tc-h8300.c (md_begin): Likewise.
+ * config/tc-ia64.c (print_prmask): Likewise.
+ * config/tc-msp430.c (msp430_operands): Likewise.
+ * config/tc-nds32.c (struct suffix_name): Likewise.
+ (struct nds32_parse_option_table): Likewise.
+ (struct nds32_set_option_table): Likewise.
+ (do_pseudo_pushpopm): Likewise.
+ (do_pseudo_pushpop_stack): Likewise.
+ (nds32_relax_relocs): Likewise.
+ (nds32_flag): Likewise.
+ (struct nds32_hint_map): Likewise.
+ (nds32_find_reloc_table): Likewise.
+ (nds32_match_hint_insn): Likewise.
+ * config/tc-s390.c: Likewise.
+ * config/tc-sh.c (get_specific): Likewise.
+ * config/tc-tic30.c: Likewise.
+ * config/tc-tic4x.c (tic4x_inst_add): Likewise.
+ (tic4x_indirect_parse): Likewise.
+ * config/tc-vax.c (vax_cons): Likewise.
+ * config/tc-z80.c (struct reg_entry): Likewise.
+ * config/tc-epiphany.c (md_assemble): Adjust.
+ (epiphany_assemble): New function.
+ (epiphany_elf_section_rtn): Call do_align directly.
+ (epiphany_elf_section_text): Likewise.
+ * config/tc-ip2k.c (ip2k_elf_section_rtn): Likewise.
+ (ip2k_elf_section_text): Likewise.
+ * read.c (do_align): Make it not static.
+ * read.h (do_align): New prototype.
+
+2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-arm.c (aeabi_set_public_attributes): Emit attribute
+ for ARMv8.1 AdvSIMD use.
+ * testsuite/gas/arm/attr-march-armv8-a+rdma.d: New.
+ * testsuite/gas/arm/attr-march-armv8_1-a+simd.d: New.
+
+2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/gas/tc-arm.c (fpu_neon_ext_v8_1): Restrict to the ARMv8.1 RDMA
+ feature.
+ (record_feature_use): New.
+ (mark_feature_used): Use record_feature_use.
+ (do_neon_qrdmlah): New.
+ (insns): Use do_neon_qrdmlah for vqrdmlah and vqrdmlsh and
+ variants.
+ (arm_extensions): Put into alphabetical order. Re-indent "simd"
+ and "rdma" entries. Fix the incorrect merge value for "+rdma".
+ * testsuite/gas/arm/armv8-a+rdma-warning.d: New.
+ * testsuite/gas/arm/armv8-a+rdma.d: Add assembler command line options.
+ Make source file explicit.
+ * testsuite/gas/arm/armv8-a+rdma.l: New.
+ * testsuite/gas/arm/armv8-a+rdma.s: Remove .arch and .arch_extension
+ directives. Fix white-space.
+ * testsuite/gas/arm/armv8_1-a+simd.d: New.
+
+2016-03-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/x86_64-intel.d: Adjusted for COFF.
+
+2016-02-29 Cupertino Miranda <cmiranda@synopsys.com>
+ Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
+
+ * config/tc-arc.c (arc_extra_reloc): Change size to 0.
+ (tc_arc_fix_adjustable): Changed default return value to 1.
+ * testsuite/gas/arc/j.d: Updated expected symbol
+ * testsuite/gas/arc/jl.d: Likewise
+ * testsuite/gas/arc/relax-avoid1.d: Likewise
+ * testsuite/gas/arc/st.d: Likewise
+
+2016-02-29 Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
+
+ * config/tc-arc.c: Enable code density instructions for ARC EM.
+
+2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19645
+ * NEWS: Mention --enable-elf-stt-common and --elf-stt-common=
+ for ELF assemblers.
+ * as.c (flag_use_elf_stt_common): New.
+ (show_usage): Add --elf-stt-common=.
+ (option_values): Add OPTION_ELF_STT_COMMON.
+ (std_longopts): Add --elf-stt-common=.
+ (parse_args): Handle --elf-stt-common=.
+ * as.h (flag_use_elf_stt_common): New.
+ * config.in: Regenerated.
+ * configure: Likewise.
+ * configure.ac: Add --enable-elf-stt-common and define
+ DEFAULT_GENERATE_ELF_STT_COMMON.
+ * gas/write.c (write_object_file): Set BFD_CONVERT_ELF_COMMON
+ and BFD_USE_ELF_STT_COMMON if flag_use_elf_stt_common is set.
+ * doc/as.texinfo: Document --elf-stt-common=.
+ * testsuite/gas/elf/common3.s: New file.
+ * testsuite/gas/elf/common3a.d: Likewise.
+ * testsuite/gas/elf/common3b.d: Likewise.
+ * testsuite/gas/elf/common4.s: Likewise.
+ * testsuite/gas/elf/common4a.d: Likewise.
+ * testsuite/gas/elf/common4b.d: Likewise.
+ * testsuite/gas/i386/dw2-compress-3b.d: Likewise.
+ * testsuite/gas/i386/dw2-compressed-3b.d: Likewise.
+ * testsuite/gas/elf/elf.exp: Run common3a, common3b, common4a
+ and common4b.
+ * testsuite/gas/i386/dw2-compress-3.d: Renamed to ...
+ * testsuite/gas/i386/dw2-compress-3a.d: This. Pass
+ --elf-stt-common=no to as.
+ * testsuite/gas/i386/dw2-compressed-3.d: Renamed to ...
+ * testsuite/gas/i386/dw2-compressed-3a.d: This. Pass
+ --elf-stt-common=no to as.
+ * testsuite/gas/i386/i386.exp: Run dw2-compress-3a,
+ dw2-compress-3b, dw2-compressed-3a and dw2-compressed-3b instead
+ of dw2-compress-3 and dw2-compressed-3.
+
+2016-02-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * as.c (select_emulation_mode): Add const qualifiers.
+ * as.h: Likewise.
+ * config/bfin-defs.h: Likewise.
+ * config/bfin-parse.y: Likewise.
+ * config/rx-parse.y: Likewise.
+ * config/tc-aarch64.c (struct aarch64_option_table): Likewise.
+ (struct aarch64_cpu_option_table): Likewise.
+ (struct aarch64_arch_option_table): Likewise.
+ (struct aarch64_option_cpu_value_table): Likewise.
+ (struct aarch64_long_option_table): Likewise.
+ (struct aarch64_option_abi_value_table): Likewise.
+ * config/tc-arm.c (struct reloc_entry): Likewise.
+ (tc_gen_reloc): Likewise.
+ (struct arm_option_table): Likewise.
+ (struct arm_legacy_option_table): Likewise.
+ (struct arm_cpu_option_table): Likewise.
+ (struct arm_arch_option_table): Likewise.
+ (struct arm_option_extension_value_table): Likewise.
+ (struct arm_option_fpu_value_table): Likewise.
+ (struct arm_option_value_table): Likewise.
+ (struct arm_long_option_table): Likewise.
+ * config/tc-avr.c (struct avr_opcodes_s): Likewise.
+ (struct mcu_type_s): Likewise.
+ (struct exp_mod_s): Likewise.
+ (avr_operand): Likewise.
+ (avr_operands): Likewise.
+ * config/tc-d10v.c (md_begin): Likewise.
+ * config/tc-dlx.c: Likewise.
+ * config/tc-fr30.c (fr30_is_colon_insn): Likewise.
+ * config/tc-ft32.c (parse_condition): Likewise.
+ * config/tc-h8300.c (do_a_fix_imm): Likewise.
+ * config/tc-hppa.c (pa_ip): Likewise.
+ (hppa_regname_to_dw2regnum): Likewise.
+ * config/tc-i370.c (i370_elf_suffix): Likewise.
+ * config/tc-i960.c (struct tabentry): Likewise.
+ * config/tc-m32r.c: Likewise.
+ * config/tc-m68k.c: Likewise.
+ * config/tc-m68k.h: Likewise.
+ * config/tc-mcore.c (parse_psrmod): Likewise.
+ * config/tc-metag.c (struct metag_core_option): Likewise.
+ (struct metag_long_option): Likewise.
+ * config/tc-microblaze.c: Likewise.
+ * config/tc-mips.c (macro): Likewise.
+ * config/tc-mn10200.c: Likewise.
+ * config/tc-mn10300.c: Likewise.
+ * config/tc-msp430.c (struct rcodes_s): Likewise.
+ (struct hcodes_s): Likewise.
+ (md_parse_option): Likewise.
+ * config/tc-ns32k.c (struct ns32k_option): Likewise.
+ (optlist): Likewise.
+ * config/tc-ppc.c (ppc_elf_suffix): Likewise.
+ (tc_ppc_regname_to_dw2regnum): Likewise.
+ * config/tc-ppc.h: Likewise.
+ * config/tc-rl78.c: Likewise.
+ * config/tc-rx.c (struct cpu_type): Likewise.
+ * config/tc-sh.c (sh_regname_to_dw2regnum): Likewise.
+ * config/tc-sparc.c (struct priv_reg_entry): Likewise.
+ (sparc_ip): Likewise.
+ * config/tc-spu.c (insn_fmt_string): Likewise.
+ * config/tc-tic54x.c (tic54x_set_default_include): Likewise.
+ * config/tc-v850.c: Likewise.
+ * config/tc-visium.c (struct visium_arch_option_table): Likewise.
+ (struct visium_long_option_table): Likewise.
+ * config/tc-xgate.c: Likewise.
+ * config/tc-z8k.c: Likewise.
+ * read.c (add_include_dir): Likewise.
+ * read.h: Likewise.
+
+2016-02-25 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/all/gas.exp: Change target pattern to cover
+ arceb-*.
+ * testsuite/gas/all/redef3.d: Likewise.
+ * testsuite/gas/elf/elf.exp: Likewise.
+
+2016-02-24 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-arm.c (BAD_FP16): New error message macro.
+ (do_scalar_fp16_v82_encode): Change the coproc field to 9 for armv8.2
+ fp16 scalar instructions.
+ (neon_check_type): Allow different size from key.
+ (do_vfp_nsyn_add_sub): Add support SE_H shape support.
+ (try_vfp_nsyn): Likewise.
+ (do_vfp_nsyn_mla_mls): Likewise.
+ (do_vfp_nsyn_fma_fms): Likewise.
+ (do_vfp_nsyn_ldm_stm): Likewise
+ (do_vfp_nsyn_sqrt): Likewise
+ (do_vfp_nsyn_div): Likewise
+ (do_vfp_nsyn_nmul): Likewise.
+ (do_vfp_nsyn_cmp): Likewise.
+ (do_neon_shll): Likewise.
+ (do_vfp_nsyn_cvt_fpv8): Likewise.
+ (do_neon_cvttb_2): Likewise.
+ (do_neon_mov): Likewise.
+ (do_neon_rshift_round_imm): Likewise.
+ (do_neon_ldr_str): Likewise.
+ (do_vfp_nsyn_fpv8): Likewise.
+ (do_vmaxnm): Likewise.
+ (do_vrint_1): Likewise.
+ (insns): New entry for vins, vmovx.
+ (md_apply_fix): Left shift 1 bit for fp16 vldr/vstr.
+ * testsuite/gas/arm/armv8-2-fp16-scalar-thumb.d: New.
+ * testsuite/gas/arm/armv8-2-fp16-scalar.d: New.
+ * testsuite/gas/arm/armv8-2-fp16-scalar.s: New.
+ * testsuite/gas/arm/armv8-2-fp16-scalar-bad.s: New
+ * testsuite/gas/arm/armv8-2-fp16-scalar-bad.d: New
+ * testsuite/gas/arm/armv8-2-fp16-scalar-bad.l: New
+
+2016-02-24 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-arm.c (NEON_ENC_TAB): Add fp16 instruction shape.
+ (neon_shape_class): New SC_HALF.
+ (neon_shape_el): New SE_H.
+ (neon_shape_el_size): New size for SE_H.
+ (N_F_ALL): New macro to aggregate N_F16, N_F32, N_64.
+ (neon_select_shape): Add SE_H support code.
+ (el_type_of_type_chk): Use N_F_ALL.
+ (do_vfp_nsyn_cvt): Add SE_H shape support.
+ (do_neon_cvtz): Likewise.
+ (do_neon_cvt_1): Likewise.
+ (do_neon_cvttb_1): Likewise.
+
+2016-02-24 Renlin Li <renlin.li@arm.com>
+
+ * testsuite/gas/arm/copro.d: Adjust output.
+ * testsuite/gas/arm/copro.s: Adjust co-processor num.
+
+2016-02-24 Renlin Li <renlin.li@arm.com>
+
+ * testsuite/gas/arm/mask_1.d: New.
+ * testsuite/gas/arm/mask_1.s: New.
+
+2016-02-24 Renlin Li <renlin.li@arm.com>
+
+ * testsuite/gas/arm/copro.s: Use coprocessor other than 10, 11.
+ * testsuite/gas/arm/copro.d: Update.
+
+2016-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add entry for cortex-a32.
+ * doc/c-arm.texi (ARM Options): Document cortex-a32.
+
+2016-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * doc/c-arm.texi (ARM Options): Document cortex-a17.
+
+2016-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/elf/elf.exp: Skip tests for common directive on
+ hpux.
+
+2016-02-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * output-file.c (output_file_create): Make file name argument const.
+ (output_file_close): Likewise.
+ * output-file.h (output_file_create): Adjust.
+ (output_file_close): Likewise.
+ * depend.c (quote_string_for_make): Make src argument const char *.
+ (register_dependency): Likewise.
+ (wrap_output): Likewise.
+ * as.h (register_dependency): Adjust.
+ * config/tc-xtensa.c (finish_vinsn): Remove unnecessary calls to
+ as_where ();
+ * symbols.c (S_SET_EXTERNAL): Likewise.
+ * input-scrub.c (as_where): Return the file name.
+ * as.h (as_where): Adjust prototype.
+ * app.c (do_scrub_chars): Adjust.
+ * cond.c (s_elseif): Likewise.
+ (s_else): Likewise.
+ (initialize_cframe): Likewise.
+ * config/obj-coff.c (obj_coff_init_stab_section): Likewise.
+ * config/obj-elf.c (obj_elf_init_stab_section): Likewise.
+ * config/obj-som.c (obj_som_init_stab_section): Likewise.
+ * config/tc-aarch64.c (output_info): Likewise.
+ * config/tc-ia64.c (md_assemble): Likewise.
+ (dot_alias): Likewise.
+ * config/tc-m68k.c (m68k_frob_label): Likewise.
+ * config/tc-mmix.c (s_bspec): Likewise.
+ (mmix_handle_mmixal): Likewise.
+ * config/tc-rx.c (rx_include): Likewise.
+ * config/tc-tic54x.c (tic54x_set_default_include): Likewise.
+ (tic54x_adjust_symtab): Likewise.
+ * config/tc-xtensa.c (directive_push): Likewise.
+ (xtensa_sanity_check): Likewise.
+ (xtensa_relax_frag): Likewise.
+ (md_convert_frag): Likewise.
+ (tinsn_to_slotbuf): Likewise.
+ * dwarf2dbg.c (dwarf2_where): Likewise.
+ * ecoff.c (add_file): Likewise.
+ (ecoff_generate_asm_lineno): Likewise.
+ * expr.c (make_expr_symbol): Likewise.
+ * frags.c (frag_new): Likewise.
+ (frag_var_init): Likewise.
+ * listing.c (listing_newline): Likewise.
+ * messages.c (identify): Likewise.
+ (as_show_where): Likewise.
+ (as_warn_internal): Likewise.
+ (as_bad_internal): Likewise.
+ * read.c (s_irp): Likewise.
+ (s_macro): Likewise.
+ (s_reloc): Likewise.
+ * stabs.c (stabs_generate_asm_file): Likewise.
+ (stabs_generate_asm_lineno): Likewise.
+ (stabs_generate_asm_func): Likewise.
+ * write.c (fix_new_internal): Likewise.
+ * as.h (PRINTF_WHERE_LIKE): Make file name argument const.
+ (as_warn_value_out_of_range): Adjust prototype.
+ (as_bad_value_out_of_range): Adjust prototype.
+ * messages.c (identify): Make file name argument const char *.
+ (as_warn_internal): Likewise.
+ (as_warn_where): Likewise.
+ (as_bad_internal): Likewise.
+ (as_bad_where): Likewise.
+ (as_internal_value_out_of_range): Likewise.
+ (as_warn_value_out_of_range): Likewise.
+ (as_bad_value_out_of_range): Likewise.
+ * as.h (found_comment_file): Change type to const char *.
+ * cond.c (file_line::file): Likewise.
+ * config/obj-coff.c (obj_coff_init_stab_section): Make variable const.
+ * config/obj-elf.c (obj_elf_init_stab_section): Likewise.
+ * config/obj-som.c (obj_som_init_stab_section): Likewise.
+ * config/tc-aarch64.c (output_info): Likewise.
+ * config/tc-alpha.c (insert_operand): Likewise.
+ * config/tc-arc.c (insert_operand): Likewise.
+ * config/tc-d30v.c (check_size): Likewise.
+ * config/tc-ia64.c (struct alias): Likewise.
+ * config/tc-m68k.c (struct label_line): Likewise.
+ * config/tc-mcore.c (md_apply_fix): Likewise.
+ * config/tc-microblaze.c (md_estimate_size_before_relax): Likewise.
+ * config/tc-mips.c (mips16_immed): Likewise.
+ * config/tc-mmix.c (mmix_handle_mmixal): Likewise.
+ * config/tc-ppc.c (ppc_insert_operand): Likewise.
+ * config/tc-rx.c (rx_include): Likewise.
+ * config/tc-s390.c (s390_insert_operand): Likewise.
+ * config/tc-tic54x.c (tic54x_set_default_include): Likewise.
+ (tic54x_adjust_symtab): Likewise.
+ * config/tc-tilegx.c (insert_operand): Likewise.
+ (apply_special_operator): Likewise.
+ * config/tc-tilepro.c (insert_operand): Likewise.
+ * config/tc-xtensa.c (directive_push): Likewise.
+ * ecoff.c (add_file): Likewise.
+ (ecoff_generate_asm_lineno): Likewise.
+ * listing.c (listing_newline): Likewise.
+ * read.c (s_irp): Likewise.
+ * write.c (install_reloc): Likewise.
+ * write.h (struct fix): Likewise.
+ * input-file.c (file_name): Change type to const char *.
+ (saved_file::file_name): Likewise.
+ (input_file_open): Change type of argument to const char *.
+ * input-file.h (input_file_open): Adjust.
+ * input-scrub.c (logical_input_file): change type to const char *.
+ (physical_input_file): Likewise.
+ (struct input_save): Adjust.
+ (input_scrub_push): Adjust.
+ (input_scrub_begin): Adjust.
+ (as_where): Adjust.
+ * input-scrub.c (input_scrub_new_file): Make file name argument const.
+ (input_scrub_include_file): Likewise.
+ (new_logical_line_flags): Likewise.
+ (new_logical_line): Likewise.
+ * as.h: Adjust.
+ * frags.h (struct frag): Change type of fr_file to const char *.
+ * expr.c (expr_symbol_where): Change type of file argument to
+ const char **.
+ * expr.h (expr_symbol_where): Likewise.
+ * config/tc-i370.c (md_apply_fix): adjust.
+ * config/tc-mmix.c (mmix_md_end): Likewise.
+ * config/tc-ppc.c (md_apply_fix): Likewise.
+ * config/tc-s390.c (md_apply_fix): Likewise.
+ * symbols.c (report_op_error): Likewise.
+ (resolve_symbol_value): Likewise.
+ * config/tc-ia64.c (slot::src_file): Change type to const char *.
+ (rsrc::file): Likewise.
+ * config/tc-xtensa.c (xtensa_sanity_check): Change type of variable to
+ const char *.
+ (xtensa_relax_frag): Likewise.
+ (md_convert_frag): Likewise.
+ (tinsn_to_slotbuf): Likewise.
+ * expr.c (expr_symbol_line): Likewise.
+ * macro.c (define_macro): Likewise.
+ * macro.h (macro_struct): Likewise.
+ * messages.c (as_show_where): Likewise.
+ * read.c (s_macro): Likewise.
+ * stabs.c (stabs_generate_asm_file): Likewise.
+ (generate_asm_file): Likewise.
+ (stabs_generate_asm_lineno): Likewise.
+ * write.h (struct reloc_list): Likewise.
+ * input-scrub.c (as_where): Change return type to const char *.
+ * as.h (as_wheree): Adjust.
+
+2016-02-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * write.c (compress_debug): Move BFD compression bits setting
+ to ...
+ (write_object_file): Here.
+
+2016-02-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (register_number): Check RegVRex.
+ * testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd
+ with %zmm19 and %zmm3.
+ * testsuite/gas/i386/x86-64-avx512f-intel.d: Updated.
+ * testsuite/gas/i386/x86-64-avx512f.d: Likewise.
+
+2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
+ Jiong Wang <jiong.wang@arm.com>
+
+ * config/tc-arm.c (arm_ext_fp16): New.
+ (arm_extensions): New entry for "fp16".
+
+2016-02-19 Nick Clifton <nickc@redhat.com>
+
+ PR 19630
+ * read.c (read_a_source_file): Check for assemble_one returning
+ with input_line_pointer set to NULL.
+
+2016-02-19 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
+
+ * listing.c (rebuffer_line): Change return type to void.
+
+ * symbols.c (decode_local_label_name): Make type a const char *.
+ * listing.c (print_source): Make type of p const char *.
+ (print_line): Make type of string const char *.
+ (buffer_line): Return const char *.
+ (title): Make type const char *.
+ (subtitle): Likewise.
+ (listing_listing): Make type of p const char *.
+ * messages.c (as_internal_value_out_of_range): Make type of prefix
+ const char *.
+ * stabs.c (s_stab_generic): make type of stab_secname, stabstr_secname
+ and string const char *.
+ * read.c (_bfd_rel): Make type of name const char *.
+ * app.c (out_string): Change type to const char *.
+ (struct app_save::out_string): Likewise.
+
+2016-02-18 Dan Gisselquist <dgisselq@verizon.net>
+ Nick Clifton <nickc@redhat.com>
+
+ * read.c (finish_bundle): Avoid recording a negative alignment.
+ (do_align): Use unsigned values for n, len and max. Only create
+ a frag if the alignment requirement is greater than the minimum
+ byte alignment. Avoid recording a negative alignment.
+ (s_align): Use unsigned values where appropriate.
+ (bss_alloc): Use an unsigned value for the alignment.
+ (sizeof_sleb128): Add a comment noting that we encode one octet
+ per byte, regardless of the value of OCTETS_PER_BYTE_POWER.
+ (emit_leb129_expr): Abort if the emitted encoding was longer than
+ expected.
+ * read.h (output_leb128): Update prototype.
+ (sizeof_leb128): Update prototype.
+ (bss_alloc): Update prototype.
+ * write.c (record_alignment): Use an unsigned value for the
+ alignment. Do not record alignments less than the minimum
+ alignment for a byte.
+ * write.h (record_alignment): Update prototype.
+
+2016-02-17 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (xtensa_move_literals): Fix check for
+ .init.literal/.fini.literal section name.
+ * testsuite/gas/xtensa/all.exp: Add init-fini-literals to the
+ list of xtensa tests.
+ * testsuite/gas/xtensa/init-fini-literals.d: New file:
+ init-fini-literals test result patterns.
+ * testsuite/gas/xtensa/init-fini-literals.s: New file:
+ init-fini-literals test.
+
+2016-02-17 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c (msp430_mcu_data): Sync with data from TI's
+ devices.csv file as of March 2016.
+
+2016-02-16 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (tc_arc_frame_initial_instructions): New
+ function.
+ (tc_arc_regname_to_dw2regnum): Likewise.
+ * config/tc-arc.h (TARGET_USE_CFIPOP): Define
+ (tc_cfi_frame_initial_instructions): Likewise.
+ (tc_regname_to_dw2regnum): Likewise.
+ * testsuite/gas/cfi/cfi-arc-1.d: New file.
+ * testsuite/gas/cfi/cfi-arc-1.s: Likewise.
+ * testsuite/gas/cfi/cfi.exp: Allow running tests for arc.
+
+2016-02-16 Trevor Saunders <tbsaunde@tbsaunde.org>
+
+ * doc/internals.texi (S_IS_EXTERN): Remove.
+
+2016-02-16 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo (Section): Fix up texinfo snafus in previous
+ update.
+
+2016-02-16 Renlin Li <renlin.li@arm.com>
+
+ PR gas/19620
+ * config/tc-aarch64.c (parse_half): Remove restrictions on symbol name.
+ * testsuite/gas/aarch64/movw_label.d: New.
+ * testsuite/gas/aarch64/movw_label.s: New.
+
+2016-02-15 Vinay Kumar G. <Vinay.G@kpit.com>
+
+ PR gas/19556
+ * config/rx-parse.y (MOV): Opcode generation for index
+ register addressing mode.
+ * testsuite/gas/rx/rx.exp: Updated for new testcase.
+ * testsuite/gas/rx/pr19665.s: New file.
+ * testsuite/gas/rx/pr19665.s: New file.
+ * testsuite/gas/rx/mov.d: Update expected output.
+
+2016-02-15 Nick Clifton <nickc@redhat.com>
+
+ * doc/as.texinfo (.section): Document that numeric values can now
+ be used for the flags and type fields of the ELF target's .section
+ directive. Add notes about the restrictions on setting flags and
+ types.
+ * config/obj-elf.c (obj_elf_change_section): Allow known sections
+ to be given processor specific section types. Allow processor and
+ application specific flags of a section to be set after
+ definition.
+ (obj_elf_parse_section_letters): Handle parsing numeric values.
+ (obj_elf_section_type): Handle parsing numeric values.
+ (obj_elf_section): Allow numeric type values.
+ * config/obj-elf.h (obj_elf_change_section): Update prototype.
+ * testsuite/gas/elf/section10.d: New test.
+ * testsuite/gas/elf/section10.s: Source file for new test.
+ * testsuite/gas/elf/elf.exp: Run the new test.
+ * testsuite/gas/i386/ilp32/x86-64-unwind.d: Remove dependency upon
+ the description of the flags produced by readelf.
+ * testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
+ * NEWS: Mention the new feature.
+
+2016-02-11 Nick Clifton <nickc@redhat.com>
+
+ PR gas/19614
+ * dw2gencfi.c (cfi_sections_set): Delay setting this variable
+ until it is actually used.
+ (cfi_set_sections): Set cfi_sections_set to true.
+ (dot_cfi_startproc): Likewise.
+ (dot_cfi_endproc): Likewise.
+ (dot_cfi_fde_data): Likewise.
+ (cfi_finish): Likewise.
+ (dot_cfi_sections): Do not set cfi_sections_set.
+ * doc/as.texinfo (.cfi_sections): Note that targets can provide
+ their own cfi section name. Also note that the directive can be
+ reissued provided that CFI generation has not started.
+ * testsuite/gas/mips/compact-eh-err2.s: Add .cfi_startproc and
+ .cfi_endproc directives so that the redefinition of .cfi_sections
+ will trigger the generation of the error message.
+ * testsuite/gas/mips/compact-eh-err2.l: Update expected line
+ number of error message.
+
+2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
+ Janek van Oirschot <jvanoirs@synopsys.com>
+
+ * config/tc-arc.h (TC_FRAG_TYPE, TC_PCREL_ADJUST, MAX_INSN_ARGS)
+ (MAX_INSN_FLGS, MAX_FLAG_NAME_LENGHT, TC_GENERIC_RELAX_TABLE):
+ Define.
+ (arc_flags, arc_relax_type): New structure.
+ * config/tc-arc.c (FRAG_MAX_GROWTH, RELAX_TABLE_ENTRY)
+ (RELAX_TABLE_ENTRY_MAX): New define.
+ (relaxation_state, md_relax_table, arc_relaxable_insns)
+ (arc_num_relaxable_ins): New variable.
+ (rlx_operand_type, arc_rlx_types): New enums.
+ (arc_relaxable_ins): New structure.
+ (OPTION_RELAX): New option.
+ (arc_insn): New relax member.
+ (arc_flags): Remove.
+ (relax_insn_p): New function.
+ (apply_fixups): Likewise.
+ (relaxable_operand): Likewise.
+ (may_relax_expr): Likewise.
+ (relaxable_flag): Likewise.
+ (arc_pcrel_adjust): Likewise.
+ (md_estimate_size_before_relax): Implement.
+ (md_convert_frag): Likewise.
+ (md_parse_option): Handle new mrelax option.
+ (md_show_usage): Likewise.
+ (assemble_insn): Set relax member.
+ (emit_insn0): New function.
+ (emit_insn1): Likewise.
+ (emit_insn): Handle relaxation case.
+ * NEWS: Mention the new relaxation option.
+ * doc/c-arc.texi (ARC Options): Document new mrelax option.
+ * doc/as.texinfo (Target ARC Options): Likewise.
+ * testsuite/gas/arc/relax-avoid1.d: New file.
+ * testsuite/gas/arc/relax-avoid1.s: Likewise.
+ * testsuite/gas/arc/relax-avoid2.d: Likewise.
+ * testsuite/gas/arc/relax-avoid2.s: Likewise.
+ * testsuite/gas/arc/relax-avoid3.d: Likewise.
+ * testsuite/gas/arc/relax-avoid3.s: Likewise.
+ * testsuite/gas/arc/relax-b.d: Likewise.
+ * testsuite/gas/arc/relax-b.s: Likewise.
+
+2016-02-08 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-ia64.c (dot_prologue): Fix formatting.
+
+2016-02-04 Nick Clifton <nickc@redhat.com>
+
+ * config/obj-elf.c (obj_elf_change_section): Remove support for
+ ARM NOREAD sections.
+ * config/tc-arm.c (arm_elf_section_letter): Delete.
+ * config/tc-arm.h (md_elf_section_letter): Delete.
+ * doc/c-arm.texi (ARM Section Attribute): Delete section.
+ * testsuite/gas/arm/section-execute-only.d: Delete.
+ * testsuite/gas/arm/section-execute-only.s: Delete.
+
+2016-02-04 Nick Clifton <nickc@redhat.com>
+
+ PR target/19561
+ * config/tc-msp430.c (msp430_operands): Remove case 7. Use case 2
+ to handle encoding of RRUX instruction.
+ * testsuite/gas/msp430/msp430x.s: Add more tests of the extended
+ shift instructions.
+ * testsuite/gas/msp430/msp430x.d: Update expected disassembly.
+
+2016-02-03 Max Filippov <jcmvbkbc@gmail.com>
+
+ * config/tc-xtensa.c (md_apply_fix): Mark BFD_RELOC_XTENSA_DIFF*
+ substitutions for BFD_RELOC_* as unsigned.
+ * testsuite/gas/xtensa/all.exp: Add loc to list of xtensa tests.
+ * testsuite/gas/xtensa/loc.d: New file: loc test result patterns.
+ * testsuite/gas/xtensa/loc.s: New file: loc test.
+
+2016-02-03 Kevin Buettner <kevinb@redhat.com>
+
+ * config/tc-msp430.h (DWARF2_ADDR_SIZE): Set to 4.
+
+2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19520
+ * NEWS: Mention new command line option -mrelax-relocations and
+ new configure option --enable-x86-relax-relocations for x86
+ target.
+ * config.in: Regenerated.
+ * configure.ac: Add --enable-x86-relax-relocations.
+ (ac_default_x86_relax_relocations): New. Default to 1 except
+ for x86 Solaris targets older than Solaris 12.
+ (DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define.
+ * configure: Likewise.
+ * config/tc-i386.c (generate_relax_relocations): New.
+ (OPTION_MRELAX_RELOCATIONS): Likewise.
+ (output_disp): Don't generate relax relocations if
+ generate_relax_relocations is 0.
+ (md_longopts): Add -mrelax-relocations.
+ (md_show_usage): Likewise.
+ (md_parse_option): Handle OPTION_MRELAX_RELOCATIONS.
+ * doc/c-i386.texi: Document -mrelax-relocations=.
+ * testsuite/gas/i386/got-no-relax.d: New file.
+ * testsuite/gas/i386/x86-64-gotpcrel-no-relax.d: Likewise.
+ * testsuite/gas/i386/got.d: Pass -mrelax-relocations=yes to as.
+ * testsuite/gas/i386/localpic.d: Likewise.
+ * testsuite/gas/i386/mixed-mode-reloc32.d: Likewise.
+ * testsuite/gas/i386/reloc32.d: Likewise.
+ * testsuite/gas/i386/x86-64-gotpcrel.d: Likewise.
+ * testsuite/gas/i386/x86-64-localpic.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
+ * testsuite/gas/i386/i386.exp: Run got-no-relax and
+ x86-64-gotpcrel-no-relax.
+
+2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Mention new command line option -mfence-as-lock-add=yes
+ for x86 target.
+
+2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Remove duplicated marker for 2.26.
+
+2016-02-02 Renlin Li <renlin.li@arm.com>
+
+ * testsuite/gas/arm/thumb2_it_search.d: Skip non-elf targets.
+
+2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/ip2k/allinsn.d: New file.
+ * testsuite/gas/ip2k/allinsn.s: New file.
+ * testsuite/gas/ip2k/ip2k-allinsn.exp: New file.
+
+2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/epiphany/addr-syntax.d: Add explicit 0 offset to
+ some load instructions.
+ * testsuite/gas/epiphany/allinsn.d: Likewise.
+ * testsuite/gas/epiphany/regression.d: Likewise.
+
+2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/epiphany/addr-syntax.d: Remove unneeded '.l'
+ suffixes from instruction mnemonics in expected output.
+ * testsuite/gas/epiphany/allinsn.d: Likewise.
+ * testsuite/gas/epiphany/regression.d: Likewise.
+ * testsuite/gas/epiphany/sample.d: Likewise.
+
+2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/epiphany/addr-syntax.d: Update expected register
+ names.
+ * testsuite/gas/epiphany/allinsn.d: Likewise.
+ * testsuite/gas/epiphany/sample.d: Likewise.
+
+2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * testsuite/gas/epiphany/sample.d: Update expected output.
+
+2016-01-26 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (md_apply_fix): Allow addendum.
+ (arc_reloc_op): Allow complex expressions for tpoff.
+ (md_apply_fix): Handle resolved TLS local symbol.
+ * testsuite/gas/arc/tls-relocs1.d: New file.
+ * testsuite/gas/arc/tls-relocs1.s: Likewise.
+
+2016-02-01 Loria <Loria@phantasia.org>
+
+ PR target/19311
+ * config/tc-arm.c (encode_arm_immediate): Recode to improve
+ efficiency and avoid an LLVM loop optimization bug.
+
+2016-02-01 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-microblaze.c (parse_imm): Fix compile time warning
+ message extending a negative 32-bit value into a larger signed
+ value on a 32-bit host.
+
+2016-01-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19532
+ * configure.ac (compressed_debug_sections): Replace == with =.
+ * configure: Regenerated.
+
+2016-01-29 Andrew Senkevich <andrew.senkevich@intel.com>
+ H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (avoid_fence): New.
+ (output_insn): Encode as lock addl $0x0, (%{r,e}sp) if avoid_fence
+ is true.
+ (OPTION_FENCE_AS_LOCK_ADD): New.
+ (md_longopts): Add -mfence-as-lock-add.
+ (md_parse_option): Handle -mfence-as-lock-add.
+ (md_show_usage): Add -mfence-as-lock-add=[no|yes].
+ * doc/c-i386.texi (-mfence-as-lock-add): Document.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+ * testsuite/gas/i386/fence-as-lock-add.s: New.
+ * testsuite/gas/i386/fence-as-lock-add-yes.d: Likewise.
+ * testsuite/gas/i386/fence-as-lock-add-no.d: Likewise.
+ * testsuite/gas/i386/x86-64-fence-as-lock-add-yes.d: Likewise.
+ * testsuite/gas/i386/x86-64-fence-as-lock-add-no.d: Likewise.
+
+2016-01-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure.ac (compressed_debug_sections): Remove trailing `]'.
+ * configure: Regenerated.
+
+2016-01-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (OPTION_OMIT_LOCK_PREFIX): Renamed to ...
+ (OPTION_MOMIT_LOCK_PREFIX): This.
+ (md_longopts): Updated.
+ (md_parse_option): Likewise.
+
+2016-01-25 Catherine Moore <clm@codesourcery.com>
+
+ * config/mips/tc-mips.c (md_begin): Avoid gp-relative addressing
+ if abicalls are in effect.
+ * testsuite/gas/mips/sdata-gp.s: New test.
+ * testsuite/gas/mips/sdata-gp.d: New expected output
+ * testsuite/gas/mips/mips.exp: Run new test.
+
+2016-01-25 Renlin Li <renlin.li@arm.com>
+
+ * testsuite/gas/arm/thumb2_it_search.d: New.
+ * testsuite/gas/arm/thumb2_it_search.s: New.
+
+2016-01-21 Nick Clifton <nickc@redhat.com>
+
+ PR gas/19454
+ * testsuite/gas/arm/mapshort-elf.d: Fix expected output to cope
+ with arm-netbsdelf target.
+ * testsuite/gas/arm/blx-bl-convert.d: Skip for netbsdelf.
+
+2016-01-20 Nick Clifton <nickc@redhat.com>
+
+ PR 19456
+ * testsuite/gas/arm/weakdef-1.d: Skip for VxWorks.
+ * testsuite/gas/arm/blx-bl-convert.d
+ * testsuite/gas/arm/plt-1.d: Likewise.
+ * testsuite/gas/arm/reloc-bad.d: Likewise.
+ * testsuite/gas/arm/thumb-w-good.d: Likewise.
+ * testsuite/gas/arm/thumb2_pool.d: Likewise.
+ * testsuite/gas/arm/ldconst.d: Adjust so that it works with VxWorks
+ * testsuite/gas/arm/tls_vxworks.d: Update expected output.
+
+ PR 19499
+ * doc/as.texinfo (Errors): Correct documentation describing the
+ interaction of .file and .line with warning and error messages.
+
+ PR 19458
+ * testsuite/gas/arm/armv8_2-a.d: Skip for COFF based targets.
+ * testsuite/gas/arm/archv8m-main.d: Likewise.
+ * testsuite/gas/arm/archv8m-base.d: Likewise.
+
+2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
+
+ * testsuite/gas/aarch64/armv8_2-a-illegal.d: New.
+ * testsuite/gas/aarch64/armv8_2-a-illegal.l: New.
+ * testsuite/gas/aarch64/armv8_2-a-illegal.s: New.
+
+2016-01-20 Mickael Guene <mickael.guene@st.com>
+ Terry Guo <terry.guo@arm.com>
+
+ * config/obj-elf.c (obj_elf_change_section) : Allow arm section with
+ SHF_ARM_NOREAD section flag.
+ * config/tc-arm.h (md_elf_section_letter) : Implement this hook to
+ handle letter 'y'.
+ (arm_elf_section_letter) : Declare it.
+ * config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
+ SHF_ARM_NOREAD section flag.
+ * doc/c-arm.texi (ARM section attribute): Document the 'y' attribute.
+
+ * testsuite/gas/arm/section-execute-only.s: New test case.
+ * testsuite/gas/arm/section-execute-only.d: Expected output.
+
+2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (micromips_insn_length): Remove the mention
+ of 48-bit microMIPS instructions.
+
+2016-01-18 Alan Modra <amodra@gmail.com>
+
+ * configure: Regenerate.
+
+2016-01-17 Alan Modra <amodra@gmail.com>
+
+ * configure: Regenerate.
+
+2016-01-17 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test.
+
+2016-01-14 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/rl78/sp-relative-movw.s: New test.
+ * testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
+ * testsuite/gas/rl78/rl78.exp: Run the new test.
+
+2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
+
+ * testsuite/gas/aarch64/illegal-sysreg-2.l: New.
+ * testsuite/gas/aarch64/illegal-sysreg-2.d: New.
+
+2016-01-13 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-nios2.c (output_movia): Preset `code' to 0.
+
2016-01-13 Yoshinori Sato <ysato@users.sourceforge.jp>
* config/tc-h8300.c (get_operand): Remove spurious condition in
projects / deliverable / binutils-gdb.git / blobdiff