Arc assembler: Convert nps400 from a machine type to an extension.
[deliverable/binutils-gdb.git] / gas / ChangeLog
index 64b62af1d842e1e42113d6b11eedced5ae0f5469..4672d15229e35cf30965ede98d0cacad6b9d6cb1 100644 (file)
@@ -1,3 +1,111 @@
+2016-06-21  Graham Markall  <graham.markall@embecosm.com>
+
+       * config/tc-arc.c (check_cpu_feature, md_parse_option):
+       Add nps400 option and feature. Add check for nps400
+       feature. Refactor existing checks to check subclass before
+       feature enablement.
+       (md_show_usage): Document flags for NPS-400 and add some other
+       undocumented flags.
+       (cpu_type): Remove nps400 CPU type entry
+       (check_zol): Remove bfd_mach_arc_nps400 case.
+       (md_show_usage): Add help on -mcpu=nps400.
+       (cpu_types): Add entry for nps400 as arc700 plus nps400 extension
+       set.
+       * doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and
+       -fpuda flags.  Document -mcpu=nps400.
+       * testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change
+       expected flags to match ARC700 instead of NPS400.
+       * testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400.
+       * testsuite/gas/arc/nps-400-2.d: Likewise.
+       * testsuite/gas/arc/nps-400-3.d: Likewise.
+       * testsuite/gas/arc/nps-400-4.d: Likewise.
+       * testsuite/gas/arc/nps-400-5.d: Likewise.
+       * testsuite/gas/arc/nps-400-6.d: Likewise.
+       * testsuite/gas/arc/nps-400-7.d: Likewise.
+       * testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to
+       avoid clash with cbba instruction.
+       * testsuite/gas/arc/textinsn2op01.d: Likewise.
+       * testsuite/gas/arc/textinsn3op.d: Likewise.
+       * testsuite/gas/arc/textinsn3op.s: Likewise.
+       * testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using
+       -mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags.
+
+2016-06-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * testsuite/gas/mips/r6-64-n32.d: Change the `name' tag.
+       * testsuite/gas/mips/r6-64-n64.d: Likewise.
+
+2016-06-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * config/tc-mips.c (mips_fix_adjustable): Update comment on jump
+       reloc conversion.
+
+2016-06-20  Virendra Pathak  <virendra.pathak@broadcom.com>
+
+       * config/tc-aarch64.c (aarch64_cpus): Update vulcan feature set.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * config/tc-sparc.c (hpriv_reg_table): Add registers %hmcdper,
+       %hmcddfr and %hva_mask_nz.
+       (sparc_ip): New handling of asr/privileged/hyperprivileged
+       registers, adapted to the new form of the sparc opcodes table.
+       * testsuite/gas/sparc/rdasr.s: New file.
+       * testsuite/gas/sparc/rdasr.d: Likewise.
+       * testsuite/gas/sparc/wrasr.s: Likewise.
+       * testsuite/gas/sparc/wrasr.d: Likewise.
+       * testsuite/gas/sparc/sparc.exp (sparc_elf_setup): Add rdasr and
+       wrasr tests.
+       * testsuite/gas/sparc/rdpr.d: Use -Av9m, as some privileged
+       registers require it.
+       * testsuite/gas/sparc/wrpr.s: Complete to cover all privileged
+       registers and write instruction modalities.
+       * testsuite/gas/sparc/wrpr.d: Likewise.
+       * testsuite/gas/sparc/rdhpr.s: Likewise for hyperprivileged
+       registers.
+       * testsuite/gas/sparc/rdhpr.d: Likewise.
+       * testsuite/gas/sparc/wrhpr.s: Likewise.
+       * testsuite/gas/sparc/wrhpr.d: Likewise.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * config/tc-sparc.c (sparc_arch_table): adjust the GAS
+       architectures to use the right opcode architecture.
+       (sparc_md_end): Handle v9{c,d,e,v,m}.
+       (sparc_ip): Fix some comments.
+       * testsuite/gas/sparc/ldx_efsr.d: Fix the architecture of this
+       instruction, which is v9d.
+       * testsuite/gas/sparc/mwait.s: Remove the `rd %mwait,%g1'
+       instruction from the test, as %mwait is not readable.
+       * testsuite/gas/sparc/mwait.d: Likewise.
+       * testsuite/gas/sparc/mism-1.s: Expand to check v9b and v9e
+       mismatch architecture errors.
+       * testsuite/gas/sparc/mism-2.s: New file.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * config/tc-sparc.c (priv_reg_table): Use NULL instead of the
+       empty string to mark the end of the array.
+       (hpriv_reg_table): Likewise.
+       (v9a_asr_table): Likewise.
+       (cmp_reg_entry): Handle entries with NULL names.
+       (F_POP_V9): Define.
+       (F_POP_PCREL): Likewise.
+       (F_POP_TLS_CALL): Likewise.
+       (F_POP_POSTFIX): Likewise.
+       (struct pop_entry): New type.
+       (pop_table): New variable.
+       (enum pop_entry_type): New type.
+       (struct perc_entry): Likewise.
+       (NUM_PERC_ENTRIES): Define.
+       (perc_table): New variable.
+       (cmp_perc_entry): New function.
+       (md_begin): Sort hpriv_reg_table and v9a_asr_table, and initialize
+       perc_table.
+       (sparc_ip): Handle entries with NULL names in priv_reg_table,
+       hpriv_reg_table and v9a_asr_table.  Use perc_table to handle
+       %-pseudo-ops.
+
 2016-06-15  Nick Clifton  <nickc@redhat.com>
 
        * config/tc-ft32.c (md_assemble): Call dwarf2_emit_insn with the
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