+2019-09-19 Matthew Malcomson <matthew.malcomson@arm.com>
+
+ * NEWS: Add SVE2 and TME entries.
+
+2019-09-18 Alan Modra <amodra@gmail.com>
+
+ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
+ * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
+ * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
+ * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
+ * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
+ * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
+ * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
+ * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
+ * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
+ * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
+ * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
+ * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
+ * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
+ * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
+ * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
+ * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
+ * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
+ * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
+ * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
+ * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
+ * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
+ * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
+ * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
+ bfd section macro and function changes.
+ * write.c (compress_debug): Use bfd_rename_section.
+
+2019-09-18 Alan Modra <amodra@gmail.com>
+
+ * symbols.c (S_IS_LOCAL): Update bfd_get_section to
+ bfd_asymbol_section.
+
+2019-09-18 Simon Marchi <simon.marchi@polymtl.ca>
+
+ * Makefile.in: Re-generate.
+ * configure: Re-generate.
+ * doc/Makefile.in: Re-generate.
+
+2019-09-17 Maxim Blinov <maxim.blinov@embecosm.com>
+
+ * config/tc-riscv.c (riscv_multi_subset_supports): Handle
+ insn_class enum rather than subset char string.
+ (riscv_ip): Update call to riscv_multi_subset_supports.
+
+2019-09-16 Phil Blundell <pb@pbcl.net>
+
+ * Makefile.in, configure, doc/Makefile.in: Regenerated.
+
+2019-09-10 Nick Clifton <nickc@redhat.com>
+
+ PR 24907
+ * testsuite/gas/arm/pr24907.s: New test.
+ * testsuite/gas/arm/pr24907.d: Expected disassembly.
+
+2019-09-09 Phil Blundell <pb@pbcl.net>
+
+ binutils 2.33 branch created.
+
+2019-09-05 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_elf_suffix): Display the relocation
+ operator on GOT reloc warnings/errors.
+
+2019-08-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ * config/tc-arm.c (parse_neon_mov): Add check to accept vector
+ register to both the arguments in VMOV instruction.
+ * testsuite/gas/arm/mve-vmov-1.d: Modify.
+ * testsuite/gas/arm/mve-vmov-1.s: Likewise.
+ * testsuite/gas/arm/mve-vorr.d: Likewise.
+
+2019-08-23 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2019-08-22 Dennis Zhang <dennis.zhang@arm.com>
+
+ * config/tc-arm.c: New entries for Cortex-M35P, Cortex-A77,
+ and Cortex-A76AE.
+ * doc/c-arm.texi: Document new processors.
+ * testsuite/gas/arm/cpu-cortex-a76ae.d: New test.
+ * testsuite/gas/arm/cpu-cortex-a77.d: New test.
+ * testsuite/gas/arm/cpu-cortex-m35p.d: New test.
+
+2019-08-22 Bosco García <jbgg.gnu@gmail.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * atof-generic.c (atof_generic): Do not ignore leading zeros if
+ they appear after a decimal point.
+ * testsuite/gas/all/float.s: Extend test to include a number with
+ a leading decimal point followed by several zeroes.
+ * testsuite/gas/i386/fp.s: Likewise.
+ * testsuite/gas/i386/fp.d: Update expected output.
+
+2019-08-22 Barnaby Wilks <barnaby.wilks@arm.com>
+
+ * config/tc-aarch64.c: Add float16 directive and add "Hh" to
+ acceptable float characters.
+ * doc/c-aarch64.texi: Documentation for float16 directive.
+ * testsuite/gas/aarch64/float16-be.d: New test.
+ * testsuite/gas/aarch64/float16-le.d: New test.
+ * testsuite/gas/aarch64/float16.s: New test.
+ * NEWS: Add NEWS entry.
+
+2019-08-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * testsuite/gas/aarch64/sysreg-4.d: Update expected disassembly for
+ tfsre0_el1, tfsr_el1, tfsr_el2, tfsr_el3, tfsr_el12 system registers.
+
+2019-08-20 Dennis Zhang <dennis.zhang@arm.com>
+
+ * NEWS: Mention the Arm and AArch64 new processors.
+ * config/tc-aarch64.c: New entries for Cortex-A34, Cortex-A65,
+ Cortex-A77, cortex-A65AE, and Cortex-A76AE.
+ * doc/c-aarch64.texi: Document new CPUs.
+ * testsuite/gas/aarch64/cpu-cortex-a34.d: New test.
+ * testsuite/gas/aarch64/cpu-cortex-a65.d: New test.
+ * testsuite/gas/aarch64/cpu-cortex-a65ae.d: New test.
+ * testsuite/gas/aarch64/cpu-cortex-a76ae.d: New test.
+ * testsuite/gas/aarch64/cpu-cortex-a77.d: New test.
+ * testsuite/gas/aarch64/nop-asm.s: New test.
+
+2019-08-19 Faraz Shahbazker <fshahbazker@wavecomp.com>
+
+ * config/tc-mips.c (fix_bad_misaligned_address): New function.
+ (fix_validate_branch): Call fix_bad_misaligned address_to
+ calculate the target address.
+ (md_apply_fix): Likewise.
+ (md_convert_frag): Update misaligned address calculation to
+ disregard ISA mode bit.
+
+2019-08-19 Faraz Shahbazker <fshahbazker@wavecomp.com>
+
+ * config/tc-mips.c (mips_move_labels): Retain ISA mode bit
+ when moving labels in text segments.
+ (mips_align): Indicate text mode when aligning labels in
+ text segments.
+ * gas/testsuite/gas/mips/insn-isa-mode.d: New test.
+ * gas/testsuite/gas/mips/insn-isa-mode.s: New test source.
+ * gas/testsuite/gas/mips/mips.exp: Run the new test.
+
+2019-08-19 Barnaby Wilks <Barnaby.Wilks@arm.com>
+
+ * config/tc-arm.c (md_atof): Add precision check. Formatting.
+
+2019-08-15 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2019-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ * config/tc-arm.c (enum operand_parse_code): Add the entry OP_I48_I64.
+ (po_imm1_or_imm2_or_fail): Marco to check the immediate is either of
+ 48 or 64.
+ (parse_operands): Add case OP_I48_I64.
+ (do_mve_scalar_shift1): Add function to encode the MVE shift
+ instructions with 4 arguments.
+ * testsuite/gas/arm/mve-shift-bad.l: Modify.
+ * testsuite/gas/arm/mve-shift-bad.s: Likewise.
+ * testsuite/gas/arm/mve-shift.d: Likewise.
+ * testsuite/gas/arm/mve-shift.s: Likewise.
+
2019-08-12 Barnaby Wilks <barnaby.wilks@arm.com>
* config/tc-arm.c (enum fp_16bit_format): Add enum to represent the 2 float16 encodings.
projects / deliverable / binutils-gdb.git / blobdiff