-@c Copyright (C) 1991-2018 Free Software Foundation, Inc.
+@c Copyright (C) 1991-2019 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@c man end
@code{bdver3},
@code{bdver4},
@code{znver1},
+@code{znver2},
@code{btver1},
@code{btver2},
@code{generic32} and
@code{no287},
@code{no387},
@code{no687},
+@code{cmov},
+@code{nocmov},
+@code{fxsr},
+@code{nofxsr},
@code{mmx},
@code{nommx},
@code{sse},
@code{clflushopt},
@code{se1},
@code{clwb},
+@code{movdiri},
+@code{movdir64b},
+@code{enqcmd},
@code{avx512f},
@code{avx512cd},
@code{avx512er},
@code{avx512_vbmi2},
@code{avx512_vnni},
@code{avx512_bitalg},
+@code{avx512_bf16},
@code{noavx512f},
@code{noavx512cd},
@code{noavx512er},
@code{noavx512_vbmi2},
@code{noavx512_vnni},
@code{noavx512_bitalg},
+@code{noavx512_vp2intersect},
+@code{noavx512_bf16},
+@code{noenqcmd},
@code{vmx},
@code{vmfunc},
@code{smx},
@option{-mavxscalar=@var{256}} will encode scalar AVX instructions
with 256bit vector length.
+WARNING: Don't use this for production code - due to CPU errata the
+resulting code may not work on certain models.
+
+@cindex @samp{-mvexwig=} option, i386
+@cindex @samp{-mvexwig=} option, x86-64
+@item -mvexwig=@var{0}
+@itemx -mvexwig=@var{1}
+These options control how the assembler should encode VEX.W-ignored (WIG)
+VEX instructions. @option{-mvexwig=@var{0}} will encode WIG VEX
+instructions with vex.w = 0, which is the default.
+@option{-mvexwig=@var{1}} will encode WIG EVEX instructions with
+vex.w = 1.
+
+WARNING: Don't use this for production code - due to CPU errata the
+resulting code may not work on certain models.
+
@cindex @samp{-mevexlig=} option, i386
@cindex @samp{-mevexlig=} option, x86-64
@item -mevexlig=@var{128}
relocations. The default can be controlled by a configure option
@option{--enable-x86-relax-relocations}.
+@cindex @samp{-mx86-used-note=} option, i386
+@cindex @samp{-mx86-used-note=} option, x86-64
+@item -mx86-used-note=@var{no}
+@itemx -mx86-used-note=@var{yes}
+These options control whether the assembler should generate
+GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_FEATURE_2_USED
+GNU property notes. The default can be controlled by the
+@option{--enable-x86-used-note} configure option.
+
@cindex @samp{-mevexrcig=} option, i386
@cindex @samp{-mevexrcig=} option, x86-64
@item -mevexrcig=@var{rne}
Optimize instruction encoding with smaller instruction size. @samp{-O}
and @samp{-O1} encode 64-bit register load instructions with 64-bit
immediate as 32-bit register load instructions with 31-bit or 32-bits
-immediates and encode 64-bit register clearing instructions with 32-bit
-register clearing instructions. @samp{-O2} includes @samp{-O1}
-optimization plus encodes 256-bit and 512-bit vector register clearing
-instructions with 128-bit vector register clearing instructions.
+immediates, encode 64-bit register clearing instructions with 32-bit
+register clearing instructions and encode 256-bit/512-bit VEX/EVEX
+vector register clearing instructions with 128-bit VEX vector register
+clearing instructions as well as encode 128-bit/256-bit EVEX vector
+register load/store instructions with VEX vector register load/store
+instructions. @samp{-O2} includes @samp{-O1} optimization plus
+encodes 256-bit/512-bit EVEX vector register clearing instructions with
+128-bit EVEX vector register clearing instructions.
@samp{-Os} includes @samp{-O2} optimization plus encodes 16-bit, 32-bit
and 64-bit register tests with immediate as 8-bit register test with
immediate. @samp{-O0} turns off this optimization.
logical line number directive (@pxref{Comments}) or a preprocessor
control command (@pxref{Preprocessing}).
-If the @option{--divide} command line option has not been specified
+If the @option{--divide} command-line option has not been specified
then the @samp{/} character appearing anywhere on a line also
introduces a line comment.
@item @samp{i486} @tab @samp{i586} @tab @samp{i686} @tab @samp{pentium}
@item @samp{pentiumpro} @tab @samp{pentiumii} @tab @samp{pentiumiii} @tab @samp{pentium4}
@item @samp{prescott} @tab @samp{nocona} @tab @samp{core} @tab @samp{core2}
-@item @samp{corei7} @tab @samp{l1om} @tab @samp{k1om} @samp{iamcu}
+@item @samp{corei7} @tab @samp{l1om} @tab @samp{k1om} @tab @samp{iamcu}
@item @samp{k6} @tab @samp{k6_2} @tab @samp{athlon} @tab @samp{k8}
@item @samp{amdfam10} @tab @samp{bdver1} @tab @samp{bdver2} @tab @samp{bdver3}
-@item @samp{bdver4} @tab @samp{znver1} @tab @samp{btver1} @tab @samp{btver2}
-@item @samp{generic32} @tab @samp{generic64}
-@item @samp{.mmx} @tab @samp{.sse} @tab @samp{.sse2} @tab @samp{.sse3}
+@item @samp{bdver4} @tab @samp{znver1} @tab @samp{znver2} @tab @samp{btver1}
+@item @samp{btver2} @tab @samp{generic32} @tab @samp{generic64}
+@item @samp{.cmov} @tab @samp{.fxsr} @tab @samp{.mmx}
+@item @samp{.sse} @tab @samp{.sse2} @tab @samp{.sse3}
@item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4}
@item @samp{.avx} @tab @samp{.vmx} @tab @samp{.smx} @tab @samp{.ept}
@item @samp{.clflush} @tab @samp{.movbe} @tab @samp{.xsave} @tab @samp{.xsaveopt}
@item @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq} @tab @samp{.avx512ifma}
@item @samp{.avx512vbmi} @tab @samp{.avx512_4fmaps} @tab @samp{.avx512_4vnniw}
@item @samp{.avx512_vpopcntdq} @tab @samp{.avx512_vbmi2} @tab @samp{.avx512_vnni}
-@item @samp{.avx512_bitalg}
+@item @samp{.avx512_bitalg} @tab @samp{.avx512_bf16} @tab @samp{.avx512_vp2intersect}
@item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt}
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
+@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
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