gdb: resume ongoing step after handling fork or vfork

[deliverable/binutils-gdb.git] / gdb / lm32-tdep.c

diff --git a/gdb/lm32-tdep.c b/gdb/lm32-tdep.c
index 088f0355bb84a32c45f9413c6e1c32e7778328ef..57c465e55de5aba33bf54df54e96166a3ec8b3e0 100644 (file)
--- a/gdb/lm32-tdep.c
+++ b/gdb/lm32-tdep.c
@@ -1,7 +1,7 @@
 /* Target-dependent code for Lattice Mico32 processor, for GDB.
    Contributed by Jon Beniston <jon@beniston.com>
 
-   Copyright (C) 2009-2019 Free Software Foundation, Inc.
+   Copyright (C) 2009-2022 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -28,9 +28,6 @@
 #include "remote.h"
 #include "gdbcore.h"
 #include "gdb/sim-lm32.h"
-#include "gdb/callback.h"
-#include "gdb/remote-sim.h"
-#include "sim-regno.h"
 #include "arch-utils.h"
 #include "regcache.h"
 #include "trad-frame.h"
@@ -58,7 +55,7 @@ struct lm32_frame_cache
   /* Size of frame.  */
   int size;
   /* Table indicating the location of each and every register.  */
-  struct trad_frame_saved_reg *saved_regs;
+  trad_frame_saved_reg *saved_regs;
 };
 
 /* Add the available register groups.  */
@@ -81,7 +78,7 @@ lm32_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
     return ((regnum >= SIM_LM32_R0_REGNUM) && (regnum <= SIM_LM32_RA_REGNUM))
       || (regnum == SIM_LM32_PC_REGNUM);
   else if (group == system_reggroup)
-    return ((regnum >= SIM_LM32_EA_REGNUM) && (regnum <= SIM_LM32_BA_REGNUM))
+    return ((regnum >= SIM_LM32_BA_REGNUM) && (regnum <= SIM_LM32_EA_REGNUM))
       || ((regnum >= SIM_LM32_EID_REGNUM) && (regnum <= SIM_LM32_IP_REGNUM));
   return default_register_reggroup_p (gdbarch, regnum, group);
 }
@@ -146,8 +143,7 @@ lm32_analyze_prologue (struct gdbarch *gdbarch,
          /* Any stack displaced store is likely part of the prologue.
             Record that the register is being saved, and the offset 
             into the stack.  */
-         info->saved_regs[LM32_REG1 (instruction)].addr =
-           LM32_IMM16 (instruction);
+         info->saved_regs[LM32_REG1 (instruction)].set_addr (LM32_IMM16 (instruction));
        }
       else if ((LM32_OPCODE (instruction) == OP_ADDI)
               && (LM32_REG1 (instruction) == SIM_LM32_SP_REGNUM))
@@ -188,7 +184,7 @@ lm32_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
 {
   CORE_ADDR func_addr, limit_pc;
   struct lm32_frame_cache frame_info;
-  struct trad_frame_saved_reg saved_regs[SIM_LM32_NUM_REGS];
+  trad_frame_saved_reg saved_regs[SIM_LM32_NUM_REGS];
 
   /* See if we can determine the end of the prologue via the symbol table.
      If so, then return either PC, or the PC after the prologue, whichever
@@ -258,7 +254,7 @@ lm32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
       ULONGEST val;
 
       /* Promote small integer types to int.  */
-      switch (TYPE_CODE (arg_type))
+      switch (arg_type->code ())
        {
        case TYPE_CODE_INT:
        case TYPE_CODE_BOOL:
@@ -280,7 +276,7 @@ lm32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
                                      byte_order);
 
       /* First num_arg_regs parameters are passed by registers, 
-         and the rest are passed on the stack.  */
+        and the rest are passed on the stack.  */
       if (i < num_arg_regs)
        regcache_cooked_write_unsigned (regcache, first_arg_reg + i, val);
       else
@@ -309,15 +305,15 @@ lm32_extract_return_value (struct type *type, struct regcache *regcache,
   ULONGEST l;
   CORE_ADDR return_buffer;
 
-  if (TYPE_CODE (type) != TYPE_CODE_STRUCT
-      && TYPE_CODE (type) != TYPE_CODE_UNION
-      && TYPE_CODE (type) != TYPE_CODE_ARRAY && TYPE_LENGTH (type) <= 4)
+  if (type->code () != TYPE_CODE_STRUCT
+      && type->code () != TYPE_CODE_UNION
+      && type->code () != TYPE_CODE_ARRAY && TYPE_LENGTH (type) <= 4)
     {
       /* Return value is returned in a single register.  */
       regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
       store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, l);
     }
-  else if ((TYPE_CODE (type) == TYPE_CODE_INT) && (TYPE_LENGTH (type) == 8))
+  else if ((type->code () == TYPE_CODE_INT) && (TYPE_LENGTH (type) == 8))
     {
       /* 64-bit values are returned in a register pair.  */
       regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
@@ -328,7 +324,7 @@ lm32_extract_return_value (struct type *type, struct regcache *regcache,
   else
     {
       /* Aggregate types greater than a single register are returned
-         in memory.  FIXME: Unless they are only 2 regs?.  */
+        in memory.  FIXME: Unless they are only 2 regs?.  */
       regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
       return_buffer = l;
       read_memory (return_buffer, valbuf, TYPE_LENGTH (type));
@@ -368,7 +364,7 @@ lm32_return_value (struct gdbarch *gdbarch, struct value *function,
                   struct type *valtype, struct regcache *regcache,
                   gdb_byte *readbuf, const gdb_byte *writebuf)
 {
-  enum type_code code = TYPE_CODE (valtype);
+  enum type_code code = valtype->code ();
 
   if (code == TYPE_CODE_STRUCT
       || code == TYPE_CODE_UNION
@@ -418,8 +414,8 @@ lm32_frame_cache (struct frame_info *this_frame, void **this_prologue_cache)
   /* Convert callee save offsets into addresses.  */
   for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++)
     {
-      if (trad_frame_addr_p (info->saved_regs, i))
-       info->saved_regs[i].addr = this_base + info->saved_regs[i].addr;
+      if (info->saved_regs[i].is_addr ())
+       info->saved_regs[i].set_addr (this_base + info->saved_regs[i].addr ());
     }
 
   /* The call instruction moves the caller's PC in the callee's RA register.
@@ -430,7 +426,7 @@ lm32_frame_cache (struct frame_info *this_frame, void **this_prologue_cache)
 
   /* The previous frame's SP needed to be computed.  Save the computed
      value.  */
-  trad_frame_set_value (info->saved_regs, SIM_LM32_SP_REGNUM, prev_sp);
+  info->saved_regs[SIM_LM32_SP_REGNUM].set_value (prev_sp);
 
   return info;
 }
@@ -459,6 +455,7 @@ lm32_frame_prev_register (struct frame_info *this_frame,
 }
 
 static const struct frame_unwind lm32_frame_unwind = {
+  "lm32 prologue",
   NORMAL_FRAME,
   default_frame_unwind_stop_reason,
   lm32_frame_this_id,
@@ -549,8 +546,9 @@ lm32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   return gdbarch;
 }
 
+void _initialize_lm32_tdep ();
 void
-_initialize_lm32_tdep (void)
+_initialize_lm32_tdep ()
 {
   register_gdbarch_init (bfd_arch_lm32, lm32_gdbarch_init);
 }