/* This file is automatically generated by aarch64-gen. Do not edit! */
-/* Copyright (C) 2012-2020 Free Software Foundation, Inc.
+/* Copyright (C) 2012-2021 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of the GNU opcodes library.
{AARCH64_OPND_CLASS_INT_REG, "Rm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rm}, "an integer register"},
{AARCH64_OPND_CLASS_INT_REG, "Rt", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rt}, "an integer register"},
{AARCH64_OPND_CLASS_INT_REG, "Rt2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rt2}, "an integer register"},
+ {AARCH64_OPND_CLASS_INT_REG, "Rt_LS64", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rt}, "an integer register"},
{AARCH64_OPND_CLASS_INT_REG, "Rt_SP", OPD_F_MAYBE_SP | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rt}, "an integer or stack pointer register"},
{AARCH64_OPND_CLASS_INT_REG, "Rs", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rs}, "an integer register"},
{AARCH64_OPND_CLASS_INT_REG, "Ra", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Ra}, "an integer register"},
12,
636,
637,
- 1182,
- 1184,
1186,
- 994,
- 1185,
- 1183,
+ 1188,
+ 1190,
+ 998,
+ 1189,
+ 1187,
318,
624,
635,
634,
- 992,
+ 996,
631,
628,
620,
630,
632,
633,
- 1002,
+ 1006,
664,
667,
670,
391,
413,
415,
- 1266,
- 1271,
- 1264,
- 1263,
+ 1270,
+ 1275,
+ 1268,
1267,
- 1274,
- 1276,
- 1277,
- 1273,
- 1279,
+ 1271,
1278,
+ 1280,
+ 1281,
+ 1277,
+ 1283,
+ 1282,
131,
};