Rename rseq_load_add_load_add_store to rseq_load_add_load_load_add_store

Match the pseudo-code.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Change-Id: I48d60a9688cf76936fa1ba7a3b1d6b7412a77e69

diff --git a/include/rseq/arch/riscv/bits.h b/include/rseq/arch/riscv/bits.h
index 6af1577402acee55c7f0c11040b91813a9af82f4..f5213e0279d661782286e03b8e2489381252aa43 100644 (file)
--- a/include/rseq/arch/riscv/bits.h
+++ b/include/rseq/arch/riscv/bits.h
@@ -232,7 +232,7 @@ error3:
 #define RSEQ_ARCH_HAS_OFFSET_DEREF_ADDV
 
 static inline __attribute__((always_inline))
-int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_add_load_add_store__ptr)(intptr_t *ptr, off_t off, intptr_t inc, int cpu)
+int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_add_load_load_add_store__ptr)(intptr_t *ptr, off_t off, intptr_t inc, int cpu)
 {
        RSEQ_INJECT_C(9)
 

diff --git a/include/rseq/arch/x86/bits.h b/include/rseq/arch/x86/bits.h
index 3c370726e1ecd5e22e8f37d4c639ad2ae4a877ca..ab6313f425a61ec59e5c369f8af04d14ebf0ce45 100644 (file)
--- a/include/rseq/arch/x86/bits.h
+++ b/include/rseq/arch/x86/bits.h
@@ -199,7 +199,7 @@ error1:
 #define RSEQ_ARCH_HAS_OFFSET_DEREF_ADDV
 
 static inline __attribute__((always_inline))
-int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_add_load_add_store__ptr)(intptr_t *ptr, long off, intptr_t inc, int cpu)
+int RSEQ_TEMPLATE_IDENTIFIER(rseq_load_add_load_load_add_store__ptr)(intptr_t *ptr, long off, intptr_t inc, int cpu)
 {
        RSEQ_INJECT_C(9)
 

diff --git a/include/rseq/pseudocode.h b/include/rseq/pseudocode.h
index fc7af33ec624b5bc30889708420a65fd8e270824..c6fb9494475ee06d425adcf7bc1aa47678bd38cf 100644 (file)
--- a/include/rseq/pseudocode.h
+++ b/include/rseq/pseudocode.h
@@ -77,7 +77,7 @@
  */
 
 /*
- * rseq_load_add_load_add_store(ptr, off, inc)
+ * rseq_load_add_load_load_add_store(ptr, off, inc)
  *
  * Pseudo-code:
  *   load(r1, [ptr])

diff --git a/include/rseq/rseq.h b/include/rseq/rseq.h
index eb949393096e7b93bfa3e868815b616baed44ea8..b672468329fd8da92cdf1a2af32122d31d8ee019 100644 (file)
--- a/include/rseq/rseq.h
+++ b/include/rseq/rseq.h
@@ -275,16 +275,16 @@ int rseq_load_add_store__ptr(enum rseq_mo rseq_mo, enum rseq_percpu_mode percpu_
 
 #ifdef RSEQ_ARCH_HAS_OFFSET_DEREF_ADDV
 static inline __attribute__((always_inline))
-int rseq_load_add_load_add_store__ptr(enum rseq_mo rseq_mo, enum rseq_percpu_mode percpu_mode,
+int rseq_load_add_load_load_add_store__ptr(enum rseq_mo rseq_mo, enum rseq_percpu_mode percpu_mode,
                           intptr_t *ptr, long off, intptr_t inc, int cpu)
 {
        if (rseq_mo != RSEQ_MO_RELAXED)
                return -1;
        switch (percpu_mode) {
        case RSEQ_PERCPU_CPU_ID:
-               return rseq_load_add_load_add_store__ptr_relaxed_cpu_id(ptr, off, inc, cpu);
+               return rseq_load_add_load_load_add_store__ptr_relaxed_cpu_id(ptr, off, inc, cpu);
        case RSEQ_PERCPU_MM_CID:
-               return rseq_load_add_load_add_store__ptr_relaxed_mm_cid(ptr, off, inc, cpu);
+               return rseq_load_add_load_load_add_store__ptr_relaxed_mm_cid(ptr, off, inc, cpu);
        default:
                return -1;
        }

diff --git a/tests/param_test.c b/tests/param_test.c
index b44b952be03dd65d63cb24edb07ca243fef5294d..2a46182834f4f9b04dc1642d69bb87960006f32b 100644 (file)
--- a/tests/param_test.c
+++ b/tests/param_test.c
@@ -1314,7 +1314,7 @@ void *test_membarrier_worker_thread(void *arg)
                do {
                        int cpu = get_current_cpu_id();
 
-                       ret = rseq_load_add_load_add_store__ptr(RSEQ_MO_RELAXED, RSEQ_PERCPU,
+                       ret = rseq_load_add_load_load_add_store__ptr(RSEQ_MO_RELAXED, RSEQ_PERCPU,
                                &args->percpu_list_ptr,
                                sizeof(struct percpu_list_entry) * cpu, 1, cpu);
                } while (rseq_unlikely(ret));
@@ -1505,7 +1505,7 @@ void test_membarrier(void)
                                "Skipping membarrier test.\n");
                return;
        }
-       fprintf(stderr, "rseq_load_add_load_add_store__ptr is not implemented on this architecture. "
+       fprintf(stderr, "rseq_load_add_load_load_add_store__ptr is not implemented on this architecture. "
                        "Skipping membarrier test.\n");
 }
 #endif