From: Maciej W. Rozycki <macro@orcam.me.uk>
Date: Sat, 29 May 2021 01:26:32 +0000 (+0200)
Subject: MIPS/GAS/testsuite: Add tests for coprocessor access instructions
X-Git-Url: https://git.efficios.com/?a=commitdiff_plain;h=709aa065e1bd6988cf21c975a50abc2e002c6277;p=deliverable%2Fbinutils-gdb.git

MIPS/GAS/testsuite: Add tests for coprocessor access instructions

Cover basic CP0, CP2, CP3 move, load and store instructions across the
relevant ISA levels.  Omit CP0 move and CP1 instructions as they are
covered elsewhere.

	gas/
	* testsuite/gas/mips/cp0c.d: New test.
	* testsuite/gas/mips/cp0m.d: New test.
	* testsuite/gas/mips/r3900@cp0m.d: New test.
	* testsuite/gas/mips/cp2.d: New test.
	* testsuite/gas/mips/micromips@cp2.d: New test.
	* testsuite/gas/mips/cp2m.d: New test.
	* testsuite/gas/mips/mipsr6@cp2m.d: New test.
	* testsuite/gas/mips/micromips@cp2m.d: New test.
	* testsuite/gas/mips/cp2d.d: New test.
	* testsuite/gas/mips/mipsr6@cp2d.d: New test.
	* testsuite/gas/mips/micromips@cp2d.d: New test.
	* testsuite/gas/mips/cp2-64.d: New test.
	* testsuite/gas/mips/micromips@cp2-64.d: New test.
	* testsuite/gas/mips/cp3.d: New test.
	* testsuite/gas/mips/cp3m.d: New test.
	* testsuite/gas/mips/cp3d.d: New test.
	* testsuite/gas/mips/cp0c.s: New test source.
	* testsuite/gas/mips/cp0m.s: New test source.
	* testsuite/gas/mips/cp2.s: New test source.
	* testsuite/gas/mips/cp2m.s: New test source.
	* testsuite/gas/mips/cp2d.s: New test source.
	* testsuite/gas/mips/cp2-64.s: New test source.
	* testsuite/gas/mips/cp3.s: New test source.
	* testsuite/gas/mips/cp3m.s: New test source.
	* testsuite/gas/mips/cp3d.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0d5f7a85a9..77dd8f740a 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,32 @@
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+	* testsuite/gas/mips/cp0c.d: New test.
+	* testsuite/gas/mips/cp0m.d: New test.
+	* testsuite/gas/mips/r3900@cp0m.d: New test.
+	* testsuite/gas/mips/cp2.d: New test.
+	* testsuite/gas/mips/micromips@cp2.d: New test.
+	* testsuite/gas/mips/cp2m.d: New test.
+	* testsuite/gas/mips/mipsr6@cp2m.d: New test.
+	* testsuite/gas/mips/micromips@cp2m.d: New test.
+	* testsuite/gas/mips/cp2d.d: New test.
+	* testsuite/gas/mips/mipsr6@cp2d.d: New test.
+	* testsuite/gas/mips/micromips@cp2d.d: New test.
+	* testsuite/gas/mips/cp2-64.d: New test.
+	* testsuite/gas/mips/micromips@cp2-64.d: New test.
+	* testsuite/gas/mips/cp3.d: New test.
+	* testsuite/gas/mips/cp3m.d: New test.
+	* testsuite/gas/mips/cp3d.d: New test.
+	* testsuite/gas/mips/cp0c.s: New test source.
+	* testsuite/gas/mips/cp0m.s: New test source.
+	* testsuite/gas/mips/cp2.s: New test source.
+	* testsuite/gas/mips/cp2m.s: New test source.
+	* testsuite/gas/mips/cp2d.s: New test source.
+	* testsuite/gas/mips/cp2-64.s: New test source.
+	* testsuite/gas/mips/cp3.s: New test source.
+	* testsuite/gas/mips/cp3m.s: New test source.
+	* testsuite/gas/mips/cp3d.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
 2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
 
 	* tc-mips.c (convert_reg_type) <OP_REG_CONTROL>: New case.
diff --git a/gas/testsuite/gas/mips/cp0c.d b/gas/testsuite/gas/mips/cp0c.d
new file mode 100644
index 0000000000..1432ed99cf
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp0c.d
@@ -0,0 +1,72 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 control register move instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 40c00000 	ctc0	zero,\$0
+[0-9a-f]+ <[^>]*> 40c00800 	ctc0	zero,\$1
+[0-9a-f]+ <[^>]*> 40c01000 	ctc0	zero,\$2
+[0-9a-f]+ <[^>]*> 40c01800 	ctc0	zero,\$3
+[0-9a-f]+ <[^>]*> 40c02000 	ctc0	zero,\$4
+[0-9a-f]+ <[^>]*> 40c02800 	ctc0	zero,\$5
+[0-9a-f]+ <[^>]*> 40c03000 	ctc0	zero,\$6
+[0-9a-f]+ <[^>]*> 40c03800 	ctc0	zero,\$7
+[0-9a-f]+ <[^>]*> 40c04000 	ctc0	zero,\$8
+[0-9a-f]+ <[^>]*> 40c04800 	ctc0	zero,\$9
+[0-9a-f]+ <[^>]*> 40c05000 	ctc0	zero,\$10
+[0-9a-f]+ <[^>]*> 40c05800 	ctc0	zero,\$11
+[0-9a-f]+ <[^>]*> 40c06000 	ctc0	zero,\$12
+[0-9a-f]+ <[^>]*> 40c06800 	ctc0	zero,\$13
+[0-9a-f]+ <[^>]*> 40c07000 	ctc0	zero,\$14
+[0-9a-f]+ <[^>]*> 40c07800 	ctc0	zero,\$15
+[0-9a-f]+ <[^>]*> 40c08000 	ctc0	zero,\$16
+[0-9a-f]+ <[^>]*> 40c08800 	ctc0	zero,\$17
+[0-9a-f]+ <[^>]*> 40c09000 	ctc0	zero,\$18
+[0-9a-f]+ <[^>]*> 40c09800 	ctc0	zero,\$19
+[0-9a-f]+ <[^>]*> 40c0a000 	ctc0	zero,\$20
+[0-9a-f]+ <[^>]*> 40c0a800 	ctc0	zero,\$21
+[0-9a-f]+ <[^>]*> 40c0b000 	ctc0	zero,\$22
+[0-9a-f]+ <[^>]*> 40c0b800 	ctc0	zero,\$23
+[0-9a-f]+ <[^>]*> 40c0c000 	ctc0	zero,\$24
+[0-9a-f]+ <[^>]*> 40c0c800 	ctc0	zero,\$25
+[0-9a-f]+ <[^>]*> 40c0d000 	ctc0	zero,\$26
+[0-9a-f]+ <[^>]*> 40c0d800 	ctc0	zero,\$27
+[0-9a-f]+ <[^>]*> 40c0e000 	ctc0	zero,\$28
+[0-9a-f]+ <[^>]*> 40c0e800 	ctc0	zero,\$29
+[0-9a-f]+ <[^>]*> 40c0f000 	ctc0	zero,\$30
+[0-9a-f]+ <[^>]*> 40c0f800 	ctc0	zero,\$31
+[0-9a-f]+ <[^>]*> 40400000 	cfc0	zero,\$0
+[0-9a-f]+ <[^>]*> 40400800 	cfc0	zero,\$1
+[0-9a-f]+ <[^>]*> 40401000 	cfc0	zero,\$2
+[0-9a-f]+ <[^>]*> 40401800 	cfc0	zero,\$3
+[0-9a-f]+ <[^>]*> 40402000 	cfc0	zero,\$4
+[0-9a-f]+ <[^>]*> 40402800 	cfc0	zero,\$5
+[0-9a-f]+ <[^>]*> 40403000 	cfc0	zero,\$6
+[0-9a-f]+ <[^>]*> 40403800 	cfc0	zero,\$7
+[0-9a-f]+ <[^>]*> 40404000 	cfc0	zero,\$8
+[0-9a-f]+ <[^>]*> 40404800 	cfc0	zero,\$9
+[0-9a-f]+ <[^>]*> 40405000 	cfc0	zero,\$10
+[0-9a-f]+ <[^>]*> 40405800 	cfc0	zero,\$11
+[0-9a-f]+ <[^>]*> 40406000 	cfc0	zero,\$12
+[0-9a-f]+ <[^>]*> 40406800 	cfc0	zero,\$13
+[0-9a-f]+ <[^>]*> 40407000 	cfc0	zero,\$14
+[0-9a-f]+ <[^>]*> 40407800 	cfc0	zero,\$15
+[0-9a-f]+ <[^>]*> 40408000 	cfc0	zero,\$16
+[0-9a-f]+ <[^>]*> 40408800 	cfc0	zero,\$17
+[0-9a-f]+ <[^>]*> 40409000 	cfc0	zero,\$18
+[0-9a-f]+ <[^>]*> 40409800 	cfc0	zero,\$19
+[0-9a-f]+ <[^>]*> 4040a000 	cfc0	zero,\$20
+[0-9a-f]+ <[^>]*> 4040a800 	cfc0	zero,\$21
+[0-9a-f]+ <[^>]*> 4040b000 	cfc0	zero,\$22
+[0-9a-f]+ <[^>]*> 4040b800 	cfc0	zero,\$23
+[0-9a-f]+ <[^>]*> 4040c000 	cfc0	zero,\$24
+[0-9a-f]+ <[^>]*> 4040c800 	cfc0	zero,\$25
+[0-9a-f]+ <[^>]*> 4040d000 	cfc0	zero,\$26
+[0-9a-f]+ <[^>]*> 4040d800 	cfc0	zero,\$27
+[0-9a-f]+ <[^>]*> 4040e000 	cfc0	zero,\$28
+[0-9a-f]+ <[^>]*> 4040e800 	cfc0	zero,\$29
+[0-9a-f]+ <[^>]*> 4040f000 	cfc0	zero,\$30
+[0-9a-f]+ <[^>]*> 4040f800 	cfc0	zero,\$31
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp0c.s b/gas/testsuite/gas/mips/cp0c.s
new file mode 100644
index 0000000000..ec67ee5dc3
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp0c.s
@@ -0,0 +1,72 @@
+	.text
+	.set	noreorder
+foo:
+	ctc0	$0, $0
+	ctc0	$0, $1
+	ctc0	$0, $2
+	ctc0	$0, $3
+	ctc0	$0, $4
+	ctc0	$0, $5
+	ctc0	$0, $6
+	ctc0	$0, $7
+	ctc0	$0, $8
+	ctc0	$0, $9
+	ctc0	$0, $10
+	ctc0	$0, $11
+	ctc0	$0, $12
+	ctc0	$0, $13
+	ctc0	$0, $14
+	ctc0	$0, $15
+	ctc0	$0, $16
+	ctc0	$0, $17
+	ctc0	$0, $18
+	ctc0	$0, $19
+	ctc0	$0, $20
+	ctc0	$0, $21
+	ctc0	$0, $22
+	ctc0	$0, $23
+	ctc0	$0, $24
+	ctc0	$0, $25
+	ctc0	$0, $26
+	ctc0	$0, $27
+	ctc0	$0, $28
+	ctc0	$0, $29
+	ctc0	$0, $30
+	ctc0	$0, $31
+
+	cfc0	$0, $0
+	cfc0	$0, $1
+	cfc0	$0, $2
+	cfc0	$0, $3
+	cfc0	$0, $4
+	cfc0	$0, $5
+	cfc0	$0, $6
+	cfc0	$0, $7
+	cfc0	$0, $8
+	cfc0	$0, $9
+	cfc0	$0, $10
+	cfc0	$0, $11
+	cfc0	$0, $12
+	cfc0	$0, $13
+	cfc0	$0, $14
+	cfc0	$0, $15
+	cfc0	$0, $16
+	cfc0	$0, $17
+	cfc0	$0, $18
+	cfc0	$0, $19
+	cfc0	$0, $20
+	cfc0	$0, $21
+	cfc0	$0, $22
+	cfc0	$0, $23
+	cfc0	$0, $24
+	cfc0	$0, $25
+	cfc0	$0, $26
+	cfc0	$0, $27
+	cfc0	$0, $28
+	cfc0	$0, $29
+	cfc0	$0, $30
+	cfc0	$0, $31
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/cp0m.d b/gas/testsuite/gas/mips/cp0m.d
new file mode 100644
index 0000000000..9eb8f0faa1
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp0m.d
@@ -0,0 +1,72 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 memory access instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> c0000000 	lwc0	c0_index,0\(zero\)
+[0-9a-f]+ <[^>]*> c0010000 	lwc0	c0_random,0\(zero\)
+[0-9a-f]+ <[^>]*> c0020000 	lwc0	c0_entrylo,0\(zero\)
+[0-9a-f]+ <[^>]*> c0030000 	lwc0	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> c0040000 	lwc0	c0_context,0\(zero\)
+[0-9a-f]+ <[^>]*> c0050000 	lwc0	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> c0060000 	lwc0	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> c0070000 	lwc0	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> c0080000 	lwc0	c0_badvaddr,0\(zero\)
+[0-9a-f]+ <[^>]*> c0090000 	lwc0	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> c00a0000 	lwc0	c0_entryhi,0\(zero\)
+[0-9a-f]+ <[^>]*> c00b0000 	lwc0	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> c00c0000 	lwc0	c0_sr,0\(zero\)
+[0-9a-f]+ <[^>]*> c00d0000 	lwc0	c0_cause,0\(zero\)
+[0-9a-f]+ <[^>]*> c00e0000 	lwc0	c0_epc,0\(zero\)
+[0-9a-f]+ <[^>]*> c00f0000 	lwc0	c0_prid,0\(zero\)
+[0-9a-f]+ <[^>]*> c0100000 	lwc0	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> c0110000 	lwc0	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> c0120000 	lwc0	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> c0130000 	lwc0	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> c0140000 	lwc0	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> c0150000 	lwc0	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> c0160000 	lwc0	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> c0170000 	lwc0	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> c0180000 	lwc0	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> c0190000 	lwc0	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> c01a0000 	lwc0	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> c01b0000 	lwc0	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> c01c0000 	lwc0	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> c01d0000 	lwc0	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> c01e0000 	lwc0	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> c01f0000 	lwc0	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> e0000000 	swc0	c0_index,0\(zero\)
+[0-9a-f]+ <[^>]*> e0010000 	swc0	c0_random,0\(zero\)
+[0-9a-f]+ <[^>]*> e0020000 	swc0	c0_entrylo,0\(zero\)
+[0-9a-f]+ <[^>]*> e0030000 	swc0	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> e0040000 	swc0	c0_context,0\(zero\)
+[0-9a-f]+ <[^>]*> e0050000 	swc0	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> e0060000 	swc0	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> e0070000 	swc0	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> e0080000 	swc0	c0_badvaddr,0\(zero\)
+[0-9a-f]+ <[^>]*> e0090000 	swc0	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> e00a0000 	swc0	c0_entryhi,0\(zero\)
+[0-9a-f]+ <[^>]*> e00b0000 	swc0	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> e00c0000 	swc0	c0_sr,0\(zero\)
+[0-9a-f]+ <[^>]*> e00d0000 	swc0	c0_cause,0\(zero\)
+[0-9a-f]+ <[^>]*> e00e0000 	swc0	c0_epc,0\(zero\)
+[0-9a-f]+ <[^>]*> e00f0000 	swc0	c0_prid,0\(zero\)
+[0-9a-f]+ <[^>]*> e0100000 	swc0	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> e0110000 	swc0	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> e0120000 	swc0	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> e0130000 	swc0	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> e0140000 	swc0	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> e0150000 	swc0	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> e0160000 	swc0	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> e0170000 	swc0	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> e0180000 	swc0	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> e0190000 	swc0	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> e01a0000 	swc0	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> e01b0000 	swc0	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> e01c0000 	swc0	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> e01d0000 	swc0	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> e01e0000 	swc0	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> e01f0000 	swc0	\$31,0\(zero\)
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp0m.s b/gas/testsuite/gas/mips/cp0m.s
new file mode 100644
index 0000000000..15603dd124
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp0m.s
@@ -0,0 +1,72 @@
+	.text
+	.set	noreorder
+foo:
+	lwc0	$0, 0($0)
+	lwc0	$1, 0($0)
+	lwc0	$2, 0($0)
+	lwc0	$3, 0($0)
+	lwc0	$4, 0($0)
+	lwc0	$5, 0($0)
+	lwc0	$6, 0($0)
+	lwc0	$7, 0($0)
+	lwc0	$8, 0($0)
+	lwc0	$9, 0($0)
+	lwc0	$10, 0($0)
+	lwc0	$11, 0($0)
+	lwc0	$12, 0($0)
+	lwc0	$13, 0($0)
+	lwc0	$14, 0($0)
+	lwc0	$15, 0($0)
+	lwc0	$16, 0($0)
+	lwc0	$17, 0($0)
+	lwc0	$18, 0($0)
+	lwc0	$19, 0($0)
+	lwc0	$20, 0($0)
+	lwc0	$21, 0($0)
+	lwc0	$22, 0($0)
+	lwc0	$23, 0($0)
+	lwc0	$24, 0($0)
+	lwc0	$25, 0($0)
+	lwc0	$26, 0($0)
+	lwc0	$27, 0($0)
+	lwc0	$28, 0($0)
+	lwc0	$29, 0($0)
+	lwc0	$30, 0($0)
+	lwc0	$31, 0($0)
+
+	swc0	$0, 0($0)
+	swc0	$1, 0($0)
+	swc0	$2, 0($0)
+	swc0	$3, 0($0)
+	swc0	$4, 0($0)
+	swc0	$5, 0($0)
+	swc0	$6, 0($0)
+	swc0	$7, 0($0)
+	swc0	$8, 0($0)
+	swc0	$9, 0($0)
+	swc0	$10, 0($0)
+	swc0	$11, 0($0)
+	swc0	$12, 0($0)
+	swc0	$13, 0($0)
+	swc0	$14, 0($0)
+	swc0	$15, 0($0)
+	swc0	$16, 0($0)
+	swc0	$17, 0($0)
+	swc0	$18, 0($0)
+	swc0	$19, 0($0)
+	swc0	$20, 0($0)
+	swc0	$21, 0($0)
+	swc0	$22, 0($0)
+	swc0	$23, 0($0)
+	swc0	$24, 0($0)
+	swc0	$25, 0($0)
+	swc0	$26, 0($0)
+	swc0	$27, 0($0)
+	swc0	$28, 0($0)
+	swc0	$29, 0($0)
+	swc0	$30, 0($0)
+	swc0	$31, 0($0)
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/cp2-64.d b/gas/testsuite/gas/mips/cp2-64.d
new file mode 100644
index 0000000000..57fa131ac6
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2-64.d
@@ -0,0 +1,72 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 64-bit move instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 48a00000 	dmtc2	zero,\$0
+[0-9a-f]+ <[^>]*> 48a00800 	dmtc2	zero,\$1
+[0-9a-f]+ <[^>]*> 48a01000 	dmtc2	zero,\$2
+[0-9a-f]+ <[^>]*> 48a01800 	dmtc2	zero,\$3
+[0-9a-f]+ <[^>]*> 48a02000 	dmtc2	zero,\$4
+[0-9a-f]+ <[^>]*> 48a02800 	dmtc2	zero,\$5
+[0-9a-f]+ <[^>]*> 48a03000 	dmtc2	zero,\$6
+[0-9a-f]+ <[^>]*> 48a03800 	dmtc2	zero,\$7
+[0-9a-f]+ <[^>]*> 48a04000 	dmtc2	zero,\$8
+[0-9a-f]+ <[^>]*> 48a04800 	dmtc2	zero,\$9
+[0-9a-f]+ <[^>]*> 48a05000 	dmtc2	zero,\$10
+[0-9a-f]+ <[^>]*> 48a05800 	dmtc2	zero,\$11
+[0-9a-f]+ <[^>]*> 48a06000 	dmtc2	zero,\$12
+[0-9a-f]+ <[^>]*> 48a06800 	dmtc2	zero,\$13
+[0-9a-f]+ <[^>]*> 48a07000 	dmtc2	zero,\$14
+[0-9a-f]+ <[^>]*> 48a07800 	dmtc2	zero,\$15
+[0-9a-f]+ <[^>]*> 48a08000 	dmtc2	zero,\$16
+[0-9a-f]+ <[^>]*> 48a08800 	dmtc2	zero,\$17
+[0-9a-f]+ <[^>]*> 48a09000 	dmtc2	zero,\$18
+[0-9a-f]+ <[^>]*> 48a09800 	dmtc2	zero,\$19
+[0-9a-f]+ <[^>]*> 48a0a000 	dmtc2	zero,\$20
+[0-9a-f]+ <[^>]*> 48a0a800 	dmtc2	zero,\$21
+[0-9a-f]+ <[^>]*> 48a0b000 	dmtc2	zero,\$22
+[0-9a-f]+ <[^>]*> 48a0b800 	dmtc2	zero,\$23
+[0-9a-f]+ <[^>]*> 48a0c000 	dmtc2	zero,\$24
+[0-9a-f]+ <[^>]*> 48a0c800 	dmtc2	zero,\$25
+[0-9a-f]+ <[^>]*> 48a0d000 	dmtc2	zero,\$26
+[0-9a-f]+ <[^>]*> 48a0d800 	dmtc2	zero,\$27
+[0-9a-f]+ <[^>]*> 48a0e000 	dmtc2	zero,\$28
+[0-9a-f]+ <[^>]*> 48a0e800 	dmtc2	zero,\$29
+[0-9a-f]+ <[^>]*> 48a0f000 	dmtc2	zero,\$30
+[0-9a-f]+ <[^>]*> 48a0f800 	dmtc2	zero,\$31
+[0-9a-f]+ <[^>]*> 48200000 	dmfc2	zero,\$0
+[0-9a-f]+ <[^>]*> 48200800 	dmfc2	zero,\$1
+[0-9a-f]+ <[^>]*> 48201000 	dmfc2	zero,\$2
+[0-9a-f]+ <[^>]*> 48201800 	dmfc2	zero,\$3
+[0-9a-f]+ <[^>]*> 48202000 	dmfc2	zero,\$4
+[0-9a-f]+ <[^>]*> 48202800 	dmfc2	zero,\$5
+[0-9a-f]+ <[^>]*> 48203000 	dmfc2	zero,\$6
+[0-9a-f]+ <[^>]*> 48203800 	dmfc2	zero,\$7
+[0-9a-f]+ <[^>]*> 48204000 	dmfc2	zero,\$8
+[0-9a-f]+ <[^>]*> 48204800 	dmfc2	zero,\$9
+[0-9a-f]+ <[^>]*> 48205000 	dmfc2	zero,\$10
+[0-9a-f]+ <[^>]*> 48205800 	dmfc2	zero,\$11
+[0-9a-f]+ <[^>]*> 48206000 	dmfc2	zero,\$12
+[0-9a-f]+ <[^>]*> 48206800 	dmfc2	zero,\$13
+[0-9a-f]+ <[^>]*> 48207000 	dmfc2	zero,\$14
+[0-9a-f]+ <[^>]*> 48207800 	dmfc2	zero,\$15
+[0-9a-f]+ <[^>]*> 48208000 	dmfc2	zero,\$16
+[0-9a-f]+ <[^>]*> 48208800 	dmfc2	zero,\$17
+[0-9a-f]+ <[^>]*> 48209000 	dmfc2	zero,\$18
+[0-9a-f]+ <[^>]*> 48209800 	dmfc2	zero,\$19
+[0-9a-f]+ <[^>]*> 4820a000 	dmfc2	zero,\$20
+[0-9a-f]+ <[^>]*> 4820a800 	dmfc2	zero,\$21
+[0-9a-f]+ <[^>]*> 4820b000 	dmfc2	zero,\$22
+[0-9a-f]+ <[^>]*> 4820b800 	dmfc2	zero,\$23
+[0-9a-f]+ <[^>]*> 4820c000 	dmfc2	zero,\$24
+[0-9a-f]+ <[^>]*> 4820c800 	dmfc2	zero,\$25
+[0-9a-f]+ <[^>]*> 4820d000 	dmfc2	zero,\$26
+[0-9a-f]+ <[^>]*> 4820d800 	dmfc2	zero,\$27
+[0-9a-f]+ <[^>]*> 4820e000 	dmfc2	zero,\$28
+[0-9a-f]+ <[^>]*> 4820e800 	dmfc2	zero,\$29
+[0-9a-f]+ <[^>]*> 4820f000 	dmfc2	zero,\$30
+[0-9a-f]+ <[^>]*> 4820f800 	dmfc2	zero,\$31
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp2-64.s b/gas/testsuite/gas/mips/cp2-64.s
new file mode 100644
index 0000000000..5d67483100
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2-64.s
@@ -0,0 +1,72 @@
+	.text
+	.set	noreorder
+foo:
+	dmtc2	$0, $0
+	dmtc2	$0, $1
+	dmtc2	$0, $2
+	dmtc2	$0, $3
+	dmtc2	$0, $4
+	dmtc2	$0, $5
+	dmtc2	$0, $6
+	dmtc2	$0, $7
+	dmtc2	$0, $8
+	dmtc2	$0, $9
+	dmtc2	$0, $10
+	dmtc2	$0, $11
+	dmtc2	$0, $12
+	dmtc2	$0, $13
+	dmtc2	$0, $14
+	dmtc2	$0, $15
+	dmtc2	$0, $16
+	dmtc2	$0, $17
+	dmtc2	$0, $18
+	dmtc2	$0, $19
+	dmtc2	$0, $20
+	dmtc2	$0, $21
+	dmtc2	$0, $22
+	dmtc2	$0, $23
+	dmtc2	$0, $24
+	dmtc2	$0, $25
+	dmtc2	$0, $26
+	dmtc2	$0, $27
+	dmtc2	$0, $28
+	dmtc2	$0, $29
+	dmtc2	$0, $30
+	dmtc2	$0, $31
+
+	dmfc2	$0, $0
+	dmfc2	$0, $1
+	dmfc2	$0, $2
+	dmfc2	$0, $3
+	dmfc2	$0, $4
+	dmfc2	$0, $5
+	dmfc2	$0, $6
+	dmfc2	$0, $7
+	dmfc2	$0, $8
+	dmfc2	$0, $9
+	dmfc2	$0, $10
+	dmfc2	$0, $11
+	dmfc2	$0, $12
+	dmfc2	$0, $13
+	dmfc2	$0, $14
+	dmfc2	$0, $15
+	dmfc2	$0, $16
+	dmfc2	$0, $17
+	dmfc2	$0, $18
+	dmfc2	$0, $19
+	dmfc2	$0, $20
+	dmfc2	$0, $21
+	dmfc2	$0, $22
+	dmfc2	$0, $23
+	dmfc2	$0, $24
+	dmfc2	$0, $25
+	dmfc2	$0, $26
+	dmfc2	$0, $27
+	dmfc2	$0, $28
+	dmfc2	$0, $29
+	dmfc2	$0, $30
+	dmfc2	$0, $31
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/cp2.d b/gas/testsuite/gas/mips/cp2.d
new file mode 100644
index 0000000000..95189536bc
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2.d
@@ -0,0 +1,136 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 register move instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 48800000 	mtc2	zero,\$0
+[0-9a-f]+ <[^>]*> 48800800 	mtc2	zero,\$1
+[0-9a-f]+ <[^>]*> 48801000 	mtc2	zero,\$2
+[0-9a-f]+ <[^>]*> 48801800 	mtc2	zero,\$3
+[0-9a-f]+ <[^>]*> 48802000 	mtc2	zero,\$4
+[0-9a-f]+ <[^>]*> 48802800 	mtc2	zero,\$5
+[0-9a-f]+ <[^>]*> 48803000 	mtc2	zero,\$6
+[0-9a-f]+ <[^>]*> 48803800 	mtc2	zero,\$7
+[0-9a-f]+ <[^>]*> 48804000 	mtc2	zero,\$8
+[0-9a-f]+ <[^>]*> 48804800 	mtc2	zero,\$9
+[0-9a-f]+ <[^>]*> 48805000 	mtc2	zero,\$10
+[0-9a-f]+ <[^>]*> 48805800 	mtc2	zero,\$11
+[0-9a-f]+ <[^>]*> 48806000 	mtc2	zero,\$12
+[0-9a-f]+ <[^>]*> 48806800 	mtc2	zero,\$13
+[0-9a-f]+ <[^>]*> 48807000 	mtc2	zero,\$14
+[0-9a-f]+ <[^>]*> 48807800 	mtc2	zero,\$15
+[0-9a-f]+ <[^>]*> 48808000 	mtc2	zero,\$16
+[0-9a-f]+ <[^>]*> 48808800 	mtc2	zero,\$17
+[0-9a-f]+ <[^>]*> 48809000 	mtc2	zero,\$18
+[0-9a-f]+ <[^>]*> 48809800 	mtc2	zero,\$19
+[0-9a-f]+ <[^>]*> 4880a000 	mtc2	zero,\$20
+[0-9a-f]+ <[^>]*> 4880a800 	mtc2	zero,\$21
+[0-9a-f]+ <[^>]*> 4880b000 	mtc2	zero,\$22
+[0-9a-f]+ <[^>]*> 4880b800 	mtc2	zero,\$23
+[0-9a-f]+ <[^>]*> 4880c000 	mtc2	zero,\$24
+[0-9a-f]+ <[^>]*> 4880c800 	mtc2	zero,\$25
+[0-9a-f]+ <[^>]*> 4880d000 	mtc2	zero,\$26
+[0-9a-f]+ <[^>]*> 4880d800 	mtc2	zero,\$27
+[0-9a-f]+ <[^>]*> 4880e000 	mtc2	zero,\$28
+[0-9a-f]+ <[^>]*> 4880e800 	mtc2	zero,\$29
+[0-9a-f]+ <[^>]*> 4880f000 	mtc2	zero,\$30
+[0-9a-f]+ <[^>]*> 4880f800 	mtc2	zero,\$31
+[0-9a-f]+ <[^>]*> 48000000 	mfc2	zero,\$0
+[0-9a-f]+ <[^>]*> 48000800 	mfc2	zero,\$1
+[0-9a-f]+ <[^>]*> 48001000 	mfc2	zero,\$2
+[0-9a-f]+ <[^>]*> 48001800 	mfc2	zero,\$3
+[0-9a-f]+ <[^>]*> 48002000 	mfc2	zero,\$4
+[0-9a-f]+ <[^>]*> 48002800 	mfc2	zero,\$5
+[0-9a-f]+ <[^>]*> 48003000 	mfc2	zero,\$6
+[0-9a-f]+ <[^>]*> 48003800 	mfc2	zero,\$7
+[0-9a-f]+ <[^>]*> 48004000 	mfc2	zero,\$8
+[0-9a-f]+ <[^>]*> 48004800 	mfc2	zero,\$9
+[0-9a-f]+ <[^>]*> 48005000 	mfc2	zero,\$10
+[0-9a-f]+ <[^>]*> 48005800 	mfc2	zero,\$11
+[0-9a-f]+ <[^>]*> 48006000 	mfc2	zero,\$12
+[0-9a-f]+ <[^>]*> 48006800 	mfc2	zero,\$13
+[0-9a-f]+ <[^>]*> 48007000 	mfc2	zero,\$14
+[0-9a-f]+ <[^>]*> 48007800 	mfc2	zero,\$15
+[0-9a-f]+ <[^>]*> 48008000 	mfc2	zero,\$16
+[0-9a-f]+ <[^>]*> 48008800 	mfc2	zero,\$17
+[0-9a-f]+ <[^>]*> 48009000 	mfc2	zero,\$18
+[0-9a-f]+ <[^>]*> 48009800 	mfc2	zero,\$19
+[0-9a-f]+ <[^>]*> 4800a000 	mfc2	zero,\$20
+[0-9a-f]+ <[^>]*> 4800a800 	mfc2	zero,\$21
+[0-9a-f]+ <[^>]*> 4800b000 	mfc2	zero,\$22
+[0-9a-f]+ <[^>]*> 4800b800 	mfc2	zero,\$23
+[0-9a-f]+ <[^>]*> 4800c000 	mfc2	zero,\$24
+[0-9a-f]+ <[^>]*> 4800c800 	mfc2	zero,\$25
+[0-9a-f]+ <[^>]*> 4800d000 	mfc2	zero,\$26
+[0-9a-f]+ <[^>]*> 4800d800 	mfc2	zero,\$27
+[0-9a-f]+ <[^>]*> 4800e000 	mfc2	zero,\$28
+[0-9a-f]+ <[^>]*> 4800e800 	mfc2	zero,\$29
+[0-9a-f]+ <[^>]*> 4800f000 	mfc2	zero,\$30
+[0-9a-f]+ <[^>]*> 4800f800 	mfc2	zero,\$31
+[0-9a-f]+ <[^>]*> 48c00000 	ctc2	zero,\$0
+[0-9a-f]+ <[^>]*> 48c00800 	ctc2	zero,\$1
+[0-9a-f]+ <[^>]*> 48c01000 	ctc2	zero,\$2
+[0-9a-f]+ <[^>]*> 48c01800 	ctc2	zero,\$3
+[0-9a-f]+ <[^>]*> 48c02000 	ctc2	zero,\$4
+[0-9a-f]+ <[^>]*> 48c02800 	ctc2	zero,\$5
+[0-9a-f]+ <[^>]*> 48c03000 	ctc2	zero,\$6
+[0-9a-f]+ <[^>]*> 48c03800 	ctc2	zero,\$7
+[0-9a-f]+ <[^>]*> 48c04000 	ctc2	zero,\$8
+[0-9a-f]+ <[^>]*> 48c04800 	ctc2	zero,\$9
+[0-9a-f]+ <[^>]*> 48c05000 	ctc2	zero,\$10
+[0-9a-f]+ <[^>]*> 48c05800 	ctc2	zero,\$11
+[0-9a-f]+ <[^>]*> 48c06000 	ctc2	zero,\$12
+[0-9a-f]+ <[^>]*> 48c06800 	ctc2	zero,\$13
+[0-9a-f]+ <[^>]*> 48c07000 	ctc2	zero,\$14
+[0-9a-f]+ <[^>]*> 48c07800 	ctc2	zero,\$15
+[0-9a-f]+ <[^>]*> 48c08000 	ctc2	zero,\$16
+[0-9a-f]+ <[^>]*> 48c08800 	ctc2	zero,\$17
+[0-9a-f]+ <[^>]*> 48c09000 	ctc2	zero,\$18
+[0-9a-f]+ <[^>]*> 48c09800 	ctc2	zero,\$19
+[0-9a-f]+ <[^>]*> 48c0a000 	ctc2	zero,\$20
+[0-9a-f]+ <[^>]*> 48c0a800 	ctc2	zero,\$21
+[0-9a-f]+ <[^>]*> 48c0b000 	ctc2	zero,\$22
+[0-9a-f]+ <[^>]*> 48c0b800 	ctc2	zero,\$23
+[0-9a-f]+ <[^>]*> 48c0c000 	ctc2	zero,\$24
+[0-9a-f]+ <[^>]*> 48c0c800 	ctc2	zero,\$25
+[0-9a-f]+ <[^>]*> 48c0d000 	ctc2	zero,\$26
+[0-9a-f]+ <[^>]*> 48c0d800 	ctc2	zero,\$27
+[0-9a-f]+ <[^>]*> 48c0e000 	ctc2	zero,\$28
+[0-9a-f]+ <[^>]*> 48c0e800 	ctc2	zero,\$29
+[0-9a-f]+ <[^>]*> 48c0f000 	ctc2	zero,\$30
+[0-9a-f]+ <[^>]*> 48c0f800 	ctc2	zero,\$31
+[0-9a-f]+ <[^>]*> 48400000 	cfc2	zero,\$0
+[0-9a-f]+ <[^>]*> 48400800 	cfc2	zero,\$1
+[0-9a-f]+ <[^>]*> 48401000 	cfc2	zero,\$2
+[0-9a-f]+ <[^>]*> 48401800 	cfc2	zero,\$3
+[0-9a-f]+ <[^>]*> 48402000 	cfc2	zero,\$4
+[0-9a-f]+ <[^>]*> 48402800 	cfc2	zero,\$5
+[0-9a-f]+ <[^>]*> 48403000 	cfc2	zero,\$6
+[0-9a-f]+ <[^>]*> 48403800 	cfc2	zero,\$7
+[0-9a-f]+ <[^>]*> 48404000 	cfc2	zero,\$8
+[0-9a-f]+ <[^>]*> 48404800 	cfc2	zero,\$9
+[0-9a-f]+ <[^>]*> 48405000 	cfc2	zero,\$10
+[0-9a-f]+ <[^>]*> 48405800 	cfc2	zero,\$11
+[0-9a-f]+ <[^>]*> 48406000 	cfc2	zero,\$12
+[0-9a-f]+ <[^>]*> 48406800 	cfc2	zero,\$13
+[0-9a-f]+ <[^>]*> 48407000 	cfc2	zero,\$14
+[0-9a-f]+ <[^>]*> 48407800 	cfc2	zero,\$15
+[0-9a-f]+ <[^>]*> 48408000 	cfc2	zero,\$16
+[0-9a-f]+ <[^>]*> 48408800 	cfc2	zero,\$17
+[0-9a-f]+ <[^>]*> 48409000 	cfc2	zero,\$18
+[0-9a-f]+ <[^>]*> 48409800 	cfc2	zero,\$19
+[0-9a-f]+ <[^>]*> 4840a000 	cfc2	zero,\$20
+[0-9a-f]+ <[^>]*> 4840a800 	cfc2	zero,\$21
+[0-9a-f]+ <[^>]*> 4840b000 	cfc2	zero,\$22
+[0-9a-f]+ <[^>]*> 4840b800 	cfc2	zero,\$23
+[0-9a-f]+ <[^>]*> 4840c000 	cfc2	zero,\$24
+[0-9a-f]+ <[^>]*> 4840c800 	cfc2	zero,\$25
+[0-9a-f]+ <[^>]*> 4840d000 	cfc2	zero,\$26
+[0-9a-f]+ <[^>]*> 4840d800 	cfc2	zero,\$27
+[0-9a-f]+ <[^>]*> 4840e000 	cfc2	zero,\$28
+[0-9a-f]+ <[^>]*> 4840e800 	cfc2	zero,\$29
+[0-9a-f]+ <[^>]*> 4840f000 	cfc2	zero,\$30
+[0-9a-f]+ <[^>]*> 4840f800 	cfc2	zero,\$31
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp2.s b/gas/testsuite/gas/mips/cp2.s
new file mode 100644
index 0000000000..35a9b669f1
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2.s
@@ -0,0 +1,138 @@
+	.text
+	.set	noreorder
+foo:
+	mtc2	$0, $0
+	mtc2	$0, $1
+	mtc2	$0, $2
+	mtc2	$0, $3
+	mtc2	$0, $4
+	mtc2	$0, $5
+	mtc2	$0, $6
+	mtc2	$0, $7
+	mtc2	$0, $8
+	mtc2	$0, $9
+	mtc2	$0, $10
+	mtc2	$0, $11
+	mtc2	$0, $12
+	mtc2	$0, $13
+	mtc2	$0, $14
+	mtc2	$0, $15
+	mtc2	$0, $16
+	mtc2	$0, $17
+	mtc2	$0, $18
+	mtc2	$0, $19
+	mtc2	$0, $20
+	mtc2	$0, $21
+	mtc2	$0, $22
+	mtc2	$0, $23
+	mtc2	$0, $24
+	mtc2	$0, $25
+	mtc2	$0, $26
+	mtc2	$0, $27
+	mtc2	$0, $28
+	mtc2	$0, $29
+	mtc2	$0, $30
+	mtc2	$0, $31
+
+	mfc2	$0, $0
+	mfc2	$0, $1
+	mfc2	$0, $2
+	mfc2	$0, $3
+	mfc2	$0, $4
+	mfc2	$0, $5
+	mfc2	$0, $6
+	mfc2	$0, $7
+	mfc2	$0, $8
+	mfc2	$0, $9
+	mfc2	$0, $10
+	mfc2	$0, $11
+	mfc2	$0, $12
+	mfc2	$0, $13
+	mfc2	$0, $14
+	mfc2	$0, $15
+	mfc2	$0, $16
+	mfc2	$0, $17
+	mfc2	$0, $18
+	mfc2	$0, $19
+	mfc2	$0, $20
+	mfc2	$0, $21
+	mfc2	$0, $22
+	mfc2	$0, $23
+	mfc2	$0, $24
+	mfc2	$0, $25
+	mfc2	$0, $26
+	mfc2	$0, $27
+	mfc2	$0, $28
+	mfc2	$0, $29
+	mfc2	$0, $30
+	mfc2	$0, $31
+
+	ctc2	$0, $0
+	ctc2	$0, $1
+	ctc2	$0, $2
+	ctc2	$0, $3
+	ctc2	$0, $4
+	ctc2	$0, $5
+	ctc2	$0, $6
+	ctc2	$0, $7
+	ctc2	$0, $8
+	ctc2	$0, $9
+	ctc2	$0, $10
+	ctc2	$0, $11
+	ctc2	$0, $12
+	ctc2	$0, $13
+	ctc2	$0, $14
+	ctc2	$0, $15
+	ctc2	$0, $16
+	ctc2	$0, $17
+	ctc2	$0, $18
+	ctc2	$0, $19
+	ctc2	$0, $20
+	ctc2	$0, $21
+	ctc2	$0, $22
+	ctc2	$0, $23
+	ctc2	$0, $24
+	ctc2	$0, $25
+	ctc2	$0, $26
+	ctc2	$0, $27
+	ctc2	$0, $28
+	ctc2	$0, $29
+	ctc2	$0, $30
+	ctc2	$0, $31
+
+	cfc2	$0, $0
+	cfc2	$0, $1
+	cfc2	$0, $2
+	cfc2	$0, $3
+	cfc2	$0, $4
+	cfc2	$0, $5
+	cfc2	$0, $6
+	cfc2	$0, $7
+	cfc2	$0, $8
+	cfc2	$0, $9
+	cfc2	$0, $10
+	cfc2	$0, $11
+	cfc2	$0, $12
+	cfc2	$0, $13
+	cfc2	$0, $14
+	cfc2	$0, $15
+	cfc2	$0, $16
+	cfc2	$0, $17
+	cfc2	$0, $18
+	cfc2	$0, $19
+	cfc2	$0, $20
+	cfc2	$0, $21
+	cfc2	$0, $22
+	cfc2	$0, $23
+	cfc2	$0, $24
+	cfc2	$0, $25
+	cfc2	$0, $26
+	cfc2	$0, $27
+	cfc2	$0, $28
+	cfc2	$0, $29
+	cfc2	$0, $30
+	cfc2	$0, $31
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/cp2d.d b/gas/testsuite/gas/mips/cp2d.d
new file mode 100644
index 0000000000..034211bbd3
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2d.d
@@ -0,0 +1,72 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 doubleword memory access instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> d8000000 	ldc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> d8010000 	ldc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> d8020000 	ldc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> d8030000 	ldc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> d8040000 	ldc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> d8050000 	ldc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> d8060000 	ldc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> d8070000 	ldc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> d8080000 	ldc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> d8090000 	ldc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> d80a0000 	ldc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> d80b0000 	ldc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> d80c0000 	ldc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> d80d0000 	ldc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> d80e0000 	ldc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> d80f0000 	ldc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> d8100000 	ldc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> d8110000 	ldc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> d8120000 	ldc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> d8130000 	ldc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> d8140000 	ldc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> d8150000 	ldc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> d8160000 	ldc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> d8170000 	ldc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> d8180000 	ldc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> d8190000 	ldc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> d81a0000 	ldc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> d81b0000 	ldc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> d81c0000 	ldc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> d81d0000 	ldc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> d81e0000 	ldc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> d81f0000 	ldc2	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> f8000000 	sdc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> f8010000 	sdc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> f8020000 	sdc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> f8030000 	sdc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> f8040000 	sdc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> f8050000 	sdc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> f8060000 	sdc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> f8070000 	sdc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> f8080000 	sdc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> f8090000 	sdc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> f80a0000 	sdc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> f80b0000 	sdc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> f80c0000 	sdc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> f80d0000 	sdc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> f80e0000 	sdc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> f80f0000 	sdc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> f8100000 	sdc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> f8110000 	sdc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> f8120000 	sdc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> f8130000 	sdc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> f8140000 	sdc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> f8150000 	sdc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> f8160000 	sdc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> f8170000 	sdc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> f8180000 	sdc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> f8190000 	sdc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> f81a0000 	sdc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> f81b0000 	sdc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> f81c0000 	sdc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> f81d0000 	sdc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> f81e0000 	sdc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> f81f0000 	sdc2	\$31,0\(zero\)
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp2d.s b/gas/testsuite/gas/mips/cp2d.s
new file mode 100644
index 0000000000..c6cca98648
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2d.s
@@ -0,0 +1,71 @@
+	.text
+foo:
+	ldc2	$0, 0($0)
+	ldc2	$1, 0($0)
+	ldc2	$2, 0($0)
+	ldc2	$3, 0($0)
+	ldc2	$4, 0($0)
+	ldc2	$5, 0($0)
+	ldc2	$6, 0($0)
+	ldc2	$7, 0($0)
+	ldc2	$8, 0($0)
+	ldc2	$9, 0($0)
+	ldc2	$10, 0($0)
+	ldc2	$11, 0($0)
+	ldc2	$12, 0($0)
+	ldc2	$13, 0($0)
+	ldc2	$14, 0($0)
+	ldc2	$15, 0($0)
+	ldc2	$16, 0($0)
+	ldc2	$17, 0($0)
+	ldc2	$18, 0($0)
+	ldc2	$19, 0($0)
+	ldc2	$20, 0($0)
+	ldc2	$21, 0($0)
+	ldc2	$22, 0($0)
+	ldc2	$23, 0($0)
+	ldc2	$24, 0($0)
+	ldc2	$25, 0($0)
+	ldc2	$26, 0($0)
+	ldc2	$27, 0($0)
+	ldc2	$28, 0($0)
+	ldc2	$29, 0($0)
+	ldc2	$30, 0($0)
+	ldc2	$31, 0($0)
+
+	sdc2	$0, 0($0)
+	sdc2	$1, 0($0)
+	sdc2	$2, 0($0)
+	sdc2	$3, 0($0)
+	sdc2	$4, 0($0)
+	sdc2	$5, 0($0)
+	sdc2	$6, 0($0)
+	sdc2	$7, 0($0)
+	sdc2	$8, 0($0)
+	sdc2	$9, 0($0)
+	sdc2	$10, 0($0)
+	sdc2	$11, 0($0)
+	sdc2	$12, 0($0)
+	sdc2	$13, 0($0)
+	sdc2	$14, 0($0)
+	sdc2	$15, 0($0)
+	sdc2	$16, 0($0)
+	sdc2	$17, 0($0)
+	sdc2	$18, 0($0)
+	sdc2	$19, 0($0)
+	sdc2	$20, 0($0)
+	sdc2	$21, 0($0)
+	sdc2	$22, 0($0)
+	sdc2	$23, 0($0)
+	sdc2	$24, 0($0)
+	sdc2	$25, 0($0)
+	sdc2	$26, 0($0)
+	sdc2	$27, 0($0)
+	sdc2	$28, 0($0)
+	sdc2	$29, 0($0)
+	sdc2	$30, 0($0)
+	sdc2	$31, 0($0)
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/cp2m.d b/gas/testsuite/gas/mips/cp2m.d
new file mode 100644
index 0000000000..9147fb010d
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2m.d
@@ -0,0 +1,72 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 memory access instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> c8000000 	lwc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> c8010000 	lwc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> c8020000 	lwc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> c8030000 	lwc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> c8040000 	lwc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> c8050000 	lwc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> c8060000 	lwc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> c8070000 	lwc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> c8080000 	lwc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> c8090000 	lwc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> c80a0000 	lwc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> c80b0000 	lwc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> c80c0000 	lwc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> c80d0000 	lwc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> c80e0000 	lwc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> c80f0000 	lwc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> c8100000 	lwc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> c8110000 	lwc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> c8120000 	lwc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> c8130000 	lwc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> c8140000 	lwc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> c8150000 	lwc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> c8160000 	lwc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> c8170000 	lwc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> c8180000 	lwc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> c8190000 	lwc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> c81a0000 	lwc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> c81b0000 	lwc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> c81c0000 	lwc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> c81d0000 	lwc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> c81e0000 	lwc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> c81f0000 	lwc2	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> e8000000 	swc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> e8010000 	swc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> e8020000 	swc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> e8030000 	swc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> e8040000 	swc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> e8050000 	swc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> e8060000 	swc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> e8070000 	swc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> e8080000 	swc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> e8090000 	swc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> e80a0000 	swc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> e80b0000 	swc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> e80c0000 	swc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> e80d0000 	swc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> e80e0000 	swc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> e80f0000 	swc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> e8100000 	swc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> e8110000 	swc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> e8120000 	swc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> e8130000 	swc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> e8140000 	swc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> e8150000 	swc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> e8160000 	swc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> e8170000 	swc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> e8180000 	swc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> e8190000 	swc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> e81a0000 	swc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> e81b0000 	swc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> e81c0000 	swc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> e81d0000 	swc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> e81e0000 	swc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> e81f0000 	swc2	\$31,0\(zero\)
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp2m.s b/gas/testsuite/gas/mips/cp2m.s
new file mode 100644
index 0000000000..f540543cf3
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp2m.s
@@ -0,0 +1,72 @@
+	.text
+	.set	noreorder
+foo:
+	lwc2	$0, 0($0)
+	lwc2	$1, 0($0)
+	lwc2	$2, 0($0)
+	lwc2	$3, 0($0)
+	lwc2	$4, 0($0)
+	lwc2	$5, 0($0)
+	lwc2	$6, 0($0)
+	lwc2	$7, 0($0)
+	lwc2	$8, 0($0)
+	lwc2	$9, 0($0)
+	lwc2	$10, 0($0)
+	lwc2	$11, 0($0)
+	lwc2	$12, 0($0)
+	lwc2	$13, 0($0)
+	lwc2	$14, 0($0)
+	lwc2	$15, 0($0)
+	lwc2	$16, 0($0)
+	lwc2	$17, 0($0)
+	lwc2	$18, 0($0)
+	lwc2	$19, 0($0)
+	lwc2	$20, 0($0)
+	lwc2	$21, 0($0)
+	lwc2	$22, 0($0)
+	lwc2	$23, 0($0)
+	lwc2	$24, 0($0)
+	lwc2	$25, 0($0)
+	lwc2	$26, 0($0)
+	lwc2	$27, 0($0)
+	lwc2	$28, 0($0)
+	lwc2	$29, 0($0)
+	lwc2	$30, 0($0)
+	lwc2	$31, 0($0)
+
+	swc2	$0, 0($0)
+	swc2	$1, 0($0)
+	swc2	$2, 0($0)
+	swc2	$3, 0($0)
+	swc2	$4, 0($0)
+	swc2	$5, 0($0)
+	swc2	$6, 0($0)
+	swc2	$7, 0($0)
+	swc2	$8, 0($0)
+	swc2	$9, 0($0)
+	swc2	$10, 0($0)
+	swc2	$11, 0($0)
+	swc2	$12, 0($0)
+	swc2	$13, 0($0)
+	swc2	$14, 0($0)
+	swc2	$15, 0($0)
+	swc2	$16, 0($0)
+	swc2	$17, 0($0)
+	swc2	$18, 0($0)
+	swc2	$19, 0($0)
+	swc2	$20, 0($0)
+	swc2	$21, 0($0)
+	swc2	$22, 0($0)
+	swc2	$23, 0($0)
+	swc2	$24, 0($0)
+	swc2	$25, 0($0)
+	swc2	$26, 0($0)
+	swc2	$27, 0($0)
+	swc2	$28, 0($0)
+	swc2	$29, 0($0)
+	swc2	$30, 0($0)
+	swc2	$31, 0($0)
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/cp3.d b/gas/testsuite/gas/mips/cp3.d
new file mode 100644
index 0000000000..827c92d680
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3.d
@@ -0,0 +1,136 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP3 register move instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 4c800000 	mtc3	zero,\$0
+[0-9a-f]+ <[^>]*> 4c800800 	mtc3	zero,\$1
+[0-9a-f]+ <[^>]*> 4c801000 	mtc3	zero,\$2
+[0-9a-f]+ <[^>]*> 4c801800 	mtc3	zero,\$3
+[0-9a-f]+ <[^>]*> 4c802000 	mtc3	zero,\$4
+[0-9a-f]+ <[^>]*> 4c802800 	mtc3	zero,\$5
+[0-9a-f]+ <[^>]*> 4c803000 	mtc3	zero,\$6
+[0-9a-f]+ <[^>]*> 4c803800 	mtc3	zero,\$7
+[0-9a-f]+ <[^>]*> 4c804000 	mtc3	zero,\$8
+[0-9a-f]+ <[^>]*> 4c804800 	mtc3	zero,\$9
+[0-9a-f]+ <[^>]*> 4c805000 	mtc3	zero,\$10
+[0-9a-f]+ <[^>]*> 4c805800 	mtc3	zero,\$11
+[0-9a-f]+ <[^>]*> 4c806000 	mtc3	zero,\$12
+[0-9a-f]+ <[^>]*> 4c806800 	mtc3	zero,\$13
+[0-9a-f]+ <[^>]*> 4c807000 	mtc3	zero,\$14
+[0-9a-f]+ <[^>]*> 4c807800 	mtc3	zero,\$15
+[0-9a-f]+ <[^>]*> 4c808000 	mtc3	zero,\$16
+[0-9a-f]+ <[^>]*> 4c808800 	mtc3	zero,\$17
+[0-9a-f]+ <[^>]*> 4c809000 	mtc3	zero,\$18
+[0-9a-f]+ <[^>]*> 4c809800 	mtc3	zero,\$19
+[0-9a-f]+ <[^>]*> 4c80a000 	mtc3	zero,\$20
+[0-9a-f]+ <[^>]*> 4c80a800 	mtc3	zero,\$21
+[0-9a-f]+ <[^>]*> 4c80b000 	mtc3	zero,\$22
+[0-9a-f]+ <[^>]*> 4c80b800 	mtc3	zero,\$23
+[0-9a-f]+ <[^>]*> 4c80c000 	mtc3	zero,\$24
+[0-9a-f]+ <[^>]*> 4c80c800 	mtc3	zero,\$25
+[0-9a-f]+ <[^>]*> 4c80d000 	mtc3	zero,\$26
+[0-9a-f]+ <[^>]*> 4c80d800 	mtc3	zero,\$27
+[0-9a-f]+ <[^>]*> 4c80e000 	mtc3	zero,\$28
+[0-9a-f]+ <[^>]*> 4c80e800 	mtc3	zero,\$29
+[0-9a-f]+ <[^>]*> 4c80f000 	mtc3	zero,\$30
+[0-9a-f]+ <[^>]*> 4c80f800 	mtc3	zero,\$31
+[0-9a-f]+ <[^>]*> 4c000000 	mfc3	zero,\$0
+[0-9a-f]+ <[^>]*> 4c000800 	mfc3	zero,\$1
+[0-9a-f]+ <[^>]*> 4c001000 	mfc3	zero,\$2
+[0-9a-f]+ <[^>]*> 4c001800 	mfc3	zero,\$3
+[0-9a-f]+ <[^>]*> 4c002000 	mfc3	zero,\$4
+[0-9a-f]+ <[^>]*> 4c002800 	mfc3	zero,\$5
+[0-9a-f]+ <[^>]*> 4c003000 	mfc3	zero,\$6
+[0-9a-f]+ <[^>]*> 4c003800 	mfc3	zero,\$7
+[0-9a-f]+ <[^>]*> 4c004000 	mfc3	zero,\$8
+[0-9a-f]+ <[^>]*> 4c004800 	mfc3	zero,\$9
+[0-9a-f]+ <[^>]*> 4c005000 	mfc3	zero,\$10
+[0-9a-f]+ <[^>]*> 4c005800 	mfc3	zero,\$11
+[0-9a-f]+ <[^>]*> 4c006000 	mfc3	zero,\$12
+[0-9a-f]+ <[^>]*> 4c006800 	mfc3	zero,\$13
+[0-9a-f]+ <[^>]*> 4c007000 	mfc3	zero,\$14
+[0-9a-f]+ <[^>]*> 4c007800 	mfc3	zero,\$15
+[0-9a-f]+ <[^>]*> 4c008000 	mfc3	zero,\$16
+[0-9a-f]+ <[^>]*> 4c008800 	mfc3	zero,\$17
+[0-9a-f]+ <[^>]*> 4c009000 	mfc3	zero,\$18
+[0-9a-f]+ <[^>]*> 4c009800 	mfc3	zero,\$19
+[0-9a-f]+ <[^>]*> 4c00a000 	mfc3	zero,\$20
+[0-9a-f]+ <[^>]*> 4c00a800 	mfc3	zero,\$21
+[0-9a-f]+ <[^>]*> 4c00b000 	mfc3	zero,\$22
+[0-9a-f]+ <[^>]*> 4c00b800 	mfc3	zero,\$23
+[0-9a-f]+ <[^>]*> 4c00c000 	mfc3	zero,\$24
+[0-9a-f]+ <[^>]*> 4c00c800 	mfc3	zero,\$25
+[0-9a-f]+ <[^>]*> 4c00d000 	mfc3	zero,\$26
+[0-9a-f]+ <[^>]*> 4c00d800 	mfc3	zero,\$27
+[0-9a-f]+ <[^>]*> 4c00e000 	mfc3	zero,\$28
+[0-9a-f]+ <[^>]*> 4c00e800 	mfc3	zero,\$29
+[0-9a-f]+ <[^>]*> 4c00f000 	mfc3	zero,\$30
+[0-9a-f]+ <[^>]*> 4c00f800 	mfc3	zero,\$31
+[0-9a-f]+ <[^>]*> 4cc00000 	ctc3	zero,\$0
+[0-9a-f]+ <[^>]*> 4cc00800 	ctc3	zero,\$1
+[0-9a-f]+ <[^>]*> 4cc01000 	ctc3	zero,\$2
+[0-9a-f]+ <[^>]*> 4cc01800 	ctc3	zero,\$3
+[0-9a-f]+ <[^>]*> 4cc02000 	ctc3	zero,\$4
+[0-9a-f]+ <[^>]*> 4cc02800 	ctc3	zero,\$5
+[0-9a-f]+ <[^>]*> 4cc03000 	ctc3	zero,\$6
+[0-9a-f]+ <[^>]*> 4cc03800 	ctc3	zero,\$7
+[0-9a-f]+ <[^>]*> 4cc04000 	ctc3	zero,\$8
+[0-9a-f]+ <[^>]*> 4cc04800 	ctc3	zero,\$9
+[0-9a-f]+ <[^>]*> 4cc05000 	ctc3	zero,\$10
+[0-9a-f]+ <[^>]*> 4cc05800 	ctc3	zero,\$11
+[0-9a-f]+ <[^>]*> 4cc06000 	ctc3	zero,\$12
+[0-9a-f]+ <[^>]*> 4cc06800 	ctc3	zero,\$13
+[0-9a-f]+ <[^>]*> 4cc07000 	ctc3	zero,\$14
+[0-9a-f]+ <[^>]*> 4cc07800 	ctc3	zero,\$15
+[0-9a-f]+ <[^>]*> 4cc08000 	ctc3	zero,\$16
+[0-9a-f]+ <[^>]*> 4cc08800 	ctc3	zero,\$17
+[0-9a-f]+ <[^>]*> 4cc09000 	ctc3	zero,\$18
+[0-9a-f]+ <[^>]*> 4cc09800 	ctc3	zero,\$19
+[0-9a-f]+ <[^>]*> 4cc0a000 	ctc3	zero,\$20
+[0-9a-f]+ <[^>]*> 4cc0a800 	ctc3	zero,\$21
+[0-9a-f]+ <[^>]*> 4cc0b000 	ctc3	zero,\$22
+[0-9a-f]+ <[^>]*> 4cc0b800 	ctc3	zero,\$23
+[0-9a-f]+ <[^>]*> 4cc0c000 	ctc3	zero,\$24
+[0-9a-f]+ <[^>]*> 4cc0c800 	ctc3	zero,\$25
+[0-9a-f]+ <[^>]*> 4cc0d000 	ctc3	zero,\$26
+[0-9a-f]+ <[^>]*> 4cc0d800 	ctc3	zero,\$27
+[0-9a-f]+ <[^>]*> 4cc0e000 	ctc3	zero,\$28
+[0-9a-f]+ <[^>]*> 4cc0e800 	ctc3	zero,\$29
+[0-9a-f]+ <[^>]*> 4cc0f000 	ctc3	zero,\$30
+[0-9a-f]+ <[^>]*> 4cc0f800 	ctc3	zero,\$31
+[0-9a-f]+ <[^>]*> 4c400000 	cfc3	zero,\$0
+[0-9a-f]+ <[^>]*> 4c400800 	cfc3	zero,\$1
+[0-9a-f]+ <[^>]*> 4c401000 	cfc3	zero,\$2
+[0-9a-f]+ <[^>]*> 4c401800 	cfc3	zero,\$3
+[0-9a-f]+ <[^>]*> 4c402000 	cfc3	zero,\$4
+[0-9a-f]+ <[^>]*> 4c402800 	cfc3	zero,\$5
+[0-9a-f]+ <[^>]*> 4c403000 	cfc3	zero,\$6
+[0-9a-f]+ <[^>]*> 4c403800 	cfc3	zero,\$7
+[0-9a-f]+ <[^>]*> 4c404000 	cfc3	zero,\$8
+[0-9a-f]+ <[^>]*> 4c404800 	cfc3	zero,\$9
+[0-9a-f]+ <[^>]*> 4c405000 	cfc3	zero,\$10
+[0-9a-f]+ <[^>]*> 4c405800 	cfc3	zero,\$11
+[0-9a-f]+ <[^>]*> 4c406000 	cfc3	zero,\$12
+[0-9a-f]+ <[^>]*> 4c406800 	cfc3	zero,\$13
+[0-9a-f]+ <[^>]*> 4c407000 	cfc3	zero,\$14
+[0-9a-f]+ <[^>]*> 4c407800 	cfc3	zero,\$15
+[0-9a-f]+ <[^>]*> 4c408000 	cfc3	zero,\$16
+[0-9a-f]+ <[^>]*> 4c408800 	cfc3	zero,\$17
+[0-9a-f]+ <[^>]*> 4c409000 	cfc3	zero,\$18
+[0-9a-f]+ <[^>]*> 4c409800 	cfc3	zero,\$19
+[0-9a-f]+ <[^>]*> 4c40a000 	cfc3	zero,\$20
+[0-9a-f]+ <[^>]*> 4c40a800 	cfc3	zero,\$21
+[0-9a-f]+ <[^>]*> 4c40b000 	cfc3	zero,\$22
+[0-9a-f]+ <[^>]*> 4c40b800 	cfc3	zero,\$23
+[0-9a-f]+ <[^>]*> 4c40c000 	cfc3	zero,\$24
+[0-9a-f]+ <[^>]*> 4c40c800 	cfc3	zero,\$25
+[0-9a-f]+ <[^>]*> 4c40d000 	cfc3	zero,\$26
+[0-9a-f]+ <[^>]*> 4c40d800 	cfc3	zero,\$27
+[0-9a-f]+ <[^>]*> 4c40e000 	cfc3	zero,\$28
+[0-9a-f]+ <[^>]*> 4c40e800 	cfc3	zero,\$29
+[0-9a-f]+ <[^>]*> 4c40f000 	cfc3	zero,\$30
+[0-9a-f]+ <[^>]*> 4c40f800 	cfc3	zero,\$31
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp3.s b/gas/testsuite/gas/mips/cp3.s
new file mode 100644
index 0000000000..5fa8504ea8
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3.s
@@ -0,0 +1,138 @@
+	.text
+	.set	noreorder
+foo:
+	mtc3	$0, $0
+	mtc3	$0, $1
+	mtc3	$0, $2
+	mtc3	$0, $3
+	mtc3	$0, $4
+	mtc3	$0, $5
+	mtc3	$0, $6
+	mtc3	$0, $7
+	mtc3	$0, $8
+	mtc3	$0, $9
+	mtc3	$0, $10
+	mtc3	$0, $11
+	mtc3	$0, $12
+	mtc3	$0, $13
+	mtc3	$0, $14
+	mtc3	$0, $15
+	mtc3	$0, $16
+	mtc3	$0, $17
+	mtc3	$0, $18
+	mtc3	$0, $19
+	mtc3	$0, $20
+	mtc3	$0, $21
+	mtc3	$0, $22
+	mtc3	$0, $23
+	mtc3	$0, $24
+	mtc3	$0, $25
+	mtc3	$0, $26
+	mtc3	$0, $27
+	mtc3	$0, $28
+	mtc3	$0, $29
+	mtc3	$0, $30
+	mtc3	$0, $31
+
+	mfc3	$0, $0
+	mfc3	$0, $1
+	mfc3	$0, $2
+	mfc3	$0, $3
+	mfc3	$0, $4
+	mfc3	$0, $5
+	mfc3	$0, $6
+	mfc3	$0, $7
+	mfc3	$0, $8
+	mfc3	$0, $9
+	mfc3	$0, $10
+	mfc3	$0, $11
+	mfc3	$0, $12
+	mfc3	$0, $13
+	mfc3	$0, $14
+	mfc3	$0, $15
+	mfc3	$0, $16
+	mfc3	$0, $17
+	mfc3	$0, $18
+	mfc3	$0, $19
+	mfc3	$0, $20
+	mfc3	$0, $21
+	mfc3	$0, $22
+	mfc3	$0, $23
+	mfc3	$0, $24
+	mfc3	$0, $25
+	mfc3	$0, $26
+	mfc3	$0, $27
+	mfc3	$0, $28
+	mfc3	$0, $29
+	mfc3	$0, $30
+	mfc3	$0, $31
+
+	ctc3	$0, $0
+	ctc3	$0, $1
+	ctc3	$0, $2
+	ctc3	$0, $3
+	ctc3	$0, $4
+	ctc3	$0, $5
+	ctc3	$0, $6
+	ctc3	$0, $7
+	ctc3	$0, $8
+	ctc3	$0, $9
+	ctc3	$0, $10
+	ctc3	$0, $11
+	ctc3	$0, $12
+	ctc3	$0, $13
+	ctc3	$0, $14
+	ctc3	$0, $15
+	ctc3	$0, $16
+	ctc3	$0, $17
+	ctc3	$0, $18
+	ctc3	$0, $19
+	ctc3	$0, $20
+	ctc3	$0, $21
+	ctc3	$0, $22
+	ctc3	$0, $23
+	ctc3	$0, $24
+	ctc3	$0, $25
+	ctc3	$0, $26
+	ctc3	$0, $27
+	ctc3	$0, $28
+	ctc3	$0, $29
+	ctc3	$0, $30
+	ctc3	$0, $31
+
+	cfc3	$0, $0
+	cfc3	$0, $1
+	cfc3	$0, $2
+	cfc3	$0, $3
+	cfc3	$0, $4
+	cfc3	$0, $5
+	cfc3	$0, $6
+	cfc3	$0, $7
+	cfc3	$0, $8
+	cfc3	$0, $9
+	cfc3	$0, $10
+	cfc3	$0, $11
+	cfc3	$0, $12
+	cfc3	$0, $13
+	cfc3	$0, $14
+	cfc3	$0, $15
+	cfc3	$0, $16
+	cfc3	$0, $17
+	cfc3	$0, $18
+	cfc3	$0, $19
+	cfc3	$0, $20
+	cfc3	$0, $21
+	cfc3	$0, $22
+	cfc3	$0, $23
+	cfc3	$0, $24
+	cfc3	$0, $25
+	cfc3	$0, $26
+	cfc3	$0, $27
+	cfc3	$0, $28
+	cfc3	$0, $29
+	cfc3	$0, $30
+	cfc3	$0, $31
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/cp3d.d b/gas/testsuite/gas/mips/cp3d.d
new file mode 100644
index 0000000000..7c9309374b
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3d.d
@@ -0,0 +1,72 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP3 doubleword memory access instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> dc000000 	ldc3	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> dc010000 	ldc3	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> dc020000 	ldc3	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> dc030000 	ldc3	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> dc040000 	ldc3	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> dc050000 	ldc3	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> dc060000 	ldc3	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> dc070000 	ldc3	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> dc080000 	ldc3	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> dc090000 	ldc3	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> dc0a0000 	ldc3	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> dc0b0000 	ldc3	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> dc0c0000 	ldc3	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> dc0d0000 	ldc3	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> dc0e0000 	ldc3	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> dc0f0000 	ldc3	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> dc100000 	ldc3	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> dc110000 	ldc3	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> dc120000 	ldc3	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> dc130000 	ldc3	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> dc140000 	ldc3	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> dc150000 	ldc3	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> dc160000 	ldc3	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> dc170000 	ldc3	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> dc180000 	ldc3	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> dc190000 	ldc3	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> dc1a0000 	ldc3	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> dc1b0000 	ldc3	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> dc1c0000 	ldc3	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> dc1d0000 	ldc3	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> dc1e0000 	ldc3	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> dc1f0000 	ldc3	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> fc000000 	sdc3	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> fc010000 	sdc3	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> fc020000 	sdc3	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> fc030000 	sdc3	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> fc040000 	sdc3	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> fc050000 	sdc3	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> fc060000 	sdc3	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> fc070000 	sdc3	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> fc080000 	sdc3	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> fc090000 	sdc3	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> fc0a0000 	sdc3	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> fc0b0000 	sdc3	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> fc0c0000 	sdc3	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> fc0d0000 	sdc3	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> fc0e0000 	sdc3	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> fc0f0000 	sdc3	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> fc100000 	sdc3	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> fc110000 	sdc3	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> fc120000 	sdc3	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> fc130000 	sdc3	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> fc140000 	sdc3	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> fc150000 	sdc3	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> fc160000 	sdc3	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> fc170000 	sdc3	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> fc180000 	sdc3	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> fc190000 	sdc3	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> fc1a0000 	sdc3	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> fc1b0000 	sdc3	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> fc1c0000 	sdc3	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> fc1d0000 	sdc3	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> fc1e0000 	sdc3	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> fc1f0000 	sdc3	\$31,0\(zero\)
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp3d.s b/gas/testsuite/gas/mips/cp3d.s
new file mode 100644
index 0000000000..f4816ca098
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3d.s
@@ -0,0 +1,72 @@
+	.text
+	.set	noreorder
+foo:
+	ldc3	$0, 0($0)
+	ldc3	$1, 0($0)
+	ldc3	$2, 0($0)
+	ldc3	$3, 0($0)
+	ldc3	$4, 0($0)
+	ldc3	$5, 0($0)
+	ldc3	$6, 0($0)
+	ldc3	$7, 0($0)
+	ldc3	$8, 0($0)
+	ldc3	$9, 0($0)
+	ldc3	$10, 0($0)
+	ldc3	$11, 0($0)
+	ldc3	$12, 0($0)
+	ldc3	$13, 0($0)
+	ldc3	$14, 0($0)
+	ldc3	$15, 0($0)
+	ldc3	$16, 0($0)
+	ldc3	$17, 0($0)
+	ldc3	$18, 0($0)
+	ldc3	$19, 0($0)
+	ldc3	$20, 0($0)
+	ldc3	$21, 0($0)
+	ldc3	$22, 0($0)
+	ldc3	$23, 0($0)
+	ldc3	$24, 0($0)
+	ldc3	$25, 0($0)
+	ldc3	$26, 0($0)
+	ldc3	$27, 0($0)
+	ldc3	$28, 0($0)
+	ldc3	$29, 0($0)
+	ldc3	$30, 0($0)
+	ldc3	$31, 0($0)
+
+	sdc3	$0, 0($0)
+	sdc3	$1, 0($0)
+	sdc3	$2, 0($0)
+	sdc3	$3, 0($0)
+	sdc3	$4, 0($0)
+	sdc3	$5, 0($0)
+	sdc3	$6, 0($0)
+	sdc3	$7, 0($0)
+	sdc3	$8, 0($0)
+	sdc3	$9, 0($0)
+	sdc3	$10, 0($0)
+	sdc3	$11, 0($0)
+	sdc3	$12, 0($0)
+	sdc3	$13, 0($0)
+	sdc3	$14, 0($0)
+	sdc3	$15, 0($0)
+	sdc3	$16, 0($0)
+	sdc3	$17, 0($0)
+	sdc3	$18, 0($0)
+	sdc3	$19, 0($0)
+	sdc3	$20, 0($0)
+	sdc3	$21, 0($0)
+	sdc3	$22, 0($0)
+	sdc3	$23, 0($0)
+	sdc3	$24, 0($0)
+	sdc3	$25, 0($0)
+	sdc3	$26, 0($0)
+	sdc3	$27, 0($0)
+	sdc3	$28, 0($0)
+	sdc3	$29, 0($0)
+	sdc3	$30, 0($0)
+	sdc3	$31, 0($0)
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/cp3m.d b/gas/testsuite/gas/mips/cp3m.d
new file mode 100644
index 0000000000..094d6f6f0e
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3m.d
@@ -0,0 +1,72 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP3 memory access instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> cc000000 	lwc3	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> cc010000 	lwc3	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> cc020000 	lwc3	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> cc030000 	lwc3	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> cc040000 	lwc3	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> cc050000 	lwc3	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> cc060000 	lwc3	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> cc070000 	lwc3	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> cc080000 	lwc3	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> cc090000 	lwc3	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> cc0a0000 	lwc3	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> cc0b0000 	lwc3	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> cc0c0000 	lwc3	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> cc0d0000 	lwc3	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> cc0e0000 	lwc3	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> cc0f0000 	lwc3	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> cc100000 	lwc3	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> cc110000 	lwc3	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> cc120000 	lwc3	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> cc130000 	lwc3	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> cc140000 	lwc3	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> cc150000 	lwc3	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> cc160000 	lwc3	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> cc170000 	lwc3	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> cc180000 	lwc3	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> cc190000 	lwc3	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> cc1a0000 	lwc3	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> cc1b0000 	lwc3	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> cc1c0000 	lwc3	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> cc1d0000 	lwc3	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> cc1e0000 	lwc3	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> cc1f0000 	lwc3	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> ec000000 	swc3	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> ec010000 	swc3	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> ec020000 	swc3	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> ec030000 	swc3	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> ec040000 	swc3	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> ec050000 	swc3	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> ec060000 	swc3	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> ec070000 	swc3	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> ec080000 	swc3	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> ec090000 	swc3	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> ec0a0000 	swc3	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> ec0b0000 	swc3	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> ec0c0000 	swc3	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> ec0d0000 	swc3	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> ec0e0000 	swc3	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> ec0f0000 	swc3	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> ec100000 	swc3	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> ec110000 	swc3	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> ec120000 	swc3	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> ec130000 	swc3	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> ec140000 	swc3	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> ec150000 	swc3	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> ec160000 	swc3	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> ec170000 	swc3	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> ec180000 	swc3	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> ec190000 	swc3	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> ec1a0000 	swc3	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> ec1b0000 	swc3	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> ec1c0000 	swc3	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> ec1d0000 	swc3	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> ec1e0000 	swc3	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> ec1f0000 	swc3	\$31,0\(zero\)
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp3m.s b/gas/testsuite/gas/mips/cp3m.s
new file mode 100644
index 0000000000..0b23db7cd7
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp3m.s
@@ -0,0 +1,72 @@
+	.text
+	.set	noreorder
+foo:
+	lwc3	$0, 0($0)
+	lwc3	$1, 0($0)
+	lwc3	$2, 0($0)
+	lwc3	$3, 0($0)
+	lwc3	$4, 0($0)
+	lwc3	$5, 0($0)
+	lwc3	$6, 0($0)
+	lwc3	$7, 0($0)
+	lwc3	$8, 0($0)
+	lwc3	$9, 0($0)
+	lwc3	$10, 0($0)
+	lwc3	$11, 0($0)
+	lwc3	$12, 0($0)
+	lwc3	$13, 0($0)
+	lwc3	$14, 0($0)
+	lwc3	$15, 0($0)
+	lwc3	$16, 0($0)
+	lwc3	$17, 0($0)
+	lwc3	$18, 0($0)
+	lwc3	$19, 0($0)
+	lwc3	$20, 0($0)
+	lwc3	$21, 0($0)
+	lwc3	$22, 0($0)
+	lwc3	$23, 0($0)
+	lwc3	$24, 0($0)
+	lwc3	$25, 0($0)
+	lwc3	$26, 0($0)
+	lwc3	$27, 0($0)
+	lwc3	$28, 0($0)
+	lwc3	$29, 0($0)
+	lwc3	$30, 0($0)
+	lwc3	$31, 0($0)
+
+	swc3	$0, 0($0)
+	swc3	$1, 0($0)
+	swc3	$2, 0($0)
+	swc3	$3, 0($0)
+	swc3	$4, 0($0)
+	swc3	$5, 0($0)
+	swc3	$6, 0($0)
+	swc3	$7, 0($0)
+	swc3	$8, 0($0)
+	swc3	$9, 0($0)
+	swc3	$10, 0($0)
+	swc3	$11, 0($0)
+	swc3	$12, 0($0)
+	swc3	$13, 0($0)
+	swc3	$14, 0($0)
+	swc3	$15, 0($0)
+	swc3	$16, 0($0)
+	swc3	$17, 0($0)
+	swc3	$18, 0($0)
+	swc3	$19, 0($0)
+	swc3	$20, 0($0)
+	swc3	$21, 0($0)
+	swc3	$22, 0($0)
+	swc3	$23, 0($0)
+	swc3	$24, 0($0)
+	swc3	$25, 0($0)
+	swc3	$26, 0($0)
+	swc3	$27, 0($0)
+	swc3	$28, 0($0)
+	swc3	$29, 0($0)
+	swc3	$30, 0($0)
+	swc3	$31, 0($0)
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/micromips@cp2-64.d b/gas/testsuite/gas/mips/micromips@cp2-64.d
new file mode 100644
index 0000000000..133883e252
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips@cp2-64.d
@@ -0,0 +1,73 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 64-bit move instructions
+#as: -32
+#source: cp2-64\.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 0000 7d3c 	dmtc2	zero,\$0
+[0-9a-f]+ <[^>]*> 0001 7d3c 	dmtc2	zero,\$1
+[0-9a-f]+ <[^>]*> 0002 7d3c 	dmtc2	zero,\$2
+[0-9a-f]+ <[^>]*> 0003 7d3c 	dmtc2	zero,\$3
+[0-9a-f]+ <[^>]*> 0004 7d3c 	dmtc2	zero,\$4
+[0-9a-f]+ <[^>]*> 0005 7d3c 	dmtc2	zero,\$5
+[0-9a-f]+ <[^>]*> 0006 7d3c 	dmtc2	zero,\$6
+[0-9a-f]+ <[^>]*> 0007 7d3c 	dmtc2	zero,\$7
+[0-9a-f]+ <[^>]*> 0008 7d3c 	dmtc2	zero,\$8
+[0-9a-f]+ <[^>]*> 0009 7d3c 	dmtc2	zero,\$9
+[0-9a-f]+ <[^>]*> 000a 7d3c 	dmtc2	zero,\$10
+[0-9a-f]+ <[^>]*> 000b 7d3c 	dmtc2	zero,\$11
+[0-9a-f]+ <[^>]*> 000c 7d3c 	dmtc2	zero,\$12
+[0-9a-f]+ <[^>]*> 000d 7d3c 	dmtc2	zero,\$13
+[0-9a-f]+ <[^>]*> 000e 7d3c 	dmtc2	zero,\$14
+[0-9a-f]+ <[^>]*> 000f 7d3c 	dmtc2	zero,\$15
+[0-9a-f]+ <[^>]*> 0010 7d3c 	dmtc2	zero,\$16
+[0-9a-f]+ <[^>]*> 0011 7d3c 	dmtc2	zero,\$17
+[0-9a-f]+ <[^>]*> 0012 7d3c 	dmtc2	zero,\$18
+[0-9a-f]+ <[^>]*> 0013 7d3c 	dmtc2	zero,\$19
+[0-9a-f]+ <[^>]*> 0014 7d3c 	dmtc2	zero,\$20
+[0-9a-f]+ <[^>]*> 0015 7d3c 	dmtc2	zero,\$21
+[0-9a-f]+ <[^>]*> 0016 7d3c 	dmtc2	zero,\$22
+[0-9a-f]+ <[^>]*> 0017 7d3c 	dmtc2	zero,\$23
+[0-9a-f]+ <[^>]*> 0018 7d3c 	dmtc2	zero,\$24
+[0-9a-f]+ <[^>]*> 0019 7d3c 	dmtc2	zero,\$25
+[0-9a-f]+ <[^>]*> 001a 7d3c 	dmtc2	zero,\$26
+[0-9a-f]+ <[^>]*> 001b 7d3c 	dmtc2	zero,\$27
+[0-9a-f]+ <[^>]*> 001c 7d3c 	dmtc2	zero,\$28
+[0-9a-f]+ <[^>]*> 001d 7d3c 	dmtc2	zero,\$29
+[0-9a-f]+ <[^>]*> 001e 7d3c 	dmtc2	zero,\$30
+[0-9a-f]+ <[^>]*> 001f 7d3c 	dmtc2	zero,\$31
+[0-9a-f]+ <[^>]*> 0000 6d3c 	dmfc2	zero,\$0
+[0-9a-f]+ <[^>]*> 0001 6d3c 	dmfc2	zero,\$1
+[0-9a-f]+ <[^>]*> 0002 6d3c 	dmfc2	zero,\$2
+[0-9a-f]+ <[^>]*> 0003 6d3c 	dmfc2	zero,\$3
+[0-9a-f]+ <[^>]*> 0004 6d3c 	dmfc2	zero,\$4
+[0-9a-f]+ <[^>]*> 0005 6d3c 	dmfc2	zero,\$5
+[0-9a-f]+ <[^>]*> 0006 6d3c 	dmfc2	zero,\$6
+[0-9a-f]+ <[^>]*> 0007 6d3c 	dmfc2	zero,\$7
+[0-9a-f]+ <[^>]*> 0008 6d3c 	dmfc2	zero,\$8
+[0-9a-f]+ <[^>]*> 0009 6d3c 	dmfc2	zero,\$9
+[0-9a-f]+ <[^>]*> 000a 6d3c 	dmfc2	zero,\$10
+[0-9a-f]+ <[^>]*> 000b 6d3c 	dmfc2	zero,\$11
+[0-9a-f]+ <[^>]*> 000c 6d3c 	dmfc2	zero,\$12
+[0-9a-f]+ <[^>]*> 000d 6d3c 	dmfc2	zero,\$13
+[0-9a-f]+ <[^>]*> 000e 6d3c 	dmfc2	zero,\$14
+[0-9a-f]+ <[^>]*> 000f 6d3c 	dmfc2	zero,\$15
+[0-9a-f]+ <[^>]*> 0010 6d3c 	dmfc2	zero,\$16
+[0-9a-f]+ <[^>]*> 0011 6d3c 	dmfc2	zero,\$17
+[0-9a-f]+ <[^>]*> 0012 6d3c 	dmfc2	zero,\$18
+[0-9a-f]+ <[^>]*> 0013 6d3c 	dmfc2	zero,\$19
+[0-9a-f]+ <[^>]*> 0014 6d3c 	dmfc2	zero,\$20
+[0-9a-f]+ <[^>]*> 0015 6d3c 	dmfc2	zero,\$21
+[0-9a-f]+ <[^>]*> 0016 6d3c 	dmfc2	zero,\$22
+[0-9a-f]+ <[^>]*> 0017 6d3c 	dmfc2	zero,\$23
+[0-9a-f]+ <[^>]*> 0018 6d3c 	dmfc2	zero,\$24
+[0-9a-f]+ <[^>]*> 0019 6d3c 	dmfc2	zero,\$25
+[0-9a-f]+ <[^>]*> 001a 6d3c 	dmfc2	zero,\$26
+[0-9a-f]+ <[^>]*> 001b 6d3c 	dmfc2	zero,\$27
+[0-9a-f]+ <[^>]*> 001c 6d3c 	dmfc2	zero,\$28
+[0-9a-f]+ <[^>]*> 001d 6d3c 	dmfc2	zero,\$29
+[0-9a-f]+ <[^>]*> 001e 6d3c 	dmfc2	zero,\$30
+[0-9a-f]+ <[^>]*> 001f 6d3c 	dmfc2	zero,\$31
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips@cp2.d b/gas/testsuite/gas/mips/micromips@cp2.d
new file mode 100644
index 0000000000..b43787ef4f
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips@cp2.d
@@ -0,0 +1,137 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 register move instructions
+#as: -32
+#source: cp2.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 0000 5d3c 	mtc2	zero,\$0
+[0-9a-f]+ <[^>]*> 0001 5d3c 	mtc2	zero,\$1
+[0-9a-f]+ <[^>]*> 0002 5d3c 	mtc2	zero,\$2
+[0-9a-f]+ <[^>]*> 0003 5d3c 	mtc2	zero,\$3
+[0-9a-f]+ <[^>]*> 0004 5d3c 	mtc2	zero,\$4
+[0-9a-f]+ <[^>]*> 0005 5d3c 	mtc2	zero,\$5
+[0-9a-f]+ <[^>]*> 0006 5d3c 	mtc2	zero,\$6
+[0-9a-f]+ <[^>]*> 0007 5d3c 	mtc2	zero,\$7
+[0-9a-f]+ <[^>]*> 0008 5d3c 	mtc2	zero,\$8
+[0-9a-f]+ <[^>]*> 0009 5d3c 	mtc2	zero,\$9
+[0-9a-f]+ <[^>]*> 000a 5d3c 	mtc2	zero,\$10
+[0-9a-f]+ <[^>]*> 000b 5d3c 	mtc2	zero,\$11
+[0-9a-f]+ <[^>]*> 000c 5d3c 	mtc2	zero,\$12
+[0-9a-f]+ <[^>]*> 000d 5d3c 	mtc2	zero,\$13
+[0-9a-f]+ <[^>]*> 000e 5d3c 	mtc2	zero,\$14
+[0-9a-f]+ <[^>]*> 000f 5d3c 	mtc2	zero,\$15
+[0-9a-f]+ <[^>]*> 0010 5d3c 	mtc2	zero,\$16
+[0-9a-f]+ <[^>]*> 0011 5d3c 	mtc2	zero,\$17
+[0-9a-f]+ <[^>]*> 0012 5d3c 	mtc2	zero,\$18
+[0-9a-f]+ <[^>]*> 0013 5d3c 	mtc2	zero,\$19
+[0-9a-f]+ <[^>]*> 0014 5d3c 	mtc2	zero,\$20
+[0-9a-f]+ <[^>]*> 0015 5d3c 	mtc2	zero,\$21
+[0-9a-f]+ <[^>]*> 0016 5d3c 	mtc2	zero,\$22
+[0-9a-f]+ <[^>]*> 0017 5d3c 	mtc2	zero,\$23
+[0-9a-f]+ <[^>]*> 0018 5d3c 	mtc2	zero,\$24
+[0-9a-f]+ <[^>]*> 0019 5d3c 	mtc2	zero,\$25
+[0-9a-f]+ <[^>]*> 001a 5d3c 	mtc2	zero,\$26
+[0-9a-f]+ <[^>]*> 001b 5d3c 	mtc2	zero,\$27
+[0-9a-f]+ <[^>]*> 001c 5d3c 	mtc2	zero,\$28
+[0-9a-f]+ <[^>]*> 001d 5d3c 	mtc2	zero,\$29
+[0-9a-f]+ <[^>]*> 001e 5d3c 	mtc2	zero,\$30
+[0-9a-f]+ <[^>]*> 001f 5d3c 	mtc2	zero,\$31
+[0-9a-f]+ <[^>]*> 0000 4d3c 	mfc2	zero,\$0
+[0-9a-f]+ <[^>]*> 0001 4d3c 	mfc2	zero,\$1
+[0-9a-f]+ <[^>]*> 0002 4d3c 	mfc2	zero,\$2
+[0-9a-f]+ <[^>]*> 0003 4d3c 	mfc2	zero,\$3
+[0-9a-f]+ <[^>]*> 0004 4d3c 	mfc2	zero,\$4
+[0-9a-f]+ <[^>]*> 0005 4d3c 	mfc2	zero,\$5
+[0-9a-f]+ <[^>]*> 0006 4d3c 	mfc2	zero,\$6
+[0-9a-f]+ <[^>]*> 0007 4d3c 	mfc2	zero,\$7
+[0-9a-f]+ <[^>]*> 0008 4d3c 	mfc2	zero,\$8
+[0-9a-f]+ <[^>]*> 0009 4d3c 	mfc2	zero,\$9
+[0-9a-f]+ <[^>]*> 000a 4d3c 	mfc2	zero,\$10
+[0-9a-f]+ <[^>]*> 000b 4d3c 	mfc2	zero,\$11
+[0-9a-f]+ <[^>]*> 000c 4d3c 	mfc2	zero,\$12
+[0-9a-f]+ <[^>]*> 000d 4d3c 	mfc2	zero,\$13
+[0-9a-f]+ <[^>]*> 000e 4d3c 	mfc2	zero,\$14
+[0-9a-f]+ <[^>]*> 000f 4d3c 	mfc2	zero,\$15
+[0-9a-f]+ <[^>]*> 0010 4d3c 	mfc2	zero,\$16
+[0-9a-f]+ <[^>]*> 0011 4d3c 	mfc2	zero,\$17
+[0-9a-f]+ <[^>]*> 0012 4d3c 	mfc2	zero,\$18
+[0-9a-f]+ <[^>]*> 0013 4d3c 	mfc2	zero,\$19
+[0-9a-f]+ <[^>]*> 0014 4d3c 	mfc2	zero,\$20
+[0-9a-f]+ <[^>]*> 0015 4d3c 	mfc2	zero,\$21
+[0-9a-f]+ <[^>]*> 0016 4d3c 	mfc2	zero,\$22
+[0-9a-f]+ <[^>]*> 0017 4d3c 	mfc2	zero,\$23
+[0-9a-f]+ <[^>]*> 0018 4d3c 	mfc2	zero,\$24
+[0-9a-f]+ <[^>]*> 0019 4d3c 	mfc2	zero,\$25
+[0-9a-f]+ <[^>]*> 001a 4d3c 	mfc2	zero,\$26
+[0-9a-f]+ <[^>]*> 001b 4d3c 	mfc2	zero,\$27
+[0-9a-f]+ <[^>]*> 001c 4d3c 	mfc2	zero,\$28
+[0-9a-f]+ <[^>]*> 001d 4d3c 	mfc2	zero,\$29
+[0-9a-f]+ <[^>]*> 001e 4d3c 	mfc2	zero,\$30
+[0-9a-f]+ <[^>]*> 001f 4d3c 	mfc2	zero,\$31
+[0-9a-f]+ <[^>]*> 0000 dd3c 	ctc2	zero,\$0
+[0-9a-f]+ <[^>]*> 0001 dd3c 	ctc2	zero,\$1
+[0-9a-f]+ <[^>]*> 0002 dd3c 	ctc2	zero,\$2
+[0-9a-f]+ <[^>]*> 0003 dd3c 	ctc2	zero,\$3
+[0-9a-f]+ <[^>]*> 0004 dd3c 	ctc2	zero,\$4
+[0-9a-f]+ <[^>]*> 0005 dd3c 	ctc2	zero,\$5
+[0-9a-f]+ <[^>]*> 0006 dd3c 	ctc2	zero,\$6
+[0-9a-f]+ <[^>]*> 0007 dd3c 	ctc2	zero,\$7
+[0-9a-f]+ <[^>]*> 0008 dd3c 	ctc2	zero,\$8
+[0-9a-f]+ <[^>]*> 0009 dd3c 	ctc2	zero,\$9
+[0-9a-f]+ <[^>]*> 000a dd3c 	ctc2	zero,\$10
+[0-9a-f]+ <[^>]*> 000b dd3c 	ctc2	zero,\$11
+[0-9a-f]+ <[^>]*> 000c dd3c 	ctc2	zero,\$12
+[0-9a-f]+ <[^>]*> 000d dd3c 	ctc2	zero,\$13
+[0-9a-f]+ <[^>]*> 000e dd3c 	ctc2	zero,\$14
+[0-9a-f]+ <[^>]*> 000f dd3c 	ctc2	zero,\$15
+[0-9a-f]+ <[^>]*> 0010 dd3c 	ctc2	zero,\$16
+[0-9a-f]+ <[^>]*> 0011 dd3c 	ctc2	zero,\$17
+[0-9a-f]+ <[^>]*> 0012 dd3c 	ctc2	zero,\$18
+[0-9a-f]+ <[^>]*> 0013 dd3c 	ctc2	zero,\$19
+[0-9a-f]+ <[^>]*> 0014 dd3c 	ctc2	zero,\$20
+[0-9a-f]+ <[^>]*> 0015 dd3c 	ctc2	zero,\$21
+[0-9a-f]+ <[^>]*> 0016 dd3c 	ctc2	zero,\$22
+[0-9a-f]+ <[^>]*> 0017 dd3c 	ctc2	zero,\$23
+[0-9a-f]+ <[^>]*> 0018 dd3c 	ctc2	zero,\$24
+[0-9a-f]+ <[^>]*> 0019 dd3c 	ctc2	zero,\$25
+[0-9a-f]+ <[^>]*> 001a dd3c 	ctc2	zero,\$26
+[0-9a-f]+ <[^>]*> 001b dd3c 	ctc2	zero,\$27
+[0-9a-f]+ <[^>]*> 001c dd3c 	ctc2	zero,\$28
+[0-9a-f]+ <[^>]*> 001d dd3c 	ctc2	zero,\$29
+[0-9a-f]+ <[^>]*> 001e dd3c 	ctc2	zero,\$30
+[0-9a-f]+ <[^>]*> 001f dd3c 	ctc2	zero,\$31
+[0-9a-f]+ <[^>]*> 0000 cd3c 	cfc2	zero,\$0
+[0-9a-f]+ <[^>]*> 0001 cd3c 	cfc2	zero,\$1
+[0-9a-f]+ <[^>]*> 0002 cd3c 	cfc2	zero,\$2
+[0-9a-f]+ <[^>]*> 0003 cd3c 	cfc2	zero,\$3
+[0-9a-f]+ <[^>]*> 0004 cd3c 	cfc2	zero,\$4
+[0-9a-f]+ <[^>]*> 0005 cd3c 	cfc2	zero,\$5
+[0-9a-f]+ <[^>]*> 0006 cd3c 	cfc2	zero,\$6
+[0-9a-f]+ <[^>]*> 0007 cd3c 	cfc2	zero,\$7
+[0-9a-f]+ <[^>]*> 0008 cd3c 	cfc2	zero,\$8
+[0-9a-f]+ <[^>]*> 0009 cd3c 	cfc2	zero,\$9
+[0-9a-f]+ <[^>]*> 000a cd3c 	cfc2	zero,\$10
+[0-9a-f]+ <[^>]*> 000b cd3c 	cfc2	zero,\$11
+[0-9a-f]+ <[^>]*> 000c cd3c 	cfc2	zero,\$12
+[0-9a-f]+ <[^>]*> 000d cd3c 	cfc2	zero,\$13
+[0-9a-f]+ <[^>]*> 000e cd3c 	cfc2	zero,\$14
+[0-9a-f]+ <[^>]*> 000f cd3c 	cfc2	zero,\$15
+[0-9a-f]+ <[^>]*> 0010 cd3c 	cfc2	zero,\$16
+[0-9a-f]+ <[^>]*> 0011 cd3c 	cfc2	zero,\$17
+[0-9a-f]+ <[^>]*> 0012 cd3c 	cfc2	zero,\$18
+[0-9a-f]+ <[^>]*> 0013 cd3c 	cfc2	zero,\$19
+[0-9a-f]+ <[^>]*> 0014 cd3c 	cfc2	zero,\$20
+[0-9a-f]+ <[^>]*> 0015 cd3c 	cfc2	zero,\$21
+[0-9a-f]+ <[^>]*> 0016 cd3c 	cfc2	zero,\$22
+[0-9a-f]+ <[^>]*> 0017 cd3c 	cfc2	zero,\$23
+[0-9a-f]+ <[^>]*> 0018 cd3c 	cfc2	zero,\$24
+[0-9a-f]+ <[^>]*> 0019 cd3c 	cfc2	zero,\$25
+[0-9a-f]+ <[^>]*> 001a cd3c 	cfc2	zero,\$26
+[0-9a-f]+ <[^>]*> 001b cd3c 	cfc2	zero,\$27
+[0-9a-f]+ <[^>]*> 001c cd3c 	cfc2	zero,\$28
+[0-9a-f]+ <[^>]*> 001d cd3c 	cfc2	zero,\$29
+[0-9a-f]+ <[^>]*> 001e cd3c 	cfc2	zero,\$30
+[0-9a-f]+ <[^>]*> 001f cd3c 	cfc2	zero,\$31
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips@cp2d.d b/gas/testsuite/gas/mips/micromips@cp2d.d
new file mode 100644
index 0000000000..30af12ba19
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips@cp2d.d
@@ -0,0 +1,73 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 doubleword memory access instructions
+#as: -32
+#source: cp2d\.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 2000 2000 	ldc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> 2020 2000 	ldc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> 2040 2000 	ldc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> 2060 2000 	ldc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> 2080 2000 	ldc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> 20a0 2000 	ldc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> 20c0 2000 	ldc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> 20e0 2000 	ldc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> 2100 2000 	ldc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> 2120 2000 	ldc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> 2140 2000 	ldc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> 2160 2000 	ldc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> 2180 2000 	ldc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> 21a0 2000 	ldc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> 21c0 2000 	ldc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> 21e0 2000 	ldc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> 2200 2000 	ldc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> 2220 2000 	ldc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> 2240 2000 	ldc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> 2260 2000 	ldc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> 2280 2000 	ldc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> 22a0 2000 	ldc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> 22c0 2000 	ldc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> 22e0 2000 	ldc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> 2300 2000 	ldc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> 2320 2000 	ldc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> 2340 2000 	ldc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> 2360 2000 	ldc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> 2380 2000 	ldc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> 23a0 2000 	ldc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> 23c0 2000 	ldc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> 23e0 2000 	ldc2	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> 2000 a000 	sdc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> 2020 a000 	sdc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> 2040 a000 	sdc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> 2060 a000 	sdc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> 2080 a000 	sdc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> 20a0 a000 	sdc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> 20c0 a000 	sdc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> 20e0 a000 	sdc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> 2100 a000 	sdc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> 2120 a000 	sdc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> 2140 a000 	sdc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> 2160 a000 	sdc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> 2180 a000 	sdc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> 21a0 a000 	sdc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> 21c0 a000 	sdc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> 21e0 a000 	sdc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> 2200 a000 	sdc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> 2220 a000 	sdc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> 2240 a000 	sdc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> 2260 a000 	sdc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> 2280 a000 	sdc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> 22a0 a000 	sdc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> 22c0 a000 	sdc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> 22e0 a000 	sdc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> 2300 a000 	sdc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> 2320 a000 	sdc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> 2340 a000 	sdc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> 2360 a000 	sdc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> 2380 a000 	sdc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> 23a0 a000 	sdc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> 23c0 a000 	sdc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> 23e0 a000 	sdc2	\$31,0\(zero\)
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips@cp2m.d b/gas/testsuite/gas/mips/micromips@cp2m.d
new file mode 100644
index 0000000000..0ea78e2565
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips@cp2m.d
@@ -0,0 +1,73 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 memory access instructions
+#as: -32
+#source: cp2m.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 2000 0000 	lwc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> 2020 0000 	lwc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> 2040 0000 	lwc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> 2060 0000 	lwc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> 2080 0000 	lwc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> 20a0 0000 	lwc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> 20c0 0000 	lwc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> 20e0 0000 	lwc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> 2100 0000 	lwc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> 2120 0000 	lwc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> 2140 0000 	lwc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> 2160 0000 	lwc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> 2180 0000 	lwc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> 21a0 0000 	lwc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> 21c0 0000 	lwc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> 21e0 0000 	lwc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> 2200 0000 	lwc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> 2220 0000 	lwc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> 2240 0000 	lwc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> 2260 0000 	lwc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> 2280 0000 	lwc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> 22a0 0000 	lwc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> 22c0 0000 	lwc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> 22e0 0000 	lwc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> 2300 0000 	lwc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> 2320 0000 	lwc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> 2340 0000 	lwc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> 2360 0000 	lwc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> 2380 0000 	lwc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> 23a0 0000 	lwc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> 23c0 0000 	lwc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> 23e0 0000 	lwc2	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> 2000 8000 	swc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> 2020 8000 	swc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> 2040 8000 	swc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> 2060 8000 	swc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> 2080 8000 	swc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> 20a0 8000 	swc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> 20c0 8000 	swc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> 20e0 8000 	swc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> 2100 8000 	swc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> 2120 8000 	swc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> 2140 8000 	swc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> 2160 8000 	swc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> 2180 8000 	swc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> 21a0 8000 	swc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> 21c0 8000 	swc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> 21e0 8000 	swc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> 2200 8000 	swc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> 2220 8000 	swc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> 2240 8000 	swc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> 2260 8000 	swc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> 2280 8000 	swc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> 22a0 8000 	swc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> 22c0 8000 	swc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> 22e0 8000 	swc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> 2300 8000 	swc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> 2320 8000 	swc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> 2340 8000 	swc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> 2360 8000 	swc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> 2380 8000 	swc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> 23a0 8000 	swc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> 23c0 8000 	swc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> 23e0 8000 	swc2	\$31,0\(zero\)
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 8f3c7d9b90..5bbd761730 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -1333,6 +1333,11 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "cp0sel-names-mips64r2"
     run_dump_test "cp0sel-names-sb1"
 
+    run_dump_test_arches "cp0c"		[mips_arch_list_matching mips1 \
+					    !mips32 !micromips]
+    run_dump_test_arches "cp0m"		[mips_arch_list_matching mips1 \
+					    !mips2 !micromips]
+
     run_dump_test "cp1-names-numeric"
     run_dump_test "cp1-names-r3000"
     run_dump_test "cp1-names-r4000" \
@@ -1345,6 +1350,22 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "cp1-names-mips64r2"
     run_dump_test "cp1-names-sb1"
 
+    run_dump_test_arches "cp2"		[mips_arch_list_matching mips1 \
+					    !vr5400 !r5900 !octeon]
+    run_dump_test_arches "cp2-64"	[mips_arch_list_matching mips3 \
+					    !vr5400 !r5900 !octeon]
+    run_dump_test_arches "cp2m"		[mips_arch_list_matching mips1 \
+					    !vr5400 !r5900 !octeon]
+    run_dump_test_arches "cp2d"		[mips_arch_list_matching mips2 \
+					    !vr5400 !r5900 !octeon]
+
+    run_dump_test_arches "cp3"		[mips_arch_list_matching mips1 \
+					    !mips3 !mips32r2 !micromips]
+    run_dump_test_arches "cp3m"		[mips_arch_list_matching mips1 \
+					    !mips3 !mips32 !micromips]
+    run_dump_test_arches "cp3d"		[mips_arch_list_matching mips2 \
+					    !mips3 !mips32 !micromips]
+
     run_dump_test "hwr-names-numeric"
     run_dump_test "hwr-names-mips32r2"
     run_dump_test "hwr-names-mips64r2"
diff --git a/gas/testsuite/gas/mips/mipsr6@cp2d.d b/gas/testsuite/gas/mips/mipsr6@cp2d.d
new file mode 100644
index 0000000000..1c6191b7c8
--- /dev/null
+++ b/gas/testsuite/gas/mips/mipsr6@cp2d.d
@@ -0,0 +1,73 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 doubleword memory access instructions
+#as: -32
+#source: cp2d\.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 49c00000 	ldc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> 49c10000 	ldc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> 49c20000 	ldc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> 49c30000 	ldc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> 49c40000 	ldc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> 49c50000 	ldc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> 49c60000 	ldc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> 49c70000 	ldc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> 49c80000 	ldc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> 49c90000 	ldc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> 49ca0000 	ldc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> 49cb0000 	ldc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> 49cc0000 	ldc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> 49cd0000 	ldc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> 49ce0000 	ldc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> 49cf0000 	ldc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d00000 	ldc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d10000 	ldc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d20000 	ldc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d30000 	ldc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d40000 	ldc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d50000 	ldc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d60000 	ldc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d70000 	ldc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d80000 	ldc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> 49d90000 	ldc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> 49da0000 	ldc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> 49db0000 	ldc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> 49dc0000 	ldc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> 49dd0000 	ldc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> 49de0000 	ldc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> 49df0000 	ldc2	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e00000 	sdc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e10000 	sdc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e20000 	sdc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e30000 	sdc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e40000 	sdc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e50000 	sdc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e60000 	sdc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e70000 	sdc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e80000 	sdc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> 49e90000 	sdc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> 49ea0000 	sdc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> 49eb0000 	sdc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> 49ec0000 	sdc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> 49ed0000 	sdc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> 49ee0000 	sdc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> 49ef0000 	sdc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f00000 	sdc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f10000 	sdc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f20000 	sdc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f30000 	sdc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f40000 	sdc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f50000 	sdc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f60000 	sdc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f70000 	sdc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f80000 	sdc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> 49f90000 	sdc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> 49fa0000 	sdc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> 49fb0000 	sdc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> 49fc0000 	sdc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> 49fd0000 	sdc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> 49fe0000 	sdc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> 49ff0000 	sdc2	\$31,0\(zero\)
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mipsr6@cp2m.d b/gas/testsuite/gas/mips/mipsr6@cp2m.d
new file mode 100644
index 0000000000..c0be32276f
--- /dev/null
+++ b/gas/testsuite/gas/mips/mipsr6@cp2m.d
@@ -0,0 +1,73 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 memory access instructions
+#as: -32
+#source: cp2m.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 49400000 	lwc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> 49410000 	lwc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> 49420000 	lwc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> 49430000 	lwc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> 49440000 	lwc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> 49450000 	lwc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> 49460000 	lwc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> 49470000 	lwc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> 49480000 	lwc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> 49490000 	lwc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> 494a0000 	lwc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> 494b0000 	lwc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> 494c0000 	lwc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> 494d0000 	lwc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> 494e0000 	lwc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> 494f0000 	lwc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> 49500000 	lwc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> 49510000 	lwc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> 49520000 	lwc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> 49530000 	lwc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> 49540000 	lwc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> 49550000 	lwc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> 49560000 	lwc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> 49570000 	lwc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> 49580000 	lwc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> 49590000 	lwc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> 495a0000 	lwc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> 495b0000 	lwc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> 495c0000 	lwc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> 495d0000 	lwc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> 495e0000 	lwc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> 495f0000 	lwc2	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> 49600000 	swc2	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> 49610000 	swc2	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> 49620000 	swc2	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> 49630000 	swc2	\$3,0\(zero\)
+[0-9a-f]+ <[^>]*> 49640000 	swc2	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> 49650000 	swc2	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> 49660000 	swc2	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> 49670000 	swc2	\$7,0\(zero\)
+[0-9a-f]+ <[^>]*> 49680000 	swc2	\$8,0\(zero\)
+[0-9a-f]+ <[^>]*> 49690000 	swc2	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> 496a0000 	swc2	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> 496b0000 	swc2	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> 496c0000 	swc2	\$12,0\(zero\)
+[0-9a-f]+ <[^>]*> 496d0000 	swc2	\$13,0\(zero\)
+[0-9a-f]+ <[^>]*> 496e0000 	swc2	\$14,0\(zero\)
+[0-9a-f]+ <[^>]*> 496f0000 	swc2	\$15,0\(zero\)
+[0-9a-f]+ <[^>]*> 49700000 	swc2	\$16,0\(zero\)
+[0-9a-f]+ <[^>]*> 49710000 	swc2	\$17,0\(zero\)
+[0-9a-f]+ <[^>]*> 49720000 	swc2	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> 49730000 	swc2	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> 49740000 	swc2	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> 49750000 	swc2	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> 49760000 	swc2	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> 49770000 	swc2	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> 49780000 	swc2	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> 49790000 	swc2	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> 497a0000 	swc2	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> 497b0000 	swc2	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> 497c0000 	swc2	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> 497d0000 	swc2	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> 497e0000 	swc2	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> 497f0000 	swc2	\$31,0\(zero\)
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/r3900@cp0m.d b/gas/testsuite/gas/mips/r3900@cp0m.d
new file mode 100644
index 0000000000..bfd6cf694d
--- /dev/null
+++ b/gas/testsuite/gas/mips/r3900@cp0m.d
@@ -0,0 +1,73 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 memory access instructions
+#as: -32
+#source: cp0m.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> c0000000 	lwc0	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> c0010000 	lwc0	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> c0020000 	lwc0	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> c0030000 	lwc0	c0_config,0\(zero\)
+[0-9a-f]+ <[^>]*> c0040000 	lwc0	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> c0050000 	lwc0	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> c0060000 	lwc0	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> c0070000 	lwc0	c0_cache,0\(zero\)
+[0-9a-f]+ <[^>]*> c0080000 	lwc0	c0_badvaddr,0\(zero\)
+[0-9a-f]+ <[^>]*> c0090000 	lwc0	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> c00a0000 	lwc0	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> c00b0000 	lwc0	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> c00c0000 	lwc0	c0_sr,0\(zero\)
+[0-9a-f]+ <[^>]*> c00d0000 	lwc0	c0_cause,0\(zero\)
+[0-9a-f]+ <[^>]*> c00e0000 	lwc0	c0_epc,0\(zero\)
+[0-9a-f]+ <[^>]*> c00f0000 	lwc0	c0_prid,0\(zero\)
+[0-9a-f]+ <[^>]*> c0100000 	lwc0	c0_debug,0\(zero\)
+[0-9a-f]+ <[^>]*> c0110000 	lwc0	c0_depc,0\(zero\)
+[0-9a-f]+ <[^>]*> c0120000 	lwc0	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> c0130000 	lwc0	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> c0140000 	lwc0	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> c0150000 	lwc0	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> c0160000 	lwc0	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> c0170000 	lwc0	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> c0180000 	lwc0	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> c0190000 	lwc0	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> c01a0000 	lwc0	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> c01b0000 	lwc0	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> c01c0000 	lwc0	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> c01d0000 	lwc0	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> c01e0000 	lwc0	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> c01f0000 	lwc0	\$31,0\(zero\)
+[0-9a-f]+ <[^>]*> e0000000 	swc0	\$0,0\(zero\)
+[0-9a-f]+ <[^>]*> e0010000 	swc0	\$1,0\(zero\)
+[0-9a-f]+ <[^>]*> e0020000 	swc0	\$2,0\(zero\)
+[0-9a-f]+ <[^>]*> e0030000 	swc0	c0_config,0\(zero\)
+[0-9a-f]+ <[^>]*> e0040000 	swc0	\$4,0\(zero\)
+[0-9a-f]+ <[^>]*> e0050000 	swc0	\$5,0\(zero\)
+[0-9a-f]+ <[^>]*> e0060000 	swc0	\$6,0\(zero\)
+[0-9a-f]+ <[^>]*> e0070000 	swc0	c0_cache,0\(zero\)
+[0-9a-f]+ <[^>]*> e0080000 	swc0	c0_badvaddr,0\(zero\)
+[0-9a-f]+ <[^>]*> e0090000 	swc0	\$9,0\(zero\)
+[0-9a-f]+ <[^>]*> e00a0000 	swc0	\$10,0\(zero\)
+[0-9a-f]+ <[^>]*> e00b0000 	swc0	\$11,0\(zero\)
+[0-9a-f]+ <[^>]*> e00c0000 	swc0	c0_sr,0\(zero\)
+[0-9a-f]+ <[^>]*> e00d0000 	swc0	c0_cause,0\(zero\)
+[0-9a-f]+ <[^>]*> e00e0000 	swc0	c0_epc,0\(zero\)
+[0-9a-f]+ <[^>]*> e00f0000 	swc0	c0_prid,0\(zero\)
+[0-9a-f]+ <[^>]*> e0100000 	swc0	c0_debug,0\(zero\)
+[0-9a-f]+ <[^>]*> e0110000 	swc0	c0_depc,0\(zero\)
+[0-9a-f]+ <[^>]*> e0120000 	swc0	\$18,0\(zero\)
+[0-9a-f]+ <[^>]*> e0130000 	swc0	\$19,0\(zero\)
+[0-9a-f]+ <[^>]*> e0140000 	swc0	\$20,0\(zero\)
+[0-9a-f]+ <[^>]*> e0150000 	swc0	\$21,0\(zero\)
+[0-9a-f]+ <[^>]*> e0160000 	swc0	\$22,0\(zero\)
+[0-9a-f]+ <[^>]*> e0170000 	swc0	\$23,0\(zero\)
+[0-9a-f]+ <[^>]*> e0180000 	swc0	\$24,0\(zero\)
+[0-9a-f]+ <[^>]*> e0190000 	swc0	\$25,0\(zero\)
+[0-9a-f]+ <[^>]*> e01a0000 	swc0	\$26,0\(zero\)
+[0-9a-f]+ <[^>]*> e01b0000 	swc0	\$27,0\(zero\)
+[0-9a-f]+ <[^>]*> e01c0000 	swc0	\$28,0\(zero\)
+[0-9a-f]+ <[^>]*> e01d0000 	swc0	\$29,0\(zero\)
+[0-9a-f]+ <[^>]*> e01e0000 	swc0	\$30,0\(zero\)
+[0-9a-f]+ <[^>]*> e01f0000 	swc0	\$31,0\(zero\)
+	\.\.\.