2021-03-31 |
Alan Modra | Use bool in opcodes |
blob | commitdiff | raw |
2021-03-25 |
Jan Beulich | x86: flag bad S/G insn operand combinations |
blob | commitdiff | raw | diff to current |
2021-03-25 |
Jan Beulich | x86: flag as bad AVX512 insns with EVEX.z set but EVEX... |
blob | commitdiff | raw | diff to current |
2021-03-22 |
Martin Liska | Add startswith function and use it instead of CONST_STRNEQ. |
blob | commitdiff | raw | diff to current |
2021-03-12 |
Alan Modra | Re: x86: correct decoding of nop/reserved space (0f18... |
blob | commitdiff | raw | diff to current |
2021-03-11 |
Jan Beulich | x86: re-order logic in OP_XMM() |
blob | commitdiff | raw | diff to current |
2021-03-11 |
Jan Beulich | x86: drop a few redundant EVEX-related checks |
blob | commitdiff | raw | diff to current |
2021-03-11 |
Jan Beulich | x86: remove stray uses of xmmq_mode |
blob | commitdiff | raw | diff to current |
2021-03-10 |
Jan Beulich | x86/Intel: correct AVX512 S/G disassembly |
blob | commitdiff | raw | diff to current |
2021-03-10 |
Jan Beulich | x86: re-arrange enumerator and table entry order |
blob | commitdiff | raw | diff to current |
2021-03-10 |
Jan Beulich | x86: reuse further VEX entries for EVEX |
blob | commitdiff | raw | diff to current |
2021-03-10 |
Jan Beulich | x86: reuse VEX entries for EVEX vperm{q,pd} |
blob | commitdiff | raw | diff to current |
2021-03-10 |
Jan Beulich | x86: re-arrange order of decode for various EVEX opcodes |
blob | commitdiff | raw | diff to current |
2021-03-10 |
Jan Beulich | x86: re-arrange order of decode for various mask reg... |
blob | commitdiff | raw | diff to current |
2021-03-10 |
Jan Beulich | x86: re-arrange order of decode for various VEX opcodes |
blob | commitdiff | raw | diff to current |
2021-03-10 |
Jan Beulich | x86: re-arrange order of decode for various legacy... |
blob | commitdiff | raw | diff to current |
2021-03-10 |
Jan Beulich | x86: correct decoding of nop/reserved space (0f18 ... |
blob | commitdiff | raw | diff to current |
2021-03-09 |
Jan Beulich | x86-64: make SYSEXIT handling similar to SYSRET's |
blob | commitdiff | raw | diff to current |
2021-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
blob | commitdiff | raw | diff to current |
2020-11-29 |
Borislav Petkov | x86: Do not dump DS/CS segment overrides for branch... |
blob | commitdiff | raw | diff to current |
2020-11-14 |
Borislav Petkov | x86: Ignore CS/DS/ES/SS segment-override prefixes in... |
blob | commitdiff | raw | diff to current |
2020-10-26 |
Cui,Lili | Change avxvnni disassembler output from {vex3} to ... |
blob | commitdiff | raw | diff to current |
2020-10-20 |
Ganesh Gopalasubra... | Add AMD znver3 processor support |
blob | commitdiff | raw | diff to current |
2020-10-14 |
H.J. Lu | x86: Support Intel AVX VNNI |
blob | commitdiff | raw | diff to current |
2020-10-14 |
Lili Cui | x86: Add support for Intel HRESET instruction |
blob | commitdiff | raw | diff to current |
2020-10-14 |
Lili Cui | x86: Support Intel UINTR |
blob | commitdiff | raw | diff to current |
2020-10-05 |
H.J. Lu | x86-64: Always display suffix for %LQ in 64bit |
blob | commitdiff | raw | diff to current |
2020-10-05 |
H.J. Lu | x86: Clear modrm if not needed |
blob | commitdiff | raw | diff to current |
2020-09-25 |
Cui,Lili | Put together MOD_VEX_0F38* in i386-dis.c, |
blob | commitdiff | raw | diff to current |
2020-09-24 |
Cui,Lili | Add support for Intel TDX instructions. |
blob | commitdiff | raw | diff to current |
2020-09-23 |
Terry Guo | Enable support to Intel Keylocker instructions |
blob | commitdiff | raw | diff to current |
2020-09-02 |
Alan Modra | ubsan: i386-dis.c |
blob | commitdiff | raw | diff to current |
2020-07-21 |
Jan Beulich | Revert "x86: Don't display eiz with no scale" |
blob | commitdiff | raw | diff to current |
2020-07-15 |
H.J. Lu | x86: Don't display eiz with no scale |
blob | commitdiff | raw | diff to current |
2020-07-15 |
Jan Beulich | x86: move putop() case labels to restore alphabetic... |
blob | commitdiff | raw | diff to current |
2020-07-15 |
Jan Beulich | x86: make PUSH/POP disassembly uniform |
blob | commitdiff | raw | diff to current |
2020-07-15 |
Jan Beulich | x86: avoid attaching suffixes to unambiguous insns |
blob | commitdiff | raw | diff to current |
2020-07-14 |
H.J. Lu | x86-64: Zero-extend lower 32 bits displacement to 64... |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86/Intel: debug registers are named DRn |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: drop Rm and the 'L' macro |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: drop Rdq, Rd, and MaskR |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: simplify decode of opcodes valid only without... |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: also use %BW / %DQ for kshift* |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: simplify decode of opcodes valid with (embedded... |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: drop further EVEX table entries that can be served... |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: drop need_vex_reg |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: drop Vex128 and Vex256 |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: replace %LW by %DQ |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: merge/move logic determining the EVEX disp8 shift |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: extend %BW use to VP{COMPRESS,EXPAND}{B,W} |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86-64: fix {,V}PCMPESTR{I,M} disassembly in Intel... |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: fold VCMP_Fixup() into CMP_Fixup() |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: don't disassemble MOVBE with two suffixes |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: avoid attaching suffix to register-only CRC32 |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86-64: don't hide an empty but meaningless REX prefix |
blob | commitdiff | raw | diff to current |
2020-07-14 |
Jan Beulich | x86: drop dead code from OP_IMREG() |
blob | commitdiff | raw | diff to current |
2020-07-10 |
Lili Cui | x86: Add support for Intel AMX instructions |
blob | commitdiff | raw | diff to current |
2020-07-08 |
Jan Beulich | x86: various XOP insns lack L and/or W bit decoding |
blob | commitdiff | raw | diff to current |
2020-07-08 |
Jan Beulich | x86: FMA4 scalar insns ignore VEX.L |
blob | commitdiff | raw | diff to current |
2020-07-08 |
Jan Beulich | x86: re-work operand swapping for XOP shift/rotate... |
blob | commitdiff | raw | diff to current |
2020-07-08 |
Jan Beulich | x86: re-work operand handling for 5-operand XOP insns |
blob | commitdiff | raw | diff to current |
2020-07-08 |
Jan Beulich | x86: re-work operand swapping for FMA4 and 4-operand... |
blob | commitdiff | raw | diff to current |
2020-07-07 |
Jan Beulich | x86: introduce %BW to avoid going through vex_w_table[] |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: adjust/correct VFRCZ{P,S}{S,D} decoding |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: use %LW / %XW instead of going through vex_w_table[] |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: most VBROADCAST{F,I}{32,64}x* only accept memory... |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: drop EVEX table entries that can be made served... |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: AVX512 VPERM{D,Q,PS,PD} insns need to honor EVEX.L'L |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: AVX512 extract/insert insns need to honor EVEX.L'L |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: honor VEX.W for VCVT{PH2PS,PS2PH} |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: drop EVEX table entries that can be served by... |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: replace EXqScalarS by EXqVexScalarS |
blob | commitdiff | raw | diff to current |
2020-07-06 |
Jan Beulich | x86: replace EX{d,q}Scalar by EXxmm_m{d,q} |
blob | commitdiff | raw | diff to current |
2020-06-26 |
Jan Beulich | x86: make I disassembler macro available for new use |
blob | commitdiff | raw | diff to current |
2020-06-26 |
Jan Beulich | x86: fix processing of -M disassembler option |
blob | commitdiff | raw | diff to current |
2020-06-25 |
Jan Beulich | x86: make J disassembler macro available for new use |
blob | commitdiff | raw | diff to current |
2020-06-25 |
Jan Beulich | x86: drop left-over 4-way alternative disassembler... |
blob | commitdiff | raw | diff to current |
2020-06-25 |
Jan Beulich | x86: fix SYSRET disassembly, improve {,V}CVTSI2S{S... |
blob | commitdiff | raw | diff to current |
2020-06-18 |
Jan Beulich | x86: also test alternative VMGEXIT encoding |
blob | commitdiff | raw | diff to current |
2020-06-17 |
Cui,Lili | x86: Delete incorrect vmgexit entry in prefix_table |
blob | commitdiff | raw | diff to current |
2020-06-14 |
H.J. Lu | x86: Correct xsusldtrk mnemonic |
blob | commitdiff | raw | diff to current |
2020-06-09 |
H.J. Lu | i386-dis.c: Fix a typo in comments |
blob | commitdiff | raw | diff to current |
2020-06-09 |
Jan Beulich | x86: consistently print prefixes explicitly which are... |
blob | commitdiff | raw | diff to current |
2020-06-09 |
Jan Beulich | x86: fix {,V}MOV{L,H}PD disassembly |
blob | commitdiff | raw | diff to current |
2020-06-09 |
Jan Beulich | x86: utilize X macro in EVEX decoding |
blob | commitdiff | raw | diff to current |
2020-06-09 |
Jan Beulich | x86: correct decoding of packed-FP-only AVX encodings |
blob | commitdiff | raw | diff to current |
2020-06-09 |
Jan Beulich | x86: correct mis-named MOD_0F51 enumerator |
blob | commitdiff | raw | diff to current |
2020-04-07 |
Cui,Lili | Add support for intel TSXLDTRK instructions$ |
blob | commitdiff | raw | diff to current |
2020-04-02 |
LiliCui | Add support for intel SERIALIZE instruction |
blob | commitdiff | raw | diff to current |
2020-03-13 |
Jan Beulich | x86-64: correct mis-named X86_64_0D enumerator |
blob | commitdiff | raw | diff to current |
2020-03-06 |
Jan Beulich | x86: correct MPX insn w/o base or index encoding in... |
blob | commitdiff | raw | diff to current |
2020-03-04 |
Jan Beulich | x86: support VMGEXIT |
blob | commitdiff | raw | diff to current |
2020-02-26 |
Alan Modra | Indent labels |
blob | commitdiff | raw | diff to current |
2020-02-12 |
Jan Beulich | x86-64: Intel64 adjustments for insns dealing with... |
blob | commitdiff | raw | diff to current |
2020-01-31 |
Jan Beulich | x86: replace EXxmm_mdq by EXVexWdqScalar |
blob | commitdiff | raw | diff to current |
2020-01-31 |
Jan Beulich | x86: drop unused EXVexWdq / vex_w_dq_mode |
blob | commitdiff | raw | diff to current |
2020-01-30 |
Jan Beulich | x86-64: honor vendor specifics for near RET |
blob | commitdiff | raw | diff to current |
2020-01-27 |
H.J. Lu | x86-64: Properly encode and decode movsxd |
blob | commitdiff | raw | diff to current |
2020-01-13 |
Thomas Troeger | Add an option to objdump's disassembler to generate... |
blob | commitdiff | raw | diff to current |
2020-01-09 |
Jan Beulich | x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode... |
blob | commitdiff | raw | diff to current |
next |