Initial import of rseq.2 man page

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Remove do_on_cpu dependencies

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Remove do_on_cpu (prototype)

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Cleanup: cplusplus ifdef coding style update

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Allow using librseq APIs from C++ code

If you call librseq APIs like rseq_available and
rseq_register_current_thread from C++ code, linking fails:

    rseq.cpp:365: undefined reference to `rseq_available()'
    rseq.cpp:46: undefined reference to `rseq_register_current_thread()'

Tell the C++ compiler to treat librseq's exported APIs as having C
mangling, fixing these linker errors.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

memcpy: copy 8 bytes loop

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Bump do_on_cpu system call number to 434

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Implement percpu_fence()

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Fix: add missing do-on-cpu-insn.h to make dist

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Move to do_on_cpu system call

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Add ARM big-endian support to rseq headers

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Fix: Thumb mode build failure on arm32

Using ".arm .inst" for the arm signature introduces build issues for
programs compiled in Thumb mode because the assembler stays in the
arm mode for the rest of the inline assembly. Revert to using a ".word"
to express the signature as data instead.

The choice of signature is a valid trap instruction on arm32 little
endian, where both code and data are little endian.

ARMv6+ big endian (BE8) generates mixed endianness code vs data:
little-endian code and big-endian data. The data value of the signature
needs to have its byte order reversed to generate the trap instruction.

Prior to ARMv6, -mbig-endian generates big-endian code and data
(which match), so the endianness of the data representation of the
signature should not be reversed. However, the choice between BE32
and BE8 is done by the linker, so we cannot know whether code and
data endianness will be mixed before the linker is invoked. So rather
than try to play tricks with the linker, the rseq signature is simply
data (not a trap instruction) prior to ARMv6 on big endian. This is
why the signature is expressed as data (.word) rather than as
instruction (.inst) in assembler.

Because a ".word" is used to emit the signature, it will be interpreted
as a literal pool by a disassembler, not as an actual instruction.
Considering that the signature is not meant to be executed except in
scenarios where the program execution is completely bogus, this should
not be an issue.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Acked-by: Will Deacon <will.deacon@arm.com>

rseq/selftests: mips: use break instruction for RSEQ_SIG

Use break as guard instruction for the restartable sequence abort
handler.

Previously, the chosen signature was simply data, based on the
assumption that it could always sit in a literal pool. However,
some compilation environments favor disabling literal pool. Therefore,
ensure the signature is a valid uncommon trap instruction.

commit 16b96b6ed87f "rseq/selftests: mips: use break instruction for
RSEQ_SIG" in the Linux kernel.

Suggested-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

rseq/selftests: powerpc code signature: generate valid instructions

Use "twui" as the guard instruction for the restartable sequence abort
handler.

commit 496fd0fc9f5c "rseq/selftests: powerpc code signature: generate valid
instructions" in the Linux kernel.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

rseq/selftests: aarch64 code signature: handle big-endian environment

Handle compiling with -mbig-endian on aarch64, which generates binaries
with mixed code vs data endianness (little endian code, big endian
data).

Else mismatch between code endianness for the generated signatures and
data endianness for the RSEQ_SIG parameter passed to the rseq
registration will trigger application segmentation faults when the
kernel try to abort rseq critical sections.

commit 7cd4ce2e466f "rseq/selftests: aarch64 code signature: handle
big-endian environment" in the Linux kernel.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

rseq/selftests: arm: use udf instruction for RSEQ_SIG

Use udf as the guard instruction for the restartable sequence abort
handler.

Previously, the chosen signature was not a valid instruction, based
on the assumption that it could always sit in a literal pool. However,
there are compilation environments in which literal pools are not
available, for instance execute-only code. Therefore, we need to
choose a signature value that is also a valid instruction.

Handle compiling with -mbig-endian on ARMv6+, which generates binaries
with mixed code vs data endianness (little endian code, big endian
data).

Else mismatch between code endianness for the generated signatures and
data endianness for the RSEQ_SIG parameter passed to the rseq
registration will trigger application segmentation faults when the
kernel try to abort rseq critical sections.

Prior to ARMv6, -mbig-endian generates big-endian code and data, so
endianness should not be reversed in that case.

commit 2b845d4b4acd "rseq/selftests: arm: use udf instruction for RSEQ_SIG"
in the Linux kernel.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

rseq/selftests: s390: use trap4 for RSEQ_SIG

Use trap4 as the guard instruction for the restartable sequence abort
handler.

commit 3d4d1f05bc99 "rseq/selftests: s390: use trap4 for RSEQ_SIG"
in the Linux kernel.

Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

rseq/selftests: x86: use ud1 instruction as RSEQ_SIG opcode

Use ud1 as the guard instruction for the restartable sequence abort
handler. Its benefit compared to nopl is to trap execution if the
program ends up trying to execute it by mistake, which makes debugging
easier.

The 4-byte signature per se is unchanged (it is the instruction
operand). Only the opcode is changed from nopl to ud1.

commit 24fa5d1efe98 "rseq/selftests: x86: use ud1 instruction as RSEQ_SIG
opcode" in the Linux kernel.

Suggested-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Remove volatile, use READ/WRITE ONCE

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

cpu-op: change _mb_ API to _release

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

cpu-op: add add_release API

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

cpu-op lib: Change code layout to remove gcc-4.8 warnings

gcc-4.8 seems to mistakenly think there are missing field initializers
in the cpu-op.c code, e.g.:

cpu-op.c: In function ‘cpu_op_cmpxchg’:
cpu-op.c:94:4: warning: missing initializer for field ‘src’ of ‘struct <anonymous>’ [-Wmissing-field-initializers]
    .u.memcpy_op.src = (unsigned long)n,

Change the code layout so these warnings are not triggered.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Extend extra/README

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Add embedded rseq/opv headers for test builds

Signed-off-by: Michael Jeanson <mjeanson@efficios.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

rseq: set refcount back to 1 on unregister failure

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Add configure report

Signed-off-by: Michael Jeanson <mjeanson@efficios.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update macros from the autoconf archive

Signed-off-by: Michael Jeanson <mjeanson@efficios.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

rseq/selftests: x86: Work-around bogus gcc-8 optimisation

At least the following versions of gcc-8:
- gcc version 8.0.1 20180414 (experimental) [trunk revision 259383] (Ubuntu 8-20180414-1ubuntu2)
- gcc 8.2.0-7ubuntu1 (Ubuntu 18.10 (Cosmic)),
- gcc 8.3.0

generate broken assembler with asm goto that have a thread-local storage
"m" input operand on both x86-32 and x86-64. For instance:

__thread int var;

static int fct(void)
{
        asm goto (      "jmp %l[testlabel]\n\t"
                        : : [var] "m" (var) : : testlabel);
        return 0;
testlabel:
        return 1;
}

int main()
{
        return fct();
}

% gcc-8 -O2 -o test-asm-goto test-asm-goto.c
/tmp/ccAdHJbe.o: In function `main':
test-asm-goto.c:(.text.startup+0x1): undefined reference to `.L2'
collect2: error: ld returned 1 exit status

% gcc-8 -m32 -O2 -o test-asm-goto test-asm-goto.c
/tmp/ccREsVXA.o: In function `main':
test-asm-goto.c:(.text.startup+0x1): undefined reference to `.L2'
collect2: error: ld returned 1 exit status

Work-around this compiler bug in the rseq-x86.h header by passing the
address of the __rseq_abi TLS as a register operand rather than using
the "m" input operand.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90193
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

s390: use jg instruction for jumps outside of the asm

The branch target range of the "j" instruction is 64K, which is not
enough for the general case.

Suggested-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Introduce __rseq_handled and rseq_ownership

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Remove "weak" attribute from symbols

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update exit points comments

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update arm64 SPDX license identifier

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Introduce __rseq_cs_ptr_array, rename __rseq_table to __rseq_cs

The entries within __rseq_table are aligned on 32 bytes due to
linux/rseq.h struct rseq_cs uapi requirements, but the start of the
__rseq_table section is not guaranteed to be 32-byte aligned. It can
cause padding to be added at the start of the section, which makes it
hard to use as an array of items by debuggers.

Considering that __rseq_table does not really consist of a table due to
the presence of padding, rename this section to __rseq_cs.

Create a new __rseq_cs_ptr_array section which contains 64-bit packed
pointers to entries within the __rseq_cs section.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Add __rseq_exit_point_array section for debuggers

Knowing all exit points is useful to assist debuggers stepping over the
rseq critical sections without requiring them to disassemble the content
of the critical section to figure out the exit points.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Add arm64 rseq header

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Autotools all the things!

Signed-off-by: Michael Jeanson <mjeanson@efficios.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Clarify licensing and update to SPDX 3.0 identifiers

See this article for more details on the new GNU identifiers :

  https://spdx.org/news/news/2018/01/license-list-30-released

Signed-off-by: Michael Jeanson <mjeanson@efficios.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update to follow cpu-opv uapi

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Use __rseq_refcount symbol

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

rseq: error out on refcount overflow/underflow

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

rseq available check: use documented behavior

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Test rseq and cpu_opv availability

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update percpu ops test and header

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update test makefile

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Add percpu ops test

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Implement availability API checks

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Add cpu-opv helpers

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update readme markdown

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Install rseq headers

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Makefile: install/uninstall targets

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update readme

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update makefile and readme

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Update requirements

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Add s390 target

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Initial import

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

Initial commit