[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_dp_mst.c

/*
 * Copyright © 2008 Intel Corporation
 *             2014 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 */

#include <drm/drmP.h>
#include "i915_drv.h"
#include "intel_drv.h"
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_edid.h>

static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
					struct intel_crtc_state *pipe_config,
					struct drm_connector_state *conn_state)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct drm_atomic_state *state;
	int bpp;
	int lane_count, slots;
	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
	int mst_pbn;

	pipe_config->dp_encoder_is_mst = true;
	pipe_config->has_pch_encoder = false;
	bpp = 24;
	/*
	 * for MST we always configure max link bw - the spec doesn't
	 * seem to suggest we should do otherwise.
	 */
	lane_count = drm_dp_max_lane_count(intel_dp->dpcd);

	pipe_config->lane_count = lane_count;

	pipe_config->pipe_bpp = 24;
	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);

	state = pipe_config->base.state;

	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);

	pipe_config->pbn = mst_pbn;
	slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);

	intel_link_compute_m_n(bpp, lane_count,
			       adjusted_mode->crtc_clock,
			       pipe_config->port_clock,
			       &pipe_config->dp_m_n);

	pipe_config->dp_m_n.tu = slots;

	return true;

}

static void intel_mst_disable_dp(struct intel_encoder *encoder,
				 struct intel_crtc_state *old_crtc_state,
				 struct drm_connector_state *old_conn_state)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct intel_connector *connector =
		to_intel_connector(old_conn_state->connector);
	int ret;

	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);

	drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);

	ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
	if (ret) {
		DRM_ERROR("failed to update payload %d\n", ret);
	}
}

static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
				      struct intel_crtc_state *old_crtc_state,
				      struct drm_connector_state *old_conn_state)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct intel_connector *connector =
		to_intel_connector(old_conn_state->connector);

	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);

	/* this can fail */
	drm_dp_check_act_status(&intel_dp->mst_mgr);
	/* and this can also fail */
	drm_dp_update_payload_part2(&intel_dp->mst_mgr);

	drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);

	intel_dp->active_mst_links--;

	intel_mst->connector = NULL;
	if (intel_dp->active_mst_links == 0) {
		intel_dig_port->base.post_disable(&intel_dig_port->base,
						  NULL, NULL);

		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
	}
}

static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
				    struct intel_crtc_state *pipe_config,
				    struct drm_connector_state *conn_state)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
	enum port port = intel_dig_port->port;
	struct intel_connector *connector =
		to_intel_connector(conn_state->connector);
	int ret;
	uint32_t temp;
	int slots;

	/* MST encoders are bound to a crtc, not to a connector,
	 * force the mapping here for get_hw_state.
	 */
	connector->encoder = encoder;
	intel_mst->connector = connector;

	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);

	if (intel_dp->active_mst_links == 0) {
		intel_ddi_clk_select(&intel_dig_port->base,
				     pipe_config->shared_dpll);

		intel_prepare_dp_ddi_buffers(&intel_dig_port->base);
		intel_dp_set_link_params(intel_dp,
					 pipe_config->port_clock,
					 pipe_config->lane_count,
					 true);

		intel_ddi_init_dp_buf_reg(&intel_dig_port->base);

		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);

		intel_dp_start_link_train(intel_dp);
		intel_dp_stop_link_train(intel_dp);
	}

	ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
				       connector->port,
				       pipe_config->pbn, &slots);
	if (ret == false) {
		DRM_ERROR("failed to allocate vcpi\n");
		return;
	}


	intel_dp->active_mst_links++;
	temp = I915_READ(DP_TP_STATUS(port));
	I915_WRITE(DP_TP_STATUS(port), temp);

	ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
}

static void intel_mst_enable_dp(struct intel_encoder *encoder,
				struct intel_crtc_state *pipe_config,
				struct drm_connector_state *conn_state)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
	enum port port = intel_dig_port->port;
	int ret;

	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);

	if (intel_wait_for_register(dev_priv,
				    DP_TP_STATUS(port),
				    DP_TP_STATUS_ACT_SENT,
				    DP_TP_STATUS_ACT_SENT,
				    1))
		DRM_ERROR("Timed out waiting for ACT sent\n");

	ret = drm_dp_check_act_status(&intel_dp->mst_mgr);

	ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
}

static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
				      enum pipe *pipe)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	*pipe = intel_mst->pipe;
	if (intel_mst->connector)
		return true;
	return false;
}

static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
					struct intel_crtc_state *pipe_config)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
	u32 temp, flags = 0;

	temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
	if (temp & TRANS_DDI_PHSYNC)
		flags |= DRM_MODE_FLAG_PHSYNC;
	else
		flags |= DRM_MODE_FLAG_NHSYNC;
	if (temp & TRANS_DDI_PVSYNC)
		flags |= DRM_MODE_FLAG_PVSYNC;
	else
		flags |= DRM_MODE_FLAG_NVSYNC;

	switch (temp & TRANS_DDI_BPC_MASK) {
	case TRANS_DDI_BPC_6:
		pipe_config->pipe_bpp = 18;
		break;
	case TRANS_DDI_BPC_8:
		pipe_config->pipe_bpp = 24;
		break;
	case TRANS_DDI_BPC_10:
		pipe_config->pipe_bpp = 30;
		break;
	case TRANS_DDI_BPC_12:
		pipe_config->pipe_bpp = 36;
		break;
	default:
		break;
	}
	pipe_config->base.adjusted_mode.flags |= flags;

	pipe_config->lane_count =
		((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;

	intel_dp_get_m_n(crtc, pipe_config);

	intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
}

static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct intel_dp *intel_dp = intel_connector->mst_port;
	struct edid *edid;
	int ret;

	if (!intel_dp) {
		return intel_connector_update_modes(connector, NULL);
	}

	edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
	ret = intel_connector_update_modes(connector, edid);
	kfree(edid);

	return ret;
}

static enum drm_connector_status
intel_dp_mst_detect(struct drm_connector *connector, bool force)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct intel_dp *intel_dp = intel_connector->mst_port;

	if (!intel_dp)
		return connector_status_disconnected;
	return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
}

static int
intel_dp_mst_set_property(struct drm_connector *connector,
			  struct drm_property *property,
			  uint64_t val)
{
	return 0;
}

static void
intel_dp_mst_connector_destroy(struct drm_connector *connector)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);

	if (!IS_ERR_OR_NULL(intel_connector->edid))
		kfree(intel_connector->edid);

	drm_connector_cleanup(connector);
	kfree(connector);
}

static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
	.dpms = drm_atomic_helper_connector_dpms,
	.detect = intel_dp_mst_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.set_property = intel_dp_mst_set_property,
	.atomic_get_property = intel_connector_atomic_get_property,
	.late_register = intel_connector_register,
	.early_unregister = intel_connector_unregister,
	.destroy = intel_dp_mst_connector_destroy,
	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
};

static int intel_dp_mst_get_modes(struct drm_connector *connector)
{
	return intel_dp_mst_get_ddc_modes(connector);
}

static enum drm_mode_status
intel_dp_mst_mode_valid(struct drm_connector *connector,
			struct drm_display_mode *mode)
{
	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;

	/* TODO - validate mode against available PBN for link */
	if (mode->clock < 10000)
		return MODE_CLOCK_LOW;

	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
		return MODE_H_ILLEGAL;

	if (mode->clock > max_dotclk)
		return MODE_CLOCK_HIGH;

	return MODE_OK;
}

static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
							 struct drm_connector_state *state)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct intel_dp *intel_dp = intel_connector->mst_port;
	struct intel_crtc *crtc = to_intel_crtc(state->crtc);

	if (!intel_dp)
		return NULL;
	return &intel_dp->mst_encoders[crtc->pipe]->base.base;
}

static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct intel_dp *intel_dp = intel_connector->mst_port;
	if (!intel_dp)
		return NULL;
	return &intel_dp->mst_encoders[0]->base.base;
}

static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
	.get_modes = intel_dp_mst_get_modes,
	.mode_valid = intel_dp_mst_mode_valid,
	.atomic_best_encoder = intel_mst_atomic_best_encoder,
	.best_encoder = intel_mst_best_encoder,
};

static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);

	drm_encoder_cleanup(encoder);
	kfree(intel_mst);
}

static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
	.destroy = intel_dp_mst_encoder_destroy,
};

static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
{
	if (connector->encoder && connector->base.state->crtc) {
		enum pipe pipe;
		if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
			return false;
		return true;
	}
	return false;
}

static void intel_connector_add_to_fbdev(struct intel_connector *connector)
{
#ifdef CONFIG_DRM_FBDEV_EMULATION
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);

	if (dev_priv->fbdev)
		drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
						&connector->base);
#endif
}

static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
{
#ifdef CONFIG_DRM_FBDEV_EMULATION
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);

	if (dev_priv->fbdev)
		drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
						   &connector->base);
#endif
}

static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
{
	struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
	struct drm_device *dev = intel_dig_port->base.base.dev;
	struct intel_connector *intel_connector;
	struct drm_connector *connector;
	int i;

	intel_connector = intel_connector_alloc();
	if (!intel_connector)
		return NULL;

	connector = &intel_connector->base;
	drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
	drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);

	intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
	intel_connector->mst_port = intel_dp;
	intel_connector->port = port;

	for (i = PIPE_A; i <= PIPE_C; i++) {
		drm_mode_connector_attach_encoder(&intel_connector->base,
						  &intel_dp->mst_encoders[i]->base.base);
	}
	intel_dp_add_properties(intel_dp, connector);

	drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
	drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);

	drm_mode_connector_set_path_property(connector, pathprop);
	return connector;
}

static void intel_dp_register_mst_connector(struct drm_connector *connector)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct drm_device *dev = connector->dev;

	drm_modeset_lock_all(dev);
	intel_connector_add_to_fbdev(intel_connector);
	drm_modeset_unlock_all(dev);

	drm_connector_register(&intel_connector->base);
}

static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
					   struct drm_connector *connector)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct drm_device *dev = connector->dev;

	drm_connector_unregister(connector);

	/* need to nuke the connector */
	drm_modeset_lock_all(dev);
	intel_connector_remove_from_fbdev(intel_connector);
	intel_connector->mst_port = NULL;
	drm_modeset_unlock_all(dev);

	drm_connector_unreference(&intel_connector->base);
	DRM_DEBUG_KMS("\n");
}

static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
{
	struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
	struct drm_device *dev = intel_dig_port->base.base.dev;

	drm_kms_helper_hotplug_event(dev);
}

static const struct drm_dp_mst_topology_cbs mst_cbs = {
	.add_connector = intel_dp_add_mst_connector,
	.register_connector = intel_dp_register_mst_connector,
	.destroy_connector = intel_dp_destroy_mst_connector,
	.hotplug = intel_dp_mst_hotplug,
};

static struct intel_dp_mst_encoder *
intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
{
	struct intel_dp_mst_encoder *intel_mst;
	struct intel_encoder *intel_encoder;
	struct drm_device *dev = intel_dig_port->base.base.dev;

	intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);

	if (!intel_mst)
		return NULL;

	intel_mst->pipe = pipe;
	intel_encoder = &intel_mst->base;
	intel_mst->primary = intel_dig_port;

	drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
			 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));

	intel_encoder->type = INTEL_OUTPUT_DP_MST;
	intel_encoder->crtc_mask = 0x7;
	intel_encoder->cloneable = 0;

	intel_encoder->compute_config = intel_dp_mst_compute_config;
	intel_encoder->disable = intel_mst_disable_dp;
	intel_encoder->post_disable = intel_mst_post_disable_dp;
	intel_encoder->pre_enable = intel_mst_pre_enable_dp;
	intel_encoder->enable = intel_mst_enable_dp;
	intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
	intel_encoder->get_config = intel_dp_mst_enc_get_config;

	return intel_mst;

}

static bool
intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
{
	int i;
	struct intel_dp *intel_dp = &intel_dig_port->dp;

	for (i = PIPE_A; i <= PIPE_C; i++)
		intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
	return true;
}

int
intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
{
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct drm_device *dev = intel_dig_port->base.base.dev;
	int ret;

	intel_dp->can_mst = true;
	intel_dp->mst_mgr.cbs = &mst_cbs;

	/* create encoders */
	intel_dp_create_fake_mst_encoders(intel_dig_port);
	ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
	if (ret) {
		intel_dp->can_mst = false;
		return ret;
	}
	return 0;
}

void
intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
{
	struct intel_dp *intel_dp = &intel_dig_port->dp;

	if (!intel_dp->can_mst)
		return;

	drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
	/* encoders will get killed by normal cleanup */
}
Commit	Line	Data
0e32b39c DA	1	/*
	2	* Copyright © 2008 Intel Corporation
	3	* 2014 Red Hat Inc.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
	22	* IN THE SOFTWARE.
	23	*
	24	*/
	25
	26	#include <drm/drmP.h>
	27	#include "i915_drv.h"
	28	#include "intel_drv.h"
c6f95f27	29	#include <drm/drm_atomic_helper.h>
0e32b39c DA	30	#include <drm/drm_crtc_helper.h>
	31	#include <drm/drm_edid.h>
	32
	33	static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
0a478c27 ML	34	struct intel_crtc_state *pipe_config,
0a478c27 ML	35	struct drm_connector_state *conn_state)
0e32b39c DA	36	{
	37	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	38	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	39	struct intel_dp *intel_dp = &intel_dig_port->dp;
e75f4771	40	struct drm_atomic_state *state;
1189e4f4	41	int bpp;
04a60f9f	42	int lane_count, slots;
7c5f93b0	43	const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
0e32b39c DA	44	int mst_pbn;
	45
	46	pipe_config->dp_encoder_is_mst = true;
	47	pipe_config->has_pch_encoder = false;
0e32b39c DA	48	bpp = 24;
	49	/*
	50	* for MST we always configure max link bw - the spec doesn't
	51	* seem to suggest we should do otherwise.
	52	*/
	53	lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
ed4e9c1d	54
90a6b7b0	55	pipe_config->lane_count = lane_count;
0e32b39c DA	56
0e32b39c DA	57	pipe_config->pipe_bpp = 24;
04a60f9f	58	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
0e32b39c	59
e75f4771 ACO	60	state = pipe_config->base.state;
e75f4771 ACO	61
aad941d5	62	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
0e32b39c DA	63
	64	pipe_config->pbn = mst_pbn;
	65	slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
	66
	67	intel_link_compute_m_n(bpp, lane_count,
	68	adjusted_mode->crtc_clock,
	69	pipe_config->port_clock,
	70	&pipe_config->dp_m_n);
	71
	72	pipe_config->dp_m_n.tu = slots;
6fa2d197	73
0e32b39c DA	74	return true;
	75
	76	}
	77
fd6bbda9 ML	78	static void intel_mst_disable_dp(struct intel_encoder *encoder,
	79	struct intel_crtc_state *old_crtc_state,
	80	struct drm_connector_state *old_conn_state)
0e32b39c DA	81	{
	82	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	83	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	84	struct intel_dp *intel_dp = &intel_dig_port->dp;
1e7bfa0b ML	85	struct intel_connector *connector =
1e7bfa0b ML	86	to_intel_connector(old_conn_state->connector);
0e32b39c DA	87	int ret;
0e32b39c DA	88
19e0b4ca	89	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
0e32b39c	90
1e7bfa0b	91	drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
0e32b39c DA	92
	93	ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
	94	if (ret) {
	95	DRM_ERROR("failed to update payload %d\n", ret);
	96	}
	97	}
	98
fd6bbda9 ML	99	static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
	100	struct intel_crtc_state *old_crtc_state,
	101	struct drm_connector_state *old_conn_state)
0e32b39c DA	102	{
	103	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	104	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	105	struct intel_dp *intel_dp = &intel_dig_port->dp;
1e7bfa0b ML	106	struct intel_connector *connector =
1e7bfa0b ML	107	to_intel_connector(old_conn_state->connector);
0e32b39c	108
19e0b4ca	109	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
0e32b39c DA	110
	111	/* this can fail */
	112	drm_dp_check_act_status(&intel_dp->mst_mgr);
	113	/* and this can also fail */
	114	drm_dp_update_payload_part2(&intel_dp->mst_mgr);
	115
1e7bfa0b	116	drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
0e32b39c	117
19e0b4ca	118	intel_dp->active_mst_links--;
0552f765 DA	119
0552f765 DA	120	intel_mst->connector = NULL;
19e0b4ca	121	if (intel_dp->active_mst_links == 0) {
fd6bbda9 ML	122	intel_dig_port->base.post_disable(&intel_dig_port->base,
	123	NULL, NULL);
	124
0e32b39c DA	125	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
	126	}
	127	}
	128
fd6bbda9 ML	129	static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
	130	struct intel_crtc_state *pipe_config,
	131	struct drm_connector_state *conn_state)
0e32b39c DA	132	{
	133	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	134	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	135	struct intel_dp *intel_dp = &intel_dig_port->dp;
1e7bfa0b	136	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
0e32b39c	137	enum port port = intel_dig_port->port;
1e7bfa0b ML	138	struct intel_connector *connector =
1e7bfa0b ML	139	to_intel_connector(conn_state->connector);
0e32b39c DA	140	int ret;
0e32b39c DA	141	uint32_t temp;
0e32b39c	142	int slots;
0e32b39c	143
e85376cb ML	144	/* MST encoders are bound to a crtc, not to a connector,
	145	* force the mapping here for get_hw_state.
	146	*/
1e7bfa0b ML	147	connector->encoder = encoder;
1e7bfa0b ML	148	intel_mst->connector = connector;
e85376cb	149
19e0b4ca	150	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
0552f765	151
19e0b4ca	152	if (intel_dp->active_mst_links == 0) {
c856052a ACO	153	intel_ddi_clk_select(&intel_dig_port->base,
c856052a ACO	154	pipe_config->shared_dpll);
0e32b39c	155
32bdc400	156	intel_prepare_dp_ddi_buffers(&intel_dig_port->base);
dfa10480 ACO	157	intel_dp_set_link_params(intel_dp,
	158	pipe_config->port_clock,
	159	pipe_config->lane_count,
	160	true);
901c2daf	161
0e32b39c DA	162	intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
	163
	164	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
	165
0e32b39c	166	intel_dp_start_link_train(intel_dp);
0e32b39c DA	167	intel_dp_stop_link_train(intel_dp);
	168	}
	169
	170	ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
1e7bfa0b ML	171	connector->port,
1e7bfa0b ML	172	pipe_config->pbn, &slots);
0e32b39c DA	173	if (ret == false) {
	174	DRM_ERROR("failed to allocate vcpi\n");
	175	return;
	176	}
	177
	178
19e0b4ca	179	intel_dp->active_mst_links++;
0e32b39c DA	180	temp = I915_READ(DP_TP_STATUS(port));
	181	I915_WRITE(DP_TP_STATUS(port), temp);
	182
	183	ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
	184	}
	185
fd6bbda9 ML	186	static void intel_mst_enable_dp(struct intel_encoder *encoder,
	187	struct intel_crtc_state *pipe_config,
	188	struct drm_connector_state *conn_state)
0e32b39c DA	189	{
	190	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	191	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	192	struct intel_dp *intel_dp = &intel_dig_port->dp;
1e7bfa0b	193	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
0e32b39c DA	194	enum port port = intel_dig_port->port;
	195	int ret;
	196
19e0b4ca	197	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
0e32b39c	198
3016a31f CW	199	if (intel_wait_for_register(dev_priv,
	200	DP_TP_STATUS(port),
	201	DP_TP_STATUS_ACT_SENT,
	202	DP_TP_STATUS_ACT_SENT,
	203	1))
0e32b39c DA	204	DRM_ERROR("Timed out waiting for ACT sent\n");
	205
	206	ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
	207
	208	ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
	209	}
	210
	211	static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
	212	enum pipe *pipe)
	213	{
	214	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	215	*pipe = intel_mst->pipe;
0552f765	216	if (intel_mst->connector)
0e32b39c DA	217	return true;
	218	return false;
	219	}
	220
	221	static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
5cec258b	222	struct intel_crtc_state *pipe_config)
0e32b39c DA	223	{
	224	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	225	struct intel_digital_port *intel_dig_port = intel_mst->primary;
1e7bfa0b ML	226	struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
1e7bfa0b ML	227	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
0cb09a97	228	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
0e32b39c DA	229	u32 temp, flags = 0;
0e32b39c DA	230
0e32b39c DA	231	temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
	232	if (temp & TRANS_DDI_PHSYNC)
	233	flags \|= DRM_MODE_FLAG_PHSYNC;
	234	else
	235	flags \|= DRM_MODE_FLAG_NHSYNC;
	236	if (temp & TRANS_DDI_PVSYNC)
	237	flags \|= DRM_MODE_FLAG_PVSYNC;
	238	else
	239	flags \|= DRM_MODE_FLAG_NVSYNC;
	240
	241	switch (temp & TRANS_DDI_BPC_MASK) {
	242	case TRANS_DDI_BPC_6:
	243	pipe_config->pipe_bpp = 18;
	244	break;
	245	case TRANS_DDI_BPC_8:
	246	pipe_config->pipe_bpp = 24;
	247	break;
	248	case TRANS_DDI_BPC_10:
	249	pipe_config->pipe_bpp = 30;
	250	break;
	251	case TRANS_DDI_BPC_12:
	252	pipe_config->pipe_bpp = 36;
	253	break;
	254	default:
	255	break;
	256	}
2d112de7	257	pipe_config->base.adjusted_mode.flags \|= flags;
90a6b7b0 VS	258
	259	pipe_config->lane_count =
	260	((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
	261
0e32b39c DA	262	intel_dp_get_m_n(crtc, pipe_config);
	263
	264	intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
	265	}
	266
	267	static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
	268	{
	269	struct intel_connector *intel_connector = to_intel_connector(connector);
	270	struct intel_dp *intel_dp = intel_connector->mst_port;
	271	struct edid *edid;
	272	int ret;
	273
0552f765 DA	274	if (!intel_dp) {
	275	return intel_connector_update_modes(connector, NULL);
	276	}
0e32b39c	277
0552f765	278	edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
0e32b39c DA	279	ret = intel_connector_update_modes(connector, edid);
	280	kfree(edid);
	281
	282	return ret;
	283	}
	284
	285	static enum drm_connector_status
f7f3d48a	286	intel_dp_mst_detect(struct drm_connector *connector, bool force)
0e32b39c DA	287	{
	288	struct intel_connector *intel_connector = to_intel_connector(connector);
	289	struct intel_dp *intel_dp = intel_connector->mst_port;
	290
0552f765 DA	291	if (!intel_dp)
0552f765 DA	292	return connector_status_disconnected;
c6a0aed4	293	return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
0e32b39c DA	294	}
0e32b39c DA	295
0e32b39c DA	296	static int
	297	intel_dp_mst_set_property(struct drm_connector *connector,
	298	struct drm_property *property,
	299	uint64_t val)
	300	{
	301	return 0;
	302	}
	303
	304	static void
	305	intel_dp_mst_connector_destroy(struct drm_connector *connector)
	306	{
	307	struct intel_connector *intel_connector = to_intel_connector(connector);
	308
	309	if (!IS_ERR_OR_NULL(intel_connector->edid))
	310	kfree(intel_connector->edid);
	311
	312	drm_connector_cleanup(connector);
	313	kfree(connector);
	314	}
	315
	316	static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
4d688a2a	317	.dpms = drm_atomic_helper_connector_dpms,
0e32b39c DA	318	.detect = intel_dp_mst_detect,
	319	.fill_modes = drm_helper_probe_single_connector_modes,
	320	.set_property = intel_dp_mst_set_property,
2545e4a6	321	.atomic_get_property = intel_connector_atomic_get_property,
1ebaa0b9	322	.late_register = intel_connector_register,
c191eca1	323	.early_unregister = intel_connector_unregister,
0e32b39c	324	.destroy = intel_dp_mst_connector_destroy,
c6f95f27	325	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
98969725	326	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
0e32b39c DA	327	};
	328
	329	static int intel_dp_mst_get_modes(struct drm_connector *connector)
	330	{
	331	return intel_dp_mst_get_ddc_modes(connector);
	332	}
	333
	334	static enum drm_mode_status
	335	intel_dp_mst_mode_valid(struct drm_connector *connector,
	336	struct drm_display_mode *mode)
	337	{
832d5bfd MK	338	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
832d5bfd MK	339
0e32b39c DA	340	/* TODO - validate mode against available PBN for link */
	341	if (mode->clock < 10000)
	342	return MODE_CLOCK_LOW;
	343
	344	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
	345	return MODE_H_ILLEGAL;
	346
832d5bfd MK	347	if (mode->clock > max_dotclk)
	348	return MODE_CLOCK_HIGH;
	349
0e32b39c DA	350	return MODE_OK;
	351	}
	352
459485ad DV	353	static struct drm_encoder intel_mst_atomic_best_encoder(struct drm_connector connector,
	354	struct drm_connector_state *state)
	355	{
	356	struct intel_connector *intel_connector = to_intel_connector(connector);
	357	struct intel_dp *intel_dp = intel_connector->mst_port;
	358	struct intel_crtc *crtc = to_intel_crtc(state->crtc);
	359
0552f765 DA	360	if (!intel_dp)
0552f765 DA	361	return NULL;
459485ad DV	362	return &intel_dp->mst_encoders[crtc->pipe]->base.base;
	363	}
	364
0e32b39c DA	365	static struct drm_encoder intel_mst_best_encoder(struct drm_connector connector)
	366	{
	367	struct intel_connector *intel_connector = to_intel_connector(connector);
	368	struct intel_dp *intel_dp = intel_connector->mst_port;
0552f765 DA	369	if (!intel_dp)
0552f765 DA	370	return NULL;
0e32b39c DA	371	return &intel_dp->mst_encoders[0]->base.base;
	372	}
	373
	374	static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
	375	.get_modes = intel_dp_mst_get_modes,
	376	.mode_valid = intel_dp_mst_mode_valid,
459485ad	377	.atomic_best_encoder = intel_mst_atomic_best_encoder,
0e32b39c DA	378	.best_encoder = intel_mst_best_encoder,
	379	};
	380
	381	static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
	382	{
	383	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
	384
	385	drm_encoder_cleanup(encoder);
	386	kfree(intel_mst);
	387	}
	388
	389	static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
	390	.destroy = intel_dp_mst_encoder_destroy,
	391	};
	392
	393	static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
	394	{
e85376cb	395	if (connector->encoder && connector->base.state->crtc) {
0e32b39c DA	396	enum pipe pipe;
	397	if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
	398	return false;
	399	return true;
	400	}
	401	return false;
	402	}
	403
7296c849 CW	404	static void intel_connector_add_to_fbdev(struct intel_connector *connector)
7296c849 CW	405	{
0695726e	406	#ifdef CONFIG_DRM_FBDEV_EMULATION
7296c849	407	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
54632abe LW	408
	409	if (dev_priv->fbdev)
	410	drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
	411	&connector->base);
7296c849 CW	412	#endif
	413	}
	414
	415	static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
	416	{
0695726e	417	#ifdef CONFIG_DRM_FBDEV_EMULATION
7296c849	418	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
54632abe LW	419
	420	if (dev_priv->fbdev)
	421	drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
	422	&connector->base);
7296c849 CW	423	#endif
	424	}
	425
12e6cecd	426	static struct drm_connector intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr mgr, struct drm_dp_mst_port port, const char pathprop)
0e32b39c DA	427	{
	428	struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
	429	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
	430	struct drm_device *dev = intel_dig_port->base.base.dev;
0e32b39c DA	431	struct intel_connector *intel_connector;
	432	struct drm_connector *connector;
	433	int i;
	434
9bdbd0b9	435	intel_connector = intel_connector_alloc();
0e32b39c DA	436	if (!intel_connector)
	437	return NULL;
	438
	439	connector = &intel_connector->base;
	440	drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
	441	drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
	442
0e32b39c DA	443	intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
	444	intel_connector->mst_port = intel_dp;
	445	intel_connector->port = port;
	446
	447	for (i = PIPE_A; i <= PIPE_C; i++) {
	448	drm_mode_connector_attach_encoder(&intel_connector->base,
	449	&intel_dp->mst_encoders[i]->base.base);
	450	}
	451	intel_dp_add_properties(intel_dp, connector);
	452
	453	drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
6f134d7b DA	454	drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
6f134d7b DA	455
0e32b39c	456	drm_mode_connector_set_path_property(connector, pathprop);
d9515c5e DA	457	return connector;
	458	}
	459
	460	static void intel_dp_register_mst_connector(struct drm_connector *connector)
	461	{
	462	struct intel_connector *intel_connector = to_intel_connector(connector);
	463	struct drm_device *dev = connector->dev;
7a418e34	464
8bb4da1d	465	drm_modeset_lock_all(dev);
7296c849	466	intel_connector_add_to_fbdev(intel_connector);
8bb4da1d	467	drm_modeset_unlock_all(dev);
7a418e34	468
0e32b39c	469	drm_connector_register(&intel_connector->base);
0e32b39c DA	470	}
	471
	472	static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
	473	struct drm_connector *connector)
	474	{
	475	struct intel_connector *intel_connector = to_intel_connector(connector);
	476	struct drm_device *dev = connector->dev;
20fae983	477
c191eca1	478	drm_connector_unregister(connector);
1f771755	479
0e32b39c	480	/* need to nuke the connector */
8bb4da1d	481	drm_modeset_lock_all(dev);
7296c849	482	intel_connector_remove_from_fbdev(intel_connector);
0552f765	483	intel_connector->mst_port = NULL;
8bb4da1d	484	drm_modeset_unlock_all(dev);
0e32b39c	485
0552f765	486	drm_connector_unreference(&intel_connector->base);
0e32b39c DA	487	DRM_DEBUG_KMS("\n");
	488	}
	489
	490	static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
	491	{
	492	struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
	493	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
	494	struct drm_device *dev = intel_dig_port->base.base.dev;
	495
	496	drm_kms_helper_hotplug_event(dev);
	497	}
	498
69a0f89c	499	static const struct drm_dp_mst_topology_cbs mst_cbs = {
0e32b39c	500	.add_connector = intel_dp_add_mst_connector,
d9515c5e	501	.register_connector = intel_dp_register_mst_connector,
0e32b39c DA	502	.destroy_connector = intel_dp_destroy_mst_connector,
	503	.hotplug = intel_dp_mst_hotplug,
	504	};
	505
	506	static struct intel_dp_mst_encoder *
	507	intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
	508	{
	509	struct intel_dp_mst_encoder *intel_mst;
	510	struct intel_encoder *intel_encoder;
	511	struct drm_device *dev = intel_dig_port->base.base.dev;
	512
	513	intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
	514
	515	if (!intel_mst)
	516	return NULL;
	517
	518	intel_mst->pipe = pipe;
	519	intel_encoder = &intel_mst->base;
	520	intel_mst->primary = intel_dig_port;
	521
	522	drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
580d8ed5	523	DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
0e32b39c DA	524
	525	intel_encoder->type = INTEL_OUTPUT_DP_MST;
	526	intel_encoder->crtc_mask = 0x7;
	527	intel_encoder->cloneable = 0;
	528
	529	intel_encoder->compute_config = intel_dp_mst_compute_config;
	530	intel_encoder->disable = intel_mst_disable_dp;
	531	intel_encoder->post_disable = intel_mst_post_disable_dp;
	532	intel_encoder->pre_enable = intel_mst_pre_enable_dp;
	533	intel_encoder->enable = intel_mst_enable_dp;
	534	intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
	535	intel_encoder->get_config = intel_dp_mst_enc_get_config;
	536
	537	return intel_mst;
	538
	539	}
	540
	541	static bool
	542	intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
	543	{
	544	int i;
	545	struct intel_dp *intel_dp = &intel_dig_port->dp;
	546
	547	for (i = PIPE_A; i <= PIPE_C; i++)
	548	intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
	549	return true;
	550	}
	551
	552	int
	553	intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
	554	{
	555	struct intel_dp *intel_dp = &intel_dig_port->dp;
	556	struct drm_device *dev = intel_dig_port->base.base.dev;
	557	int ret;
	558
	559	intel_dp->can_mst = true;
	560	intel_dp->mst_mgr.cbs = &mst_cbs;
	561
	562	/* create encoders */
	563	intel_dp_create_fake_mst_encoders(intel_dig_port);
	564	ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
	565	if (ret) {
	566	intel_dp->can_mst = false;
	567	return ret;
	568	}
	569	return 0;
	570	}
	571
	572	void
	573	intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
	574	{
	575	struct intel_dp *intel_dp = &intel_dig_port->dp;
	576
	577	if (!intel_dp->can_mst)
	578	return;
	579
	580	drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
	581	/* encoders will get killed by normal cleanup */
	582	}