projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| c8afe684 RC |
1 | /* |
| 2 | * Copyright (C) 2013 Red Hat | |
| 3 | * Author: Rob Clark <robdclark@gmail.com> | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or modify it | |
| 6 | * under the terms of the GNU General Public License version 2 as published by | |
| 7 | * the Free Software Foundation. | |
| 8 | * | |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 12 | * more details. | |
| 13 | * | |
| 14 | * You should have received a copy of the GNU General Public License along with | |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
| 16 | */ | |
| 17 | ||
| 18 | #include "hdmi.h" | |
| 19 | ||
| c8afe684 | 20 | static void hdmi_phy_8960_powerup(struct hdmi_phy *phy, |
| ba3d7bf3 | 21 | unsigned long int pixclock) |
| c8afe684 | 22 | { |
| 034fbcc3 RC |
23 | DBG("pixclock: %lu", pixclock); |
| 24 | ||
| ba3d7bf3 AT |
25 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x00); |
| 26 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG0, 0x1b); | |
| 27 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG1, 0xf2); | |
| 28 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG4, 0x00); | |
| 29 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG5, 0x00); | |
| 30 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG6, 0x00); | |
| 31 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG7, 0x00); | |
| 32 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG8, 0x00); | |
| 33 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG9, 0x00); | |
| 34 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG10, 0x00); | |
| 35 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG11, 0x00); | |
| 36 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG3, 0x20); | |
| c8afe684 RC |
37 | } |
| 38 | ||
| 39 | static void hdmi_phy_8960_powerdown(struct hdmi_phy *phy) | |
| 40 | { | |
| 034fbcc3 RC |
41 | DBG(""); |
| 42 | ||
| ba3d7bf3 | 43 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x7f); |
| c8afe684 RC |
44 | } |
| 45 | ||
| 15b4a452 AT |
46 | static const char * const hdmi_phy_8960_reg_names[] = { |
| 47 | "core-vdda", | |
| 48 | }; | |
| 49 | ||
| 50 | static const char * const hdmi_phy_8960_clk_names[] = { | |
| 51 | "slave_iface_clk", | |
| 52 | }; | |
| 53 | ||
| fcda50c8 | 54 | const struct hdmi_phy_cfg msm_hdmi_phy_8960_cfg = { |
| 15b4a452 AT |
55 | .type = MSM_HDMI_PHY_8960, |
| 56 | .powerup = hdmi_phy_8960_powerup, | |
| 57 | .powerdown = hdmi_phy_8960_powerdown, | |
| 58 | .reg_names = hdmi_phy_8960_reg_names, | |
| 59 | .num_regs = ARRAY_SIZE(hdmi_phy_8960_reg_names), | |
| 60 | .clk_names = hdmi_phy_8960_clk_names, | |
| 61 | .num_clks = ARRAY_SIZE(hdmi_phy_8960_clk_names), | |
| 62 | }; |