windows-nat: Don't change current_event.dwThreadId in handle_output_debug_string()
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
32d0add0 3 Copyright (C) 1986-2015 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
c906108c 42
369aa520
RC
43static int hppa_debug = 0;
44
60383d10 45/* Some local constants. */
3ff7cf9e
JB
46static const int hppa32_num_regs = 128;
47static const int hppa64_num_regs = 96;
48
61a12cfa
JK
49/* We use the objfile->obj_private pointer for two things:
50 * 1. An unwind table;
51 *
52 * 2. A pointer to any associated shared library object.
53 *
54 * #defines are used to help refer to these objects.
55 */
56
57/* Info about the unwind table associated with an object file.
58 * This is hung off of the "objfile->obj_private" pointer, and
59 * is allocated in the objfile's psymbol obstack. This allows
60 * us to have unique unwind info for each executable and shared
61 * library that we are debugging.
62 */
63struct hppa_unwind_info
64 {
65 struct unwind_table_entry *table; /* Pointer to unwind info */
66 struct unwind_table_entry *cache; /* Pointer to last entry we found */
67 int last; /* Index of last entry */
68 };
69
70struct hppa_objfile_private
71 {
72 struct hppa_unwind_info *unwind_info; /* a pointer */
73 struct so_list *so_info; /* a pointer */
74 CORE_ADDR dp;
75
76 int dummy_call_sequence_reg;
77 CORE_ADDR dummy_call_sequence_addr;
78 };
79
7c46b9fb
RC
80/* hppa-specific object data -- unwind and solib info.
81 TODO/maybe: think about splitting this into two parts; the unwind data is
82 common to all hppa targets, but is only used in this file; we can register
83 that separately and make this static. The solib data is probably hpux-
84 specific, so we can create a separate extern objfile_data that is registered
85 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
61a12cfa 86static const struct objfile_data *hppa_objfile_priv_data = NULL;
7c46b9fb 87
1777feb0 88/* Get at various relevent fields of an instruction word. */
e2ac8128
JB
89#define MASK_5 0x1f
90#define MASK_11 0x7ff
91#define MASK_14 0x3fff
92#define MASK_21 0x1fffff
93
e2ac8128
JB
94/* Sizes (in bytes) of the native unwind entries. */
95#define UNWIND_ENTRY_SIZE 16
96#define STUB_UNWIND_ENTRY_SIZE 8
97
c906108c 98/* Routines to extract various sized constants out of hppa
1777feb0 99 instructions. */
c906108c
SS
100
101/* This assumes that no garbage lies outside of the lower bits of
1777feb0 102 value. */
c906108c 103
63807e1d 104static int
abc485a1 105hppa_sign_extend (unsigned val, unsigned bits)
c906108c 106{
c5aa993b 107 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
108}
109
1777feb0 110/* For many immediate values the sign bit is the low bit! */
c906108c 111
63807e1d 112static int
abc485a1 113hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 114{
c5aa993b 115 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
116}
117
e2ac8128 118/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 119 (MSB = 0). */
e2ac8128 120
abc485a1
RC
121int
122hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
123{
124 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
125}
126
1777feb0 127/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 128
abc485a1
RC
129int
130hppa_extract_5_load (unsigned word)
c906108c 131{
abc485a1 132 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
133}
134
1777feb0 135/* Extract the immediate field from a break instruction. */
c906108c 136
abc485a1
RC
137unsigned
138hppa_extract_5r_store (unsigned word)
c906108c
SS
139{
140 return (word & MASK_5);
141}
142
1777feb0 143/* Extract the immediate field from a {sr}sm instruction. */
c906108c 144
abc485a1
RC
145unsigned
146hppa_extract_5R_store (unsigned word)
c906108c
SS
147{
148 return (word >> 16 & MASK_5);
149}
150
1777feb0 151/* Extract a 14 bit immediate field. */
c906108c 152
abc485a1
RC
153int
154hppa_extract_14 (unsigned word)
c906108c 155{
abc485a1 156 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
157}
158
1777feb0 159/* Extract a 21 bit constant. */
c906108c 160
abc485a1
RC
161int
162hppa_extract_21 (unsigned word)
c906108c
SS
163{
164 int val;
165
166 word &= MASK_21;
167 word <<= 11;
abc485a1 168 val = hppa_get_field (word, 20, 20);
c906108c 169 val <<= 11;
abc485a1 170 val |= hppa_get_field (word, 9, 19);
c906108c 171 val <<= 2;
abc485a1 172 val |= hppa_get_field (word, 5, 6);
c906108c 173 val <<= 5;
abc485a1 174 val |= hppa_get_field (word, 0, 4);
c906108c 175 val <<= 2;
abc485a1
RC
176 val |= hppa_get_field (word, 7, 8);
177 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
178}
179
c906108c 180/* extract a 17 bit constant from branch instructions, returning the
1777feb0 181 19 bit signed value. */
c906108c 182
abc485a1
RC
183int
184hppa_extract_17 (unsigned word)
c906108c 185{
abc485a1
RC
186 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
187 hppa_get_field (word, 29, 29) << 10 |
188 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
189 (word & 0x1) << 16, 17) << 2;
190}
3388d7ff
RC
191
192CORE_ADDR
193hppa_symbol_address(const char *sym)
194{
3b7344d5 195 struct bound_minimal_symbol minsym;
3388d7ff
RC
196
197 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 198 if (minsym.minsym)
77e371c0 199 return BMSYMBOL_VALUE_ADDRESS (minsym);
3388d7ff
RC
200 else
201 return (CORE_ADDR)-1;
202}
77d18ded 203
61a12cfa 204static struct hppa_objfile_private *
77d18ded
RC
205hppa_init_objfile_priv_data (struct objfile *objfile)
206{
207 struct hppa_objfile_private *priv;
208
209 priv = (struct hppa_objfile_private *)
210 obstack_alloc (&objfile->objfile_obstack,
211 sizeof (struct hppa_objfile_private));
212 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
213 memset (priv, 0, sizeof (*priv));
214
215 return priv;
216}
c906108c
SS
217\f
218
219/* Compare the start address for two unwind entries returning 1 if
220 the first address is larger than the second, -1 if the second is
221 larger than the first, and zero if they are equal. */
222
223static int
fba45db2 224compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
225{
226 const struct unwind_table_entry *a = arg1;
227 const struct unwind_table_entry *b = arg2;
228
229 if (a->region_start > b->region_start)
230 return 1;
231 else if (a->region_start < b->region_start)
232 return -1;
233 else
234 return 0;
235}
236
53a5351d 237static void
fdd72f95 238record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 239{
fdd72f95 240 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 241 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
242 {
243 bfd_vma value = section->vma - section->filepos;
244 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
245
246 if (value < *low_text_segment_address)
247 *low_text_segment_address = value;
248 }
53a5351d
JM
249}
250
c906108c 251static void
fba45db2 252internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 253 asection *section, unsigned int entries,
241fd515 254 size_t size, CORE_ADDR text_offset)
c906108c
SS
255{
256 /* We will read the unwind entries into temporary memory, then
257 fill in the actual unwind table. */
fdd72f95 258
c906108c
SS
259 if (size > 0)
260 {
5db8bbe5 261 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
262 unsigned long tmp;
263 unsigned i;
264 char *buf = alloca (size);
fdd72f95 265 CORE_ADDR low_text_segment_address;
c906108c 266
fdd72f95 267 /* For ELF targets, then unwinds are supposed to
1777feb0 268 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
269
270 Note that when loading a shared library (text_offset != 0) the
271 unwinds are already relative to the text_offset that will be
272 passed in. */
5db8bbe5 273 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 274 {
fdd72f95
RC
275 low_text_segment_address = -1;
276
53a5351d 277 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
278 record_text_segment_lowaddr,
279 &low_text_segment_address);
53a5351d 280
fdd72f95 281 text_offset = low_text_segment_address;
53a5351d 282 }
5db8bbe5 283 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 284 {
5db8bbe5 285 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 286 }
53a5351d 287
c906108c
SS
288 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
289
290 /* Now internalize the information being careful to handle host/target
c5aa993b 291 endian issues. */
c906108c
SS
292 for (i = 0; i < entries; i++)
293 {
294 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 295 (bfd_byte *) buf);
c906108c
SS
296 table[i].region_start += text_offset;
297 buf += 4;
c5aa993b 298 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
299 table[i].region_end += text_offset;
300 buf += 4;
c5aa993b 301 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
302 buf += 4;
303 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
304 table[i].Millicode = (tmp >> 30) & 0x1;
305 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
306 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 307 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
308 table[i].Entry_SR = (tmp >> 25) & 0x1;
309 table[i].Entry_FR = (tmp >> 21) & 0xf;
310 table[i].Entry_GR = (tmp >> 16) & 0x1f;
311 table[i].Args_stored = (tmp >> 15) & 0x1;
312 table[i].Variable_Frame = (tmp >> 14) & 0x1;
313 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
314 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
315 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
316 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 317 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
318 table[i].cxx_info = (tmp >> 8) & 0x1;
319 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
320 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 321 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
322 table[i].Save_SP = (tmp >> 4) & 0x1;
323 table[i].Save_RP = (tmp >> 3) & 0x1;
324 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 325 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 326 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 327 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
328 buf += 4;
329 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
330 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
331 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
332 table[i].alloca_frame = (tmp >> 28) & 0x1;
333 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
334 table[i].Total_frame_size = tmp & 0x7ffffff;
335
1777feb0 336 /* Stub unwinds are handled elsewhere. */
c906108c
SS
337 table[i].stub_unwind.stub_type = 0;
338 table[i].stub_unwind.padding = 0;
339 }
340 }
341}
342
343/* Read in the backtrace information stored in the `$UNWIND_START$' section of
344 the object file. This info is used mainly by find_unwind_entry() to find
345 out the stack frame size and frame pointer used by procedures. We put
346 everything on the psymbol obstack in the objfile so that it automatically
347 gets freed when the objfile is destroyed. */
348
349static void
fba45db2 350read_unwind_info (struct objfile *objfile)
c906108c 351{
d4f3574e 352 asection *unwind_sec, *stub_unwind_sec;
241fd515 353 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 354 unsigned index, unwind_entries;
c906108c
SS
355 unsigned stub_entries, total_entries;
356 CORE_ADDR text_offset;
7c46b9fb
RC
357 struct hppa_unwind_info *ui;
358 struct hppa_objfile_private *obj_private;
c906108c 359
a99dad3d 360 text_offset = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
7c46b9fb
RC
361 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
362 sizeof (struct hppa_unwind_info));
c906108c
SS
363
364 ui->table = NULL;
365 ui->cache = NULL;
366 ui->last = -1;
367
d4f3574e
SS
368 /* For reasons unknown the HP PA64 tools generate multiple unwinder
369 sections in a single executable. So we just iterate over every
370 section in the BFD looking for unwinder sections intead of trying
1777feb0 371 to do a lookup with bfd_get_section_by_name.
c906108c 372
d4f3574e
SS
373 First determine the total size of the unwind tables so that we
374 can allocate memory in a nice big hunk. */
375 total_entries = 0;
376 for (unwind_sec = objfile->obfd->sections;
377 unwind_sec;
378 unwind_sec = unwind_sec->next)
c906108c 379 {
d4f3574e
SS
380 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
381 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
382 {
383 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
384 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 385
d4f3574e
SS
386 total_entries += unwind_entries;
387 }
c906108c
SS
388 }
389
d4f3574e 390 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 391 use stub unwinds at the current time. */
d4f3574e
SS
392 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
393
c906108c
SS
394 if (stub_unwind_sec)
395 {
396 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
397 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
398 }
399 else
400 {
401 stub_unwind_size = 0;
402 stub_entries = 0;
403 }
404
405 /* Compute total number of unwind entries and their total size. */
d4f3574e 406 total_entries += stub_entries;
c906108c
SS
407 total_size = total_entries * sizeof (struct unwind_table_entry);
408
409 /* Allocate memory for the unwind table. */
410 ui->table = (struct unwind_table_entry *)
8b92e4d5 411 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 412 ui->last = total_entries - 1;
c906108c 413
d4f3574e
SS
414 /* Now read in each unwind section and internalize the standard unwind
415 entries. */
c906108c 416 index = 0;
d4f3574e
SS
417 for (unwind_sec = objfile->obfd->sections;
418 unwind_sec;
419 unwind_sec = unwind_sec->next)
420 {
421 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
422 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
423 {
424 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
425 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
426
427 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
428 unwind_entries, unwind_size, text_offset);
429 index += unwind_entries;
430 }
431 }
432
433 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
434 if (stub_unwind_size > 0)
435 {
436 unsigned int i;
437 char *buf = alloca (stub_unwind_size);
438
439 /* Read in the stub unwind entries. */
440 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
441 0, stub_unwind_size);
442
443 /* Now convert them into regular unwind entries. */
444 for (i = 0; i < stub_entries; i++, index++)
445 {
446 /* Clear out the next unwind entry. */
447 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
448
1777feb0 449 /* Convert offset & size into region_start and region_end.
c906108c
SS
450 Stuff away the stub type into "reserved" fields. */
451 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
452 (bfd_byte *) buf);
453 ui->table[index].region_start += text_offset;
454 buf += 4;
455 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 456 (bfd_byte *) buf);
c906108c
SS
457 buf += 2;
458 ui->table[index].region_end
c5aa993b
JM
459 = ui->table[index].region_start + 4 *
460 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
461 buf += 2;
462 }
463
464 }
465
466 /* Unwind table needs to be kept sorted. */
467 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
468 compare_unwind_entries);
469
470 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
471 obj_private = (struct hppa_objfile_private *)
472 objfile_data (objfile, hppa_objfile_priv_data);
473 if (obj_private == NULL)
77d18ded
RC
474 obj_private = hppa_init_objfile_priv_data (objfile);
475
c906108c
SS
476 obj_private->unwind_info = ui;
477}
478
479/* Lookup the unwind (stack backtrace) info for the given PC. We search all
480 of the objfiles seeking the unwind table entry for this PC. Each objfile
481 contains a sorted list of struct unwind_table_entry. Since we do a binary
482 search of the unwind tables, we depend upon them to be sorted. */
483
484struct unwind_table_entry *
fba45db2 485find_unwind_entry (CORE_ADDR pc)
c906108c
SS
486{
487 int first, middle, last;
488 struct objfile *objfile;
7c46b9fb 489 struct hppa_objfile_private *priv;
c906108c 490
369aa520 491 if (hppa_debug)
5af949e3
UW
492 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
493 hex_string (pc));
369aa520 494
1777feb0 495 /* A function at address 0? Not in HP-UX! */
c906108c 496 if (pc == (CORE_ADDR) 0)
369aa520
RC
497 {
498 if (hppa_debug)
499 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
500 return NULL;
501 }
c906108c
SS
502
503 ALL_OBJFILES (objfile)
c5aa993b 504 {
7c46b9fb 505 struct hppa_unwind_info *ui;
c5aa993b 506 ui = NULL;
7c46b9fb
RC
507 priv = objfile_data (objfile, hppa_objfile_priv_data);
508 if (priv)
509 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 510
c5aa993b
JM
511 if (!ui)
512 {
513 read_unwind_info (objfile);
7c46b9fb
RC
514 priv = objfile_data (objfile, hppa_objfile_priv_data);
515 if (priv == NULL)
8a3fe4f8 516 error (_("Internal error reading unwind information."));
7c46b9fb 517 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 518 }
c906108c 519
1777feb0 520 /* First, check the cache. */
c906108c 521
c5aa993b
JM
522 if (ui->cache
523 && pc >= ui->cache->region_start
524 && pc <= ui->cache->region_end)
369aa520
RC
525 {
526 if (hppa_debug)
5af949e3
UW
527 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
528 hex_string ((uintptr_t) ui->cache));
369aa520
RC
529 return ui->cache;
530 }
c906108c 531
1777feb0 532 /* Not in the cache, do a binary search. */
c906108c 533
c5aa993b
JM
534 first = 0;
535 last = ui->last;
c906108c 536
c5aa993b
JM
537 while (first <= last)
538 {
539 middle = (first + last) / 2;
540 if (pc >= ui->table[middle].region_start
541 && pc <= ui->table[middle].region_end)
542 {
543 ui->cache = &ui->table[middle];
369aa520 544 if (hppa_debug)
5af949e3
UW
545 fprintf_unfiltered (gdb_stdlog, "%s }\n",
546 hex_string ((uintptr_t) ui->cache));
c5aa993b
JM
547 return &ui->table[middle];
548 }
c906108c 549
c5aa993b
JM
550 if (pc < ui->table[middle].region_start)
551 last = middle - 1;
552 else
553 first = middle + 1;
554 }
555 } /* ALL_OBJFILES() */
369aa520
RC
556
557 if (hppa_debug)
558 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
559
c906108c
SS
560 return NULL;
561}
562
1fb24930 563/* The epilogue is defined here as the area either on the `bv' instruction
1777feb0 564 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
565
566 We do not assume that the epilogue is at the end of a function as we can
567 also have return sequences in the middle of a function. */
568static int
569hppa_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
570{
e17a4113 571 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
572 unsigned long status;
573 unsigned int inst;
e362b510 574 gdb_byte buf[4];
1fb24930 575
8defab1a 576 status = target_read_memory (pc, buf, 4);
1fb24930
RC
577 if (status != 0)
578 return 0;
579
e17a4113 580 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
581
582 /* The most common way to perform a stack adjustment ldo X(sp),sp
583 We are destroying a stack frame if the offset is negative. */
584 if ((inst & 0xffffc000) == 0x37de0000
585 && hppa_extract_14 (inst) < 0)
586 return 1;
587
588 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
589 if (((inst & 0x0fc010e0) == 0x0fc010e0
590 || (inst & 0x0fc010e0) == 0x0fc010e0)
591 && hppa_extract_14 (inst) < 0)
592 return 1;
593
594 /* bv %r0(%rp) or bv,n %r0(%rp) */
595 if (inst == 0xe840c000 || inst == 0xe840c002)
596 return 1;
597
598 return 0;
599}
600
85f4f2d8 601static const unsigned char *
67d57894 602hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 603{
56132691 604 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
605 (*len) = sizeof (breakpoint);
606 return breakpoint;
607}
608
e23457df
AC
609/* Return the name of a register. */
610
4a302917 611static const char *
d93859e2 612hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
613{
614 static char *names[] = {
615 "flags", "r1", "rp", "r3",
616 "r4", "r5", "r6", "r7",
617 "r8", "r9", "r10", "r11",
618 "r12", "r13", "r14", "r15",
619 "r16", "r17", "r18", "r19",
620 "r20", "r21", "r22", "r23",
621 "r24", "r25", "r26", "dp",
622 "ret0", "ret1", "sp", "r31",
623 "sar", "pcoqh", "pcsqh", "pcoqt",
624 "pcsqt", "eiem", "iir", "isr",
625 "ior", "ipsw", "goto", "sr4",
626 "sr0", "sr1", "sr2", "sr3",
627 "sr5", "sr6", "sr7", "cr0",
628 "cr8", "cr9", "ccr", "cr12",
629 "cr13", "cr24", "cr25", "cr26",
630 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
631 "fpsr", "fpe1", "fpe2", "fpe3",
632 "fpe4", "fpe5", "fpe6", "fpe7",
633 "fr4", "fr4R", "fr5", "fr5R",
634 "fr6", "fr6R", "fr7", "fr7R",
635 "fr8", "fr8R", "fr9", "fr9R",
636 "fr10", "fr10R", "fr11", "fr11R",
637 "fr12", "fr12R", "fr13", "fr13R",
638 "fr14", "fr14R", "fr15", "fr15R",
639 "fr16", "fr16R", "fr17", "fr17R",
640 "fr18", "fr18R", "fr19", "fr19R",
641 "fr20", "fr20R", "fr21", "fr21R",
642 "fr22", "fr22R", "fr23", "fr23R",
643 "fr24", "fr24R", "fr25", "fr25R",
644 "fr26", "fr26R", "fr27", "fr27R",
645 "fr28", "fr28R", "fr29", "fr29R",
646 "fr30", "fr30R", "fr31", "fr31R"
647 };
648 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
649 return NULL;
650 else
651 return names[i];
652}
653
4a302917 654static const char *
d93859e2 655hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
656{
657 static char *names[] = {
658 "flags", "r1", "rp", "r3",
659 "r4", "r5", "r6", "r7",
660 "r8", "r9", "r10", "r11",
661 "r12", "r13", "r14", "r15",
662 "r16", "r17", "r18", "r19",
663 "r20", "r21", "r22", "r23",
664 "r24", "r25", "r26", "dp",
665 "ret0", "ret1", "sp", "r31",
666 "sar", "pcoqh", "pcsqh", "pcoqt",
667 "pcsqt", "eiem", "iir", "isr",
668 "ior", "ipsw", "goto", "sr4",
669 "sr0", "sr1", "sr2", "sr3",
670 "sr5", "sr6", "sr7", "cr0",
671 "cr8", "cr9", "ccr", "cr12",
672 "cr13", "cr24", "cr25", "cr26",
673 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
674 "fpsr", "fpe1", "fpe2", "fpe3",
675 "fr4", "fr5", "fr6", "fr7",
676 "fr8", "fr9", "fr10", "fr11",
677 "fr12", "fr13", "fr14", "fr15",
678 "fr16", "fr17", "fr18", "fr19",
679 "fr20", "fr21", "fr22", "fr23",
680 "fr24", "fr25", "fr26", "fr27",
681 "fr28", "fr29", "fr30", "fr31"
682 };
683 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
684 return NULL;
685 else
686 return names[i];
687}
688
85c83e99 689/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 690static int
d3f73121 691hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 692{
85c83e99 693 /* The general registers and the sar are the same in both sets. */
1ef7fcb5
RC
694 if (reg <= 32)
695 return reg;
696
697 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 698 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
699 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
700
85c83e99 701 warning (_("Unmapped DWARF DBX Register #%d encountered."), reg);
1ef7fcb5
RC
702 return -1;
703}
704
79508e1e
AC
705/* This function pushes a stack frame with arguments as part of the
706 inferior function calling mechanism.
707
708 This is the version of the function for the 32-bit PA machines, in
709 which later arguments appear at lower addresses. (The stack always
710 grows towards higher addresses.)
711
712 We simply allocate the appropriate amount of stack space and put
713 arguments into their proper slots. */
714
4a302917 715static CORE_ADDR
7d9b040b 716hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
717 struct regcache *regcache, CORE_ADDR bp_addr,
718 int nargs, struct value **args, CORE_ADDR sp,
719 int struct_return, CORE_ADDR struct_addr)
720{
e17a4113
UW
721 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
722
79508e1e
AC
723 /* Stack base address at which any pass-by-reference parameters are
724 stored. */
725 CORE_ADDR struct_end = 0;
726 /* Stack base address at which the first parameter is stored. */
727 CORE_ADDR param_end = 0;
728
729 /* The inner most end of the stack after all the parameters have
730 been pushed. */
731 CORE_ADDR new_sp = 0;
732
733 /* Two passes. First pass computes the location of everything,
734 second pass writes the bytes out. */
735 int write_pass;
d49771ef
RC
736
737 /* Global pointer (r19) of the function we are trying to call. */
738 CORE_ADDR gp;
739
740 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
741
79508e1e
AC
742 for (write_pass = 0; write_pass < 2; write_pass++)
743 {
1797a8f6 744 CORE_ADDR struct_ptr = 0;
1777feb0 745 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
2a6228ef
RC
746 struct_ptr is adjusted for each argument below, so the first
747 argument will end up at sp-36. */
748 CORE_ADDR param_ptr = 32;
79508e1e 749 int i;
2a6228ef
RC
750 int small_struct = 0;
751
79508e1e
AC
752 for (i = 0; i < nargs; i++)
753 {
754 struct value *arg = args[i];
4991999e 755 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
756 /* The corresponding parameter that is pushed onto the
757 stack, and [possibly] passed in a register. */
948f8e3d 758 gdb_byte param_val[8];
79508e1e
AC
759 int param_len;
760 memset (param_val, 0, sizeof param_val);
761 if (TYPE_LENGTH (type) > 8)
762 {
763 /* Large parameter, pass by reference. Store the value
764 in "struct" area and then pass its address. */
765 param_len = 4;
1797a8f6 766 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 767 if (write_pass)
0fd88904 768 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 769 TYPE_LENGTH (type));
e17a4113
UW
770 store_unsigned_integer (param_val, 4, byte_order,
771 struct_end - struct_ptr);
79508e1e
AC
772 }
773 else if (TYPE_CODE (type) == TYPE_CODE_INT
774 || TYPE_CODE (type) == TYPE_CODE_ENUM)
775 {
776 /* Integer value store, right aligned. "unpack_long"
777 takes care of any sign-extension problems. */
778 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 779 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 780 unpack_long (type,
0fd88904 781 value_contents (arg)));
79508e1e 782 }
2a6228ef
RC
783 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
784 {
785 /* Floating point value store, right aligned. */
786 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 787 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 788 }
79508e1e
AC
789 else
790 {
79508e1e 791 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
792
793 /* Small struct value are stored right-aligned. */
79508e1e 794 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 795 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
796
797 /* Structures of size 5, 6 and 7 bytes are special in that
798 the higher-ordered word is stored in the lower-ordered
799 argument, and even though it is a 8-byte quantity the
800 registers need not be 8-byte aligned. */
1b07b470 801 if (param_len > 4 && param_len < 8)
2a6228ef 802 small_struct = 1;
79508e1e 803 }
2a6228ef 804
1797a8f6 805 param_ptr += param_len;
2a6228ef
RC
806 if (param_len == 8 && !small_struct)
807 param_ptr = align_up (param_ptr, 8);
808
809 /* First 4 non-FP arguments are passed in gr26-gr23.
810 First 4 32-bit FP arguments are passed in fr4L-fr7L.
811 First 2 64-bit FP arguments are passed in fr5 and fr7.
812
813 The rest go on the stack, starting at sp-36, towards lower
814 addresses. 8-byte arguments must be aligned to a 8-byte
815 stack boundary. */
79508e1e
AC
816 if (write_pass)
817 {
1797a8f6 818 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
819
820 /* There are some cases when we don't know the type
821 expected by the callee (e.g. for variadic functions), so
822 pass the parameters in both general and fp regs. */
823 if (param_ptr <= 48)
79508e1e 824 {
2a6228ef
RC
825 int grreg = 26 - (param_ptr - 36) / 4;
826 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
827 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
828
829 regcache_cooked_write (regcache, grreg, param_val);
830 regcache_cooked_write (regcache, fpLreg, param_val);
831
79508e1e 832 if (param_len > 4)
2a6228ef
RC
833 {
834 regcache_cooked_write (regcache, grreg + 1,
835 param_val + 4);
836
837 regcache_cooked_write (regcache, fpreg, param_val);
838 regcache_cooked_write (regcache, fpreg + 1,
839 param_val + 4);
840 }
79508e1e
AC
841 }
842 }
843 }
844
845 /* Update the various stack pointers. */
846 if (!write_pass)
847 {
2a6228ef 848 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
849 /* PARAM_PTR already accounts for all the arguments passed
850 by the user. However, the ABI mandates minimum stack
851 space allocations for outgoing arguments. The ABI also
852 mandates minimum stack alignments which we must
853 preserve. */
2a6228ef 854 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
855 }
856 }
857
858 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 859 address. */
79508e1e 860 if (struct_return)
9c9acae0 861 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 862
e38c262f 863 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
864
865 if (gp != 0)
9c9acae0 866 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 867
79508e1e 868 /* Set the return address. */
77d18ded
RC
869 if (!gdbarch_push_dummy_code_p (gdbarch))
870 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 871
c4557624 872 /* Update the Stack Pointer. */
34f75cc1 873 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 874
2a6228ef 875 return param_end;
79508e1e
AC
876}
877
38ca4e0c
MK
878/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
879 Runtime Architecture for PA-RISC 2.0", which is distributed as part
880 as of the HP-UX Software Transition Kit (STK). This implementation
881 is based on version 3.3, dated October 6, 1997. */
2f690297 882
38ca4e0c 883/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 884
38ca4e0c
MK
885static int
886hppa64_integral_or_pointer_p (const struct type *type)
887{
888 switch (TYPE_CODE (type))
889 {
890 case TYPE_CODE_INT:
891 case TYPE_CODE_BOOL:
892 case TYPE_CODE_CHAR:
893 case TYPE_CODE_ENUM:
894 case TYPE_CODE_RANGE:
895 {
896 int len = TYPE_LENGTH (type);
897 return (len == 1 || len == 2 || len == 4 || len == 8);
898 }
899 case TYPE_CODE_PTR:
900 case TYPE_CODE_REF:
901 return (TYPE_LENGTH (type) == 8);
902 default:
903 break;
904 }
905
906 return 0;
907}
908
909/* Check whether TYPE is a "Floating Scalar Type". */
910
911static int
912hppa64_floating_p (const struct type *type)
913{
914 switch (TYPE_CODE (type))
915 {
916 case TYPE_CODE_FLT:
917 {
918 int len = TYPE_LENGTH (type);
919 return (len == 4 || len == 8 || len == 16);
920 }
921 default:
922 break;
923 }
924
925 return 0;
926}
2f690297 927
1218e655
RC
928/* If CODE points to a function entry address, try to look up the corresponding
929 function descriptor and return its address instead. If CODE is not a
930 function entry address, then just return it unchanged. */
931static CORE_ADDR
e17a4113 932hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 933{
e17a4113 934 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
935 struct obj_section *sec, *opd;
936
937 sec = find_pc_section (code);
938
939 if (!sec)
940 return code;
941
942 /* If CODE is in a data section, assume it's already a fptr. */
943 if (!(sec->the_bfd_section->flags & SEC_CODE))
944 return code;
945
946 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
947 {
948 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 949 break;
1218e655
RC
950 }
951
952 if (opd < sec->objfile->sections_end)
953 {
954 CORE_ADDR addr;
955
aded6f54
PA
956 for (addr = obj_section_addr (opd);
957 addr < obj_section_endaddr (opd);
958 addr += 2 * 8)
959 {
1218e655 960 ULONGEST opdaddr;
948f8e3d 961 gdb_byte tmp[8];
1218e655
RC
962
963 if (target_read_memory (addr, tmp, sizeof (tmp)))
964 break;
e17a4113 965 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 966
aded6f54 967 if (opdaddr == code)
1218e655
RC
968 return addr - 16;
969 }
970 }
971
972 return code;
973}
974
4a302917 975static CORE_ADDR
7d9b040b 976hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
977 struct regcache *regcache, CORE_ADDR bp_addr,
978 int nargs, struct value **args, CORE_ADDR sp,
979 int struct_return, CORE_ADDR struct_addr)
980{
38ca4e0c 981 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 982 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
983 int i, offset = 0;
984 CORE_ADDR gp;
2f690297 985
38ca4e0c
MK
986 /* "The outgoing parameter area [...] must be aligned at a 16-byte
987 boundary." */
988 sp = align_up (sp, 16);
2f690297 989
38ca4e0c
MK
990 for (i = 0; i < nargs; i++)
991 {
992 struct value *arg = args[i];
993 struct type *type = value_type (arg);
994 int len = TYPE_LENGTH (type);
0fd88904 995 const bfd_byte *valbuf;
1218e655 996 bfd_byte fptrbuf[8];
38ca4e0c 997 int regnum;
2f690297 998
38ca4e0c
MK
999 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
1000 offset = align_up (offset, 8);
77d18ded 1001
38ca4e0c 1002 if (hppa64_integral_or_pointer_p (type))
2f690297 1003 {
38ca4e0c
MK
1004 /* "Integral scalar parameters smaller than 64 bits are
1005 padded on the left (i.e., the value is in the
1006 least-significant bits of the 64-bit storage unit, and
1007 the high-order bits are undefined)." Therefore we can
1008 safely sign-extend them. */
1009 if (len < 8)
449e1137 1010 {
df4df182 1011 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
1012 len = 8;
1013 }
1014 }
1015 else if (hppa64_floating_p (type))
1016 {
1017 if (len > 8)
1018 {
1019 /* "Quad-precision (128-bit) floating-point scalar
1020 parameters are aligned on a 16-byte boundary." */
1021 offset = align_up (offset, 16);
1022
1023 /* "Double-extended- and quad-precision floating-point
1024 parameters within the first 64 bytes of the parameter
1025 list are always passed in general registers." */
449e1137
AC
1026 }
1027 else
1028 {
38ca4e0c 1029 if (len == 4)
449e1137 1030 {
38ca4e0c
MK
1031 /* "Single-precision (32-bit) floating-point scalar
1032 parameters are padded on the left with 32 bits of
1033 garbage (i.e., the floating-point value is in the
1034 least-significant 32 bits of a 64-bit storage
1035 unit)." */
1036 offset += 4;
449e1137 1037 }
38ca4e0c
MK
1038
1039 /* "Single- and double-precision floating-point
1040 parameters in this area are passed according to the
1041 available formal parameter information in a function
1042 prototype. [...] If no prototype is in scope,
1043 floating-point parameters must be passed both in the
1044 corresponding general registers and in the
1045 corresponding floating-point registers." */
1046 regnum = HPPA64_FP4_REGNUM + offset / 8;
1047
1048 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1049 {
38ca4e0c
MK
1050 /* "Single-precision floating-point parameters, when
1051 passed in floating-point registers, are passed in
1052 the right halves of the floating point registers;
1053 the left halves are unused." */
1054 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1055 len, value_contents (arg));
449e1137
AC
1056 }
1057 }
2f690297 1058 }
38ca4e0c 1059 else
2f690297 1060 {
38ca4e0c
MK
1061 if (len > 8)
1062 {
1063 /* "Aggregates larger than 8 bytes are aligned on a
1064 16-byte boundary, possibly leaving an unused argument
1777feb0 1065 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1066 they are padded on the right (with garbage), to a
1067 multiple of 8 bytes." */
1068 offset = align_up (offset, 16);
1069 }
1070 }
1071
1218e655
RC
1072 /* If we are passing a function pointer, make sure we pass a function
1073 descriptor instead of the function entry address. */
1074 if (TYPE_CODE (type) == TYPE_CODE_PTR
1075 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1076 {
1077 ULONGEST codeptr, fptr;
1078
1079 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1080 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1081 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1082 fptr);
1218e655
RC
1083 valbuf = fptrbuf;
1084 }
1085 else
1086 {
1087 valbuf = value_contents (arg);
1088 }
1089
38ca4e0c 1090 /* Always store the argument in memory. */
1218e655 1091 write_memory (sp + offset, valbuf, len);
38ca4e0c 1092
38ca4e0c
MK
1093 regnum = HPPA_ARG0_REGNUM - offset / 8;
1094 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1095 {
1096 regcache_cooked_write_part (regcache, regnum,
1097 offset % 8, min (len, 8), valbuf);
1098 offset += min (len, 8);
1099 valbuf += min (len, 8);
1100 len -= min (len, 8);
1101 regnum--;
2f690297 1102 }
38ca4e0c
MK
1103
1104 offset += len;
2f690297
AC
1105 }
1106
38ca4e0c
MK
1107 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1108 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1109
1110 /* Allocate the outgoing parameter area. Make sure the outgoing
1111 parameter area is multiple of 16 bytes in length. */
1112 sp += max (align_up (offset, 16), 64);
1113
1114 /* Allocate 32-bytes of scratch space. The documentation doesn't
1115 mention this, but it seems to be needed. */
1116 sp += 32;
1117
1118 /* Allocate the frame marker area. */
1119 sp += 16;
1120
1121 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1122 its address. */
2f690297 1123 if (struct_return)
38ca4e0c 1124 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1125
38ca4e0c 1126 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1127 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1128 if (gp != 0)
38ca4e0c 1129 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1130
38ca4e0c 1131 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1132 if (!gdbarch_push_dummy_code_p (gdbarch))
1133 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1134
38ca4e0c
MK
1135 /* Set up GR30 to hold the stack pointer (sp). */
1136 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1137
38ca4e0c 1138 return sp;
2f690297 1139}
38ca4e0c 1140\f
2f690297 1141
08a27113
MK
1142/* Handle 32/64-bit struct return conventions. */
1143
1144static enum return_value_convention
6a3a010b 1145hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1146 struct type *type, struct regcache *regcache,
e127f0db 1147 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1148{
1149 if (TYPE_LENGTH (type) <= 2 * 4)
1150 {
1151 /* The value always lives in the right hand end of the register
1152 (or register pair)? */
1153 int b;
1154 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1155 int part = TYPE_LENGTH (type) % 4;
1156 /* The left hand register contains only part of the value,
1157 transfer that first so that the rest can be xfered as entire
1158 4-byte registers. */
1159 if (part > 0)
1160 {
1161 if (readbuf != NULL)
1162 regcache_cooked_read_part (regcache, reg, 4 - part,
1163 part, readbuf);
1164 if (writebuf != NULL)
1165 regcache_cooked_write_part (regcache, reg, 4 - part,
1166 part, writebuf);
1167 reg++;
1168 }
1169 /* Now transfer the remaining register values. */
1170 for (b = part; b < TYPE_LENGTH (type); b += 4)
1171 {
1172 if (readbuf != NULL)
e127f0db 1173 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1174 if (writebuf != NULL)
e127f0db 1175 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1176 reg++;
1177 }
1178 return RETURN_VALUE_REGISTER_CONVENTION;
1179 }
1180 else
1181 return RETURN_VALUE_STRUCT_CONVENTION;
1182}
1183
1184static enum return_value_convention
6a3a010b 1185hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1186 struct type *type, struct regcache *regcache,
e127f0db 1187 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1188{
1189 int len = TYPE_LENGTH (type);
1190 int regnum, offset;
1191
bad43aa5 1192 if (len > 16)
08a27113
MK
1193 {
1194 /* All return values larget than 128 bits must be aggregate
1195 return values. */
9738b034
MK
1196 gdb_assert (!hppa64_integral_or_pointer_p (type));
1197 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1198
1199 /* "Aggregate return values larger than 128 bits are returned in
1200 a buffer allocated by the caller. The address of the buffer
1201 must be passed in GR 28." */
1202 return RETURN_VALUE_STRUCT_CONVENTION;
1203 }
1204
1205 if (hppa64_integral_or_pointer_p (type))
1206 {
1207 /* "Integral return values are returned in GR 28. Values
1208 smaller than 64 bits are padded on the left (with garbage)." */
1209 regnum = HPPA_RET0_REGNUM;
1210 offset = 8 - len;
1211 }
1212 else if (hppa64_floating_p (type))
1213 {
1214 if (len > 8)
1215 {
1216 /* "Double-extended- and quad-precision floating-point
1217 values are returned in GRs 28 and 29. The sign,
1218 exponent, and most-significant bits of the mantissa are
1219 returned in GR 28; the least-significant bits of the
1220 mantissa are passed in GR 29. For double-extended
1221 precision values, GR 29 is padded on the right with 48
1222 bits of garbage." */
1223 regnum = HPPA_RET0_REGNUM;
1224 offset = 0;
1225 }
1226 else
1227 {
1228 /* "Single-precision and double-precision floating-point
1229 return values are returned in FR 4R (single precision) or
1230 FR 4 (double-precision)." */
1231 regnum = HPPA64_FP4_REGNUM;
1232 offset = 8 - len;
1233 }
1234 }
1235 else
1236 {
1237 /* "Aggregate return values up to 64 bits in size are returned
1238 in GR 28. Aggregates smaller than 64 bits are left aligned
1239 in the register; the pad bits on the right are undefined."
1240
1241 "Aggregate return values between 65 and 128 bits are returned
1242 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1243 the remaining bits are placed, left aligned, in GR 29. The
1244 pad bits on the right of GR 29 (if any) are undefined." */
1245 regnum = HPPA_RET0_REGNUM;
1246 offset = 0;
1247 }
1248
1249 if (readbuf)
1250 {
08a27113
MK
1251 while (len > 0)
1252 {
1253 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1254 min (len, 8), readbuf);
1255 readbuf += min (len, 8);
08a27113
MK
1256 len -= min (len, 8);
1257 regnum++;
1258 }
1259 }
1260
1261 if (writebuf)
1262 {
08a27113
MK
1263 while (len > 0)
1264 {
1265 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1266 min (len, 8), writebuf);
1267 writebuf += min (len, 8);
08a27113
MK
1268 len -= min (len, 8);
1269 regnum++;
1270 }
1271 }
1272
1273 return RETURN_VALUE_REGISTER_CONVENTION;
1274}
1275\f
1276
d49771ef 1277static CORE_ADDR
a7aad9aa 1278hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1279 struct target_ops *targ)
1280{
1281 if (addr & 2)
1282 {
0dfff4cb 1283 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1284 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1285 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1286 }
1287
1288 return addr;
1289}
1290
1797a8f6
AC
1291static CORE_ADDR
1292hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1293{
1294 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1295 and not _bit_)! */
1296 return align_up (addr, 64);
1297}
1298
2f690297
AC
1299/* Force all frames to 16-byte alignment. Better safe than sorry. */
1300
1301static CORE_ADDR
1797a8f6 1302hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1303{
1304 /* Just always 16-byte align. */
1305 return align_up (addr, 16);
1306}
1307
cc72850f 1308CORE_ADDR
61a1198a 1309hppa_read_pc (struct regcache *regcache)
c906108c 1310{
cc72850f 1311 ULONGEST ipsw;
61a1198a 1312 ULONGEST pc;
c906108c 1313
61a1198a
UW
1314 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1315 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1316
1317 /* If the current instruction is nullified, then we are effectively
1318 still executing the previous instruction. Pretend we are still
cc72850f
MK
1319 there. This is needed when single stepping; if the nullified
1320 instruction is on a different line, we don't want GDB to think
1321 we've stepped onto that line. */
fe46cd3a
RC
1322 if (ipsw & 0x00200000)
1323 pc -= 4;
1324
cc72850f 1325 return pc & ~0x3;
c906108c
SS
1326}
1327
cc72850f 1328void
61a1198a 1329hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1330{
61a1198a
UW
1331 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1332 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1333}
1334
c906108c 1335/* For the given instruction (INST), return any adjustment it makes
1777feb0 1336 to the stack pointer or zero for no adjustment.
c906108c
SS
1337
1338 This only handles instructions commonly found in prologues. */
1339
1340static int
fba45db2 1341prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1342{
1343 /* This must persist across calls. */
1344 static int save_high21;
1345
1346 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1347 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1348 return hppa_extract_14 (inst);
c906108c
SS
1349
1350 /* stwm X,D(sp) */
1351 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1352 return hppa_extract_14 (inst);
c906108c 1353
104c1213
JM
1354 /* std,ma X,D(sp) */
1355 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1356 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1357
e22b26cb 1358 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1359 save high bits in save_high21 for later use. */
e22b26cb 1360 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1361 {
abc485a1 1362 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1363 return 0;
1364 }
1365
1366 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1367 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1368
1369 /* fstws as used by the HP compilers. */
1370 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1371 return hppa_extract_5_load (inst);
c906108c
SS
1372
1373 /* No adjustment. */
1374 return 0;
1375}
1376
1377/* Return nonzero if INST is a branch of some kind, else return zero. */
1378
1379static int
fba45db2 1380is_branch (unsigned long inst)
c906108c
SS
1381{
1382 switch (inst >> 26)
1383 {
1384 case 0x20:
1385 case 0x21:
1386 case 0x22:
1387 case 0x23:
7be570e7 1388 case 0x27:
c906108c
SS
1389 case 0x28:
1390 case 0x29:
1391 case 0x2a:
1392 case 0x2b:
7be570e7 1393 case 0x2f:
c906108c
SS
1394 case 0x30:
1395 case 0x31:
1396 case 0x32:
1397 case 0x33:
1398 case 0x38:
1399 case 0x39:
1400 case 0x3a:
7be570e7 1401 case 0x3b:
c906108c
SS
1402 return 1;
1403
1404 default:
1405 return 0;
1406 }
1407}
1408
1409/* Return the register number for a GR which is saved by INST or
b35018fd 1410 zero if INST does not save a GR.
c906108c 1411
b35018fd 1412 Referenced from:
7be570e7 1413
b35018fd
CG
1414 parisc 1.1:
1415 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1416
b35018fd
CG
1417 parisc 2.0:
1418 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1419
b35018fd
CG
1420 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1421 on page 106 in parisc 2.0, all instructions for storing values from
1422 the general registers are:
c5aa993b 1423
b35018fd
CG
1424 Store: stb, sth, stw, std (according to Chapter 7, they
1425 are only in both "inst >> 26" and "inst >> 6".
1426 Store Absolute: stwa, stda (according to Chapter 7, they are only
1427 in "inst >> 6".
1428 Store Bytes: stby, stdby (according to Chapter 7, they are
1429 only in "inst >> 6").
1430
1431 For (inst >> 26), according to Chapter 7:
1432
1433 The effective memory reference address is formed by the addition
1434 of an immediate displacement to a base value.
1435
1436 - stb: 0x18, store a byte from a general register.
1437
1438 - sth: 0x19, store a halfword from a general register.
1439
1440 - stw: 0x1a, store a word from a general register.
1441
1442 - stwm: 0x1b, store a word from a general register and perform base
1443 register modification (2.0 will still treate it as stw).
1444
1445 - std: 0x1c, store a doubleword from a general register (2.0 only).
1446
1447 - stw: 0x1f, store a word from a general register (2.0 only).
1448
1449 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1450
1451 The effective memory reference address is formed by the addition
1452 of an index value to a base value specified in the instruction.
1453
1454 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1455
1456 - sth: 0x09, store a halfword from a general register (1.1 calls
1457 sths).
1458
1459 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1460
1461 - std: 0x0b: store a doubleword from a general register (2.0 only)
1462
1463 Implement fast byte moves (stores) to unaligned word or doubleword
1464 destination.
1465
1466 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1467
1468 - stdby: 0x0d for unaligned doubleword (2.0 only).
1469
1470 Store a word or doubleword using an absolute memory address formed
1471 using short or long displacement or indexed
1472
1473 - stwa: 0x0e, store a word from a general register to an absolute
1474 address (1.0 calls stwas).
1475
1476 - stda: 0x0f, store a doubleword from a general register to an
1477 absolute address (2.0 only). */
1478
1479static int
1480inst_saves_gr (unsigned long inst)
1481{
1482 switch ((inst >> 26) & 0x0f)
1483 {
1484 case 0x03:
1485 switch ((inst >> 6) & 0x0f)
1486 {
1487 case 0x08:
1488 case 0x09:
1489 case 0x0a:
1490 case 0x0b:
1491 case 0x0c:
1492 case 0x0d:
1493 case 0x0e:
1494 case 0x0f:
1495 return hppa_extract_5R_store (inst);
1496 default:
1497 return 0;
1498 }
1499 case 0x18:
1500 case 0x19:
1501 case 0x1a:
1502 case 0x1b:
1503 case 0x1c:
1504 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1505 case 0x1f:
1506 return hppa_extract_5R_store (inst);
1507 default:
1508 return 0;
1509 }
c906108c
SS
1510}
1511
1512/* Return the register number for a FR which is saved by INST or
1513 zero it INST does not save a FR.
1514
1515 Note we only care about full 64bit register stores (that's the only
1516 kind of stores the prologue will use).
1517
1518 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1519
1520static int
fba45db2 1521inst_saves_fr (unsigned long inst)
c906108c 1522{
1777feb0 1523 /* Is this an FSTD? */
c906108c 1524 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1525 return hppa_extract_5r_store (inst);
7be570e7 1526 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1527 return hppa_extract_5R_store (inst);
1777feb0 1528 /* Is this an FSTW? */
c906108c 1529 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1530 return hppa_extract_5r_store (inst);
7be570e7 1531 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1532 return hppa_extract_5R_store (inst);
c906108c
SS
1533 return 0;
1534}
1535
1536/* Advance PC across any function entry prologue instructions
1777feb0 1537 to reach some "real" code.
c906108c
SS
1538
1539 Use information in the unwind table to determine what exactly should
1540 be in the prologue. */
1541
1542
a71f8c30 1543static CORE_ADDR
be8626e0
MD
1544skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1545 int stop_before_branch)
c906108c 1546{
e17a4113 1547 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1548 gdb_byte buf[4];
c906108c
SS
1549 CORE_ADDR orig_pc = pc;
1550 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1551 unsigned long args_stored, status, i, restart_gr, restart_fr;
1552 struct unwind_table_entry *u;
a71f8c30 1553 int final_iteration;
c906108c
SS
1554
1555 restart_gr = 0;
1556 restart_fr = 0;
1557
1558restart:
1559 u = find_unwind_entry (pc);
1560 if (!u)
1561 return pc;
1562
1777feb0 1563 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1564 if ((pc & ~0x3) != u->region_start)
1565 return pc;
1566
1567 /* This is how much of a frame adjustment we need to account for. */
1568 stack_remaining = u->Total_frame_size << 3;
1569
1570 /* Magic register saves we want to know about. */
1571 save_rp = u->Save_RP;
1572 save_sp = u->Save_SP;
1573
1574 /* An indication that args may be stored into the stack. Unfortunately
1575 the HPUX compilers tend to set this in cases where no args were
1576 stored too!. */
1577 args_stored = 1;
1578
1579 /* Turn the Entry_GR field into a bitmask. */
1580 save_gr = 0;
1581 for (i = 3; i < u->Entry_GR + 3; i++)
1582 {
1583 /* Frame pointer gets saved into a special location. */
eded0a31 1584 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1585 continue;
1586
1587 save_gr |= (1 << i);
1588 }
1589 save_gr &= ~restart_gr;
1590
1591 /* Turn the Entry_FR field into a bitmask too. */
1592 save_fr = 0;
1593 for (i = 12; i < u->Entry_FR + 12; i++)
1594 save_fr |= (1 << i);
1595 save_fr &= ~restart_fr;
1596
a71f8c30
RC
1597 final_iteration = 0;
1598
c906108c
SS
1599 /* Loop until we find everything of interest or hit a branch.
1600
1601 For unoptimized GCC code and for any HP CC code this will never ever
1602 examine any user instructions.
1603
1604 For optimzied GCC code we're faced with problems. GCC will schedule
1605 its prologue and make prologue instructions available for delay slot
1606 filling. The end result is user code gets mixed in with the prologue
1607 and a prologue instruction may be in the delay slot of the first branch
1608 or call.
1609
1610 Some unexpected things are expected with debugging optimized code, so
1611 we allow this routine to walk past user instructions in optimized
1612 GCC code. */
1613 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1614 || args_stored)
1615 {
1616 unsigned int reg_num;
1617 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1618 unsigned long old_save_rp, old_save_sp, next_inst;
1619
1620 /* Save copies of all the triggers so we can compare them later
c5aa993b 1621 (only for HPC). */
c906108c
SS
1622 old_save_gr = save_gr;
1623 old_save_fr = save_fr;
1624 old_save_rp = save_rp;
1625 old_save_sp = save_sp;
1626 old_stack_remaining = stack_remaining;
1627
8defab1a 1628 status = target_read_memory (pc, buf, 4);
e17a4113 1629 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1630
c906108c
SS
1631 /* Yow! */
1632 if (status != 0)
1633 return pc;
1634
1635 /* Note the interesting effects of this instruction. */
1636 stack_remaining -= prologue_inst_adjust_sp (inst);
1637
7be570e7
JM
1638 /* There are limited ways to store the return pointer into the
1639 stack. */
c4c79048 1640 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1641 save_rp = 0;
1642
104c1213 1643 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1644 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1645 if ((inst & 0xffffc000) == 0x6fc10000
1646 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1647 save_sp = 0;
1648
6426a772
JM
1649 /* Are we loading some register with an offset from the argument
1650 pointer? */
1651 if ((inst & 0xffe00000) == 0x37a00000
1652 || (inst & 0xffffffe0) == 0x081d0240)
1653 {
1654 pc += 4;
1655 continue;
1656 }
1657
c906108c
SS
1658 /* Account for general and floating-point register saves. */
1659 reg_num = inst_saves_gr (inst);
1660 save_gr &= ~(1 << reg_num);
1661
1662 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1663 Unfortunately args_stored only tells us that some arguments
1664 where stored into the stack. Not how many or what kind!
c906108c 1665
c5aa993b
JM
1666 This is a kludge as on the HP compiler sets this bit and it
1667 never does prologue scheduling. So once we see one, skip past
1668 all of them. We have similar code for the fp arg stores below.
c906108c 1669
c5aa993b
JM
1670 FIXME. Can still die if we have a mix of GR and FR argument
1671 stores! */
be8626e0 1672 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1673 && reg_num <= 26)
c906108c 1674 {
be8626e0 1675 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1676 && reg_num <= 26)
c906108c
SS
1677 {
1678 pc += 4;
8defab1a 1679 status = target_read_memory (pc, buf, 4);
e17a4113 1680 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1681 if (status != 0)
1682 return pc;
1683 reg_num = inst_saves_gr (inst);
1684 }
1685 args_stored = 0;
1686 continue;
1687 }
1688
1689 reg_num = inst_saves_fr (inst);
1690 save_fr &= ~(1 << reg_num);
1691
8defab1a 1692 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1693 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1694
c906108c
SS
1695 /* Yow! */
1696 if (status != 0)
1697 return pc;
1698
1699 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1700 save. */
c906108c
SS
1701 if ((inst & 0xfc000000) == 0x34000000
1702 && inst_saves_fr (next_inst) >= 4
819844ad 1703 && inst_saves_fr (next_inst)
be8626e0 1704 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1705 {
1706 /* So we drop into the code below in a reasonable state. */
1707 reg_num = inst_saves_fr (next_inst);
1708 pc -= 4;
1709 }
1710
1711 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1712 This is a kludge as on the HP compiler sets this bit and it
1713 never does prologue scheduling. So once we see one, skip past
1714 all of them. */
819844ad 1715 if (reg_num >= 4
be8626e0 1716 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1717 {
819844ad
UW
1718 while (reg_num >= 4
1719 && reg_num
be8626e0 1720 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1721 {
1722 pc += 8;
8defab1a 1723 status = target_read_memory (pc, buf, 4);
e17a4113 1724 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1725 if (status != 0)
1726 return pc;
1727 if ((inst & 0xfc000000) != 0x34000000)
1728 break;
8defab1a 1729 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1730 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1731 if (status != 0)
1732 return pc;
1733 reg_num = inst_saves_fr (next_inst);
1734 }
1735 args_stored = 0;
1736 continue;
1737 }
1738
1739 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1740 instruction is in the delay slot of the first call/branch. */
a71f8c30 1741 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1742 break;
1743
1744 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1745 arguments were stored into the stack (boo hiss). This could
1746 cause this code to then skip a bunch of user insns (up to the
1747 first branch).
1748
1749 To combat this we try to identify when args_stored was bogusly
1750 set and clear it. We only do this when args_stored is nonzero,
1751 all other resources are accounted for, and nothing changed on
1752 this pass. */
c906108c 1753 if (args_stored
c5aa993b 1754 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1755 && old_save_gr == save_gr && old_save_fr == save_fr
1756 && old_save_rp == save_rp && old_save_sp == save_sp
1757 && old_stack_remaining == stack_remaining)
1758 break;
c5aa993b 1759
c906108c
SS
1760 /* Bump the PC. */
1761 pc += 4;
a71f8c30
RC
1762
1763 /* !stop_before_branch, so also look at the insn in the delay slot
1764 of the branch. */
1765 if (final_iteration)
1766 break;
1767 if (is_branch (inst))
1768 final_iteration = 1;
c906108c
SS
1769 }
1770
1771 /* We've got a tenative location for the end of the prologue. However
1772 because of limitations in the unwind descriptor mechanism we may
1773 have went too far into user code looking for the save of a register
1774 that does not exist. So, if there registers we expected to be saved
1775 but never were, mask them out and restart.
1776
1777 This should only happen in optimized code, and should be very rare. */
c5aa993b 1778 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1779 {
1780 pc = orig_pc;
1781 restart_gr = save_gr;
1782 restart_fr = save_fr;
1783 goto restart;
1784 }
1785
1786 return pc;
1787}
1788
1789
7be570e7
JM
1790/* Return the address of the PC after the last prologue instruction if
1791 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1792
1793static CORE_ADDR
fba45db2 1794after_prologue (CORE_ADDR pc)
c906108c
SS
1795{
1796 struct symtab_and_line sal;
1797 CORE_ADDR func_addr, func_end;
c906108c 1798
7be570e7
JM
1799 /* If we can not find the symbol in the partial symbol table, then
1800 there is no hope we can determine the function's start address
1801 with this code. */
c906108c 1802 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1803 return 0;
c906108c 1804
7be570e7 1805 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1806 sal = find_pc_line (func_addr, 0);
1807
7be570e7
JM
1808 /* There are only two cases to consider. First, the end of the source line
1809 is within the function bounds. In that case we return the end of the
1810 source line. Second is the end of the source line extends beyond the
1811 bounds of the current function. We need to use the slow code to
1777feb0 1812 examine instructions in that case.
c906108c 1813
7be570e7
JM
1814 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1815 the wrong thing to do. In fact, it should be entirely possible for this
1816 function to always return zero since the slow instruction scanning code
1817 is supposed to *always* work. If it does not, then it is a bug. */
1818 if (sal.end < func_end)
1819 return sal.end;
c5aa993b 1820 else
7be570e7 1821 return 0;
c906108c
SS
1822}
1823
1824/* To skip prologues, I use this predicate. Returns either PC itself
1825 if the code at PC does not look like a function prologue; otherwise
1777feb0 1826 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1827
1828 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1829 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1830 we might not want to skip all the insns because a prologue insn may
1831 appear in the delay slot of the first branch, and we don't want to
1832 skip over the branch in that case. */
c906108c 1833
8d153463 1834static CORE_ADDR
6093d2eb 1835hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1836{
c5aa993b 1837 CORE_ADDR post_prologue_pc;
c906108c 1838
c5aa993b
JM
1839 /* See if we can determine the end of the prologue via the symbol table.
1840 If so, then return either PC, or the PC after the prologue, whichever
1841 is greater. */
c906108c 1842
c5aa993b 1843 post_prologue_pc = after_prologue (pc);
c906108c 1844
7be570e7
JM
1845 /* If after_prologue returned a useful address, then use it. Else
1846 fall back on the instruction skipping code.
1847
1848 Some folks have claimed this causes problems because the breakpoint
1849 may be the first instruction of the prologue. If that happens, then
1850 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1851 if (post_prologue_pc != 0)
1852 return max (pc, post_prologue_pc);
c5aa993b 1853 else
be8626e0 1854 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1855}
1856
29d375ac 1857/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1858
29d375ac 1859static struct unwind_table_entry *
227e86ad 1860hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1861{
227e86ad 1862 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1863
1864 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1865 result of get_frame_address_in_block implies a problem.
93d42b30 1866 The bits should have been removed earlier, before the return
c7ce8faa 1867 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1868 if it isn't, it should be fixed. Then this call can be
1869 removed. */
227e86ad 1870 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1871 return find_unwind_entry (pc);
1872}
1873
26d08f08
AC
1874struct hppa_frame_cache
1875{
1876 CORE_ADDR base;
1877 struct trad_frame_saved_reg *saved_regs;
1878};
1879
1880static struct hppa_frame_cache *
227e86ad 1881hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1882{
227e86ad 1883 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1884 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1885 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1886 struct hppa_frame_cache *cache;
1887 long saved_gr_mask;
1888 long saved_fr_mask;
26d08f08
AC
1889 long frame_size;
1890 struct unwind_table_entry *u;
9f7194c3 1891 CORE_ADDR prologue_end;
50b2f48a 1892 int fp_in_r1 = 0;
26d08f08
AC
1893 int i;
1894
369aa520
RC
1895 if (hppa_debug)
1896 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1897 frame_relative_level(this_frame));
369aa520 1898
26d08f08 1899 if ((*this_cache) != NULL)
369aa520
RC
1900 {
1901 if (hppa_debug)
5af949e3
UW
1902 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1903 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
369aa520
RC
1904 return (*this_cache);
1905 }
26d08f08
AC
1906 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1907 (*this_cache) = cache;
227e86ad 1908 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1909
1910 /* Yow! */
227e86ad 1911 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1912 if (!u)
369aa520
RC
1913 {
1914 if (hppa_debug)
1915 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1916 return (*this_cache);
1917 }
26d08f08
AC
1918
1919 /* Turn the Entry_GR field into a bitmask. */
1920 saved_gr_mask = 0;
1921 for (i = 3; i < u->Entry_GR + 3; i++)
1922 {
1923 /* Frame pointer gets saved into a special location. */
eded0a31 1924 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1925 continue;
1926
1927 saved_gr_mask |= (1 << i);
1928 }
1929
1930 /* Turn the Entry_FR field into a bitmask too. */
1931 saved_fr_mask = 0;
1932 for (i = 12; i < u->Entry_FR + 12; i++)
1933 saved_fr_mask |= (1 << i);
1934
1935 /* Loop until we find everything of interest or hit a branch.
1936
1937 For unoptimized GCC code and for any HP CC code this will never ever
1938 examine any user instructions.
1939
1940 For optimized GCC code we're faced with problems. GCC will schedule
1941 its prologue and make prologue instructions available for delay slot
1942 filling. The end result is user code gets mixed in with the prologue
1943 and a prologue instruction may be in the delay slot of the first branch
1944 or call.
1945
1946 Some unexpected things are expected with debugging optimized code, so
1947 we allow this routine to walk past user instructions in optimized
1948 GCC code. */
1949 {
1950 int final_iteration = 0;
46acf081 1951 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1952 int looking_for_sp = u->Save_SP;
1953 int looking_for_rp = u->Save_RP;
1954 int fp_loc = -1;
9f7194c3 1955
a71f8c30 1956 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1957 skip_prologue_using_sal, in case we stepped into a function without
1958 symbol information. hppa_skip_prologue also bounds the returned
1959 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1960 function.
a71f8c30
RC
1961
1962 We used to call hppa_skip_prologue to find the end of the prologue,
1963 but if some non-prologue instructions get scheduled into the prologue,
1964 and the program is compiled with debug information, the "easy" way
1965 in hppa_skip_prologue will return a prologue end that is too early
1966 for us to notice any potential frame adjustments. */
d5c27f81 1967
ef02daa9
DJ
1968 /* We used to use get_frame_func to locate the beginning of the
1969 function to pass to skip_prologue. However, when objects are
1970 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1971 function (or 0). We can do better than that by using unwind records.
46acf081 1972 This only works if the Region_description of the unwind record
1777feb0 1973 indicates that it includes the entry point of the function.
46acf081
RC
1974 HP compilers sometimes generate unwind records for regions that
1975 do not include the entry or exit point of a function. GNU tools
1976 do not do this. */
1977
1978 if ((u->Region_description & 0x2) == 0)
1979 start_pc = u->region_start;
1980 else
227e86ad 1981 start_pc = get_frame_func (this_frame);
d5c27f81 1982
be8626e0 1983 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1984 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1985
1986 if (prologue_end != 0 && end_pc > prologue_end)
1987 end_pc = prologue_end;
1988
26d08f08 1989 frame_size = 0;
9f7194c3 1990
46acf081 1991 for (pc = start_pc;
26d08f08
AC
1992 ((saved_gr_mask || saved_fr_mask
1993 || looking_for_sp || looking_for_rp
1994 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1995 && pc < end_pc);
26d08f08
AC
1996 pc += 4)
1997 {
1998 int reg;
e362b510 1999 gdb_byte buf4[4];
4a302917
RC
2000 long inst;
2001
227e86ad 2002 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 2003 {
5af949e3
UW
2004 error (_("Cannot read instruction at %s."),
2005 paddress (gdbarch, pc));
4a302917
RC
2006 return (*this_cache);
2007 }
2008
e17a4113 2009 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 2010
26d08f08
AC
2011 /* Note the interesting effects of this instruction. */
2012 frame_size += prologue_inst_adjust_sp (inst);
2013
2014 /* There are limited ways to store the return pointer into the
2015 stack. */
2016 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2017 {
2018 looking_for_rp = 0;
34f75cc1 2019 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 2020 }
dfaf8edb
MK
2021 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
2022 {
2023 looking_for_rp = 0;
2024 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
2025 }
c4c79048
RC
2026 else if (inst == 0x0fc212c1
2027 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2028 {
2029 looking_for_rp = 0;
34f75cc1 2030 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
2031 }
2032
2033 /* Check to see if we saved SP into the stack. This also
2034 happens to indicate the location of the saved frame
2035 pointer. */
2036 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2037 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2038 {
2039 looking_for_sp = 0;
eded0a31 2040 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 2041 }
50b2f48a
RC
2042 else if (inst == 0x08030241) /* copy %r3, %r1 */
2043 {
2044 fp_in_r1 = 1;
2045 }
26d08f08
AC
2046
2047 /* Account for general and floating-point register saves. */
2048 reg = inst_saves_gr (inst);
2049 if (reg >= 3 && reg <= 18
eded0a31 2050 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2051 {
2052 saved_gr_mask &= ~(1 << reg);
abc485a1 2053 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2054 /* stwm with a positive displacement is a _post_
2055 _modify_. */
2056 cache->saved_regs[reg].addr = 0;
2057 else if ((inst & 0xfc00000c) == 0x70000008)
2058 /* A std has explicit post_modify forms. */
2059 cache->saved_regs[reg].addr = 0;
2060 else
2061 {
2062 CORE_ADDR offset;
2063
2064 if ((inst >> 26) == 0x1c)
1777feb0
MS
2065 offset = (inst & 0x1 ? -1 << 13 : 0)
2066 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2067 else if ((inst >> 26) == 0x03)
abc485a1 2068 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2069 else
abc485a1 2070 offset = hppa_extract_14 (inst);
26d08f08
AC
2071
2072 /* Handle code with and without frame pointers. */
2073 if (u->Save_SP)
2074 cache->saved_regs[reg].addr = offset;
2075 else
1777feb0
MS
2076 cache->saved_regs[reg].addr
2077 = (u->Total_frame_size << 3) + offset;
26d08f08
AC
2078 }
2079 }
2080
2081 /* GCC handles callee saved FP regs a little differently.
2082
2083 It emits an instruction to put the value of the start of
2084 the FP store area into %r1. It then uses fstds,ma with a
2085 basereg of %r1 for the stores.
2086
2087 HP CC emits them at the current stack pointer modifying the
2088 stack pointer as it stores each register. */
2089
2090 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2091 if ((inst & 0xffffc000) == 0x34610000
2092 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2093 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2094
2095 reg = inst_saves_fr (inst);
2096 if (reg >= 12 && reg <= 21)
2097 {
2098 /* Note +4 braindamage below is necessary because the FP
2099 status registers are internally 8 registers rather than
2100 the expected 4 registers. */
2101 saved_fr_mask &= ~(1 << reg);
2102 if (fp_loc == -1)
2103 {
2104 /* 1st HP CC FP register store. After this
2105 instruction we've set enough state that the GCC and
2106 HPCC code are both handled in the same manner. */
34f75cc1 2107 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2108 fp_loc = 8;
2109 }
2110 else
2111 {
eded0a31 2112 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2113 fp_loc += 8;
2114 }
2115 }
2116
1777feb0 2117 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2118 if (final_iteration)
2119 break;
2120 /* We want to look precisely one instruction beyond the branch
2121 if we have not found everything yet. */
2122 if (is_branch (inst))
2123 final_iteration = 1;
2124 }
2125 }
2126
2127 {
2128 /* The frame base always represents the value of %sp at entry to
2129 the current function (and is thus equivalent to the "saved"
2130 stack pointer. */
227e86ad
JB
2131 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2132 HPPA_SP_REGNUM);
ed70ba00 2133 CORE_ADDR fp;
9f7194c3
RC
2134
2135 if (hppa_debug)
5af949e3
UW
2136 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2137 "prologue_end=%s) ",
2138 paddress (gdbarch, this_sp),
2139 paddress (gdbarch, get_frame_pc (this_frame)),
2140 paddress (gdbarch, prologue_end));
9f7194c3 2141
ed70ba00
RC
2142 /* Check to see if a frame pointer is available, and use it for
2143 frame unwinding if it is.
2144
2145 There are some situations where we need to rely on the frame
2146 pointer to do stack unwinding. For example, if a function calls
2147 alloca (), the stack pointer can get adjusted inside the body of
2148 the function. In this case, the ABI requires that the compiler
2149 maintain a frame pointer for the function.
2150
2151 The unwind record has a flag (alloca_frame) that indicates that
2152 a function has a variable frame; unfortunately, gcc/binutils
2153 does not set this flag. Instead, whenever a frame pointer is used
2154 and saved on the stack, the Save_SP flag is set. We use this to
2155 decide whether to use the frame pointer for unwinding.
2156
ed70ba00
RC
2157 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2158 instead of Save_SP. */
2159
227e86ad 2160 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2161
6fcecea0 2162 if (u->alloca_frame)
46acf081 2163 fp -= u->Total_frame_size << 3;
ed70ba00 2164
227e86ad 2165 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2166 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2167 {
2168 cache->base = fp;
2169
2170 if (hppa_debug)
5af949e3
UW
2171 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2172 paddress (gdbarch, cache->base));
ed70ba00 2173 }
1658da49
RC
2174 else if (u->Save_SP
2175 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2176 {
9f7194c3
RC
2177 /* Both we're expecting the SP to be saved and the SP has been
2178 saved. The entry SP value is saved at this frame's SP
2179 address. */
e17a4113 2180 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2181
2182 if (hppa_debug)
5af949e3
UW
2183 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2184 paddress (gdbarch, cache->base));
9f7194c3 2185 }
26d08f08 2186 else
9f7194c3 2187 {
1658da49
RC
2188 /* The prologue has been slowly allocating stack space. Adjust
2189 the SP back. */
2190 cache->base = this_sp - frame_size;
9f7194c3 2191 if (hppa_debug)
5af949e3
UW
2192 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2193 paddress (gdbarch, cache->base));
9f7194c3
RC
2194
2195 }
eded0a31 2196 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2197 }
2198
412275d5
AC
2199 /* The PC is found in the "return register", "Millicode" uses "r31"
2200 as the return register while normal code uses "rp". */
26d08f08 2201 if (u->Millicode)
9f7194c3 2202 {
5859efe5 2203 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2204 {
2205 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2206 if (hppa_debug)
2207 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2208 }
9f7194c3
RC
2209 else
2210 {
227e86ad 2211 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2212 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2213 if (hppa_debug)
2214 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2215 }
2216 }
26d08f08 2217 else
9f7194c3 2218 {
34f75cc1 2219 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2220 {
2221 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2222 cache->saved_regs[HPPA_RP_REGNUM];
2223 if (hppa_debug)
2224 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2225 }
9f7194c3
RC
2226 else
2227 {
227e86ad
JB
2228 ULONGEST rp = get_frame_register_unsigned (this_frame,
2229 HPPA_RP_REGNUM);
34f75cc1 2230 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2231 if (hppa_debug)
2232 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2233 }
2234 }
26d08f08 2235
50b2f48a
RC
2236 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2237 frame. However, there is a one-insn window where we haven't saved it
2238 yet, but we've already clobbered it. Detect this case and fix it up.
2239
2240 The prologue sequence for frame-pointer functions is:
2241 0: stw %rp, -20(%sp)
2242 4: copy %r3, %r1
2243 8: copy %sp, %r3
2244 c: stw,ma %r1, XX(%sp)
2245
2246 So if we are at offset c, the r3 value that we want is not yet saved
2247 on the stack, but it's been overwritten. The prologue analyzer will
2248 set fp_in_r1 when it sees the copy insn so we know to get the value
2249 from r1 instead. */
2250 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2251 && fp_in_r1)
2252 {
227e86ad 2253 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2254 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2255 }
1658da49 2256
26d08f08
AC
2257 {
2258 /* Convert all the offsets into addresses. */
2259 int reg;
65c5db89 2260 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2261 {
2262 if (trad_frame_addr_p (cache->saved_regs, reg))
2263 cache->saved_regs[reg].addr += cache->base;
2264 }
2265 }
2266
f77a2124 2267 {
f77a2124
RC
2268 struct gdbarch_tdep *tdep;
2269
f77a2124
RC
2270 tdep = gdbarch_tdep (gdbarch);
2271
2272 if (tdep->unwind_adjust_stub)
227e86ad 2273 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2274 }
2275
369aa520 2276 if (hppa_debug)
5af949e3
UW
2277 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2278 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
2279 return (*this_cache);
2280}
2281
2282static void
227e86ad
JB
2283hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2284 struct frame_id *this_id)
26d08f08 2285{
d5c27f81 2286 struct hppa_frame_cache *info;
227e86ad 2287 CORE_ADDR pc = get_frame_pc (this_frame);
d5c27f81
RC
2288 struct unwind_table_entry *u;
2289
227e86ad
JB
2290 info = hppa_frame_cache (this_frame, this_cache);
2291 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2292
2293 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2294}
2295
227e86ad
JB
2296static struct value *
2297hppa_frame_prev_register (struct frame_info *this_frame,
2298 void **this_cache, int regnum)
26d08f08 2299{
227e86ad
JB
2300 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2301
1777feb0
MS
2302 return hppa_frame_prev_register_helper (this_frame,
2303 info->saved_regs, regnum);
227e86ad
JB
2304}
2305
2306static int
2307hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2308 struct frame_info *this_frame, void **this_cache)
2309{
2310 if (hppa_find_unwind_entry_in_block (this_frame))
2311 return 1;
2312
2313 return 0;
0da28f8a
RC
2314}
2315
2316static const struct frame_unwind hppa_frame_unwind =
2317{
2318 NORMAL_FRAME,
8fbca658 2319 default_frame_unwind_stop_reason,
0da28f8a 2320 hppa_frame_this_id,
227e86ad
JB
2321 hppa_frame_prev_register,
2322 NULL,
2323 hppa_frame_unwind_sniffer
0da28f8a
RC
2324};
2325
0da28f8a
RC
2326/* This is a generic fallback frame unwinder that kicks in if we fail all
2327 the other ones. Normally we would expect the stub and regular unwinder
2328 to work, but in some cases we might hit a function that just doesn't
2329 have any unwind information available. In this case we try to do
2330 unwinding solely based on code reading. This is obviously going to be
2331 slow, so only use this as a last resort. Currently this will only
2332 identify the stack and pc for the frame. */
2333
2334static struct hppa_frame_cache *
227e86ad 2335hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2336{
e17a4113
UW
2337 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2338 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2339 struct hppa_frame_cache *cache;
4ba6a975
MK
2340 unsigned int frame_size = 0;
2341 int found_rp = 0;
2342 CORE_ADDR start_pc;
0da28f8a 2343
d5c27f81 2344 if (hppa_debug)
4ba6a975
MK
2345 fprintf_unfiltered (gdb_stdlog,
2346 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2347 frame_relative_level (this_frame));
d5c27f81 2348
0da28f8a
RC
2349 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2350 (*this_cache) = cache;
227e86ad 2351 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2352
227e86ad 2353 start_pc = get_frame_func (this_frame);
4ba6a975 2354 if (start_pc)
0da28f8a 2355 {
227e86ad 2356 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2357 CORE_ADDR pc;
0da28f8a 2358
4ba6a975
MK
2359 for (pc = start_pc; pc < cur_pc; pc += 4)
2360 {
2361 unsigned int insn;
0da28f8a 2362
e17a4113 2363 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2364 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2365
4ba6a975
MK
2366 /* There are limited ways to store the return pointer into the
2367 stack. */
2368 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2369 {
2370 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2371 found_rp = 1;
2372 }
c4c79048
RC
2373 else if (insn == 0x0fc212c1
2374 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2375 {
2376 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2377 found_rp = 1;
2378 }
2379 }
412275d5 2380 }
0da28f8a 2381
d5c27f81 2382 if (hppa_debug)
4ba6a975
MK
2383 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2384 frame_size, found_rp);
d5c27f81 2385
227e86ad 2386 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2387 cache->base -= frame_size;
6d1be3f1 2388 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2389
2390 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2391 {
2392 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2393 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2394 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2395 }
412275d5
AC
2396 else
2397 {
4ba6a975 2398 ULONGEST rp;
227e86ad 2399 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2400 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2401 }
0da28f8a
RC
2402
2403 return cache;
26d08f08
AC
2404}
2405
0da28f8a 2406static void
227e86ad 2407hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2408 struct frame_id *this_id)
2409{
2410 struct hppa_frame_cache *info =
227e86ad
JB
2411 hppa_fallback_frame_cache (this_frame, this_cache);
2412
2413 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2414}
2415
227e86ad
JB
2416static struct value *
2417hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2418 void **this_cache, int regnum)
0da28f8a 2419{
1777feb0
MS
2420 struct hppa_frame_cache *info
2421 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2422
1777feb0
MS
2423 return hppa_frame_prev_register_helper (this_frame,
2424 info->saved_regs, regnum);
0da28f8a
RC
2425}
2426
2427static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2428{
2429 NORMAL_FRAME,
8fbca658 2430 default_frame_unwind_stop_reason,
0da28f8a 2431 hppa_fallback_frame_this_id,
227e86ad
JB
2432 hppa_fallback_frame_prev_register,
2433 NULL,
2434 default_frame_sniffer
26d08f08
AC
2435};
2436
7f07c5b6
RC
2437/* Stub frames, used for all kinds of call stubs. */
2438struct hppa_stub_unwind_cache
2439{
2440 CORE_ADDR base;
2441 struct trad_frame_saved_reg *saved_regs;
2442};
2443
2444static struct hppa_stub_unwind_cache *
227e86ad 2445hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2446 void **this_cache)
2447{
227e86ad 2448 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2449 struct hppa_stub_unwind_cache *info;
22b0923d 2450 struct unwind_table_entry *u;
7f07c5b6
RC
2451
2452 if (*this_cache)
2453 return *this_cache;
2454
2455 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2456 *this_cache = info;
227e86ad 2457 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2458
227e86ad 2459 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2460
090ccbb7 2461 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2462 {
2463 /* HPUX uses export stubs in function calls; the export stub clobbers
2464 the return value of the caller, and, later restores it from the
2465 stack. */
227e86ad 2466 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2467
2468 if (u && u->stub_unwind.stub_type == EXPORT)
2469 {
2470 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2471
2472 return info;
2473 }
2474 }
2475
2476 /* By default we assume that stubs do not change the rp. */
2477 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2478
7f07c5b6
RC
2479 return info;
2480}
2481
2482static void
227e86ad 2483hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2484 void **this_prologue_cache,
2485 struct frame_id *this_id)
2486{
2487 struct hppa_stub_unwind_cache *info
227e86ad 2488 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2489
2490 if (info)
227e86ad 2491 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2492}
2493
227e86ad
JB
2494static struct value *
2495hppa_stub_frame_prev_register (struct frame_info *this_frame,
2496 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2497{
2498 struct hppa_stub_unwind_cache *info
227e86ad 2499 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2500
227e86ad 2501 if (info == NULL)
8a3fe4f8 2502 error (_("Requesting registers from null frame."));
7f07c5b6 2503
1777feb0
MS
2504 return hppa_frame_prev_register_helper (this_frame,
2505 info->saved_regs, regnum);
227e86ad 2506}
7f07c5b6 2507
227e86ad
JB
2508static int
2509hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2510 struct frame_info *this_frame,
2511 void **this_cache)
7f07c5b6 2512{
227e86ad
JB
2513 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2514 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2515 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2516
6d1be3f1 2517 if (pc == 0
84674fe1 2518 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2519 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2520 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2521 return 1;
2522 return 0;
7f07c5b6
RC
2523}
2524
227e86ad
JB
2525static const struct frame_unwind hppa_stub_frame_unwind = {
2526 NORMAL_FRAME,
8fbca658 2527 default_frame_unwind_stop_reason,
227e86ad
JB
2528 hppa_stub_frame_this_id,
2529 hppa_stub_frame_prev_register,
2530 NULL,
2531 hppa_stub_unwind_sniffer
2532};
2533
26d08f08 2534static struct frame_id
227e86ad 2535hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2536{
227e86ad
JB
2537 return frame_id_build (get_frame_register_unsigned (this_frame,
2538 HPPA_SP_REGNUM),
2539 get_frame_pc (this_frame));
26d08f08
AC
2540}
2541
cc72850f 2542CORE_ADDR
26d08f08
AC
2543hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2544{
fe46cd3a
RC
2545 ULONGEST ipsw;
2546 CORE_ADDR pc;
2547
cc72850f
MK
2548 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2549 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2550
2551 /* If the current instruction is nullified, then we are effectively
2552 still executing the previous instruction. Pretend we are still
cc72850f
MK
2553 there. This is needed when single stepping; if the nullified
2554 instruction is on a different line, we don't want GDB to think
2555 we've stepped onto that line. */
fe46cd3a
RC
2556 if (ipsw & 0x00200000)
2557 pc -= 4;
2558
cc72850f 2559 return pc & ~0x3;
26d08f08
AC
2560}
2561
ff644745
JB
2562/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2563 Return NULL if no such symbol was found. */
2564
3b7344d5 2565struct bound_minimal_symbol
ff644745
JB
2566hppa_lookup_stub_minimal_symbol (const char *name,
2567 enum unwind_stub_types stub_type)
2568{
2569 struct objfile *objfile;
2570 struct minimal_symbol *msym;
3b7344d5 2571 struct bound_minimal_symbol result = { NULL, NULL };
ff644745
JB
2572
2573 ALL_MSYMBOLS (objfile, msym)
2574 {
efd66ac6 2575 if (strcmp (MSYMBOL_LINKAGE_NAME (msym), name) == 0)
ff644745
JB
2576 {
2577 struct unwind_table_entry *u;
2578
efd66ac6 2579 u = find_unwind_entry (MSYMBOL_VALUE (msym));
ff644745 2580 if (u != NULL && u->stub_unwind.stub_type == stub_type)
3b7344d5
TT
2581 {
2582 result.objfile = objfile;
2583 result.minsym = msym;
2584 return result;
2585 }
ff644745
JB
2586 }
2587 }
2588
3b7344d5 2589 return result;
ff644745
JB
2590}
2591
c906108c 2592static void
fba45db2 2593unwind_command (char *exp, int from_tty)
c906108c
SS
2594{
2595 CORE_ADDR address;
2596 struct unwind_table_entry *u;
2597
2598 /* If we have an expression, evaluate it and use it as the address. */
2599
2600 if (exp != 0 && *exp != 0)
2601 address = parse_and_eval_address (exp);
2602 else
2603 return;
2604
2605 u = find_unwind_entry (address);
2606
2607 if (!u)
2608 {
2609 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2610 return;
2611 }
2612
3329c4b5 2613 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2614
5af949e3 2615 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
d5c27f81 2616 gdb_flush (gdb_stdout);
c906108c 2617
5af949e3 2618 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
d5c27f81 2619 gdb_flush (gdb_stdout);
c906108c 2620
c906108c 2621#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2622
2623 printf_unfiltered ("\n\tflags =");
2624 pif (Cannot_unwind);
2625 pif (Millicode);
2626 pif (Millicode_save_sr0);
2627 pif (Entry_SR);
2628 pif (Args_stored);
2629 pif (Variable_Frame);
2630 pif (Separate_Package_Body);
2631 pif (Frame_Extension_Millicode);
2632 pif (Stack_Overflow_Check);
2633 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2634 pif (sr4export);
2635 pif (cxx_info);
2636 pif (cxx_try_catch);
2637 pif (sched_entry_seq);
c906108c
SS
2638 pif (Save_SP);
2639 pif (Save_RP);
2640 pif (Save_MRP_in_frame);
6fcecea0 2641 pif (save_r19);
c906108c
SS
2642 pif (Cleanup_defined);
2643 pif (MPE_XL_interrupt_marker);
2644 pif (HP_UX_interrupt_marker);
2645 pif (Large_frame);
6fcecea0 2646 pif (alloca_frame);
c906108c
SS
2647
2648 putchar_unfiltered ('\n');
2649
c906108c 2650#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2651
2652 pin (Region_description);
2653 pin (Entry_FR);
2654 pin (Entry_GR);
2655 pin (Total_frame_size);
57dac9e1
RC
2656
2657 if (u->stub_unwind.stub_type)
2658 {
2659 printf_unfiltered ("\tstub type = ");
2660 switch (u->stub_unwind.stub_type)
2661 {
2662 case LONG_BRANCH:
2663 printf_unfiltered ("long branch\n");
2664 break;
2665 case PARAMETER_RELOCATION:
2666 printf_unfiltered ("parameter relocation\n");
2667 break;
2668 case EXPORT:
2669 printf_unfiltered ("export\n");
2670 break;
2671 case IMPORT:
2672 printf_unfiltered ("import\n");
2673 break;
2674 case IMPORT_SHLIB:
2675 printf_unfiltered ("import shlib\n");
2676 break;
2677 default:
2678 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2679 }
2680 }
c906108c 2681}
c906108c 2682
38ca4e0c
MK
2683/* Return the GDB type object for the "standard" data type of data in
2684 register REGNUM. */
d709c020 2685
eded0a31 2686static struct type *
38ca4e0c 2687hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2688{
38ca4e0c 2689 if (regnum < HPPA_FP4_REGNUM)
df4df182 2690 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2691 else
27067745 2692 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2693}
2694
eded0a31 2695static struct type *
38ca4e0c 2696hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2697{
38ca4e0c 2698 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2699 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2700 else
27067745 2701 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2702}
2703
38ca4e0c
MK
2704/* Return non-zero if REGNUM is not a register available to the user
2705 through ptrace/ttrace. */
d709c020 2706
8d153463 2707static int
64a3914f 2708hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2709{
2710 return (regnum == 0
34f75cc1
RC
2711 || regnum == HPPA_PCSQ_HEAD_REGNUM
2712 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2713 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2714}
d709c020 2715
d037d088 2716static int
64a3914f 2717hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2718{
2719 /* cr26 and cr27 are readable (but not writable) from userspace. */
2720 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2721 return 0;
2722 else
64a3914f 2723 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2724}
2725
38ca4e0c 2726static int
64a3914f 2727hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2728{
2729 return (regnum == 0
2730 || regnum == HPPA_PCSQ_HEAD_REGNUM
2731 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2732 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2733}
2734
d037d088 2735static int
64a3914f 2736hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2737{
2738 /* cr26 and cr27 are readable (but not writable) from userspace. */
2739 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2740 return 0;
2741 else
64a3914f 2742 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2743}
2744
8d153463 2745static CORE_ADDR
85ddcc70 2746hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2747{
2748 /* The low two bits of the PC on the PA contain the privilege level.
2749 Some genius implementing a (non-GCC) compiler apparently decided
2750 this means that "addresses" in a text section therefore include a
2751 privilege level, and thus symbol tables should contain these bits.
2752 This seems like a bonehead thing to do--anyway, it seems to work
2753 for our purposes to just ignore those bits. */
2754
2755 return (addr &= ~0x3);
2756}
2757
e127f0db
MK
2758/* Get the ARGIth function argument for the current function. */
2759
4a302917 2760static CORE_ADDR
143985b7
AF
2761hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2762 struct type *type)
2763{
e127f0db 2764 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2765}
2766
05d1431c 2767static enum register_status
0f8d9d59 2768hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2769 int regnum, gdb_byte *buf)
0f8d9d59 2770{
05d1431c
PA
2771 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2772 ULONGEST tmp;
2773 enum register_status status;
0f8d9d59 2774
05d1431c
PA
2775 status = regcache_raw_read_unsigned (regcache, regnum, &tmp);
2776 if (status == REG_VALID)
2777 {
2778 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2779 tmp &= ~0x3;
2780 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2781 }
2782 return status;
0f8d9d59
RC
2783}
2784
d49771ef 2785static CORE_ADDR
e38c262f 2786hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2787{
2788 return 0;
2789}
2790
227e86ad
JB
2791struct value *
2792hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2793 struct trad_frame_saved_reg saved_regs[],
227e86ad 2794 int regnum)
0da28f8a 2795{
227e86ad 2796 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2797 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2798
8693c419
MK
2799 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2800 {
227e86ad
JB
2801 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2802 CORE_ADDR pc;
2803 struct value *pcoq_val =
2804 trad_frame_get_prev_register (this_frame, saved_regs,
2805 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2806
e17a4113
UW
2807 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2808 size, byte_order);
227e86ad 2809 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2810 }
0da28f8a 2811
227e86ad 2812 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2813}
8693c419 2814\f
0da28f8a 2815
34f55018
MK
2816/* An instruction to match. */
2817struct insn_pattern
2818{
2819 unsigned int data; /* See if it matches this.... */
2820 unsigned int mask; /* ... with this mask. */
2821};
2822
2823/* See bfd/elf32-hppa.c */
2824static struct insn_pattern hppa_long_branch_stub[] = {
2825 /* ldil LR'xxx,%r1 */
2826 { 0x20200000, 0xffe00000 },
2827 /* be,n RR'xxx(%sr4,%r1) */
2828 { 0xe0202002, 0xffe02002 },
2829 { 0, 0 }
2830};
2831
2832static struct insn_pattern hppa_long_branch_pic_stub[] = {
2833 /* b,l .+8, %r1 */
2834 { 0xe8200000, 0xffe00000 },
2835 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2836 { 0x28200000, 0xffe00000 },
2837 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2838 { 0xe0202002, 0xffe02002 },
2839 { 0, 0 }
2840};
2841
2842static struct insn_pattern hppa_import_stub[] = {
2843 /* addil LR'xxx, %dp */
2844 { 0x2b600000, 0xffe00000 },
2845 /* ldw RR'xxx(%r1), %r21 */
2846 { 0x48350000, 0xffffb000 },
2847 /* bv %r0(%r21) */
2848 { 0xeaa0c000, 0xffffffff },
2849 /* ldw RR'xxx+4(%r1), %r19 */
2850 { 0x48330000, 0xffffb000 },
2851 { 0, 0 }
2852};
2853
2854static struct insn_pattern hppa_import_pic_stub[] = {
2855 /* addil LR'xxx,%r19 */
2856 { 0x2a600000, 0xffe00000 },
2857 /* ldw RR'xxx(%r1),%r21 */
2858 { 0x48350000, 0xffffb000 },
2859 /* bv %r0(%r21) */
2860 { 0xeaa0c000, 0xffffffff },
2861 /* ldw RR'xxx+4(%r1),%r19 */
2862 { 0x48330000, 0xffffb000 },
2863 { 0, 0 },
2864};
2865
2866static struct insn_pattern hppa_plt_stub[] = {
2867 /* b,l 1b, %r20 - 1b is 3 insns before here */
2868 { 0xea9f1fdd, 0xffffffff },
2869 /* depi 0,31,2,%r20 */
2870 { 0xd6801c1e, 0xffffffff },
2871 { 0, 0 }
34f55018
MK
2872};
2873
2874/* Maximum number of instructions on the patterns above. */
2875#define HPPA_MAX_INSN_PATTERN_LEN 4
2876
2877/* Return non-zero if the instructions at PC match the series
2878 described in PATTERN, or zero otherwise. PATTERN is an array of
2879 'struct insn_pattern' objects, terminated by an entry whose mask is
2880 zero.
2881
2882 When the match is successful, fill INSN[i] with what PATTERN[i]
2883 matched. */
2884
2885static int
e17a4113
UW
2886hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2887 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2888{
e17a4113 2889 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2890 CORE_ADDR npc = pc;
2891 int i;
2892
2893 for (i = 0; pattern[i].mask; i++)
2894 {
2895 gdb_byte buf[HPPA_INSN_SIZE];
2896
8defab1a 2897 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2898 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2899 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2900 npc += 4;
2901 else
2902 return 0;
2903 }
2904
2905 return 1;
2906}
2907
2908/* This relaxed version of the insstruction matcher allows us to match
2909 from somewhere inside the pattern, by looking backwards in the
2910 instruction scheme. */
2911
2912static int
e17a4113
UW
2913hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2914 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2915{
2916 int offset, len = 0;
2917
2918 while (pattern[len].mask)
2919 len++;
2920
2921 for (offset = 0; offset < len; offset++)
e17a4113
UW
2922 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2923 pattern, insn))
34f55018
MK
2924 return 1;
2925
2926 return 0;
2927}
2928
2929static int
2930hppa_in_dyncall (CORE_ADDR pc)
2931{
2932 struct unwind_table_entry *u;
2933
2934 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2935 if (!u)
2936 return 0;
2937
2938 return (pc >= u->region_start && pc <= u->region_end);
2939}
2940
2941int
3e5d3a5a 2942hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2943{
2944 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2945 struct unwind_table_entry *u;
2946
3e5d3a5a 2947 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2948 return 1;
2949
2950 /* The GNU toolchain produces linker stubs without unwind
2951 information. Since the pattern matching for linker stubs can be
2952 quite slow, so bail out if we do have an unwind entry. */
2953
2954 u = find_unwind_entry (pc);
806e23c0 2955 if (u != NULL)
34f55018
MK
2956 return 0;
2957
e17a4113
UW
2958 return
2959 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2960 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2961 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2962 || hppa_match_insns_relaxed (gdbarch, pc,
2963 hppa_long_branch_pic_stub, insn));
34f55018
MK
2964}
2965
2966/* This code skips several kind of "trampolines" used on PA-RISC
2967 systems: $$dyncall, import stubs and PLT stubs. */
2968
2969CORE_ADDR
52f729a7 2970hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2971{
0dfff4cb
UW
2972 struct gdbarch *gdbarch = get_frame_arch (frame);
2973 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2974
34f55018
MK
2975 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2976 int dp_rel;
2977
2978 /* $$dyncall handles both PLABELs and direct addresses. */
2979 if (hppa_in_dyncall (pc))
2980 {
52f729a7 2981 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2982
2983 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2984 if (pc & 0x2)
0dfff4cb 2985 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2986
2987 return pc;
2988 }
2989
e17a4113
UW
2990 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2991 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2992 {
2993 /* Extract the target address from the addil/ldw sequence. */
2994 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2995
2996 if (dp_rel)
52f729a7 2997 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2998 else
52f729a7 2999 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
3000
3001 /* fallthrough */
3002 }
3003
3e5d3a5a 3004 if (in_plt_section (pc))
34f55018 3005 {
0dfff4cb 3006 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
3007
3008 /* If the PLT slot has not yet been resolved, the target will be
3009 the PLT stub. */
3e5d3a5a 3010 if (in_plt_section (pc))
34f55018
MK
3011 {
3012 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 3013 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 3014 {
5af949e3
UW
3015 warning (_("Cannot resolve PLT stub at %s."),
3016 paddress (gdbarch, pc));
34f55018
MK
3017 return 0;
3018 }
3019
3020 /* This should point to the fixup routine. */
0dfff4cb 3021 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
3022 }
3023 }
3024
3025 return pc;
3026}
3027\f
3028
8e8b2dba
MC
3029/* Here is a table of C type sizes on hppa with various compiles
3030 and options. I measured this on PA 9000/800 with HP-UX 11.11
3031 and these compilers:
3032
3033 /usr/ccs/bin/cc HP92453-01 A.11.01.21
3034 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
3035 /opt/aCC/bin/aCC B3910B A.03.45
3036 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
3037
3038 cc : 1 2 4 4 8 : 4 8 -- : 4 4
3039 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3040 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3041 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3042 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3043 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3044 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3045 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3046
3047 Each line is:
3048
3049 compiler and options
3050 char, short, int, long, long long
3051 float, double, long double
3052 char *, void (*)()
3053
3054 So all these compilers use either ILP32 or LP64 model.
3055 TODO: gcc has more options so it needs more investigation.
3056
a2379359
MC
3057 For floating point types, see:
3058
3059 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3060 HP-UX floating-point guide, hpux 11.00
3061
8e8b2dba
MC
3062 -- chastain 2003-12-18 */
3063
e6e68f1f
JB
3064static struct gdbarch *
3065hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3066{
3ff7cf9e 3067 struct gdbarch_tdep *tdep;
e6e68f1f 3068 struct gdbarch *gdbarch;
59623e27
JB
3069
3070 /* Try to determine the ABI of the object we are loading. */
4be87837 3071 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 3072 {
4be87837
DJ
3073 /* If it's a SOM file, assume it's HP/UX SOM. */
3074 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
3075 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 3076 }
e6e68f1f
JB
3077
3078 /* find a candidate among the list of pre-declared architectures. */
3079 arches = gdbarch_list_lookup_by_info (arches, &info);
3080 if (arches != NULL)
3081 return (arches->gdbarch);
3082
3083 /* If none found, then allocate and initialize one. */
41bf6aca 3084 tdep = XCNEW (struct gdbarch_tdep);
3ff7cf9e
JB
3085 gdbarch = gdbarch_alloc (&info, tdep);
3086
3087 /* Determine from the bfd_arch_info structure if we are dealing with
3088 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3089 then default to a 32bit machine. */
3090 if (info.bfd_arch_info != NULL)
3091 tdep->bytes_per_address =
3092 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3093 else
3094 tdep->bytes_per_address = 4;
3095
d49771ef
RC
3096 tdep->find_global_pointer = hppa_find_global_pointer;
3097
3ff7cf9e
JB
3098 /* Some parts of the gdbarch vector depend on whether we are running
3099 on a 32 bits or 64 bits target. */
3100 switch (tdep->bytes_per_address)
3101 {
3102 case 4:
3103 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3104 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3105 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3106 set_gdbarch_cannot_store_register (gdbarch,
3107 hppa32_cannot_store_register);
3108 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3109 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3110 break;
3111 case 8:
3112 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3113 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3114 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3115 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3116 set_gdbarch_cannot_store_register (gdbarch,
3117 hppa64_cannot_store_register);
3118 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3119 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3120 break;
3121 default:
e2e0b3e5 3122 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3123 tdep->bytes_per_address);
3124 }
3125
3ff7cf9e 3126 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3127 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3128
8e8b2dba
MC
3129 /* The following gdbarch vector elements are the same in both ILP32
3130 and LP64, but might show differences some day. */
3131 set_gdbarch_long_long_bit (gdbarch, 64);
3132 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3133 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3134
3ff7cf9e
JB
3135 /* The following gdbarch vector elements do not depend on the address
3136 size, or in any other gdbarch element previously set. */
60383d10 3137 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
1fb24930
RC
3138 set_gdbarch_in_function_epilogue_p (gdbarch,
3139 hppa_in_function_epilogue_p);
a2a84a72 3140 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3141 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3142 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3143 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3144 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3145 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3146 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3147
143985b7
AF
3148 /* Helper for function argument information. */
3149 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3150
36482093
AC
3151 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3152
3a3bc038
AC
3153 /* When a hardware watchpoint triggers, we'll move the inferior past
3154 it by removing all eventpoints; stepping past the instruction
3155 that caused the trigger; reinserting eventpoints; and checking
3156 whether any watched location changed. */
3157 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3158
5979bc46 3159 /* Inferior function call methods. */
fca7aa43 3160 switch (tdep->bytes_per_address)
5979bc46 3161 {
fca7aa43
AC
3162 case 4:
3163 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3164 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3165 set_gdbarch_convert_from_func_ptr_addr
3166 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3167 break;
3168 case 8:
782eae8b
AC
3169 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3170 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3171 break;
782eae8b 3172 default:
e2e0b3e5 3173 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3174 }
3175
3176 /* Struct return methods. */
fca7aa43 3177 switch (tdep->bytes_per_address)
fad850b2 3178 {
fca7aa43
AC
3179 case 4:
3180 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3181 break;
3182 case 8:
782eae8b 3183 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3184 break;
fca7aa43 3185 default:
e2e0b3e5 3186 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3187 }
7f07c5b6 3188
85f4f2d8 3189 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3190 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3191
5979bc46 3192 /* Frame unwind methods. */
227e86ad 3193 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3194 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3195
50306a9d
RC
3196 /* Hook in ABI-specific overrides, if they have been registered. */
3197 gdbarch_init_osabi (info, gdbarch);
3198
7f07c5b6 3199 /* Hook in the default unwinders. */
227e86ad
JB
3200 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3201 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3202 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3203
e6e68f1f
JB
3204 return gdbarch;
3205}
3206
3207static void
464963c9 3208hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3209{
464963c9 3210 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3211
3212 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3213 tdep->bytes_per_address);
3214 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3215}
3216
72753510
PA
3217/* Provide a prototype to silence -Wmissing-prototypes. */
3218extern initialize_file_ftype _initialize_hppa_tdep;
3219
4facf7e8
JB
3220void
3221_initialize_hppa_tdep (void)
3222{
3223 struct cmd_list_element *c;
4facf7e8 3224
e6e68f1f 3225 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3226
7c46b9fb
RC
3227 hppa_objfile_priv_data = register_objfile_data ();
3228
4facf7e8 3229 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3230 _("Print unwind table entry at given address."),
4facf7e8
JB
3231 &maintenanceprintlist);
3232
1777feb0 3233 /* Debug this files internals. */
7915a72c
AC
3234 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3235Set whether hppa target specific debugging information should be displayed."),
3236 _("\
3237Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3238This flag controls whether hppa target specific debugging information is\n\
3239displayed. This information is particularly useful for debugging frame\n\
7915a72c 3240unwinding problems."),
2c5b56ce 3241 NULL,
7915a72c 3242 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3243 &setdebuglist, &showdebuglist);
4facf7e8 3244}
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