PR python/18938: source -s foo.py with foo.py a symlink to foo.notpy fails
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
32d0add0 3 Copyright (C) 1986-2015 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
c906108c 42
369aa520
RC
43static int hppa_debug = 0;
44
60383d10 45/* Some local constants. */
3ff7cf9e
JB
46static const int hppa32_num_regs = 128;
47static const int hppa64_num_regs = 96;
48
61a12cfa
JK
49/* We use the objfile->obj_private pointer for two things:
50 * 1. An unwind table;
51 *
52 * 2. A pointer to any associated shared library object.
53 *
54 * #defines are used to help refer to these objects.
55 */
56
57/* Info about the unwind table associated with an object file.
58 * This is hung off of the "objfile->obj_private" pointer, and
59 * is allocated in the objfile's psymbol obstack. This allows
60 * us to have unique unwind info for each executable and shared
61 * library that we are debugging.
62 */
63struct hppa_unwind_info
64 {
65 struct unwind_table_entry *table; /* Pointer to unwind info */
66 struct unwind_table_entry *cache; /* Pointer to last entry we found */
67 int last; /* Index of last entry */
68 };
69
70struct hppa_objfile_private
71 {
72 struct hppa_unwind_info *unwind_info; /* a pointer */
73 struct so_list *so_info; /* a pointer */
74 CORE_ADDR dp;
75
76 int dummy_call_sequence_reg;
77 CORE_ADDR dummy_call_sequence_addr;
78 };
79
7c46b9fb
RC
80/* hppa-specific object data -- unwind and solib info.
81 TODO/maybe: think about splitting this into two parts; the unwind data is
82 common to all hppa targets, but is only used in this file; we can register
83 that separately and make this static. The solib data is probably hpux-
84 specific, so we can create a separate extern objfile_data that is registered
85 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
61a12cfa 86static const struct objfile_data *hppa_objfile_priv_data = NULL;
7c46b9fb 87
1777feb0 88/* Get at various relevent fields of an instruction word. */
e2ac8128
JB
89#define MASK_5 0x1f
90#define MASK_11 0x7ff
91#define MASK_14 0x3fff
92#define MASK_21 0x1fffff
93
e2ac8128
JB
94/* Sizes (in bytes) of the native unwind entries. */
95#define UNWIND_ENTRY_SIZE 16
96#define STUB_UNWIND_ENTRY_SIZE 8
97
c906108c 98/* Routines to extract various sized constants out of hppa
1777feb0 99 instructions. */
c906108c
SS
100
101/* This assumes that no garbage lies outside of the lower bits of
1777feb0 102 value. */
c906108c 103
63807e1d 104static int
abc485a1 105hppa_sign_extend (unsigned val, unsigned bits)
c906108c 106{
c5aa993b 107 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
108}
109
1777feb0 110/* For many immediate values the sign bit is the low bit! */
c906108c 111
63807e1d 112static int
abc485a1 113hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 114{
c5aa993b 115 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
116}
117
e2ac8128 118/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 119 (MSB = 0). */
e2ac8128 120
abc485a1
RC
121int
122hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
123{
124 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
125}
126
1777feb0 127/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 128
abc485a1
RC
129int
130hppa_extract_5_load (unsigned word)
c906108c 131{
abc485a1 132 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
133}
134
1777feb0 135/* Extract the immediate field from a break instruction. */
c906108c 136
abc485a1
RC
137unsigned
138hppa_extract_5r_store (unsigned word)
c906108c
SS
139{
140 return (word & MASK_5);
141}
142
1777feb0 143/* Extract the immediate field from a {sr}sm instruction. */
c906108c 144
abc485a1
RC
145unsigned
146hppa_extract_5R_store (unsigned word)
c906108c
SS
147{
148 return (word >> 16 & MASK_5);
149}
150
1777feb0 151/* Extract a 14 bit immediate field. */
c906108c 152
abc485a1
RC
153int
154hppa_extract_14 (unsigned word)
c906108c 155{
abc485a1 156 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
157}
158
1777feb0 159/* Extract a 21 bit constant. */
c906108c 160
abc485a1
RC
161int
162hppa_extract_21 (unsigned word)
c906108c
SS
163{
164 int val;
165
166 word &= MASK_21;
167 word <<= 11;
abc485a1 168 val = hppa_get_field (word, 20, 20);
c906108c 169 val <<= 11;
abc485a1 170 val |= hppa_get_field (word, 9, 19);
c906108c 171 val <<= 2;
abc485a1 172 val |= hppa_get_field (word, 5, 6);
c906108c 173 val <<= 5;
abc485a1 174 val |= hppa_get_field (word, 0, 4);
c906108c 175 val <<= 2;
abc485a1
RC
176 val |= hppa_get_field (word, 7, 8);
177 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
178}
179
c906108c 180/* extract a 17 bit constant from branch instructions, returning the
1777feb0 181 19 bit signed value. */
c906108c 182
abc485a1
RC
183int
184hppa_extract_17 (unsigned word)
c906108c 185{
abc485a1
RC
186 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
187 hppa_get_field (word, 29, 29) << 10 |
188 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
189 (word & 0x1) << 16, 17) << 2;
190}
3388d7ff
RC
191
192CORE_ADDR
193hppa_symbol_address(const char *sym)
194{
3b7344d5 195 struct bound_minimal_symbol minsym;
3388d7ff
RC
196
197 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 198 if (minsym.minsym)
77e371c0 199 return BMSYMBOL_VALUE_ADDRESS (minsym);
3388d7ff
RC
200 else
201 return (CORE_ADDR)-1;
202}
77d18ded 203
61a12cfa 204static struct hppa_objfile_private *
77d18ded
RC
205hppa_init_objfile_priv_data (struct objfile *objfile)
206{
207 struct hppa_objfile_private *priv;
208
209 priv = (struct hppa_objfile_private *)
210 obstack_alloc (&objfile->objfile_obstack,
211 sizeof (struct hppa_objfile_private));
212 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
213 memset (priv, 0, sizeof (*priv));
214
215 return priv;
216}
c906108c
SS
217\f
218
219/* Compare the start address for two unwind entries returning 1 if
220 the first address is larger than the second, -1 if the second is
221 larger than the first, and zero if they are equal. */
222
223static int
fba45db2 224compare_unwind_entries (const void *arg1, const void *arg2)
c906108c 225{
9a3c8263
SM
226 const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1;
227 const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2;
c906108c
SS
228
229 if (a->region_start > b->region_start)
230 return 1;
231 else if (a->region_start < b->region_start)
232 return -1;
233 else
234 return 0;
235}
236
53a5351d 237static void
fdd72f95 238record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 239{
fdd72f95 240 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 241 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
242 {
243 bfd_vma value = section->vma - section->filepos;
244 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
245
246 if (value < *low_text_segment_address)
247 *low_text_segment_address = value;
248 }
53a5351d
JM
249}
250
c906108c 251static void
fba45db2 252internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 253 asection *section, unsigned int entries,
241fd515 254 size_t size, CORE_ADDR text_offset)
c906108c
SS
255{
256 /* We will read the unwind entries into temporary memory, then
257 fill in the actual unwind table. */
fdd72f95 258
c906108c
SS
259 if (size > 0)
260 {
5db8bbe5 261 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
262 unsigned long tmp;
263 unsigned i;
224c3ddb 264 char *buf = (char *) alloca (size);
fdd72f95 265 CORE_ADDR low_text_segment_address;
c906108c 266
fdd72f95 267 /* For ELF targets, then unwinds are supposed to
1777feb0 268 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
269
270 Note that when loading a shared library (text_offset != 0) the
271 unwinds are already relative to the text_offset that will be
272 passed in. */
5db8bbe5 273 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 274 {
fdd72f95
RC
275 low_text_segment_address = -1;
276
53a5351d 277 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
278 record_text_segment_lowaddr,
279 &low_text_segment_address);
53a5351d 280
fdd72f95 281 text_offset = low_text_segment_address;
53a5351d 282 }
5db8bbe5 283 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 284 {
5db8bbe5 285 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 286 }
53a5351d 287
c906108c
SS
288 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
289
290 /* Now internalize the information being careful to handle host/target
c5aa993b 291 endian issues. */
c906108c
SS
292 for (i = 0; i < entries; i++)
293 {
294 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 295 (bfd_byte *) buf);
c906108c
SS
296 table[i].region_start += text_offset;
297 buf += 4;
c5aa993b 298 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
299 table[i].region_end += text_offset;
300 buf += 4;
c5aa993b 301 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
302 buf += 4;
303 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
304 table[i].Millicode = (tmp >> 30) & 0x1;
305 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
306 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 307 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
308 table[i].Entry_SR = (tmp >> 25) & 0x1;
309 table[i].Entry_FR = (tmp >> 21) & 0xf;
310 table[i].Entry_GR = (tmp >> 16) & 0x1f;
311 table[i].Args_stored = (tmp >> 15) & 0x1;
312 table[i].Variable_Frame = (tmp >> 14) & 0x1;
313 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
314 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
315 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
316 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 317 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
318 table[i].cxx_info = (tmp >> 8) & 0x1;
319 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
320 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 321 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
322 table[i].Save_SP = (tmp >> 4) & 0x1;
323 table[i].Save_RP = (tmp >> 3) & 0x1;
324 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 325 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 326 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 327 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
328 buf += 4;
329 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
330 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
331 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
332 table[i].alloca_frame = (tmp >> 28) & 0x1;
333 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
334 table[i].Total_frame_size = tmp & 0x7ffffff;
335
1777feb0 336 /* Stub unwinds are handled elsewhere. */
c906108c
SS
337 table[i].stub_unwind.stub_type = 0;
338 table[i].stub_unwind.padding = 0;
339 }
340 }
341}
342
343/* Read in the backtrace information stored in the `$UNWIND_START$' section of
344 the object file. This info is used mainly by find_unwind_entry() to find
345 out the stack frame size and frame pointer used by procedures. We put
346 everything on the psymbol obstack in the objfile so that it automatically
347 gets freed when the objfile is destroyed. */
348
349static void
fba45db2 350read_unwind_info (struct objfile *objfile)
c906108c 351{
d4f3574e 352 asection *unwind_sec, *stub_unwind_sec;
241fd515 353 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 354 unsigned index, unwind_entries;
c906108c
SS
355 unsigned stub_entries, total_entries;
356 CORE_ADDR text_offset;
7c46b9fb
RC
357 struct hppa_unwind_info *ui;
358 struct hppa_objfile_private *obj_private;
c906108c 359
a99dad3d 360 text_offset = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
7c46b9fb
RC
361 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
362 sizeof (struct hppa_unwind_info));
c906108c
SS
363
364 ui->table = NULL;
365 ui->cache = NULL;
366 ui->last = -1;
367
d4f3574e
SS
368 /* For reasons unknown the HP PA64 tools generate multiple unwinder
369 sections in a single executable. So we just iterate over every
370 section in the BFD looking for unwinder sections intead of trying
1777feb0 371 to do a lookup with bfd_get_section_by_name.
c906108c 372
d4f3574e
SS
373 First determine the total size of the unwind tables so that we
374 can allocate memory in a nice big hunk. */
375 total_entries = 0;
376 for (unwind_sec = objfile->obfd->sections;
377 unwind_sec;
378 unwind_sec = unwind_sec->next)
c906108c 379 {
d4f3574e
SS
380 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
381 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
382 {
383 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
384 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 385
d4f3574e
SS
386 total_entries += unwind_entries;
387 }
c906108c
SS
388 }
389
d4f3574e 390 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 391 use stub unwinds at the current time. */
d4f3574e
SS
392 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
393
c906108c
SS
394 if (stub_unwind_sec)
395 {
396 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
397 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
398 }
399 else
400 {
401 stub_unwind_size = 0;
402 stub_entries = 0;
403 }
404
405 /* Compute total number of unwind entries and their total size. */
d4f3574e 406 total_entries += stub_entries;
c906108c
SS
407 total_size = total_entries * sizeof (struct unwind_table_entry);
408
409 /* Allocate memory for the unwind table. */
410 ui->table = (struct unwind_table_entry *)
8b92e4d5 411 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 412 ui->last = total_entries - 1;
c906108c 413
d4f3574e
SS
414 /* Now read in each unwind section and internalize the standard unwind
415 entries. */
c906108c 416 index = 0;
d4f3574e
SS
417 for (unwind_sec = objfile->obfd->sections;
418 unwind_sec;
419 unwind_sec = unwind_sec->next)
420 {
421 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
422 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
423 {
424 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
425 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
426
427 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
428 unwind_entries, unwind_size, text_offset);
429 index += unwind_entries;
430 }
431 }
432
433 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
434 if (stub_unwind_size > 0)
435 {
436 unsigned int i;
224c3ddb 437 char *buf = (char *) alloca (stub_unwind_size);
c906108c
SS
438
439 /* Read in the stub unwind entries. */
440 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
441 0, stub_unwind_size);
442
443 /* Now convert them into regular unwind entries. */
444 for (i = 0; i < stub_entries; i++, index++)
445 {
446 /* Clear out the next unwind entry. */
447 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
448
1777feb0 449 /* Convert offset & size into region_start and region_end.
c906108c
SS
450 Stuff away the stub type into "reserved" fields. */
451 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
452 (bfd_byte *) buf);
453 ui->table[index].region_start += text_offset;
454 buf += 4;
455 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 456 (bfd_byte *) buf);
c906108c
SS
457 buf += 2;
458 ui->table[index].region_end
c5aa993b
JM
459 = ui->table[index].region_start + 4 *
460 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
461 buf += 2;
462 }
463
464 }
465
466 /* Unwind table needs to be kept sorted. */
467 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
468 compare_unwind_entries);
469
470 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
471 obj_private = (struct hppa_objfile_private *)
472 objfile_data (objfile, hppa_objfile_priv_data);
473 if (obj_private == NULL)
77d18ded
RC
474 obj_private = hppa_init_objfile_priv_data (objfile);
475
c906108c
SS
476 obj_private->unwind_info = ui;
477}
478
479/* Lookup the unwind (stack backtrace) info for the given PC. We search all
480 of the objfiles seeking the unwind table entry for this PC. Each objfile
481 contains a sorted list of struct unwind_table_entry. Since we do a binary
482 search of the unwind tables, we depend upon them to be sorted. */
483
484struct unwind_table_entry *
fba45db2 485find_unwind_entry (CORE_ADDR pc)
c906108c
SS
486{
487 int first, middle, last;
488 struct objfile *objfile;
7c46b9fb 489 struct hppa_objfile_private *priv;
c906108c 490
369aa520 491 if (hppa_debug)
5af949e3
UW
492 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
493 hex_string (pc));
369aa520 494
1777feb0 495 /* A function at address 0? Not in HP-UX! */
c906108c 496 if (pc == (CORE_ADDR) 0)
369aa520
RC
497 {
498 if (hppa_debug)
499 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
500 return NULL;
501 }
c906108c
SS
502
503 ALL_OBJFILES (objfile)
c5aa993b 504 {
7c46b9fb 505 struct hppa_unwind_info *ui;
c5aa993b 506 ui = NULL;
9a3c8263
SM
507 priv = ((struct hppa_objfile_private *)
508 objfile_data (objfile, hppa_objfile_priv_data));
7c46b9fb
RC
509 if (priv)
510 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 511
c5aa993b
JM
512 if (!ui)
513 {
514 read_unwind_info (objfile);
9a3c8263
SM
515 priv = ((struct hppa_objfile_private *)
516 objfile_data (objfile, hppa_objfile_priv_data));
7c46b9fb 517 if (priv == NULL)
8a3fe4f8 518 error (_("Internal error reading unwind information."));
7c46b9fb 519 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 520 }
c906108c 521
1777feb0 522 /* First, check the cache. */
c906108c 523
c5aa993b
JM
524 if (ui->cache
525 && pc >= ui->cache->region_start
526 && pc <= ui->cache->region_end)
369aa520
RC
527 {
528 if (hppa_debug)
5af949e3
UW
529 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
530 hex_string ((uintptr_t) ui->cache));
369aa520
RC
531 return ui->cache;
532 }
c906108c 533
1777feb0 534 /* Not in the cache, do a binary search. */
c906108c 535
c5aa993b
JM
536 first = 0;
537 last = ui->last;
c906108c 538
c5aa993b
JM
539 while (first <= last)
540 {
541 middle = (first + last) / 2;
542 if (pc >= ui->table[middle].region_start
543 && pc <= ui->table[middle].region_end)
544 {
545 ui->cache = &ui->table[middle];
369aa520 546 if (hppa_debug)
5af949e3
UW
547 fprintf_unfiltered (gdb_stdlog, "%s }\n",
548 hex_string ((uintptr_t) ui->cache));
c5aa993b
JM
549 return &ui->table[middle];
550 }
c906108c 551
c5aa993b
JM
552 if (pc < ui->table[middle].region_start)
553 last = middle - 1;
554 else
555 first = middle + 1;
556 }
557 } /* ALL_OBJFILES() */
369aa520
RC
558
559 if (hppa_debug)
560 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
561
c906108c
SS
562 return NULL;
563}
564
c9cf6e20
MG
565/* Implement the stack_frame_destroyed_p gdbarch method.
566
567 The epilogue is defined here as the area either on the `bv' instruction
1777feb0 568 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
569
570 We do not assume that the epilogue is at the end of a function as we can
571 also have return sequences in the middle of a function. */
c9cf6e20 572
1fb24930 573static int
c9cf6e20 574hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1fb24930 575{
e17a4113 576 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
577 unsigned long status;
578 unsigned int inst;
e362b510 579 gdb_byte buf[4];
1fb24930 580
8defab1a 581 status = target_read_memory (pc, buf, 4);
1fb24930
RC
582 if (status != 0)
583 return 0;
584
e17a4113 585 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
586
587 /* The most common way to perform a stack adjustment ldo X(sp),sp
588 We are destroying a stack frame if the offset is negative. */
589 if ((inst & 0xffffc000) == 0x37de0000
590 && hppa_extract_14 (inst) < 0)
591 return 1;
592
593 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
594 if (((inst & 0x0fc010e0) == 0x0fc010e0
595 || (inst & 0x0fc010e0) == 0x0fc010e0)
596 && hppa_extract_14 (inst) < 0)
597 return 1;
598
599 /* bv %r0(%rp) or bv,n %r0(%rp) */
600 if (inst == 0xe840c000 || inst == 0xe840c002)
601 return 1;
602
603 return 0;
604}
605
85f4f2d8 606static const unsigned char *
67d57894 607hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 608{
56132691 609 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
610 (*len) = sizeof (breakpoint);
611 return breakpoint;
612}
613
e23457df
AC
614/* Return the name of a register. */
615
4a302917 616static const char *
d93859e2 617hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
618{
619 static char *names[] = {
620 "flags", "r1", "rp", "r3",
621 "r4", "r5", "r6", "r7",
622 "r8", "r9", "r10", "r11",
623 "r12", "r13", "r14", "r15",
624 "r16", "r17", "r18", "r19",
625 "r20", "r21", "r22", "r23",
626 "r24", "r25", "r26", "dp",
627 "ret0", "ret1", "sp", "r31",
628 "sar", "pcoqh", "pcsqh", "pcoqt",
629 "pcsqt", "eiem", "iir", "isr",
630 "ior", "ipsw", "goto", "sr4",
631 "sr0", "sr1", "sr2", "sr3",
632 "sr5", "sr6", "sr7", "cr0",
633 "cr8", "cr9", "ccr", "cr12",
634 "cr13", "cr24", "cr25", "cr26",
635 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
636 "fpsr", "fpe1", "fpe2", "fpe3",
637 "fpe4", "fpe5", "fpe6", "fpe7",
638 "fr4", "fr4R", "fr5", "fr5R",
639 "fr6", "fr6R", "fr7", "fr7R",
640 "fr8", "fr8R", "fr9", "fr9R",
641 "fr10", "fr10R", "fr11", "fr11R",
642 "fr12", "fr12R", "fr13", "fr13R",
643 "fr14", "fr14R", "fr15", "fr15R",
644 "fr16", "fr16R", "fr17", "fr17R",
645 "fr18", "fr18R", "fr19", "fr19R",
646 "fr20", "fr20R", "fr21", "fr21R",
647 "fr22", "fr22R", "fr23", "fr23R",
648 "fr24", "fr24R", "fr25", "fr25R",
649 "fr26", "fr26R", "fr27", "fr27R",
650 "fr28", "fr28R", "fr29", "fr29R",
651 "fr30", "fr30R", "fr31", "fr31R"
652 };
653 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
654 return NULL;
655 else
656 return names[i];
657}
658
4a302917 659static const char *
d93859e2 660hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
661{
662 static char *names[] = {
663 "flags", "r1", "rp", "r3",
664 "r4", "r5", "r6", "r7",
665 "r8", "r9", "r10", "r11",
666 "r12", "r13", "r14", "r15",
667 "r16", "r17", "r18", "r19",
668 "r20", "r21", "r22", "r23",
669 "r24", "r25", "r26", "dp",
670 "ret0", "ret1", "sp", "r31",
671 "sar", "pcoqh", "pcsqh", "pcoqt",
672 "pcsqt", "eiem", "iir", "isr",
673 "ior", "ipsw", "goto", "sr4",
674 "sr0", "sr1", "sr2", "sr3",
675 "sr5", "sr6", "sr7", "cr0",
676 "cr8", "cr9", "ccr", "cr12",
677 "cr13", "cr24", "cr25", "cr26",
678 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
679 "fpsr", "fpe1", "fpe2", "fpe3",
680 "fr4", "fr5", "fr6", "fr7",
681 "fr8", "fr9", "fr10", "fr11",
682 "fr12", "fr13", "fr14", "fr15",
683 "fr16", "fr17", "fr18", "fr19",
684 "fr20", "fr21", "fr22", "fr23",
685 "fr24", "fr25", "fr26", "fr27",
686 "fr28", "fr29", "fr30", "fr31"
687 };
688 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
689 return NULL;
690 else
691 return names[i];
692}
693
85c83e99 694/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 695static int
d3f73121 696hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 697{
85c83e99 698 /* The general registers and the sar are the same in both sets. */
1ef7fcb5
RC
699 if (reg <= 32)
700 return reg;
701
702 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 703 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
704 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
705
85c83e99 706 warning (_("Unmapped DWARF DBX Register #%d encountered."), reg);
1ef7fcb5
RC
707 return -1;
708}
709
79508e1e
AC
710/* This function pushes a stack frame with arguments as part of the
711 inferior function calling mechanism.
712
713 This is the version of the function for the 32-bit PA machines, in
714 which later arguments appear at lower addresses. (The stack always
715 grows towards higher addresses.)
716
717 We simply allocate the appropriate amount of stack space and put
718 arguments into their proper slots. */
719
4a302917 720static CORE_ADDR
7d9b040b 721hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
722 struct regcache *regcache, CORE_ADDR bp_addr,
723 int nargs, struct value **args, CORE_ADDR sp,
724 int struct_return, CORE_ADDR struct_addr)
725{
e17a4113
UW
726 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
727
79508e1e
AC
728 /* Stack base address at which any pass-by-reference parameters are
729 stored. */
730 CORE_ADDR struct_end = 0;
731 /* Stack base address at which the first parameter is stored. */
732 CORE_ADDR param_end = 0;
733
734 /* The inner most end of the stack after all the parameters have
735 been pushed. */
736 CORE_ADDR new_sp = 0;
737
738 /* Two passes. First pass computes the location of everything,
739 second pass writes the bytes out. */
740 int write_pass;
d49771ef
RC
741
742 /* Global pointer (r19) of the function we are trying to call. */
743 CORE_ADDR gp;
744
745 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
746
79508e1e
AC
747 for (write_pass = 0; write_pass < 2; write_pass++)
748 {
1797a8f6 749 CORE_ADDR struct_ptr = 0;
1777feb0 750 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
2a6228ef
RC
751 struct_ptr is adjusted for each argument below, so the first
752 argument will end up at sp-36. */
753 CORE_ADDR param_ptr = 32;
79508e1e 754 int i;
2a6228ef
RC
755 int small_struct = 0;
756
79508e1e
AC
757 for (i = 0; i < nargs; i++)
758 {
759 struct value *arg = args[i];
4991999e 760 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
761 /* The corresponding parameter that is pushed onto the
762 stack, and [possibly] passed in a register. */
948f8e3d 763 gdb_byte param_val[8];
79508e1e
AC
764 int param_len;
765 memset (param_val, 0, sizeof param_val);
766 if (TYPE_LENGTH (type) > 8)
767 {
768 /* Large parameter, pass by reference. Store the value
769 in "struct" area and then pass its address. */
770 param_len = 4;
1797a8f6 771 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 772 if (write_pass)
0fd88904 773 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 774 TYPE_LENGTH (type));
e17a4113
UW
775 store_unsigned_integer (param_val, 4, byte_order,
776 struct_end - struct_ptr);
79508e1e
AC
777 }
778 else if (TYPE_CODE (type) == TYPE_CODE_INT
779 || TYPE_CODE (type) == TYPE_CODE_ENUM)
780 {
781 /* Integer value store, right aligned. "unpack_long"
782 takes care of any sign-extension problems. */
783 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 784 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 785 unpack_long (type,
0fd88904 786 value_contents (arg)));
79508e1e 787 }
2a6228ef
RC
788 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
789 {
790 /* Floating point value store, right aligned. */
791 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 792 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 793 }
79508e1e
AC
794 else
795 {
79508e1e 796 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
797
798 /* Small struct value are stored right-aligned. */
79508e1e 799 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 800 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
801
802 /* Structures of size 5, 6 and 7 bytes are special in that
803 the higher-ordered word is stored in the lower-ordered
804 argument, and even though it is a 8-byte quantity the
805 registers need not be 8-byte aligned. */
1b07b470 806 if (param_len > 4 && param_len < 8)
2a6228ef 807 small_struct = 1;
79508e1e 808 }
2a6228ef 809
1797a8f6 810 param_ptr += param_len;
2a6228ef
RC
811 if (param_len == 8 && !small_struct)
812 param_ptr = align_up (param_ptr, 8);
813
814 /* First 4 non-FP arguments are passed in gr26-gr23.
815 First 4 32-bit FP arguments are passed in fr4L-fr7L.
816 First 2 64-bit FP arguments are passed in fr5 and fr7.
817
818 The rest go on the stack, starting at sp-36, towards lower
819 addresses. 8-byte arguments must be aligned to a 8-byte
820 stack boundary. */
79508e1e
AC
821 if (write_pass)
822 {
1797a8f6 823 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
824
825 /* There are some cases when we don't know the type
826 expected by the callee (e.g. for variadic functions), so
827 pass the parameters in both general and fp regs. */
828 if (param_ptr <= 48)
79508e1e 829 {
2a6228ef
RC
830 int grreg = 26 - (param_ptr - 36) / 4;
831 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
832 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
833
834 regcache_cooked_write (regcache, grreg, param_val);
835 regcache_cooked_write (regcache, fpLreg, param_val);
836
79508e1e 837 if (param_len > 4)
2a6228ef
RC
838 {
839 regcache_cooked_write (regcache, grreg + 1,
840 param_val + 4);
841
842 regcache_cooked_write (regcache, fpreg, param_val);
843 regcache_cooked_write (regcache, fpreg + 1,
844 param_val + 4);
845 }
79508e1e
AC
846 }
847 }
848 }
849
850 /* Update the various stack pointers. */
851 if (!write_pass)
852 {
2a6228ef 853 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
854 /* PARAM_PTR already accounts for all the arguments passed
855 by the user. However, the ABI mandates minimum stack
856 space allocations for outgoing arguments. The ABI also
857 mandates minimum stack alignments which we must
858 preserve. */
2a6228ef 859 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
860 }
861 }
862
863 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 864 address. */
79508e1e 865 if (struct_return)
9c9acae0 866 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 867
e38c262f 868 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
869
870 if (gp != 0)
9c9acae0 871 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 872
79508e1e 873 /* Set the return address. */
77d18ded
RC
874 if (!gdbarch_push_dummy_code_p (gdbarch))
875 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 876
c4557624 877 /* Update the Stack Pointer. */
34f75cc1 878 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 879
2a6228ef 880 return param_end;
79508e1e
AC
881}
882
38ca4e0c
MK
883/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
884 Runtime Architecture for PA-RISC 2.0", which is distributed as part
885 as of the HP-UX Software Transition Kit (STK). This implementation
886 is based on version 3.3, dated October 6, 1997. */
2f690297 887
38ca4e0c 888/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 889
38ca4e0c
MK
890static int
891hppa64_integral_or_pointer_p (const struct type *type)
892{
893 switch (TYPE_CODE (type))
894 {
895 case TYPE_CODE_INT:
896 case TYPE_CODE_BOOL:
897 case TYPE_CODE_CHAR:
898 case TYPE_CODE_ENUM:
899 case TYPE_CODE_RANGE:
900 {
901 int len = TYPE_LENGTH (type);
902 return (len == 1 || len == 2 || len == 4 || len == 8);
903 }
904 case TYPE_CODE_PTR:
905 case TYPE_CODE_REF:
906 return (TYPE_LENGTH (type) == 8);
907 default:
908 break;
909 }
910
911 return 0;
912}
913
914/* Check whether TYPE is a "Floating Scalar Type". */
915
916static int
917hppa64_floating_p (const struct type *type)
918{
919 switch (TYPE_CODE (type))
920 {
921 case TYPE_CODE_FLT:
922 {
923 int len = TYPE_LENGTH (type);
924 return (len == 4 || len == 8 || len == 16);
925 }
926 default:
927 break;
928 }
929
930 return 0;
931}
2f690297 932
1218e655
RC
933/* If CODE points to a function entry address, try to look up the corresponding
934 function descriptor and return its address instead. If CODE is not a
935 function entry address, then just return it unchanged. */
936static CORE_ADDR
e17a4113 937hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 938{
e17a4113 939 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
940 struct obj_section *sec, *opd;
941
942 sec = find_pc_section (code);
943
944 if (!sec)
945 return code;
946
947 /* If CODE is in a data section, assume it's already a fptr. */
948 if (!(sec->the_bfd_section->flags & SEC_CODE))
949 return code;
950
951 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
952 {
953 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 954 break;
1218e655
RC
955 }
956
957 if (opd < sec->objfile->sections_end)
958 {
959 CORE_ADDR addr;
960
aded6f54
PA
961 for (addr = obj_section_addr (opd);
962 addr < obj_section_endaddr (opd);
963 addr += 2 * 8)
964 {
1218e655 965 ULONGEST opdaddr;
948f8e3d 966 gdb_byte tmp[8];
1218e655
RC
967
968 if (target_read_memory (addr, tmp, sizeof (tmp)))
969 break;
e17a4113 970 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 971
aded6f54 972 if (opdaddr == code)
1218e655
RC
973 return addr - 16;
974 }
975 }
976
977 return code;
978}
979
4a302917 980static CORE_ADDR
7d9b040b 981hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
982 struct regcache *regcache, CORE_ADDR bp_addr,
983 int nargs, struct value **args, CORE_ADDR sp,
984 int struct_return, CORE_ADDR struct_addr)
985{
38ca4e0c 986 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 987 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
988 int i, offset = 0;
989 CORE_ADDR gp;
2f690297 990
38ca4e0c
MK
991 /* "The outgoing parameter area [...] must be aligned at a 16-byte
992 boundary." */
993 sp = align_up (sp, 16);
2f690297 994
38ca4e0c
MK
995 for (i = 0; i < nargs; i++)
996 {
997 struct value *arg = args[i];
998 struct type *type = value_type (arg);
999 int len = TYPE_LENGTH (type);
0fd88904 1000 const bfd_byte *valbuf;
1218e655 1001 bfd_byte fptrbuf[8];
38ca4e0c 1002 int regnum;
2f690297 1003
38ca4e0c
MK
1004 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
1005 offset = align_up (offset, 8);
77d18ded 1006
38ca4e0c 1007 if (hppa64_integral_or_pointer_p (type))
2f690297 1008 {
38ca4e0c
MK
1009 /* "Integral scalar parameters smaller than 64 bits are
1010 padded on the left (i.e., the value is in the
1011 least-significant bits of the 64-bit storage unit, and
1012 the high-order bits are undefined)." Therefore we can
1013 safely sign-extend them. */
1014 if (len < 8)
449e1137 1015 {
df4df182 1016 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
1017 len = 8;
1018 }
1019 }
1020 else if (hppa64_floating_p (type))
1021 {
1022 if (len > 8)
1023 {
1024 /* "Quad-precision (128-bit) floating-point scalar
1025 parameters are aligned on a 16-byte boundary." */
1026 offset = align_up (offset, 16);
1027
1028 /* "Double-extended- and quad-precision floating-point
1029 parameters within the first 64 bytes of the parameter
1030 list are always passed in general registers." */
449e1137
AC
1031 }
1032 else
1033 {
38ca4e0c 1034 if (len == 4)
449e1137 1035 {
38ca4e0c
MK
1036 /* "Single-precision (32-bit) floating-point scalar
1037 parameters are padded on the left with 32 bits of
1038 garbage (i.e., the floating-point value is in the
1039 least-significant 32 bits of a 64-bit storage
1040 unit)." */
1041 offset += 4;
449e1137 1042 }
38ca4e0c
MK
1043
1044 /* "Single- and double-precision floating-point
1045 parameters in this area are passed according to the
1046 available formal parameter information in a function
1047 prototype. [...] If no prototype is in scope,
1048 floating-point parameters must be passed both in the
1049 corresponding general registers and in the
1050 corresponding floating-point registers." */
1051 regnum = HPPA64_FP4_REGNUM + offset / 8;
1052
1053 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1054 {
38ca4e0c
MK
1055 /* "Single-precision floating-point parameters, when
1056 passed in floating-point registers, are passed in
1057 the right halves of the floating point registers;
1058 the left halves are unused." */
1059 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1060 len, value_contents (arg));
449e1137
AC
1061 }
1062 }
2f690297 1063 }
38ca4e0c 1064 else
2f690297 1065 {
38ca4e0c
MK
1066 if (len > 8)
1067 {
1068 /* "Aggregates larger than 8 bytes are aligned on a
1069 16-byte boundary, possibly leaving an unused argument
1777feb0 1070 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1071 they are padded on the right (with garbage), to a
1072 multiple of 8 bytes." */
1073 offset = align_up (offset, 16);
1074 }
1075 }
1076
1218e655
RC
1077 /* If we are passing a function pointer, make sure we pass a function
1078 descriptor instead of the function entry address. */
1079 if (TYPE_CODE (type) == TYPE_CODE_PTR
1080 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1081 {
1082 ULONGEST codeptr, fptr;
1083
1084 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1085 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1086 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1087 fptr);
1218e655
RC
1088 valbuf = fptrbuf;
1089 }
1090 else
1091 {
1092 valbuf = value_contents (arg);
1093 }
1094
38ca4e0c 1095 /* Always store the argument in memory. */
1218e655 1096 write_memory (sp + offset, valbuf, len);
38ca4e0c 1097
38ca4e0c
MK
1098 regnum = HPPA_ARG0_REGNUM - offset / 8;
1099 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1100 {
1101 regcache_cooked_write_part (regcache, regnum,
1102 offset % 8, min (len, 8), valbuf);
1103 offset += min (len, 8);
1104 valbuf += min (len, 8);
1105 len -= min (len, 8);
1106 regnum--;
2f690297 1107 }
38ca4e0c
MK
1108
1109 offset += len;
2f690297
AC
1110 }
1111
38ca4e0c
MK
1112 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1113 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1114
1115 /* Allocate the outgoing parameter area. Make sure the outgoing
1116 parameter area is multiple of 16 bytes in length. */
1117 sp += max (align_up (offset, 16), 64);
1118
1119 /* Allocate 32-bytes of scratch space. The documentation doesn't
1120 mention this, but it seems to be needed. */
1121 sp += 32;
1122
1123 /* Allocate the frame marker area. */
1124 sp += 16;
1125
1126 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1127 its address. */
2f690297 1128 if (struct_return)
38ca4e0c 1129 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1130
38ca4e0c 1131 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1132 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1133 if (gp != 0)
38ca4e0c 1134 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1135
38ca4e0c 1136 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1137 if (!gdbarch_push_dummy_code_p (gdbarch))
1138 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1139
38ca4e0c
MK
1140 /* Set up GR30 to hold the stack pointer (sp). */
1141 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1142
38ca4e0c 1143 return sp;
2f690297 1144}
38ca4e0c 1145\f
2f690297 1146
08a27113
MK
1147/* Handle 32/64-bit struct return conventions. */
1148
1149static enum return_value_convention
6a3a010b 1150hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1151 struct type *type, struct regcache *regcache,
e127f0db 1152 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1153{
1154 if (TYPE_LENGTH (type) <= 2 * 4)
1155 {
1156 /* The value always lives in the right hand end of the register
1157 (or register pair)? */
1158 int b;
1159 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1160 int part = TYPE_LENGTH (type) % 4;
1161 /* The left hand register contains only part of the value,
1162 transfer that first so that the rest can be xfered as entire
1163 4-byte registers. */
1164 if (part > 0)
1165 {
1166 if (readbuf != NULL)
1167 regcache_cooked_read_part (regcache, reg, 4 - part,
1168 part, readbuf);
1169 if (writebuf != NULL)
1170 regcache_cooked_write_part (regcache, reg, 4 - part,
1171 part, writebuf);
1172 reg++;
1173 }
1174 /* Now transfer the remaining register values. */
1175 for (b = part; b < TYPE_LENGTH (type); b += 4)
1176 {
1177 if (readbuf != NULL)
e127f0db 1178 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1179 if (writebuf != NULL)
e127f0db 1180 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1181 reg++;
1182 }
1183 return RETURN_VALUE_REGISTER_CONVENTION;
1184 }
1185 else
1186 return RETURN_VALUE_STRUCT_CONVENTION;
1187}
1188
1189static enum return_value_convention
6a3a010b 1190hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1191 struct type *type, struct regcache *regcache,
e127f0db 1192 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1193{
1194 int len = TYPE_LENGTH (type);
1195 int regnum, offset;
1196
bad43aa5 1197 if (len > 16)
08a27113
MK
1198 {
1199 /* All return values larget than 128 bits must be aggregate
1200 return values. */
9738b034
MK
1201 gdb_assert (!hppa64_integral_or_pointer_p (type));
1202 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1203
1204 /* "Aggregate return values larger than 128 bits are returned in
1205 a buffer allocated by the caller. The address of the buffer
1206 must be passed in GR 28." */
1207 return RETURN_VALUE_STRUCT_CONVENTION;
1208 }
1209
1210 if (hppa64_integral_or_pointer_p (type))
1211 {
1212 /* "Integral return values are returned in GR 28. Values
1213 smaller than 64 bits are padded on the left (with garbage)." */
1214 regnum = HPPA_RET0_REGNUM;
1215 offset = 8 - len;
1216 }
1217 else if (hppa64_floating_p (type))
1218 {
1219 if (len > 8)
1220 {
1221 /* "Double-extended- and quad-precision floating-point
1222 values are returned in GRs 28 and 29. The sign,
1223 exponent, and most-significant bits of the mantissa are
1224 returned in GR 28; the least-significant bits of the
1225 mantissa are passed in GR 29. For double-extended
1226 precision values, GR 29 is padded on the right with 48
1227 bits of garbage." */
1228 regnum = HPPA_RET0_REGNUM;
1229 offset = 0;
1230 }
1231 else
1232 {
1233 /* "Single-precision and double-precision floating-point
1234 return values are returned in FR 4R (single precision) or
1235 FR 4 (double-precision)." */
1236 regnum = HPPA64_FP4_REGNUM;
1237 offset = 8 - len;
1238 }
1239 }
1240 else
1241 {
1242 /* "Aggregate return values up to 64 bits in size are returned
1243 in GR 28. Aggregates smaller than 64 bits are left aligned
1244 in the register; the pad bits on the right are undefined."
1245
1246 "Aggregate return values between 65 and 128 bits are returned
1247 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1248 the remaining bits are placed, left aligned, in GR 29. The
1249 pad bits on the right of GR 29 (if any) are undefined." */
1250 regnum = HPPA_RET0_REGNUM;
1251 offset = 0;
1252 }
1253
1254 if (readbuf)
1255 {
08a27113
MK
1256 while (len > 0)
1257 {
1258 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1259 min (len, 8), readbuf);
1260 readbuf += min (len, 8);
08a27113
MK
1261 len -= min (len, 8);
1262 regnum++;
1263 }
1264 }
1265
1266 if (writebuf)
1267 {
08a27113
MK
1268 while (len > 0)
1269 {
1270 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1271 min (len, 8), writebuf);
1272 writebuf += min (len, 8);
08a27113
MK
1273 len -= min (len, 8);
1274 regnum++;
1275 }
1276 }
1277
1278 return RETURN_VALUE_REGISTER_CONVENTION;
1279}
1280\f
1281
d49771ef 1282static CORE_ADDR
a7aad9aa 1283hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1284 struct target_ops *targ)
1285{
1286 if (addr & 2)
1287 {
0dfff4cb 1288 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1289 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1290 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1291 }
1292
1293 return addr;
1294}
1295
1797a8f6
AC
1296static CORE_ADDR
1297hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1298{
1299 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1300 and not _bit_)! */
1301 return align_up (addr, 64);
1302}
1303
2f690297
AC
1304/* Force all frames to 16-byte alignment. Better safe than sorry. */
1305
1306static CORE_ADDR
1797a8f6 1307hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1308{
1309 /* Just always 16-byte align. */
1310 return align_up (addr, 16);
1311}
1312
cc72850f 1313CORE_ADDR
61a1198a 1314hppa_read_pc (struct regcache *regcache)
c906108c 1315{
cc72850f 1316 ULONGEST ipsw;
61a1198a 1317 ULONGEST pc;
c906108c 1318
61a1198a
UW
1319 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1320 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1321
1322 /* If the current instruction is nullified, then we are effectively
1323 still executing the previous instruction. Pretend we are still
cc72850f
MK
1324 there. This is needed when single stepping; if the nullified
1325 instruction is on a different line, we don't want GDB to think
1326 we've stepped onto that line. */
fe46cd3a
RC
1327 if (ipsw & 0x00200000)
1328 pc -= 4;
1329
cc72850f 1330 return pc & ~0x3;
c906108c
SS
1331}
1332
cc72850f 1333void
61a1198a 1334hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1335{
61a1198a
UW
1336 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1337 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1338}
1339
c906108c 1340/* For the given instruction (INST), return any adjustment it makes
1777feb0 1341 to the stack pointer or zero for no adjustment.
c906108c
SS
1342
1343 This only handles instructions commonly found in prologues. */
1344
1345static int
fba45db2 1346prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1347{
1348 /* This must persist across calls. */
1349 static int save_high21;
1350
1351 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1352 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1353 return hppa_extract_14 (inst);
c906108c
SS
1354
1355 /* stwm X,D(sp) */
1356 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1357 return hppa_extract_14 (inst);
c906108c 1358
104c1213
JM
1359 /* std,ma X,D(sp) */
1360 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1361 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1362
e22b26cb 1363 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1364 save high bits in save_high21 for later use. */
e22b26cb 1365 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1366 {
abc485a1 1367 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1368 return 0;
1369 }
1370
1371 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1372 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1373
1374 /* fstws as used by the HP compilers. */
1375 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1376 return hppa_extract_5_load (inst);
c906108c
SS
1377
1378 /* No adjustment. */
1379 return 0;
1380}
1381
1382/* Return nonzero if INST is a branch of some kind, else return zero. */
1383
1384static int
fba45db2 1385is_branch (unsigned long inst)
c906108c
SS
1386{
1387 switch (inst >> 26)
1388 {
1389 case 0x20:
1390 case 0x21:
1391 case 0x22:
1392 case 0x23:
7be570e7 1393 case 0x27:
c906108c
SS
1394 case 0x28:
1395 case 0x29:
1396 case 0x2a:
1397 case 0x2b:
7be570e7 1398 case 0x2f:
c906108c
SS
1399 case 0x30:
1400 case 0x31:
1401 case 0x32:
1402 case 0x33:
1403 case 0x38:
1404 case 0x39:
1405 case 0x3a:
7be570e7 1406 case 0x3b:
c906108c
SS
1407 return 1;
1408
1409 default:
1410 return 0;
1411 }
1412}
1413
1414/* Return the register number for a GR which is saved by INST or
b35018fd 1415 zero if INST does not save a GR.
c906108c 1416
b35018fd 1417 Referenced from:
7be570e7 1418
b35018fd
CG
1419 parisc 1.1:
1420 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1421
b35018fd
CG
1422 parisc 2.0:
1423 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1424
b35018fd
CG
1425 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1426 on page 106 in parisc 2.0, all instructions for storing values from
1427 the general registers are:
c5aa993b 1428
b35018fd
CG
1429 Store: stb, sth, stw, std (according to Chapter 7, they
1430 are only in both "inst >> 26" and "inst >> 6".
1431 Store Absolute: stwa, stda (according to Chapter 7, they are only
1432 in "inst >> 6".
1433 Store Bytes: stby, stdby (according to Chapter 7, they are
1434 only in "inst >> 6").
1435
1436 For (inst >> 26), according to Chapter 7:
1437
1438 The effective memory reference address is formed by the addition
1439 of an immediate displacement to a base value.
1440
1441 - stb: 0x18, store a byte from a general register.
1442
1443 - sth: 0x19, store a halfword from a general register.
1444
1445 - stw: 0x1a, store a word from a general register.
1446
1447 - stwm: 0x1b, store a word from a general register and perform base
1448 register modification (2.0 will still treate it as stw).
1449
1450 - std: 0x1c, store a doubleword from a general register (2.0 only).
1451
1452 - stw: 0x1f, store a word from a general register (2.0 only).
1453
1454 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1455
1456 The effective memory reference address is formed by the addition
1457 of an index value to a base value specified in the instruction.
1458
1459 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1460
1461 - sth: 0x09, store a halfword from a general register (1.1 calls
1462 sths).
1463
1464 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1465
1466 - std: 0x0b: store a doubleword from a general register (2.0 only)
1467
1468 Implement fast byte moves (stores) to unaligned word or doubleword
1469 destination.
1470
1471 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1472
1473 - stdby: 0x0d for unaligned doubleword (2.0 only).
1474
1475 Store a word or doubleword using an absolute memory address formed
1476 using short or long displacement or indexed
1477
1478 - stwa: 0x0e, store a word from a general register to an absolute
1479 address (1.0 calls stwas).
1480
1481 - stda: 0x0f, store a doubleword from a general register to an
1482 absolute address (2.0 only). */
1483
1484static int
1485inst_saves_gr (unsigned long inst)
1486{
1487 switch ((inst >> 26) & 0x0f)
1488 {
1489 case 0x03:
1490 switch ((inst >> 6) & 0x0f)
1491 {
1492 case 0x08:
1493 case 0x09:
1494 case 0x0a:
1495 case 0x0b:
1496 case 0x0c:
1497 case 0x0d:
1498 case 0x0e:
1499 case 0x0f:
1500 return hppa_extract_5R_store (inst);
1501 default:
1502 return 0;
1503 }
1504 case 0x18:
1505 case 0x19:
1506 case 0x1a:
1507 case 0x1b:
1508 case 0x1c:
1509 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1510 case 0x1f:
1511 return hppa_extract_5R_store (inst);
1512 default:
1513 return 0;
1514 }
c906108c
SS
1515}
1516
1517/* Return the register number for a FR which is saved by INST or
1518 zero it INST does not save a FR.
1519
1520 Note we only care about full 64bit register stores (that's the only
1521 kind of stores the prologue will use).
1522
1523 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1524
1525static int
fba45db2 1526inst_saves_fr (unsigned long inst)
c906108c 1527{
1777feb0 1528 /* Is this an FSTD? */
c906108c 1529 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1530 return hppa_extract_5r_store (inst);
7be570e7 1531 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1532 return hppa_extract_5R_store (inst);
1777feb0 1533 /* Is this an FSTW? */
c906108c 1534 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1535 return hppa_extract_5r_store (inst);
7be570e7 1536 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1537 return hppa_extract_5R_store (inst);
c906108c
SS
1538 return 0;
1539}
1540
1541/* Advance PC across any function entry prologue instructions
1777feb0 1542 to reach some "real" code.
c906108c
SS
1543
1544 Use information in the unwind table to determine what exactly should
1545 be in the prologue. */
1546
1547
a71f8c30 1548static CORE_ADDR
be8626e0
MD
1549skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1550 int stop_before_branch)
c906108c 1551{
e17a4113 1552 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1553 gdb_byte buf[4];
c906108c
SS
1554 CORE_ADDR orig_pc = pc;
1555 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1556 unsigned long args_stored, status, i, restart_gr, restart_fr;
1557 struct unwind_table_entry *u;
a71f8c30 1558 int final_iteration;
c906108c
SS
1559
1560 restart_gr = 0;
1561 restart_fr = 0;
1562
1563restart:
1564 u = find_unwind_entry (pc);
1565 if (!u)
1566 return pc;
1567
1777feb0 1568 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1569 if ((pc & ~0x3) != u->region_start)
1570 return pc;
1571
1572 /* This is how much of a frame adjustment we need to account for. */
1573 stack_remaining = u->Total_frame_size << 3;
1574
1575 /* Magic register saves we want to know about. */
1576 save_rp = u->Save_RP;
1577 save_sp = u->Save_SP;
1578
1579 /* An indication that args may be stored into the stack. Unfortunately
1580 the HPUX compilers tend to set this in cases where no args were
1581 stored too!. */
1582 args_stored = 1;
1583
1584 /* Turn the Entry_GR field into a bitmask. */
1585 save_gr = 0;
1586 for (i = 3; i < u->Entry_GR + 3; i++)
1587 {
1588 /* Frame pointer gets saved into a special location. */
eded0a31 1589 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1590 continue;
1591
1592 save_gr |= (1 << i);
1593 }
1594 save_gr &= ~restart_gr;
1595
1596 /* Turn the Entry_FR field into a bitmask too. */
1597 save_fr = 0;
1598 for (i = 12; i < u->Entry_FR + 12; i++)
1599 save_fr |= (1 << i);
1600 save_fr &= ~restart_fr;
1601
a71f8c30
RC
1602 final_iteration = 0;
1603
c906108c
SS
1604 /* Loop until we find everything of interest or hit a branch.
1605
1606 For unoptimized GCC code and for any HP CC code this will never ever
1607 examine any user instructions.
1608
1609 For optimzied GCC code we're faced with problems. GCC will schedule
1610 its prologue and make prologue instructions available for delay slot
1611 filling. The end result is user code gets mixed in with the prologue
1612 and a prologue instruction may be in the delay slot of the first branch
1613 or call.
1614
1615 Some unexpected things are expected with debugging optimized code, so
1616 we allow this routine to walk past user instructions in optimized
1617 GCC code. */
1618 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1619 || args_stored)
1620 {
1621 unsigned int reg_num;
1622 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1623 unsigned long old_save_rp, old_save_sp, next_inst;
1624
1625 /* Save copies of all the triggers so we can compare them later
c5aa993b 1626 (only for HPC). */
c906108c
SS
1627 old_save_gr = save_gr;
1628 old_save_fr = save_fr;
1629 old_save_rp = save_rp;
1630 old_save_sp = save_sp;
1631 old_stack_remaining = stack_remaining;
1632
8defab1a 1633 status = target_read_memory (pc, buf, 4);
e17a4113 1634 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1635
c906108c
SS
1636 /* Yow! */
1637 if (status != 0)
1638 return pc;
1639
1640 /* Note the interesting effects of this instruction. */
1641 stack_remaining -= prologue_inst_adjust_sp (inst);
1642
7be570e7
JM
1643 /* There are limited ways to store the return pointer into the
1644 stack. */
c4c79048 1645 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1646 save_rp = 0;
1647
104c1213 1648 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1649 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1650 if ((inst & 0xffffc000) == 0x6fc10000
1651 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1652 save_sp = 0;
1653
6426a772
JM
1654 /* Are we loading some register with an offset from the argument
1655 pointer? */
1656 if ((inst & 0xffe00000) == 0x37a00000
1657 || (inst & 0xffffffe0) == 0x081d0240)
1658 {
1659 pc += 4;
1660 continue;
1661 }
1662
c906108c
SS
1663 /* Account for general and floating-point register saves. */
1664 reg_num = inst_saves_gr (inst);
1665 save_gr &= ~(1 << reg_num);
1666
1667 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1668 Unfortunately args_stored only tells us that some arguments
1669 where stored into the stack. Not how many or what kind!
c906108c 1670
c5aa993b
JM
1671 This is a kludge as on the HP compiler sets this bit and it
1672 never does prologue scheduling. So once we see one, skip past
1673 all of them. We have similar code for the fp arg stores below.
c906108c 1674
c5aa993b
JM
1675 FIXME. Can still die if we have a mix of GR and FR argument
1676 stores! */
be8626e0 1677 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1678 && reg_num <= 26)
c906108c 1679 {
be8626e0 1680 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1681 && reg_num <= 26)
c906108c
SS
1682 {
1683 pc += 4;
8defab1a 1684 status = target_read_memory (pc, buf, 4);
e17a4113 1685 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1686 if (status != 0)
1687 return pc;
1688 reg_num = inst_saves_gr (inst);
1689 }
1690 args_stored = 0;
1691 continue;
1692 }
1693
1694 reg_num = inst_saves_fr (inst);
1695 save_fr &= ~(1 << reg_num);
1696
8defab1a 1697 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1698 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1699
c906108c
SS
1700 /* Yow! */
1701 if (status != 0)
1702 return pc;
1703
1704 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1705 save. */
c906108c
SS
1706 if ((inst & 0xfc000000) == 0x34000000
1707 && inst_saves_fr (next_inst) >= 4
819844ad 1708 && inst_saves_fr (next_inst)
be8626e0 1709 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1710 {
1711 /* So we drop into the code below in a reasonable state. */
1712 reg_num = inst_saves_fr (next_inst);
1713 pc -= 4;
1714 }
1715
1716 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1717 This is a kludge as on the HP compiler sets this bit and it
1718 never does prologue scheduling. So once we see one, skip past
1719 all of them. */
819844ad 1720 if (reg_num >= 4
be8626e0 1721 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1722 {
819844ad
UW
1723 while (reg_num >= 4
1724 && reg_num
be8626e0 1725 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1726 {
1727 pc += 8;
8defab1a 1728 status = target_read_memory (pc, buf, 4);
e17a4113 1729 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1730 if (status != 0)
1731 return pc;
1732 if ((inst & 0xfc000000) != 0x34000000)
1733 break;
8defab1a 1734 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1735 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1736 if (status != 0)
1737 return pc;
1738 reg_num = inst_saves_fr (next_inst);
1739 }
1740 args_stored = 0;
1741 continue;
1742 }
1743
1744 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1745 instruction is in the delay slot of the first call/branch. */
a71f8c30 1746 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1747 break;
1748
1749 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1750 arguments were stored into the stack (boo hiss). This could
1751 cause this code to then skip a bunch of user insns (up to the
1752 first branch).
1753
1754 To combat this we try to identify when args_stored was bogusly
1755 set and clear it. We only do this when args_stored is nonzero,
1756 all other resources are accounted for, and nothing changed on
1757 this pass. */
c906108c 1758 if (args_stored
c5aa993b 1759 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1760 && old_save_gr == save_gr && old_save_fr == save_fr
1761 && old_save_rp == save_rp && old_save_sp == save_sp
1762 && old_stack_remaining == stack_remaining)
1763 break;
c5aa993b 1764
c906108c
SS
1765 /* Bump the PC. */
1766 pc += 4;
a71f8c30
RC
1767
1768 /* !stop_before_branch, so also look at the insn in the delay slot
1769 of the branch. */
1770 if (final_iteration)
1771 break;
1772 if (is_branch (inst))
1773 final_iteration = 1;
c906108c
SS
1774 }
1775
1776 /* We've got a tenative location for the end of the prologue. However
1777 because of limitations in the unwind descriptor mechanism we may
1778 have went too far into user code looking for the save of a register
1779 that does not exist. So, if there registers we expected to be saved
1780 but never were, mask them out and restart.
1781
1782 This should only happen in optimized code, and should be very rare. */
c5aa993b 1783 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1784 {
1785 pc = orig_pc;
1786 restart_gr = save_gr;
1787 restart_fr = save_fr;
1788 goto restart;
1789 }
1790
1791 return pc;
1792}
1793
1794
7be570e7
JM
1795/* Return the address of the PC after the last prologue instruction if
1796 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1797
1798static CORE_ADDR
fba45db2 1799after_prologue (CORE_ADDR pc)
c906108c
SS
1800{
1801 struct symtab_and_line sal;
1802 CORE_ADDR func_addr, func_end;
c906108c 1803
7be570e7
JM
1804 /* If we can not find the symbol in the partial symbol table, then
1805 there is no hope we can determine the function's start address
1806 with this code. */
c906108c 1807 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1808 return 0;
c906108c 1809
7be570e7 1810 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1811 sal = find_pc_line (func_addr, 0);
1812
7be570e7
JM
1813 /* There are only two cases to consider. First, the end of the source line
1814 is within the function bounds. In that case we return the end of the
1815 source line. Second is the end of the source line extends beyond the
1816 bounds of the current function. We need to use the slow code to
1777feb0 1817 examine instructions in that case.
c906108c 1818
7be570e7
JM
1819 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1820 the wrong thing to do. In fact, it should be entirely possible for this
1821 function to always return zero since the slow instruction scanning code
1822 is supposed to *always* work. If it does not, then it is a bug. */
1823 if (sal.end < func_end)
1824 return sal.end;
c5aa993b 1825 else
7be570e7 1826 return 0;
c906108c
SS
1827}
1828
1829/* To skip prologues, I use this predicate. Returns either PC itself
1830 if the code at PC does not look like a function prologue; otherwise
1777feb0 1831 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1832
1833 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1834 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1835 we might not want to skip all the insns because a prologue insn may
1836 appear in the delay slot of the first branch, and we don't want to
1837 skip over the branch in that case. */
c906108c 1838
8d153463 1839static CORE_ADDR
6093d2eb 1840hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1841{
c5aa993b 1842 CORE_ADDR post_prologue_pc;
c906108c 1843
c5aa993b
JM
1844 /* See if we can determine the end of the prologue via the symbol table.
1845 If so, then return either PC, or the PC after the prologue, whichever
1846 is greater. */
c906108c 1847
c5aa993b 1848 post_prologue_pc = after_prologue (pc);
c906108c 1849
7be570e7
JM
1850 /* If after_prologue returned a useful address, then use it. Else
1851 fall back on the instruction skipping code.
1852
1853 Some folks have claimed this causes problems because the breakpoint
1854 may be the first instruction of the prologue. If that happens, then
1855 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1856 if (post_prologue_pc != 0)
1857 return max (pc, post_prologue_pc);
c5aa993b 1858 else
be8626e0 1859 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1860}
1861
29d375ac 1862/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1863
29d375ac 1864static struct unwind_table_entry *
227e86ad 1865hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1866{
227e86ad 1867 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1868
1869 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1870 result of get_frame_address_in_block implies a problem.
93d42b30 1871 The bits should have been removed earlier, before the return
c7ce8faa 1872 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1873 if it isn't, it should be fixed. Then this call can be
1874 removed. */
227e86ad 1875 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1876 return find_unwind_entry (pc);
1877}
1878
26d08f08
AC
1879struct hppa_frame_cache
1880{
1881 CORE_ADDR base;
1882 struct trad_frame_saved_reg *saved_regs;
1883};
1884
1885static struct hppa_frame_cache *
227e86ad 1886hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1887{
227e86ad 1888 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1889 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1890 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1891 struct hppa_frame_cache *cache;
1892 long saved_gr_mask;
1893 long saved_fr_mask;
26d08f08
AC
1894 long frame_size;
1895 struct unwind_table_entry *u;
9f7194c3 1896 CORE_ADDR prologue_end;
50b2f48a 1897 int fp_in_r1 = 0;
26d08f08
AC
1898 int i;
1899
369aa520
RC
1900 if (hppa_debug)
1901 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1902 frame_relative_level(this_frame));
369aa520 1903
26d08f08 1904 if ((*this_cache) != NULL)
369aa520
RC
1905 {
1906 if (hppa_debug)
5af949e3
UW
1907 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1908 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 1909 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1910 }
26d08f08
AC
1911 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1912 (*this_cache) = cache;
227e86ad 1913 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1914
1915 /* Yow! */
227e86ad 1916 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1917 if (!u)
369aa520
RC
1918 {
1919 if (hppa_debug)
1920 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
9a3c8263 1921 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1922 }
26d08f08
AC
1923
1924 /* Turn the Entry_GR field into a bitmask. */
1925 saved_gr_mask = 0;
1926 for (i = 3; i < u->Entry_GR + 3; i++)
1927 {
1928 /* Frame pointer gets saved into a special location. */
eded0a31 1929 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1930 continue;
1931
1932 saved_gr_mask |= (1 << i);
1933 }
1934
1935 /* Turn the Entry_FR field into a bitmask too. */
1936 saved_fr_mask = 0;
1937 for (i = 12; i < u->Entry_FR + 12; i++)
1938 saved_fr_mask |= (1 << i);
1939
1940 /* Loop until we find everything of interest or hit a branch.
1941
1942 For unoptimized GCC code and for any HP CC code this will never ever
1943 examine any user instructions.
1944
1945 For optimized GCC code we're faced with problems. GCC will schedule
1946 its prologue and make prologue instructions available for delay slot
1947 filling. The end result is user code gets mixed in with the prologue
1948 and a prologue instruction may be in the delay slot of the first branch
1949 or call.
1950
1951 Some unexpected things are expected with debugging optimized code, so
1952 we allow this routine to walk past user instructions in optimized
1953 GCC code. */
1954 {
1955 int final_iteration = 0;
46acf081 1956 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1957 int looking_for_sp = u->Save_SP;
1958 int looking_for_rp = u->Save_RP;
1959 int fp_loc = -1;
9f7194c3 1960
a71f8c30 1961 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1962 skip_prologue_using_sal, in case we stepped into a function without
1963 symbol information. hppa_skip_prologue also bounds the returned
1964 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1965 function.
a71f8c30
RC
1966
1967 We used to call hppa_skip_prologue to find the end of the prologue,
1968 but if some non-prologue instructions get scheduled into the prologue,
1969 and the program is compiled with debug information, the "easy" way
1970 in hppa_skip_prologue will return a prologue end that is too early
1971 for us to notice any potential frame adjustments. */
d5c27f81 1972
ef02daa9
DJ
1973 /* We used to use get_frame_func to locate the beginning of the
1974 function to pass to skip_prologue. However, when objects are
1975 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1976 function (or 0). We can do better than that by using unwind records.
46acf081 1977 This only works if the Region_description of the unwind record
1777feb0 1978 indicates that it includes the entry point of the function.
46acf081
RC
1979 HP compilers sometimes generate unwind records for regions that
1980 do not include the entry or exit point of a function. GNU tools
1981 do not do this. */
1982
1983 if ((u->Region_description & 0x2) == 0)
1984 start_pc = u->region_start;
1985 else
227e86ad 1986 start_pc = get_frame_func (this_frame);
d5c27f81 1987
be8626e0 1988 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1989 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1990
1991 if (prologue_end != 0 && end_pc > prologue_end)
1992 end_pc = prologue_end;
1993
26d08f08 1994 frame_size = 0;
9f7194c3 1995
46acf081 1996 for (pc = start_pc;
26d08f08
AC
1997 ((saved_gr_mask || saved_fr_mask
1998 || looking_for_sp || looking_for_rp
1999 || frame_size < (u->Total_frame_size << 3))
9f7194c3 2000 && pc < end_pc);
26d08f08
AC
2001 pc += 4)
2002 {
2003 int reg;
e362b510 2004 gdb_byte buf4[4];
4a302917
RC
2005 long inst;
2006
227e86ad 2007 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 2008 {
5af949e3
UW
2009 error (_("Cannot read instruction at %s."),
2010 paddress (gdbarch, pc));
9a3c8263 2011 return (struct hppa_frame_cache *) (*this_cache);
4a302917
RC
2012 }
2013
e17a4113 2014 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 2015
26d08f08
AC
2016 /* Note the interesting effects of this instruction. */
2017 frame_size += prologue_inst_adjust_sp (inst);
2018
2019 /* There are limited ways to store the return pointer into the
2020 stack. */
2021 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2022 {
2023 looking_for_rp = 0;
34f75cc1 2024 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 2025 }
dfaf8edb
MK
2026 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
2027 {
2028 looking_for_rp = 0;
2029 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
2030 }
c4c79048
RC
2031 else if (inst == 0x0fc212c1
2032 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2033 {
2034 looking_for_rp = 0;
34f75cc1 2035 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
2036 }
2037
2038 /* Check to see if we saved SP into the stack. This also
2039 happens to indicate the location of the saved frame
2040 pointer. */
2041 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2042 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2043 {
2044 looking_for_sp = 0;
eded0a31 2045 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 2046 }
50b2f48a
RC
2047 else if (inst == 0x08030241) /* copy %r3, %r1 */
2048 {
2049 fp_in_r1 = 1;
2050 }
26d08f08
AC
2051
2052 /* Account for general and floating-point register saves. */
2053 reg = inst_saves_gr (inst);
2054 if (reg >= 3 && reg <= 18
eded0a31 2055 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2056 {
2057 saved_gr_mask &= ~(1 << reg);
abc485a1 2058 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2059 /* stwm with a positive displacement is a _post_
2060 _modify_. */
2061 cache->saved_regs[reg].addr = 0;
2062 else if ((inst & 0xfc00000c) == 0x70000008)
2063 /* A std has explicit post_modify forms. */
2064 cache->saved_regs[reg].addr = 0;
2065 else
2066 {
2067 CORE_ADDR offset;
2068
2069 if ((inst >> 26) == 0x1c)
1777feb0
MS
2070 offset = (inst & 0x1 ? -1 << 13 : 0)
2071 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2072 else if ((inst >> 26) == 0x03)
abc485a1 2073 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2074 else
abc485a1 2075 offset = hppa_extract_14 (inst);
26d08f08
AC
2076
2077 /* Handle code with and without frame pointers. */
2078 if (u->Save_SP)
2079 cache->saved_regs[reg].addr = offset;
2080 else
1777feb0
MS
2081 cache->saved_regs[reg].addr
2082 = (u->Total_frame_size << 3) + offset;
26d08f08
AC
2083 }
2084 }
2085
2086 /* GCC handles callee saved FP regs a little differently.
2087
2088 It emits an instruction to put the value of the start of
2089 the FP store area into %r1. It then uses fstds,ma with a
2090 basereg of %r1 for the stores.
2091
2092 HP CC emits them at the current stack pointer modifying the
2093 stack pointer as it stores each register. */
2094
2095 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2096 if ((inst & 0xffffc000) == 0x34610000
2097 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2098 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2099
2100 reg = inst_saves_fr (inst);
2101 if (reg >= 12 && reg <= 21)
2102 {
2103 /* Note +4 braindamage below is necessary because the FP
2104 status registers are internally 8 registers rather than
2105 the expected 4 registers. */
2106 saved_fr_mask &= ~(1 << reg);
2107 if (fp_loc == -1)
2108 {
2109 /* 1st HP CC FP register store. After this
2110 instruction we've set enough state that the GCC and
2111 HPCC code are both handled in the same manner. */
34f75cc1 2112 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2113 fp_loc = 8;
2114 }
2115 else
2116 {
eded0a31 2117 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2118 fp_loc += 8;
2119 }
2120 }
2121
1777feb0 2122 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2123 if (final_iteration)
2124 break;
2125 /* We want to look precisely one instruction beyond the branch
2126 if we have not found everything yet. */
2127 if (is_branch (inst))
2128 final_iteration = 1;
2129 }
2130 }
2131
2132 {
2133 /* The frame base always represents the value of %sp at entry to
2134 the current function (and is thus equivalent to the "saved"
2135 stack pointer. */
227e86ad
JB
2136 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2137 HPPA_SP_REGNUM);
ed70ba00 2138 CORE_ADDR fp;
9f7194c3
RC
2139
2140 if (hppa_debug)
5af949e3
UW
2141 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2142 "prologue_end=%s) ",
2143 paddress (gdbarch, this_sp),
2144 paddress (gdbarch, get_frame_pc (this_frame)),
2145 paddress (gdbarch, prologue_end));
9f7194c3 2146
ed70ba00
RC
2147 /* Check to see if a frame pointer is available, and use it for
2148 frame unwinding if it is.
2149
2150 There are some situations where we need to rely on the frame
2151 pointer to do stack unwinding. For example, if a function calls
2152 alloca (), the stack pointer can get adjusted inside the body of
2153 the function. In this case, the ABI requires that the compiler
2154 maintain a frame pointer for the function.
2155
2156 The unwind record has a flag (alloca_frame) that indicates that
2157 a function has a variable frame; unfortunately, gcc/binutils
2158 does not set this flag. Instead, whenever a frame pointer is used
2159 and saved on the stack, the Save_SP flag is set. We use this to
2160 decide whether to use the frame pointer for unwinding.
2161
ed70ba00
RC
2162 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2163 instead of Save_SP. */
2164
227e86ad 2165 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2166
6fcecea0 2167 if (u->alloca_frame)
46acf081 2168 fp -= u->Total_frame_size << 3;
ed70ba00 2169
227e86ad 2170 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2171 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2172 {
2173 cache->base = fp;
2174
2175 if (hppa_debug)
5af949e3
UW
2176 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2177 paddress (gdbarch, cache->base));
ed70ba00 2178 }
1658da49
RC
2179 else if (u->Save_SP
2180 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2181 {
9f7194c3
RC
2182 /* Both we're expecting the SP to be saved and the SP has been
2183 saved. The entry SP value is saved at this frame's SP
2184 address. */
e17a4113 2185 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2186
2187 if (hppa_debug)
5af949e3
UW
2188 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2189 paddress (gdbarch, cache->base));
9f7194c3 2190 }
26d08f08 2191 else
9f7194c3 2192 {
1658da49
RC
2193 /* The prologue has been slowly allocating stack space. Adjust
2194 the SP back. */
2195 cache->base = this_sp - frame_size;
9f7194c3 2196 if (hppa_debug)
5af949e3
UW
2197 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2198 paddress (gdbarch, cache->base));
9f7194c3
RC
2199
2200 }
eded0a31 2201 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2202 }
2203
412275d5
AC
2204 /* The PC is found in the "return register", "Millicode" uses "r31"
2205 as the return register while normal code uses "rp". */
26d08f08 2206 if (u->Millicode)
9f7194c3 2207 {
5859efe5 2208 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2209 {
2210 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2211 if (hppa_debug)
2212 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2213 }
9f7194c3
RC
2214 else
2215 {
227e86ad 2216 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2217 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2218 if (hppa_debug)
2219 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2220 }
2221 }
26d08f08 2222 else
9f7194c3 2223 {
34f75cc1 2224 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2225 {
2226 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2227 cache->saved_regs[HPPA_RP_REGNUM];
2228 if (hppa_debug)
2229 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2230 }
9f7194c3
RC
2231 else
2232 {
227e86ad
JB
2233 ULONGEST rp = get_frame_register_unsigned (this_frame,
2234 HPPA_RP_REGNUM);
34f75cc1 2235 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2236 if (hppa_debug)
2237 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2238 }
2239 }
26d08f08 2240
50b2f48a
RC
2241 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2242 frame. However, there is a one-insn window where we haven't saved it
2243 yet, but we've already clobbered it. Detect this case and fix it up.
2244
2245 The prologue sequence for frame-pointer functions is:
2246 0: stw %rp, -20(%sp)
2247 4: copy %r3, %r1
2248 8: copy %sp, %r3
2249 c: stw,ma %r1, XX(%sp)
2250
2251 So if we are at offset c, the r3 value that we want is not yet saved
2252 on the stack, but it's been overwritten. The prologue analyzer will
2253 set fp_in_r1 when it sees the copy insn so we know to get the value
2254 from r1 instead. */
2255 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2256 && fp_in_r1)
2257 {
227e86ad 2258 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2259 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2260 }
1658da49 2261
26d08f08
AC
2262 {
2263 /* Convert all the offsets into addresses. */
2264 int reg;
65c5db89 2265 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2266 {
2267 if (trad_frame_addr_p (cache->saved_regs, reg))
2268 cache->saved_regs[reg].addr += cache->base;
2269 }
2270 }
2271
f77a2124 2272 {
f77a2124
RC
2273 struct gdbarch_tdep *tdep;
2274
f77a2124
RC
2275 tdep = gdbarch_tdep (gdbarch);
2276
2277 if (tdep->unwind_adjust_stub)
227e86ad 2278 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2279 }
2280
369aa520 2281 if (hppa_debug)
5af949e3
UW
2282 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2283 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 2284 return (struct hppa_frame_cache *) (*this_cache);
26d08f08
AC
2285}
2286
2287static void
227e86ad
JB
2288hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2289 struct frame_id *this_id)
26d08f08 2290{
d5c27f81 2291 struct hppa_frame_cache *info;
227e86ad 2292 CORE_ADDR pc = get_frame_pc (this_frame);
d5c27f81
RC
2293 struct unwind_table_entry *u;
2294
227e86ad
JB
2295 info = hppa_frame_cache (this_frame, this_cache);
2296 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2297
2298 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2299}
2300
227e86ad
JB
2301static struct value *
2302hppa_frame_prev_register (struct frame_info *this_frame,
2303 void **this_cache, int regnum)
26d08f08 2304{
227e86ad
JB
2305 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2306
1777feb0
MS
2307 return hppa_frame_prev_register_helper (this_frame,
2308 info->saved_regs, regnum);
227e86ad
JB
2309}
2310
2311static int
2312hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2313 struct frame_info *this_frame, void **this_cache)
2314{
2315 if (hppa_find_unwind_entry_in_block (this_frame))
2316 return 1;
2317
2318 return 0;
0da28f8a
RC
2319}
2320
2321static const struct frame_unwind hppa_frame_unwind =
2322{
2323 NORMAL_FRAME,
8fbca658 2324 default_frame_unwind_stop_reason,
0da28f8a 2325 hppa_frame_this_id,
227e86ad
JB
2326 hppa_frame_prev_register,
2327 NULL,
2328 hppa_frame_unwind_sniffer
0da28f8a
RC
2329};
2330
0da28f8a
RC
2331/* This is a generic fallback frame unwinder that kicks in if we fail all
2332 the other ones. Normally we would expect the stub and regular unwinder
2333 to work, but in some cases we might hit a function that just doesn't
2334 have any unwind information available. In this case we try to do
2335 unwinding solely based on code reading. This is obviously going to be
2336 slow, so only use this as a last resort. Currently this will only
2337 identify the stack and pc for the frame. */
2338
2339static struct hppa_frame_cache *
227e86ad 2340hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2341{
e17a4113
UW
2342 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2343 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2344 struct hppa_frame_cache *cache;
4ba6a975
MK
2345 unsigned int frame_size = 0;
2346 int found_rp = 0;
2347 CORE_ADDR start_pc;
0da28f8a 2348
d5c27f81 2349 if (hppa_debug)
4ba6a975
MK
2350 fprintf_unfiltered (gdb_stdlog,
2351 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2352 frame_relative_level (this_frame));
d5c27f81 2353
0da28f8a
RC
2354 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2355 (*this_cache) = cache;
227e86ad 2356 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2357
227e86ad 2358 start_pc = get_frame_func (this_frame);
4ba6a975 2359 if (start_pc)
0da28f8a 2360 {
227e86ad 2361 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2362 CORE_ADDR pc;
0da28f8a 2363
4ba6a975
MK
2364 for (pc = start_pc; pc < cur_pc; pc += 4)
2365 {
2366 unsigned int insn;
0da28f8a 2367
e17a4113 2368 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2369 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2370
4ba6a975
MK
2371 /* There are limited ways to store the return pointer into the
2372 stack. */
2373 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2374 {
2375 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2376 found_rp = 1;
2377 }
c4c79048
RC
2378 else if (insn == 0x0fc212c1
2379 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2380 {
2381 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2382 found_rp = 1;
2383 }
2384 }
412275d5 2385 }
0da28f8a 2386
d5c27f81 2387 if (hppa_debug)
4ba6a975
MK
2388 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2389 frame_size, found_rp);
d5c27f81 2390
227e86ad 2391 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2392 cache->base -= frame_size;
6d1be3f1 2393 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2394
2395 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2396 {
2397 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2398 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2399 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2400 }
412275d5
AC
2401 else
2402 {
4ba6a975 2403 ULONGEST rp;
227e86ad 2404 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2405 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2406 }
0da28f8a
RC
2407
2408 return cache;
26d08f08
AC
2409}
2410
0da28f8a 2411static void
227e86ad 2412hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2413 struct frame_id *this_id)
2414{
2415 struct hppa_frame_cache *info =
227e86ad
JB
2416 hppa_fallback_frame_cache (this_frame, this_cache);
2417
2418 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2419}
2420
227e86ad
JB
2421static struct value *
2422hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2423 void **this_cache, int regnum)
0da28f8a 2424{
1777feb0
MS
2425 struct hppa_frame_cache *info
2426 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2427
1777feb0
MS
2428 return hppa_frame_prev_register_helper (this_frame,
2429 info->saved_regs, regnum);
0da28f8a
RC
2430}
2431
2432static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2433{
2434 NORMAL_FRAME,
8fbca658 2435 default_frame_unwind_stop_reason,
0da28f8a 2436 hppa_fallback_frame_this_id,
227e86ad
JB
2437 hppa_fallback_frame_prev_register,
2438 NULL,
2439 default_frame_sniffer
26d08f08
AC
2440};
2441
7f07c5b6
RC
2442/* Stub frames, used for all kinds of call stubs. */
2443struct hppa_stub_unwind_cache
2444{
2445 CORE_ADDR base;
2446 struct trad_frame_saved_reg *saved_regs;
2447};
2448
2449static struct hppa_stub_unwind_cache *
227e86ad 2450hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2451 void **this_cache)
2452{
227e86ad 2453 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2454 struct hppa_stub_unwind_cache *info;
22b0923d 2455 struct unwind_table_entry *u;
7f07c5b6
RC
2456
2457 if (*this_cache)
9a3c8263 2458 return (struct hppa_stub_unwind_cache *) *this_cache;
7f07c5b6
RC
2459
2460 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2461 *this_cache = info;
227e86ad 2462 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2463
227e86ad 2464 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2465
090ccbb7 2466 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2467 {
2468 /* HPUX uses export stubs in function calls; the export stub clobbers
2469 the return value of the caller, and, later restores it from the
2470 stack. */
227e86ad 2471 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2472
2473 if (u && u->stub_unwind.stub_type == EXPORT)
2474 {
2475 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2476
2477 return info;
2478 }
2479 }
2480
2481 /* By default we assume that stubs do not change the rp. */
2482 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2483
7f07c5b6
RC
2484 return info;
2485}
2486
2487static void
227e86ad 2488hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2489 void **this_prologue_cache,
2490 struct frame_id *this_id)
2491{
2492 struct hppa_stub_unwind_cache *info
227e86ad 2493 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2494
2495 if (info)
227e86ad 2496 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2497}
2498
227e86ad
JB
2499static struct value *
2500hppa_stub_frame_prev_register (struct frame_info *this_frame,
2501 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2502{
2503 struct hppa_stub_unwind_cache *info
227e86ad 2504 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2505
227e86ad 2506 if (info == NULL)
8a3fe4f8 2507 error (_("Requesting registers from null frame."));
7f07c5b6 2508
1777feb0
MS
2509 return hppa_frame_prev_register_helper (this_frame,
2510 info->saved_regs, regnum);
227e86ad 2511}
7f07c5b6 2512
227e86ad
JB
2513static int
2514hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2515 struct frame_info *this_frame,
2516 void **this_cache)
7f07c5b6 2517{
227e86ad
JB
2518 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2519 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2520 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2521
6d1be3f1 2522 if (pc == 0
84674fe1 2523 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2524 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2525 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2526 return 1;
2527 return 0;
7f07c5b6
RC
2528}
2529
227e86ad
JB
2530static const struct frame_unwind hppa_stub_frame_unwind = {
2531 NORMAL_FRAME,
8fbca658 2532 default_frame_unwind_stop_reason,
227e86ad
JB
2533 hppa_stub_frame_this_id,
2534 hppa_stub_frame_prev_register,
2535 NULL,
2536 hppa_stub_unwind_sniffer
2537};
2538
26d08f08 2539static struct frame_id
227e86ad 2540hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2541{
227e86ad
JB
2542 return frame_id_build (get_frame_register_unsigned (this_frame,
2543 HPPA_SP_REGNUM),
2544 get_frame_pc (this_frame));
26d08f08
AC
2545}
2546
cc72850f 2547CORE_ADDR
26d08f08
AC
2548hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2549{
fe46cd3a
RC
2550 ULONGEST ipsw;
2551 CORE_ADDR pc;
2552
cc72850f
MK
2553 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2554 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2555
2556 /* If the current instruction is nullified, then we are effectively
2557 still executing the previous instruction. Pretend we are still
cc72850f
MK
2558 there. This is needed when single stepping; if the nullified
2559 instruction is on a different line, we don't want GDB to think
2560 we've stepped onto that line. */
fe46cd3a
RC
2561 if (ipsw & 0x00200000)
2562 pc -= 4;
2563
cc72850f 2564 return pc & ~0x3;
26d08f08
AC
2565}
2566
ff644745
JB
2567/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2568 Return NULL if no such symbol was found. */
2569
3b7344d5 2570struct bound_minimal_symbol
ff644745
JB
2571hppa_lookup_stub_minimal_symbol (const char *name,
2572 enum unwind_stub_types stub_type)
2573{
2574 struct objfile *objfile;
2575 struct minimal_symbol *msym;
3b7344d5 2576 struct bound_minimal_symbol result = { NULL, NULL };
ff644745
JB
2577
2578 ALL_MSYMBOLS (objfile, msym)
2579 {
efd66ac6 2580 if (strcmp (MSYMBOL_LINKAGE_NAME (msym), name) == 0)
ff644745
JB
2581 {
2582 struct unwind_table_entry *u;
2583
efd66ac6 2584 u = find_unwind_entry (MSYMBOL_VALUE (msym));
ff644745 2585 if (u != NULL && u->stub_unwind.stub_type == stub_type)
3b7344d5
TT
2586 {
2587 result.objfile = objfile;
2588 result.minsym = msym;
2589 return result;
2590 }
ff644745
JB
2591 }
2592 }
2593
3b7344d5 2594 return result;
ff644745
JB
2595}
2596
c906108c 2597static void
fba45db2 2598unwind_command (char *exp, int from_tty)
c906108c
SS
2599{
2600 CORE_ADDR address;
2601 struct unwind_table_entry *u;
2602
2603 /* If we have an expression, evaluate it and use it as the address. */
2604
2605 if (exp != 0 && *exp != 0)
2606 address = parse_and_eval_address (exp);
2607 else
2608 return;
2609
2610 u = find_unwind_entry (address);
2611
2612 if (!u)
2613 {
2614 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2615 return;
2616 }
2617
3329c4b5 2618 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2619
5af949e3 2620 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
d5c27f81 2621 gdb_flush (gdb_stdout);
c906108c 2622
5af949e3 2623 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
d5c27f81 2624 gdb_flush (gdb_stdout);
c906108c 2625
c906108c 2626#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2627
2628 printf_unfiltered ("\n\tflags =");
2629 pif (Cannot_unwind);
2630 pif (Millicode);
2631 pif (Millicode_save_sr0);
2632 pif (Entry_SR);
2633 pif (Args_stored);
2634 pif (Variable_Frame);
2635 pif (Separate_Package_Body);
2636 pif (Frame_Extension_Millicode);
2637 pif (Stack_Overflow_Check);
2638 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2639 pif (sr4export);
2640 pif (cxx_info);
2641 pif (cxx_try_catch);
2642 pif (sched_entry_seq);
c906108c
SS
2643 pif (Save_SP);
2644 pif (Save_RP);
2645 pif (Save_MRP_in_frame);
6fcecea0 2646 pif (save_r19);
c906108c
SS
2647 pif (Cleanup_defined);
2648 pif (MPE_XL_interrupt_marker);
2649 pif (HP_UX_interrupt_marker);
2650 pif (Large_frame);
6fcecea0 2651 pif (alloca_frame);
c906108c
SS
2652
2653 putchar_unfiltered ('\n');
2654
c906108c 2655#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2656
2657 pin (Region_description);
2658 pin (Entry_FR);
2659 pin (Entry_GR);
2660 pin (Total_frame_size);
57dac9e1
RC
2661
2662 if (u->stub_unwind.stub_type)
2663 {
2664 printf_unfiltered ("\tstub type = ");
2665 switch (u->stub_unwind.stub_type)
2666 {
2667 case LONG_BRANCH:
2668 printf_unfiltered ("long branch\n");
2669 break;
2670 case PARAMETER_RELOCATION:
2671 printf_unfiltered ("parameter relocation\n");
2672 break;
2673 case EXPORT:
2674 printf_unfiltered ("export\n");
2675 break;
2676 case IMPORT:
2677 printf_unfiltered ("import\n");
2678 break;
2679 case IMPORT_SHLIB:
2680 printf_unfiltered ("import shlib\n");
2681 break;
2682 default:
2683 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2684 }
2685 }
c906108c 2686}
c906108c 2687
38ca4e0c
MK
2688/* Return the GDB type object for the "standard" data type of data in
2689 register REGNUM. */
d709c020 2690
eded0a31 2691static struct type *
38ca4e0c 2692hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2693{
38ca4e0c 2694 if (regnum < HPPA_FP4_REGNUM)
df4df182 2695 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2696 else
27067745 2697 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2698}
2699
eded0a31 2700static struct type *
38ca4e0c 2701hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2702{
38ca4e0c 2703 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2704 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2705 else
27067745 2706 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2707}
2708
38ca4e0c
MK
2709/* Return non-zero if REGNUM is not a register available to the user
2710 through ptrace/ttrace. */
d709c020 2711
8d153463 2712static int
64a3914f 2713hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2714{
2715 return (regnum == 0
34f75cc1
RC
2716 || regnum == HPPA_PCSQ_HEAD_REGNUM
2717 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2718 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2719}
d709c020 2720
d037d088 2721static int
64a3914f 2722hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2723{
2724 /* cr26 and cr27 are readable (but not writable) from userspace. */
2725 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2726 return 0;
2727 else
64a3914f 2728 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2729}
2730
38ca4e0c 2731static int
64a3914f 2732hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2733{
2734 return (regnum == 0
2735 || regnum == HPPA_PCSQ_HEAD_REGNUM
2736 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2737 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2738}
2739
d037d088 2740static int
64a3914f 2741hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2742{
2743 /* cr26 and cr27 are readable (but not writable) from userspace. */
2744 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2745 return 0;
2746 else
64a3914f 2747 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2748}
2749
8d153463 2750static CORE_ADDR
85ddcc70 2751hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2752{
2753 /* The low two bits of the PC on the PA contain the privilege level.
2754 Some genius implementing a (non-GCC) compiler apparently decided
2755 this means that "addresses" in a text section therefore include a
2756 privilege level, and thus symbol tables should contain these bits.
2757 This seems like a bonehead thing to do--anyway, it seems to work
2758 for our purposes to just ignore those bits. */
2759
2760 return (addr &= ~0x3);
2761}
2762
e127f0db
MK
2763/* Get the ARGIth function argument for the current function. */
2764
4a302917 2765static CORE_ADDR
143985b7
AF
2766hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2767 struct type *type)
2768{
e127f0db 2769 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2770}
2771
05d1431c 2772static enum register_status
0f8d9d59 2773hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2774 int regnum, gdb_byte *buf)
0f8d9d59 2775{
05d1431c
PA
2776 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2777 ULONGEST tmp;
2778 enum register_status status;
0f8d9d59 2779
05d1431c
PA
2780 status = regcache_raw_read_unsigned (regcache, regnum, &tmp);
2781 if (status == REG_VALID)
2782 {
2783 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2784 tmp &= ~0x3;
2785 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2786 }
2787 return status;
0f8d9d59
RC
2788}
2789
d49771ef 2790static CORE_ADDR
e38c262f 2791hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2792{
2793 return 0;
2794}
2795
227e86ad
JB
2796struct value *
2797hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2798 struct trad_frame_saved_reg saved_regs[],
227e86ad 2799 int regnum)
0da28f8a 2800{
227e86ad 2801 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2802 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2803
8693c419
MK
2804 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2805 {
227e86ad
JB
2806 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2807 CORE_ADDR pc;
2808 struct value *pcoq_val =
2809 trad_frame_get_prev_register (this_frame, saved_regs,
2810 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2811
e17a4113
UW
2812 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2813 size, byte_order);
227e86ad 2814 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2815 }
0da28f8a 2816
227e86ad 2817 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2818}
8693c419 2819\f
0da28f8a 2820
34f55018
MK
2821/* An instruction to match. */
2822struct insn_pattern
2823{
2824 unsigned int data; /* See if it matches this.... */
2825 unsigned int mask; /* ... with this mask. */
2826};
2827
2828/* See bfd/elf32-hppa.c */
2829static struct insn_pattern hppa_long_branch_stub[] = {
2830 /* ldil LR'xxx,%r1 */
2831 { 0x20200000, 0xffe00000 },
2832 /* be,n RR'xxx(%sr4,%r1) */
2833 { 0xe0202002, 0xffe02002 },
2834 { 0, 0 }
2835};
2836
2837static struct insn_pattern hppa_long_branch_pic_stub[] = {
2838 /* b,l .+8, %r1 */
2839 { 0xe8200000, 0xffe00000 },
2840 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2841 { 0x28200000, 0xffe00000 },
2842 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2843 { 0xe0202002, 0xffe02002 },
2844 { 0, 0 }
2845};
2846
2847static struct insn_pattern hppa_import_stub[] = {
2848 /* addil LR'xxx, %dp */
2849 { 0x2b600000, 0xffe00000 },
2850 /* ldw RR'xxx(%r1), %r21 */
2851 { 0x48350000, 0xffffb000 },
2852 /* bv %r0(%r21) */
2853 { 0xeaa0c000, 0xffffffff },
2854 /* ldw RR'xxx+4(%r1), %r19 */
2855 { 0x48330000, 0xffffb000 },
2856 { 0, 0 }
2857};
2858
2859static struct insn_pattern hppa_import_pic_stub[] = {
2860 /* addil LR'xxx,%r19 */
2861 { 0x2a600000, 0xffe00000 },
2862 /* ldw RR'xxx(%r1),%r21 */
2863 { 0x48350000, 0xffffb000 },
2864 /* bv %r0(%r21) */
2865 { 0xeaa0c000, 0xffffffff },
2866 /* ldw RR'xxx+4(%r1),%r19 */
2867 { 0x48330000, 0xffffb000 },
2868 { 0, 0 },
2869};
2870
2871static struct insn_pattern hppa_plt_stub[] = {
2872 /* b,l 1b, %r20 - 1b is 3 insns before here */
2873 { 0xea9f1fdd, 0xffffffff },
2874 /* depi 0,31,2,%r20 */
2875 { 0xd6801c1e, 0xffffffff },
2876 { 0, 0 }
34f55018
MK
2877};
2878
2879/* Maximum number of instructions on the patterns above. */
2880#define HPPA_MAX_INSN_PATTERN_LEN 4
2881
2882/* Return non-zero if the instructions at PC match the series
2883 described in PATTERN, or zero otherwise. PATTERN is an array of
2884 'struct insn_pattern' objects, terminated by an entry whose mask is
2885 zero.
2886
2887 When the match is successful, fill INSN[i] with what PATTERN[i]
2888 matched. */
2889
2890static int
e17a4113
UW
2891hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2892 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2893{
e17a4113 2894 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2895 CORE_ADDR npc = pc;
2896 int i;
2897
2898 for (i = 0; pattern[i].mask; i++)
2899 {
2900 gdb_byte buf[HPPA_INSN_SIZE];
2901
8defab1a 2902 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2903 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2904 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2905 npc += 4;
2906 else
2907 return 0;
2908 }
2909
2910 return 1;
2911}
2912
2913/* This relaxed version of the insstruction matcher allows us to match
2914 from somewhere inside the pattern, by looking backwards in the
2915 instruction scheme. */
2916
2917static int
e17a4113
UW
2918hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2919 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2920{
2921 int offset, len = 0;
2922
2923 while (pattern[len].mask)
2924 len++;
2925
2926 for (offset = 0; offset < len; offset++)
e17a4113
UW
2927 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2928 pattern, insn))
34f55018
MK
2929 return 1;
2930
2931 return 0;
2932}
2933
2934static int
2935hppa_in_dyncall (CORE_ADDR pc)
2936{
2937 struct unwind_table_entry *u;
2938
2939 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2940 if (!u)
2941 return 0;
2942
2943 return (pc >= u->region_start && pc <= u->region_end);
2944}
2945
2946int
3e5d3a5a 2947hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2948{
2949 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2950 struct unwind_table_entry *u;
2951
3e5d3a5a 2952 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2953 return 1;
2954
2955 /* The GNU toolchain produces linker stubs without unwind
2956 information. Since the pattern matching for linker stubs can be
2957 quite slow, so bail out if we do have an unwind entry. */
2958
2959 u = find_unwind_entry (pc);
806e23c0 2960 if (u != NULL)
34f55018
MK
2961 return 0;
2962
e17a4113
UW
2963 return
2964 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2965 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2966 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2967 || hppa_match_insns_relaxed (gdbarch, pc,
2968 hppa_long_branch_pic_stub, insn));
34f55018
MK
2969}
2970
2971/* This code skips several kind of "trampolines" used on PA-RISC
2972 systems: $$dyncall, import stubs and PLT stubs. */
2973
2974CORE_ADDR
52f729a7 2975hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2976{
0dfff4cb
UW
2977 struct gdbarch *gdbarch = get_frame_arch (frame);
2978 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2979
34f55018
MK
2980 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2981 int dp_rel;
2982
2983 /* $$dyncall handles both PLABELs and direct addresses. */
2984 if (hppa_in_dyncall (pc))
2985 {
52f729a7 2986 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2987
2988 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2989 if (pc & 0x2)
0dfff4cb 2990 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2991
2992 return pc;
2993 }
2994
e17a4113
UW
2995 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2996 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2997 {
2998 /* Extract the target address from the addil/ldw sequence. */
2999 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
3000
3001 if (dp_rel)
52f729a7 3002 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 3003 else
52f729a7 3004 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
3005
3006 /* fallthrough */
3007 }
3008
3e5d3a5a 3009 if (in_plt_section (pc))
34f55018 3010 {
0dfff4cb 3011 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
3012
3013 /* If the PLT slot has not yet been resolved, the target will be
3014 the PLT stub. */
3e5d3a5a 3015 if (in_plt_section (pc))
34f55018
MK
3016 {
3017 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 3018 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 3019 {
5af949e3
UW
3020 warning (_("Cannot resolve PLT stub at %s."),
3021 paddress (gdbarch, pc));
34f55018
MK
3022 return 0;
3023 }
3024
3025 /* This should point to the fixup routine. */
0dfff4cb 3026 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
3027 }
3028 }
3029
3030 return pc;
3031}
3032\f
3033
8e8b2dba
MC
3034/* Here is a table of C type sizes on hppa with various compiles
3035 and options. I measured this on PA 9000/800 with HP-UX 11.11
3036 and these compilers:
3037
3038 /usr/ccs/bin/cc HP92453-01 A.11.01.21
3039 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
3040 /opt/aCC/bin/aCC B3910B A.03.45
3041 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
3042
3043 cc : 1 2 4 4 8 : 4 8 -- : 4 4
3044 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3045 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3046 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3047 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3048 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3049 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3050 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3051
3052 Each line is:
3053
3054 compiler and options
3055 char, short, int, long, long long
3056 float, double, long double
3057 char *, void (*)()
3058
3059 So all these compilers use either ILP32 or LP64 model.
3060 TODO: gcc has more options so it needs more investigation.
3061
a2379359
MC
3062 For floating point types, see:
3063
3064 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3065 HP-UX floating-point guide, hpux 11.00
3066
8e8b2dba
MC
3067 -- chastain 2003-12-18 */
3068
e6e68f1f
JB
3069static struct gdbarch *
3070hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3071{
3ff7cf9e 3072 struct gdbarch_tdep *tdep;
e6e68f1f 3073 struct gdbarch *gdbarch;
59623e27
JB
3074
3075 /* Try to determine the ABI of the object we are loading. */
4be87837 3076 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 3077 {
4be87837
DJ
3078 /* If it's a SOM file, assume it's HP/UX SOM. */
3079 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
3080 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 3081 }
e6e68f1f
JB
3082
3083 /* find a candidate among the list of pre-declared architectures. */
3084 arches = gdbarch_list_lookup_by_info (arches, &info);
3085 if (arches != NULL)
3086 return (arches->gdbarch);
3087
3088 /* If none found, then allocate and initialize one. */
41bf6aca 3089 tdep = XCNEW (struct gdbarch_tdep);
3ff7cf9e
JB
3090 gdbarch = gdbarch_alloc (&info, tdep);
3091
3092 /* Determine from the bfd_arch_info structure if we are dealing with
3093 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3094 then default to a 32bit machine. */
3095 if (info.bfd_arch_info != NULL)
3096 tdep->bytes_per_address =
3097 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3098 else
3099 tdep->bytes_per_address = 4;
3100
d49771ef
RC
3101 tdep->find_global_pointer = hppa_find_global_pointer;
3102
3ff7cf9e
JB
3103 /* Some parts of the gdbarch vector depend on whether we are running
3104 on a 32 bits or 64 bits target. */
3105 switch (tdep->bytes_per_address)
3106 {
3107 case 4:
3108 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3109 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3110 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3111 set_gdbarch_cannot_store_register (gdbarch,
3112 hppa32_cannot_store_register);
3113 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3114 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3115 break;
3116 case 8:
3117 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3118 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3119 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3120 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3121 set_gdbarch_cannot_store_register (gdbarch,
3122 hppa64_cannot_store_register);
3123 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3124 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3125 break;
3126 default:
e2e0b3e5 3127 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3128 tdep->bytes_per_address);
3129 }
3130
3ff7cf9e 3131 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3132 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3133
8e8b2dba
MC
3134 /* The following gdbarch vector elements are the same in both ILP32
3135 and LP64, but might show differences some day. */
3136 set_gdbarch_long_long_bit (gdbarch, 64);
3137 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3138 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3139
3ff7cf9e
JB
3140 /* The following gdbarch vector elements do not depend on the address
3141 size, or in any other gdbarch element previously set. */
60383d10 3142 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
c9cf6e20
MG
3143 set_gdbarch_stack_frame_destroyed_p (gdbarch,
3144 hppa_stack_frame_destroyed_p);
a2a84a72 3145 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3146 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3147 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3148 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3149 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3150 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3151 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3152
143985b7
AF
3153 /* Helper for function argument information. */
3154 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3155
36482093
AC
3156 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3157
3a3bc038
AC
3158 /* When a hardware watchpoint triggers, we'll move the inferior past
3159 it by removing all eventpoints; stepping past the instruction
3160 that caused the trigger; reinserting eventpoints; and checking
3161 whether any watched location changed. */
3162 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3163
5979bc46 3164 /* Inferior function call methods. */
fca7aa43 3165 switch (tdep->bytes_per_address)
5979bc46 3166 {
fca7aa43
AC
3167 case 4:
3168 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3169 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3170 set_gdbarch_convert_from_func_ptr_addr
3171 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3172 break;
3173 case 8:
782eae8b
AC
3174 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3175 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3176 break;
782eae8b 3177 default:
e2e0b3e5 3178 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3179 }
3180
3181 /* Struct return methods. */
fca7aa43 3182 switch (tdep->bytes_per_address)
fad850b2 3183 {
fca7aa43
AC
3184 case 4:
3185 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3186 break;
3187 case 8:
782eae8b 3188 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3189 break;
fca7aa43 3190 default:
e2e0b3e5 3191 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3192 }
7f07c5b6 3193
85f4f2d8 3194 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3195 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3196
5979bc46 3197 /* Frame unwind methods. */
227e86ad 3198 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3199 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3200
50306a9d
RC
3201 /* Hook in ABI-specific overrides, if they have been registered. */
3202 gdbarch_init_osabi (info, gdbarch);
3203
7f07c5b6 3204 /* Hook in the default unwinders. */
227e86ad
JB
3205 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3206 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3207 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3208
e6e68f1f
JB
3209 return gdbarch;
3210}
3211
3212static void
464963c9 3213hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3214{
464963c9 3215 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3216
3217 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3218 tdep->bytes_per_address);
3219 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3220}
3221
72753510
PA
3222/* Provide a prototype to silence -Wmissing-prototypes. */
3223extern initialize_file_ftype _initialize_hppa_tdep;
3224
4facf7e8
JB
3225void
3226_initialize_hppa_tdep (void)
3227{
3228 struct cmd_list_element *c;
4facf7e8 3229
e6e68f1f 3230 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3231
7c46b9fb
RC
3232 hppa_objfile_priv_data = register_objfile_data ();
3233
4facf7e8 3234 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3235 _("Print unwind table entry at given address."),
4facf7e8
JB
3236 &maintenanceprintlist);
3237
1777feb0 3238 /* Debug this files internals. */
7915a72c
AC
3239 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3240Set whether hppa target specific debugging information should be displayed."),
3241 _("\
3242Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3243This flag controls whether hppa target specific debugging information is\n\
3244displayed. This information is particularly useful for debugging frame\n\
7915a72c 3245unwinding problems."),
2c5b56ce 3246 NULL,
7915a72c 3247 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3248 &setdebuglist, &showdebuglist);
4facf7e8 3249}
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