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[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the HP PA architecture, for GDB.
cda5a58a
AC
2
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
adc11376
AC
4 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
5 Foundation, Inc.
c906108c
SS
6
7 Contributed by the Center for Software Science at the
8 University of Utah (pa-gdb-bugs@cs.utah.edu).
9
c5aa993b 10 This file is part of GDB.
c906108c 11
c5aa993b
JM
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
c906108c 16
c5aa993b
JM
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
c906108c 21
c5aa993b
JM
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place - Suite 330,
25 Boston, MA 02111-1307, USA. */
c906108c
SS
26
27#include "defs.h"
28#include "frame.h"
29#include "bfd.h"
30#include "inferior.h"
31#include "value.h"
4e052eda 32#include "regcache.h"
e5d66720 33#include "completer.h"
d709c020 34#include "language.h"
59623e27 35#include "osabi.h"
a7ff40e7 36#include "gdb_assert.h"
65e82032 37#include "infttrace.h"
343af405 38#include "arch-utils.h"
c906108c
SS
39/* For argument passing to the inferior */
40#include "symtab.h"
04714b91 41#include "infcall.h"
fde2cceb 42#include "dis-asm.h"
26d08f08
AC
43#include "trad-frame.h"
44#include "frame-unwind.h"
45#include "frame-base.h"
c906108c 46
c906108c 47#include "gdb_stat.h"
03f2053f 48#include "gdb_wait.h"
c906108c
SS
49
50#include "gdbcore.h"
51#include "gdbcmd.h"
52#include "target.h"
53#include "symfile.h"
54#include "objfiles.h"
3ff7cf9e 55#include "hppa-tdep.h"
c906108c 56
369aa520
RC
57static int hppa_debug = 0;
58
60383d10 59/* Some local constants. */
3ff7cf9e
JB
60static const int hppa32_num_regs = 128;
61static const int hppa64_num_regs = 96;
62
7c46b9fb
RC
63/* hppa-specific object data -- unwind and solib info.
64 TODO/maybe: think about splitting this into two parts; the unwind data is
65 common to all hppa targets, but is only used in this file; we can register
66 that separately and make this static. The solib data is probably hpux-
67 specific, so we can create a separate extern objfile_data that is registered
68 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
69const struct objfile_data *hppa_objfile_priv_data = NULL;
70
e2ac8128
JB
71/* Get at various relevent fields of an instruction word. */
72#define MASK_5 0x1f
73#define MASK_11 0x7ff
74#define MASK_14 0x3fff
75#define MASK_21 0x1fffff
76
e2ac8128
JB
77/* Define offsets into the call dummy for the _sr4export address.
78 See comments related to CALL_DUMMY for more info. */
7c46b9fb
RC
79#define SR4EXPORT_LDIL_OFFSET (HPPA_INSTRUCTION_SIZE * 12)
80#define SR4EXPORT_LDO_OFFSET (HPPA_INSTRUCTION_SIZE * 13)
e2ac8128 81
c906108c
SS
82/* To support detection of the pseudo-initial frame
83 that threads have. */
84#define THREAD_INITIAL_FRAME_SYMBOL "__pthread_exit"
85#define THREAD_INITIAL_FRAME_SYM_LEN sizeof(THREAD_INITIAL_FRAME_SYMBOL)
c5aa993b 86
e2ac8128
JB
87/* Sizes (in bytes) of the native unwind entries. */
88#define UNWIND_ENTRY_SIZE 16
89#define STUB_UNWIND_ENTRY_SIZE 8
90
a14ed312 91static void unwind_command (char *, int);
c906108c 92
a14ed312 93static int hppa_alignof (struct type *);
c906108c 94
a14ed312 95static int prologue_inst_adjust_sp (unsigned long);
c906108c 96
a14ed312 97static int is_branch (unsigned long);
c906108c 98
a14ed312 99static int inst_saves_gr (unsigned long);
c906108c 100
a14ed312 101static int inst_saves_fr (unsigned long);
c906108c 102
a14ed312 103static int compare_unwind_entries (const void *, const void *);
c906108c 104
a14ed312 105static void read_unwind_info (struct objfile *);
c906108c 106
a14ed312
KB
107static void internalize_unwinds (struct objfile *,
108 struct unwind_table_entry *,
109 asection *, unsigned int,
110 unsigned int, CORE_ADDR);
a14ed312 111static void record_text_segment_lowaddr (bfd *, asection *, void *);
d709c020
JB
112/* FIXME: brobecker 2002-11-07: We will likely be able to make the
113 following functions static, once we hppa is partially multiarched. */
d709c020
JB
114int hppa_pc_requires_run_before_use (CORE_ADDR pc);
115int hppa_instruction_nullified (void);
c906108c 116
537987fc
AC
117/* Handle 32/64-bit struct return conventions. */
118
119static enum return_value_convention
120hppa32_return_value (struct gdbarch *gdbarch,
121 struct type *type, struct regcache *regcache,
122 void *readbuf, const void *writebuf)
123{
124 if (TYPE_CODE (type) == TYPE_CODE_FLT)
125 {
126 if (readbuf != NULL)
127 regcache_cooked_read_part (regcache, FP4_REGNUM, 0,
128 TYPE_LENGTH (type), readbuf);
129 if (writebuf != NULL)
130 regcache_cooked_write_part (regcache, FP4_REGNUM, 0,
131 TYPE_LENGTH (type), writebuf);
132 return RETURN_VALUE_REGISTER_CONVENTION;
133 }
134 if (TYPE_LENGTH (type) <= 2 * 4)
135 {
136 /* The value always lives in the right hand end of the register
137 (or register pair)? */
138 int b;
139 int reg = 28;
140 int part = TYPE_LENGTH (type) % 4;
141 /* The left hand register contains only part of the value,
142 transfer that first so that the rest can be xfered as entire
143 4-byte registers. */
144 if (part > 0)
145 {
146 if (readbuf != NULL)
147 regcache_cooked_read_part (regcache, reg, 4 - part,
148 part, readbuf);
149 if (writebuf != NULL)
150 regcache_cooked_write_part (regcache, reg, 4 - part,
151 part, writebuf);
152 reg++;
153 }
154 /* Now transfer the remaining register values. */
155 for (b = part; b < TYPE_LENGTH (type); b += 4)
156 {
157 if (readbuf != NULL)
158 regcache_cooked_read (regcache, reg, (char *) readbuf + b);
159 if (writebuf != NULL)
160 regcache_cooked_write (regcache, reg, (const char *) writebuf + b);
161 reg++;
162 }
163 return RETURN_VALUE_REGISTER_CONVENTION;
164 }
165 else
166 return RETURN_VALUE_STRUCT_CONVENTION;
167}
168
169static enum return_value_convention
170hppa64_return_value (struct gdbarch *gdbarch,
171 struct type *type, struct regcache *regcache,
172 void *readbuf, const void *writebuf)
173{
174 /* RM: Floats are returned in FR4R, doubles in FR4. Integral values
175 are in r28, padded on the left. Aggregates less that 65 bits are
176 in r28, right padded. Aggregates upto 128 bits are in r28 and
177 r29, right padded. */
449e1137
AC
178 if (TYPE_CODE (type) == TYPE_CODE_FLT
179 && TYPE_LENGTH (type) <= 8)
537987fc
AC
180 {
181 /* Floats are right aligned? */
182 int offset = register_size (gdbarch, FP4_REGNUM) - TYPE_LENGTH (type);
183 if (readbuf != NULL)
184 regcache_cooked_read_part (regcache, FP4_REGNUM, offset,
185 TYPE_LENGTH (type), readbuf);
186 if (writebuf != NULL)
187 regcache_cooked_write_part (regcache, FP4_REGNUM, offset,
188 TYPE_LENGTH (type), writebuf);
189 return RETURN_VALUE_REGISTER_CONVENTION;
190 }
191 else if (TYPE_LENGTH (type) <= 8 && is_integral_type (type))
192 {
193 /* Integrals are right aligned. */
194 int offset = register_size (gdbarch, FP4_REGNUM) - TYPE_LENGTH (type);
195 if (readbuf != NULL)
196 regcache_cooked_read_part (regcache, 28, offset,
197 TYPE_LENGTH (type), readbuf);
198 if (writebuf != NULL)
199 regcache_cooked_write_part (regcache, 28, offset,
200 TYPE_LENGTH (type), writebuf);
201 return RETURN_VALUE_REGISTER_CONVENTION;
202 }
203 else if (TYPE_LENGTH (type) <= 2 * 8)
204 {
205 /* Composite values are left aligned. */
206 int b;
207 for (b = 0; b < TYPE_LENGTH (type); b += 8)
208 {
449e1137 209 int part = min (8, TYPE_LENGTH (type) - b);
537987fc 210 if (readbuf != NULL)
449e1137 211 regcache_cooked_read_part (regcache, 28 + b / 8, 0, part,
537987fc
AC
212 (char *) readbuf + b);
213 if (writebuf != NULL)
449e1137 214 regcache_cooked_write_part (regcache, 28 + b / 8, 0, part,
537987fc
AC
215 (const char *) writebuf + b);
216 }
449e1137 217 return RETURN_VALUE_REGISTER_CONVENTION;
537987fc
AC
218 }
219 else
220 return RETURN_VALUE_STRUCT_CONVENTION;
221}
222
c906108c
SS
223/* Routines to extract various sized constants out of hppa
224 instructions. */
225
226/* This assumes that no garbage lies outside of the lower bits of
227 value. */
228
abc485a1
RC
229int
230hppa_sign_extend (unsigned val, unsigned bits)
c906108c 231{
c5aa993b 232 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
233}
234
235/* For many immediate values the sign bit is the low bit! */
236
abc485a1
RC
237int
238hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 239{
c5aa993b 240 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
241}
242
e2ac8128
JB
243/* Extract the bits at positions between FROM and TO, using HP's numbering
244 (MSB = 0). */
245
abc485a1
RC
246int
247hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
248{
249 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
250}
251
c906108c
SS
252/* extract the immediate field from a ld{bhw}s instruction */
253
abc485a1
RC
254int
255hppa_extract_5_load (unsigned word)
c906108c 256{
abc485a1 257 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
258}
259
c906108c
SS
260/* extract the immediate field from a break instruction */
261
abc485a1
RC
262unsigned
263hppa_extract_5r_store (unsigned word)
c906108c
SS
264{
265 return (word & MASK_5);
266}
267
268/* extract the immediate field from a {sr}sm instruction */
269
abc485a1
RC
270unsigned
271hppa_extract_5R_store (unsigned word)
c906108c
SS
272{
273 return (word >> 16 & MASK_5);
274}
275
c906108c
SS
276/* extract a 14 bit immediate field */
277
abc485a1
RC
278int
279hppa_extract_14 (unsigned word)
c906108c 280{
abc485a1 281 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
282}
283
c906108c
SS
284/* extract a 21 bit constant */
285
abc485a1
RC
286int
287hppa_extract_21 (unsigned word)
c906108c
SS
288{
289 int val;
290
291 word &= MASK_21;
292 word <<= 11;
abc485a1 293 val = hppa_get_field (word, 20, 20);
c906108c 294 val <<= 11;
abc485a1 295 val |= hppa_get_field (word, 9, 19);
c906108c 296 val <<= 2;
abc485a1 297 val |= hppa_get_field (word, 5, 6);
c906108c 298 val <<= 5;
abc485a1 299 val |= hppa_get_field (word, 0, 4);
c906108c 300 val <<= 2;
abc485a1
RC
301 val |= hppa_get_field (word, 7, 8);
302 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
303}
304
c906108c
SS
305/* extract a 17 bit constant from branch instructions, returning the
306 19 bit signed value. */
307
abc485a1
RC
308int
309hppa_extract_17 (unsigned word)
c906108c 310{
abc485a1
RC
311 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
312 hppa_get_field (word, 29, 29) << 10 |
313 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
314 (word & 0x1) << 16, 17) << 2;
315}
316\f
317
318/* Compare the start address for two unwind entries returning 1 if
319 the first address is larger than the second, -1 if the second is
320 larger than the first, and zero if they are equal. */
321
322static int
fba45db2 323compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
324{
325 const struct unwind_table_entry *a = arg1;
326 const struct unwind_table_entry *b = arg2;
327
328 if (a->region_start > b->region_start)
329 return 1;
330 else if (a->region_start < b->region_start)
331 return -1;
332 else
333 return 0;
334}
335
53a5351d 336static void
fdd72f95 337record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 338{
fdd72f95 339 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 340 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
341 {
342 bfd_vma value = section->vma - section->filepos;
343 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
344
345 if (value < *low_text_segment_address)
346 *low_text_segment_address = value;
347 }
53a5351d
JM
348}
349
c906108c 350static void
fba45db2
KB
351internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
352 asection *section, unsigned int entries, unsigned int size,
353 CORE_ADDR text_offset)
c906108c
SS
354{
355 /* We will read the unwind entries into temporary memory, then
356 fill in the actual unwind table. */
fdd72f95 357
c906108c
SS
358 if (size > 0)
359 {
360 unsigned long tmp;
361 unsigned i;
362 char *buf = alloca (size);
fdd72f95 363 CORE_ADDR low_text_segment_address;
c906108c 364
fdd72f95 365 /* For ELF targets, then unwinds are supposed to
c2c6d25f
JM
366 be segment relative offsets instead of absolute addresses.
367
368 Note that when loading a shared library (text_offset != 0) the
369 unwinds are already relative to the text_offset that will be
370 passed in. */
fdd72f95 371 if (gdbarch_tdep (current_gdbarch)->is_elf && text_offset == 0)
53a5351d 372 {
fdd72f95
RC
373 low_text_segment_address = -1;
374
53a5351d 375 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
376 record_text_segment_lowaddr,
377 &low_text_segment_address);
53a5351d 378
fdd72f95 379 text_offset = low_text_segment_address;
53a5351d
JM
380 }
381
c906108c
SS
382 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
383
384 /* Now internalize the information being careful to handle host/target
c5aa993b 385 endian issues. */
c906108c
SS
386 for (i = 0; i < entries; i++)
387 {
388 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 389 (bfd_byte *) buf);
c906108c
SS
390 table[i].region_start += text_offset;
391 buf += 4;
c5aa993b 392 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
393 table[i].region_end += text_offset;
394 buf += 4;
c5aa993b 395 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
396 buf += 4;
397 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
398 table[i].Millicode = (tmp >> 30) & 0x1;
399 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
400 table[i].Region_description = (tmp >> 27) & 0x3;
401 table[i].reserved1 = (tmp >> 26) & 0x1;
402 table[i].Entry_SR = (tmp >> 25) & 0x1;
403 table[i].Entry_FR = (tmp >> 21) & 0xf;
404 table[i].Entry_GR = (tmp >> 16) & 0x1f;
405 table[i].Args_stored = (tmp >> 15) & 0x1;
406 table[i].Variable_Frame = (tmp >> 14) & 0x1;
407 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
408 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
409 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
410 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
411 table[i].Ada_Region = (tmp >> 9) & 0x1;
412 table[i].cxx_info = (tmp >> 8) & 0x1;
413 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
414 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
415 table[i].reserved2 = (tmp >> 5) & 0x1;
416 table[i].Save_SP = (tmp >> 4) & 0x1;
417 table[i].Save_RP = (tmp >> 3) & 0x1;
418 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
419 table[i].extn_ptr_defined = (tmp >> 1) & 0x1;
420 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 421 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
422 buf += 4;
423 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
424 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
425 table[i].Large_frame = (tmp >> 29) & 0x1;
426 table[i].Pseudo_SP_Set = (tmp >> 28) & 0x1;
427 table[i].reserved4 = (tmp >> 27) & 0x1;
428 table[i].Total_frame_size = tmp & 0x7ffffff;
429
c5aa993b 430 /* Stub unwinds are handled elsewhere. */
c906108c
SS
431 table[i].stub_unwind.stub_type = 0;
432 table[i].stub_unwind.padding = 0;
433 }
434 }
435}
436
437/* Read in the backtrace information stored in the `$UNWIND_START$' section of
438 the object file. This info is used mainly by find_unwind_entry() to find
439 out the stack frame size and frame pointer used by procedures. We put
440 everything on the psymbol obstack in the objfile so that it automatically
441 gets freed when the objfile is destroyed. */
442
443static void
fba45db2 444read_unwind_info (struct objfile *objfile)
c906108c 445{
d4f3574e
SS
446 asection *unwind_sec, *stub_unwind_sec;
447 unsigned unwind_size, stub_unwind_size, total_size;
448 unsigned index, unwind_entries;
c906108c
SS
449 unsigned stub_entries, total_entries;
450 CORE_ADDR text_offset;
7c46b9fb
RC
451 struct hppa_unwind_info *ui;
452 struct hppa_objfile_private *obj_private;
c906108c
SS
453
454 text_offset = ANOFFSET (objfile->section_offsets, 0);
7c46b9fb
RC
455 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
456 sizeof (struct hppa_unwind_info));
c906108c
SS
457
458 ui->table = NULL;
459 ui->cache = NULL;
460 ui->last = -1;
461
d4f3574e
SS
462 /* For reasons unknown the HP PA64 tools generate multiple unwinder
463 sections in a single executable. So we just iterate over every
464 section in the BFD looking for unwinder sections intead of trying
465 to do a lookup with bfd_get_section_by_name.
c906108c 466
d4f3574e
SS
467 First determine the total size of the unwind tables so that we
468 can allocate memory in a nice big hunk. */
469 total_entries = 0;
470 for (unwind_sec = objfile->obfd->sections;
471 unwind_sec;
472 unwind_sec = unwind_sec->next)
c906108c 473 {
d4f3574e
SS
474 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
475 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
476 {
477 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
478 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 479
d4f3574e
SS
480 total_entries += unwind_entries;
481 }
c906108c
SS
482 }
483
d4f3574e
SS
484 /* Now compute the size of the stub unwinds. Note the ELF tools do not
485 use stub unwinds at the curren time. */
486 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
487
c906108c
SS
488 if (stub_unwind_sec)
489 {
490 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
491 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
492 }
493 else
494 {
495 stub_unwind_size = 0;
496 stub_entries = 0;
497 }
498
499 /* Compute total number of unwind entries and their total size. */
d4f3574e 500 total_entries += stub_entries;
c906108c
SS
501 total_size = total_entries * sizeof (struct unwind_table_entry);
502
503 /* Allocate memory for the unwind table. */
504 ui->table = (struct unwind_table_entry *)
8b92e4d5 505 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 506 ui->last = total_entries - 1;
c906108c 507
d4f3574e
SS
508 /* Now read in each unwind section and internalize the standard unwind
509 entries. */
c906108c 510 index = 0;
d4f3574e
SS
511 for (unwind_sec = objfile->obfd->sections;
512 unwind_sec;
513 unwind_sec = unwind_sec->next)
514 {
515 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
516 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
517 {
518 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
519 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
520
521 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
522 unwind_entries, unwind_size, text_offset);
523 index += unwind_entries;
524 }
525 }
526
527 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
528 if (stub_unwind_size > 0)
529 {
530 unsigned int i;
531 char *buf = alloca (stub_unwind_size);
532
533 /* Read in the stub unwind entries. */
534 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
535 0, stub_unwind_size);
536
537 /* Now convert them into regular unwind entries. */
538 for (i = 0; i < stub_entries; i++, index++)
539 {
540 /* Clear out the next unwind entry. */
541 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
542
543 /* Convert offset & size into region_start and region_end.
544 Stuff away the stub type into "reserved" fields. */
545 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
546 (bfd_byte *) buf);
547 ui->table[index].region_start += text_offset;
548 buf += 4;
549 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 550 (bfd_byte *) buf);
c906108c
SS
551 buf += 2;
552 ui->table[index].region_end
c5aa993b
JM
553 = ui->table[index].region_start + 4 *
554 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
555 buf += 2;
556 }
557
558 }
559
560 /* Unwind table needs to be kept sorted. */
561 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
562 compare_unwind_entries);
563
564 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
565 obj_private = (struct hppa_objfile_private *)
566 objfile_data (objfile, hppa_objfile_priv_data);
567 if (obj_private == NULL)
c906108c 568 {
7c46b9fb
RC
569 obj_private = (struct hppa_objfile_private *)
570 obstack_alloc (&objfile->objfile_obstack,
571 sizeof (struct hppa_objfile_private));
572 set_objfile_data (objfile, hppa_objfile_priv_data, obj_private);
c906108c 573 obj_private->unwind_info = NULL;
c5aa993b 574 obj_private->so_info = NULL;
53a5351d 575 obj_private->dp = 0;
c906108c 576 }
c906108c
SS
577 obj_private->unwind_info = ui;
578}
579
580/* Lookup the unwind (stack backtrace) info for the given PC. We search all
581 of the objfiles seeking the unwind table entry for this PC. Each objfile
582 contains a sorted list of struct unwind_table_entry. Since we do a binary
583 search of the unwind tables, we depend upon them to be sorted. */
584
585struct unwind_table_entry *
fba45db2 586find_unwind_entry (CORE_ADDR pc)
c906108c
SS
587{
588 int first, middle, last;
589 struct objfile *objfile;
7c46b9fb 590 struct hppa_objfile_private *priv;
c906108c 591
369aa520
RC
592 if (hppa_debug)
593 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry 0x%s -> ",
594 paddr_nz (pc));
595
c906108c
SS
596 /* A function at address 0? Not in HP-UX! */
597 if (pc == (CORE_ADDR) 0)
369aa520
RC
598 {
599 if (hppa_debug)
600 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
601 return NULL;
602 }
c906108c
SS
603
604 ALL_OBJFILES (objfile)
c5aa993b 605 {
7c46b9fb 606 struct hppa_unwind_info *ui;
c5aa993b 607 ui = NULL;
7c46b9fb
RC
608 priv = objfile_data (objfile, hppa_objfile_priv_data);
609 if (priv)
610 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 611
c5aa993b
JM
612 if (!ui)
613 {
614 read_unwind_info (objfile);
7c46b9fb
RC
615 priv = objfile_data (objfile, hppa_objfile_priv_data);
616 if (priv == NULL)
104c1213 617 error ("Internal error reading unwind information.");
7c46b9fb 618 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 619 }
c906108c 620
c5aa993b 621 /* First, check the cache */
c906108c 622
c5aa993b
JM
623 if (ui->cache
624 && pc >= ui->cache->region_start
625 && pc <= ui->cache->region_end)
369aa520
RC
626 {
627 if (hppa_debug)
628 fprintf_unfiltered (gdb_stdlog, "0x%s (cached) }\n",
629 paddr_nz ((CORE_ADDR) ui->cache));
630 return ui->cache;
631 }
c906108c 632
c5aa993b 633 /* Not in the cache, do a binary search */
c906108c 634
c5aa993b
JM
635 first = 0;
636 last = ui->last;
c906108c 637
c5aa993b
JM
638 while (first <= last)
639 {
640 middle = (first + last) / 2;
641 if (pc >= ui->table[middle].region_start
642 && pc <= ui->table[middle].region_end)
643 {
644 ui->cache = &ui->table[middle];
369aa520
RC
645 if (hppa_debug)
646 fprintf_unfiltered (gdb_stdlog, "0x%s }\n",
647 paddr_nz ((CORE_ADDR) ui->cache));
c5aa993b
JM
648 return &ui->table[middle];
649 }
c906108c 650
c5aa993b
JM
651 if (pc < ui->table[middle].region_start)
652 last = middle - 1;
653 else
654 first = middle + 1;
655 }
656 } /* ALL_OBJFILES() */
369aa520
RC
657
658 if (hppa_debug)
659 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
660
c906108c
SS
661 return NULL;
662}
663
85f4f2d8 664static const unsigned char *
aaab4dba
AC
665hppa_breakpoint_from_pc (CORE_ADDR *pc, int *len)
666{
56132691 667 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
668 (*len) = sizeof (breakpoint);
669 return breakpoint;
670}
671
e23457df
AC
672/* Return the name of a register. */
673
674const char *
3ff7cf9e 675hppa32_register_name (int i)
e23457df
AC
676{
677 static char *names[] = {
678 "flags", "r1", "rp", "r3",
679 "r4", "r5", "r6", "r7",
680 "r8", "r9", "r10", "r11",
681 "r12", "r13", "r14", "r15",
682 "r16", "r17", "r18", "r19",
683 "r20", "r21", "r22", "r23",
684 "r24", "r25", "r26", "dp",
685 "ret0", "ret1", "sp", "r31",
686 "sar", "pcoqh", "pcsqh", "pcoqt",
687 "pcsqt", "eiem", "iir", "isr",
688 "ior", "ipsw", "goto", "sr4",
689 "sr0", "sr1", "sr2", "sr3",
690 "sr5", "sr6", "sr7", "cr0",
691 "cr8", "cr9", "ccr", "cr12",
692 "cr13", "cr24", "cr25", "cr26",
693 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
694 "fpsr", "fpe1", "fpe2", "fpe3",
695 "fpe4", "fpe5", "fpe6", "fpe7",
696 "fr4", "fr4R", "fr5", "fr5R",
697 "fr6", "fr6R", "fr7", "fr7R",
698 "fr8", "fr8R", "fr9", "fr9R",
699 "fr10", "fr10R", "fr11", "fr11R",
700 "fr12", "fr12R", "fr13", "fr13R",
701 "fr14", "fr14R", "fr15", "fr15R",
702 "fr16", "fr16R", "fr17", "fr17R",
703 "fr18", "fr18R", "fr19", "fr19R",
704 "fr20", "fr20R", "fr21", "fr21R",
705 "fr22", "fr22R", "fr23", "fr23R",
706 "fr24", "fr24R", "fr25", "fr25R",
707 "fr26", "fr26R", "fr27", "fr27R",
708 "fr28", "fr28R", "fr29", "fr29R",
709 "fr30", "fr30R", "fr31", "fr31R"
710 };
711 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
712 return NULL;
713 else
714 return names[i];
715}
716
717const char *
718hppa64_register_name (int i)
719{
720 static char *names[] = {
721 "flags", "r1", "rp", "r3",
722 "r4", "r5", "r6", "r7",
723 "r8", "r9", "r10", "r11",
724 "r12", "r13", "r14", "r15",
725 "r16", "r17", "r18", "r19",
726 "r20", "r21", "r22", "r23",
727 "r24", "r25", "r26", "dp",
728 "ret0", "ret1", "sp", "r31",
729 "sar", "pcoqh", "pcsqh", "pcoqt",
730 "pcsqt", "eiem", "iir", "isr",
731 "ior", "ipsw", "goto", "sr4",
732 "sr0", "sr1", "sr2", "sr3",
733 "sr5", "sr6", "sr7", "cr0",
734 "cr8", "cr9", "ccr", "cr12",
735 "cr13", "cr24", "cr25", "cr26",
736 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
737 "fpsr", "fpe1", "fpe2", "fpe3",
738 "fr4", "fr5", "fr6", "fr7",
739 "fr8", "fr9", "fr10", "fr11",
740 "fr12", "fr13", "fr14", "fr15",
741 "fr16", "fr17", "fr18", "fr19",
742 "fr20", "fr21", "fr22", "fr23",
743 "fr24", "fr25", "fr26", "fr27",
744 "fr28", "fr29", "fr30", "fr31"
745 };
746 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
747 return NULL;
748 else
749 return names[i];
750}
751
79508e1e
AC
752/* This function pushes a stack frame with arguments as part of the
753 inferior function calling mechanism.
754
755 This is the version of the function for the 32-bit PA machines, in
756 which later arguments appear at lower addresses. (The stack always
757 grows towards higher addresses.)
758
759 We simply allocate the appropriate amount of stack space and put
760 arguments into their proper slots. */
761
762CORE_ADDR
763hppa32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
764 struct regcache *regcache, CORE_ADDR bp_addr,
765 int nargs, struct value **args, CORE_ADDR sp,
766 int struct_return, CORE_ADDR struct_addr)
767{
768 /* NOTE: cagney/2004-02-27: This is a guess - its implemented by
769 reverse engineering testsuite failures. */
770
771 /* Stack base address at which any pass-by-reference parameters are
772 stored. */
773 CORE_ADDR struct_end = 0;
774 /* Stack base address at which the first parameter is stored. */
775 CORE_ADDR param_end = 0;
776
777 /* The inner most end of the stack after all the parameters have
778 been pushed. */
779 CORE_ADDR new_sp = 0;
780
781 /* Two passes. First pass computes the location of everything,
782 second pass writes the bytes out. */
783 int write_pass;
784 for (write_pass = 0; write_pass < 2; write_pass++)
785 {
1797a8f6
AC
786 CORE_ADDR struct_ptr = 0;
787 CORE_ADDR param_ptr = 0;
79508e1e
AC
788 int reg = 27; /* NOTE: Registers go down. */
789 int i;
790 for (i = 0; i < nargs; i++)
791 {
792 struct value *arg = args[i];
793 struct type *type = check_typedef (VALUE_TYPE (arg));
794 /* The corresponding parameter that is pushed onto the
795 stack, and [possibly] passed in a register. */
796 char param_val[8];
797 int param_len;
798 memset (param_val, 0, sizeof param_val);
799 if (TYPE_LENGTH (type) > 8)
800 {
801 /* Large parameter, pass by reference. Store the value
802 in "struct" area and then pass its address. */
803 param_len = 4;
1797a8f6 804 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 805 if (write_pass)
1797a8f6 806 write_memory (struct_end - struct_ptr, VALUE_CONTENTS (arg),
79508e1e 807 TYPE_LENGTH (type));
1797a8f6 808 store_unsigned_integer (param_val, 4, struct_end - struct_ptr);
79508e1e
AC
809 }
810 else if (TYPE_CODE (type) == TYPE_CODE_INT
811 || TYPE_CODE (type) == TYPE_CODE_ENUM)
812 {
813 /* Integer value store, right aligned. "unpack_long"
814 takes care of any sign-extension problems. */
815 param_len = align_up (TYPE_LENGTH (type), 4);
816 store_unsigned_integer (param_val, param_len,
817 unpack_long (type,
818 VALUE_CONTENTS (arg)));
819 }
820 else
821 {
822 /* Small struct value, store right aligned? */
823 param_len = align_up (TYPE_LENGTH (type), 4);
824 memcpy (param_val + param_len - TYPE_LENGTH (type),
825 VALUE_CONTENTS (arg), TYPE_LENGTH (type));
826 }
1797a8f6 827 param_ptr += param_len;
79508e1e
AC
828 reg -= param_len / 4;
829 if (write_pass)
830 {
1797a8f6 831 write_memory (param_end - param_ptr, param_val, param_len);
79508e1e
AC
832 if (reg >= 23)
833 {
834 regcache_cooked_write (regcache, reg, param_val);
835 if (param_len > 4)
836 regcache_cooked_write (regcache, reg + 1, param_val + 4);
837 }
838 }
839 }
840
841 /* Update the various stack pointers. */
842 if (!write_pass)
843 {
844 struct_end = sp + struct_ptr;
845 /* PARAM_PTR already accounts for all the arguments passed
846 by the user. However, the ABI mandates minimum stack
847 space allocations for outgoing arguments. The ABI also
848 mandates minimum stack alignments which we must
849 preserve. */
d0bd2d18 850 param_end = struct_end + max (align_up (param_ptr, 8), 16);
79508e1e
AC
851 }
852 }
853
854 /* If a structure has to be returned, set up register 28 to hold its
855 address */
856 if (struct_return)
857 write_register (28, struct_addr);
858
859 /* Set the return address. */
860 regcache_cooked_write_unsigned (regcache, RP_REGNUM, bp_addr);
861
c4557624
JB
862 /* Update the Stack Pointer. */
863 regcache_cooked_write_unsigned (regcache, SP_REGNUM, param_end + 32);
864
79508e1e
AC
865 /* The stack will have 32 bytes of additional space for a frame marker. */
866 return param_end + 32;
867}
868
2f690297
AC
869/* This function pushes a stack frame with arguments as part of the
870 inferior function calling mechanism.
871
872 This is the version for the PA64, in which later arguments appear
873 at higher addresses. (The stack always grows towards higher
874 addresses.)
875
876 We simply allocate the appropriate amount of stack space and put
877 arguments into their proper slots.
878
879 This ABI also requires that the caller provide an argument pointer
880 to the callee, so we do that too. */
881
882CORE_ADDR
883hppa64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
884 struct regcache *regcache, CORE_ADDR bp_addr,
885 int nargs, struct value **args, CORE_ADDR sp,
886 int struct_return, CORE_ADDR struct_addr)
887{
449e1137
AC
888 /* NOTE: cagney/2004-02-27: This is a guess - its implemented by
889 reverse engineering testsuite failures. */
2f690297 890
449e1137
AC
891 /* Stack base address at which any pass-by-reference parameters are
892 stored. */
893 CORE_ADDR struct_end = 0;
894 /* Stack base address at which the first parameter is stored. */
895 CORE_ADDR param_end = 0;
2f690297 896
449e1137
AC
897 /* The inner most end of the stack after all the parameters have
898 been pushed. */
899 CORE_ADDR new_sp = 0;
2f690297 900
449e1137
AC
901 /* Two passes. First pass computes the location of everything,
902 second pass writes the bytes out. */
903 int write_pass;
904 for (write_pass = 0; write_pass < 2; write_pass++)
2f690297 905 {
449e1137
AC
906 CORE_ADDR struct_ptr = 0;
907 CORE_ADDR param_ptr = 0;
908 int i;
909 for (i = 0; i < nargs; i++)
2f690297 910 {
449e1137
AC
911 struct value *arg = args[i];
912 struct type *type = check_typedef (VALUE_TYPE (arg));
913 if ((TYPE_CODE (type) == TYPE_CODE_INT
914 || TYPE_CODE (type) == TYPE_CODE_ENUM)
915 && TYPE_LENGTH (type) <= 8)
916 {
917 /* Integer value store, right aligned. "unpack_long"
918 takes care of any sign-extension problems. */
919 param_ptr += 8;
920 if (write_pass)
921 {
922 ULONGEST val = unpack_long (type, VALUE_CONTENTS (arg));
923 int reg = 27 - param_ptr / 8;
924 write_memory_unsigned_integer (param_end - param_ptr,
925 val, 8);
926 if (reg >= 19)
927 regcache_cooked_write_unsigned (regcache, reg, val);
928 }
929 }
930 else
931 {
932 /* Small struct value, store left aligned? */
933 int reg;
934 if (TYPE_LENGTH (type) > 8)
935 {
936 param_ptr = align_up (param_ptr, 16);
937 reg = 26 - param_ptr / 8;
938 param_ptr += align_up (TYPE_LENGTH (type), 16);
939 }
940 else
941 {
942 param_ptr = align_up (param_ptr, 8);
943 reg = 26 - param_ptr / 8;
944 param_ptr += align_up (TYPE_LENGTH (type), 8);
945 }
946 if (write_pass)
947 {
948 int byte;
949 write_memory (param_end - param_ptr, VALUE_CONTENTS (arg),
950 TYPE_LENGTH (type));
951 for (byte = 0; byte < TYPE_LENGTH (type); byte += 8)
952 {
953 if (reg >= 19)
954 {
955 int len = min (8, TYPE_LENGTH (type) - byte);
956 regcache_cooked_write_part (regcache, reg, 0, len,
957 VALUE_CONTENTS (arg) + byte);
958 }
959 reg--;
960 }
961 }
962 }
2f690297 963 }
449e1137
AC
964 /* Update the various stack pointers. */
965 if (!write_pass)
2f690297 966 {
449e1137
AC
967 struct_end = sp + struct_ptr;
968 /* PARAM_PTR already accounts for all the arguments passed
969 by the user. However, the ABI mandates minimum stack
970 space allocations for outgoing arguments. The ABI also
971 mandates minimum stack alignments which we must
972 preserve. */
d0bd2d18 973 param_end = struct_end + max (align_up (param_ptr, 16), 64);
2f690297 974 }
2f690297
AC
975 }
976
2f690297
AC
977 /* If a structure has to be returned, set up register 28 to hold its
978 address */
979 if (struct_return)
980 write_register (28, struct_addr);
981
2f690297
AC
982 /* Set the return address. */
983 regcache_cooked_write_unsigned (regcache, RP_REGNUM, bp_addr);
984
c4557624
JB
985 /* Update the Stack Pointer. */
986 regcache_cooked_write_unsigned (regcache, SP_REGNUM, param_end + 64);
987
449e1137
AC
988 /* The stack will have 32 bytes of additional space for a frame marker. */
989 return param_end + 64;
2f690297
AC
990}
991
1797a8f6
AC
992static CORE_ADDR
993hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
994{
995 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
996 and not _bit_)! */
997 return align_up (addr, 64);
998}
999
2f690297
AC
1000/* Force all frames to 16-byte alignment. Better safe than sorry. */
1001
1002static CORE_ADDR
1797a8f6 1003hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1004{
1005 /* Just always 16-byte align. */
1006 return align_up (addr, 16);
1007}
1008
1009
c906108c
SS
1010/* Get the PC from %r31 if currently in a syscall. Also mask out privilege
1011 bits. */
1012
8d153463 1013static CORE_ADDR
60383d10 1014hppa_target_read_pc (ptid_t ptid)
c906108c 1015{
39f77062 1016 int flags = read_register_pid (FLAGS_REGNUM, ptid);
c906108c
SS
1017
1018 /* The following test does not belong here. It is OS-specific, and belongs
1019 in native code. */
1020 /* Test SS_INSYSCALL */
1021 if (flags & 2)
39f77062 1022 return read_register_pid (31, ptid) & ~0x3;
c906108c 1023
449e1137 1024 return read_register_pid (PCOQ_HEAD_REGNUM, ptid) & ~0x3;
c906108c
SS
1025}
1026
1027/* Write out the PC. If currently in a syscall, then also write the new
1028 PC value into %r31. */
1029
8d153463 1030static void
60383d10 1031hppa_target_write_pc (CORE_ADDR v, ptid_t ptid)
c906108c 1032{
39f77062 1033 int flags = read_register_pid (FLAGS_REGNUM, ptid);
c906108c
SS
1034
1035 /* The following test does not belong here. It is OS-specific, and belongs
1036 in native code. */
1037 /* If in a syscall, then set %r31. Also make sure to get the
1038 privilege bits set correctly. */
1039 /* Test SS_INSYSCALL */
1040 if (flags & 2)
39f77062 1041 write_register_pid (31, v | 0x3, ptid);
c906108c 1042
449e1137 1043 write_register_pid (PCOQ_HEAD_REGNUM, v, ptid);
adc11376 1044 write_register_pid (PCOQ_TAIL_REGNUM, v + 4, ptid);
c906108c
SS
1045}
1046
1047/* return the alignment of a type in bytes. Structures have the maximum
1048 alignment required by their fields. */
1049
1050static int
fba45db2 1051hppa_alignof (struct type *type)
c906108c
SS
1052{
1053 int max_align, align, i;
1054 CHECK_TYPEDEF (type);
1055 switch (TYPE_CODE (type))
1056 {
1057 case TYPE_CODE_PTR:
1058 case TYPE_CODE_INT:
1059 case TYPE_CODE_FLT:
1060 return TYPE_LENGTH (type);
1061 case TYPE_CODE_ARRAY:
1062 return hppa_alignof (TYPE_FIELD_TYPE (type, 0));
1063 case TYPE_CODE_STRUCT:
1064 case TYPE_CODE_UNION:
1065 max_align = 1;
1066 for (i = 0; i < TYPE_NFIELDS (type); i++)
1067 {
1068 /* Bit fields have no real alignment. */
1069 /* if (!TYPE_FIELD_BITPOS (type, i)) */
c5aa993b 1070 if (!TYPE_FIELD_BITSIZE (type, i)) /* elz: this should be bitsize */
c906108c
SS
1071 {
1072 align = hppa_alignof (TYPE_FIELD_TYPE (type, i));
1073 max_align = max (max_align, align);
1074 }
1075 }
1076 return max_align;
1077 default:
1078 return 4;
1079 }
1080}
1081
c906108c
SS
1082/* For the given instruction (INST), return any adjustment it makes
1083 to the stack pointer or zero for no adjustment.
1084
1085 This only handles instructions commonly found in prologues. */
1086
1087static int
fba45db2 1088prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1089{
1090 /* This must persist across calls. */
1091 static int save_high21;
1092
1093 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1094 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1095 return hppa_extract_14 (inst);
c906108c
SS
1096
1097 /* stwm X,D(sp) */
1098 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1099 return hppa_extract_14 (inst);
c906108c 1100
104c1213
JM
1101 /* std,ma X,D(sp) */
1102 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1103 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1104
c906108c
SS
1105 /* addil high21,%r1; ldo low11,(%r1),%r30)
1106 save high bits in save_high21 for later use. */
1107 if ((inst & 0xffe00000) == 0x28200000)
1108 {
abc485a1 1109 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1110 return 0;
1111 }
1112
1113 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1114 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1115
1116 /* fstws as used by the HP compilers. */
1117 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1118 return hppa_extract_5_load (inst);
c906108c
SS
1119
1120 /* No adjustment. */
1121 return 0;
1122}
1123
1124/* Return nonzero if INST is a branch of some kind, else return zero. */
1125
1126static int
fba45db2 1127is_branch (unsigned long inst)
c906108c
SS
1128{
1129 switch (inst >> 26)
1130 {
1131 case 0x20:
1132 case 0x21:
1133 case 0x22:
1134 case 0x23:
7be570e7 1135 case 0x27:
c906108c
SS
1136 case 0x28:
1137 case 0x29:
1138 case 0x2a:
1139 case 0x2b:
7be570e7 1140 case 0x2f:
c906108c
SS
1141 case 0x30:
1142 case 0x31:
1143 case 0x32:
1144 case 0x33:
1145 case 0x38:
1146 case 0x39:
1147 case 0x3a:
7be570e7 1148 case 0x3b:
c906108c
SS
1149 return 1;
1150
1151 default:
1152 return 0;
1153 }
1154}
1155
1156/* Return the register number for a GR which is saved by INST or
1157 zero it INST does not save a GR. */
1158
1159static int
fba45db2 1160inst_saves_gr (unsigned long inst)
c906108c
SS
1161{
1162 /* Does it look like a stw? */
7be570e7
JM
1163 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1164 || (inst >> 26) == 0x1f
1165 || ((inst >> 26) == 0x1f
1166 && ((inst >> 6) == 0xa)))
abc485a1 1167 return hppa_extract_5R_store (inst);
7be570e7
JM
1168
1169 /* Does it look like a std? */
1170 if ((inst >> 26) == 0x1c
1171 || ((inst >> 26) == 0x03
1172 && ((inst >> 6) & 0xf) == 0xb))
abc485a1 1173 return hppa_extract_5R_store (inst);
c906108c
SS
1174
1175 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
1176 if ((inst >> 26) == 0x1b)
abc485a1 1177 return hppa_extract_5R_store (inst);
c906108c
SS
1178
1179 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1180 too. */
7be570e7
JM
1181 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1182 || ((inst >> 26) == 0x3
1183 && (((inst >> 6) & 0xf) == 0x8
1184 || (inst >> 6) & 0xf) == 0x9))
abc485a1 1185 return hppa_extract_5R_store (inst);
c5aa993b 1186
c906108c
SS
1187 return 0;
1188}
1189
1190/* Return the register number for a FR which is saved by INST or
1191 zero it INST does not save a FR.
1192
1193 Note we only care about full 64bit register stores (that's the only
1194 kind of stores the prologue will use).
1195
1196 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1197
1198static int
fba45db2 1199inst_saves_fr (unsigned long inst)
c906108c 1200{
7be570e7 1201 /* is this an FSTD ? */
c906108c 1202 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1203 return hppa_extract_5r_store (inst);
7be570e7 1204 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1205 return hppa_extract_5R_store (inst);
7be570e7 1206 /* is this an FSTW ? */
c906108c 1207 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1208 return hppa_extract_5r_store (inst);
7be570e7 1209 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1210 return hppa_extract_5R_store (inst);
c906108c
SS
1211 return 0;
1212}
1213
1214/* Advance PC across any function entry prologue instructions
1215 to reach some "real" code.
1216
1217 Use information in the unwind table to determine what exactly should
1218 be in the prologue. */
1219
1220
1221CORE_ADDR
fba45db2 1222skip_prologue_hard_way (CORE_ADDR pc)
c906108c
SS
1223{
1224 char buf[4];
1225 CORE_ADDR orig_pc = pc;
1226 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1227 unsigned long args_stored, status, i, restart_gr, restart_fr;
1228 struct unwind_table_entry *u;
1229
1230 restart_gr = 0;
1231 restart_fr = 0;
1232
1233restart:
1234 u = find_unwind_entry (pc);
1235 if (!u)
1236 return pc;
1237
c5aa993b 1238 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1239 if ((pc & ~0x3) != u->region_start)
1240 return pc;
1241
1242 /* This is how much of a frame adjustment we need to account for. */
1243 stack_remaining = u->Total_frame_size << 3;
1244
1245 /* Magic register saves we want to know about. */
1246 save_rp = u->Save_RP;
1247 save_sp = u->Save_SP;
1248
1249 /* An indication that args may be stored into the stack. Unfortunately
1250 the HPUX compilers tend to set this in cases where no args were
1251 stored too!. */
1252 args_stored = 1;
1253
1254 /* Turn the Entry_GR field into a bitmask. */
1255 save_gr = 0;
1256 for (i = 3; i < u->Entry_GR + 3; i++)
1257 {
1258 /* Frame pointer gets saved into a special location. */
eded0a31 1259 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1260 continue;
1261
1262 save_gr |= (1 << i);
1263 }
1264 save_gr &= ~restart_gr;
1265
1266 /* Turn the Entry_FR field into a bitmask too. */
1267 save_fr = 0;
1268 for (i = 12; i < u->Entry_FR + 12; i++)
1269 save_fr |= (1 << i);
1270 save_fr &= ~restart_fr;
1271
1272 /* Loop until we find everything of interest or hit a branch.
1273
1274 For unoptimized GCC code and for any HP CC code this will never ever
1275 examine any user instructions.
1276
1277 For optimzied GCC code we're faced with problems. GCC will schedule
1278 its prologue and make prologue instructions available for delay slot
1279 filling. The end result is user code gets mixed in with the prologue
1280 and a prologue instruction may be in the delay slot of the first branch
1281 or call.
1282
1283 Some unexpected things are expected with debugging optimized code, so
1284 we allow this routine to walk past user instructions in optimized
1285 GCC code. */
1286 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1287 || args_stored)
1288 {
1289 unsigned int reg_num;
1290 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1291 unsigned long old_save_rp, old_save_sp, next_inst;
1292
1293 /* Save copies of all the triggers so we can compare them later
c5aa993b 1294 (only for HPC). */
c906108c
SS
1295 old_save_gr = save_gr;
1296 old_save_fr = save_fr;
1297 old_save_rp = save_rp;
1298 old_save_sp = save_sp;
1299 old_stack_remaining = stack_remaining;
1300
1301 status = target_read_memory (pc, buf, 4);
1302 inst = extract_unsigned_integer (buf, 4);
c5aa993b 1303
c906108c
SS
1304 /* Yow! */
1305 if (status != 0)
1306 return pc;
1307
1308 /* Note the interesting effects of this instruction. */
1309 stack_remaining -= prologue_inst_adjust_sp (inst);
1310
7be570e7
JM
1311 /* There are limited ways to store the return pointer into the
1312 stack. */
1313 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1)
c906108c
SS
1314 save_rp = 0;
1315
104c1213 1316 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1317 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1318 if ((inst & 0xffffc000) == 0x6fc10000
1319 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1320 save_sp = 0;
1321
6426a772
JM
1322 /* Are we loading some register with an offset from the argument
1323 pointer? */
1324 if ((inst & 0xffe00000) == 0x37a00000
1325 || (inst & 0xffffffe0) == 0x081d0240)
1326 {
1327 pc += 4;
1328 continue;
1329 }
1330
c906108c
SS
1331 /* Account for general and floating-point register saves. */
1332 reg_num = inst_saves_gr (inst);
1333 save_gr &= ~(1 << reg_num);
1334
1335 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1336 Unfortunately args_stored only tells us that some arguments
1337 where stored into the stack. Not how many or what kind!
c906108c 1338
c5aa993b
JM
1339 This is a kludge as on the HP compiler sets this bit and it
1340 never does prologue scheduling. So once we see one, skip past
1341 all of them. We have similar code for the fp arg stores below.
c906108c 1342
c5aa993b
JM
1343 FIXME. Can still die if we have a mix of GR and FR argument
1344 stores! */
6426a772 1345 if (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
c906108c 1346 {
6426a772 1347 while (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
c906108c
SS
1348 {
1349 pc += 4;
1350 status = target_read_memory (pc, buf, 4);
1351 inst = extract_unsigned_integer (buf, 4);
1352 if (status != 0)
1353 return pc;
1354 reg_num = inst_saves_gr (inst);
1355 }
1356 args_stored = 0;
1357 continue;
1358 }
1359
1360 reg_num = inst_saves_fr (inst);
1361 save_fr &= ~(1 << reg_num);
1362
1363 status = target_read_memory (pc + 4, buf, 4);
1364 next_inst = extract_unsigned_integer (buf, 4);
c5aa993b 1365
c906108c
SS
1366 /* Yow! */
1367 if (status != 0)
1368 return pc;
1369
1370 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1371 save. */
c906108c
SS
1372 if ((inst & 0xfc000000) == 0x34000000
1373 && inst_saves_fr (next_inst) >= 4
6426a772 1374 && inst_saves_fr (next_inst) <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c
SS
1375 {
1376 /* So we drop into the code below in a reasonable state. */
1377 reg_num = inst_saves_fr (next_inst);
1378 pc -= 4;
1379 }
1380
1381 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1382 This is a kludge as on the HP compiler sets this bit and it
1383 never does prologue scheduling. So once we see one, skip past
1384 all of them. */
6426a772 1385 if (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c 1386 {
6426a772 1387 while (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c
SS
1388 {
1389 pc += 8;
1390 status = target_read_memory (pc, buf, 4);
1391 inst = extract_unsigned_integer (buf, 4);
1392 if (status != 0)
1393 return pc;
1394 if ((inst & 0xfc000000) != 0x34000000)
1395 break;
1396 status = target_read_memory (pc + 4, buf, 4);
1397 next_inst = extract_unsigned_integer (buf, 4);
1398 if (status != 0)
1399 return pc;
1400 reg_num = inst_saves_fr (next_inst);
1401 }
1402 args_stored = 0;
1403 continue;
1404 }
1405
1406 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1407 instruction is in the delay slot of the first call/branch. */
c906108c
SS
1408 if (is_branch (inst))
1409 break;
1410
1411 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1412 arguments were stored into the stack (boo hiss). This could
1413 cause this code to then skip a bunch of user insns (up to the
1414 first branch).
1415
1416 To combat this we try to identify when args_stored was bogusly
1417 set and clear it. We only do this when args_stored is nonzero,
1418 all other resources are accounted for, and nothing changed on
1419 this pass. */
c906108c 1420 if (args_stored
c5aa993b 1421 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1422 && old_save_gr == save_gr && old_save_fr == save_fr
1423 && old_save_rp == save_rp && old_save_sp == save_sp
1424 && old_stack_remaining == stack_remaining)
1425 break;
c5aa993b 1426
c906108c
SS
1427 /* Bump the PC. */
1428 pc += 4;
1429 }
1430
1431 /* We've got a tenative location for the end of the prologue. However
1432 because of limitations in the unwind descriptor mechanism we may
1433 have went too far into user code looking for the save of a register
1434 that does not exist. So, if there registers we expected to be saved
1435 but never were, mask them out and restart.
1436
1437 This should only happen in optimized code, and should be very rare. */
c5aa993b 1438 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1439 {
1440 pc = orig_pc;
1441 restart_gr = save_gr;
1442 restart_fr = save_fr;
1443 goto restart;
1444 }
1445
1446 return pc;
1447}
1448
1449
7be570e7
JM
1450/* Return the address of the PC after the last prologue instruction if
1451 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1452
1453static CORE_ADDR
fba45db2 1454after_prologue (CORE_ADDR pc)
c906108c
SS
1455{
1456 struct symtab_and_line sal;
1457 CORE_ADDR func_addr, func_end;
1458 struct symbol *f;
1459
7be570e7
JM
1460 /* If we can not find the symbol in the partial symbol table, then
1461 there is no hope we can determine the function's start address
1462 with this code. */
c906108c 1463 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1464 return 0;
c906108c 1465
7be570e7 1466 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1467 sal = find_pc_line (func_addr, 0);
1468
7be570e7
JM
1469 /* There are only two cases to consider. First, the end of the source line
1470 is within the function bounds. In that case we return the end of the
1471 source line. Second is the end of the source line extends beyond the
1472 bounds of the current function. We need to use the slow code to
1473 examine instructions in that case.
c906108c 1474
7be570e7
JM
1475 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1476 the wrong thing to do. In fact, it should be entirely possible for this
1477 function to always return zero since the slow instruction scanning code
1478 is supposed to *always* work. If it does not, then it is a bug. */
1479 if (sal.end < func_end)
1480 return sal.end;
c5aa993b 1481 else
7be570e7 1482 return 0;
c906108c
SS
1483}
1484
1485/* To skip prologues, I use this predicate. Returns either PC itself
1486 if the code at PC does not look like a function prologue; otherwise
1487 returns an address that (if we're lucky) follows the prologue. If
1488 LENIENT, then we must skip everything which is involved in setting
1489 up the frame (it's OK to skip more, just so long as we don't skip
1490 anything which might clobber the registers which are being saved.
1491 Currently we must not skip more on the alpha, but we might the lenient
1492 stuff some day. */
1493
8d153463 1494static CORE_ADDR
fba45db2 1495hppa_skip_prologue (CORE_ADDR pc)
c906108c 1496{
c5aa993b
JM
1497 unsigned long inst;
1498 int offset;
1499 CORE_ADDR post_prologue_pc;
1500 char buf[4];
c906108c 1501
c5aa993b
JM
1502 /* See if we can determine the end of the prologue via the symbol table.
1503 If so, then return either PC, or the PC after the prologue, whichever
1504 is greater. */
c906108c 1505
c5aa993b 1506 post_prologue_pc = after_prologue (pc);
c906108c 1507
7be570e7
JM
1508 /* If after_prologue returned a useful address, then use it. Else
1509 fall back on the instruction skipping code.
1510
1511 Some folks have claimed this causes problems because the breakpoint
1512 may be the first instruction of the prologue. If that happens, then
1513 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1514 if (post_prologue_pc != 0)
1515 return max (pc, post_prologue_pc);
c5aa993b
JM
1516 else
1517 return (skip_prologue_hard_way (pc));
c906108c
SS
1518}
1519
26d08f08
AC
1520struct hppa_frame_cache
1521{
1522 CORE_ADDR base;
1523 struct trad_frame_saved_reg *saved_regs;
1524};
1525
1526static struct hppa_frame_cache *
1527hppa_frame_cache (struct frame_info *next_frame, void **this_cache)
1528{
1529 struct hppa_frame_cache *cache;
1530 long saved_gr_mask;
1531 long saved_fr_mask;
1532 CORE_ADDR this_sp;
1533 long frame_size;
1534 struct unwind_table_entry *u;
9f7194c3 1535 CORE_ADDR prologue_end;
26d08f08
AC
1536 int i;
1537
369aa520
RC
1538 if (hppa_debug)
1539 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
1540 frame_relative_level(next_frame));
1541
26d08f08 1542 if ((*this_cache) != NULL)
369aa520
RC
1543 {
1544 if (hppa_debug)
1545 fprintf_unfiltered (gdb_stdlog, "base=0x%s (cached) }",
1546 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
1547 return (*this_cache);
1548 }
26d08f08
AC
1549 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1550 (*this_cache) = cache;
1551 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1552
1553 /* Yow! */
1554 u = find_unwind_entry (frame_func_unwind (next_frame));
1555 if (!u)
369aa520
RC
1556 {
1557 if (hppa_debug)
1558 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1559 return (*this_cache);
1560 }
26d08f08
AC
1561
1562 /* Turn the Entry_GR field into a bitmask. */
1563 saved_gr_mask = 0;
1564 for (i = 3; i < u->Entry_GR + 3; i++)
1565 {
1566 /* Frame pointer gets saved into a special location. */
eded0a31 1567 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1568 continue;
1569
1570 saved_gr_mask |= (1 << i);
1571 }
1572
1573 /* Turn the Entry_FR field into a bitmask too. */
1574 saved_fr_mask = 0;
1575 for (i = 12; i < u->Entry_FR + 12; i++)
1576 saved_fr_mask |= (1 << i);
1577
1578 /* Loop until we find everything of interest or hit a branch.
1579
1580 For unoptimized GCC code and for any HP CC code this will never ever
1581 examine any user instructions.
1582
1583 For optimized GCC code we're faced with problems. GCC will schedule
1584 its prologue and make prologue instructions available for delay slot
1585 filling. The end result is user code gets mixed in with the prologue
1586 and a prologue instruction may be in the delay slot of the first branch
1587 or call.
1588
1589 Some unexpected things are expected with debugging optimized code, so
1590 we allow this routine to walk past user instructions in optimized
1591 GCC code. */
1592 {
1593 int final_iteration = 0;
9f7194c3 1594 CORE_ADDR pc, end_pc;
26d08f08
AC
1595 int looking_for_sp = u->Save_SP;
1596 int looking_for_rp = u->Save_RP;
1597 int fp_loc = -1;
9f7194c3
RC
1598
1599 /* We have to use hppa_skip_prologue instead of just
1600 skip_prologue_using_sal, in case we stepped into a function without
1601 symbol information. hppa_skip_prologue also bounds the returned
1602 pc by the passed in pc, so it will not return a pc in the next
1603 function. */
1604 prologue_end = hppa_skip_prologue (frame_func_unwind (next_frame));
1605 end_pc = frame_pc_unwind (next_frame);
1606
1607 if (prologue_end != 0 && end_pc > prologue_end)
1608 end_pc = prologue_end;
1609
26d08f08 1610 frame_size = 0;
9f7194c3 1611
26d08f08
AC
1612 for (pc = frame_func_unwind (next_frame);
1613 ((saved_gr_mask || saved_fr_mask
1614 || looking_for_sp || looking_for_rp
1615 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1616 && pc < end_pc);
26d08f08
AC
1617 pc += 4)
1618 {
1619 int reg;
1620 char buf4[4];
1621 long status = target_read_memory (pc, buf4, sizeof buf4);
1622 long inst = extract_unsigned_integer (buf4, sizeof buf4);
9f7194c3 1623
26d08f08
AC
1624 /* Note the interesting effects of this instruction. */
1625 frame_size += prologue_inst_adjust_sp (inst);
1626
1627 /* There are limited ways to store the return pointer into the
1628 stack. */
1629 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1630 {
1631 looking_for_rp = 0;
1632 cache->saved_regs[RP_REGNUM].addr = -20;
1633 }
1634 else if (inst == 0x0fc212c1) /* std rp,-0x10(sr0,sp) */
1635 {
1636 looking_for_rp = 0;
1637 cache->saved_regs[RP_REGNUM].addr = -16;
1638 }
1639
1640 /* Check to see if we saved SP into the stack. This also
1641 happens to indicate the location of the saved frame
1642 pointer. */
1643 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
1644 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
1645 {
1646 looking_for_sp = 0;
eded0a31 1647 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08
AC
1648 }
1649
1650 /* Account for general and floating-point register saves. */
1651 reg = inst_saves_gr (inst);
1652 if (reg >= 3 && reg <= 18
eded0a31 1653 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
1654 {
1655 saved_gr_mask &= ~(1 << reg);
abc485a1 1656 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
1657 /* stwm with a positive displacement is a _post_
1658 _modify_. */
1659 cache->saved_regs[reg].addr = 0;
1660 else if ((inst & 0xfc00000c) == 0x70000008)
1661 /* A std has explicit post_modify forms. */
1662 cache->saved_regs[reg].addr = 0;
1663 else
1664 {
1665 CORE_ADDR offset;
1666
1667 if ((inst >> 26) == 0x1c)
1668 offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
1669 else if ((inst >> 26) == 0x03)
abc485a1 1670 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 1671 else
abc485a1 1672 offset = hppa_extract_14 (inst);
26d08f08
AC
1673
1674 /* Handle code with and without frame pointers. */
1675 if (u->Save_SP)
1676 cache->saved_regs[reg].addr = offset;
1677 else
1678 cache->saved_regs[reg].addr = (u->Total_frame_size << 3) + offset;
1679 }
1680 }
1681
1682 /* GCC handles callee saved FP regs a little differently.
1683
1684 It emits an instruction to put the value of the start of
1685 the FP store area into %r1. It then uses fstds,ma with a
1686 basereg of %r1 for the stores.
1687
1688 HP CC emits them at the current stack pointer modifying the
1689 stack pointer as it stores each register. */
1690
1691 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
1692 if ((inst & 0xffffc000) == 0x34610000
1693 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 1694 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
1695
1696 reg = inst_saves_fr (inst);
1697 if (reg >= 12 && reg <= 21)
1698 {
1699 /* Note +4 braindamage below is necessary because the FP
1700 status registers are internally 8 registers rather than
1701 the expected 4 registers. */
1702 saved_fr_mask &= ~(1 << reg);
1703 if (fp_loc == -1)
1704 {
1705 /* 1st HP CC FP register store. After this
1706 instruction we've set enough state that the GCC and
1707 HPCC code are both handled in the same manner. */
1708 cache->saved_regs[reg + FP4_REGNUM + 4].addr = 0;
1709 fp_loc = 8;
1710 }
1711 else
1712 {
eded0a31 1713 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
1714 fp_loc += 8;
1715 }
1716 }
1717
1718 /* Quit if we hit any kind of branch the previous iteration. */
1719 if (final_iteration)
1720 break;
1721 /* We want to look precisely one instruction beyond the branch
1722 if we have not found everything yet. */
1723 if (is_branch (inst))
1724 final_iteration = 1;
1725 }
1726 }
1727
1728 {
1729 /* The frame base always represents the value of %sp at entry to
1730 the current function (and is thus equivalent to the "saved"
1731 stack pointer. */
eded0a31 1732 CORE_ADDR this_sp = frame_unwind_register_unsigned (next_frame, HPPA_SP_REGNUM);
9f7194c3
RC
1733
1734 if (hppa_debug)
1735 fprintf_unfiltered (gdb_stdlog, " (this_sp=0x%s, pc=0x%s, "
1736 "prologue_end=0x%s) ",
1737 paddr_nz (this_sp),
1738 paddr_nz (frame_pc_unwind (next_frame)),
1739 paddr_nz (prologue_end));
1740
1741 if (frame_pc_unwind (next_frame) >= prologue_end)
1742 {
1743 if (u->Save_SP && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
1744 {
1745 /* Both we're expecting the SP to be saved and the SP has been
1746 saved. The entry SP value is saved at this frame's SP
1747 address. */
1748 cache->base = read_memory_integer (this_sp, TARGET_PTR_BIT / 8);
1749
1750 if (hppa_debug)
1751 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [saved] }",
1752 paddr_nz (cache->base));
1753 }
1754 else
1755 {
1756 /* The prologue has been slowly allocating stack space. Adjust
1757 the SP back. */
1758 cache->base = this_sp - frame_size;
1759 if (hppa_debug)
1760 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [unwind adjust] } ",
1761 paddr_nz (cache->base));
1762
1763 }
1764 }
26d08f08 1765 else
9f7194c3
RC
1766 {
1767 /* This frame has not yet been created. */
1768 cache->base = this_sp;
1769
1770 if (hppa_debug)
1771 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [before prologue] } ",
1772 paddr_nz (cache->base));
1773
1774 }
1775
eded0a31 1776 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
1777 }
1778
412275d5
AC
1779 /* The PC is found in the "return register", "Millicode" uses "r31"
1780 as the return register while normal code uses "rp". */
26d08f08 1781 if (u->Millicode)
9f7194c3
RC
1782 {
1783 if (trad_frame_addr_p (cache->saved_regs, RP_REGNUM))
1784 cache->saved_regs[PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
1785 else
1786 {
1787 ULONGEST r31 = frame_unwind_register_unsigned (next_frame, 31);
1788 trad_frame_set_value (cache->saved_regs, PCOQ_HEAD_REGNUM, r31);
1789 }
1790 }
26d08f08 1791 else
9f7194c3
RC
1792 {
1793 if (trad_frame_addr_p (cache->saved_regs, RP_REGNUM))
1794 cache->saved_regs[PCOQ_HEAD_REGNUM] = cache->saved_regs[RP_REGNUM];
1795 else
1796 {
1797 ULONGEST rp = frame_unwind_register_unsigned (next_frame, RP_REGNUM);
1798 trad_frame_set_value (cache->saved_regs, PCOQ_HEAD_REGNUM, rp);
1799 }
1800 }
26d08f08
AC
1801
1802 {
1803 /* Convert all the offsets into addresses. */
1804 int reg;
1805 for (reg = 0; reg < NUM_REGS; reg++)
1806 {
1807 if (trad_frame_addr_p (cache->saved_regs, reg))
1808 cache->saved_regs[reg].addr += cache->base;
1809 }
1810 }
1811
369aa520
RC
1812 if (hppa_debug)
1813 fprintf_unfiltered (gdb_stdlog, "base=0x%s }",
1814 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
1815 return (*this_cache);
1816}
1817
1818static void
1819hppa_frame_this_id (struct frame_info *next_frame, void **this_cache,
1820 struct frame_id *this_id)
1821{
1822 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
1823 (*this_id) = frame_id_build (info->base, frame_func_unwind (next_frame));
1824}
1825
1826static void
1827hppa_frame_prev_register (struct frame_info *next_frame,
1828 void **this_cache,
1829 int regnum, int *optimizedp,
1830 enum lval_type *lvalp, CORE_ADDR *addrp,
1831 int *realnump, void *valuep)
1832{
1833 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
412275d5
AC
1834 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1835 if (regnum == PCOQ_TAIL_REGNUM)
1836 {
1837 /* The PCOQ TAIL, or NPC, needs to be computed from the unwound
1838 PC register. */
1839 *optimizedp = 0;
1840 *lvalp = not_lval;
1841 *addrp = 0;
1842 *realnump = 0;
1843 if (valuep)
1844 {
1845 int regsize = register_size (gdbarch, PCOQ_HEAD_REGNUM);
1846 CORE_ADDR pc;
1847 int optimized;
1848 enum lval_type lval;
1849 CORE_ADDR addr;
1850 int realnum;
1851 bfd_byte value[MAX_REGISTER_SIZE];
1852 trad_frame_prev_register (next_frame, info->saved_regs,
1853 PCOQ_HEAD_REGNUM, &optimized, &lval, &addr,
1854 &realnum, &value);
1855 pc = extract_unsigned_integer (&value, regsize);
1856 store_unsigned_integer (valuep, regsize, pc + 4);
1857 }
1858 }
1859 else
1860 {
1861 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
1862 optimizedp, lvalp, addrp, realnump, valuep);
1863 }
26d08f08
AC
1864}
1865
1866static const struct frame_unwind hppa_frame_unwind =
1867{
1868 NORMAL_FRAME,
1869 hppa_frame_this_id,
1870 hppa_frame_prev_register
1871};
1872
1873static const struct frame_unwind *
1874hppa_frame_unwind_sniffer (struct frame_info *next_frame)
1875{
1876 return &hppa_frame_unwind;
1877}
1878
1879static CORE_ADDR
1880hppa_frame_base_address (struct frame_info *next_frame,
1881 void **this_cache)
1882{
1883 struct hppa_frame_cache *info = hppa_frame_cache (next_frame,
1884 this_cache);
1885 return info->base;
1886}
1887
1888static const struct frame_base hppa_frame_base = {
1889 &hppa_frame_unwind,
1890 hppa_frame_base_address,
1891 hppa_frame_base_address,
1892 hppa_frame_base_address
1893};
1894
1895static const struct frame_base *
1896hppa_frame_base_sniffer (struct frame_info *next_frame)
1897{
1898 return &hppa_frame_base;
1899}
1900
1901static struct frame_id
1902hppa_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
1903{
1904 return frame_id_build (frame_unwind_register_unsigned (next_frame,
eded0a31 1905 HPPA_SP_REGNUM),
26d08f08
AC
1906 frame_pc_unwind (next_frame));
1907}
1908
1909static CORE_ADDR
1910hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1911{
449e1137 1912 return frame_unwind_register_signed (next_frame, PCOQ_HEAD_REGNUM) & ~3;
26d08f08
AC
1913}
1914
9a043c1d
AC
1915/* Instead of this nasty cast, add a method pvoid() that prints out a
1916 host VOID data type (remember %p isn't portable). */
1917
1918static CORE_ADDR
1919hppa_pointer_to_address_hack (void *ptr)
1920{
1921 gdb_assert (sizeof (ptr) == TYPE_LENGTH (builtin_type_void_data_ptr));
1922 return POINTER_TO_ADDRESS (builtin_type_void_data_ptr, &ptr);
1923}
1924
c906108c 1925static void
fba45db2 1926unwind_command (char *exp, int from_tty)
c906108c
SS
1927{
1928 CORE_ADDR address;
1929 struct unwind_table_entry *u;
1930
1931 /* If we have an expression, evaluate it and use it as the address. */
1932
1933 if (exp != 0 && *exp != 0)
1934 address = parse_and_eval_address (exp);
1935 else
1936 return;
1937
1938 u = find_unwind_entry (address);
1939
1940 if (!u)
1941 {
1942 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
1943 return;
1944 }
1945
ce414844 1946 printf_unfiltered ("unwind_table_entry (0x%s):\n",
9a043c1d 1947 paddr_nz (hppa_pointer_to_address_hack (u)));
c906108c
SS
1948
1949 printf_unfiltered ("\tregion_start = ");
1950 print_address (u->region_start, gdb_stdout);
1951
1952 printf_unfiltered ("\n\tregion_end = ");
1953 print_address (u->region_end, gdb_stdout);
1954
c906108c 1955#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
1956
1957 printf_unfiltered ("\n\tflags =");
1958 pif (Cannot_unwind);
1959 pif (Millicode);
1960 pif (Millicode_save_sr0);
1961 pif (Entry_SR);
1962 pif (Args_stored);
1963 pif (Variable_Frame);
1964 pif (Separate_Package_Body);
1965 pif (Frame_Extension_Millicode);
1966 pif (Stack_Overflow_Check);
1967 pif (Two_Instruction_SP_Increment);
1968 pif (Ada_Region);
1969 pif (Save_SP);
1970 pif (Save_RP);
1971 pif (Save_MRP_in_frame);
1972 pif (extn_ptr_defined);
1973 pif (Cleanup_defined);
1974 pif (MPE_XL_interrupt_marker);
1975 pif (HP_UX_interrupt_marker);
1976 pif (Large_frame);
1977
1978 putchar_unfiltered ('\n');
1979
c906108c 1980#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
1981
1982 pin (Region_description);
1983 pin (Entry_FR);
1984 pin (Entry_GR);
1985 pin (Total_frame_size);
1986}
c906108c 1987
c2c6d25f 1988void
fba45db2 1989hppa_skip_permanent_breakpoint (void)
c2c6d25f
JM
1990{
1991 /* To step over a breakpoint instruction on the PA takes some
1992 fiddling with the instruction address queue.
1993
1994 When we stop at a breakpoint, the IA queue front (the instruction
1995 we're executing now) points at the breakpoint instruction, and
1996 the IA queue back (the next instruction to execute) points to
1997 whatever instruction we would execute after the breakpoint, if it
1998 were an ordinary instruction. This is the case even if the
1999 breakpoint is in the delay slot of a branch instruction.
2000
2001 Clearly, to step past the breakpoint, we need to set the queue
2002 front to the back. But what do we put in the back? What
2003 instruction comes after that one? Because of the branch delay
2004 slot, the next insn is always at the back + 4. */
2005 write_register (PCOQ_HEAD_REGNUM, read_register (PCOQ_TAIL_REGNUM));
2006 write_register (PCSQ_HEAD_REGNUM, read_register (PCSQ_TAIL_REGNUM));
2007
2008 write_register (PCOQ_TAIL_REGNUM, read_register (PCOQ_TAIL_REGNUM) + 4);
2009 /* We can leave the tail's space the same, since there's no jump. */
2010}
2011
d709c020
JB
2012int
2013hppa_pc_requires_run_before_use (CORE_ADDR pc)
2014{
2015 /* Sometimes we may pluck out a minimal symbol that has a negative address.
2016
2017 An example of this occurs when an a.out is linked against a foo.sl.
2018 The foo.sl defines a global bar(), and the a.out declares a signature
2019 for bar(). However, the a.out doesn't directly call bar(), but passes
2020 its address in another call.
2021
2022 If you have this scenario and attempt to "break bar" before running,
2023 gdb will find a minimal symbol for bar() in the a.out. But that
2024 symbol's address will be negative. What this appears to denote is
2025 an index backwards from the base of the procedure linkage table (PLT)
2026 into the data linkage table (DLT), the end of which is contiguous
2027 with the start of the PLT. This is clearly not a valid address for
2028 us to set a breakpoint on.
2029
2030 Note that one must be careful in how one checks for a negative address.
2031 0xc0000000 is a legitimate address of something in a shared text
2032 segment, for example. Since I don't know what the possible range
2033 is of these "really, truly negative" addresses that come from the
2034 minimal symbols, I'm resorting to the gross hack of checking the
2035 top byte of the address for all 1's. Sigh. */
2036
2037 return (!target_has_stack && (pc & 0xFF000000));
2038}
2039
2040int
2041hppa_instruction_nullified (void)
2042{
2043 /* brobecker 2002/11/07: Couldn't we use a ULONGEST here? It would
2044 avoid the type cast. I'm leaving it as is for now as I'm doing
2045 semi-mechanical multiarching-related changes. */
2046 const int ipsw = (int) read_register (IPSW_REGNUM);
2047 const int flags = (int) read_register (FLAGS_REGNUM);
2048
2049 return ((ipsw & 0x00200000) && !(flags & 0x2));
2050}
2051
d709c020
JB
2052/* Return the GDB type object for the "standard" data type of data
2053 in register N. */
2054
eded0a31
AC
2055static struct type *
2056hppa32_register_type (struct gdbarch *gdbarch, int reg_nr)
d709c020
JB
2057{
2058 if (reg_nr < FP4_REGNUM)
eded0a31 2059 return builtin_type_uint32;
d709c020 2060 else
eded0a31 2061 return builtin_type_ieee_single_big;
d709c020
JB
2062}
2063
3ff7cf9e
JB
2064/* Return the GDB type object for the "standard" data type of data
2065 in register N. hppa64 version. */
2066
eded0a31
AC
2067static struct type *
2068hppa64_register_type (struct gdbarch *gdbarch, int reg_nr)
3ff7cf9e
JB
2069{
2070 if (reg_nr < FP4_REGNUM)
eded0a31 2071 return builtin_type_uint64;
3ff7cf9e 2072 else
eded0a31 2073 return builtin_type_ieee_double_big;
3ff7cf9e
JB
2074}
2075
d709c020
JB
2076/* Return True if REGNUM is not a register available to the user
2077 through ptrace(). */
2078
8d153463 2079static int
d709c020
JB
2080hppa_cannot_store_register (int regnum)
2081{
2082 return (regnum == 0
2083 || regnum == PCSQ_HEAD_REGNUM
2084 || (regnum >= PCSQ_TAIL_REGNUM && regnum < IPSW_REGNUM)
2085 || (regnum > IPSW_REGNUM && regnum < FP4_REGNUM));
2086
2087}
2088
8d153463 2089static CORE_ADDR
d709c020
JB
2090hppa_smash_text_address (CORE_ADDR addr)
2091{
2092 /* The low two bits of the PC on the PA contain the privilege level.
2093 Some genius implementing a (non-GCC) compiler apparently decided
2094 this means that "addresses" in a text section therefore include a
2095 privilege level, and thus symbol tables should contain these bits.
2096 This seems like a bonehead thing to do--anyway, it seems to work
2097 for our purposes to just ignore those bits. */
2098
2099 return (addr &= ~0x3);
2100}
2101
143985b7
AF
2102/* Get the ith function argument for the current function. */
2103CORE_ADDR
2104hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2105 struct type *type)
2106{
2107 CORE_ADDR addr;
7f5f525d 2108 get_frame_register (frame, R0_REGNUM + 26 - argi, &addr);
143985b7
AF
2109 return addr;
2110}
2111
0f8d9d59
RC
2112static void
2113hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
2114 int regnum, void *buf)
2115{
2116 ULONGEST tmp;
2117
2118 regcache_raw_read_unsigned (regcache, regnum, &tmp);
2119 if (regnum == PCOQ_HEAD_REGNUM || regnum == PCOQ_TAIL_REGNUM)
2120 tmp &= ~0x3;
2121 store_unsigned_integer (buf, sizeof(tmp), tmp);
2122}
2123
8e8b2dba
MC
2124/* Here is a table of C type sizes on hppa with various compiles
2125 and options. I measured this on PA 9000/800 with HP-UX 11.11
2126 and these compilers:
2127
2128 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2129 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2130 /opt/aCC/bin/aCC B3910B A.03.45
2131 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2132
2133 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2134 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2135 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2136 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2137 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2138 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2139 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2140 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2141
2142 Each line is:
2143
2144 compiler and options
2145 char, short, int, long, long long
2146 float, double, long double
2147 char *, void (*)()
2148
2149 So all these compilers use either ILP32 or LP64 model.
2150 TODO: gcc has more options so it needs more investigation.
2151
a2379359
MC
2152 For floating point types, see:
2153
2154 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2155 HP-UX floating-point guide, hpux 11.00
2156
8e8b2dba
MC
2157 -- chastain 2003-12-18 */
2158
e6e68f1f
JB
2159static struct gdbarch *
2160hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2161{
3ff7cf9e 2162 struct gdbarch_tdep *tdep;
e6e68f1f 2163 struct gdbarch *gdbarch;
59623e27
JB
2164
2165 /* Try to determine the ABI of the object we are loading. */
4be87837 2166 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 2167 {
4be87837
DJ
2168 /* If it's a SOM file, assume it's HP/UX SOM. */
2169 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
2170 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 2171 }
e6e68f1f
JB
2172
2173 /* find a candidate among the list of pre-declared architectures. */
2174 arches = gdbarch_list_lookup_by_info (arches, &info);
2175 if (arches != NULL)
2176 return (arches->gdbarch);
2177
2178 /* If none found, then allocate and initialize one. */
fdd72f95 2179 tdep = XZALLOC (struct gdbarch_tdep);
3ff7cf9e
JB
2180 gdbarch = gdbarch_alloc (&info, tdep);
2181
2182 /* Determine from the bfd_arch_info structure if we are dealing with
2183 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
2184 then default to a 32bit machine. */
2185 if (info.bfd_arch_info != NULL)
2186 tdep->bytes_per_address =
2187 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
2188 else
2189 tdep->bytes_per_address = 4;
2190
2191 /* Some parts of the gdbarch vector depend on whether we are running
2192 on a 32 bits or 64 bits target. */
2193 switch (tdep->bytes_per_address)
2194 {
2195 case 4:
2196 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
2197 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 2198 set_gdbarch_register_type (gdbarch, hppa32_register_type);
3ff7cf9e
JB
2199 break;
2200 case 8:
2201 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
2202 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 2203 set_gdbarch_register_type (gdbarch, hppa64_register_type);
3ff7cf9e
JB
2204 break;
2205 default:
2206 internal_error (__FILE__, __LINE__, "Unsupported address size: %d",
2207 tdep->bytes_per_address);
2208 }
2209
3ff7cf9e 2210 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 2211 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 2212
8e8b2dba
MC
2213 /* The following gdbarch vector elements are the same in both ILP32
2214 and LP64, but might show differences some day. */
2215 set_gdbarch_long_long_bit (gdbarch, 64);
2216 set_gdbarch_long_double_bit (gdbarch, 128);
a2379359 2217 set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big);
8e8b2dba 2218
3ff7cf9e
JB
2219 /* The following gdbarch vector elements do not depend on the address
2220 size, or in any other gdbarch element previously set. */
60383d10 2221 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
a2a84a72 2222 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
2223 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
2224 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
60383d10 2225 set_gdbarch_cannot_store_register (gdbarch, hppa_cannot_store_register);
b6fbdd1d 2226 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
2227 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
2228 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2229 set_gdbarch_read_pc (gdbarch, hppa_target_read_pc);
2230 set_gdbarch_write_pc (gdbarch, hppa_target_write_pc);
60383d10 2231
143985b7
AF
2232 /* Helper for function argument information. */
2233 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
2234
36482093
AC
2235 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
2236
3a3bc038
AC
2237 /* When a hardware watchpoint triggers, we'll move the inferior past
2238 it by removing all eventpoints; stepping past the instruction
2239 that caused the trigger; reinserting eventpoints; and checking
2240 whether any watched location changed. */
2241 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
2242
5979bc46 2243 /* Inferior function call methods. */
fca7aa43 2244 switch (tdep->bytes_per_address)
5979bc46 2245 {
fca7aa43
AC
2246 case 4:
2247 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
2248 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
2249 break;
2250 case 8:
782eae8b
AC
2251 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
2252 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 2253 break;
782eae8b
AC
2254 default:
2255 internal_error (__FILE__, __LINE__, "bad switch");
fad850b2
AC
2256 }
2257
2258 /* Struct return methods. */
fca7aa43 2259 switch (tdep->bytes_per_address)
fad850b2 2260 {
fca7aa43
AC
2261 case 4:
2262 set_gdbarch_return_value (gdbarch, hppa32_return_value);
2263 break;
2264 case 8:
782eae8b 2265 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 2266 break;
fca7aa43
AC
2267 default:
2268 internal_error (__FILE__, __LINE__, "bad switch");
e963316f 2269 }
85f4f2d8
AC
2270
2271 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
2272
5979bc46 2273 /* Frame unwind methods. */
782eae8b
AC
2274 set_gdbarch_unwind_dummy_id (gdbarch, hppa_unwind_dummy_id);
2275 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
2276 frame_unwind_append_sniffer (gdbarch, hppa_frame_unwind_sniffer);
2277 frame_base_append_sniffer (gdbarch, hppa_frame_base_sniffer);
5979bc46 2278
0f8d9d59
RC
2279 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
2280
752d4ac1
JB
2281 /* Hook in ABI-specific overrides, if they have been registered. */
2282 gdbarch_init_osabi (info, gdbarch);
2283
e6e68f1f
JB
2284 return gdbarch;
2285}
2286
2287static void
2288hppa_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
2289{
fdd72f95
RC
2290 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
2291
2292 fprintf_unfiltered (file, "bytes_per_address = %d\n",
2293 tdep->bytes_per_address);
2294 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
2295}
2296
4facf7e8
JB
2297void
2298_initialize_hppa_tdep (void)
2299{
2300 struct cmd_list_element *c;
2301 void break_at_finish_command (char *arg, int from_tty);
2302 void tbreak_at_finish_command (char *arg, int from_tty);
2303 void break_at_finish_at_depth_command (char *arg, int from_tty);
2304
e6e68f1f 2305 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 2306
7c46b9fb
RC
2307 hppa_objfile_priv_data = register_objfile_data ();
2308
4facf7e8
JB
2309 add_cmd ("unwind", class_maintenance, unwind_command,
2310 "Print unwind table entry at given address.",
2311 &maintenanceprintlist);
2312
2313 deprecate_cmd (add_com ("xbreak", class_breakpoint,
2314 break_at_finish_command,
2315 concat ("Set breakpoint at procedure exit. \n\
2316Argument may be function name, or \"*\" and an address.\n\
2317If function is specified, break at end of code for that function.\n\
2318If an address is specified, break at the end of the function that contains \n\
2319that exact address.\n",
2320 "With no arg, uses current execution address of selected stack frame.\n\
2321This is useful for breaking on return to a stack frame.\n\
2322\n\
2323Multiple breakpoints at one place are permitted, and useful if conditional.\n\
2324\n\
2325Do \"help breakpoints\" for info on other commands dealing with breakpoints.", NULL)), NULL);
2326 deprecate_cmd (add_com_alias ("xb", "xbreak", class_breakpoint, 1), NULL);
2327 deprecate_cmd (add_com_alias ("xbr", "xbreak", class_breakpoint, 1), NULL);
2328 deprecate_cmd (add_com_alias ("xbre", "xbreak", class_breakpoint, 1), NULL);
2329 deprecate_cmd (add_com_alias ("xbrea", "xbreak", class_breakpoint, 1), NULL);
2330
2331 deprecate_cmd (c = add_com ("txbreak", class_breakpoint,
2332 tbreak_at_finish_command,
2333"Set temporary breakpoint at procedure exit. Either there should\n\
2334be no argument or the argument must be a depth.\n"), NULL);
2335 set_cmd_completer (c, location_completer);
2336
2337 if (xdb_commands)
2338 deprecate_cmd (add_com ("bx", class_breakpoint,
2339 break_at_finish_at_depth_command,
2340"Set breakpoint at procedure exit. Either there should\n\
2341be no argument or the argument must be a depth.\n"), NULL);
369aa520
RC
2342
2343 /* Debug this files internals. */
2344 add_show_from_set (add_set_cmd ("hppa", class_maintenance, var_zinteger,
2345 &hppa_debug, "Set hppa debugging.\n\
2346When non-zero, hppa specific debugging is enabled.", &setdebuglist), &showdebuglist);
4facf7e8
JB
2347}
2348
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