* gdbtypes.c (lookup_array_range_type): Expand parameters
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
0b302171
JB
3 Copyright (C) 1986-1987, 1989-1996, 1998-2005, 2007-2012 Free
4 Software Foundation, Inc.
c906108c
SS
5
6 Contributed by the Center for Software Science at the
7 University of Utah (pa-gdb-bugs@cs.utah.edu).
8
c5aa993b 9 This file is part of GDB.
c906108c 10
c5aa993b
JM
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
a9762ec7 13 the Free Software Foundation; either version 3 of the License, or
c5aa993b 14 (at your option) any later version.
c906108c 15
c5aa993b
JM
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
c906108c 20
c5aa993b 21 You should have received a copy of the GNU General Public License
a9762ec7 22 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
23
24#include "defs.h"
c906108c
SS
25#include "bfd.h"
26#include "inferior.h"
4e052eda 27#include "regcache.h"
e5d66720 28#include "completer.h"
59623e27 29#include "osabi.h"
a7ff40e7 30#include "gdb_assert.h"
343af405 31#include "arch-utils.h"
1777feb0 32/* For argument passing to the inferior. */
c906108c 33#include "symtab.h"
fde2cceb 34#include "dis-asm.h"
26d08f08
AC
35#include "trad-frame.h"
36#include "frame-unwind.h"
37#include "frame-base.h"
c906108c 38
c906108c
SS
39#include "gdbcore.h"
40#include "gdbcmd.h"
e6bb342a 41#include "gdbtypes.h"
c906108c 42#include "objfiles.h"
3ff7cf9e 43#include "hppa-tdep.h"
c906108c 44
369aa520
RC
45static int hppa_debug = 0;
46
60383d10 47/* Some local constants. */
3ff7cf9e
JB
48static const int hppa32_num_regs = 128;
49static const int hppa64_num_regs = 96;
50
7c46b9fb
RC
51/* hppa-specific object data -- unwind and solib info.
52 TODO/maybe: think about splitting this into two parts; the unwind data is
53 common to all hppa targets, but is only used in this file; we can register
54 that separately and make this static. The solib data is probably hpux-
55 specific, so we can create a separate extern objfile_data that is registered
56 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
57const struct objfile_data *hppa_objfile_priv_data = NULL;
58
1777feb0 59/* Get at various relevent fields of an instruction word. */
e2ac8128
JB
60#define MASK_5 0x1f
61#define MASK_11 0x7ff
62#define MASK_14 0x3fff
63#define MASK_21 0x1fffff
64
e2ac8128
JB
65/* Sizes (in bytes) of the native unwind entries. */
66#define UNWIND_ENTRY_SIZE 16
67#define STUB_UNWIND_ENTRY_SIZE 8
68
c906108c 69/* Routines to extract various sized constants out of hppa
1777feb0 70 instructions. */
c906108c
SS
71
72/* This assumes that no garbage lies outside of the lower bits of
1777feb0 73 value. */
c906108c 74
63807e1d 75static int
abc485a1 76hppa_sign_extend (unsigned val, unsigned bits)
c906108c 77{
c5aa993b 78 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
79}
80
1777feb0 81/* For many immediate values the sign bit is the low bit! */
c906108c 82
63807e1d 83static int
abc485a1 84hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 85{
c5aa993b 86 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
87}
88
e2ac8128 89/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 90 (MSB = 0). */
e2ac8128 91
abc485a1
RC
92int
93hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
94{
95 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
96}
97
1777feb0 98/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 99
abc485a1
RC
100int
101hppa_extract_5_load (unsigned word)
c906108c 102{
abc485a1 103 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
104}
105
1777feb0 106/* Extract the immediate field from a break instruction. */
c906108c 107
abc485a1
RC
108unsigned
109hppa_extract_5r_store (unsigned word)
c906108c
SS
110{
111 return (word & MASK_5);
112}
113
1777feb0 114/* Extract the immediate field from a {sr}sm instruction. */
c906108c 115
abc485a1
RC
116unsigned
117hppa_extract_5R_store (unsigned word)
c906108c
SS
118{
119 return (word >> 16 & MASK_5);
120}
121
1777feb0 122/* Extract a 14 bit immediate field. */
c906108c 123
abc485a1
RC
124int
125hppa_extract_14 (unsigned word)
c906108c 126{
abc485a1 127 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
128}
129
1777feb0 130/* Extract a 21 bit constant. */
c906108c 131
abc485a1
RC
132int
133hppa_extract_21 (unsigned word)
c906108c
SS
134{
135 int val;
136
137 word &= MASK_21;
138 word <<= 11;
abc485a1 139 val = hppa_get_field (word, 20, 20);
c906108c 140 val <<= 11;
abc485a1 141 val |= hppa_get_field (word, 9, 19);
c906108c 142 val <<= 2;
abc485a1 143 val |= hppa_get_field (word, 5, 6);
c906108c 144 val <<= 5;
abc485a1 145 val |= hppa_get_field (word, 0, 4);
c906108c 146 val <<= 2;
abc485a1
RC
147 val |= hppa_get_field (word, 7, 8);
148 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
149}
150
c906108c 151/* extract a 17 bit constant from branch instructions, returning the
1777feb0 152 19 bit signed value. */
c906108c 153
abc485a1
RC
154int
155hppa_extract_17 (unsigned word)
c906108c 156{
abc485a1
RC
157 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
158 hppa_get_field (word, 29, 29) << 10 |
159 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
160 (word & 0x1) << 16, 17) << 2;
161}
3388d7ff
RC
162
163CORE_ADDR
164hppa_symbol_address(const char *sym)
165{
166 struct minimal_symbol *minsym;
167
168 minsym = lookup_minimal_symbol (sym, NULL, NULL);
169 if (minsym)
170 return SYMBOL_VALUE_ADDRESS (minsym);
171 else
172 return (CORE_ADDR)-1;
173}
77d18ded
RC
174
175struct hppa_objfile_private *
176hppa_init_objfile_priv_data (struct objfile *objfile)
177{
178 struct hppa_objfile_private *priv;
179
180 priv = (struct hppa_objfile_private *)
181 obstack_alloc (&objfile->objfile_obstack,
182 sizeof (struct hppa_objfile_private));
183 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
184 memset (priv, 0, sizeof (*priv));
185
186 return priv;
187}
c906108c
SS
188\f
189
190/* Compare the start address for two unwind entries returning 1 if
191 the first address is larger than the second, -1 if the second is
192 larger than the first, and zero if they are equal. */
193
194static int
fba45db2 195compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
196{
197 const struct unwind_table_entry *a = arg1;
198 const struct unwind_table_entry *b = arg2;
199
200 if (a->region_start > b->region_start)
201 return 1;
202 else if (a->region_start < b->region_start)
203 return -1;
204 else
205 return 0;
206}
207
53a5351d 208static void
fdd72f95 209record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 210{
fdd72f95 211 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 212 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
213 {
214 bfd_vma value = section->vma - section->filepos;
215 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
216
217 if (value < *low_text_segment_address)
218 *low_text_segment_address = value;
219 }
53a5351d
JM
220}
221
c906108c 222static void
fba45db2 223internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0
MS
224 asection *section, unsigned int entries,
225 unsigned int size, CORE_ADDR text_offset)
c906108c
SS
226{
227 /* We will read the unwind entries into temporary memory, then
228 fill in the actual unwind table. */
fdd72f95 229
c906108c
SS
230 if (size > 0)
231 {
5db8bbe5 232 struct gdbarch *gdbarch = get_objfile_arch (objfile);
c906108c
SS
233 unsigned long tmp;
234 unsigned i;
235 char *buf = alloca (size);
fdd72f95 236 CORE_ADDR low_text_segment_address;
c906108c 237
fdd72f95 238 /* For ELF targets, then unwinds are supposed to
1777feb0 239 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
240
241 Note that when loading a shared library (text_offset != 0) the
242 unwinds are already relative to the text_offset that will be
243 passed in. */
5db8bbe5 244 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 245 {
fdd72f95
RC
246 low_text_segment_address = -1;
247
53a5351d 248 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
249 record_text_segment_lowaddr,
250 &low_text_segment_address);
53a5351d 251
fdd72f95 252 text_offset = low_text_segment_address;
53a5351d 253 }
5db8bbe5 254 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
acf86d54 255 {
5db8bbe5 256 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 257 }
53a5351d 258
c906108c
SS
259 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
260
261 /* Now internalize the information being careful to handle host/target
c5aa993b 262 endian issues. */
c906108c
SS
263 for (i = 0; i < entries; i++)
264 {
265 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 266 (bfd_byte *) buf);
c906108c
SS
267 table[i].region_start += text_offset;
268 buf += 4;
c5aa993b 269 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
270 table[i].region_end += text_offset;
271 buf += 4;
c5aa993b 272 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
273 buf += 4;
274 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
275 table[i].Millicode = (tmp >> 30) & 0x1;
276 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
277 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 278 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
279 table[i].Entry_SR = (tmp >> 25) & 0x1;
280 table[i].Entry_FR = (tmp >> 21) & 0xf;
281 table[i].Entry_GR = (tmp >> 16) & 0x1f;
282 table[i].Args_stored = (tmp >> 15) & 0x1;
283 table[i].Variable_Frame = (tmp >> 14) & 0x1;
284 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
285 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
286 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
287 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 288 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
289 table[i].cxx_info = (tmp >> 8) & 0x1;
290 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
291 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 292 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
293 table[i].Save_SP = (tmp >> 4) & 0x1;
294 table[i].Save_RP = (tmp >> 3) & 0x1;
295 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 296 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 297 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 298 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
299 buf += 4;
300 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
301 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
302 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
303 table[i].alloca_frame = (tmp >> 28) & 0x1;
304 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
305 table[i].Total_frame_size = tmp & 0x7ffffff;
306
1777feb0 307 /* Stub unwinds are handled elsewhere. */
c906108c
SS
308 table[i].stub_unwind.stub_type = 0;
309 table[i].stub_unwind.padding = 0;
310 }
311 }
312}
313
314/* Read in the backtrace information stored in the `$UNWIND_START$' section of
315 the object file. This info is used mainly by find_unwind_entry() to find
316 out the stack frame size and frame pointer used by procedures. We put
317 everything on the psymbol obstack in the objfile so that it automatically
318 gets freed when the objfile is destroyed. */
319
320static void
fba45db2 321read_unwind_info (struct objfile *objfile)
c906108c 322{
d4f3574e
SS
323 asection *unwind_sec, *stub_unwind_sec;
324 unsigned unwind_size, stub_unwind_size, total_size;
325 unsigned index, unwind_entries;
c906108c
SS
326 unsigned stub_entries, total_entries;
327 CORE_ADDR text_offset;
7c46b9fb
RC
328 struct hppa_unwind_info *ui;
329 struct hppa_objfile_private *obj_private;
c906108c
SS
330
331 text_offset = ANOFFSET (objfile->section_offsets, 0);
7c46b9fb
RC
332 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
333 sizeof (struct hppa_unwind_info));
c906108c
SS
334
335 ui->table = NULL;
336 ui->cache = NULL;
337 ui->last = -1;
338
d4f3574e
SS
339 /* For reasons unknown the HP PA64 tools generate multiple unwinder
340 sections in a single executable. So we just iterate over every
341 section in the BFD looking for unwinder sections intead of trying
1777feb0 342 to do a lookup with bfd_get_section_by_name.
c906108c 343
d4f3574e
SS
344 First determine the total size of the unwind tables so that we
345 can allocate memory in a nice big hunk. */
346 total_entries = 0;
347 for (unwind_sec = objfile->obfd->sections;
348 unwind_sec;
349 unwind_sec = unwind_sec->next)
c906108c 350 {
d4f3574e
SS
351 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
352 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
353 {
354 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
355 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 356
d4f3574e
SS
357 total_entries += unwind_entries;
358 }
c906108c
SS
359 }
360
d4f3574e 361 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 362 use stub unwinds at the current time. */
d4f3574e
SS
363 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
364
c906108c
SS
365 if (stub_unwind_sec)
366 {
367 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
368 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
369 }
370 else
371 {
372 stub_unwind_size = 0;
373 stub_entries = 0;
374 }
375
376 /* Compute total number of unwind entries and their total size. */
d4f3574e 377 total_entries += stub_entries;
c906108c
SS
378 total_size = total_entries * sizeof (struct unwind_table_entry);
379
380 /* Allocate memory for the unwind table. */
381 ui->table = (struct unwind_table_entry *)
8b92e4d5 382 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 383 ui->last = total_entries - 1;
c906108c 384
d4f3574e
SS
385 /* Now read in each unwind section and internalize the standard unwind
386 entries. */
c906108c 387 index = 0;
d4f3574e
SS
388 for (unwind_sec = objfile->obfd->sections;
389 unwind_sec;
390 unwind_sec = unwind_sec->next)
391 {
392 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
393 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
394 {
395 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
396 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
397
398 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
399 unwind_entries, unwind_size, text_offset);
400 index += unwind_entries;
401 }
402 }
403
404 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
405 if (stub_unwind_size > 0)
406 {
407 unsigned int i;
408 char *buf = alloca (stub_unwind_size);
409
410 /* Read in the stub unwind entries. */
411 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
412 0, stub_unwind_size);
413
414 /* Now convert them into regular unwind entries. */
415 for (i = 0; i < stub_entries; i++, index++)
416 {
417 /* Clear out the next unwind entry. */
418 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
419
1777feb0 420 /* Convert offset & size into region_start and region_end.
c906108c
SS
421 Stuff away the stub type into "reserved" fields. */
422 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
423 (bfd_byte *) buf);
424 ui->table[index].region_start += text_offset;
425 buf += 4;
426 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 427 (bfd_byte *) buf);
c906108c
SS
428 buf += 2;
429 ui->table[index].region_end
c5aa993b
JM
430 = ui->table[index].region_start + 4 *
431 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
432 buf += 2;
433 }
434
435 }
436
437 /* Unwind table needs to be kept sorted. */
438 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
439 compare_unwind_entries);
440
441 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
442 obj_private = (struct hppa_objfile_private *)
443 objfile_data (objfile, hppa_objfile_priv_data);
444 if (obj_private == NULL)
77d18ded
RC
445 obj_private = hppa_init_objfile_priv_data (objfile);
446
c906108c
SS
447 obj_private->unwind_info = ui;
448}
449
450/* Lookup the unwind (stack backtrace) info for the given PC. We search all
451 of the objfiles seeking the unwind table entry for this PC. Each objfile
452 contains a sorted list of struct unwind_table_entry. Since we do a binary
453 search of the unwind tables, we depend upon them to be sorted. */
454
455struct unwind_table_entry *
fba45db2 456find_unwind_entry (CORE_ADDR pc)
c906108c
SS
457{
458 int first, middle, last;
459 struct objfile *objfile;
7c46b9fb 460 struct hppa_objfile_private *priv;
c906108c 461
369aa520 462 if (hppa_debug)
5af949e3
UW
463 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
464 hex_string (pc));
369aa520 465
1777feb0 466 /* A function at address 0? Not in HP-UX! */
c906108c 467 if (pc == (CORE_ADDR) 0)
369aa520
RC
468 {
469 if (hppa_debug)
470 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
471 return NULL;
472 }
c906108c
SS
473
474 ALL_OBJFILES (objfile)
c5aa993b 475 {
7c46b9fb 476 struct hppa_unwind_info *ui;
c5aa993b 477 ui = NULL;
7c46b9fb
RC
478 priv = objfile_data (objfile, hppa_objfile_priv_data);
479 if (priv)
480 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 481
c5aa993b
JM
482 if (!ui)
483 {
484 read_unwind_info (objfile);
7c46b9fb
RC
485 priv = objfile_data (objfile, hppa_objfile_priv_data);
486 if (priv == NULL)
8a3fe4f8 487 error (_("Internal error reading unwind information."));
7c46b9fb 488 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 489 }
c906108c 490
1777feb0 491 /* First, check the cache. */
c906108c 492
c5aa993b
JM
493 if (ui->cache
494 && pc >= ui->cache->region_start
495 && pc <= ui->cache->region_end)
369aa520
RC
496 {
497 if (hppa_debug)
5af949e3
UW
498 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
499 hex_string ((uintptr_t) ui->cache));
369aa520
RC
500 return ui->cache;
501 }
c906108c 502
1777feb0 503 /* Not in the cache, do a binary search. */
c906108c 504
c5aa993b
JM
505 first = 0;
506 last = ui->last;
c906108c 507
c5aa993b
JM
508 while (first <= last)
509 {
510 middle = (first + last) / 2;
511 if (pc >= ui->table[middle].region_start
512 && pc <= ui->table[middle].region_end)
513 {
514 ui->cache = &ui->table[middle];
369aa520 515 if (hppa_debug)
5af949e3
UW
516 fprintf_unfiltered (gdb_stdlog, "%s }\n",
517 hex_string ((uintptr_t) ui->cache));
c5aa993b
JM
518 return &ui->table[middle];
519 }
c906108c 520
c5aa993b
JM
521 if (pc < ui->table[middle].region_start)
522 last = middle - 1;
523 else
524 first = middle + 1;
525 }
526 } /* ALL_OBJFILES() */
369aa520
RC
527
528 if (hppa_debug)
529 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
530
c906108c
SS
531 return NULL;
532}
533
1fb24930 534/* The epilogue is defined here as the area either on the `bv' instruction
1777feb0 535 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
536
537 We do not assume that the epilogue is at the end of a function as we can
538 also have return sequences in the middle of a function. */
539static int
540hppa_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
541{
e17a4113 542 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
543 unsigned long status;
544 unsigned int inst;
545 char buf[4];
1fb24930 546
8defab1a 547 status = target_read_memory (pc, buf, 4);
1fb24930
RC
548 if (status != 0)
549 return 0;
550
e17a4113 551 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
552
553 /* The most common way to perform a stack adjustment ldo X(sp),sp
554 We are destroying a stack frame if the offset is negative. */
555 if ((inst & 0xffffc000) == 0x37de0000
556 && hppa_extract_14 (inst) < 0)
557 return 1;
558
559 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
560 if (((inst & 0x0fc010e0) == 0x0fc010e0
561 || (inst & 0x0fc010e0) == 0x0fc010e0)
562 && hppa_extract_14 (inst) < 0)
563 return 1;
564
565 /* bv %r0(%rp) or bv,n %r0(%rp) */
566 if (inst == 0xe840c000 || inst == 0xe840c002)
567 return 1;
568
569 return 0;
570}
571
85f4f2d8 572static const unsigned char *
67d57894 573hppa_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
aaab4dba 574{
56132691 575 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
576 (*len) = sizeof (breakpoint);
577 return breakpoint;
578}
579
e23457df
AC
580/* Return the name of a register. */
581
4a302917 582static const char *
d93859e2 583hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
584{
585 static char *names[] = {
586 "flags", "r1", "rp", "r3",
587 "r4", "r5", "r6", "r7",
588 "r8", "r9", "r10", "r11",
589 "r12", "r13", "r14", "r15",
590 "r16", "r17", "r18", "r19",
591 "r20", "r21", "r22", "r23",
592 "r24", "r25", "r26", "dp",
593 "ret0", "ret1", "sp", "r31",
594 "sar", "pcoqh", "pcsqh", "pcoqt",
595 "pcsqt", "eiem", "iir", "isr",
596 "ior", "ipsw", "goto", "sr4",
597 "sr0", "sr1", "sr2", "sr3",
598 "sr5", "sr6", "sr7", "cr0",
599 "cr8", "cr9", "ccr", "cr12",
600 "cr13", "cr24", "cr25", "cr26",
601 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
602 "fpsr", "fpe1", "fpe2", "fpe3",
603 "fpe4", "fpe5", "fpe6", "fpe7",
604 "fr4", "fr4R", "fr5", "fr5R",
605 "fr6", "fr6R", "fr7", "fr7R",
606 "fr8", "fr8R", "fr9", "fr9R",
607 "fr10", "fr10R", "fr11", "fr11R",
608 "fr12", "fr12R", "fr13", "fr13R",
609 "fr14", "fr14R", "fr15", "fr15R",
610 "fr16", "fr16R", "fr17", "fr17R",
611 "fr18", "fr18R", "fr19", "fr19R",
612 "fr20", "fr20R", "fr21", "fr21R",
613 "fr22", "fr22R", "fr23", "fr23R",
614 "fr24", "fr24R", "fr25", "fr25R",
615 "fr26", "fr26R", "fr27", "fr27R",
616 "fr28", "fr28R", "fr29", "fr29R",
617 "fr30", "fr30R", "fr31", "fr31R"
618 };
619 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
620 return NULL;
621 else
622 return names[i];
623}
624
4a302917 625static const char *
d93859e2 626hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df
AC
627{
628 static char *names[] = {
629 "flags", "r1", "rp", "r3",
630 "r4", "r5", "r6", "r7",
631 "r8", "r9", "r10", "r11",
632 "r12", "r13", "r14", "r15",
633 "r16", "r17", "r18", "r19",
634 "r20", "r21", "r22", "r23",
635 "r24", "r25", "r26", "dp",
636 "ret0", "ret1", "sp", "r31",
637 "sar", "pcoqh", "pcsqh", "pcoqt",
638 "pcsqt", "eiem", "iir", "isr",
639 "ior", "ipsw", "goto", "sr4",
640 "sr0", "sr1", "sr2", "sr3",
641 "sr5", "sr6", "sr7", "cr0",
642 "cr8", "cr9", "ccr", "cr12",
643 "cr13", "cr24", "cr25", "cr26",
644 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
645 "fpsr", "fpe1", "fpe2", "fpe3",
646 "fr4", "fr5", "fr6", "fr7",
647 "fr8", "fr9", "fr10", "fr11",
648 "fr12", "fr13", "fr14", "fr15",
649 "fr16", "fr17", "fr18", "fr19",
650 "fr20", "fr21", "fr22", "fr23",
651 "fr24", "fr25", "fr26", "fr27",
652 "fr28", "fr29", "fr30", "fr31"
653 };
654 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
655 return NULL;
656 else
657 return names[i];
658}
659
85c83e99 660/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 661static int
d3f73121 662hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 663{
85c83e99 664 /* The general registers and the sar are the same in both sets. */
1ef7fcb5
RC
665 if (reg <= 32)
666 return reg;
667
668 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 669 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
670 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
671
85c83e99 672 warning (_("Unmapped DWARF DBX Register #%d encountered."), reg);
1ef7fcb5
RC
673 return -1;
674}
675
79508e1e
AC
676/* This function pushes a stack frame with arguments as part of the
677 inferior function calling mechanism.
678
679 This is the version of the function for the 32-bit PA machines, in
680 which later arguments appear at lower addresses. (The stack always
681 grows towards higher addresses.)
682
683 We simply allocate the appropriate amount of stack space and put
684 arguments into their proper slots. */
685
4a302917 686static CORE_ADDR
7d9b040b 687hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
688 struct regcache *regcache, CORE_ADDR bp_addr,
689 int nargs, struct value **args, CORE_ADDR sp,
690 int struct_return, CORE_ADDR struct_addr)
691{
e17a4113
UW
692 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
693
79508e1e
AC
694 /* Stack base address at which any pass-by-reference parameters are
695 stored. */
696 CORE_ADDR struct_end = 0;
697 /* Stack base address at which the first parameter is stored. */
698 CORE_ADDR param_end = 0;
699
700 /* The inner most end of the stack after all the parameters have
701 been pushed. */
702 CORE_ADDR new_sp = 0;
703
704 /* Two passes. First pass computes the location of everything,
705 second pass writes the bytes out. */
706 int write_pass;
d49771ef
RC
707
708 /* Global pointer (r19) of the function we are trying to call. */
709 CORE_ADDR gp;
710
711 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
712
79508e1e
AC
713 for (write_pass = 0; write_pass < 2; write_pass++)
714 {
1797a8f6 715 CORE_ADDR struct_ptr = 0;
1777feb0 716 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
2a6228ef
RC
717 struct_ptr is adjusted for each argument below, so the first
718 argument will end up at sp-36. */
719 CORE_ADDR param_ptr = 32;
79508e1e 720 int i;
2a6228ef
RC
721 int small_struct = 0;
722
79508e1e
AC
723 for (i = 0; i < nargs; i++)
724 {
725 struct value *arg = args[i];
4991999e 726 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
727 /* The corresponding parameter that is pushed onto the
728 stack, and [possibly] passed in a register. */
729 char param_val[8];
730 int param_len;
731 memset (param_val, 0, sizeof param_val);
732 if (TYPE_LENGTH (type) > 8)
733 {
734 /* Large parameter, pass by reference. Store the value
735 in "struct" area and then pass its address. */
736 param_len = 4;
1797a8f6 737 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 738 if (write_pass)
0fd88904 739 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 740 TYPE_LENGTH (type));
e17a4113
UW
741 store_unsigned_integer (param_val, 4, byte_order,
742 struct_end - struct_ptr);
79508e1e
AC
743 }
744 else if (TYPE_CODE (type) == TYPE_CODE_INT
745 || TYPE_CODE (type) == TYPE_CODE_ENUM)
746 {
747 /* Integer value store, right aligned. "unpack_long"
748 takes care of any sign-extension problems. */
749 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 750 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 751 unpack_long (type,
0fd88904 752 value_contents (arg)));
79508e1e 753 }
2a6228ef
RC
754 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
755 {
756 /* Floating point value store, right aligned. */
757 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 758 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 759 }
79508e1e
AC
760 else
761 {
79508e1e 762 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
763
764 /* Small struct value are stored right-aligned. */
79508e1e 765 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 766 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
767
768 /* Structures of size 5, 6 and 7 bytes are special in that
769 the higher-ordered word is stored in the lower-ordered
770 argument, and even though it is a 8-byte quantity the
771 registers need not be 8-byte aligned. */
1b07b470 772 if (param_len > 4 && param_len < 8)
2a6228ef 773 small_struct = 1;
79508e1e 774 }
2a6228ef 775
1797a8f6 776 param_ptr += param_len;
2a6228ef
RC
777 if (param_len == 8 && !small_struct)
778 param_ptr = align_up (param_ptr, 8);
779
780 /* First 4 non-FP arguments are passed in gr26-gr23.
781 First 4 32-bit FP arguments are passed in fr4L-fr7L.
782 First 2 64-bit FP arguments are passed in fr5 and fr7.
783
784 The rest go on the stack, starting at sp-36, towards lower
785 addresses. 8-byte arguments must be aligned to a 8-byte
786 stack boundary. */
79508e1e
AC
787 if (write_pass)
788 {
1797a8f6 789 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
790
791 /* There are some cases when we don't know the type
792 expected by the callee (e.g. for variadic functions), so
793 pass the parameters in both general and fp regs. */
794 if (param_ptr <= 48)
79508e1e 795 {
2a6228ef
RC
796 int grreg = 26 - (param_ptr - 36) / 4;
797 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
798 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
799
800 regcache_cooked_write (regcache, grreg, param_val);
801 regcache_cooked_write (regcache, fpLreg, param_val);
802
79508e1e 803 if (param_len > 4)
2a6228ef
RC
804 {
805 regcache_cooked_write (regcache, grreg + 1,
806 param_val + 4);
807
808 regcache_cooked_write (regcache, fpreg, param_val);
809 regcache_cooked_write (regcache, fpreg + 1,
810 param_val + 4);
811 }
79508e1e
AC
812 }
813 }
814 }
815
816 /* Update the various stack pointers. */
817 if (!write_pass)
818 {
2a6228ef 819 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
820 /* PARAM_PTR already accounts for all the arguments passed
821 by the user. However, the ABI mandates minimum stack
822 space allocations for outgoing arguments. The ABI also
823 mandates minimum stack alignments which we must
824 preserve. */
2a6228ef 825 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
826 }
827 }
828
829 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 830 address. */
79508e1e 831 if (struct_return)
9c9acae0 832 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 833
e38c262f 834 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
835
836 if (gp != 0)
9c9acae0 837 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 838
79508e1e 839 /* Set the return address. */
77d18ded
RC
840 if (!gdbarch_push_dummy_code_p (gdbarch))
841 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 842
c4557624 843 /* Update the Stack Pointer. */
34f75cc1 844 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 845
2a6228ef 846 return param_end;
79508e1e
AC
847}
848
38ca4e0c
MK
849/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
850 Runtime Architecture for PA-RISC 2.0", which is distributed as part
851 as of the HP-UX Software Transition Kit (STK). This implementation
852 is based on version 3.3, dated October 6, 1997. */
2f690297 853
38ca4e0c 854/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 855
38ca4e0c
MK
856static int
857hppa64_integral_or_pointer_p (const struct type *type)
858{
859 switch (TYPE_CODE (type))
860 {
861 case TYPE_CODE_INT:
862 case TYPE_CODE_BOOL:
863 case TYPE_CODE_CHAR:
864 case TYPE_CODE_ENUM:
865 case TYPE_CODE_RANGE:
866 {
867 int len = TYPE_LENGTH (type);
868 return (len == 1 || len == 2 || len == 4 || len == 8);
869 }
870 case TYPE_CODE_PTR:
871 case TYPE_CODE_REF:
872 return (TYPE_LENGTH (type) == 8);
873 default:
874 break;
875 }
876
877 return 0;
878}
879
880/* Check whether TYPE is a "Floating Scalar Type". */
881
882static int
883hppa64_floating_p (const struct type *type)
884{
885 switch (TYPE_CODE (type))
886 {
887 case TYPE_CODE_FLT:
888 {
889 int len = TYPE_LENGTH (type);
890 return (len == 4 || len == 8 || len == 16);
891 }
892 default:
893 break;
894 }
895
896 return 0;
897}
2f690297 898
1218e655
RC
899/* If CODE points to a function entry address, try to look up the corresponding
900 function descriptor and return its address instead. If CODE is not a
901 function entry address, then just return it unchanged. */
902static CORE_ADDR
e17a4113 903hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 904{
e17a4113 905 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
906 struct obj_section *sec, *opd;
907
908 sec = find_pc_section (code);
909
910 if (!sec)
911 return code;
912
913 /* If CODE is in a data section, assume it's already a fptr. */
914 if (!(sec->the_bfd_section->flags & SEC_CODE))
915 return code;
916
917 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
918 {
919 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 920 break;
1218e655
RC
921 }
922
923 if (opd < sec->objfile->sections_end)
924 {
925 CORE_ADDR addr;
926
aded6f54
PA
927 for (addr = obj_section_addr (opd);
928 addr < obj_section_endaddr (opd);
929 addr += 2 * 8)
930 {
1218e655
RC
931 ULONGEST opdaddr;
932 char tmp[8];
933
934 if (target_read_memory (addr, tmp, sizeof (tmp)))
935 break;
e17a4113 936 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 937
aded6f54 938 if (opdaddr == code)
1218e655
RC
939 return addr - 16;
940 }
941 }
942
943 return code;
944}
945
4a302917 946static CORE_ADDR
7d9b040b 947hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
948 struct regcache *regcache, CORE_ADDR bp_addr,
949 int nargs, struct value **args, CORE_ADDR sp,
950 int struct_return, CORE_ADDR struct_addr)
951{
38ca4e0c 952 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 953 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
954 int i, offset = 0;
955 CORE_ADDR gp;
2f690297 956
38ca4e0c
MK
957 /* "The outgoing parameter area [...] must be aligned at a 16-byte
958 boundary." */
959 sp = align_up (sp, 16);
2f690297 960
38ca4e0c
MK
961 for (i = 0; i < nargs; i++)
962 {
963 struct value *arg = args[i];
964 struct type *type = value_type (arg);
965 int len = TYPE_LENGTH (type);
0fd88904 966 const bfd_byte *valbuf;
1218e655 967 bfd_byte fptrbuf[8];
38ca4e0c 968 int regnum;
2f690297 969
38ca4e0c
MK
970 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
971 offset = align_up (offset, 8);
77d18ded 972
38ca4e0c 973 if (hppa64_integral_or_pointer_p (type))
2f690297 974 {
38ca4e0c
MK
975 /* "Integral scalar parameters smaller than 64 bits are
976 padded on the left (i.e., the value is in the
977 least-significant bits of the 64-bit storage unit, and
978 the high-order bits are undefined)." Therefore we can
979 safely sign-extend them. */
980 if (len < 8)
449e1137 981 {
df4df182 982 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
983 len = 8;
984 }
985 }
986 else if (hppa64_floating_p (type))
987 {
988 if (len > 8)
989 {
990 /* "Quad-precision (128-bit) floating-point scalar
991 parameters are aligned on a 16-byte boundary." */
992 offset = align_up (offset, 16);
993
994 /* "Double-extended- and quad-precision floating-point
995 parameters within the first 64 bytes of the parameter
996 list are always passed in general registers." */
449e1137
AC
997 }
998 else
999 {
38ca4e0c 1000 if (len == 4)
449e1137 1001 {
38ca4e0c
MK
1002 /* "Single-precision (32-bit) floating-point scalar
1003 parameters are padded on the left with 32 bits of
1004 garbage (i.e., the floating-point value is in the
1005 least-significant 32 bits of a 64-bit storage
1006 unit)." */
1007 offset += 4;
449e1137 1008 }
38ca4e0c
MK
1009
1010 /* "Single- and double-precision floating-point
1011 parameters in this area are passed according to the
1012 available formal parameter information in a function
1013 prototype. [...] If no prototype is in scope,
1014 floating-point parameters must be passed both in the
1015 corresponding general registers and in the
1016 corresponding floating-point registers." */
1017 regnum = HPPA64_FP4_REGNUM + offset / 8;
1018
1019 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1020 {
38ca4e0c
MK
1021 /* "Single-precision floating-point parameters, when
1022 passed in floating-point registers, are passed in
1023 the right halves of the floating point registers;
1024 the left halves are unused." */
1025 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1026 len, value_contents (arg));
449e1137
AC
1027 }
1028 }
2f690297 1029 }
38ca4e0c 1030 else
2f690297 1031 {
38ca4e0c
MK
1032 if (len > 8)
1033 {
1034 /* "Aggregates larger than 8 bytes are aligned on a
1035 16-byte boundary, possibly leaving an unused argument
1777feb0 1036 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1037 they are padded on the right (with garbage), to a
1038 multiple of 8 bytes." */
1039 offset = align_up (offset, 16);
1040 }
1041 }
1042
1218e655
RC
1043 /* If we are passing a function pointer, make sure we pass a function
1044 descriptor instead of the function entry address. */
1045 if (TYPE_CODE (type) == TYPE_CODE_PTR
1046 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1047 {
1048 ULONGEST codeptr, fptr;
1049
1050 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1051 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1052 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1053 fptr);
1218e655
RC
1054 valbuf = fptrbuf;
1055 }
1056 else
1057 {
1058 valbuf = value_contents (arg);
1059 }
1060
38ca4e0c 1061 /* Always store the argument in memory. */
1218e655 1062 write_memory (sp + offset, valbuf, len);
38ca4e0c 1063
38ca4e0c
MK
1064 regnum = HPPA_ARG0_REGNUM - offset / 8;
1065 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1066 {
1067 regcache_cooked_write_part (regcache, regnum,
1068 offset % 8, min (len, 8), valbuf);
1069 offset += min (len, 8);
1070 valbuf += min (len, 8);
1071 len -= min (len, 8);
1072 regnum--;
2f690297 1073 }
38ca4e0c
MK
1074
1075 offset += len;
2f690297
AC
1076 }
1077
38ca4e0c
MK
1078 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1079 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1080
1081 /* Allocate the outgoing parameter area. Make sure the outgoing
1082 parameter area is multiple of 16 bytes in length. */
1083 sp += max (align_up (offset, 16), 64);
1084
1085 /* Allocate 32-bytes of scratch space. The documentation doesn't
1086 mention this, but it seems to be needed. */
1087 sp += 32;
1088
1089 /* Allocate the frame marker area. */
1090 sp += 16;
1091
1092 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1093 its address. */
2f690297 1094 if (struct_return)
38ca4e0c 1095 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1096
38ca4e0c 1097 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1098 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1099 if (gp != 0)
38ca4e0c 1100 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1101
38ca4e0c 1102 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1103 if (!gdbarch_push_dummy_code_p (gdbarch))
1104 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1105
38ca4e0c
MK
1106 /* Set up GR30 to hold the stack pointer (sp). */
1107 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1108
38ca4e0c 1109 return sp;
2f690297 1110}
38ca4e0c 1111\f
2f690297 1112
08a27113
MK
1113/* Handle 32/64-bit struct return conventions. */
1114
1115static enum return_value_convention
6a3a010b 1116hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1117 struct type *type, struct regcache *regcache,
e127f0db 1118 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1119{
1120 if (TYPE_LENGTH (type) <= 2 * 4)
1121 {
1122 /* The value always lives in the right hand end of the register
1123 (or register pair)? */
1124 int b;
1125 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1126 int part = TYPE_LENGTH (type) % 4;
1127 /* The left hand register contains only part of the value,
1128 transfer that first so that the rest can be xfered as entire
1129 4-byte registers. */
1130 if (part > 0)
1131 {
1132 if (readbuf != NULL)
1133 regcache_cooked_read_part (regcache, reg, 4 - part,
1134 part, readbuf);
1135 if (writebuf != NULL)
1136 regcache_cooked_write_part (regcache, reg, 4 - part,
1137 part, writebuf);
1138 reg++;
1139 }
1140 /* Now transfer the remaining register values. */
1141 for (b = part; b < TYPE_LENGTH (type); b += 4)
1142 {
1143 if (readbuf != NULL)
e127f0db 1144 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1145 if (writebuf != NULL)
e127f0db 1146 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1147 reg++;
1148 }
1149 return RETURN_VALUE_REGISTER_CONVENTION;
1150 }
1151 else
1152 return RETURN_VALUE_STRUCT_CONVENTION;
1153}
1154
1155static enum return_value_convention
6a3a010b 1156hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1157 struct type *type, struct regcache *regcache,
e127f0db 1158 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1159{
1160 int len = TYPE_LENGTH (type);
1161 int regnum, offset;
1162
8f8a23a2 1163 if (TYPE_LENGTH (type) > 16)
08a27113
MK
1164 {
1165 /* All return values larget than 128 bits must be aggregate
1166 return values. */
9738b034
MK
1167 gdb_assert (!hppa64_integral_or_pointer_p (type));
1168 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1169
1170 /* "Aggregate return values larger than 128 bits are returned in
1171 a buffer allocated by the caller. The address of the buffer
1172 must be passed in GR 28." */
1173 return RETURN_VALUE_STRUCT_CONVENTION;
1174 }
1175
1176 if (hppa64_integral_or_pointer_p (type))
1177 {
1178 /* "Integral return values are returned in GR 28. Values
1179 smaller than 64 bits are padded on the left (with garbage)." */
1180 regnum = HPPA_RET0_REGNUM;
1181 offset = 8 - len;
1182 }
1183 else if (hppa64_floating_p (type))
1184 {
1185 if (len > 8)
1186 {
1187 /* "Double-extended- and quad-precision floating-point
1188 values are returned in GRs 28 and 29. The sign,
1189 exponent, and most-significant bits of the mantissa are
1190 returned in GR 28; the least-significant bits of the
1191 mantissa are passed in GR 29. For double-extended
1192 precision values, GR 29 is padded on the right with 48
1193 bits of garbage." */
1194 regnum = HPPA_RET0_REGNUM;
1195 offset = 0;
1196 }
1197 else
1198 {
1199 /* "Single-precision and double-precision floating-point
1200 return values are returned in FR 4R (single precision) or
1201 FR 4 (double-precision)." */
1202 regnum = HPPA64_FP4_REGNUM;
1203 offset = 8 - len;
1204 }
1205 }
1206 else
1207 {
1208 /* "Aggregate return values up to 64 bits in size are returned
1209 in GR 28. Aggregates smaller than 64 bits are left aligned
1210 in the register; the pad bits on the right are undefined."
1211
1212 "Aggregate return values between 65 and 128 bits are returned
1213 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1214 the remaining bits are placed, left aligned, in GR 29. The
1215 pad bits on the right of GR 29 (if any) are undefined." */
1216 regnum = HPPA_RET0_REGNUM;
1217 offset = 0;
1218 }
1219
1220 if (readbuf)
1221 {
08a27113
MK
1222 while (len > 0)
1223 {
1224 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1225 min (len, 8), readbuf);
1226 readbuf += min (len, 8);
08a27113
MK
1227 len -= min (len, 8);
1228 regnum++;
1229 }
1230 }
1231
1232 if (writebuf)
1233 {
08a27113
MK
1234 while (len > 0)
1235 {
1236 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1237 min (len, 8), writebuf);
1238 writebuf += min (len, 8);
08a27113
MK
1239 len -= min (len, 8);
1240 regnum++;
1241 }
1242 }
1243
1244 return RETURN_VALUE_REGISTER_CONVENTION;
1245}
1246\f
1247
d49771ef 1248static CORE_ADDR
a7aad9aa 1249hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1250 struct target_ops *targ)
1251{
1252 if (addr & 2)
1253 {
0dfff4cb 1254 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1255 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1256 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1257 }
1258
1259 return addr;
1260}
1261
1797a8f6
AC
1262static CORE_ADDR
1263hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1264{
1265 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1266 and not _bit_)! */
1267 return align_up (addr, 64);
1268}
1269
2f690297
AC
1270/* Force all frames to 16-byte alignment. Better safe than sorry. */
1271
1272static CORE_ADDR
1797a8f6 1273hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1274{
1275 /* Just always 16-byte align. */
1276 return align_up (addr, 16);
1277}
1278
cc72850f 1279CORE_ADDR
61a1198a 1280hppa_read_pc (struct regcache *regcache)
c906108c 1281{
cc72850f 1282 ULONGEST ipsw;
61a1198a 1283 ULONGEST pc;
c906108c 1284
61a1198a
UW
1285 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1286 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1287
1288 /* If the current instruction is nullified, then we are effectively
1289 still executing the previous instruction. Pretend we are still
cc72850f
MK
1290 there. This is needed when single stepping; if the nullified
1291 instruction is on a different line, we don't want GDB to think
1292 we've stepped onto that line. */
fe46cd3a
RC
1293 if (ipsw & 0x00200000)
1294 pc -= 4;
1295
cc72850f 1296 return pc & ~0x3;
c906108c
SS
1297}
1298
cc72850f 1299void
61a1198a 1300hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1301{
61a1198a
UW
1302 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1303 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1304}
1305
c906108c 1306/* For the given instruction (INST), return any adjustment it makes
1777feb0 1307 to the stack pointer or zero for no adjustment.
c906108c
SS
1308
1309 This only handles instructions commonly found in prologues. */
1310
1311static int
fba45db2 1312prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1313{
1314 /* This must persist across calls. */
1315 static int save_high21;
1316
1317 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1318 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1319 return hppa_extract_14 (inst);
c906108c
SS
1320
1321 /* stwm X,D(sp) */
1322 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1323 return hppa_extract_14 (inst);
c906108c 1324
104c1213
JM
1325 /* std,ma X,D(sp) */
1326 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1327 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1328
e22b26cb 1329 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1330 save high bits in save_high21 for later use. */
e22b26cb 1331 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1332 {
abc485a1 1333 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1334 return 0;
1335 }
1336
1337 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1338 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1339
1340 /* fstws as used by the HP compilers. */
1341 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1342 return hppa_extract_5_load (inst);
c906108c
SS
1343
1344 /* No adjustment. */
1345 return 0;
1346}
1347
1348/* Return nonzero if INST is a branch of some kind, else return zero. */
1349
1350static int
fba45db2 1351is_branch (unsigned long inst)
c906108c
SS
1352{
1353 switch (inst >> 26)
1354 {
1355 case 0x20:
1356 case 0x21:
1357 case 0x22:
1358 case 0x23:
7be570e7 1359 case 0x27:
c906108c
SS
1360 case 0x28:
1361 case 0x29:
1362 case 0x2a:
1363 case 0x2b:
7be570e7 1364 case 0x2f:
c906108c
SS
1365 case 0x30:
1366 case 0x31:
1367 case 0x32:
1368 case 0x33:
1369 case 0x38:
1370 case 0x39:
1371 case 0x3a:
7be570e7 1372 case 0x3b:
c906108c
SS
1373 return 1;
1374
1375 default:
1376 return 0;
1377 }
1378}
1379
1380/* Return the register number for a GR which is saved by INST or
1381 zero it INST does not save a GR. */
1382
1383static int
fba45db2 1384inst_saves_gr (unsigned long inst)
c906108c
SS
1385{
1386 /* Does it look like a stw? */
7be570e7
JM
1387 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1388 || (inst >> 26) == 0x1f
1389 || ((inst >> 26) == 0x1f
1390 && ((inst >> 6) == 0xa)))
abc485a1 1391 return hppa_extract_5R_store (inst);
7be570e7
JM
1392
1393 /* Does it look like a std? */
1394 if ((inst >> 26) == 0x1c
1395 || ((inst >> 26) == 0x03
1396 && ((inst >> 6) & 0xf) == 0xb))
abc485a1 1397 return hppa_extract_5R_store (inst);
c906108c 1398
1777feb0 1399 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
c906108c 1400 if ((inst >> 26) == 0x1b)
abc485a1 1401 return hppa_extract_5R_store (inst);
c906108c
SS
1402
1403 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1404 too. */
7be570e7
JM
1405 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1406 || ((inst >> 26) == 0x3
1407 && (((inst >> 6) & 0xf) == 0x8
1408 || (inst >> 6) & 0xf) == 0x9))
abc485a1 1409 return hppa_extract_5R_store (inst);
c5aa993b 1410
c906108c
SS
1411 return 0;
1412}
1413
1414/* Return the register number for a FR which is saved by INST or
1415 zero it INST does not save a FR.
1416
1417 Note we only care about full 64bit register stores (that's the only
1418 kind of stores the prologue will use).
1419
1420 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1421
1422static int
fba45db2 1423inst_saves_fr (unsigned long inst)
c906108c 1424{
1777feb0 1425 /* Is this an FSTD? */
c906108c 1426 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1427 return hppa_extract_5r_store (inst);
7be570e7 1428 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1429 return hppa_extract_5R_store (inst);
1777feb0 1430 /* Is this an FSTW? */
c906108c 1431 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1432 return hppa_extract_5r_store (inst);
7be570e7 1433 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1434 return hppa_extract_5R_store (inst);
c906108c
SS
1435 return 0;
1436}
1437
1438/* Advance PC across any function entry prologue instructions
1777feb0 1439 to reach some "real" code.
c906108c
SS
1440
1441 Use information in the unwind table to determine what exactly should
1442 be in the prologue. */
1443
1444
a71f8c30 1445static CORE_ADDR
be8626e0
MD
1446skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1447 int stop_before_branch)
c906108c 1448{
e17a4113 1449 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
c906108c
SS
1450 char buf[4];
1451 CORE_ADDR orig_pc = pc;
1452 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1453 unsigned long args_stored, status, i, restart_gr, restart_fr;
1454 struct unwind_table_entry *u;
a71f8c30 1455 int final_iteration;
c906108c
SS
1456
1457 restart_gr = 0;
1458 restart_fr = 0;
1459
1460restart:
1461 u = find_unwind_entry (pc);
1462 if (!u)
1463 return pc;
1464
1777feb0 1465 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1466 if ((pc & ~0x3) != u->region_start)
1467 return pc;
1468
1469 /* This is how much of a frame adjustment we need to account for. */
1470 stack_remaining = u->Total_frame_size << 3;
1471
1472 /* Magic register saves we want to know about. */
1473 save_rp = u->Save_RP;
1474 save_sp = u->Save_SP;
1475
1476 /* An indication that args may be stored into the stack. Unfortunately
1477 the HPUX compilers tend to set this in cases where no args were
1478 stored too!. */
1479 args_stored = 1;
1480
1481 /* Turn the Entry_GR field into a bitmask. */
1482 save_gr = 0;
1483 for (i = 3; i < u->Entry_GR + 3; i++)
1484 {
1485 /* Frame pointer gets saved into a special location. */
eded0a31 1486 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1487 continue;
1488
1489 save_gr |= (1 << i);
1490 }
1491 save_gr &= ~restart_gr;
1492
1493 /* Turn the Entry_FR field into a bitmask too. */
1494 save_fr = 0;
1495 for (i = 12; i < u->Entry_FR + 12; i++)
1496 save_fr |= (1 << i);
1497 save_fr &= ~restart_fr;
1498
a71f8c30
RC
1499 final_iteration = 0;
1500
c906108c
SS
1501 /* Loop until we find everything of interest or hit a branch.
1502
1503 For unoptimized GCC code and for any HP CC code this will never ever
1504 examine any user instructions.
1505
1506 For optimzied GCC code we're faced with problems. GCC will schedule
1507 its prologue and make prologue instructions available for delay slot
1508 filling. The end result is user code gets mixed in with the prologue
1509 and a prologue instruction may be in the delay slot of the first branch
1510 or call.
1511
1512 Some unexpected things are expected with debugging optimized code, so
1513 we allow this routine to walk past user instructions in optimized
1514 GCC code. */
1515 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1516 || args_stored)
1517 {
1518 unsigned int reg_num;
1519 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1520 unsigned long old_save_rp, old_save_sp, next_inst;
1521
1522 /* Save copies of all the triggers so we can compare them later
c5aa993b 1523 (only for HPC). */
c906108c
SS
1524 old_save_gr = save_gr;
1525 old_save_fr = save_fr;
1526 old_save_rp = save_rp;
1527 old_save_sp = save_sp;
1528 old_stack_remaining = stack_remaining;
1529
8defab1a 1530 status = target_read_memory (pc, buf, 4);
e17a4113 1531 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1532
c906108c
SS
1533 /* Yow! */
1534 if (status != 0)
1535 return pc;
1536
1537 /* Note the interesting effects of this instruction. */
1538 stack_remaining -= prologue_inst_adjust_sp (inst);
1539
7be570e7
JM
1540 /* There are limited ways to store the return pointer into the
1541 stack. */
c4c79048 1542 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1543 save_rp = 0;
1544
104c1213 1545 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1546 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1547 if ((inst & 0xffffc000) == 0x6fc10000
1548 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1549 save_sp = 0;
1550
6426a772
JM
1551 /* Are we loading some register with an offset from the argument
1552 pointer? */
1553 if ((inst & 0xffe00000) == 0x37a00000
1554 || (inst & 0xffffffe0) == 0x081d0240)
1555 {
1556 pc += 4;
1557 continue;
1558 }
1559
c906108c
SS
1560 /* Account for general and floating-point register saves. */
1561 reg_num = inst_saves_gr (inst);
1562 save_gr &= ~(1 << reg_num);
1563
1564 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1565 Unfortunately args_stored only tells us that some arguments
1566 where stored into the stack. Not how many or what kind!
c906108c 1567
c5aa993b
JM
1568 This is a kludge as on the HP compiler sets this bit and it
1569 never does prologue scheduling. So once we see one, skip past
1570 all of them. We have similar code for the fp arg stores below.
c906108c 1571
c5aa993b
JM
1572 FIXME. Can still die if we have a mix of GR and FR argument
1573 stores! */
be8626e0 1574 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1575 && reg_num <= 26)
c906108c 1576 {
be8626e0 1577 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1578 && reg_num <= 26)
c906108c
SS
1579 {
1580 pc += 4;
8defab1a 1581 status = target_read_memory (pc, buf, 4);
e17a4113 1582 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1583 if (status != 0)
1584 return pc;
1585 reg_num = inst_saves_gr (inst);
1586 }
1587 args_stored = 0;
1588 continue;
1589 }
1590
1591 reg_num = inst_saves_fr (inst);
1592 save_fr &= ~(1 << reg_num);
1593
8defab1a 1594 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1595 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1596
c906108c
SS
1597 /* Yow! */
1598 if (status != 0)
1599 return pc;
1600
1601 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1602 save. */
c906108c
SS
1603 if ((inst & 0xfc000000) == 0x34000000
1604 && inst_saves_fr (next_inst) >= 4
819844ad 1605 && inst_saves_fr (next_inst)
be8626e0 1606 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1607 {
1608 /* So we drop into the code below in a reasonable state. */
1609 reg_num = inst_saves_fr (next_inst);
1610 pc -= 4;
1611 }
1612
1613 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1614 This is a kludge as on the HP compiler sets this bit and it
1615 never does prologue scheduling. So once we see one, skip past
1616 all of them. */
819844ad 1617 if (reg_num >= 4
be8626e0 1618 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1619 {
819844ad
UW
1620 while (reg_num >= 4
1621 && reg_num
be8626e0 1622 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1623 {
1624 pc += 8;
8defab1a 1625 status = target_read_memory (pc, buf, 4);
e17a4113 1626 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1627 if (status != 0)
1628 return pc;
1629 if ((inst & 0xfc000000) != 0x34000000)
1630 break;
8defab1a 1631 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1632 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1633 if (status != 0)
1634 return pc;
1635 reg_num = inst_saves_fr (next_inst);
1636 }
1637 args_stored = 0;
1638 continue;
1639 }
1640
1641 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1642 instruction is in the delay slot of the first call/branch. */
a71f8c30 1643 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1644 break;
1645
1646 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1647 arguments were stored into the stack (boo hiss). This could
1648 cause this code to then skip a bunch of user insns (up to the
1649 first branch).
1650
1651 To combat this we try to identify when args_stored was bogusly
1652 set and clear it. We only do this when args_stored is nonzero,
1653 all other resources are accounted for, and nothing changed on
1654 this pass. */
c906108c 1655 if (args_stored
c5aa993b 1656 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1657 && old_save_gr == save_gr && old_save_fr == save_fr
1658 && old_save_rp == save_rp && old_save_sp == save_sp
1659 && old_stack_remaining == stack_remaining)
1660 break;
c5aa993b 1661
c906108c
SS
1662 /* Bump the PC. */
1663 pc += 4;
a71f8c30
RC
1664
1665 /* !stop_before_branch, so also look at the insn in the delay slot
1666 of the branch. */
1667 if (final_iteration)
1668 break;
1669 if (is_branch (inst))
1670 final_iteration = 1;
c906108c
SS
1671 }
1672
1673 /* We've got a tenative location for the end of the prologue. However
1674 because of limitations in the unwind descriptor mechanism we may
1675 have went too far into user code looking for the save of a register
1676 that does not exist. So, if there registers we expected to be saved
1677 but never were, mask them out and restart.
1678
1679 This should only happen in optimized code, and should be very rare. */
c5aa993b 1680 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1681 {
1682 pc = orig_pc;
1683 restart_gr = save_gr;
1684 restart_fr = save_fr;
1685 goto restart;
1686 }
1687
1688 return pc;
1689}
1690
1691
7be570e7
JM
1692/* Return the address of the PC after the last prologue instruction if
1693 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1694
1695static CORE_ADDR
fba45db2 1696after_prologue (CORE_ADDR pc)
c906108c
SS
1697{
1698 struct symtab_and_line sal;
1699 CORE_ADDR func_addr, func_end;
c906108c 1700
7be570e7
JM
1701 /* If we can not find the symbol in the partial symbol table, then
1702 there is no hope we can determine the function's start address
1703 with this code. */
c906108c 1704 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1705 return 0;
c906108c 1706
7be570e7 1707 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1708 sal = find_pc_line (func_addr, 0);
1709
7be570e7
JM
1710 /* There are only two cases to consider. First, the end of the source line
1711 is within the function bounds. In that case we return the end of the
1712 source line. Second is the end of the source line extends beyond the
1713 bounds of the current function. We need to use the slow code to
1777feb0 1714 examine instructions in that case.
c906108c 1715
7be570e7
JM
1716 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1717 the wrong thing to do. In fact, it should be entirely possible for this
1718 function to always return zero since the slow instruction scanning code
1719 is supposed to *always* work. If it does not, then it is a bug. */
1720 if (sal.end < func_end)
1721 return sal.end;
c5aa993b 1722 else
7be570e7 1723 return 0;
c906108c
SS
1724}
1725
1726/* To skip prologues, I use this predicate. Returns either PC itself
1727 if the code at PC does not look like a function prologue; otherwise
1777feb0 1728 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1729
1730 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1731 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1732 we might not want to skip all the insns because a prologue insn may
1733 appear in the delay slot of the first branch, and we don't want to
1734 skip over the branch in that case. */
c906108c 1735
8d153463 1736static CORE_ADDR
6093d2eb 1737hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1738{
c5aa993b 1739 CORE_ADDR post_prologue_pc;
c906108c 1740
c5aa993b
JM
1741 /* See if we can determine the end of the prologue via the symbol table.
1742 If so, then return either PC, or the PC after the prologue, whichever
1743 is greater. */
c906108c 1744
c5aa993b 1745 post_prologue_pc = after_prologue (pc);
c906108c 1746
7be570e7
JM
1747 /* If after_prologue returned a useful address, then use it. Else
1748 fall back on the instruction skipping code.
1749
1750 Some folks have claimed this causes problems because the breakpoint
1751 may be the first instruction of the prologue. If that happens, then
1752 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1753 if (post_prologue_pc != 0)
1754 return max (pc, post_prologue_pc);
c5aa993b 1755 else
be8626e0 1756 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1757}
1758
29d375ac 1759/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1760
29d375ac 1761static struct unwind_table_entry *
227e86ad 1762hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1763{
227e86ad 1764 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1765
1766 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1767 result of get_frame_address_in_block implies a problem.
93d42b30 1768 The bits should have been removed earlier, before the return
c7ce8faa 1769 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1770 if it isn't, it should be fixed. Then this call can be
1771 removed. */
227e86ad 1772 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1773 return find_unwind_entry (pc);
1774}
1775
26d08f08
AC
1776struct hppa_frame_cache
1777{
1778 CORE_ADDR base;
1779 struct trad_frame_saved_reg *saved_regs;
1780};
1781
1782static struct hppa_frame_cache *
227e86ad 1783hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1784{
227e86ad 1785 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1786 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1787 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1788 struct hppa_frame_cache *cache;
1789 long saved_gr_mask;
1790 long saved_fr_mask;
26d08f08
AC
1791 long frame_size;
1792 struct unwind_table_entry *u;
9f7194c3 1793 CORE_ADDR prologue_end;
50b2f48a 1794 int fp_in_r1 = 0;
26d08f08
AC
1795 int i;
1796
369aa520
RC
1797 if (hppa_debug)
1798 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1799 frame_relative_level(this_frame));
369aa520 1800
26d08f08 1801 if ((*this_cache) != NULL)
369aa520
RC
1802 {
1803 if (hppa_debug)
5af949e3
UW
1804 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1805 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
369aa520
RC
1806 return (*this_cache);
1807 }
26d08f08
AC
1808 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1809 (*this_cache) = cache;
227e86ad 1810 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1811
1812 /* Yow! */
227e86ad 1813 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1814 if (!u)
369aa520
RC
1815 {
1816 if (hppa_debug)
1817 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1818 return (*this_cache);
1819 }
26d08f08
AC
1820
1821 /* Turn the Entry_GR field into a bitmask. */
1822 saved_gr_mask = 0;
1823 for (i = 3; i < u->Entry_GR + 3; i++)
1824 {
1825 /* Frame pointer gets saved into a special location. */
eded0a31 1826 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1827 continue;
1828
1829 saved_gr_mask |= (1 << i);
1830 }
1831
1832 /* Turn the Entry_FR field into a bitmask too. */
1833 saved_fr_mask = 0;
1834 for (i = 12; i < u->Entry_FR + 12; i++)
1835 saved_fr_mask |= (1 << i);
1836
1837 /* Loop until we find everything of interest or hit a branch.
1838
1839 For unoptimized GCC code and for any HP CC code this will never ever
1840 examine any user instructions.
1841
1842 For optimized GCC code we're faced with problems. GCC will schedule
1843 its prologue and make prologue instructions available for delay slot
1844 filling. The end result is user code gets mixed in with the prologue
1845 and a prologue instruction may be in the delay slot of the first branch
1846 or call.
1847
1848 Some unexpected things are expected with debugging optimized code, so
1849 we allow this routine to walk past user instructions in optimized
1850 GCC code. */
1851 {
1852 int final_iteration = 0;
46acf081 1853 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1854 int looking_for_sp = u->Save_SP;
1855 int looking_for_rp = u->Save_RP;
1856 int fp_loc = -1;
9f7194c3 1857
a71f8c30 1858 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1859 skip_prologue_using_sal, in case we stepped into a function without
1860 symbol information. hppa_skip_prologue also bounds the returned
1861 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1862 function.
a71f8c30
RC
1863
1864 We used to call hppa_skip_prologue to find the end of the prologue,
1865 but if some non-prologue instructions get scheduled into the prologue,
1866 and the program is compiled with debug information, the "easy" way
1867 in hppa_skip_prologue will return a prologue end that is too early
1868 for us to notice any potential frame adjustments. */
d5c27f81 1869
ef02daa9
DJ
1870 /* We used to use get_frame_func to locate the beginning of the
1871 function to pass to skip_prologue. However, when objects are
1872 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1873 function (or 0). We can do better than that by using unwind records.
46acf081 1874 This only works if the Region_description of the unwind record
1777feb0 1875 indicates that it includes the entry point of the function.
46acf081
RC
1876 HP compilers sometimes generate unwind records for regions that
1877 do not include the entry or exit point of a function. GNU tools
1878 do not do this. */
1879
1880 if ((u->Region_description & 0x2) == 0)
1881 start_pc = u->region_start;
1882 else
227e86ad 1883 start_pc = get_frame_func (this_frame);
d5c27f81 1884
be8626e0 1885 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1886 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1887
1888 if (prologue_end != 0 && end_pc > prologue_end)
1889 end_pc = prologue_end;
1890
26d08f08 1891 frame_size = 0;
9f7194c3 1892
46acf081 1893 for (pc = start_pc;
26d08f08
AC
1894 ((saved_gr_mask || saved_fr_mask
1895 || looking_for_sp || looking_for_rp
1896 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1897 && pc < end_pc);
26d08f08
AC
1898 pc += 4)
1899 {
1900 int reg;
1901 char buf4[4];
4a302917
RC
1902 long inst;
1903
227e86ad 1904 if (!safe_frame_unwind_memory (this_frame, pc, buf4, sizeof buf4))
4a302917 1905 {
5af949e3
UW
1906 error (_("Cannot read instruction at %s."),
1907 paddress (gdbarch, pc));
4a302917
RC
1908 return (*this_cache);
1909 }
1910
e17a4113 1911 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 1912
26d08f08
AC
1913 /* Note the interesting effects of this instruction. */
1914 frame_size += prologue_inst_adjust_sp (inst);
1915
1916 /* There are limited ways to store the return pointer into the
1917 stack. */
1918 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1919 {
1920 looking_for_rp = 0;
34f75cc1 1921 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 1922 }
dfaf8edb
MK
1923 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1924 {
1925 looking_for_rp = 0;
1926 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
1927 }
c4c79048
RC
1928 else if (inst == 0x0fc212c1
1929 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
1930 {
1931 looking_for_rp = 0;
34f75cc1 1932 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
1933 }
1934
1935 /* Check to see if we saved SP into the stack. This also
1936 happens to indicate the location of the saved frame
1937 pointer. */
1938 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
1939 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
1940 {
1941 looking_for_sp = 0;
eded0a31 1942 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 1943 }
50b2f48a
RC
1944 else if (inst == 0x08030241) /* copy %r3, %r1 */
1945 {
1946 fp_in_r1 = 1;
1947 }
26d08f08
AC
1948
1949 /* Account for general and floating-point register saves. */
1950 reg = inst_saves_gr (inst);
1951 if (reg >= 3 && reg <= 18
eded0a31 1952 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
1953 {
1954 saved_gr_mask &= ~(1 << reg);
abc485a1 1955 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
1956 /* stwm with a positive displacement is a _post_
1957 _modify_. */
1958 cache->saved_regs[reg].addr = 0;
1959 else if ((inst & 0xfc00000c) == 0x70000008)
1960 /* A std has explicit post_modify forms. */
1961 cache->saved_regs[reg].addr = 0;
1962 else
1963 {
1964 CORE_ADDR offset;
1965
1966 if ((inst >> 26) == 0x1c)
1777feb0
MS
1967 offset = (inst & 0x1 ? -1 << 13 : 0)
1968 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 1969 else if ((inst >> 26) == 0x03)
abc485a1 1970 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 1971 else
abc485a1 1972 offset = hppa_extract_14 (inst);
26d08f08
AC
1973
1974 /* Handle code with and without frame pointers. */
1975 if (u->Save_SP)
1976 cache->saved_regs[reg].addr = offset;
1977 else
1777feb0
MS
1978 cache->saved_regs[reg].addr
1979 = (u->Total_frame_size << 3) + offset;
26d08f08
AC
1980 }
1981 }
1982
1983 /* GCC handles callee saved FP regs a little differently.
1984
1985 It emits an instruction to put the value of the start of
1986 the FP store area into %r1. It then uses fstds,ma with a
1987 basereg of %r1 for the stores.
1988
1989 HP CC emits them at the current stack pointer modifying the
1990 stack pointer as it stores each register. */
1991
1992 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
1993 if ((inst & 0xffffc000) == 0x34610000
1994 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 1995 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
1996
1997 reg = inst_saves_fr (inst);
1998 if (reg >= 12 && reg <= 21)
1999 {
2000 /* Note +4 braindamage below is necessary because the FP
2001 status registers are internally 8 registers rather than
2002 the expected 4 registers. */
2003 saved_fr_mask &= ~(1 << reg);
2004 if (fp_loc == -1)
2005 {
2006 /* 1st HP CC FP register store. After this
2007 instruction we've set enough state that the GCC and
2008 HPCC code are both handled in the same manner. */
34f75cc1 2009 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2010 fp_loc = 8;
2011 }
2012 else
2013 {
eded0a31 2014 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2015 fp_loc += 8;
2016 }
2017 }
2018
1777feb0 2019 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2020 if (final_iteration)
2021 break;
2022 /* We want to look precisely one instruction beyond the branch
2023 if we have not found everything yet. */
2024 if (is_branch (inst))
2025 final_iteration = 1;
2026 }
2027 }
2028
2029 {
2030 /* The frame base always represents the value of %sp at entry to
2031 the current function (and is thus equivalent to the "saved"
2032 stack pointer. */
227e86ad
JB
2033 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
2034 HPPA_SP_REGNUM);
ed70ba00 2035 CORE_ADDR fp;
9f7194c3
RC
2036
2037 if (hppa_debug)
5af949e3
UW
2038 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
2039 "prologue_end=%s) ",
2040 paddress (gdbarch, this_sp),
2041 paddress (gdbarch, get_frame_pc (this_frame)),
2042 paddress (gdbarch, prologue_end));
9f7194c3 2043
ed70ba00
RC
2044 /* Check to see if a frame pointer is available, and use it for
2045 frame unwinding if it is.
2046
2047 There are some situations where we need to rely on the frame
2048 pointer to do stack unwinding. For example, if a function calls
2049 alloca (), the stack pointer can get adjusted inside the body of
2050 the function. In this case, the ABI requires that the compiler
2051 maintain a frame pointer for the function.
2052
2053 The unwind record has a flag (alloca_frame) that indicates that
2054 a function has a variable frame; unfortunately, gcc/binutils
2055 does not set this flag. Instead, whenever a frame pointer is used
2056 and saved on the stack, the Save_SP flag is set. We use this to
2057 decide whether to use the frame pointer for unwinding.
2058
ed70ba00
RC
2059 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2060 instead of Save_SP. */
2061
227e86ad 2062 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2063
6fcecea0 2064 if (u->alloca_frame)
46acf081 2065 fp -= u->Total_frame_size << 3;
ed70ba00 2066
227e86ad 2067 if (get_frame_pc (this_frame) >= prologue_end
6fcecea0 2068 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2069 {
2070 cache->base = fp;
2071
2072 if (hppa_debug)
5af949e3
UW
2073 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2074 paddress (gdbarch, cache->base));
ed70ba00 2075 }
1658da49
RC
2076 else if (u->Save_SP
2077 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2078 {
9f7194c3
RC
2079 /* Both we're expecting the SP to be saved and the SP has been
2080 saved. The entry SP value is saved at this frame's SP
2081 address. */
e17a4113 2082 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2083
2084 if (hppa_debug)
5af949e3
UW
2085 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
2086 paddress (gdbarch, cache->base));
9f7194c3 2087 }
26d08f08 2088 else
9f7194c3 2089 {
1658da49
RC
2090 /* The prologue has been slowly allocating stack space. Adjust
2091 the SP back. */
2092 cache->base = this_sp - frame_size;
9f7194c3 2093 if (hppa_debug)
5af949e3
UW
2094 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2095 paddress (gdbarch, cache->base));
9f7194c3
RC
2096
2097 }
eded0a31 2098 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2099 }
2100
412275d5
AC
2101 /* The PC is found in the "return register", "Millicode" uses "r31"
2102 as the return register while normal code uses "rp". */
26d08f08 2103 if (u->Millicode)
9f7194c3 2104 {
5859efe5 2105 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2106 {
2107 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2108 if (hppa_debug)
2109 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2110 }
9f7194c3
RC
2111 else
2112 {
227e86ad 2113 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
34f75cc1 2114 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2115 if (hppa_debug)
2116 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2117 }
2118 }
26d08f08 2119 else
9f7194c3 2120 {
34f75cc1 2121 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2122 {
2123 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2124 cache->saved_regs[HPPA_RP_REGNUM];
2125 if (hppa_debug)
2126 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2127 }
9f7194c3
RC
2128 else
2129 {
227e86ad
JB
2130 ULONGEST rp = get_frame_register_unsigned (this_frame,
2131 HPPA_RP_REGNUM);
34f75cc1 2132 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2133 if (hppa_debug)
2134 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2135 }
2136 }
26d08f08 2137
50b2f48a
RC
2138 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2139 frame. However, there is a one-insn window where we haven't saved it
2140 yet, but we've already clobbered it. Detect this case and fix it up.
2141
2142 The prologue sequence for frame-pointer functions is:
2143 0: stw %rp, -20(%sp)
2144 4: copy %r3, %r1
2145 8: copy %sp, %r3
2146 c: stw,ma %r1, XX(%sp)
2147
2148 So if we are at offset c, the r3 value that we want is not yet saved
2149 on the stack, but it's been overwritten. The prologue analyzer will
2150 set fp_in_r1 when it sees the copy insn so we know to get the value
2151 from r1 instead. */
2152 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2153 && fp_in_r1)
2154 {
227e86ad 2155 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
50b2f48a
RC
2156 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2157 }
1658da49 2158
26d08f08
AC
2159 {
2160 /* Convert all the offsets into addresses. */
2161 int reg;
65c5db89 2162 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08
AC
2163 {
2164 if (trad_frame_addr_p (cache->saved_regs, reg))
2165 cache->saved_regs[reg].addr += cache->base;
2166 }
2167 }
2168
f77a2124 2169 {
f77a2124
RC
2170 struct gdbarch_tdep *tdep;
2171
f77a2124
RC
2172 tdep = gdbarch_tdep (gdbarch);
2173
2174 if (tdep->unwind_adjust_stub)
227e86ad 2175 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2176 }
2177
369aa520 2178 if (hppa_debug)
5af949e3
UW
2179 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2180 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
2181 return (*this_cache);
2182}
2183
2184static void
227e86ad
JB
2185hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2186 struct frame_id *this_id)
26d08f08 2187{
d5c27f81 2188 struct hppa_frame_cache *info;
227e86ad 2189 CORE_ADDR pc = get_frame_pc (this_frame);
d5c27f81
RC
2190 struct unwind_table_entry *u;
2191
227e86ad
JB
2192 info = hppa_frame_cache (this_frame, this_cache);
2193 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2194
2195 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2196}
2197
227e86ad
JB
2198static struct value *
2199hppa_frame_prev_register (struct frame_info *this_frame,
2200 void **this_cache, int regnum)
26d08f08 2201{
227e86ad
JB
2202 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2203
1777feb0
MS
2204 return hppa_frame_prev_register_helper (this_frame,
2205 info->saved_regs, regnum);
227e86ad
JB
2206}
2207
2208static int
2209hppa_frame_unwind_sniffer (const struct frame_unwind *self,
2210 struct frame_info *this_frame, void **this_cache)
2211{
2212 if (hppa_find_unwind_entry_in_block (this_frame))
2213 return 1;
2214
2215 return 0;
0da28f8a
RC
2216}
2217
2218static const struct frame_unwind hppa_frame_unwind =
2219{
2220 NORMAL_FRAME,
8fbca658 2221 default_frame_unwind_stop_reason,
0da28f8a 2222 hppa_frame_this_id,
227e86ad
JB
2223 hppa_frame_prev_register,
2224 NULL,
2225 hppa_frame_unwind_sniffer
0da28f8a
RC
2226};
2227
0da28f8a
RC
2228/* This is a generic fallback frame unwinder that kicks in if we fail all
2229 the other ones. Normally we would expect the stub and regular unwinder
2230 to work, but in some cases we might hit a function that just doesn't
2231 have any unwind information available. In this case we try to do
2232 unwinding solely based on code reading. This is obviously going to be
2233 slow, so only use this as a last resort. Currently this will only
2234 identify the stack and pc for the frame. */
2235
2236static struct hppa_frame_cache *
227e86ad 2237hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2238{
e17a4113
UW
2239 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2240 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2241 struct hppa_frame_cache *cache;
4ba6a975
MK
2242 unsigned int frame_size = 0;
2243 int found_rp = 0;
2244 CORE_ADDR start_pc;
0da28f8a 2245
d5c27f81 2246 if (hppa_debug)
4ba6a975
MK
2247 fprintf_unfiltered (gdb_stdlog,
2248 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2249 frame_relative_level (this_frame));
d5c27f81 2250
0da28f8a
RC
2251 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2252 (*this_cache) = cache;
227e86ad 2253 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2254
227e86ad 2255 start_pc = get_frame_func (this_frame);
4ba6a975 2256 if (start_pc)
0da28f8a 2257 {
227e86ad 2258 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2259 CORE_ADDR pc;
0da28f8a 2260
4ba6a975
MK
2261 for (pc = start_pc; pc < cur_pc; pc += 4)
2262 {
2263 unsigned int insn;
0da28f8a 2264
e17a4113 2265 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2266 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2267
4ba6a975
MK
2268 /* There are limited ways to store the return pointer into the
2269 stack. */
2270 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2271 {
2272 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2273 found_rp = 1;
2274 }
c4c79048
RC
2275 else if (insn == 0x0fc212c1
2276 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2277 {
2278 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2279 found_rp = 1;
2280 }
2281 }
412275d5 2282 }
0da28f8a 2283
d5c27f81 2284 if (hppa_debug)
4ba6a975
MK
2285 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2286 frame_size, found_rp);
d5c27f81 2287
227e86ad 2288 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2289 cache->base -= frame_size;
6d1be3f1 2290 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2291
2292 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2293 {
2294 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2295 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2296 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2297 }
412275d5
AC
2298 else
2299 {
4ba6a975 2300 ULONGEST rp;
227e86ad 2301 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
0da28f8a 2302 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2303 }
0da28f8a
RC
2304
2305 return cache;
26d08f08
AC
2306}
2307
0da28f8a 2308static void
227e86ad 2309hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2310 struct frame_id *this_id)
2311{
2312 struct hppa_frame_cache *info =
227e86ad
JB
2313 hppa_fallback_frame_cache (this_frame, this_cache);
2314
2315 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2316}
2317
227e86ad
JB
2318static struct value *
2319hppa_fallback_frame_prev_register (struct frame_info *this_frame,
2320 void **this_cache, int regnum)
0da28f8a 2321{
1777feb0
MS
2322 struct hppa_frame_cache *info
2323 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2324
1777feb0
MS
2325 return hppa_frame_prev_register_helper (this_frame,
2326 info->saved_regs, regnum);
0da28f8a
RC
2327}
2328
2329static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2330{
2331 NORMAL_FRAME,
8fbca658 2332 default_frame_unwind_stop_reason,
0da28f8a 2333 hppa_fallback_frame_this_id,
227e86ad
JB
2334 hppa_fallback_frame_prev_register,
2335 NULL,
2336 default_frame_sniffer
26d08f08
AC
2337};
2338
7f07c5b6
RC
2339/* Stub frames, used for all kinds of call stubs. */
2340struct hppa_stub_unwind_cache
2341{
2342 CORE_ADDR base;
2343 struct trad_frame_saved_reg *saved_regs;
2344};
2345
2346static struct hppa_stub_unwind_cache *
227e86ad 2347hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2348 void **this_cache)
2349{
227e86ad 2350 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7f07c5b6 2351 struct hppa_stub_unwind_cache *info;
22b0923d 2352 struct unwind_table_entry *u;
7f07c5b6
RC
2353
2354 if (*this_cache)
2355 return *this_cache;
2356
2357 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2358 *this_cache = info;
227e86ad 2359 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2360
227e86ad 2361 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2362
090ccbb7 2363 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2364 {
2365 /* HPUX uses export stubs in function calls; the export stub clobbers
2366 the return value of the caller, and, later restores it from the
2367 stack. */
227e86ad 2368 u = find_unwind_entry (get_frame_pc (this_frame));
22b0923d
RC
2369
2370 if (u && u->stub_unwind.stub_type == EXPORT)
2371 {
2372 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2373
2374 return info;
2375 }
2376 }
2377
2378 /* By default we assume that stubs do not change the rp. */
2379 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2380
7f07c5b6
RC
2381 return info;
2382}
2383
2384static void
227e86ad 2385hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2386 void **this_prologue_cache,
2387 struct frame_id *this_id)
2388{
2389 struct hppa_stub_unwind_cache *info
227e86ad 2390 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2391
2392 if (info)
227e86ad 2393 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2394}
2395
227e86ad
JB
2396static struct value *
2397hppa_stub_frame_prev_register (struct frame_info *this_frame,
2398 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2399{
2400 struct hppa_stub_unwind_cache *info
227e86ad 2401 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2402
227e86ad 2403 if (info == NULL)
8a3fe4f8 2404 error (_("Requesting registers from null frame."));
7f07c5b6 2405
1777feb0
MS
2406 return hppa_frame_prev_register_helper (this_frame,
2407 info->saved_regs, regnum);
227e86ad 2408}
7f07c5b6 2409
227e86ad
JB
2410static int
2411hppa_stub_unwind_sniffer (const struct frame_unwind *self,
2412 struct frame_info *this_frame,
2413 void **this_cache)
7f07c5b6 2414{
227e86ad
JB
2415 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2416 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2417 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2418
6d1be3f1 2419 if (pc == 0
84674fe1 2420 || (tdep->in_solib_call_trampoline != NULL
e17a4113 2421 && tdep->in_solib_call_trampoline (gdbarch, pc, NULL))
464963c9 2422 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2423 return 1;
2424 return 0;
7f07c5b6
RC
2425}
2426
227e86ad
JB
2427static const struct frame_unwind hppa_stub_frame_unwind = {
2428 NORMAL_FRAME,
8fbca658 2429 default_frame_unwind_stop_reason,
227e86ad
JB
2430 hppa_stub_frame_this_id,
2431 hppa_stub_frame_prev_register,
2432 NULL,
2433 hppa_stub_unwind_sniffer
2434};
2435
26d08f08 2436static struct frame_id
227e86ad 2437hppa_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
26d08f08 2438{
227e86ad
JB
2439 return frame_id_build (get_frame_register_unsigned (this_frame,
2440 HPPA_SP_REGNUM),
2441 get_frame_pc (this_frame));
26d08f08
AC
2442}
2443
cc72850f 2444CORE_ADDR
26d08f08
AC
2445hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2446{
fe46cd3a
RC
2447 ULONGEST ipsw;
2448 CORE_ADDR pc;
2449
cc72850f
MK
2450 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2451 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2452
2453 /* If the current instruction is nullified, then we are effectively
2454 still executing the previous instruction. Pretend we are still
cc72850f
MK
2455 there. This is needed when single stepping; if the nullified
2456 instruction is on a different line, we don't want GDB to think
2457 we've stepped onto that line. */
fe46cd3a
RC
2458 if (ipsw & 0x00200000)
2459 pc -= 4;
2460
cc72850f 2461 return pc & ~0x3;
26d08f08
AC
2462}
2463
ff644745
JB
2464/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2465 Return NULL if no such symbol was found. */
2466
2467struct minimal_symbol *
2468hppa_lookup_stub_minimal_symbol (const char *name,
2469 enum unwind_stub_types stub_type)
2470{
2471 struct objfile *objfile;
2472 struct minimal_symbol *msym;
2473
2474 ALL_MSYMBOLS (objfile, msym)
2475 {
2476 if (strcmp (SYMBOL_LINKAGE_NAME (msym), name) == 0)
2477 {
2478 struct unwind_table_entry *u;
2479
2480 u = find_unwind_entry (SYMBOL_VALUE (msym));
2481 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2482 return msym;
2483 }
2484 }
2485
2486 return NULL;
2487}
2488
c906108c 2489static void
fba45db2 2490unwind_command (char *exp, int from_tty)
c906108c
SS
2491{
2492 CORE_ADDR address;
2493 struct unwind_table_entry *u;
2494
2495 /* If we have an expression, evaluate it and use it as the address. */
2496
2497 if (exp != 0 && *exp != 0)
2498 address = parse_and_eval_address (exp);
2499 else
2500 return;
2501
2502 u = find_unwind_entry (address);
2503
2504 if (!u)
2505 {
2506 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2507 return;
2508 }
2509
3329c4b5 2510 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2511
5af949e3 2512 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
d5c27f81 2513 gdb_flush (gdb_stdout);
c906108c 2514
5af949e3 2515 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
d5c27f81 2516 gdb_flush (gdb_stdout);
c906108c 2517
c906108c 2518#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2519
2520 printf_unfiltered ("\n\tflags =");
2521 pif (Cannot_unwind);
2522 pif (Millicode);
2523 pif (Millicode_save_sr0);
2524 pif (Entry_SR);
2525 pif (Args_stored);
2526 pif (Variable_Frame);
2527 pif (Separate_Package_Body);
2528 pif (Frame_Extension_Millicode);
2529 pif (Stack_Overflow_Check);
2530 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2531 pif (sr4export);
2532 pif (cxx_info);
2533 pif (cxx_try_catch);
2534 pif (sched_entry_seq);
c906108c
SS
2535 pif (Save_SP);
2536 pif (Save_RP);
2537 pif (Save_MRP_in_frame);
6fcecea0 2538 pif (save_r19);
c906108c
SS
2539 pif (Cleanup_defined);
2540 pif (MPE_XL_interrupt_marker);
2541 pif (HP_UX_interrupt_marker);
2542 pif (Large_frame);
6fcecea0 2543 pif (alloca_frame);
c906108c
SS
2544
2545 putchar_unfiltered ('\n');
2546
c906108c 2547#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2548
2549 pin (Region_description);
2550 pin (Entry_FR);
2551 pin (Entry_GR);
2552 pin (Total_frame_size);
57dac9e1
RC
2553
2554 if (u->stub_unwind.stub_type)
2555 {
2556 printf_unfiltered ("\tstub type = ");
2557 switch (u->stub_unwind.stub_type)
2558 {
2559 case LONG_BRANCH:
2560 printf_unfiltered ("long branch\n");
2561 break;
2562 case PARAMETER_RELOCATION:
2563 printf_unfiltered ("parameter relocation\n");
2564 break;
2565 case EXPORT:
2566 printf_unfiltered ("export\n");
2567 break;
2568 case IMPORT:
2569 printf_unfiltered ("import\n");
2570 break;
2571 case IMPORT_SHLIB:
2572 printf_unfiltered ("import shlib\n");
2573 break;
2574 default:
2575 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2576 }
2577 }
c906108c 2578}
c906108c 2579
38ca4e0c
MK
2580/* Return the GDB type object for the "standard" data type of data in
2581 register REGNUM. */
d709c020 2582
eded0a31 2583static struct type *
38ca4e0c 2584hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2585{
38ca4e0c 2586 if (regnum < HPPA_FP4_REGNUM)
df4df182 2587 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2588 else
27067745 2589 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2590}
2591
eded0a31 2592static struct type *
38ca4e0c 2593hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2594{
38ca4e0c 2595 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2596 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2597 else
27067745 2598 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2599}
2600
38ca4e0c
MK
2601/* Return non-zero if REGNUM is not a register available to the user
2602 through ptrace/ttrace. */
d709c020 2603
8d153463 2604static int
64a3914f 2605hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2606{
2607 return (regnum == 0
34f75cc1
RC
2608 || regnum == HPPA_PCSQ_HEAD_REGNUM
2609 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2610 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2611}
d709c020 2612
d037d088 2613static int
64a3914f 2614hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2615{
2616 /* cr26 and cr27 are readable (but not writable) from userspace. */
2617 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2618 return 0;
2619 else
64a3914f 2620 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2621}
2622
38ca4e0c 2623static int
64a3914f 2624hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2625{
2626 return (regnum == 0
2627 || regnum == HPPA_PCSQ_HEAD_REGNUM
2628 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2629 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2630}
2631
d037d088 2632static int
64a3914f 2633hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2634{
2635 /* cr26 and cr27 are readable (but not writable) from userspace. */
2636 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2637 return 0;
2638 else
64a3914f 2639 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2640}
2641
8d153463 2642static CORE_ADDR
24568a2c 2643hppa_smash_text_address (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2644{
2645 /* The low two bits of the PC on the PA contain the privilege level.
2646 Some genius implementing a (non-GCC) compiler apparently decided
2647 this means that "addresses" in a text section therefore include a
2648 privilege level, and thus symbol tables should contain these bits.
2649 This seems like a bonehead thing to do--anyway, it seems to work
2650 for our purposes to just ignore those bits. */
2651
2652 return (addr &= ~0x3);
2653}
2654
e127f0db
MK
2655/* Get the ARGIth function argument for the current function. */
2656
4a302917 2657static CORE_ADDR
143985b7
AF
2658hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2659 struct type *type)
2660{
e127f0db 2661 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2662}
2663
05d1431c 2664static enum register_status
0f8d9d59 2665hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2666 int regnum, gdb_byte *buf)
0f8d9d59 2667{
05d1431c
PA
2668 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2669 ULONGEST tmp;
2670 enum register_status status;
0f8d9d59 2671
05d1431c
PA
2672 status = regcache_raw_read_unsigned (regcache, regnum, &tmp);
2673 if (status == REG_VALID)
2674 {
2675 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2676 tmp &= ~0x3;
2677 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2678 }
2679 return status;
0f8d9d59
RC
2680}
2681
d49771ef 2682static CORE_ADDR
e38c262f 2683hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2684{
2685 return 0;
2686}
2687
227e86ad
JB
2688struct value *
2689hppa_frame_prev_register_helper (struct frame_info *this_frame,
0da28f8a 2690 struct trad_frame_saved_reg saved_regs[],
227e86ad 2691 int regnum)
0da28f8a 2692{
227e86ad 2693 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2694 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2695
8693c419
MK
2696 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2697 {
227e86ad
JB
2698 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2699 CORE_ADDR pc;
2700 struct value *pcoq_val =
2701 trad_frame_get_prev_register (this_frame, saved_regs,
2702 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2703
e17a4113
UW
2704 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2705 size, byte_order);
227e86ad 2706 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2707 }
0da28f8a 2708
cc72850f
MK
2709 /* Make sure the "flags" register is zero in all unwound frames.
2710 The "flags" registers is a HP-UX specific wart, and only the code
2711 in hppa-hpux-tdep.c depends on it. However, it is easier to deal
2712 with it here. This shouldn't affect other systems since those
2713 should provide zero for the "flags" register anyway. */
2714 if (regnum == HPPA_FLAGS_REGNUM)
227e86ad 2715 return frame_unwind_got_constant (this_frame, regnum, 0);
cc72850f 2716
227e86ad 2717 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2718}
8693c419 2719\f
0da28f8a 2720
34f55018
MK
2721/* An instruction to match. */
2722struct insn_pattern
2723{
2724 unsigned int data; /* See if it matches this.... */
2725 unsigned int mask; /* ... with this mask. */
2726};
2727
2728/* See bfd/elf32-hppa.c */
2729static struct insn_pattern hppa_long_branch_stub[] = {
2730 /* ldil LR'xxx,%r1 */
2731 { 0x20200000, 0xffe00000 },
2732 /* be,n RR'xxx(%sr4,%r1) */
2733 { 0xe0202002, 0xffe02002 },
2734 { 0, 0 }
2735};
2736
2737static struct insn_pattern hppa_long_branch_pic_stub[] = {
2738 /* b,l .+8, %r1 */
2739 { 0xe8200000, 0xffe00000 },
2740 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2741 { 0x28200000, 0xffe00000 },
2742 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2743 { 0xe0202002, 0xffe02002 },
2744 { 0, 0 }
2745};
2746
2747static struct insn_pattern hppa_import_stub[] = {
2748 /* addil LR'xxx, %dp */
2749 { 0x2b600000, 0xffe00000 },
2750 /* ldw RR'xxx(%r1), %r21 */
2751 { 0x48350000, 0xffffb000 },
2752 /* bv %r0(%r21) */
2753 { 0xeaa0c000, 0xffffffff },
2754 /* ldw RR'xxx+4(%r1), %r19 */
2755 { 0x48330000, 0xffffb000 },
2756 { 0, 0 }
2757};
2758
2759static struct insn_pattern hppa_import_pic_stub[] = {
2760 /* addil LR'xxx,%r19 */
2761 { 0x2a600000, 0xffe00000 },
2762 /* ldw RR'xxx(%r1),%r21 */
2763 { 0x48350000, 0xffffb000 },
2764 /* bv %r0(%r21) */
2765 { 0xeaa0c000, 0xffffffff },
2766 /* ldw RR'xxx+4(%r1),%r19 */
2767 { 0x48330000, 0xffffb000 },
2768 { 0, 0 },
2769};
2770
2771static struct insn_pattern hppa_plt_stub[] = {
2772 /* b,l 1b, %r20 - 1b is 3 insns before here */
2773 { 0xea9f1fdd, 0xffffffff },
2774 /* depi 0,31,2,%r20 */
2775 { 0xd6801c1e, 0xffffffff },
2776 { 0, 0 }
2777};
2778
2779static struct insn_pattern hppa_sigtramp[] = {
2780 /* ldi 0, %r25 or ldi 1, %r25 */
2781 { 0x34190000, 0xfffffffd },
2782 /* ldi __NR_rt_sigreturn, %r20 */
2783 { 0x3414015a, 0xffffffff },
2784 /* be,l 0x100(%sr2, %r0), %sr0, %r31 */
2785 { 0xe4008200, 0xffffffff },
2786 /* nop */
2787 { 0x08000240, 0xffffffff },
2788 { 0, 0 }
2789};
2790
2791/* Maximum number of instructions on the patterns above. */
2792#define HPPA_MAX_INSN_PATTERN_LEN 4
2793
2794/* Return non-zero if the instructions at PC match the series
2795 described in PATTERN, or zero otherwise. PATTERN is an array of
2796 'struct insn_pattern' objects, terminated by an entry whose mask is
2797 zero.
2798
2799 When the match is successful, fill INSN[i] with what PATTERN[i]
2800 matched. */
2801
2802static int
e17a4113
UW
2803hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2804 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2805{
e17a4113 2806 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2807 CORE_ADDR npc = pc;
2808 int i;
2809
2810 for (i = 0; pattern[i].mask; i++)
2811 {
2812 gdb_byte buf[HPPA_INSN_SIZE];
2813
8defab1a 2814 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2815 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018
MK
2816 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2817 npc += 4;
2818 else
2819 return 0;
2820 }
2821
2822 return 1;
2823}
2824
2825/* This relaxed version of the insstruction matcher allows us to match
2826 from somewhere inside the pattern, by looking backwards in the
2827 instruction scheme. */
2828
2829static int
e17a4113
UW
2830hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2831 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2832{
2833 int offset, len = 0;
2834
2835 while (pattern[len].mask)
2836 len++;
2837
2838 for (offset = 0; offset < len; offset++)
e17a4113
UW
2839 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2840 pattern, insn))
34f55018
MK
2841 return 1;
2842
2843 return 0;
2844}
2845
2846static int
2847hppa_in_dyncall (CORE_ADDR pc)
2848{
2849 struct unwind_table_entry *u;
2850
2851 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2852 if (!u)
2853 return 0;
2854
2855 return (pc >= u->region_start && pc <= u->region_end);
2856}
2857
2858int
e17a4113
UW
2859hppa_in_solib_call_trampoline (struct gdbarch *gdbarch,
2860 CORE_ADDR pc, char *name)
34f55018
MK
2861{
2862 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2863 struct unwind_table_entry *u;
2864
2865 if (in_plt_section (pc, name) || hppa_in_dyncall (pc))
2866 return 1;
2867
2868 /* The GNU toolchain produces linker stubs without unwind
2869 information. Since the pattern matching for linker stubs can be
2870 quite slow, so bail out if we do have an unwind entry. */
2871
2872 u = find_unwind_entry (pc);
806e23c0 2873 if (u != NULL)
34f55018
MK
2874 return 0;
2875
e17a4113
UW
2876 return
2877 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2878 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2879 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2880 || hppa_match_insns_relaxed (gdbarch, pc,
2881 hppa_long_branch_pic_stub, insn));
34f55018
MK
2882}
2883
2884/* This code skips several kind of "trampolines" used on PA-RISC
2885 systems: $$dyncall, import stubs and PLT stubs. */
2886
2887CORE_ADDR
52f729a7 2888hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2889{
0dfff4cb
UW
2890 struct gdbarch *gdbarch = get_frame_arch (frame);
2891 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2892
34f55018
MK
2893 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2894 int dp_rel;
2895
2896 /* $$dyncall handles both PLABELs and direct addresses. */
2897 if (hppa_in_dyncall (pc))
2898 {
52f729a7 2899 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2900
2901 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2902 if (pc & 0x2)
0dfff4cb 2903 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2904
2905 return pc;
2906 }
2907
e17a4113
UW
2908 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2909 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2910 {
2911 /* Extract the target address from the addil/ldw sequence. */
2912 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2913
2914 if (dp_rel)
52f729a7 2915 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2916 else
52f729a7 2917 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2918
2919 /* fallthrough */
2920 }
2921
2922 if (in_plt_section (pc, NULL))
2923 {
0dfff4cb 2924 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2925
2926 /* If the PLT slot has not yet been resolved, the target will be
2927 the PLT stub. */
2928 if (in_plt_section (pc, NULL))
2929 {
2930 /* Sanity check: are we pointing to the PLT stub? */
e17a4113 2931 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2932 {
5af949e3
UW
2933 warning (_("Cannot resolve PLT stub at %s."),
2934 paddress (gdbarch, pc));
34f55018
MK
2935 return 0;
2936 }
2937
2938 /* This should point to the fixup routine. */
0dfff4cb 2939 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2940 }
2941 }
2942
2943 return pc;
2944}
2945\f
2946
8e8b2dba
MC
2947/* Here is a table of C type sizes on hppa with various compiles
2948 and options. I measured this on PA 9000/800 with HP-UX 11.11
2949 and these compilers:
2950
2951 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2952 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2953 /opt/aCC/bin/aCC B3910B A.03.45
2954 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2955
2956 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2957 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2958 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2959 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2960 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2961 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2962 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2963 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2964
2965 Each line is:
2966
2967 compiler and options
2968 char, short, int, long, long long
2969 float, double, long double
2970 char *, void (*)()
2971
2972 So all these compilers use either ILP32 or LP64 model.
2973 TODO: gcc has more options so it needs more investigation.
2974
a2379359
MC
2975 For floating point types, see:
2976
2977 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2978 HP-UX floating-point guide, hpux 11.00
2979
8e8b2dba
MC
2980 -- chastain 2003-12-18 */
2981
e6e68f1f
JB
2982static struct gdbarch *
2983hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2984{
3ff7cf9e 2985 struct gdbarch_tdep *tdep;
e6e68f1f 2986 struct gdbarch *gdbarch;
59623e27
JB
2987
2988 /* Try to determine the ABI of the object we are loading. */
4be87837 2989 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 2990 {
4be87837
DJ
2991 /* If it's a SOM file, assume it's HP/UX SOM. */
2992 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
2993 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 2994 }
e6e68f1f
JB
2995
2996 /* find a candidate among the list of pre-declared architectures. */
2997 arches = gdbarch_list_lookup_by_info (arches, &info);
2998 if (arches != NULL)
2999 return (arches->gdbarch);
3000
3001 /* If none found, then allocate and initialize one. */
fdd72f95 3002 tdep = XZALLOC (struct gdbarch_tdep);
3ff7cf9e
JB
3003 gdbarch = gdbarch_alloc (&info, tdep);
3004
3005 /* Determine from the bfd_arch_info structure if we are dealing with
3006 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3007 then default to a 32bit machine. */
3008 if (info.bfd_arch_info != NULL)
3009 tdep->bytes_per_address =
3010 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3011 else
3012 tdep->bytes_per_address = 4;
3013
d49771ef
RC
3014 tdep->find_global_pointer = hppa_find_global_pointer;
3015
3ff7cf9e
JB
3016 /* Some parts of the gdbarch vector depend on whether we are running
3017 on a 32 bits or 64 bits target. */
3018 switch (tdep->bytes_per_address)
3019 {
3020 case 4:
3021 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3022 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3023 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3024 set_gdbarch_cannot_store_register (gdbarch,
3025 hppa32_cannot_store_register);
3026 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3027 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3028 break;
3029 case 8:
3030 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3031 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3032 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5 3033 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3034 set_gdbarch_cannot_store_register (gdbarch,
3035 hppa64_cannot_store_register);
3036 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3037 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3038 break;
3039 default:
e2e0b3e5 3040 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3041 tdep->bytes_per_address);
3042 }
3043
3ff7cf9e 3044 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3045 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3046
8e8b2dba
MC
3047 /* The following gdbarch vector elements are the same in both ILP32
3048 and LP64, but might show differences some day. */
3049 set_gdbarch_long_long_bit (gdbarch, 64);
3050 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3051 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3052
3ff7cf9e
JB
3053 /* The following gdbarch vector elements do not depend on the address
3054 size, or in any other gdbarch element previously set. */
60383d10 3055 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
1fb24930
RC
3056 set_gdbarch_in_function_epilogue_p (gdbarch,
3057 hppa_in_function_epilogue_p);
a2a84a72 3058 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3059 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3060 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
b6fbdd1d 3061 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
3062 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
3063 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3064 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3065 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3066
143985b7
AF
3067 /* Helper for function argument information. */
3068 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3069
36482093
AC
3070 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3071
3a3bc038
AC
3072 /* When a hardware watchpoint triggers, we'll move the inferior past
3073 it by removing all eventpoints; stepping past the instruction
3074 that caused the trigger; reinserting eventpoints; and checking
3075 whether any watched location changed. */
3076 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3077
5979bc46 3078 /* Inferior function call methods. */
fca7aa43 3079 switch (tdep->bytes_per_address)
5979bc46 3080 {
fca7aa43
AC
3081 case 4:
3082 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3083 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3084 set_gdbarch_convert_from_func_ptr_addr
3085 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3086 break;
3087 case 8:
782eae8b
AC
3088 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3089 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3090 break;
782eae8b 3091 default:
e2e0b3e5 3092 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3093 }
3094
3095 /* Struct return methods. */
fca7aa43 3096 switch (tdep->bytes_per_address)
fad850b2 3097 {
fca7aa43
AC
3098 case 4:
3099 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3100 break;
3101 case 8:
782eae8b 3102 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3103 break;
fca7aa43 3104 default:
e2e0b3e5 3105 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3106 }
7f07c5b6 3107
85f4f2d8 3108 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3109 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3110
5979bc46 3111 /* Frame unwind methods. */
227e86ad 3112 set_gdbarch_dummy_id (gdbarch, hppa_dummy_id);
782eae8b 3113 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3114
50306a9d
RC
3115 /* Hook in ABI-specific overrides, if they have been registered. */
3116 gdbarch_init_osabi (info, gdbarch);
3117
7f07c5b6 3118 /* Hook in the default unwinders. */
227e86ad
JB
3119 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3120 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3121 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3122
e6e68f1f
JB
3123 return gdbarch;
3124}
3125
3126static void
464963c9 3127hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3128{
464963c9 3129 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3130
3131 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3132 tdep->bytes_per_address);
3133 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3134}
3135
72753510
PA
3136/* Provide a prototype to silence -Wmissing-prototypes. */
3137extern initialize_file_ftype _initialize_hppa_tdep;
3138
4facf7e8
JB
3139void
3140_initialize_hppa_tdep (void)
3141{
3142 struct cmd_list_element *c;
4facf7e8 3143
e6e68f1f 3144 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3145
7c46b9fb
RC
3146 hppa_objfile_priv_data = register_objfile_data ();
3147
4facf7e8 3148 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3149 _("Print unwind table entry at given address."),
4facf7e8
JB
3150 &maintenanceprintlist);
3151
1777feb0 3152 /* Debug this files internals. */
7915a72c
AC
3153 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3154Set whether hppa target specific debugging information should be displayed."),
3155 _("\
3156Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3157This flag controls whether hppa target specific debugging information is\n\
3158displayed. This information is particularly useful for debugging frame\n\
7915a72c 3159unwinding problems."),
2c5b56ce 3160 NULL,
7915a72c 3161 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3162 &setdebuglist, &showdebuglist);
4facf7e8 3163}
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