2007-10-30 Markus Deuling <deuling@de.ibm.com>
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
6aba47ca
DJ
3 Copyright (C) 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
a7aad9aa 5 Free Software Foundation, Inc.
c906108c
SS
6
7 Contributed by the Center for Software Science at the
8 University of Utah (pa-gdb-bugs@cs.utah.edu).
9
c5aa993b 10 This file is part of GDB.
c906108c 11
c5aa993b
JM
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
a9762ec7 14 the Free Software Foundation; either version 3 of the License, or
c5aa993b 15 (at your option) any later version.
c906108c 16
c5aa993b
JM
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
c906108c 21
c5aa993b 22 You should have received a copy of the GNU General Public License
a9762ec7 23 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
24
25#include "defs.h"
c906108c
SS
26#include "bfd.h"
27#include "inferior.h"
4e052eda 28#include "regcache.h"
e5d66720 29#include "completer.h"
59623e27 30#include "osabi.h"
a7ff40e7 31#include "gdb_assert.h"
e7b17823 32#include "gdb_stdint.h"
343af405 33#include "arch-utils.h"
c906108c
SS
34/* For argument passing to the inferior */
35#include "symtab.h"
fde2cceb 36#include "dis-asm.h"
26d08f08
AC
37#include "trad-frame.h"
38#include "frame-unwind.h"
39#include "frame-base.h"
c906108c 40
c906108c
SS
41#include "gdbcore.h"
42#include "gdbcmd.h"
e6bb342a 43#include "gdbtypes.h"
c906108c 44#include "objfiles.h"
3ff7cf9e 45#include "hppa-tdep.h"
c906108c 46
369aa520
RC
47static int hppa_debug = 0;
48
60383d10 49/* Some local constants. */
3ff7cf9e
JB
50static const int hppa32_num_regs = 128;
51static const int hppa64_num_regs = 96;
52
7c46b9fb
RC
53/* hppa-specific object data -- unwind and solib info.
54 TODO/maybe: think about splitting this into two parts; the unwind data is
55 common to all hppa targets, but is only used in this file; we can register
56 that separately and make this static. The solib data is probably hpux-
57 specific, so we can create a separate extern objfile_data that is registered
58 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
59const struct objfile_data *hppa_objfile_priv_data = NULL;
60
e2ac8128
JB
61/* Get at various relevent fields of an instruction word. */
62#define MASK_5 0x1f
63#define MASK_11 0x7ff
64#define MASK_14 0x3fff
65#define MASK_21 0x1fffff
66
e2ac8128
JB
67/* Sizes (in bytes) of the native unwind entries. */
68#define UNWIND_ENTRY_SIZE 16
69#define STUB_UNWIND_ENTRY_SIZE 8
70
c906108c
SS
71/* Routines to extract various sized constants out of hppa
72 instructions. */
73
74/* This assumes that no garbage lies outside of the lower bits of
75 value. */
76
abc485a1
RC
77int
78hppa_sign_extend (unsigned val, unsigned bits)
c906108c 79{
c5aa993b 80 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
81}
82
83/* For many immediate values the sign bit is the low bit! */
84
abc485a1
RC
85int
86hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 87{
c5aa993b 88 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
89}
90
e2ac8128
JB
91/* Extract the bits at positions between FROM and TO, using HP's numbering
92 (MSB = 0). */
93
abc485a1
RC
94int
95hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
96{
97 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
98}
99
c906108c
SS
100/* extract the immediate field from a ld{bhw}s instruction */
101
abc485a1
RC
102int
103hppa_extract_5_load (unsigned word)
c906108c 104{
abc485a1 105 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
106}
107
c906108c
SS
108/* extract the immediate field from a break instruction */
109
abc485a1
RC
110unsigned
111hppa_extract_5r_store (unsigned word)
c906108c
SS
112{
113 return (word & MASK_5);
114}
115
116/* extract the immediate field from a {sr}sm instruction */
117
abc485a1
RC
118unsigned
119hppa_extract_5R_store (unsigned word)
c906108c
SS
120{
121 return (word >> 16 & MASK_5);
122}
123
c906108c
SS
124/* extract a 14 bit immediate field */
125
abc485a1
RC
126int
127hppa_extract_14 (unsigned word)
c906108c 128{
abc485a1 129 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
130}
131
c906108c
SS
132/* extract a 21 bit constant */
133
abc485a1
RC
134int
135hppa_extract_21 (unsigned word)
c906108c
SS
136{
137 int val;
138
139 word &= MASK_21;
140 word <<= 11;
abc485a1 141 val = hppa_get_field (word, 20, 20);
c906108c 142 val <<= 11;
abc485a1 143 val |= hppa_get_field (word, 9, 19);
c906108c 144 val <<= 2;
abc485a1 145 val |= hppa_get_field (word, 5, 6);
c906108c 146 val <<= 5;
abc485a1 147 val |= hppa_get_field (word, 0, 4);
c906108c 148 val <<= 2;
abc485a1
RC
149 val |= hppa_get_field (word, 7, 8);
150 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
151}
152
c906108c
SS
153/* extract a 17 bit constant from branch instructions, returning the
154 19 bit signed value. */
155
abc485a1
RC
156int
157hppa_extract_17 (unsigned word)
c906108c 158{
abc485a1
RC
159 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
160 hppa_get_field (word, 29, 29) << 10 |
161 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
162 (word & 0x1) << 16, 17) << 2;
163}
3388d7ff
RC
164
165CORE_ADDR
166hppa_symbol_address(const char *sym)
167{
168 struct minimal_symbol *minsym;
169
170 minsym = lookup_minimal_symbol (sym, NULL, NULL);
171 if (minsym)
172 return SYMBOL_VALUE_ADDRESS (minsym);
173 else
174 return (CORE_ADDR)-1;
175}
77d18ded
RC
176
177struct hppa_objfile_private *
178hppa_init_objfile_priv_data (struct objfile *objfile)
179{
180 struct hppa_objfile_private *priv;
181
182 priv = (struct hppa_objfile_private *)
183 obstack_alloc (&objfile->objfile_obstack,
184 sizeof (struct hppa_objfile_private));
185 set_objfile_data (objfile, hppa_objfile_priv_data, priv);
186 memset (priv, 0, sizeof (*priv));
187
188 return priv;
189}
c906108c
SS
190\f
191
192/* Compare the start address for two unwind entries returning 1 if
193 the first address is larger than the second, -1 if the second is
194 larger than the first, and zero if they are equal. */
195
196static int
fba45db2 197compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
198{
199 const struct unwind_table_entry *a = arg1;
200 const struct unwind_table_entry *b = arg2;
201
202 if (a->region_start > b->region_start)
203 return 1;
204 else if (a->region_start < b->region_start)
205 return -1;
206 else
207 return 0;
208}
209
53a5351d 210static void
fdd72f95 211record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 212{
fdd72f95 213 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 214 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
215 {
216 bfd_vma value = section->vma - section->filepos;
217 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
218
219 if (value < *low_text_segment_address)
220 *low_text_segment_address = value;
221 }
53a5351d
JM
222}
223
c906108c 224static void
fba45db2
KB
225internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
226 asection *section, unsigned int entries, unsigned int size,
227 CORE_ADDR text_offset)
c906108c
SS
228{
229 /* We will read the unwind entries into temporary memory, then
230 fill in the actual unwind table. */
fdd72f95 231
c906108c
SS
232 if (size > 0)
233 {
234 unsigned long tmp;
235 unsigned i;
236 char *buf = alloca (size);
fdd72f95 237 CORE_ADDR low_text_segment_address;
c906108c 238
fdd72f95 239 /* For ELF targets, then unwinds are supposed to
c2c6d25f
JM
240 be segment relative offsets instead of absolute addresses.
241
242 Note that when loading a shared library (text_offset != 0) the
243 unwinds are already relative to the text_offset that will be
244 passed in. */
fdd72f95 245 if (gdbarch_tdep (current_gdbarch)->is_elf && text_offset == 0)
53a5351d 246 {
fdd72f95
RC
247 low_text_segment_address = -1;
248
53a5351d 249 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
250 record_text_segment_lowaddr,
251 &low_text_segment_address);
53a5351d 252
fdd72f95 253 text_offset = low_text_segment_address;
53a5351d 254 }
acf86d54
RC
255 else if (gdbarch_tdep (current_gdbarch)->solib_get_text_base)
256 {
257 text_offset = gdbarch_tdep (current_gdbarch)->solib_get_text_base (objfile);
258 }
53a5351d 259
c906108c
SS
260 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
261
262 /* Now internalize the information being careful to handle host/target
c5aa993b 263 endian issues. */
c906108c
SS
264 for (i = 0; i < entries; i++)
265 {
266 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 267 (bfd_byte *) buf);
c906108c
SS
268 table[i].region_start += text_offset;
269 buf += 4;
c5aa993b 270 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
271 table[i].region_end += text_offset;
272 buf += 4;
c5aa993b 273 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
274 buf += 4;
275 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
276 table[i].Millicode = (tmp >> 30) & 0x1;
277 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
278 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 279 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
280 table[i].Entry_SR = (tmp >> 25) & 0x1;
281 table[i].Entry_FR = (tmp >> 21) & 0xf;
282 table[i].Entry_GR = (tmp >> 16) & 0x1f;
283 table[i].Args_stored = (tmp >> 15) & 0x1;
284 table[i].Variable_Frame = (tmp >> 14) & 0x1;
285 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
286 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
287 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
288 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 289 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
290 table[i].cxx_info = (tmp >> 8) & 0x1;
291 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
292 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 293 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
294 table[i].Save_SP = (tmp >> 4) & 0x1;
295 table[i].Save_RP = (tmp >> 3) & 0x1;
296 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 297 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 298 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 299 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
300 buf += 4;
301 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
302 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
303 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
304 table[i].alloca_frame = (tmp >> 28) & 0x1;
305 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
306 table[i].Total_frame_size = tmp & 0x7ffffff;
307
c5aa993b 308 /* Stub unwinds are handled elsewhere. */
c906108c
SS
309 table[i].stub_unwind.stub_type = 0;
310 table[i].stub_unwind.padding = 0;
311 }
312 }
313}
314
315/* Read in the backtrace information stored in the `$UNWIND_START$' section of
316 the object file. This info is used mainly by find_unwind_entry() to find
317 out the stack frame size and frame pointer used by procedures. We put
318 everything on the psymbol obstack in the objfile so that it automatically
319 gets freed when the objfile is destroyed. */
320
321static void
fba45db2 322read_unwind_info (struct objfile *objfile)
c906108c 323{
d4f3574e
SS
324 asection *unwind_sec, *stub_unwind_sec;
325 unsigned unwind_size, stub_unwind_size, total_size;
326 unsigned index, unwind_entries;
c906108c
SS
327 unsigned stub_entries, total_entries;
328 CORE_ADDR text_offset;
7c46b9fb
RC
329 struct hppa_unwind_info *ui;
330 struct hppa_objfile_private *obj_private;
c906108c
SS
331
332 text_offset = ANOFFSET (objfile->section_offsets, 0);
7c46b9fb
RC
333 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
334 sizeof (struct hppa_unwind_info));
c906108c
SS
335
336 ui->table = NULL;
337 ui->cache = NULL;
338 ui->last = -1;
339
d4f3574e
SS
340 /* For reasons unknown the HP PA64 tools generate multiple unwinder
341 sections in a single executable. So we just iterate over every
342 section in the BFD looking for unwinder sections intead of trying
343 to do a lookup with bfd_get_section_by_name.
c906108c 344
d4f3574e
SS
345 First determine the total size of the unwind tables so that we
346 can allocate memory in a nice big hunk. */
347 total_entries = 0;
348 for (unwind_sec = objfile->obfd->sections;
349 unwind_sec;
350 unwind_sec = unwind_sec->next)
c906108c 351 {
d4f3574e
SS
352 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
353 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
354 {
355 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
356 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 357
d4f3574e
SS
358 total_entries += unwind_entries;
359 }
c906108c
SS
360 }
361
d4f3574e 362 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 363 use stub unwinds at the current time. */
d4f3574e
SS
364 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
365
c906108c
SS
366 if (stub_unwind_sec)
367 {
368 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
369 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
370 }
371 else
372 {
373 stub_unwind_size = 0;
374 stub_entries = 0;
375 }
376
377 /* Compute total number of unwind entries and their total size. */
d4f3574e 378 total_entries += stub_entries;
c906108c
SS
379 total_size = total_entries * sizeof (struct unwind_table_entry);
380
381 /* Allocate memory for the unwind table. */
382 ui->table = (struct unwind_table_entry *)
8b92e4d5 383 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 384 ui->last = total_entries - 1;
c906108c 385
d4f3574e
SS
386 /* Now read in each unwind section and internalize the standard unwind
387 entries. */
c906108c 388 index = 0;
d4f3574e
SS
389 for (unwind_sec = objfile->obfd->sections;
390 unwind_sec;
391 unwind_sec = unwind_sec->next)
392 {
393 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
394 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
395 {
396 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
397 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
398
399 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
400 unwind_entries, unwind_size, text_offset);
401 index += unwind_entries;
402 }
403 }
404
405 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
406 if (stub_unwind_size > 0)
407 {
408 unsigned int i;
409 char *buf = alloca (stub_unwind_size);
410
411 /* Read in the stub unwind entries. */
412 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
413 0, stub_unwind_size);
414
415 /* Now convert them into regular unwind entries. */
416 for (i = 0; i < stub_entries; i++, index++)
417 {
418 /* Clear out the next unwind entry. */
419 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
420
421 /* Convert offset & size into region_start and region_end.
422 Stuff away the stub type into "reserved" fields. */
423 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
424 (bfd_byte *) buf);
425 ui->table[index].region_start += text_offset;
426 buf += 4;
427 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 428 (bfd_byte *) buf);
c906108c
SS
429 buf += 2;
430 ui->table[index].region_end
c5aa993b
JM
431 = ui->table[index].region_start + 4 *
432 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
433 buf += 2;
434 }
435
436 }
437
438 /* Unwind table needs to be kept sorted. */
439 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
440 compare_unwind_entries);
441
442 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
443 obj_private = (struct hppa_objfile_private *)
444 objfile_data (objfile, hppa_objfile_priv_data);
445 if (obj_private == NULL)
77d18ded
RC
446 obj_private = hppa_init_objfile_priv_data (objfile);
447
c906108c
SS
448 obj_private->unwind_info = ui;
449}
450
451/* Lookup the unwind (stack backtrace) info for the given PC. We search all
452 of the objfiles seeking the unwind table entry for this PC. Each objfile
453 contains a sorted list of struct unwind_table_entry. Since we do a binary
454 search of the unwind tables, we depend upon them to be sorted. */
455
456struct unwind_table_entry *
fba45db2 457find_unwind_entry (CORE_ADDR pc)
c906108c
SS
458{
459 int first, middle, last;
460 struct objfile *objfile;
7c46b9fb 461 struct hppa_objfile_private *priv;
c906108c 462
369aa520
RC
463 if (hppa_debug)
464 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry 0x%s -> ",
465 paddr_nz (pc));
466
c906108c
SS
467 /* A function at address 0? Not in HP-UX! */
468 if (pc == (CORE_ADDR) 0)
369aa520
RC
469 {
470 if (hppa_debug)
471 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
472 return NULL;
473 }
c906108c
SS
474
475 ALL_OBJFILES (objfile)
c5aa993b 476 {
7c46b9fb 477 struct hppa_unwind_info *ui;
c5aa993b 478 ui = NULL;
7c46b9fb
RC
479 priv = objfile_data (objfile, hppa_objfile_priv_data);
480 if (priv)
481 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 482
c5aa993b
JM
483 if (!ui)
484 {
485 read_unwind_info (objfile);
7c46b9fb
RC
486 priv = objfile_data (objfile, hppa_objfile_priv_data);
487 if (priv == NULL)
8a3fe4f8 488 error (_("Internal error reading unwind information."));
7c46b9fb 489 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 490 }
c906108c 491
c5aa993b 492 /* First, check the cache */
c906108c 493
c5aa993b
JM
494 if (ui->cache
495 && pc >= ui->cache->region_start
496 && pc <= ui->cache->region_end)
369aa520
RC
497 {
498 if (hppa_debug)
499 fprintf_unfiltered (gdb_stdlog, "0x%s (cached) }\n",
e7b17823 500 paddr_nz ((uintptr_t) ui->cache));
369aa520
RC
501 return ui->cache;
502 }
c906108c 503
c5aa993b 504 /* Not in the cache, do a binary search */
c906108c 505
c5aa993b
JM
506 first = 0;
507 last = ui->last;
c906108c 508
c5aa993b
JM
509 while (first <= last)
510 {
511 middle = (first + last) / 2;
512 if (pc >= ui->table[middle].region_start
513 && pc <= ui->table[middle].region_end)
514 {
515 ui->cache = &ui->table[middle];
369aa520
RC
516 if (hppa_debug)
517 fprintf_unfiltered (gdb_stdlog, "0x%s }\n",
e7b17823 518 paddr_nz ((uintptr_t) ui->cache));
c5aa993b
JM
519 return &ui->table[middle];
520 }
c906108c 521
c5aa993b
JM
522 if (pc < ui->table[middle].region_start)
523 last = middle - 1;
524 else
525 first = middle + 1;
526 }
527 } /* ALL_OBJFILES() */
369aa520
RC
528
529 if (hppa_debug)
530 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
531
c906108c
SS
532 return NULL;
533}
534
1fb24930
RC
535/* The epilogue is defined here as the area either on the `bv' instruction
536 itself or an instruction which destroys the function's stack frame.
537
538 We do not assume that the epilogue is at the end of a function as we can
539 also have return sequences in the middle of a function. */
540static int
541hppa_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
542{
543 unsigned long status;
544 unsigned int inst;
545 char buf[4];
546 int off;
547
359a9262 548 status = read_memory_nobpt (pc, buf, 4);
1fb24930
RC
549 if (status != 0)
550 return 0;
551
552 inst = extract_unsigned_integer (buf, 4);
553
554 /* The most common way to perform a stack adjustment ldo X(sp),sp
555 We are destroying a stack frame if the offset is negative. */
556 if ((inst & 0xffffc000) == 0x37de0000
557 && hppa_extract_14 (inst) < 0)
558 return 1;
559
560 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
561 if (((inst & 0x0fc010e0) == 0x0fc010e0
562 || (inst & 0x0fc010e0) == 0x0fc010e0)
563 && hppa_extract_14 (inst) < 0)
564 return 1;
565
566 /* bv %r0(%rp) or bv,n %r0(%rp) */
567 if (inst == 0xe840c000 || inst == 0xe840c002)
568 return 1;
569
570 return 0;
571}
572
85f4f2d8 573static const unsigned char *
aaab4dba
AC
574hppa_breakpoint_from_pc (CORE_ADDR *pc, int *len)
575{
56132691 576 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
577 (*len) = sizeof (breakpoint);
578 return breakpoint;
579}
580
e23457df
AC
581/* Return the name of a register. */
582
4a302917 583static const char *
3ff7cf9e 584hppa32_register_name (int i)
e23457df
AC
585{
586 static char *names[] = {
587 "flags", "r1", "rp", "r3",
588 "r4", "r5", "r6", "r7",
589 "r8", "r9", "r10", "r11",
590 "r12", "r13", "r14", "r15",
591 "r16", "r17", "r18", "r19",
592 "r20", "r21", "r22", "r23",
593 "r24", "r25", "r26", "dp",
594 "ret0", "ret1", "sp", "r31",
595 "sar", "pcoqh", "pcsqh", "pcoqt",
596 "pcsqt", "eiem", "iir", "isr",
597 "ior", "ipsw", "goto", "sr4",
598 "sr0", "sr1", "sr2", "sr3",
599 "sr5", "sr6", "sr7", "cr0",
600 "cr8", "cr9", "ccr", "cr12",
601 "cr13", "cr24", "cr25", "cr26",
602 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
603 "fpsr", "fpe1", "fpe2", "fpe3",
604 "fpe4", "fpe5", "fpe6", "fpe7",
605 "fr4", "fr4R", "fr5", "fr5R",
606 "fr6", "fr6R", "fr7", "fr7R",
607 "fr8", "fr8R", "fr9", "fr9R",
608 "fr10", "fr10R", "fr11", "fr11R",
609 "fr12", "fr12R", "fr13", "fr13R",
610 "fr14", "fr14R", "fr15", "fr15R",
611 "fr16", "fr16R", "fr17", "fr17R",
612 "fr18", "fr18R", "fr19", "fr19R",
613 "fr20", "fr20R", "fr21", "fr21R",
614 "fr22", "fr22R", "fr23", "fr23R",
615 "fr24", "fr24R", "fr25", "fr25R",
616 "fr26", "fr26R", "fr27", "fr27R",
617 "fr28", "fr28R", "fr29", "fr29R",
618 "fr30", "fr30R", "fr31", "fr31R"
619 };
620 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
621 return NULL;
622 else
623 return names[i];
624}
625
4a302917 626static const char *
e23457df
AC
627hppa64_register_name (int i)
628{
629 static char *names[] = {
630 "flags", "r1", "rp", "r3",
631 "r4", "r5", "r6", "r7",
632 "r8", "r9", "r10", "r11",
633 "r12", "r13", "r14", "r15",
634 "r16", "r17", "r18", "r19",
635 "r20", "r21", "r22", "r23",
636 "r24", "r25", "r26", "dp",
637 "ret0", "ret1", "sp", "r31",
638 "sar", "pcoqh", "pcsqh", "pcoqt",
639 "pcsqt", "eiem", "iir", "isr",
640 "ior", "ipsw", "goto", "sr4",
641 "sr0", "sr1", "sr2", "sr3",
642 "sr5", "sr6", "sr7", "cr0",
643 "cr8", "cr9", "ccr", "cr12",
644 "cr13", "cr24", "cr25", "cr26",
645 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
646 "fpsr", "fpe1", "fpe2", "fpe3",
647 "fr4", "fr5", "fr6", "fr7",
648 "fr8", "fr9", "fr10", "fr11",
649 "fr12", "fr13", "fr14", "fr15",
650 "fr16", "fr17", "fr18", "fr19",
651 "fr20", "fr21", "fr22", "fr23",
652 "fr24", "fr25", "fr26", "fr27",
653 "fr28", "fr29", "fr30", "fr31"
654 };
655 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
656 return NULL;
657 else
658 return names[i];
659}
660
1ef7fcb5
RC
661static int
662hppa64_dwarf_reg_to_regnum (int reg)
663{
664 /* r0-r31 and sar map one-to-one. */
665 if (reg <= 32)
666 return reg;
667
668 /* fr4-fr31 are mapped from 72 in steps of 2. */
669 if (reg >= 72 || reg < 72 + 28 * 2)
670 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
671
672 error ("Invalid DWARF register num %d.", reg);
673 return -1;
674}
675
79508e1e
AC
676/* This function pushes a stack frame with arguments as part of the
677 inferior function calling mechanism.
678
679 This is the version of the function for the 32-bit PA machines, in
680 which later arguments appear at lower addresses. (The stack always
681 grows towards higher addresses.)
682
683 We simply allocate the appropriate amount of stack space and put
684 arguments into their proper slots. */
685
4a302917 686static CORE_ADDR
7d9b040b 687hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
688 struct regcache *regcache, CORE_ADDR bp_addr,
689 int nargs, struct value **args, CORE_ADDR sp,
690 int struct_return, CORE_ADDR struct_addr)
691{
79508e1e
AC
692 /* Stack base address at which any pass-by-reference parameters are
693 stored. */
694 CORE_ADDR struct_end = 0;
695 /* Stack base address at which the first parameter is stored. */
696 CORE_ADDR param_end = 0;
697
698 /* The inner most end of the stack after all the parameters have
699 been pushed. */
700 CORE_ADDR new_sp = 0;
701
702 /* Two passes. First pass computes the location of everything,
703 second pass writes the bytes out. */
704 int write_pass;
d49771ef
RC
705
706 /* Global pointer (r19) of the function we are trying to call. */
707 CORE_ADDR gp;
708
709 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
710
79508e1e
AC
711 for (write_pass = 0; write_pass < 2; write_pass++)
712 {
1797a8f6 713 CORE_ADDR struct_ptr = 0;
2a6228ef
RC
714 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
715 struct_ptr is adjusted for each argument below, so the first
716 argument will end up at sp-36. */
717 CORE_ADDR param_ptr = 32;
79508e1e 718 int i;
2a6228ef
RC
719 int small_struct = 0;
720
79508e1e
AC
721 for (i = 0; i < nargs; i++)
722 {
723 struct value *arg = args[i];
4991999e 724 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
725 /* The corresponding parameter that is pushed onto the
726 stack, and [possibly] passed in a register. */
727 char param_val[8];
728 int param_len;
729 memset (param_val, 0, sizeof param_val);
730 if (TYPE_LENGTH (type) > 8)
731 {
732 /* Large parameter, pass by reference. Store the value
733 in "struct" area and then pass its address. */
734 param_len = 4;
1797a8f6 735 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 736 if (write_pass)
0fd88904 737 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 738 TYPE_LENGTH (type));
1797a8f6 739 store_unsigned_integer (param_val, 4, struct_end - struct_ptr);
79508e1e
AC
740 }
741 else if (TYPE_CODE (type) == TYPE_CODE_INT
742 || TYPE_CODE (type) == TYPE_CODE_ENUM)
743 {
744 /* Integer value store, right aligned. "unpack_long"
745 takes care of any sign-extension problems. */
746 param_len = align_up (TYPE_LENGTH (type), 4);
747 store_unsigned_integer (param_val, param_len,
748 unpack_long (type,
0fd88904 749 value_contents (arg)));
79508e1e 750 }
2a6228ef
RC
751 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
752 {
753 /* Floating point value store, right aligned. */
754 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 755 memcpy (param_val, value_contents (arg), param_len);
2a6228ef 756 }
79508e1e
AC
757 else
758 {
79508e1e 759 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
760
761 /* Small struct value are stored right-aligned. */
79508e1e 762 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 763 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
764
765 /* Structures of size 5, 6 and 7 bytes are special in that
766 the higher-ordered word is stored in the lower-ordered
767 argument, and even though it is a 8-byte quantity the
768 registers need not be 8-byte aligned. */
1b07b470 769 if (param_len > 4 && param_len < 8)
2a6228ef 770 small_struct = 1;
79508e1e 771 }
2a6228ef 772
1797a8f6 773 param_ptr += param_len;
2a6228ef
RC
774 if (param_len == 8 && !small_struct)
775 param_ptr = align_up (param_ptr, 8);
776
777 /* First 4 non-FP arguments are passed in gr26-gr23.
778 First 4 32-bit FP arguments are passed in fr4L-fr7L.
779 First 2 64-bit FP arguments are passed in fr5 and fr7.
780
781 The rest go on the stack, starting at sp-36, towards lower
782 addresses. 8-byte arguments must be aligned to a 8-byte
783 stack boundary. */
79508e1e
AC
784 if (write_pass)
785 {
1797a8f6 786 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
787
788 /* There are some cases when we don't know the type
789 expected by the callee (e.g. for variadic functions), so
790 pass the parameters in both general and fp regs. */
791 if (param_ptr <= 48)
79508e1e 792 {
2a6228ef
RC
793 int grreg = 26 - (param_ptr - 36) / 4;
794 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
795 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
796
797 regcache_cooked_write (regcache, grreg, param_val);
798 regcache_cooked_write (regcache, fpLreg, param_val);
799
79508e1e 800 if (param_len > 4)
2a6228ef
RC
801 {
802 regcache_cooked_write (regcache, grreg + 1,
803 param_val + 4);
804
805 regcache_cooked_write (regcache, fpreg, param_val);
806 regcache_cooked_write (regcache, fpreg + 1,
807 param_val + 4);
808 }
79508e1e
AC
809 }
810 }
811 }
812
813 /* Update the various stack pointers. */
814 if (!write_pass)
815 {
2a6228ef 816 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
817 /* PARAM_PTR already accounts for all the arguments passed
818 by the user. However, the ABI mandates minimum stack
819 space allocations for outgoing arguments. The ABI also
820 mandates minimum stack alignments which we must
821 preserve. */
2a6228ef 822 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
823 }
824 }
825
826 /* If a structure has to be returned, set up register 28 to hold its
827 address */
828 if (struct_return)
9c9acae0 829 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 830
d49771ef
RC
831 gp = tdep->find_global_pointer (function);
832
833 if (gp != 0)
9c9acae0 834 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 835
79508e1e 836 /* Set the return address. */
77d18ded
RC
837 if (!gdbarch_push_dummy_code_p (gdbarch))
838 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 839
c4557624 840 /* Update the Stack Pointer. */
34f75cc1 841 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 842
2a6228ef 843 return param_end;
79508e1e
AC
844}
845
38ca4e0c
MK
846/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
847 Runtime Architecture for PA-RISC 2.0", which is distributed as part
848 as of the HP-UX Software Transition Kit (STK). This implementation
849 is based on version 3.3, dated October 6, 1997. */
2f690297 850
38ca4e0c 851/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 852
38ca4e0c
MK
853static int
854hppa64_integral_or_pointer_p (const struct type *type)
855{
856 switch (TYPE_CODE (type))
857 {
858 case TYPE_CODE_INT:
859 case TYPE_CODE_BOOL:
860 case TYPE_CODE_CHAR:
861 case TYPE_CODE_ENUM:
862 case TYPE_CODE_RANGE:
863 {
864 int len = TYPE_LENGTH (type);
865 return (len == 1 || len == 2 || len == 4 || len == 8);
866 }
867 case TYPE_CODE_PTR:
868 case TYPE_CODE_REF:
869 return (TYPE_LENGTH (type) == 8);
870 default:
871 break;
872 }
873
874 return 0;
875}
876
877/* Check whether TYPE is a "Floating Scalar Type". */
878
879static int
880hppa64_floating_p (const struct type *type)
881{
882 switch (TYPE_CODE (type))
883 {
884 case TYPE_CODE_FLT:
885 {
886 int len = TYPE_LENGTH (type);
887 return (len == 4 || len == 8 || len == 16);
888 }
889 default:
890 break;
891 }
892
893 return 0;
894}
2f690297 895
1218e655
RC
896/* If CODE points to a function entry address, try to look up the corresponding
897 function descriptor and return its address instead. If CODE is not a
898 function entry address, then just return it unchanged. */
899static CORE_ADDR
900hppa64_convert_code_addr_to_fptr (CORE_ADDR code)
901{
902 struct obj_section *sec, *opd;
903
904 sec = find_pc_section (code);
905
906 if (!sec)
907 return code;
908
909 /* If CODE is in a data section, assume it's already a fptr. */
910 if (!(sec->the_bfd_section->flags & SEC_CODE))
911 return code;
912
913 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
914 {
915 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
916 break;
917 }
918
919 if (opd < sec->objfile->sections_end)
920 {
921 CORE_ADDR addr;
922
923 for (addr = opd->addr; addr < opd->endaddr; addr += 2 * 8)
924 {
925 ULONGEST opdaddr;
926 char tmp[8];
927
928 if (target_read_memory (addr, tmp, sizeof (tmp)))
929 break;
930 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp));
931
932 if (opdaddr == code)
933 return addr - 16;
934 }
935 }
936
937 return code;
938}
939
4a302917 940static CORE_ADDR
7d9b040b 941hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
942 struct regcache *regcache, CORE_ADDR bp_addr,
943 int nargs, struct value **args, CORE_ADDR sp,
944 int struct_return, CORE_ADDR struct_addr)
945{
38ca4e0c
MK
946 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
947 int i, offset = 0;
948 CORE_ADDR gp;
2f690297 949
38ca4e0c
MK
950 /* "The outgoing parameter area [...] must be aligned at a 16-byte
951 boundary." */
952 sp = align_up (sp, 16);
2f690297 953
38ca4e0c
MK
954 for (i = 0; i < nargs; i++)
955 {
956 struct value *arg = args[i];
957 struct type *type = value_type (arg);
958 int len = TYPE_LENGTH (type);
0fd88904 959 const bfd_byte *valbuf;
1218e655 960 bfd_byte fptrbuf[8];
38ca4e0c 961 int regnum;
2f690297 962
38ca4e0c
MK
963 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
964 offset = align_up (offset, 8);
77d18ded 965
38ca4e0c 966 if (hppa64_integral_or_pointer_p (type))
2f690297 967 {
38ca4e0c
MK
968 /* "Integral scalar parameters smaller than 64 bits are
969 padded on the left (i.e., the value is in the
970 least-significant bits of the 64-bit storage unit, and
971 the high-order bits are undefined)." Therefore we can
972 safely sign-extend them. */
973 if (len < 8)
449e1137 974 {
38ca4e0c
MK
975 arg = value_cast (builtin_type_int64, arg);
976 len = 8;
977 }
978 }
979 else if (hppa64_floating_p (type))
980 {
981 if (len > 8)
982 {
983 /* "Quad-precision (128-bit) floating-point scalar
984 parameters are aligned on a 16-byte boundary." */
985 offset = align_up (offset, 16);
986
987 /* "Double-extended- and quad-precision floating-point
988 parameters within the first 64 bytes of the parameter
989 list are always passed in general registers." */
449e1137
AC
990 }
991 else
992 {
38ca4e0c 993 if (len == 4)
449e1137 994 {
38ca4e0c
MK
995 /* "Single-precision (32-bit) floating-point scalar
996 parameters are padded on the left with 32 bits of
997 garbage (i.e., the floating-point value is in the
998 least-significant 32 bits of a 64-bit storage
999 unit)." */
1000 offset += 4;
449e1137 1001 }
38ca4e0c
MK
1002
1003 /* "Single- and double-precision floating-point
1004 parameters in this area are passed according to the
1005 available formal parameter information in a function
1006 prototype. [...] If no prototype is in scope,
1007 floating-point parameters must be passed both in the
1008 corresponding general registers and in the
1009 corresponding floating-point registers." */
1010 regnum = HPPA64_FP4_REGNUM + offset / 8;
1011
1012 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1013 {
38ca4e0c
MK
1014 /* "Single-precision floating-point parameters, when
1015 passed in floating-point registers, are passed in
1016 the right halves of the floating point registers;
1017 the left halves are unused." */
1018 regcache_cooked_write_part (regcache, regnum, offset % 8,
0fd88904 1019 len, value_contents (arg));
449e1137
AC
1020 }
1021 }
2f690297 1022 }
38ca4e0c 1023 else
2f690297 1024 {
38ca4e0c
MK
1025 if (len > 8)
1026 {
1027 /* "Aggregates larger than 8 bytes are aligned on a
1028 16-byte boundary, possibly leaving an unused argument
1029 slot, which is filled with garbage. If necessary,
1030 they are padded on the right (with garbage), to a
1031 multiple of 8 bytes." */
1032 offset = align_up (offset, 16);
1033 }
1034 }
1035
1218e655
RC
1036 /* If we are passing a function pointer, make sure we pass a function
1037 descriptor instead of the function entry address. */
1038 if (TYPE_CODE (type) == TYPE_CODE_PTR
1039 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1040 {
1041 ULONGEST codeptr, fptr;
1042
1043 codeptr = unpack_long (type, value_contents (arg));
1044 fptr = hppa64_convert_code_addr_to_fptr (codeptr);
1045 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), fptr);
1046 valbuf = fptrbuf;
1047 }
1048 else
1049 {
1050 valbuf = value_contents (arg);
1051 }
1052
38ca4e0c 1053 /* Always store the argument in memory. */
1218e655 1054 write_memory (sp + offset, valbuf, len);
38ca4e0c 1055
38ca4e0c
MK
1056 regnum = HPPA_ARG0_REGNUM - offset / 8;
1057 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1058 {
1059 regcache_cooked_write_part (regcache, regnum,
1060 offset % 8, min (len, 8), valbuf);
1061 offset += min (len, 8);
1062 valbuf += min (len, 8);
1063 len -= min (len, 8);
1064 regnum--;
2f690297 1065 }
38ca4e0c
MK
1066
1067 offset += len;
2f690297
AC
1068 }
1069
38ca4e0c
MK
1070 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1071 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1072
1073 /* Allocate the outgoing parameter area. Make sure the outgoing
1074 parameter area is multiple of 16 bytes in length. */
1075 sp += max (align_up (offset, 16), 64);
1076
1077 /* Allocate 32-bytes of scratch space. The documentation doesn't
1078 mention this, but it seems to be needed. */
1079 sp += 32;
1080
1081 /* Allocate the frame marker area. */
1082 sp += 16;
1083
1084 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1085 its address. */
2f690297 1086 if (struct_return)
38ca4e0c 1087 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1088
38ca4e0c 1089 /* Set up GR27 (%dp) to hold the global pointer (gp). */
77d18ded 1090 gp = tdep->find_global_pointer (function);
77d18ded 1091 if (gp != 0)
38ca4e0c 1092 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1093
38ca4e0c 1094 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1095 if (!gdbarch_push_dummy_code_p (gdbarch))
1096 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1097
38ca4e0c
MK
1098 /* Set up GR30 to hold the stack pointer (sp). */
1099 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1100
38ca4e0c 1101 return sp;
2f690297 1102}
38ca4e0c 1103\f
2f690297 1104
08a27113
MK
1105/* Handle 32/64-bit struct return conventions. */
1106
1107static enum return_value_convention
1108hppa32_return_value (struct gdbarch *gdbarch,
1109 struct type *type, struct regcache *regcache,
e127f0db 1110 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1111{
1112 if (TYPE_LENGTH (type) <= 2 * 4)
1113 {
1114 /* The value always lives in the right hand end of the register
1115 (or register pair)? */
1116 int b;
1117 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
1118 int part = TYPE_LENGTH (type) % 4;
1119 /* The left hand register contains only part of the value,
1120 transfer that first so that the rest can be xfered as entire
1121 4-byte registers. */
1122 if (part > 0)
1123 {
1124 if (readbuf != NULL)
1125 regcache_cooked_read_part (regcache, reg, 4 - part,
1126 part, readbuf);
1127 if (writebuf != NULL)
1128 regcache_cooked_write_part (regcache, reg, 4 - part,
1129 part, writebuf);
1130 reg++;
1131 }
1132 /* Now transfer the remaining register values. */
1133 for (b = part; b < TYPE_LENGTH (type); b += 4)
1134 {
1135 if (readbuf != NULL)
e127f0db 1136 regcache_cooked_read (regcache, reg, readbuf + b);
08a27113 1137 if (writebuf != NULL)
e127f0db 1138 regcache_cooked_write (regcache, reg, writebuf + b);
08a27113
MK
1139 reg++;
1140 }
1141 return RETURN_VALUE_REGISTER_CONVENTION;
1142 }
1143 else
1144 return RETURN_VALUE_STRUCT_CONVENTION;
1145}
1146
1147static enum return_value_convention
1148hppa64_return_value (struct gdbarch *gdbarch,
1149 struct type *type, struct regcache *regcache,
e127f0db 1150 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1151{
1152 int len = TYPE_LENGTH (type);
1153 int regnum, offset;
1154
1155 if (len > 16)
1156 {
1157 /* All return values larget than 128 bits must be aggregate
1158 return values. */
9738b034
MK
1159 gdb_assert (!hppa64_integral_or_pointer_p (type));
1160 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1161
1162 /* "Aggregate return values larger than 128 bits are returned in
1163 a buffer allocated by the caller. The address of the buffer
1164 must be passed in GR 28." */
1165 return RETURN_VALUE_STRUCT_CONVENTION;
1166 }
1167
1168 if (hppa64_integral_or_pointer_p (type))
1169 {
1170 /* "Integral return values are returned in GR 28. Values
1171 smaller than 64 bits are padded on the left (with garbage)." */
1172 regnum = HPPA_RET0_REGNUM;
1173 offset = 8 - len;
1174 }
1175 else if (hppa64_floating_p (type))
1176 {
1177 if (len > 8)
1178 {
1179 /* "Double-extended- and quad-precision floating-point
1180 values are returned in GRs 28 and 29. The sign,
1181 exponent, and most-significant bits of the mantissa are
1182 returned in GR 28; the least-significant bits of the
1183 mantissa are passed in GR 29. For double-extended
1184 precision values, GR 29 is padded on the right with 48
1185 bits of garbage." */
1186 regnum = HPPA_RET0_REGNUM;
1187 offset = 0;
1188 }
1189 else
1190 {
1191 /* "Single-precision and double-precision floating-point
1192 return values are returned in FR 4R (single precision) or
1193 FR 4 (double-precision)." */
1194 regnum = HPPA64_FP4_REGNUM;
1195 offset = 8 - len;
1196 }
1197 }
1198 else
1199 {
1200 /* "Aggregate return values up to 64 bits in size are returned
1201 in GR 28. Aggregates smaller than 64 bits are left aligned
1202 in the register; the pad bits on the right are undefined."
1203
1204 "Aggregate return values between 65 and 128 bits are returned
1205 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1206 the remaining bits are placed, left aligned, in GR 29. The
1207 pad bits on the right of GR 29 (if any) are undefined." */
1208 regnum = HPPA_RET0_REGNUM;
1209 offset = 0;
1210 }
1211
1212 if (readbuf)
1213 {
08a27113
MK
1214 while (len > 0)
1215 {
1216 regcache_cooked_read_part (regcache, regnum, offset,
e127f0db
MK
1217 min (len, 8), readbuf);
1218 readbuf += min (len, 8);
08a27113
MK
1219 len -= min (len, 8);
1220 regnum++;
1221 }
1222 }
1223
1224 if (writebuf)
1225 {
08a27113
MK
1226 while (len > 0)
1227 {
1228 regcache_cooked_write_part (regcache, regnum, offset,
e127f0db
MK
1229 min (len, 8), writebuf);
1230 writebuf += min (len, 8);
08a27113
MK
1231 len -= min (len, 8);
1232 regnum++;
1233 }
1234 }
1235
1236 return RETURN_VALUE_REGISTER_CONVENTION;
1237}
1238\f
1239
d49771ef 1240static CORE_ADDR
a7aad9aa 1241hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1242 struct target_ops *targ)
1243{
1244 if (addr & 2)
1245 {
a7aad9aa
MK
1246 CORE_ADDR plabel = addr & ~3;
1247 return read_memory_typed_address (plabel, builtin_type_void_func_ptr);
d49771ef
RC
1248 }
1249
1250 return addr;
1251}
1252
1797a8f6
AC
1253static CORE_ADDR
1254hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1255{
1256 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1257 and not _bit_)! */
1258 return align_up (addr, 64);
1259}
1260
2f690297
AC
1261/* Force all frames to 16-byte alignment. Better safe than sorry. */
1262
1263static CORE_ADDR
1797a8f6 1264hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1265{
1266 /* Just always 16-byte align. */
1267 return align_up (addr, 16);
1268}
1269
cc72850f 1270CORE_ADDR
61a1198a 1271hppa_read_pc (struct regcache *regcache)
c906108c 1272{
cc72850f 1273 ULONGEST ipsw;
61a1198a 1274 ULONGEST pc;
c906108c 1275
61a1198a
UW
1276 regcache_cooked_read_unsigned (regcache, HPPA_IPSW_REGNUM, &ipsw);
1277 regcache_cooked_read_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1278
1279 /* If the current instruction is nullified, then we are effectively
1280 still executing the previous instruction. Pretend we are still
cc72850f
MK
1281 there. This is needed when single stepping; if the nullified
1282 instruction is on a different line, we don't want GDB to think
1283 we've stepped onto that line. */
fe46cd3a
RC
1284 if (ipsw & 0x00200000)
1285 pc -= 4;
1286
cc72850f 1287 return pc & ~0x3;
c906108c
SS
1288}
1289
cc72850f 1290void
61a1198a 1291hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1292{
61a1198a
UW
1293 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1294 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1295}
1296
1297/* return the alignment of a type in bytes. Structures have the maximum
1298 alignment required by their fields. */
1299
1300static int
fba45db2 1301hppa_alignof (struct type *type)
c906108c
SS
1302{
1303 int max_align, align, i;
1304 CHECK_TYPEDEF (type);
1305 switch (TYPE_CODE (type))
1306 {
1307 case TYPE_CODE_PTR:
1308 case TYPE_CODE_INT:
1309 case TYPE_CODE_FLT:
1310 return TYPE_LENGTH (type);
1311 case TYPE_CODE_ARRAY:
1312 return hppa_alignof (TYPE_FIELD_TYPE (type, 0));
1313 case TYPE_CODE_STRUCT:
1314 case TYPE_CODE_UNION:
1315 max_align = 1;
1316 for (i = 0; i < TYPE_NFIELDS (type); i++)
1317 {
1318 /* Bit fields have no real alignment. */
1319 /* if (!TYPE_FIELD_BITPOS (type, i)) */
c5aa993b 1320 if (!TYPE_FIELD_BITSIZE (type, i)) /* elz: this should be bitsize */
c906108c
SS
1321 {
1322 align = hppa_alignof (TYPE_FIELD_TYPE (type, i));
1323 max_align = max (max_align, align);
1324 }
1325 }
1326 return max_align;
1327 default:
1328 return 4;
1329 }
1330}
1331
c906108c
SS
1332/* For the given instruction (INST), return any adjustment it makes
1333 to the stack pointer or zero for no adjustment.
1334
1335 This only handles instructions commonly found in prologues. */
1336
1337static int
fba45db2 1338prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1339{
1340 /* This must persist across calls. */
1341 static int save_high21;
1342
1343 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1344 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1345 return hppa_extract_14 (inst);
c906108c
SS
1346
1347 /* stwm X,D(sp) */
1348 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1349 return hppa_extract_14 (inst);
c906108c 1350
104c1213
JM
1351 /* std,ma X,D(sp) */
1352 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1353 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1354
e22b26cb 1355 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1356 save high bits in save_high21 for later use. */
e22b26cb 1357 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1358 {
abc485a1 1359 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1360 return 0;
1361 }
1362
1363 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1364 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1365
1366 /* fstws as used by the HP compilers. */
1367 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1368 return hppa_extract_5_load (inst);
c906108c
SS
1369
1370 /* No adjustment. */
1371 return 0;
1372}
1373
1374/* Return nonzero if INST is a branch of some kind, else return zero. */
1375
1376static int
fba45db2 1377is_branch (unsigned long inst)
c906108c
SS
1378{
1379 switch (inst >> 26)
1380 {
1381 case 0x20:
1382 case 0x21:
1383 case 0x22:
1384 case 0x23:
7be570e7 1385 case 0x27:
c906108c
SS
1386 case 0x28:
1387 case 0x29:
1388 case 0x2a:
1389 case 0x2b:
7be570e7 1390 case 0x2f:
c906108c
SS
1391 case 0x30:
1392 case 0x31:
1393 case 0x32:
1394 case 0x33:
1395 case 0x38:
1396 case 0x39:
1397 case 0x3a:
7be570e7 1398 case 0x3b:
c906108c
SS
1399 return 1;
1400
1401 default:
1402 return 0;
1403 }
1404}
1405
1406/* Return the register number for a GR which is saved by INST or
1407 zero it INST does not save a GR. */
1408
1409static int
fba45db2 1410inst_saves_gr (unsigned long inst)
c906108c
SS
1411{
1412 /* Does it look like a stw? */
7be570e7
JM
1413 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1414 || (inst >> 26) == 0x1f
1415 || ((inst >> 26) == 0x1f
1416 && ((inst >> 6) == 0xa)))
abc485a1 1417 return hppa_extract_5R_store (inst);
7be570e7
JM
1418
1419 /* Does it look like a std? */
1420 if ((inst >> 26) == 0x1c
1421 || ((inst >> 26) == 0x03
1422 && ((inst >> 6) & 0xf) == 0xb))
abc485a1 1423 return hppa_extract_5R_store (inst);
c906108c
SS
1424
1425 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
1426 if ((inst >> 26) == 0x1b)
abc485a1 1427 return hppa_extract_5R_store (inst);
c906108c
SS
1428
1429 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1430 too. */
7be570e7
JM
1431 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1432 || ((inst >> 26) == 0x3
1433 && (((inst >> 6) & 0xf) == 0x8
1434 || (inst >> 6) & 0xf) == 0x9))
abc485a1 1435 return hppa_extract_5R_store (inst);
c5aa993b 1436
c906108c
SS
1437 return 0;
1438}
1439
1440/* Return the register number for a FR which is saved by INST or
1441 zero it INST does not save a FR.
1442
1443 Note we only care about full 64bit register stores (that's the only
1444 kind of stores the prologue will use).
1445
1446 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1447
1448static int
fba45db2 1449inst_saves_fr (unsigned long inst)
c906108c 1450{
7be570e7 1451 /* is this an FSTD ? */
c906108c 1452 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1453 return hppa_extract_5r_store (inst);
7be570e7 1454 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1455 return hppa_extract_5R_store (inst);
7be570e7 1456 /* is this an FSTW ? */
c906108c 1457 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1458 return hppa_extract_5r_store (inst);
7be570e7 1459 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1460 return hppa_extract_5R_store (inst);
c906108c
SS
1461 return 0;
1462}
1463
1464/* Advance PC across any function entry prologue instructions
1465 to reach some "real" code.
1466
1467 Use information in the unwind table to determine what exactly should
1468 be in the prologue. */
1469
1470
a71f8c30
RC
1471static CORE_ADDR
1472skip_prologue_hard_way (CORE_ADDR pc, int stop_before_branch)
c906108c
SS
1473{
1474 char buf[4];
1475 CORE_ADDR orig_pc = pc;
1476 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1477 unsigned long args_stored, status, i, restart_gr, restart_fr;
1478 struct unwind_table_entry *u;
a71f8c30 1479 int final_iteration;
c906108c
SS
1480
1481 restart_gr = 0;
1482 restart_fr = 0;
1483
1484restart:
1485 u = find_unwind_entry (pc);
1486 if (!u)
1487 return pc;
1488
c5aa993b 1489 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1490 if ((pc & ~0x3) != u->region_start)
1491 return pc;
1492
1493 /* This is how much of a frame adjustment we need to account for. */
1494 stack_remaining = u->Total_frame_size << 3;
1495
1496 /* Magic register saves we want to know about. */
1497 save_rp = u->Save_RP;
1498 save_sp = u->Save_SP;
1499
1500 /* An indication that args may be stored into the stack. Unfortunately
1501 the HPUX compilers tend to set this in cases where no args were
1502 stored too!. */
1503 args_stored = 1;
1504
1505 /* Turn the Entry_GR field into a bitmask. */
1506 save_gr = 0;
1507 for (i = 3; i < u->Entry_GR + 3; i++)
1508 {
1509 /* Frame pointer gets saved into a special location. */
eded0a31 1510 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1511 continue;
1512
1513 save_gr |= (1 << i);
1514 }
1515 save_gr &= ~restart_gr;
1516
1517 /* Turn the Entry_FR field into a bitmask too. */
1518 save_fr = 0;
1519 for (i = 12; i < u->Entry_FR + 12; i++)
1520 save_fr |= (1 << i);
1521 save_fr &= ~restart_fr;
1522
a71f8c30
RC
1523 final_iteration = 0;
1524
c906108c
SS
1525 /* Loop until we find everything of interest or hit a branch.
1526
1527 For unoptimized GCC code and for any HP CC code this will never ever
1528 examine any user instructions.
1529
1530 For optimzied GCC code we're faced with problems. GCC will schedule
1531 its prologue and make prologue instructions available for delay slot
1532 filling. The end result is user code gets mixed in with the prologue
1533 and a prologue instruction may be in the delay slot of the first branch
1534 or call.
1535
1536 Some unexpected things are expected with debugging optimized code, so
1537 we allow this routine to walk past user instructions in optimized
1538 GCC code. */
1539 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1540 || args_stored)
1541 {
1542 unsigned int reg_num;
1543 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1544 unsigned long old_save_rp, old_save_sp, next_inst;
1545
1546 /* Save copies of all the triggers so we can compare them later
c5aa993b 1547 (only for HPC). */
c906108c
SS
1548 old_save_gr = save_gr;
1549 old_save_fr = save_fr;
1550 old_save_rp = save_rp;
1551 old_save_sp = save_sp;
1552 old_stack_remaining = stack_remaining;
1553
359a9262 1554 status = read_memory_nobpt (pc, buf, 4);
c906108c 1555 inst = extract_unsigned_integer (buf, 4);
c5aa993b 1556
c906108c
SS
1557 /* Yow! */
1558 if (status != 0)
1559 return pc;
1560
1561 /* Note the interesting effects of this instruction. */
1562 stack_remaining -= prologue_inst_adjust_sp (inst);
1563
7be570e7
JM
1564 /* There are limited ways to store the return pointer into the
1565 stack. */
c4c79048 1566 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1567 save_rp = 0;
1568
104c1213 1569 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1570 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1571 if ((inst & 0xffffc000) == 0x6fc10000
1572 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1573 save_sp = 0;
1574
6426a772
JM
1575 /* Are we loading some register with an offset from the argument
1576 pointer? */
1577 if ((inst & 0xffe00000) == 0x37a00000
1578 || (inst & 0xffffffe0) == 0x081d0240)
1579 {
1580 pc += 4;
1581 continue;
1582 }
1583
c906108c
SS
1584 /* Account for general and floating-point register saves. */
1585 reg_num = inst_saves_gr (inst);
1586 save_gr &= ~(1 << reg_num);
1587
1588 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1589 Unfortunately args_stored only tells us that some arguments
1590 where stored into the stack. Not how many or what kind!
c906108c 1591
c5aa993b
JM
1592 This is a kludge as on the HP compiler sets this bit and it
1593 never does prologue scheduling. So once we see one, skip past
1594 all of them. We have similar code for the fp arg stores below.
c906108c 1595
c5aa993b
JM
1596 FIXME. Can still die if we have a mix of GR and FR argument
1597 stores! */
819844ad
UW
1598 if (reg_num >= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 19 : 23)
1599 && reg_num <= 26)
c906108c 1600 {
819844ad
UW
1601 while (reg_num >= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 19 : 23)
1602 && reg_num <= 26)
c906108c
SS
1603 {
1604 pc += 4;
359a9262 1605 status = read_memory_nobpt (pc, buf, 4);
c906108c
SS
1606 inst = extract_unsigned_integer (buf, 4);
1607 if (status != 0)
1608 return pc;
1609 reg_num = inst_saves_gr (inst);
1610 }
1611 args_stored = 0;
1612 continue;
1613 }
1614
1615 reg_num = inst_saves_fr (inst);
1616 save_fr &= ~(1 << reg_num);
1617
359a9262 1618 status = read_memory_nobpt (pc + 4, buf, 4);
c906108c 1619 next_inst = extract_unsigned_integer (buf, 4);
c5aa993b 1620
c906108c
SS
1621 /* Yow! */
1622 if (status != 0)
1623 return pc;
1624
1625 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1626 save. */
c906108c
SS
1627 if ((inst & 0xfc000000) == 0x34000000
1628 && inst_saves_fr (next_inst) >= 4
819844ad
UW
1629 && inst_saves_fr (next_inst)
1630 <= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 11 : 7))
c906108c
SS
1631 {
1632 /* So we drop into the code below in a reasonable state. */
1633 reg_num = inst_saves_fr (next_inst);
1634 pc -= 4;
1635 }
1636
1637 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1638 This is a kludge as on the HP compiler sets this bit and it
1639 never does prologue scheduling. So once we see one, skip past
1640 all of them. */
819844ad
UW
1641 if (reg_num >= 4
1642 && reg_num <= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 11 : 7))
c906108c 1643 {
819844ad
UW
1644 while (reg_num >= 4
1645 && reg_num
1646 <= (gdbarch_ptr_bit (current_gdbarch) == 64 ? 11 : 7))
c906108c
SS
1647 {
1648 pc += 8;
359a9262 1649 status = read_memory_nobpt (pc, buf, 4);
c906108c
SS
1650 inst = extract_unsigned_integer (buf, 4);
1651 if (status != 0)
1652 return pc;
1653 if ((inst & 0xfc000000) != 0x34000000)
1654 break;
359a9262 1655 status = read_memory_nobpt (pc + 4, buf, 4);
c906108c
SS
1656 next_inst = extract_unsigned_integer (buf, 4);
1657 if (status != 0)
1658 return pc;
1659 reg_num = inst_saves_fr (next_inst);
1660 }
1661 args_stored = 0;
1662 continue;
1663 }
1664
1665 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1666 instruction is in the delay slot of the first call/branch. */
a71f8c30 1667 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1668 break;
1669
1670 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1671 arguments were stored into the stack (boo hiss). This could
1672 cause this code to then skip a bunch of user insns (up to the
1673 first branch).
1674
1675 To combat this we try to identify when args_stored was bogusly
1676 set and clear it. We only do this when args_stored is nonzero,
1677 all other resources are accounted for, and nothing changed on
1678 this pass. */
c906108c 1679 if (args_stored
c5aa993b 1680 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1681 && old_save_gr == save_gr && old_save_fr == save_fr
1682 && old_save_rp == save_rp && old_save_sp == save_sp
1683 && old_stack_remaining == stack_remaining)
1684 break;
c5aa993b 1685
c906108c
SS
1686 /* Bump the PC. */
1687 pc += 4;
a71f8c30
RC
1688
1689 /* !stop_before_branch, so also look at the insn in the delay slot
1690 of the branch. */
1691 if (final_iteration)
1692 break;
1693 if (is_branch (inst))
1694 final_iteration = 1;
c906108c
SS
1695 }
1696
1697 /* We've got a tenative location for the end of the prologue. However
1698 because of limitations in the unwind descriptor mechanism we may
1699 have went too far into user code looking for the save of a register
1700 that does not exist. So, if there registers we expected to be saved
1701 but never were, mask them out and restart.
1702
1703 This should only happen in optimized code, and should be very rare. */
c5aa993b 1704 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1705 {
1706 pc = orig_pc;
1707 restart_gr = save_gr;
1708 restart_fr = save_fr;
1709 goto restart;
1710 }
1711
1712 return pc;
1713}
1714
1715
7be570e7
JM
1716/* Return the address of the PC after the last prologue instruction if
1717 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1718
1719static CORE_ADDR
fba45db2 1720after_prologue (CORE_ADDR pc)
c906108c
SS
1721{
1722 struct symtab_and_line sal;
1723 CORE_ADDR func_addr, func_end;
1724 struct symbol *f;
1725
7be570e7
JM
1726 /* If we can not find the symbol in the partial symbol table, then
1727 there is no hope we can determine the function's start address
1728 with this code. */
c906108c 1729 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1730 return 0;
c906108c 1731
7be570e7 1732 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1733 sal = find_pc_line (func_addr, 0);
1734
7be570e7
JM
1735 /* There are only two cases to consider. First, the end of the source line
1736 is within the function bounds. In that case we return the end of the
1737 source line. Second is the end of the source line extends beyond the
1738 bounds of the current function. We need to use the slow code to
1739 examine instructions in that case.
c906108c 1740
7be570e7
JM
1741 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1742 the wrong thing to do. In fact, it should be entirely possible for this
1743 function to always return zero since the slow instruction scanning code
1744 is supposed to *always* work. If it does not, then it is a bug. */
1745 if (sal.end < func_end)
1746 return sal.end;
c5aa993b 1747 else
7be570e7 1748 return 0;
c906108c
SS
1749}
1750
1751/* To skip prologues, I use this predicate. Returns either PC itself
1752 if the code at PC does not look like a function prologue; otherwise
a71f8c30
RC
1753 returns an address that (if we're lucky) follows the prologue.
1754
1755 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1756 It doesn't necessarily skips all the insns in the prologue. In fact
1757 we might not want to skip all the insns because a prologue insn may
1758 appear in the delay slot of the first branch, and we don't want to
1759 skip over the branch in that case. */
c906108c 1760
8d153463 1761static CORE_ADDR
fba45db2 1762hppa_skip_prologue (CORE_ADDR pc)
c906108c 1763{
c5aa993b
JM
1764 unsigned long inst;
1765 int offset;
1766 CORE_ADDR post_prologue_pc;
1767 char buf[4];
c906108c 1768
c5aa993b
JM
1769 /* See if we can determine the end of the prologue via the symbol table.
1770 If so, then return either PC, or the PC after the prologue, whichever
1771 is greater. */
c906108c 1772
c5aa993b 1773 post_prologue_pc = after_prologue (pc);
c906108c 1774
7be570e7
JM
1775 /* If after_prologue returned a useful address, then use it. Else
1776 fall back on the instruction skipping code.
1777
1778 Some folks have claimed this causes problems because the breakpoint
1779 may be the first instruction of the prologue. If that happens, then
1780 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1781 if (post_prologue_pc != 0)
1782 return max (pc, post_prologue_pc);
c5aa993b 1783 else
a71f8c30 1784 return (skip_prologue_hard_way (pc, 1));
c906108c
SS
1785}
1786
29d375ac
RC
1787/* Return an unwind entry that falls within the frame's code block. */
1788static struct unwind_table_entry *
1789hppa_find_unwind_entry_in_block (struct frame_info *f)
1790{
93d42b30
DJ
1791 CORE_ADDR pc = frame_unwind_address_in_block (f, NORMAL_FRAME);
1792
1793 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
1794 result of frame_unwind_address_in_block implies a problem.
1795 The bits should have been removed earlier, before the return
1796 value of frame_pc_unwind. That might be happening already;
1797 if it isn't, it should be fixed. Then this call can be
1798 removed. */
29d375ac
RC
1799 pc = gdbarch_addr_bits_remove (get_frame_arch (f), pc);
1800 return find_unwind_entry (pc);
1801}
1802
26d08f08
AC
1803struct hppa_frame_cache
1804{
1805 CORE_ADDR base;
1806 struct trad_frame_saved_reg *saved_regs;
1807};
1808
1809static struct hppa_frame_cache *
1810hppa_frame_cache (struct frame_info *next_frame, void **this_cache)
1811{
1812 struct hppa_frame_cache *cache;
1813 long saved_gr_mask;
1814 long saved_fr_mask;
1815 CORE_ADDR this_sp;
1816 long frame_size;
1817 struct unwind_table_entry *u;
9f7194c3 1818 CORE_ADDR prologue_end;
50b2f48a 1819 int fp_in_r1 = 0;
26d08f08
AC
1820 int i;
1821
369aa520
RC
1822 if (hppa_debug)
1823 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
1824 frame_relative_level(next_frame));
1825
26d08f08 1826 if ((*this_cache) != NULL)
369aa520
RC
1827 {
1828 if (hppa_debug)
1829 fprintf_unfiltered (gdb_stdlog, "base=0x%s (cached) }",
1830 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
1831 return (*this_cache);
1832 }
26d08f08
AC
1833 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1834 (*this_cache) = cache;
1835 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1836
1837 /* Yow! */
29d375ac 1838 u = hppa_find_unwind_entry_in_block (next_frame);
26d08f08 1839 if (!u)
369aa520
RC
1840 {
1841 if (hppa_debug)
1842 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1843 return (*this_cache);
1844 }
26d08f08
AC
1845
1846 /* Turn the Entry_GR field into a bitmask. */
1847 saved_gr_mask = 0;
1848 for (i = 3; i < u->Entry_GR + 3; i++)
1849 {
1850 /* Frame pointer gets saved into a special location. */
eded0a31 1851 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1852 continue;
1853
1854 saved_gr_mask |= (1 << i);
1855 }
1856
1857 /* Turn the Entry_FR field into a bitmask too. */
1858 saved_fr_mask = 0;
1859 for (i = 12; i < u->Entry_FR + 12; i++)
1860 saved_fr_mask |= (1 << i);
1861
1862 /* Loop until we find everything of interest or hit a branch.
1863
1864 For unoptimized GCC code and for any HP CC code this will never ever
1865 examine any user instructions.
1866
1867 For optimized GCC code we're faced with problems. GCC will schedule
1868 its prologue and make prologue instructions available for delay slot
1869 filling. The end result is user code gets mixed in with the prologue
1870 and a prologue instruction may be in the delay slot of the first branch
1871 or call.
1872
1873 Some unexpected things are expected with debugging optimized code, so
1874 we allow this routine to walk past user instructions in optimized
1875 GCC code. */
1876 {
1877 int final_iteration = 0;
46acf081 1878 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1879 int looking_for_sp = u->Save_SP;
1880 int looking_for_rp = u->Save_RP;
1881 int fp_loc = -1;
9f7194c3 1882
a71f8c30 1883 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1884 skip_prologue_using_sal, in case we stepped into a function without
1885 symbol information. hppa_skip_prologue also bounds the returned
1886 pc by the passed in pc, so it will not return a pc in the next
a71f8c30
RC
1887 function.
1888
1889 We used to call hppa_skip_prologue to find the end of the prologue,
1890 but if some non-prologue instructions get scheduled into the prologue,
1891 and the program is compiled with debug information, the "easy" way
1892 in hppa_skip_prologue will return a prologue end that is too early
1893 for us to notice any potential frame adjustments. */
d5c27f81
RC
1894
1895 /* We used to use frame_func_unwind () to locate the beginning of the
1896 function to pass to skip_prologue (). However, when objects are
1897 compiled without debug symbols, frame_func_unwind can return the wrong
46acf081
RC
1898 function (or 0). We can do better than that by using unwind records.
1899 This only works if the Region_description of the unwind record
1900 indicates that it includes the entry point of the function.
1901 HP compilers sometimes generate unwind records for regions that
1902 do not include the entry or exit point of a function. GNU tools
1903 do not do this. */
1904
1905 if ((u->Region_description & 0x2) == 0)
1906 start_pc = u->region_start;
1907 else
93d42b30 1908 start_pc = frame_func_unwind (next_frame, NORMAL_FRAME);
d5c27f81 1909
46acf081 1910 prologue_end = skip_prologue_hard_way (start_pc, 0);
9f7194c3
RC
1911 end_pc = frame_pc_unwind (next_frame);
1912
1913 if (prologue_end != 0 && end_pc > prologue_end)
1914 end_pc = prologue_end;
1915
26d08f08 1916 frame_size = 0;
9f7194c3 1917
46acf081 1918 for (pc = start_pc;
26d08f08
AC
1919 ((saved_gr_mask || saved_fr_mask
1920 || looking_for_sp || looking_for_rp
1921 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1922 && pc < end_pc);
26d08f08
AC
1923 pc += 4)
1924 {
1925 int reg;
1926 char buf4[4];
4a302917
RC
1927 long inst;
1928
1929 if (!safe_frame_unwind_memory (next_frame, pc, buf4,
1930 sizeof buf4))
1931 {
8a3fe4f8 1932 error (_("Cannot read instruction at 0x%s."), paddr_nz (pc));
4a302917
RC
1933 return (*this_cache);
1934 }
1935
1936 inst = extract_unsigned_integer (buf4, sizeof buf4);
9f7194c3 1937
26d08f08
AC
1938 /* Note the interesting effects of this instruction. */
1939 frame_size += prologue_inst_adjust_sp (inst);
1940
1941 /* There are limited ways to store the return pointer into the
1942 stack. */
1943 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1944 {
1945 looking_for_rp = 0;
34f75cc1 1946 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08 1947 }
dfaf8edb
MK
1948 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
1949 {
1950 looking_for_rp = 0;
1951 cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
1952 }
c4c79048
RC
1953 else if (inst == 0x0fc212c1
1954 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
1955 {
1956 looking_for_rp = 0;
34f75cc1 1957 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
1958 }
1959
1960 /* Check to see if we saved SP into the stack. This also
1961 happens to indicate the location of the saved frame
1962 pointer. */
1963 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
1964 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
1965 {
1966 looking_for_sp = 0;
eded0a31 1967 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08 1968 }
50b2f48a
RC
1969 else if (inst == 0x08030241) /* copy %r3, %r1 */
1970 {
1971 fp_in_r1 = 1;
1972 }
26d08f08
AC
1973
1974 /* Account for general and floating-point register saves. */
1975 reg = inst_saves_gr (inst);
1976 if (reg >= 3 && reg <= 18
eded0a31 1977 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
1978 {
1979 saved_gr_mask &= ~(1 << reg);
abc485a1 1980 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
1981 /* stwm with a positive displacement is a _post_
1982 _modify_. */
1983 cache->saved_regs[reg].addr = 0;
1984 else if ((inst & 0xfc00000c) == 0x70000008)
1985 /* A std has explicit post_modify forms. */
1986 cache->saved_regs[reg].addr = 0;
1987 else
1988 {
1989 CORE_ADDR offset;
1990
1991 if ((inst >> 26) == 0x1c)
1992 offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
1993 else if ((inst >> 26) == 0x03)
abc485a1 1994 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 1995 else
abc485a1 1996 offset = hppa_extract_14 (inst);
26d08f08
AC
1997
1998 /* Handle code with and without frame pointers. */
1999 if (u->Save_SP)
2000 cache->saved_regs[reg].addr = offset;
2001 else
2002 cache->saved_regs[reg].addr = (u->Total_frame_size << 3) + offset;
2003 }
2004 }
2005
2006 /* GCC handles callee saved FP regs a little differently.
2007
2008 It emits an instruction to put the value of the start of
2009 the FP store area into %r1. It then uses fstds,ma with a
2010 basereg of %r1 for the stores.
2011
2012 HP CC emits them at the current stack pointer modifying the
2013 stack pointer as it stores each register. */
2014
2015 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2016 if ((inst & 0xffffc000) == 0x34610000
2017 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2018 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2019
2020 reg = inst_saves_fr (inst);
2021 if (reg >= 12 && reg <= 21)
2022 {
2023 /* Note +4 braindamage below is necessary because the FP
2024 status registers are internally 8 registers rather than
2025 the expected 4 registers. */
2026 saved_fr_mask &= ~(1 << reg);
2027 if (fp_loc == -1)
2028 {
2029 /* 1st HP CC FP register store. After this
2030 instruction we've set enough state that the GCC and
2031 HPCC code are both handled in the same manner. */
34f75cc1 2032 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
2033 fp_loc = 8;
2034 }
2035 else
2036 {
eded0a31 2037 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
2038 fp_loc += 8;
2039 }
2040 }
2041
2042 /* Quit if we hit any kind of branch the previous iteration. */
2043 if (final_iteration)
2044 break;
2045 /* We want to look precisely one instruction beyond the branch
2046 if we have not found everything yet. */
2047 if (is_branch (inst))
2048 final_iteration = 1;
2049 }
2050 }
2051
2052 {
2053 /* The frame base always represents the value of %sp at entry to
2054 the current function (and is thus equivalent to the "saved"
2055 stack pointer. */
eded0a31 2056 CORE_ADDR this_sp = frame_unwind_register_unsigned (next_frame, HPPA_SP_REGNUM);
ed70ba00 2057 CORE_ADDR fp;
9f7194c3
RC
2058
2059 if (hppa_debug)
2060 fprintf_unfiltered (gdb_stdlog, " (this_sp=0x%s, pc=0x%s, "
2061 "prologue_end=0x%s) ",
2062 paddr_nz (this_sp),
2063 paddr_nz (frame_pc_unwind (next_frame)),
2064 paddr_nz (prologue_end));
2065
ed70ba00
RC
2066 /* Check to see if a frame pointer is available, and use it for
2067 frame unwinding if it is.
2068
2069 There are some situations where we need to rely on the frame
2070 pointer to do stack unwinding. For example, if a function calls
2071 alloca (), the stack pointer can get adjusted inside the body of
2072 the function. In this case, the ABI requires that the compiler
2073 maintain a frame pointer for the function.
2074
2075 The unwind record has a flag (alloca_frame) that indicates that
2076 a function has a variable frame; unfortunately, gcc/binutils
2077 does not set this flag. Instead, whenever a frame pointer is used
2078 and saved on the stack, the Save_SP flag is set. We use this to
2079 decide whether to use the frame pointer for unwinding.
2080
ed70ba00
RC
2081 TODO: For the HP compiler, maybe we should use the alloca_frame flag
2082 instead of Save_SP. */
2083
2084 fp = frame_unwind_register_unsigned (next_frame, HPPA_FP_REGNUM);
46acf081 2085
6fcecea0 2086 if (u->alloca_frame)
46acf081 2087 fp -= u->Total_frame_size << 3;
ed70ba00
RC
2088
2089 if (frame_pc_unwind (next_frame) >= prologue_end
6fcecea0 2090 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00
RC
2091 {
2092 cache->base = fp;
2093
2094 if (hppa_debug)
9ed5ba24 2095 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [frame pointer]",
ed70ba00
RC
2096 paddr_nz (cache->base));
2097 }
1658da49
RC
2098 else if (u->Save_SP
2099 && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
9f7194c3 2100 {
9f7194c3
RC
2101 /* Both we're expecting the SP to be saved and the SP has been
2102 saved. The entry SP value is saved at this frame's SP
2103 address. */
819844ad
UW
2104 cache->base = read_memory_integer
2105 (this_sp, gdbarch_ptr_bit (current_gdbarch) / 8);
9f7194c3
RC
2106
2107 if (hppa_debug)
9ed5ba24 2108 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [saved]",
9f7194c3 2109 paddr_nz (cache->base));
9f7194c3 2110 }
26d08f08 2111 else
9f7194c3 2112 {
1658da49
RC
2113 /* The prologue has been slowly allocating stack space. Adjust
2114 the SP back. */
2115 cache->base = this_sp - frame_size;
9f7194c3 2116 if (hppa_debug)
9ed5ba24 2117 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [unwind adjust]",
9f7194c3
RC
2118 paddr_nz (cache->base));
2119
2120 }
eded0a31 2121 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
2122 }
2123
412275d5
AC
2124 /* The PC is found in the "return register", "Millicode" uses "r31"
2125 as the return register while normal code uses "rp". */
26d08f08 2126 if (u->Millicode)
9f7194c3 2127 {
5859efe5 2128 if (trad_frame_addr_p (cache->saved_regs, 31))
9ed5ba24
RC
2129 {
2130 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2131 if (hppa_debug)
2132 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
2133 }
9f7194c3
RC
2134 else
2135 {
2136 ULONGEST r31 = frame_unwind_register_unsigned (next_frame, 31);
34f75cc1 2137 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9ed5ba24
RC
2138 if (hppa_debug)
2139 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
9f7194c3
RC
2140 }
2141 }
26d08f08 2142 else
9f7194c3 2143 {
34f75cc1 2144 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
9ed5ba24
RC
2145 {
2146 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2147 cache->saved_regs[HPPA_RP_REGNUM];
2148 if (hppa_debug)
2149 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
2150 }
9f7194c3
RC
2151 else
2152 {
34f75cc1
RC
2153 ULONGEST rp = frame_unwind_register_unsigned (next_frame, HPPA_RP_REGNUM);
2154 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9ed5ba24
RC
2155 if (hppa_debug)
2156 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2157 }
2158 }
26d08f08 2159
50b2f48a
RC
2160 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2161 frame. However, there is a one-insn window where we haven't saved it
2162 yet, but we've already clobbered it. Detect this case and fix it up.
2163
2164 The prologue sequence for frame-pointer functions is:
2165 0: stw %rp, -20(%sp)
2166 4: copy %r3, %r1
2167 8: copy %sp, %r3
2168 c: stw,ma %r1, XX(%sp)
2169
2170 So if we are at offset c, the r3 value that we want is not yet saved
2171 on the stack, but it's been overwritten. The prologue analyzer will
2172 set fp_in_r1 when it sees the copy insn so we know to get the value
2173 from r1 instead. */
2174 if (u->Save_SP && !trad_frame_addr_p (cache->saved_regs, HPPA_FP_REGNUM)
2175 && fp_in_r1)
2176 {
2177 ULONGEST r1 = frame_unwind_register_unsigned (next_frame, 1);
2178 trad_frame_set_value (cache->saved_regs, HPPA_FP_REGNUM, r1);
2179 }
1658da49 2180
26d08f08
AC
2181 {
2182 /* Convert all the offsets into addresses. */
2183 int reg;
f57d151a 2184 for (reg = 0; reg < gdbarch_num_regs (current_gdbarch); reg++)
26d08f08
AC
2185 {
2186 if (trad_frame_addr_p (cache->saved_regs, reg))
2187 cache->saved_regs[reg].addr += cache->base;
2188 }
2189 }
2190
f77a2124
RC
2191 {
2192 struct gdbarch *gdbarch;
2193 struct gdbarch_tdep *tdep;
2194
2195 gdbarch = get_frame_arch (next_frame);
2196 tdep = gdbarch_tdep (gdbarch);
2197
2198 if (tdep->unwind_adjust_stub)
2199 {
2200 tdep->unwind_adjust_stub (next_frame, cache->base, cache->saved_regs);
2201 }
2202 }
2203
369aa520
RC
2204 if (hppa_debug)
2205 fprintf_unfiltered (gdb_stdlog, "base=0x%s }",
2206 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
2207 return (*this_cache);
2208}
2209
2210static void
2211hppa_frame_this_id (struct frame_info *next_frame, void **this_cache,
2212 struct frame_id *this_id)
2213{
d5c27f81
RC
2214 struct hppa_frame_cache *info;
2215 CORE_ADDR pc = frame_pc_unwind (next_frame);
2216 struct unwind_table_entry *u;
2217
2218 info = hppa_frame_cache (next_frame, this_cache);
29d375ac 2219 u = hppa_find_unwind_entry_in_block (next_frame);
d5c27f81
RC
2220
2221 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2222}
2223
2224static void
2225hppa_frame_prev_register (struct frame_info *next_frame,
0da28f8a
RC
2226 void **this_cache,
2227 int regnum, int *optimizedp,
2228 enum lval_type *lvalp, CORE_ADDR *addrp,
e127f0db 2229 int *realnump, gdb_byte *valuep)
26d08f08
AC
2230{
2231 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
0da28f8a
RC
2232 hppa_frame_prev_register_helper (next_frame, info->saved_regs, regnum,
2233 optimizedp, lvalp, addrp, realnump, valuep);
2234}
2235
2236static const struct frame_unwind hppa_frame_unwind =
2237{
2238 NORMAL_FRAME,
2239 hppa_frame_this_id,
2240 hppa_frame_prev_register
2241};
2242
2243static const struct frame_unwind *
2244hppa_frame_unwind_sniffer (struct frame_info *next_frame)
2245{
29d375ac 2246 if (hppa_find_unwind_entry_in_block (next_frame))
0da28f8a
RC
2247 return &hppa_frame_unwind;
2248
2249 return NULL;
2250}
2251
2252/* This is a generic fallback frame unwinder that kicks in if we fail all
2253 the other ones. Normally we would expect the stub and regular unwinder
2254 to work, but in some cases we might hit a function that just doesn't
2255 have any unwind information available. In this case we try to do
2256 unwinding solely based on code reading. This is obviously going to be
2257 slow, so only use this as a last resort. Currently this will only
2258 identify the stack and pc for the frame. */
2259
2260static struct hppa_frame_cache *
2261hppa_fallback_frame_cache (struct frame_info *next_frame, void **this_cache)
2262{
2263 struct hppa_frame_cache *cache;
4ba6a975
MK
2264 unsigned int frame_size = 0;
2265 int found_rp = 0;
2266 CORE_ADDR start_pc;
0da28f8a 2267
d5c27f81 2268 if (hppa_debug)
4ba6a975
MK
2269 fprintf_unfiltered (gdb_stdlog,
2270 "{ hppa_fallback_frame_cache (frame=%d) -> ",
2271 frame_relative_level (next_frame));
d5c27f81 2272
0da28f8a
RC
2273 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2274 (*this_cache) = cache;
2275 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2276
93d42b30 2277 start_pc = frame_func_unwind (next_frame, NORMAL_FRAME);
4ba6a975 2278 if (start_pc)
0da28f8a 2279 {
4ba6a975
MK
2280 CORE_ADDR cur_pc = frame_pc_unwind (next_frame);
2281 CORE_ADDR pc;
0da28f8a 2282
4ba6a975
MK
2283 for (pc = start_pc; pc < cur_pc; pc += 4)
2284 {
2285 unsigned int insn;
0da28f8a 2286
4ba6a975
MK
2287 insn = read_memory_unsigned_integer (pc, 4);
2288 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2289
4ba6a975
MK
2290 /* There are limited ways to store the return pointer into the
2291 stack. */
2292 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2293 {
2294 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
2295 found_rp = 1;
2296 }
c4c79048
RC
2297 else if (insn == 0x0fc212c1
2298 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975
MK
2299 {
2300 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
2301 found_rp = 1;
2302 }
2303 }
412275d5 2304 }
0da28f8a 2305
d5c27f81 2306 if (hppa_debug)
4ba6a975
MK
2307 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2308 frame_size, found_rp);
d5c27f81 2309
4ba6a975
MK
2310 cache->base = frame_unwind_register_unsigned (next_frame, HPPA_SP_REGNUM);
2311 cache->base -= frame_size;
6d1be3f1 2312 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
0da28f8a
RC
2313
2314 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
2315 {
2316 cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
4ba6a975
MK
2317 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2318 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2319 }
412275d5
AC
2320 else
2321 {
4ba6a975
MK
2322 ULONGEST rp;
2323 rp = frame_unwind_register_unsigned (next_frame, HPPA_RP_REGNUM);
0da28f8a 2324 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
412275d5 2325 }
0da28f8a
RC
2326
2327 return cache;
26d08f08
AC
2328}
2329
0da28f8a
RC
2330static void
2331hppa_fallback_frame_this_id (struct frame_info *next_frame, void **this_cache,
2332 struct frame_id *this_id)
2333{
2334 struct hppa_frame_cache *info =
2335 hppa_fallback_frame_cache (next_frame, this_cache);
93d42b30
DJ
2336 (*this_id) = frame_id_build (info->base,
2337 frame_func_unwind (next_frame, NORMAL_FRAME));
0da28f8a
RC
2338}
2339
2340static void
2341hppa_fallback_frame_prev_register (struct frame_info *next_frame,
2342 void **this_cache,
2343 int regnum, int *optimizedp,
2344 enum lval_type *lvalp, CORE_ADDR *addrp,
e127f0db 2345 int *realnump, gdb_byte *valuep)
0da28f8a
RC
2346{
2347 struct hppa_frame_cache *info =
2348 hppa_fallback_frame_cache (next_frame, this_cache);
2349 hppa_frame_prev_register_helper (next_frame, info->saved_regs, regnum,
2350 optimizedp, lvalp, addrp, realnump, valuep);
2351}
2352
2353static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2354{
2355 NORMAL_FRAME,
0da28f8a
RC
2356 hppa_fallback_frame_this_id,
2357 hppa_fallback_frame_prev_register
26d08f08
AC
2358};
2359
2360static const struct frame_unwind *
0da28f8a 2361hppa_fallback_unwind_sniffer (struct frame_info *next_frame)
26d08f08 2362{
0da28f8a 2363 return &hppa_fallback_frame_unwind;
26d08f08
AC
2364}
2365
7f07c5b6
RC
2366/* Stub frames, used for all kinds of call stubs. */
2367struct hppa_stub_unwind_cache
2368{
2369 CORE_ADDR base;
2370 struct trad_frame_saved_reg *saved_regs;
2371};
2372
2373static struct hppa_stub_unwind_cache *
2374hppa_stub_frame_unwind_cache (struct frame_info *next_frame,
2375 void **this_cache)
2376{
2377 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2378 struct hppa_stub_unwind_cache *info;
22b0923d 2379 struct unwind_table_entry *u;
7f07c5b6
RC
2380
2381 if (*this_cache)
2382 return *this_cache;
2383
2384 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2385 *this_cache = info;
2386 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2387
7f07c5b6
RC
2388 info->base = frame_unwind_register_unsigned (next_frame, HPPA_SP_REGNUM);
2389
090ccbb7 2390 if (gdbarch_osabi (gdbarch) == GDB_OSABI_HPUX_SOM)
22b0923d
RC
2391 {
2392 /* HPUX uses export stubs in function calls; the export stub clobbers
2393 the return value of the caller, and, later restores it from the
2394 stack. */
2395 u = find_unwind_entry (frame_pc_unwind (next_frame));
2396
2397 if (u && u->stub_unwind.stub_type == EXPORT)
2398 {
2399 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = info->base - 24;
2400
2401 return info;
2402 }
2403 }
2404
2405 /* By default we assume that stubs do not change the rp. */
2406 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
2407
7f07c5b6
RC
2408 return info;
2409}
2410
2411static void
2412hppa_stub_frame_this_id (struct frame_info *next_frame,
2413 void **this_prologue_cache,
2414 struct frame_id *this_id)
2415{
2416 struct hppa_stub_unwind_cache *info
2417 = hppa_stub_frame_unwind_cache (next_frame, this_prologue_cache);
f1b38a57
RC
2418
2419 if (info)
93d42b30
DJ
2420 *this_id = frame_id_build (info->base,
2421 frame_func_unwind (next_frame, NORMAL_FRAME));
f1b38a57
RC
2422 else
2423 *this_id = null_frame_id;
7f07c5b6
RC
2424}
2425
2426static void
2427hppa_stub_frame_prev_register (struct frame_info *next_frame,
2428 void **this_prologue_cache,
2429 int regnum, int *optimizedp,
2430 enum lval_type *lvalp, CORE_ADDR *addrp,
e127f0db 2431 int *realnump, gdb_byte *valuep)
7f07c5b6
RC
2432{
2433 struct hppa_stub_unwind_cache *info
2434 = hppa_stub_frame_unwind_cache (next_frame, this_prologue_cache);
f1b38a57
RC
2435
2436 if (info)
2437 hppa_frame_prev_register_helper (next_frame, info->saved_regs, regnum,
2438 optimizedp, lvalp, addrp, realnump,
2439 valuep);
2440 else
8a3fe4f8 2441 error (_("Requesting registers from null frame."));
7f07c5b6
RC
2442}
2443
2444static const struct frame_unwind hppa_stub_frame_unwind = {
2445 NORMAL_FRAME,
2446 hppa_stub_frame_this_id,
2447 hppa_stub_frame_prev_register
2448};
2449
2450static const struct frame_unwind *
2451hppa_stub_unwind_sniffer (struct frame_info *next_frame)
2452{
93d42b30 2453 CORE_ADDR pc = frame_unwind_address_in_block (next_frame, NORMAL_FRAME);
84674fe1
AC
2454 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2455 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2456
6d1be3f1 2457 if (pc == 0
84674fe1
AC
2458 || (tdep->in_solib_call_trampoline != NULL
2459 && tdep->in_solib_call_trampoline (pc, NULL))
464963c9 2460 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
7f07c5b6
RC
2461 return &hppa_stub_frame_unwind;
2462 return NULL;
2463}
2464
26d08f08
AC
2465static struct frame_id
2466hppa_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2467{
2468 return frame_id_build (frame_unwind_register_unsigned (next_frame,
eded0a31 2469 HPPA_SP_REGNUM),
26d08f08
AC
2470 frame_pc_unwind (next_frame));
2471}
2472
cc72850f 2473CORE_ADDR
26d08f08
AC
2474hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2475{
fe46cd3a
RC
2476 ULONGEST ipsw;
2477 CORE_ADDR pc;
2478
cc72850f
MK
2479 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2480 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2481
2482 /* If the current instruction is nullified, then we are effectively
2483 still executing the previous instruction. Pretend we are still
cc72850f
MK
2484 there. This is needed when single stepping; if the nullified
2485 instruction is on a different line, we don't want GDB to think
2486 we've stepped onto that line. */
fe46cd3a
RC
2487 if (ipsw & 0x00200000)
2488 pc -= 4;
2489
cc72850f 2490 return pc & ~0x3;
26d08f08
AC
2491}
2492
ff644745
JB
2493/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2494 Return NULL if no such symbol was found. */
2495
2496struct minimal_symbol *
2497hppa_lookup_stub_minimal_symbol (const char *name,
2498 enum unwind_stub_types stub_type)
2499{
2500 struct objfile *objfile;
2501 struct minimal_symbol *msym;
2502
2503 ALL_MSYMBOLS (objfile, msym)
2504 {
2505 if (strcmp (SYMBOL_LINKAGE_NAME (msym), name) == 0)
2506 {
2507 struct unwind_table_entry *u;
2508
2509 u = find_unwind_entry (SYMBOL_VALUE (msym));
2510 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2511 return msym;
2512 }
2513 }
2514
2515 return NULL;
2516}
2517
c906108c 2518static void
fba45db2 2519unwind_command (char *exp, int from_tty)
c906108c
SS
2520{
2521 CORE_ADDR address;
2522 struct unwind_table_entry *u;
2523
2524 /* If we have an expression, evaluate it and use it as the address. */
2525
2526 if (exp != 0 && *exp != 0)
2527 address = parse_and_eval_address (exp);
2528 else
2529 return;
2530
2531 u = find_unwind_entry (address);
2532
2533 if (!u)
2534 {
2535 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2536 return;
2537 }
2538
99d64d77 2539 printf_unfiltered ("unwind_table_entry (0x%lx):\n", (unsigned long)u);
c906108c
SS
2540
2541 printf_unfiltered ("\tregion_start = ");
2542 print_address (u->region_start, gdb_stdout);
d5c27f81 2543 gdb_flush (gdb_stdout);
c906108c
SS
2544
2545 printf_unfiltered ("\n\tregion_end = ");
2546 print_address (u->region_end, gdb_stdout);
d5c27f81 2547 gdb_flush (gdb_stdout);
c906108c 2548
c906108c 2549#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2550
2551 printf_unfiltered ("\n\tflags =");
2552 pif (Cannot_unwind);
2553 pif (Millicode);
2554 pif (Millicode_save_sr0);
2555 pif (Entry_SR);
2556 pif (Args_stored);
2557 pif (Variable_Frame);
2558 pif (Separate_Package_Body);
2559 pif (Frame_Extension_Millicode);
2560 pif (Stack_Overflow_Check);
2561 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2562 pif (sr4export);
2563 pif (cxx_info);
2564 pif (cxx_try_catch);
2565 pif (sched_entry_seq);
c906108c
SS
2566 pif (Save_SP);
2567 pif (Save_RP);
2568 pif (Save_MRP_in_frame);
6fcecea0 2569 pif (save_r19);
c906108c
SS
2570 pif (Cleanup_defined);
2571 pif (MPE_XL_interrupt_marker);
2572 pif (HP_UX_interrupt_marker);
2573 pif (Large_frame);
6fcecea0 2574 pif (alloca_frame);
c906108c
SS
2575
2576 putchar_unfiltered ('\n');
2577
c906108c 2578#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2579
2580 pin (Region_description);
2581 pin (Entry_FR);
2582 pin (Entry_GR);
2583 pin (Total_frame_size);
57dac9e1
RC
2584
2585 if (u->stub_unwind.stub_type)
2586 {
2587 printf_unfiltered ("\tstub type = ");
2588 switch (u->stub_unwind.stub_type)
2589 {
2590 case LONG_BRANCH:
2591 printf_unfiltered ("long branch\n");
2592 break;
2593 case PARAMETER_RELOCATION:
2594 printf_unfiltered ("parameter relocation\n");
2595 break;
2596 case EXPORT:
2597 printf_unfiltered ("export\n");
2598 break;
2599 case IMPORT:
2600 printf_unfiltered ("import\n");
2601 break;
2602 case IMPORT_SHLIB:
2603 printf_unfiltered ("import shlib\n");
2604 break;
2605 default:
2606 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2607 }
2608 }
c906108c 2609}
c906108c 2610
38ca4e0c
MK
2611/* Return the GDB type object for the "standard" data type of data in
2612 register REGNUM. */
d709c020 2613
eded0a31 2614static struct type *
38ca4e0c 2615hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2616{
38ca4e0c 2617 if (regnum < HPPA_FP4_REGNUM)
eded0a31 2618 return builtin_type_uint32;
d709c020 2619 else
8da61cc4 2620 return builtin_type_ieee_single;
d709c020
JB
2621}
2622
eded0a31 2623static struct type *
38ca4e0c 2624hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2625{
38ca4e0c 2626 if (regnum < HPPA64_FP4_REGNUM)
eded0a31 2627 return builtin_type_uint64;
3ff7cf9e 2628 else
8da61cc4 2629 return builtin_type_ieee_double;
3ff7cf9e
JB
2630}
2631
38ca4e0c
MK
2632/* Return non-zero if REGNUM is not a register available to the user
2633 through ptrace/ttrace. */
d709c020 2634
8d153463 2635static int
38ca4e0c 2636hppa32_cannot_store_register (int regnum)
d709c020
JB
2637{
2638 return (regnum == 0
34f75cc1
RC
2639 || regnum == HPPA_PCSQ_HEAD_REGNUM
2640 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2641 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2642}
d709c020 2643
d037d088
CD
2644static int
2645hppa32_cannot_fetch_register (int regnum)
2646{
2647 /* cr26 and cr27 are readable (but not writable) from userspace. */
2648 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2649 return 0;
2650 else
2651 return hppa32_cannot_store_register (regnum);
2652}
2653
38ca4e0c
MK
2654static int
2655hppa64_cannot_store_register (int regnum)
2656{
2657 return (regnum == 0
2658 || regnum == HPPA_PCSQ_HEAD_REGNUM
2659 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2660 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2661}
2662
d037d088
CD
2663static int
2664hppa64_cannot_fetch_register (int regnum)
2665{
2666 /* cr26 and cr27 are readable (but not writable) from userspace. */
2667 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2668 return 0;
2669 else
2670 return hppa64_cannot_store_register (regnum);
2671}
2672
8d153463 2673static CORE_ADDR
d709c020
JB
2674hppa_smash_text_address (CORE_ADDR addr)
2675{
2676 /* The low two bits of the PC on the PA contain the privilege level.
2677 Some genius implementing a (non-GCC) compiler apparently decided
2678 this means that "addresses" in a text section therefore include a
2679 privilege level, and thus symbol tables should contain these bits.
2680 This seems like a bonehead thing to do--anyway, it seems to work
2681 for our purposes to just ignore those bits. */
2682
2683 return (addr &= ~0x3);
2684}
2685
e127f0db
MK
2686/* Get the ARGIth function argument for the current function. */
2687
4a302917 2688static CORE_ADDR
143985b7
AF
2689hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2690 struct type *type)
2691{
e127f0db 2692 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2693}
2694
0f8d9d59
RC
2695static void
2696hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
e127f0db 2697 int regnum, gdb_byte *buf)
0f8d9d59
RC
2698{
2699 ULONGEST tmp;
2700
2701 regcache_raw_read_unsigned (regcache, regnum, &tmp);
34f75cc1 2702 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
0f8d9d59 2703 tmp &= ~0x3;
e127f0db 2704 store_unsigned_integer (buf, sizeof tmp, tmp);
0f8d9d59
RC
2705}
2706
d49771ef
RC
2707static CORE_ADDR
2708hppa_find_global_pointer (struct value *function)
2709{
2710 return 0;
2711}
2712
0da28f8a
RC
2713void
2714hppa_frame_prev_register_helper (struct frame_info *next_frame,
2715 struct trad_frame_saved_reg saved_regs[],
2716 int regnum, int *optimizedp,
2717 enum lval_type *lvalp, CORE_ADDR *addrp,
a7aad9aa 2718 int *realnump, gdb_byte *valuep)
0da28f8a 2719{
8f4e467c
MK
2720 struct gdbarch *arch = get_frame_arch (next_frame);
2721
8693c419
MK
2722 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2723 {
2724 if (valuep)
2725 {
8f4e467c 2726 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
8693c419 2727 CORE_ADDR pc;
0da28f8a 2728
1f67027d
AC
2729 trad_frame_get_prev_register (next_frame, saved_regs,
2730 HPPA_PCOQ_HEAD_REGNUM, optimizedp,
2731 lvalp, addrp, realnump, valuep);
8693c419 2732
8f4e467c
MK
2733 pc = extract_unsigned_integer (valuep, size);
2734 store_unsigned_integer (valuep, size, pc + 4);
8693c419
MK
2735 }
2736
2737 /* It's a computed value. */
2738 *optimizedp = 0;
2739 *lvalp = not_lval;
2740 *addrp = 0;
2741 *realnump = -1;
2742 return;
2743 }
0da28f8a 2744
cc72850f
MK
2745 /* Make sure the "flags" register is zero in all unwound frames.
2746 The "flags" registers is a HP-UX specific wart, and only the code
2747 in hppa-hpux-tdep.c depends on it. However, it is easier to deal
2748 with it here. This shouldn't affect other systems since those
2749 should provide zero for the "flags" register anyway. */
2750 if (regnum == HPPA_FLAGS_REGNUM)
2751 {
2752 if (valuep)
8f4e467c 2753 store_unsigned_integer (valuep, register_size (arch, regnum), 0);
cc72850f
MK
2754
2755 /* It's a computed value. */
2756 *optimizedp = 0;
2757 *lvalp = not_lval;
2758 *addrp = 0;
2759 *realnump = -1;
2760 return;
2761 }
2762
1f67027d
AC
2763 trad_frame_get_prev_register (next_frame, saved_regs, regnum,
2764 optimizedp, lvalp, addrp, realnump, valuep);
0da28f8a 2765}
8693c419 2766\f
0da28f8a 2767
34f55018
MK
2768/* An instruction to match. */
2769struct insn_pattern
2770{
2771 unsigned int data; /* See if it matches this.... */
2772 unsigned int mask; /* ... with this mask. */
2773};
2774
2775/* See bfd/elf32-hppa.c */
2776static struct insn_pattern hppa_long_branch_stub[] = {
2777 /* ldil LR'xxx,%r1 */
2778 { 0x20200000, 0xffe00000 },
2779 /* be,n RR'xxx(%sr4,%r1) */
2780 { 0xe0202002, 0xffe02002 },
2781 { 0, 0 }
2782};
2783
2784static struct insn_pattern hppa_long_branch_pic_stub[] = {
2785 /* b,l .+8, %r1 */
2786 { 0xe8200000, 0xffe00000 },
2787 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2788 { 0x28200000, 0xffe00000 },
2789 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2790 { 0xe0202002, 0xffe02002 },
2791 { 0, 0 }
2792};
2793
2794static struct insn_pattern hppa_import_stub[] = {
2795 /* addil LR'xxx, %dp */
2796 { 0x2b600000, 0xffe00000 },
2797 /* ldw RR'xxx(%r1), %r21 */
2798 { 0x48350000, 0xffffb000 },
2799 /* bv %r0(%r21) */
2800 { 0xeaa0c000, 0xffffffff },
2801 /* ldw RR'xxx+4(%r1), %r19 */
2802 { 0x48330000, 0xffffb000 },
2803 { 0, 0 }
2804};
2805
2806static struct insn_pattern hppa_import_pic_stub[] = {
2807 /* addil LR'xxx,%r19 */
2808 { 0x2a600000, 0xffe00000 },
2809 /* ldw RR'xxx(%r1),%r21 */
2810 { 0x48350000, 0xffffb000 },
2811 /* bv %r0(%r21) */
2812 { 0xeaa0c000, 0xffffffff },
2813 /* ldw RR'xxx+4(%r1),%r19 */
2814 { 0x48330000, 0xffffb000 },
2815 { 0, 0 },
2816};
2817
2818static struct insn_pattern hppa_plt_stub[] = {
2819 /* b,l 1b, %r20 - 1b is 3 insns before here */
2820 { 0xea9f1fdd, 0xffffffff },
2821 /* depi 0,31,2,%r20 */
2822 { 0xd6801c1e, 0xffffffff },
2823 { 0, 0 }
2824};
2825
2826static struct insn_pattern hppa_sigtramp[] = {
2827 /* ldi 0, %r25 or ldi 1, %r25 */
2828 { 0x34190000, 0xfffffffd },
2829 /* ldi __NR_rt_sigreturn, %r20 */
2830 { 0x3414015a, 0xffffffff },
2831 /* be,l 0x100(%sr2, %r0), %sr0, %r31 */
2832 { 0xe4008200, 0xffffffff },
2833 /* nop */
2834 { 0x08000240, 0xffffffff },
2835 { 0, 0 }
2836};
2837
2838/* Maximum number of instructions on the patterns above. */
2839#define HPPA_MAX_INSN_PATTERN_LEN 4
2840
2841/* Return non-zero if the instructions at PC match the series
2842 described in PATTERN, or zero otherwise. PATTERN is an array of
2843 'struct insn_pattern' objects, terminated by an entry whose mask is
2844 zero.
2845
2846 When the match is successful, fill INSN[i] with what PATTERN[i]
2847 matched. */
2848
2849static int
2850hppa_match_insns (CORE_ADDR pc, struct insn_pattern *pattern,
2851 unsigned int *insn)
2852{
2853 CORE_ADDR npc = pc;
2854 int i;
2855
2856 for (i = 0; pattern[i].mask; i++)
2857 {
2858 gdb_byte buf[HPPA_INSN_SIZE];
2859
359a9262 2860 read_memory_nobpt (npc, buf, HPPA_INSN_SIZE);
34f55018
MK
2861 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE);
2862 if ((insn[i] & pattern[i].mask) == pattern[i].data)
2863 npc += 4;
2864 else
2865 return 0;
2866 }
2867
2868 return 1;
2869}
2870
2871/* This relaxed version of the insstruction matcher allows us to match
2872 from somewhere inside the pattern, by looking backwards in the
2873 instruction scheme. */
2874
2875static int
2876hppa_match_insns_relaxed (CORE_ADDR pc, struct insn_pattern *pattern,
2877 unsigned int *insn)
2878{
2879 int offset, len = 0;
2880
2881 while (pattern[len].mask)
2882 len++;
2883
2884 for (offset = 0; offset < len; offset++)
2885 if (hppa_match_insns (pc - offset * HPPA_INSN_SIZE, pattern, insn))
2886 return 1;
2887
2888 return 0;
2889}
2890
2891static int
2892hppa_in_dyncall (CORE_ADDR pc)
2893{
2894 struct unwind_table_entry *u;
2895
2896 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2897 if (!u)
2898 return 0;
2899
2900 return (pc >= u->region_start && pc <= u->region_end);
2901}
2902
2903int
2904hppa_in_solib_call_trampoline (CORE_ADDR pc, char *name)
2905{
2906 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2907 struct unwind_table_entry *u;
2908
2909 if (in_plt_section (pc, name) || hppa_in_dyncall (pc))
2910 return 1;
2911
2912 /* The GNU toolchain produces linker stubs without unwind
2913 information. Since the pattern matching for linker stubs can be
2914 quite slow, so bail out if we do have an unwind entry. */
2915
2916 u = find_unwind_entry (pc);
806e23c0 2917 if (u != NULL)
34f55018
MK
2918 return 0;
2919
2920 return (hppa_match_insns_relaxed (pc, hppa_import_stub, insn)
2921 || hppa_match_insns_relaxed (pc, hppa_import_pic_stub, insn)
2922 || hppa_match_insns_relaxed (pc, hppa_long_branch_stub, insn)
2923 || hppa_match_insns_relaxed (pc, hppa_long_branch_pic_stub, insn));
2924}
2925
2926/* This code skips several kind of "trampolines" used on PA-RISC
2927 systems: $$dyncall, import stubs and PLT stubs. */
2928
2929CORE_ADDR
52f729a7 2930hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018
MK
2931{
2932 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2933 int dp_rel;
2934
2935 /* $$dyncall handles both PLABELs and direct addresses. */
2936 if (hppa_in_dyncall (pc))
2937 {
52f729a7 2938 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2939
2940 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2941 if (pc & 0x2)
2942 pc = read_memory_typed_address (pc & ~0x3, builtin_type_void_func_ptr);
2943
2944 return pc;
2945 }
2946
2947 dp_rel = hppa_match_insns (pc, hppa_import_stub, insn);
2948 if (dp_rel || hppa_match_insns (pc, hppa_import_pic_stub, insn))
2949 {
2950 /* Extract the target address from the addil/ldw sequence. */
2951 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2952
2953 if (dp_rel)
52f729a7 2954 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2955 else
52f729a7 2956 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2957
2958 /* fallthrough */
2959 }
2960
2961 if (in_plt_section (pc, NULL))
2962 {
2963 pc = read_memory_typed_address (pc, builtin_type_void_func_ptr);
2964
2965 /* If the PLT slot has not yet been resolved, the target will be
2966 the PLT stub. */
2967 if (in_plt_section (pc, NULL))
2968 {
2969 /* Sanity check: are we pointing to the PLT stub? */
2970 if (!hppa_match_insns (pc, hppa_plt_stub, insn))
2971 {
2972 warning (_("Cannot resolve PLT stub at 0x%s."), paddr_nz (pc));
2973 return 0;
2974 }
2975
2976 /* This should point to the fixup routine. */
2977 pc = read_memory_typed_address (pc + 8, builtin_type_void_func_ptr);
2978 }
2979 }
2980
2981 return pc;
2982}
2983\f
2984
8e8b2dba
MC
2985/* Here is a table of C type sizes on hppa with various compiles
2986 and options. I measured this on PA 9000/800 with HP-UX 11.11
2987 and these compilers:
2988
2989 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2990 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2991 /opt/aCC/bin/aCC B3910B A.03.45
2992 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2993
2994 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2995 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2996 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2997 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2998 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2999 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3000 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3001 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3002
3003 Each line is:
3004
3005 compiler and options
3006 char, short, int, long, long long
3007 float, double, long double
3008 char *, void (*)()
3009
3010 So all these compilers use either ILP32 or LP64 model.
3011 TODO: gcc has more options so it needs more investigation.
3012
a2379359
MC
3013 For floating point types, see:
3014
3015 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3016 HP-UX floating-point guide, hpux 11.00
3017
8e8b2dba
MC
3018 -- chastain 2003-12-18 */
3019
e6e68f1f
JB
3020static struct gdbarch *
3021hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3022{
3ff7cf9e 3023 struct gdbarch_tdep *tdep;
e6e68f1f 3024 struct gdbarch *gdbarch;
59623e27
JB
3025
3026 /* Try to determine the ABI of the object we are loading. */
4be87837 3027 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 3028 {
4be87837
DJ
3029 /* If it's a SOM file, assume it's HP/UX SOM. */
3030 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
3031 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 3032 }
e6e68f1f
JB
3033
3034 /* find a candidate among the list of pre-declared architectures. */
3035 arches = gdbarch_list_lookup_by_info (arches, &info);
3036 if (arches != NULL)
3037 return (arches->gdbarch);
3038
3039 /* If none found, then allocate and initialize one. */
fdd72f95 3040 tdep = XZALLOC (struct gdbarch_tdep);
3ff7cf9e
JB
3041 gdbarch = gdbarch_alloc (&info, tdep);
3042
3043 /* Determine from the bfd_arch_info structure if we are dealing with
3044 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3045 then default to a 32bit machine. */
3046 if (info.bfd_arch_info != NULL)
3047 tdep->bytes_per_address =
3048 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3049 else
3050 tdep->bytes_per_address = 4;
3051
d49771ef
RC
3052 tdep->find_global_pointer = hppa_find_global_pointer;
3053
3ff7cf9e
JB
3054 /* Some parts of the gdbarch vector depend on whether we are running
3055 on a 32 bits or 64 bits target. */
3056 switch (tdep->bytes_per_address)
3057 {
3058 case 4:
3059 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3060 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 3061 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3062 set_gdbarch_cannot_store_register (gdbarch,
3063 hppa32_cannot_store_register);
3064 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3065 hppa32_cannot_fetch_register);
3ff7cf9e
JB
3066 break;
3067 case 8:
3068 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3069 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 3070 set_gdbarch_register_type (gdbarch, hppa64_register_type);
1ef7fcb5
RC
3071 set_gdbarch_dwarf_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
3072 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3073 set_gdbarch_cannot_store_register (gdbarch,
3074 hppa64_cannot_store_register);
3075 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3076 hppa64_cannot_fetch_register);
3ff7cf9e
JB
3077 break;
3078 default:
e2e0b3e5 3079 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3ff7cf9e
JB
3080 tdep->bytes_per_address);
3081 }
3082
3ff7cf9e 3083 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3084 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3085
8e8b2dba
MC
3086 /* The following gdbarch vector elements are the same in both ILP32
3087 and LP64, but might show differences some day. */
3088 set_gdbarch_long_long_bit (gdbarch, 64);
3089 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3090 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3091
3ff7cf9e
JB
3092 /* The following gdbarch vector elements do not depend on the address
3093 size, or in any other gdbarch element previously set. */
60383d10 3094 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
1fb24930
RC
3095 set_gdbarch_in_function_epilogue_p (gdbarch,
3096 hppa_in_function_epilogue_p);
a2a84a72 3097 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3098 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3099 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
b6fbdd1d 3100 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
3101 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
3102 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3103 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3104 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3105
143985b7
AF
3106 /* Helper for function argument information. */
3107 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3108
36482093
AC
3109 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
3110
3a3bc038
AC
3111 /* When a hardware watchpoint triggers, we'll move the inferior past
3112 it by removing all eventpoints; stepping past the instruction
3113 that caused the trigger; reinserting eventpoints; and checking
3114 whether any watched location changed. */
3115 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3116
5979bc46 3117 /* Inferior function call methods. */
fca7aa43 3118 switch (tdep->bytes_per_address)
5979bc46 3119 {
fca7aa43
AC
3120 case 4:
3121 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3122 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef
RC
3123 set_gdbarch_convert_from_func_ptr_addr
3124 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3125 break;
3126 case 8:
782eae8b
AC
3127 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3128 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3129 break;
782eae8b 3130 default:
e2e0b3e5 3131 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3132 }
3133
3134 /* Struct return methods. */
fca7aa43 3135 switch (tdep->bytes_per_address)
fad850b2 3136 {
fca7aa43
AC
3137 case 4:
3138 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3139 break;
3140 case 8:
782eae8b 3141 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3142 break;
fca7aa43 3143 default:
e2e0b3e5 3144 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3145 }
7f07c5b6 3146
85f4f2d8 3147 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 3148 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3149
5979bc46 3150 /* Frame unwind methods. */
782eae8b
AC
3151 set_gdbarch_unwind_dummy_id (gdbarch, hppa_unwind_dummy_id);
3152 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3153
50306a9d
RC
3154 /* Hook in ABI-specific overrides, if they have been registered. */
3155 gdbarch_init_osabi (info, gdbarch);
3156
7f07c5b6
RC
3157 /* Hook in the default unwinders. */
3158 frame_unwind_append_sniffer (gdbarch, hppa_stub_unwind_sniffer);
782eae8b 3159 frame_unwind_append_sniffer (gdbarch, hppa_frame_unwind_sniffer);
0da28f8a 3160 frame_unwind_append_sniffer (gdbarch, hppa_fallback_unwind_sniffer);
5979bc46 3161
e6e68f1f
JB
3162 return gdbarch;
3163}
3164
3165static void
464963c9 3166hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3167{
464963c9 3168 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3169
3170 fprintf_unfiltered (file, "bytes_per_address = %d\n",
3171 tdep->bytes_per_address);
3172 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3173}
3174
4facf7e8
JB
3175void
3176_initialize_hppa_tdep (void)
3177{
3178 struct cmd_list_element *c;
4facf7e8 3179
e6e68f1f 3180 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 3181
7c46b9fb
RC
3182 hppa_objfile_priv_data = register_objfile_data ();
3183
4facf7e8 3184 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3185 _("Print unwind table entry at given address."),
4facf7e8
JB
3186 &maintenanceprintlist);
3187
369aa520 3188 /* Debug this files internals. */
7915a72c
AC
3189 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3190Set whether hppa target specific debugging information should be displayed."),
3191 _("\
3192Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3193This flag controls whether hppa target specific debugging information is\n\
3194displayed. This information is particularly useful for debugging frame\n\
7915a72c 3195unwinding problems."),
2c5b56ce 3196 NULL,
7915a72c 3197 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3198 &setdebuglist, &showdebuglist);
4facf7e8 3199}
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