* config/djgpp/fnchange.lst: Add translation rules for
[deliverable/binutils-gdb.git] / gdb / hppa-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the HP PA architecture, for GDB.
cda5a58a
AC
2
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
adc11376
AC
4 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
5 Foundation, Inc.
c906108c
SS
6
7 Contributed by the Center for Software Science at the
8 University of Utah (pa-gdb-bugs@cs.utah.edu).
9
c5aa993b 10 This file is part of GDB.
c906108c 11
c5aa993b
JM
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
c906108c 16
c5aa993b
JM
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
c906108c 21
c5aa993b
JM
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place - Suite 330,
25 Boston, MA 02111-1307, USA. */
c906108c
SS
26
27#include "defs.h"
28#include "frame.h"
29#include "bfd.h"
30#include "inferior.h"
31#include "value.h"
4e052eda 32#include "regcache.h"
e5d66720 33#include "completer.h"
d709c020 34#include "language.h"
59623e27 35#include "osabi.h"
a7ff40e7 36#include "gdb_assert.h"
65e82032 37#include "infttrace.h"
343af405 38#include "arch-utils.h"
c906108c
SS
39/* For argument passing to the inferior */
40#include "symtab.h"
04714b91 41#include "infcall.h"
fde2cceb 42#include "dis-asm.h"
26d08f08
AC
43#include "trad-frame.h"
44#include "frame-unwind.h"
45#include "frame-base.h"
c906108c 46
c906108c 47#include "gdb_stat.h"
03f2053f 48#include "gdb_wait.h"
c906108c
SS
49
50#include "gdbcore.h"
51#include "gdbcmd.h"
52#include "target.h"
53#include "symfile.h"
54#include "objfiles.h"
3ff7cf9e 55#include "hppa-tdep.h"
c906108c 56
369aa520
RC
57static int hppa_debug = 0;
58
60383d10 59/* Some local constants. */
3ff7cf9e
JB
60static const int hppa32_num_regs = 128;
61static const int hppa64_num_regs = 96;
62
7c46b9fb
RC
63/* hppa-specific object data -- unwind and solib info.
64 TODO/maybe: think about splitting this into two parts; the unwind data is
65 common to all hppa targets, but is only used in this file; we can register
66 that separately and make this static. The solib data is probably hpux-
67 specific, so we can create a separate extern objfile_data that is registered
68 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
69const struct objfile_data *hppa_objfile_priv_data = NULL;
70
e2ac8128
JB
71/* Get at various relevent fields of an instruction word. */
72#define MASK_5 0x1f
73#define MASK_11 0x7ff
74#define MASK_14 0x3fff
75#define MASK_21 0x1fffff
76
e2ac8128
JB
77/* Define offsets into the call dummy for the _sr4export address.
78 See comments related to CALL_DUMMY for more info. */
7c46b9fb
RC
79#define SR4EXPORT_LDIL_OFFSET (HPPA_INSTRUCTION_SIZE * 12)
80#define SR4EXPORT_LDO_OFFSET (HPPA_INSTRUCTION_SIZE * 13)
e2ac8128 81
c906108c
SS
82/* To support detection of the pseudo-initial frame
83 that threads have. */
84#define THREAD_INITIAL_FRAME_SYMBOL "__pthread_exit"
85#define THREAD_INITIAL_FRAME_SYM_LEN sizeof(THREAD_INITIAL_FRAME_SYMBOL)
c5aa993b 86
e2ac8128
JB
87/* Sizes (in bytes) of the native unwind entries. */
88#define UNWIND_ENTRY_SIZE 16
89#define STUB_UNWIND_ENTRY_SIZE 8
90
a14ed312 91static void unwind_command (char *, int);
c906108c 92
a14ed312 93static int hppa_alignof (struct type *);
c906108c 94
a14ed312 95static int prologue_inst_adjust_sp (unsigned long);
c906108c 96
a14ed312 97static int is_branch (unsigned long);
c906108c 98
a14ed312 99static int inst_saves_gr (unsigned long);
c906108c 100
a14ed312 101static int inst_saves_fr (unsigned long);
c906108c 102
a14ed312 103static int compare_unwind_entries (const void *, const void *);
c906108c 104
a14ed312 105static void read_unwind_info (struct objfile *);
c906108c 106
a14ed312
KB
107static void internalize_unwinds (struct objfile *,
108 struct unwind_table_entry *,
109 asection *, unsigned int,
110 unsigned int, CORE_ADDR);
a14ed312 111static void record_text_segment_lowaddr (bfd *, asection *, void *);
d709c020
JB
112/* FIXME: brobecker 2002-11-07: We will likely be able to make the
113 following functions static, once we hppa is partially multiarched. */
d709c020
JB
114int hppa_pc_requires_run_before_use (CORE_ADDR pc);
115int hppa_instruction_nullified (void);
c906108c 116
537987fc
AC
117/* Handle 32/64-bit struct return conventions. */
118
119static enum return_value_convention
120hppa32_return_value (struct gdbarch *gdbarch,
121 struct type *type, struct regcache *regcache,
122 void *readbuf, const void *writebuf)
123{
537987fc
AC
124 if (TYPE_LENGTH (type) <= 2 * 4)
125 {
126 /* The value always lives in the right hand end of the register
127 (or register pair)? */
128 int b;
34f75cc1 129 int reg = TYPE_CODE (type) == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
537987fc
AC
130 int part = TYPE_LENGTH (type) % 4;
131 /* The left hand register contains only part of the value,
132 transfer that first so that the rest can be xfered as entire
133 4-byte registers. */
134 if (part > 0)
135 {
136 if (readbuf != NULL)
137 regcache_cooked_read_part (regcache, reg, 4 - part,
138 part, readbuf);
139 if (writebuf != NULL)
140 regcache_cooked_write_part (regcache, reg, 4 - part,
141 part, writebuf);
142 reg++;
143 }
144 /* Now transfer the remaining register values. */
145 for (b = part; b < TYPE_LENGTH (type); b += 4)
146 {
147 if (readbuf != NULL)
148 regcache_cooked_read (regcache, reg, (char *) readbuf + b);
149 if (writebuf != NULL)
150 regcache_cooked_write (regcache, reg, (const char *) writebuf + b);
151 reg++;
152 }
153 return RETURN_VALUE_REGISTER_CONVENTION;
154 }
155 else
156 return RETURN_VALUE_STRUCT_CONVENTION;
157}
158
159static enum return_value_convention
160hppa64_return_value (struct gdbarch *gdbarch,
161 struct type *type, struct regcache *regcache,
162 void *readbuf, const void *writebuf)
163{
164 /* RM: Floats are returned in FR4R, doubles in FR4. Integral values
165 are in r28, padded on the left. Aggregates less that 65 bits are
166 in r28, right padded. Aggregates upto 128 bits are in r28 and
167 r29, right padded. */
449e1137
AC
168 if (TYPE_CODE (type) == TYPE_CODE_FLT
169 && TYPE_LENGTH (type) <= 8)
537987fc
AC
170 {
171 /* Floats are right aligned? */
34f75cc1 172 int offset = register_size (gdbarch, HPPA_FP4_REGNUM) - TYPE_LENGTH (type);
537987fc 173 if (readbuf != NULL)
34f75cc1 174 regcache_cooked_read_part (regcache, HPPA_FP4_REGNUM, offset,
537987fc
AC
175 TYPE_LENGTH (type), readbuf);
176 if (writebuf != NULL)
34f75cc1 177 regcache_cooked_write_part (regcache, HPPA_FP4_REGNUM, offset,
537987fc
AC
178 TYPE_LENGTH (type), writebuf);
179 return RETURN_VALUE_REGISTER_CONVENTION;
180 }
181 else if (TYPE_LENGTH (type) <= 8 && is_integral_type (type))
182 {
183 /* Integrals are right aligned. */
34f75cc1 184 int offset = register_size (gdbarch, HPPA_FP4_REGNUM) - TYPE_LENGTH (type);
537987fc
AC
185 if (readbuf != NULL)
186 regcache_cooked_read_part (regcache, 28, offset,
187 TYPE_LENGTH (type), readbuf);
188 if (writebuf != NULL)
189 regcache_cooked_write_part (regcache, 28, offset,
190 TYPE_LENGTH (type), writebuf);
191 return RETURN_VALUE_REGISTER_CONVENTION;
192 }
193 else if (TYPE_LENGTH (type) <= 2 * 8)
194 {
195 /* Composite values are left aligned. */
196 int b;
197 for (b = 0; b < TYPE_LENGTH (type); b += 8)
198 {
449e1137 199 int part = min (8, TYPE_LENGTH (type) - b);
537987fc 200 if (readbuf != NULL)
449e1137 201 regcache_cooked_read_part (regcache, 28 + b / 8, 0, part,
537987fc
AC
202 (char *) readbuf + b);
203 if (writebuf != NULL)
449e1137 204 regcache_cooked_write_part (regcache, 28 + b / 8, 0, part,
537987fc
AC
205 (const char *) writebuf + b);
206 }
449e1137 207 return RETURN_VALUE_REGISTER_CONVENTION;
537987fc
AC
208 }
209 else
210 return RETURN_VALUE_STRUCT_CONVENTION;
211}
212
c906108c
SS
213/* Routines to extract various sized constants out of hppa
214 instructions. */
215
216/* This assumes that no garbage lies outside of the lower bits of
217 value. */
218
abc485a1
RC
219int
220hppa_sign_extend (unsigned val, unsigned bits)
c906108c 221{
c5aa993b 222 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
c906108c
SS
223}
224
225/* For many immediate values the sign bit is the low bit! */
226
abc485a1
RC
227int
228hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 229{
c5aa993b 230 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
c906108c
SS
231}
232
e2ac8128
JB
233/* Extract the bits at positions between FROM and TO, using HP's numbering
234 (MSB = 0). */
235
abc485a1
RC
236int
237hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
238{
239 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
240}
241
c906108c
SS
242/* extract the immediate field from a ld{bhw}s instruction */
243
abc485a1
RC
244int
245hppa_extract_5_load (unsigned word)
c906108c 246{
abc485a1 247 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
248}
249
c906108c
SS
250/* extract the immediate field from a break instruction */
251
abc485a1
RC
252unsigned
253hppa_extract_5r_store (unsigned word)
c906108c
SS
254{
255 return (word & MASK_5);
256}
257
258/* extract the immediate field from a {sr}sm instruction */
259
abc485a1
RC
260unsigned
261hppa_extract_5R_store (unsigned word)
c906108c
SS
262{
263 return (word >> 16 & MASK_5);
264}
265
c906108c
SS
266/* extract a 14 bit immediate field */
267
abc485a1
RC
268int
269hppa_extract_14 (unsigned word)
c906108c 270{
abc485a1 271 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
272}
273
c906108c
SS
274/* extract a 21 bit constant */
275
abc485a1
RC
276int
277hppa_extract_21 (unsigned word)
c906108c
SS
278{
279 int val;
280
281 word &= MASK_21;
282 word <<= 11;
abc485a1 283 val = hppa_get_field (word, 20, 20);
c906108c 284 val <<= 11;
abc485a1 285 val |= hppa_get_field (word, 9, 19);
c906108c 286 val <<= 2;
abc485a1 287 val |= hppa_get_field (word, 5, 6);
c906108c 288 val <<= 5;
abc485a1 289 val |= hppa_get_field (word, 0, 4);
c906108c 290 val <<= 2;
abc485a1
RC
291 val |= hppa_get_field (word, 7, 8);
292 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
293}
294
c906108c
SS
295/* extract a 17 bit constant from branch instructions, returning the
296 19 bit signed value. */
297
abc485a1
RC
298int
299hppa_extract_17 (unsigned word)
c906108c 300{
abc485a1
RC
301 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
302 hppa_get_field (word, 29, 29) << 10 |
303 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
304 (word & 0x1) << 16, 17) << 2;
305}
306\f
307
308/* Compare the start address for two unwind entries returning 1 if
309 the first address is larger than the second, -1 if the second is
310 larger than the first, and zero if they are equal. */
311
312static int
fba45db2 313compare_unwind_entries (const void *arg1, const void *arg2)
c906108c
SS
314{
315 const struct unwind_table_entry *a = arg1;
316 const struct unwind_table_entry *b = arg2;
317
318 if (a->region_start > b->region_start)
319 return 1;
320 else if (a->region_start < b->region_start)
321 return -1;
322 else
323 return 0;
324}
325
53a5351d 326static void
fdd72f95 327record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 328{
fdd72f95 329 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 330 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
331 {
332 bfd_vma value = section->vma - section->filepos;
333 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
334
335 if (value < *low_text_segment_address)
336 *low_text_segment_address = value;
337 }
53a5351d
JM
338}
339
c906108c 340static void
fba45db2
KB
341internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
342 asection *section, unsigned int entries, unsigned int size,
343 CORE_ADDR text_offset)
c906108c
SS
344{
345 /* We will read the unwind entries into temporary memory, then
346 fill in the actual unwind table. */
fdd72f95 347
c906108c
SS
348 if (size > 0)
349 {
350 unsigned long tmp;
351 unsigned i;
352 char *buf = alloca (size);
fdd72f95 353 CORE_ADDR low_text_segment_address;
c906108c 354
fdd72f95 355 /* For ELF targets, then unwinds are supposed to
c2c6d25f
JM
356 be segment relative offsets instead of absolute addresses.
357
358 Note that when loading a shared library (text_offset != 0) the
359 unwinds are already relative to the text_offset that will be
360 passed in. */
fdd72f95 361 if (gdbarch_tdep (current_gdbarch)->is_elf && text_offset == 0)
53a5351d 362 {
fdd72f95
RC
363 low_text_segment_address = -1;
364
53a5351d 365 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
366 record_text_segment_lowaddr,
367 &low_text_segment_address);
53a5351d 368
fdd72f95 369 text_offset = low_text_segment_address;
53a5351d
JM
370 }
371
c906108c
SS
372 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
373
374 /* Now internalize the information being careful to handle host/target
c5aa993b 375 endian issues. */
c906108c
SS
376 for (i = 0; i < entries; i++)
377 {
378 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 379 (bfd_byte *) buf);
c906108c
SS
380 table[i].region_start += text_offset;
381 buf += 4;
c5aa993b 382 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
383 table[i].region_end += text_offset;
384 buf += 4;
c5aa993b 385 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
386 buf += 4;
387 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
388 table[i].Millicode = (tmp >> 30) & 0x1;
389 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
390 table[i].Region_description = (tmp >> 27) & 0x3;
391 table[i].reserved1 = (tmp >> 26) & 0x1;
392 table[i].Entry_SR = (tmp >> 25) & 0x1;
393 table[i].Entry_FR = (tmp >> 21) & 0xf;
394 table[i].Entry_GR = (tmp >> 16) & 0x1f;
395 table[i].Args_stored = (tmp >> 15) & 0x1;
396 table[i].Variable_Frame = (tmp >> 14) & 0x1;
397 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
398 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
399 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
400 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
401 table[i].Ada_Region = (tmp >> 9) & 0x1;
402 table[i].cxx_info = (tmp >> 8) & 0x1;
403 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
404 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
405 table[i].reserved2 = (tmp >> 5) & 0x1;
406 table[i].Save_SP = (tmp >> 4) & 0x1;
407 table[i].Save_RP = (tmp >> 3) & 0x1;
408 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
409 table[i].extn_ptr_defined = (tmp >> 1) & 0x1;
410 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 411 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
412 buf += 4;
413 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
414 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
415 table[i].Large_frame = (tmp >> 29) & 0x1;
416 table[i].Pseudo_SP_Set = (tmp >> 28) & 0x1;
417 table[i].reserved4 = (tmp >> 27) & 0x1;
418 table[i].Total_frame_size = tmp & 0x7ffffff;
419
c5aa993b 420 /* Stub unwinds are handled elsewhere. */
c906108c
SS
421 table[i].stub_unwind.stub_type = 0;
422 table[i].stub_unwind.padding = 0;
423 }
424 }
425}
426
427/* Read in the backtrace information stored in the `$UNWIND_START$' section of
428 the object file. This info is used mainly by find_unwind_entry() to find
429 out the stack frame size and frame pointer used by procedures. We put
430 everything on the psymbol obstack in the objfile so that it automatically
431 gets freed when the objfile is destroyed. */
432
433static void
fba45db2 434read_unwind_info (struct objfile *objfile)
c906108c 435{
d4f3574e
SS
436 asection *unwind_sec, *stub_unwind_sec;
437 unsigned unwind_size, stub_unwind_size, total_size;
438 unsigned index, unwind_entries;
c906108c
SS
439 unsigned stub_entries, total_entries;
440 CORE_ADDR text_offset;
7c46b9fb
RC
441 struct hppa_unwind_info *ui;
442 struct hppa_objfile_private *obj_private;
c906108c
SS
443
444 text_offset = ANOFFSET (objfile->section_offsets, 0);
7c46b9fb
RC
445 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
446 sizeof (struct hppa_unwind_info));
c906108c
SS
447
448 ui->table = NULL;
449 ui->cache = NULL;
450 ui->last = -1;
451
d4f3574e
SS
452 /* For reasons unknown the HP PA64 tools generate multiple unwinder
453 sections in a single executable. So we just iterate over every
454 section in the BFD looking for unwinder sections intead of trying
455 to do a lookup with bfd_get_section_by_name.
c906108c 456
d4f3574e
SS
457 First determine the total size of the unwind tables so that we
458 can allocate memory in a nice big hunk. */
459 total_entries = 0;
460 for (unwind_sec = objfile->obfd->sections;
461 unwind_sec;
462 unwind_sec = unwind_sec->next)
c906108c 463 {
d4f3574e
SS
464 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
465 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
466 {
467 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
468 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 469
d4f3574e
SS
470 total_entries += unwind_entries;
471 }
c906108c
SS
472 }
473
d4f3574e
SS
474 /* Now compute the size of the stub unwinds. Note the ELF tools do not
475 use stub unwinds at the curren time. */
476 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
477
c906108c
SS
478 if (stub_unwind_sec)
479 {
480 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
481 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
482 }
483 else
484 {
485 stub_unwind_size = 0;
486 stub_entries = 0;
487 }
488
489 /* Compute total number of unwind entries and their total size. */
d4f3574e 490 total_entries += stub_entries;
c906108c
SS
491 total_size = total_entries * sizeof (struct unwind_table_entry);
492
493 /* Allocate memory for the unwind table. */
494 ui->table = (struct unwind_table_entry *)
8b92e4d5 495 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 496 ui->last = total_entries - 1;
c906108c 497
d4f3574e
SS
498 /* Now read in each unwind section and internalize the standard unwind
499 entries. */
c906108c 500 index = 0;
d4f3574e
SS
501 for (unwind_sec = objfile->obfd->sections;
502 unwind_sec;
503 unwind_sec = unwind_sec->next)
504 {
505 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
506 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
507 {
508 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
509 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
510
511 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
512 unwind_entries, unwind_size, text_offset);
513 index += unwind_entries;
514 }
515 }
516
517 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
518 if (stub_unwind_size > 0)
519 {
520 unsigned int i;
521 char *buf = alloca (stub_unwind_size);
522
523 /* Read in the stub unwind entries. */
524 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
525 0, stub_unwind_size);
526
527 /* Now convert them into regular unwind entries. */
528 for (i = 0; i < stub_entries; i++, index++)
529 {
530 /* Clear out the next unwind entry. */
531 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
532
533 /* Convert offset & size into region_start and region_end.
534 Stuff away the stub type into "reserved" fields. */
535 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
536 (bfd_byte *) buf);
537 ui->table[index].region_start += text_offset;
538 buf += 4;
539 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 540 (bfd_byte *) buf);
c906108c
SS
541 buf += 2;
542 ui->table[index].region_end
c5aa993b
JM
543 = ui->table[index].region_start + 4 *
544 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
545 buf += 2;
546 }
547
548 }
549
550 /* Unwind table needs to be kept sorted. */
551 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
552 compare_unwind_entries);
553
554 /* Keep a pointer to the unwind information. */
7c46b9fb
RC
555 obj_private = (struct hppa_objfile_private *)
556 objfile_data (objfile, hppa_objfile_priv_data);
557 if (obj_private == NULL)
c906108c 558 {
7c46b9fb
RC
559 obj_private = (struct hppa_objfile_private *)
560 obstack_alloc (&objfile->objfile_obstack,
561 sizeof (struct hppa_objfile_private));
562 set_objfile_data (objfile, hppa_objfile_priv_data, obj_private);
c906108c 563 obj_private->unwind_info = NULL;
c5aa993b 564 obj_private->so_info = NULL;
53a5351d 565 obj_private->dp = 0;
c906108c 566 }
c906108c
SS
567 obj_private->unwind_info = ui;
568}
569
570/* Lookup the unwind (stack backtrace) info for the given PC. We search all
571 of the objfiles seeking the unwind table entry for this PC. Each objfile
572 contains a sorted list of struct unwind_table_entry. Since we do a binary
573 search of the unwind tables, we depend upon them to be sorted. */
574
575struct unwind_table_entry *
fba45db2 576find_unwind_entry (CORE_ADDR pc)
c906108c
SS
577{
578 int first, middle, last;
579 struct objfile *objfile;
7c46b9fb 580 struct hppa_objfile_private *priv;
c906108c 581
369aa520
RC
582 if (hppa_debug)
583 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry 0x%s -> ",
584 paddr_nz (pc));
585
c906108c
SS
586 /* A function at address 0? Not in HP-UX! */
587 if (pc == (CORE_ADDR) 0)
369aa520
RC
588 {
589 if (hppa_debug)
590 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
591 return NULL;
592 }
c906108c
SS
593
594 ALL_OBJFILES (objfile)
c5aa993b 595 {
7c46b9fb 596 struct hppa_unwind_info *ui;
c5aa993b 597 ui = NULL;
7c46b9fb
RC
598 priv = objfile_data (objfile, hppa_objfile_priv_data);
599 if (priv)
600 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c906108c 601
c5aa993b
JM
602 if (!ui)
603 {
604 read_unwind_info (objfile);
7c46b9fb
RC
605 priv = objfile_data (objfile, hppa_objfile_priv_data);
606 if (priv == NULL)
104c1213 607 error ("Internal error reading unwind information.");
7c46b9fb 608 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
c5aa993b 609 }
c906108c 610
c5aa993b 611 /* First, check the cache */
c906108c 612
c5aa993b
JM
613 if (ui->cache
614 && pc >= ui->cache->region_start
615 && pc <= ui->cache->region_end)
369aa520
RC
616 {
617 if (hppa_debug)
618 fprintf_unfiltered (gdb_stdlog, "0x%s (cached) }\n",
619 paddr_nz ((CORE_ADDR) ui->cache));
620 return ui->cache;
621 }
c906108c 622
c5aa993b 623 /* Not in the cache, do a binary search */
c906108c 624
c5aa993b
JM
625 first = 0;
626 last = ui->last;
c906108c 627
c5aa993b
JM
628 while (first <= last)
629 {
630 middle = (first + last) / 2;
631 if (pc >= ui->table[middle].region_start
632 && pc <= ui->table[middle].region_end)
633 {
634 ui->cache = &ui->table[middle];
369aa520
RC
635 if (hppa_debug)
636 fprintf_unfiltered (gdb_stdlog, "0x%s }\n",
637 paddr_nz ((CORE_ADDR) ui->cache));
c5aa993b
JM
638 return &ui->table[middle];
639 }
c906108c 640
c5aa993b
JM
641 if (pc < ui->table[middle].region_start)
642 last = middle - 1;
643 else
644 first = middle + 1;
645 }
646 } /* ALL_OBJFILES() */
369aa520
RC
647
648 if (hppa_debug)
649 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
650
c906108c
SS
651 return NULL;
652}
653
85f4f2d8 654static const unsigned char *
aaab4dba
AC
655hppa_breakpoint_from_pc (CORE_ADDR *pc, int *len)
656{
56132691 657 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
aaab4dba
AC
658 (*len) = sizeof (breakpoint);
659 return breakpoint;
660}
661
e23457df
AC
662/* Return the name of a register. */
663
664const char *
3ff7cf9e 665hppa32_register_name (int i)
e23457df
AC
666{
667 static char *names[] = {
668 "flags", "r1", "rp", "r3",
669 "r4", "r5", "r6", "r7",
670 "r8", "r9", "r10", "r11",
671 "r12", "r13", "r14", "r15",
672 "r16", "r17", "r18", "r19",
673 "r20", "r21", "r22", "r23",
674 "r24", "r25", "r26", "dp",
675 "ret0", "ret1", "sp", "r31",
676 "sar", "pcoqh", "pcsqh", "pcoqt",
677 "pcsqt", "eiem", "iir", "isr",
678 "ior", "ipsw", "goto", "sr4",
679 "sr0", "sr1", "sr2", "sr3",
680 "sr5", "sr6", "sr7", "cr0",
681 "cr8", "cr9", "ccr", "cr12",
682 "cr13", "cr24", "cr25", "cr26",
683 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
684 "fpsr", "fpe1", "fpe2", "fpe3",
685 "fpe4", "fpe5", "fpe6", "fpe7",
686 "fr4", "fr4R", "fr5", "fr5R",
687 "fr6", "fr6R", "fr7", "fr7R",
688 "fr8", "fr8R", "fr9", "fr9R",
689 "fr10", "fr10R", "fr11", "fr11R",
690 "fr12", "fr12R", "fr13", "fr13R",
691 "fr14", "fr14R", "fr15", "fr15R",
692 "fr16", "fr16R", "fr17", "fr17R",
693 "fr18", "fr18R", "fr19", "fr19R",
694 "fr20", "fr20R", "fr21", "fr21R",
695 "fr22", "fr22R", "fr23", "fr23R",
696 "fr24", "fr24R", "fr25", "fr25R",
697 "fr26", "fr26R", "fr27", "fr27R",
698 "fr28", "fr28R", "fr29", "fr29R",
699 "fr30", "fr30R", "fr31", "fr31R"
700 };
701 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
702 return NULL;
703 else
704 return names[i];
705}
706
707const char *
708hppa64_register_name (int i)
709{
710 static char *names[] = {
711 "flags", "r1", "rp", "r3",
712 "r4", "r5", "r6", "r7",
713 "r8", "r9", "r10", "r11",
714 "r12", "r13", "r14", "r15",
715 "r16", "r17", "r18", "r19",
716 "r20", "r21", "r22", "r23",
717 "r24", "r25", "r26", "dp",
718 "ret0", "ret1", "sp", "r31",
719 "sar", "pcoqh", "pcsqh", "pcoqt",
720 "pcsqt", "eiem", "iir", "isr",
721 "ior", "ipsw", "goto", "sr4",
722 "sr0", "sr1", "sr2", "sr3",
723 "sr5", "sr6", "sr7", "cr0",
724 "cr8", "cr9", "ccr", "cr12",
725 "cr13", "cr24", "cr25", "cr26",
726 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
727 "fpsr", "fpe1", "fpe2", "fpe3",
728 "fr4", "fr5", "fr6", "fr7",
729 "fr8", "fr9", "fr10", "fr11",
730 "fr12", "fr13", "fr14", "fr15",
731 "fr16", "fr17", "fr18", "fr19",
732 "fr20", "fr21", "fr22", "fr23",
733 "fr24", "fr25", "fr26", "fr27",
734 "fr28", "fr29", "fr30", "fr31"
735 };
736 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
737 return NULL;
738 else
739 return names[i];
740}
741
79508e1e
AC
742/* This function pushes a stack frame with arguments as part of the
743 inferior function calling mechanism.
744
745 This is the version of the function for the 32-bit PA machines, in
746 which later arguments appear at lower addresses. (The stack always
747 grows towards higher addresses.)
748
749 We simply allocate the appropriate amount of stack space and put
750 arguments into their proper slots. */
751
752CORE_ADDR
753hppa32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
754 struct regcache *regcache, CORE_ADDR bp_addr,
755 int nargs, struct value **args, CORE_ADDR sp,
756 int struct_return, CORE_ADDR struct_addr)
757{
79508e1e
AC
758 /* Stack base address at which any pass-by-reference parameters are
759 stored. */
760 CORE_ADDR struct_end = 0;
761 /* Stack base address at which the first parameter is stored. */
762 CORE_ADDR param_end = 0;
763
764 /* The inner most end of the stack after all the parameters have
765 been pushed. */
766 CORE_ADDR new_sp = 0;
767
768 /* Two passes. First pass computes the location of everything,
769 second pass writes the bytes out. */
770 int write_pass;
771 for (write_pass = 0; write_pass < 2; write_pass++)
772 {
1797a8f6 773 CORE_ADDR struct_ptr = 0;
2a6228ef
RC
774 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
775 struct_ptr is adjusted for each argument below, so the first
776 argument will end up at sp-36. */
777 CORE_ADDR param_ptr = 32;
79508e1e 778 int i;
2a6228ef
RC
779 int small_struct = 0;
780
79508e1e
AC
781 for (i = 0; i < nargs; i++)
782 {
783 struct value *arg = args[i];
784 struct type *type = check_typedef (VALUE_TYPE (arg));
785 /* The corresponding parameter that is pushed onto the
786 stack, and [possibly] passed in a register. */
787 char param_val[8];
788 int param_len;
789 memset (param_val, 0, sizeof param_val);
790 if (TYPE_LENGTH (type) > 8)
791 {
792 /* Large parameter, pass by reference. Store the value
793 in "struct" area and then pass its address. */
794 param_len = 4;
1797a8f6 795 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 796 if (write_pass)
1797a8f6 797 write_memory (struct_end - struct_ptr, VALUE_CONTENTS (arg),
79508e1e 798 TYPE_LENGTH (type));
1797a8f6 799 store_unsigned_integer (param_val, 4, struct_end - struct_ptr);
79508e1e
AC
800 }
801 else if (TYPE_CODE (type) == TYPE_CODE_INT
802 || TYPE_CODE (type) == TYPE_CODE_ENUM)
803 {
804 /* Integer value store, right aligned. "unpack_long"
805 takes care of any sign-extension problems. */
806 param_len = align_up (TYPE_LENGTH (type), 4);
807 store_unsigned_integer (param_val, param_len,
808 unpack_long (type,
809 VALUE_CONTENTS (arg)));
810 }
2a6228ef
RC
811 else if (TYPE_CODE (type) == TYPE_CODE_FLT)
812 {
813 /* Floating point value store, right aligned. */
814 param_len = align_up (TYPE_LENGTH (type), 4);
815 memcpy (param_val, VALUE_CONTENTS (arg), param_len);
816 }
79508e1e
AC
817 else
818 {
79508e1e 819 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
820
821 /* Small struct value are stored right-aligned. */
79508e1e
AC
822 memcpy (param_val + param_len - TYPE_LENGTH (type),
823 VALUE_CONTENTS (arg), TYPE_LENGTH (type));
2a6228ef
RC
824
825 /* Structures of size 5, 6 and 7 bytes are special in that
826 the higher-ordered word is stored in the lower-ordered
827 argument, and even though it is a 8-byte quantity the
828 registers need not be 8-byte aligned. */
829 if (param_len > 4)
830 small_struct = 1;
79508e1e 831 }
2a6228ef 832
1797a8f6 833 param_ptr += param_len;
2a6228ef
RC
834 if (param_len == 8 && !small_struct)
835 param_ptr = align_up (param_ptr, 8);
836
837 /* First 4 non-FP arguments are passed in gr26-gr23.
838 First 4 32-bit FP arguments are passed in fr4L-fr7L.
839 First 2 64-bit FP arguments are passed in fr5 and fr7.
840
841 The rest go on the stack, starting at sp-36, towards lower
842 addresses. 8-byte arguments must be aligned to a 8-byte
843 stack boundary. */
79508e1e
AC
844 if (write_pass)
845 {
1797a8f6 846 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
847
848 /* There are some cases when we don't know the type
849 expected by the callee (e.g. for variadic functions), so
850 pass the parameters in both general and fp regs. */
851 if (param_ptr <= 48)
79508e1e 852 {
2a6228ef
RC
853 int grreg = 26 - (param_ptr - 36) / 4;
854 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
855 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
856
857 regcache_cooked_write (regcache, grreg, param_val);
858 regcache_cooked_write (regcache, fpLreg, param_val);
859
79508e1e 860 if (param_len > 4)
2a6228ef
RC
861 {
862 regcache_cooked_write (regcache, grreg + 1,
863 param_val + 4);
864
865 regcache_cooked_write (regcache, fpreg, param_val);
866 regcache_cooked_write (regcache, fpreg + 1,
867 param_val + 4);
868 }
79508e1e
AC
869 }
870 }
871 }
872
873 /* Update the various stack pointers. */
874 if (!write_pass)
875 {
2a6228ef 876 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
877 /* PARAM_PTR already accounts for all the arguments passed
878 by the user. However, the ABI mandates minimum stack
879 space allocations for outgoing arguments. The ABI also
880 mandates minimum stack alignments which we must
881 preserve. */
2a6228ef 882 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
883 }
884 }
885
886 /* If a structure has to be returned, set up register 28 to hold its
887 address */
888 if (struct_return)
889 write_register (28, struct_addr);
890
891 /* Set the return address. */
34f75cc1 892 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 893
c4557624 894 /* Update the Stack Pointer. */
34f75cc1 895 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 896
2a6228ef 897 return param_end;
79508e1e
AC
898}
899
2f690297
AC
900/* This function pushes a stack frame with arguments as part of the
901 inferior function calling mechanism.
902
903 This is the version for the PA64, in which later arguments appear
904 at higher addresses. (The stack always grows towards higher
905 addresses.)
906
907 We simply allocate the appropriate amount of stack space and put
908 arguments into their proper slots.
909
910 This ABI also requires that the caller provide an argument pointer
911 to the callee, so we do that too. */
912
913CORE_ADDR
914hppa64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
915 struct regcache *regcache, CORE_ADDR bp_addr,
916 int nargs, struct value **args, CORE_ADDR sp,
917 int struct_return, CORE_ADDR struct_addr)
918{
449e1137
AC
919 /* NOTE: cagney/2004-02-27: This is a guess - its implemented by
920 reverse engineering testsuite failures. */
2f690297 921
449e1137
AC
922 /* Stack base address at which any pass-by-reference parameters are
923 stored. */
924 CORE_ADDR struct_end = 0;
925 /* Stack base address at which the first parameter is stored. */
926 CORE_ADDR param_end = 0;
2f690297 927
449e1137
AC
928 /* The inner most end of the stack after all the parameters have
929 been pushed. */
930 CORE_ADDR new_sp = 0;
2f690297 931
449e1137
AC
932 /* Two passes. First pass computes the location of everything,
933 second pass writes the bytes out. */
934 int write_pass;
935 for (write_pass = 0; write_pass < 2; write_pass++)
2f690297 936 {
449e1137
AC
937 CORE_ADDR struct_ptr = 0;
938 CORE_ADDR param_ptr = 0;
939 int i;
940 for (i = 0; i < nargs; i++)
2f690297 941 {
449e1137
AC
942 struct value *arg = args[i];
943 struct type *type = check_typedef (VALUE_TYPE (arg));
944 if ((TYPE_CODE (type) == TYPE_CODE_INT
945 || TYPE_CODE (type) == TYPE_CODE_ENUM)
946 && TYPE_LENGTH (type) <= 8)
947 {
948 /* Integer value store, right aligned. "unpack_long"
949 takes care of any sign-extension problems. */
950 param_ptr += 8;
951 if (write_pass)
952 {
953 ULONGEST val = unpack_long (type, VALUE_CONTENTS (arg));
954 int reg = 27 - param_ptr / 8;
955 write_memory_unsigned_integer (param_end - param_ptr,
956 val, 8);
957 if (reg >= 19)
958 regcache_cooked_write_unsigned (regcache, reg, val);
959 }
960 }
961 else
962 {
963 /* Small struct value, store left aligned? */
964 int reg;
965 if (TYPE_LENGTH (type) > 8)
966 {
967 param_ptr = align_up (param_ptr, 16);
968 reg = 26 - param_ptr / 8;
969 param_ptr += align_up (TYPE_LENGTH (type), 16);
970 }
971 else
972 {
973 param_ptr = align_up (param_ptr, 8);
974 reg = 26 - param_ptr / 8;
975 param_ptr += align_up (TYPE_LENGTH (type), 8);
976 }
977 if (write_pass)
978 {
979 int byte;
980 write_memory (param_end - param_ptr, VALUE_CONTENTS (arg),
981 TYPE_LENGTH (type));
982 for (byte = 0; byte < TYPE_LENGTH (type); byte += 8)
983 {
984 if (reg >= 19)
985 {
986 int len = min (8, TYPE_LENGTH (type) - byte);
987 regcache_cooked_write_part (regcache, reg, 0, len,
988 VALUE_CONTENTS (arg) + byte);
989 }
990 reg--;
991 }
992 }
993 }
2f690297 994 }
449e1137
AC
995 /* Update the various stack pointers. */
996 if (!write_pass)
2f690297 997 {
449e1137
AC
998 struct_end = sp + struct_ptr;
999 /* PARAM_PTR already accounts for all the arguments passed
1000 by the user. However, the ABI mandates minimum stack
1001 space allocations for outgoing arguments. The ABI also
1002 mandates minimum stack alignments which we must
1003 preserve. */
d0bd2d18 1004 param_end = struct_end + max (align_up (param_ptr, 16), 64);
2f690297 1005 }
2f690297
AC
1006 }
1007
2f690297
AC
1008 /* If a structure has to be returned, set up register 28 to hold its
1009 address */
1010 if (struct_return)
1011 write_register (28, struct_addr);
1012
2f690297 1013 /* Set the return address. */
34f75cc1 1014 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1015
c4557624 1016 /* Update the Stack Pointer. */
34f75cc1 1017 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end + 64);
c4557624 1018
449e1137
AC
1019 /* The stack will have 32 bytes of additional space for a frame marker. */
1020 return param_end + 64;
2f690297
AC
1021}
1022
1797a8f6
AC
1023static CORE_ADDR
1024hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1025{
1026 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1027 and not _bit_)! */
1028 return align_up (addr, 64);
1029}
1030
2f690297
AC
1031/* Force all frames to 16-byte alignment. Better safe than sorry. */
1032
1033static CORE_ADDR
1797a8f6 1034hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1035{
1036 /* Just always 16-byte align. */
1037 return align_up (addr, 16);
1038}
1039
1040
c906108c
SS
1041/* Get the PC from %r31 if currently in a syscall. Also mask out privilege
1042 bits. */
1043
8d153463 1044static CORE_ADDR
60383d10 1045hppa_target_read_pc (ptid_t ptid)
c906108c 1046{
34f75cc1 1047 int flags = read_register_pid (HPPA_FLAGS_REGNUM, ptid);
c906108c
SS
1048
1049 /* The following test does not belong here. It is OS-specific, and belongs
1050 in native code. */
1051 /* Test SS_INSYSCALL */
1052 if (flags & 2)
39f77062 1053 return read_register_pid (31, ptid) & ~0x3;
c906108c 1054
34f75cc1 1055 return read_register_pid (HPPA_PCOQ_HEAD_REGNUM, ptid) & ~0x3;
c906108c
SS
1056}
1057
1058/* Write out the PC. If currently in a syscall, then also write the new
1059 PC value into %r31. */
1060
8d153463 1061static void
60383d10 1062hppa_target_write_pc (CORE_ADDR v, ptid_t ptid)
c906108c 1063{
34f75cc1 1064 int flags = read_register_pid (HPPA_FLAGS_REGNUM, ptid);
c906108c
SS
1065
1066 /* The following test does not belong here. It is OS-specific, and belongs
1067 in native code. */
1068 /* If in a syscall, then set %r31. Also make sure to get the
1069 privilege bits set correctly. */
1070 /* Test SS_INSYSCALL */
1071 if (flags & 2)
39f77062 1072 write_register_pid (31, v | 0x3, ptid);
c906108c 1073
34f75cc1
RC
1074 write_register_pid (HPPA_PCOQ_HEAD_REGNUM, v, ptid);
1075 write_register_pid (HPPA_PCOQ_TAIL_REGNUM, v + 4, ptid);
c906108c
SS
1076}
1077
1078/* return the alignment of a type in bytes. Structures have the maximum
1079 alignment required by their fields. */
1080
1081static int
fba45db2 1082hppa_alignof (struct type *type)
c906108c
SS
1083{
1084 int max_align, align, i;
1085 CHECK_TYPEDEF (type);
1086 switch (TYPE_CODE (type))
1087 {
1088 case TYPE_CODE_PTR:
1089 case TYPE_CODE_INT:
1090 case TYPE_CODE_FLT:
1091 return TYPE_LENGTH (type);
1092 case TYPE_CODE_ARRAY:
1093 return hppa_alignof (TYPE_FIELD_TYPE (type, 0));
1094 case TYPE_CODE_STRUCT:
1095 case TYPE_CODE_UNION:
1096 max_align = 1;
1097 for (i = 0; i < TYPE_NFIELDS (type); i++)
1098 {
1099 /* Bit fields have no real alignment. */
1100 /* if (!TYPE_FIELD_BITPOS (type, i)) */
c5aa993b 1101 if (!TYPE_FIELD_BITSIZE (type, i)) /* elz: this should be bitsize */
c906108c
SS
1102 {
1103 align = hppa_alignof (TYPE_FIELD_TYPE (type, i));
1104 max_align = max (max_align, align);
1105 }
1106 }
1107 return max_align;
1108 default:
1109 return 4;
1110 }
1111}
1112
c906108c
SS
1113/* For the given instruction (INST), return any adjustment it makes
1114 to the stack pointer or zero for no adjustment.
1115
1116 This only handles instructions commonly found in prologues. */
1117
1118static int
fba45db2 1119prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1120{
1121 /* This must persist across calls. */
1122 static int save_high21;
1123
1124 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1125 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1126 return hppa_extract_14 (inst);
c906108c
SS
1127
1128 /* stwm X,D(sp) */
1129 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1130 return hppa_extract_14 (inst);
c906108c 1131
104c1213
JM
1132 /* std,ma X,D(sp) */
1133 if ((inst & 0xffe00008) == 0x73c00008)
d4f3574e 1134 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1135
c906108c
SS
1136 /* addil high21,%r1; ldo low11,(%r1),%r30)
1137 save high bits in save_high21 for later use. */
1138 if ((inst & 0xffe00000) == 0x28200000)
1139 {
abc485a1 1140 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1141 return 0;
1142 }
1143
1144 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1145 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1146
1147 /* fstws as used by the HP compilers. */
1148 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1149 return hppa_extract_5_load (inst);
c906108c
SS
1150
1151 /* No adjustment. */
1152 return 0;
1153}
1154
1155/* Return nonzero if INST is a branch of some kind, else return zero. */
1156
1157static int
fba45db2 1158is_branch (unsigned long inst)
c906108c
SS
1159{
1160 switch (inst >> 26)
1161 {
1162 case 0x20:
1163 case 0x21:
1164 case 0x22:
1165 case 0x23:
7be570e7 1166 case 0x27:
c906108c
SS
1167 case 0x28:
1168 case 0x29:
1169 case 0x2a:
1170 case 0x2b:
7be570e7 1171 case 0x2f:
c906108c
SS
1172 case 0x30:
1173 case 0x31:
1174 case 0x32:
1175 case 0x33:
1176 case 0x38:
1177 case 0x39:
1178 case 0x3a:
7be570e7 1179 case 0x3b:
c906108c
SS
1180 return 1;
1181
1182 default:
1183 return 0;
1184 }
1185}
1186
1187/* Return the register number for a GR which is saved by INST or
1188 zero it INST does not save a GR. */
1189
1190static int
fba45db2 1191inst_saves_gr (unsigned long inst)
c906108c
SS
1192{
1193 /* Does it look like a stw? */
7be570e7
JM
1194 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1195 || (inst >> 26) == 0x1f
1196 || ((inst >> 26) == 0x1f
1197 && ((inst >> 6) == 0xa)))
abc485a1 1198 return hppa_extract_5R_store (inst);
7be570e7
JM
1199
1200 /* Does it look like a std? */
1201 if ((inst >> 26) == 0x1c
1202 || ((inst >> 26) == 0x03
1203 && ((inst >> 6) & 0xf) == 0xb))
abc485a1 1204 return hppa_extract_5R_store (inst);
c906108c
SS
1205
1206 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
1207 if ((inst >> 26) == 0x1b)
abc485a1 1208 return hppa_extract_5R_store (inst);
c906108c
SS
1209
1210 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1211 too. */
7be570e7
JM
1212 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1213 || ((inst >> 26) == 0x3
1214 && (((inst >> 6) & 0xf) == 0x8
1215 || (inst >> 6) & 0xf) == 0x9))
abc485a1 1216 return hppa_extract_5R_store (inst);
c5aa993b 1217
c906108c
SS
1218 return 0;
1219}
1220
1221/* Return the register number for a FR which is saved by INST or
1222 zero it INST does not save a FR.
1223
1224 Note we only care about full 64bit register stores (that's the only
1225 kind of stores the prologue will use).
1226
1227 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1228
1229static int
fba45db2 1230inst_saves_fr (unsigned long inst)
c906108c 1231{
7be570e7 1232 /* is this an FSTD ? */
c906108c 1233 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1234 return hppa_extract_5r_store (inst);
7be570e7 1235 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1236 return hppa_extract_5R_store (inst);
7be570e7 1237 /* is this an FSTW ? */
c906108c 1238 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1239 return hppa_extract_5r_store (inst);
7be570e7 1240 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1241 return hppa_extract_5R_store (inst);
c906108c
SS
1242 return 0;
1243}
1244
1245/* Advance PC across any function entry prologue instructions
1246 to reach some "real" code.
1247
1248 Use information in the unwind table to determine what exactly should
1249 be in the prologue. */
1250
1251
1252CORE_ADDR
fba45db2 1253skip_prologue_hard_way (CORE_ADDR pc)
c906108c
SS
1254{
1255 char buf[4];
1256 CORE_ADDR orig_pc = pc;
1257 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1258 unsigned long args_stored, status, i, restart_gr, restart_fr;
1259 struct unwind_table_entry *u;
1260
1261 restart_gr = 0;
1262 restart_fr = 0;
1263
1264restart:
1265 u = find_unwind_entry (pc);
1266 if (!u)
1267 return pc;
1268
c5aa993b 1269 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1270 if ((pc & ~0x3) != u->region_start)
1271 return pc;
1272
1273 /* This is how much of a frame adjustment we need to account for. */
1274 stack_remaining = u->Total_frame_size << 3;
1275
1276 /* Magic register saves we want to know about. */
1277 save_rp = u->Save_RP;
1278 save_sp = u->Save_SP;
1279
1280 /* An indication that args may be stored into the stack. Unfortunately
1281 the HPUX compilers tend to set this in cases where no args were
1282 stored too!. */
1283 args_stored = 1;
1284
1285 /* Turn the Entry_GR field into a bitmask. */
1286 save_gr = 0;
1287 for (i = 3; i < u->Entry_GR + 3; i++)
1288 {
1289 /* Frame pointer gets saved into a special location. */
eded0a31 1290 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1291 continue;
1292
1293 save_gr |= (1 << i);
1294 }
1295 save_gr &= ~restart_gr;
1296
1297 /* Turn the Entry_FR field into a bitmask too. */
1298 save_fr = 0;
1299 for (i = 12; i < u->Entry_FR + 12; i++)
1300 save_fr |= (1 << i);
1301 save_fr &= ~restart_fr;
1302
1303 /* Loop until we find everything of interest or hit a branch.
1304
1305 For unoptimized GCC code and for any HP CC code this will never ever
1306 examine any user instructions.
1307
1308 For optimzied GCC code we're faced with problems. GCC will schedule
1309 its prologue and make prologue instructions available for delay slot
1310 filling. The end result is user code gets mixed in with the prologue
1311 and a prologue instruction may be in the delay slot of the first branch
1312 or call.
1313
1314 Some unexpected things are expected with debugging optimized code, so
1315 we allow this routine to walk past user instructions in optimized
1316 GCC code. */
1317 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1318 || args_stored)
1319 {
1320 unsigned int reg_num;
1321 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1322 unsigned long old_save_rp, old_save_sp, next_inst;
1323
1324 /* Save copies of all the triggers so we can compare them later
c5aa993b 1325 (only for HPC). */
c906108c
SS
1326 old_save_gr = save_gr;
1327 old_save_fr = save_fr;
1328 old_save_rp = save_rp;
1329 old_save_sp = save_sp;
1330 old_stack_remaining = stack_remaining;
1331
1332 status = target_read_memory (pc, buf, 4);
1333 inst = extract_unsigned_integer (buf, 4);
c5aa993b 1334
c906108c
SS
1335 /* Yow! */
1336 if (status != 0)
1337 return pc;
1338
1339 /* Note the interesting effects of this instruction. */
1340 stack_remaining -= prologue_inst_adjust_sp (inst);
1341
7be570e7
JM
1342 /* There are limited ways to store the return pointer into the
1343 stack. */
1344 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1)
c906108c
SS
1345 save_rp = 0;
1346
104c1213 1347 /* These are the only ways we save SP into the stack. At this time
c5aa993b 1348 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1349 if ((inst & 0xffffc000) == 0x6fc10000
1350 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1351 save_sp = 0;
1352
6426a772
JM
1353 /* Are we loading some register with an offset from the argument
1354 pointer? */
1355 if ((inst & 0xffe00000) == 0x37a00000
1356 || (inst & 0xffffffe0) == 0x081d0240)
1357 {
1358 pc += 4;
1359 continue;
1360 }
1361
c906108c
SS
1362 /* Account for general and floating-point register saves. */
1363 reg_num = inst_saves_gr (inst);
1364 save_gr &= ~(1 << reg_num);
1365
1366 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1367 Unfortunately args_stored only tells us that some arguments
1368 where stored into the stack. Not how many or what kind!
c906108c 1369
c5aa993b
JM
1370 This is a kludge as on the HP compiler sets this bit and it
1371 never does prologue scheduling. So once we see one, skip past
1372 all of them. We have similar code for the fp arg stores below.
c906108c 1373
c5aa993b
JM
1374 FIXME. Can still die if we have a mix of GR and FR argument
1375 stores! */
6426a772 1376 if (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
c906108c 1377 {
6426a772 1378 while (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
c906108c
SS
1379 {
1380 pc += 4;
1381 status = target_read_memory (pc, buf, 4);
1382 inst = extract_unsigned_integer (buf, 4);
1383 if (status != 0)
1384 return pc;
1385 reg_num = inst_saves_gr (inst);
1386 }
1387 args_stored = 0;
1388 continue;
1389 }
1390
1391 reg_num = inst_saves_fr (inst);
1392 save_fr &= ~(1 << reg_num);
1393
1394 status = target_read_memory (pc + 4, buf, 4);
1395 next_inst = extract_unsigned_integer (buf, 4);
c5aa993b 1396
c906108c
SS
1397 /* Yow! */
1398 if (status != 0)
1399 return pc;
1400
1401 /* We've got to be read to handle the ldo before the fp register
c5aa993b 1402 save. */
c906108c
SS
1403 if ((inst & 0xfc000000) == 0x34000000
1404 && inst_saves_fr (next_inst) >= 4
6426a772 1405 && inst_saves_fr (next_inst) <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c
SS
1406 {
1407 /* So we drop into the code below in a reasonable state. */
1408 reg_num = inst_saves_fr (next_inst);
1409 pc -= 4;
1410 }
1411
1412 /* Ugh. Also account for argument stores into the stack.
c5aa993b
JM
1413 This is a kludge as on the HP compiler sets this bit and it
1414 never does prologue scheduling. So once we see one, skip past
1415 all of them. */
6426a772 1416 if (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c 1417 {
6426a772 1418 while (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
c906108c
SS
1419 {
1420 pc += 8;
1421 status = target_read_memory (pc, buf, 4);
1422 inst = extract_unsigned_integer (buf, 4);
1423 if (status != 0)
1424 return pc;
1425 if ((inst & 0xfc000000) != 0x34000000)
1426 break;
1427 status = target_read_memory (pc + 4, buf, 4);
1428 next_inst = extract_unsigned_integer (buf, 4);
1429 if (status != 0)
1430 return pc;
1431 reg_num = inst_saves_fr (next_inst);
1432 }
1433 args_stored = 0;
1434 continue;
1435 }
1436
1437 /* Quit if we hit any kind of branch. This can happen if a prologue
c5aa993b 1438 instruction is in the delay slot of the first call/branch. */
c906108c
SS
1439 if (is_branch (inst))
1440 break;
1441
1442 /* What a crock. The HP compilers set args_stored even if no
c5aa993b
JM
1443 arguments were stored into the stack (boo hiss). This could
1444 cause this code to then skip a bunch of user insns (up to the
1445 first branch).
1446
1447 To combat this we try to identify when args_stored was bogusly
1448 set and clear it. We only do this when args_stored is nonzero,
1449 all other resources are accounted for, and nothing changed on
1450 this pass. */
c906108c 1451 if (args_stored
c5aa993b 1452 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1453 && old_save_gr == save_gr && old_save_fr == save_fr
1454 && old_save_rp == save_rp && old_save_sp == save_sp
1455 && old_stack_remaining == stack_remaining)
1456 break;
c5aa993b 1457
c906108c
SS
1458 /* Bump the PC. */
1459 pc += 4;
1460 }
1461
1462 /* We've got a tenative location for the end of the prologue. However
1463 because of limitations in the unwind descriptor mechanism we may
1464 have went too far into user code looking for the save of a register
1465 that does not exist. So, if there registers we expected to be saved
1466 but never were, mask them out and restart.
1467
1468 This should only happen in optimized code, and should be very rare. */
c5aa993b 1469 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1470 {
1471 pc = orig_pc;
1472 restart_gr = save_gr;
1473 restart_fr = save_fr;
1474 goto restart;
1475 }
1476
1477 return pc;
1478}
1479
1480
7be570e7
JM
1481/* Return the address of the PC after the last prologue instruction if
1482 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1483
1484static CORE_ADDR
fba45db2 1485after_prologue (CORE_ADDR pc)
c906108c
SS
1486{
1487 struct symtab_and_line sal;
1488 CORE_ADDR func_addr, func_end;
1489 struct symbol *f;
1490
7be570e7
JM
1491 /* If we can not find the symbol in the partial symbol table, then
1492 there is no hope we can determine the function's start address
1493 with this code. */
c906108c 1494 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1495 return 0;
c906108c 1496
7be570e7 1497 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1498 sal = find_pc_line (func_addr, 0);
1499
7be570e7
JM
1500 /* There are only two cases to consider. First, the end of the source line
1501 is within the function bounds. In that case we return the end of the
1502 source line. Second is the end of the source line extends beyond the
1503 bounds of the current function. We need to use the slow code to
1504 examine instructions in that case.
c906108c 1505
7be570e7
JM
1506 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1507 the wrong thing to do. In fact, it should be entirely possible for this
1508 function to always return zero since the slow instruction scanning code
1509 is supposed to *always* work. If it does not, then it is a bug. */
1510 if (sal.end < func_end)
1511 return sal.end;
c5aa993b 1512 else
7be570e7 1513 return 0;
c906108c
SS
1514}
1515
1516/* To skip prologues, I use this predicate. Returns either PC itself
1517 if the code at PC does not look like a function prologue; otherwise
1518 returns an address that (if we're lucky) follows the prologue. If
1519 LENIENT, then we must skip everything which is involved in setting
1520 up the frame (it's OK to skip more, just so long as we don't skip
1521 anything which might clobber the registers which are being saved.
1522 Currently we must not skip more on the alpha, but we might the lenient
1523 stuff some day. */
1524
8d153463 1525static CORE_ADDR
fba45db2 1526hppa_skip_prologue (CORE_ADDR pc)
c906108c 1527{
c5aa993b
JM
1528 unsigned long inst;
1529 int offset;
1530 CORE_ADDR post_prologue_pc;
1531 char buf[4];
c906108c 1532
c5aa993b
JM
1533 /* See if we can determine the end of the prologue via the symbol table.
1534 If so, then return either PC, or the PC after the prologue, whichever
1535 is greater. */
c906108c 1536
c5aa993b 1537 post_prologue_pc = after_prologue (pc);
c906108c 1538
7be570e7
JM
1539 /* If after_prologue returned a useful address, then use it. Else
1540 fall back on the instruction skipping code.
1541
1542 Some folks have claimed this causes problems because the breakpoint
1543 may be the first instruction of the prologue. If that happens, then
1544 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b
JM
1545 if (post_prologue_pc != 0)
1546 return max (pc, post_prologue_pc);
c5aa993b
JM
1547 else
1548 return (skip_prologue_hard_way (pc));
c906108c
SS
1549}
1550
26d08f08
AC
1551struct hppa_frame_cache
1552{
1553 CORE_ADDR base;
1554 struct trad_frame_saved_reg *saved_regs;
1555};
1556
1557static struct hppa_frame_cache *
1558hppa_frame_cache (struct frame_info *next_frame, void **this_cache)
1559{
1560 struct hppa_frame_cache *cache;
1561 long saved_gr_mask;
1562 long saved_fr_mask;
1563 CORE_ADDR this_sp;
1564 long frame_size;
1565 struct unwind_table_entry *u;
9f7194c3 1566 CORE_ADDR prologue_end;
26d08f08
AC
1567 int i;
1568
369aa520
RC
1569 if (hppa_debug)
1570 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
1571 frame_relative_level(next_frame));
1572
26d08f08 1573 if ((*this_cache) != NULL)
369aa520
RC
1574 {
1575 if (hppa_debug)
1576 fprintf_unfiltered (gdb_stdlog, "base=0x%s (cached) }",
1577 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
1578 return (*this_cache);
1579 }
26d08f08
AC
1580 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1581 (*this_cache) = cache;
1582 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1583
1584 /* Yow! */
1585 u = find_unwind_entry (frame_func_unwind (next_frame));
1586 if (!u)
369aa520
RC
1587 {
1588 if (hppa_debug)
1589 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
1590 return (*this_cache);
1591 }
26d08f08
AC
1592
1593 /* Turn the Entry_GR field into a bitmask. */
1594 saved_gr_mask = 0;
1595 for (i = 3; i < u->Entry_GR + 3; i++)
1596 {
1597 /* Frame pointer gets saved into a special location. */
eded0a31 1598 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1599 continue;
1600
1601 saved_gr_mask |= (1 << i);
1602 }
1603
1604 /* Turn the Entry_FR field into a bitmask too. */
1605 saved_fr_mask = 0;
1606 for (i = 12; i < u->Entry_FR + 12; i++)
1607 saved_fr_mask |= (1 << i);
1608
1609 /* Loop until we find everything of interest or hit a branch.
1610
1611 For unoptimized GCC code and for any HP CC code this will never ever
1612 examine any user instructions.
1613
1614 For optimized GCC code we're faced with problems. GCC will schedule
1615 its prologue and make prologue instructions available for delay slot
1616 filling. The end result is user code gets mixed in with the prologue
1617 and a prologue instruction may be in the delay slot of the first branch
1618 or call.
1619
1620 Some unexpected things are expected with debugging optimized code, so
1621 we allow this routine to walk past user instructions in optimized
1622 GCC code. */
1623 {
1624 int final_iteration = 0;
9f7194c3 1625 CORE_ADDR pc, end_pc;
26d08f08
AC
1626 int looking_for_sp = u->Save_SP;
1627 int looking_for_rp = u->Save_RP;
1628 int fp_loc = -1;
9f7194c3
RC
1629
1630 /* We have to use hppa_skip_prologue instead of just
1631 skip_prologue_using_sal, in case we stepped into a function without
1632 symbol information. hppa_skip_prologue also bounds the returned
1633 pc by the passed in pc, so it will not return a pc in the next
1634 function. */
1635 prologue_end = hppa_skip_prologue (frame_func_unwind (next_frame));
1636 end_pc = frame_pc_unwind (next_frame);
1637
1638 if (prologue_end != 0 && end_pc > prologue_end)
1639 end_pc = prologue_end;
1640
26d08f08 1641 frame_size = 0;
9f7194c3 1642
26d08f08
AC
1643 for (pc = frame_func_unwind (next_frame);
1644 ((saved_gr_mask || saved_fr_mask
1645 || looking_for_sp || looking_for_rp
1646 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1647 && pc < end_pc);
26d08f08
AC
1648 pc += 4)
1649 {
1650 int reg;
1651 char buf4[4];
1652 long status = target_read_memory (pc, buf4, sizeof buf4);
1653 long inst = extract_unsigned_integer (buf4, sizeof buf4);
9f7194c3 1654
26d08f08
AC
1655 /* Note the interesting effects of this instruction. */
1656 frame_size += prologue_inst_adjust_sp (inst);
1657
1658 /* There are limited ways to store the return pointer into the
1659 stack. */
1660 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
1661 {
1662 looking_for_rp = 0;
34f75cc1 1663 cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
26d08f08
AC
1664 }
1665 else if (inst == 0x0fc212c1) /* std rp,-0x10(sr0,sp) */
1666 {
1667 looking_for_rp = 0;
34f75cc1 1668 cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
26d08f08
AC
1669 }
1670
1671 /* Check to see if we saved SP into the stack. This also
1672 happens to indicate the location of the saved frame
1673 pointer. */
1674 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
1675 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
1676 {
1677 looking_for_sp = 0;
eded0a31 1678 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
26d08f08
AC
1679 }
1680
1681 /* Account for general and floating-point register saves. */
1682 reg = inst_saves_gr (inst);
1683 if (reg >= 3 && reg <= 18
eded0a31 1684 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
1685 {
1686 saved_gr_mask &= ~(1 << reg);
abc485a1 1687 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
1688 /* stwm with a positive displacement is a _post_
1689 _modify_. */
1690 cache->saved_regs[reg].addr = 0;
1691 else if ((inst & 0xfc00000c) == 0x70000008)
1692 /* A std has explicit post_modify forms. */
1693 cache->saved_regs[reg].addr = 0;
1694 else
1695 {
1696 CORE_ADDR offset;
1697
1698 if ((inst >> 26) == 0x1c)
1699 offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
1700 else if ((inst >> 26) == 0x03)
abc485a1 1701 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 1702 else
abc485a1 1703 offset = hppa_extract_14 (inst);
26d08f08
AC
1704
1705 /* Handle code with and without frame pointers. */
1706 if (u->Save_SP)
1707 cache->saved_regs[reg].addr = offset;
1708 else
1709 cache->saved_regs[reg].addr = (u->Total_frame_size << 3) + offset;
1710 }
1711 }
1712
1713 /* GCC handles callee saved FP regs a little differently.
1714
1715 It emits an instruction to put the value of the start of
1716 the FP store area into %r1. It then uses fstds,ma with a
1717 basereg of %r1 for the stores.
1718
1719 HP CC emits them at the current stack pointer modifying the
1720 stack pointer as it stores each register. */
1721
1722 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
1723 if ((inst & 0xffffc000) == 0x34610000
1724 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 1725 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
1726
1727 reg = inst_saves_fr (inst);
1728 if (reg >= 12 && reg <= 21)
1729 {
1730 /* Note +4 braindamage below is necessary because the FP
1731 status registers are internally 8 registers rather than
1732 the expected 4 registers. */
1733 saved_fr_mask &= ~(1 << reg);
1734 if (fp_loc == -1)
1735 {
1736 /* 1st HP CC FP register store. After this
1737 instruction we've set enough state that the GCC and
1738 HPCC code are both handled in the same manner. */
34f75cc1 1739 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
26d08f08
AC
1740 fp_loc = 8;
1741 }
1742 else
1743 {
eded0a31 1744 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
26d08f08
AC
1745 fp_loc += 8;
1746 }
1747 }
1748
1749 /* Quit if we hit any kind of branch the previous iteration. */
1750 if (final_iteration)
1751 break;
1752 /* We want to look precisely one instruction beyond the branch
1753 if we have not found everything yet. */
1754 if (is_branch (inst))
1755 final_iteration = 1;
1756 }
1757 }
1758
1759 {
1760 /* The frame base always represents the value of %sp at entry to
1761 the current function (and is thus equivalent to the "saved"
1762 stack pointer. */
eded0a31 1763 CORE_ADDR this_sp = frame_unwind_register_unsigned (next_frame, HPPA_SP_REGNUM);
9f7194c3
RC
1764
1765 if (hppa_debug)
1766 fprintf_unfiltered (gdb_stdlog, " (this_sp=0x%s, pc=0x%s, "
1767 "prologue_end=0x%s) ",
1768 paddr_nz (this_sp),
1769 paddr_nz (frame_pc_unwind (next_frame)),
1770 paddr_nz (prologue_end));
1771
1772 if (frame_pc_unwind (next_frame) >= prologue_end)
1773 {
1774 if (u->Save_SP && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
1775 {
1776 /* Both we're expecting the SP to be saved and the SP has been
1777 saved. The entry SP value is saved at this frame's SP
1778 address. */
1779 cache->base = read_memory_integer (this_sp, TARGET_PTR_BIT / 8);
1780
1781 if (hppa_debug)
1782 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [saved] }",
1783 paddr_nz (cache->base));
1784 }
1785 else
1786 {
1787 /* The prologue has been slowly allocating stack space. Adjust
1788 the SP back. */
1789 cache->base = this_sp - frame_size;
1790 if (hppa_debug)
1791 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [unwind adjust] } ",
1792 paddr_nz (cache->base));
1793
1794 }
1795 }
26d08f08 1796 else
9f7194c3
RC
1797 {
1798 /* This frame has not yet been created. */
1799 cache->base = this_sp;
1800
1801 if (hppa_debug)
1802 fprintf_unfiltered (gdb_stdlog, " (base=0x%s) [before prologue] } ",
1803 paddr_nz (cache->base));
1804
1805 }
1806
eded0a31 1807 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
26d08f08
AC
1808 }
1809
412275d5
AC
1810 /* The PC is found in the "return register", "Millicode" uses "r31"
1811 as the return register while normal code uses "rp". */
26d08f08 1812 if (u->Millicode)
9f7194c3 1813 {
34f75cc1
RC
1814 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
1815 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
9f7194c3
RC
1816 else
1817 {
1818 ULONGEST r31 = frame_unwind_register_unsigned (next_frame, 31);
34f75cc1 1819 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, r31);
9f7194c3
RC
1820 }
1821 }
26d08f08 1822 else
9f7194c3 1823 {
34f75cc1
RC
1824 if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
1825 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[HPPA_RP_REGNUM];
9f7194c3
RC
1826 else
1827 {
34f75cc1
RC
1828 ULONGEST rp = frame_unwind_register_unsigned (next_frame, HPPA_RP_REGNUM);
1829 trad_frame_set_value (cache->saved_regs, HPPA_PCOQ_HEAD_REGNUM, rp);
9f7194c3
RC
1830 }
1831 }
26d08f08
AC
1832
1833 {
1834 /* Convert all the offsets into addresses. */
1835 int reg;
1836 for (reg = 0; reg < NUM_REGS; reg++)
1837 {
1838 if (trad_frame_addr_p (cache->saved_regs, reg))
1839 cache->saved_regs[reg].addr += cache->base;
1840 }
1841 }
1842
369aa520
RC
1843 if (hppa_debug)
1844 fprintf_unfiltered (gdb_stdlog, "base=0x%s }",
1845 paddr_nz (((struct hppa_frame_cache *)*this_cache)->base));
26d08f08
AC
1846 return (*this_cache);
1847}
1848
1849static void
1850hppa_frame_this_id (struct frame_info *next_frame, void **this_cache,
1851 struct frame_id *this_id)
1852{
1853 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
1854 (*this_id) = frame_id_build (info->base, frame_func_unwind (next_frame));
1855}
1856
1857static void
1858hppa_frame_prev_register (struct frame_info *next_frame,
1859 void **this_cache,
1860 int regnum, int *optimizedp,
1861 enum lval_type *lvalp, CORE_ADDR *addrp,
1862 int *realnump, void *valuep)
1863{
1864 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
412275d5 1865 struct gdbarch *gdbarch = get_frame_arch (next_frame);
34f75cc1 1866 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
412275d5
AC
1867 {
1868 /* The PCOQ TAIL, or NPC, needs to be computed from the unwound
1869 PC register. */
1870 *optimizedp = 0;
1871 *lvalp = not_lval;
1872 *addrp = 0;
1873 *realnump = 0;
1874 if (valuep)
1875 {
34f75cc1 1876 int regsize = register_size (gdbarch, HPPA_PCOQ_HEAD_REGNUM);
412275d5
AC
1877 CORE_ADDR pc;
1878 int optimized;
1879 enum lval_type lval;
1880 CORE_ADDR addr;
1881 int realnum;
1882 bfd_byte value[MAX_REGISTER_SIZE];
1883 trad_frame_prev_register (next_frame, info->saved_regs,
34f75cc1 1884 HPPA_PCOQ_HEAD_REGNUM, &optimized, &lval, &addr,
412275d5
AC
1885 &realnum, &value);
1886 pc = extract_unsigned_integer (&value, regsize);
1887 store_unsigned_integer (valuep, regsize, pc + 4);
1888 }
1889 }
1890 else
1891 {
1892 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
1893 optimizedp, lvalp, addrp, realnump, valuep);
1894 }
26d08f08
AC
1895}
1896
1897static const struct frame_unwind hppa_frame_unwind =
1898{
1899 NORMAL_FRAME,
1900 hppa_frame_this_id,
1901 hppa_frame_prev_register
1902};
1903
1904static const struct frame_unwind *
1905hppa_frame_unwind_sniffer (struct frame_info *next_frame)
1906{
1907 return &hppa_frame_unwind;
1908}
1909
1910static CORE_ADDR
1911hppa_frame_base_address (struct frame_info *next_frame,
1912 void **this_cache)
1913{
1914 struct hppa_frame_cache *info = hppa_frame_cache (next_frame,
1915 this_cache);
1916 return info->base;
1917}
1918
1919static const struct frame_base hppa_frame_base = {
1920 &hppa_frame_unwind,
1921 hppa_frame_base_address,
1922 hppa_frame_base_address,
1923 hppa_frame_base_address
1924};
1925
1926static const struct frame_base *
1927hppa_frame_base_sniffer (struct frame_info *next_frame)
1928{
1929 return &hppa_frame_base;
1930}
1931
7f07c5b6
RC
1932/* Stub frames, used for all kinds of call stubs. */
1933struct hppa_stub_unwind_cache
1934{
1935 CORE_ADDR base;
1936 struct trad_frame_saved_reg *saved_regs;
1937};
1938
1939static struct hppa_stub_unwind_cache *
1940hppa_stub_frame_unwind_cache (struct frame_info *next_frame,
1941 void **this_cache)
1942{
1943 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1944 struct hppa_stub_unwind_cache *info;
1945
1946 if (*this_cache)
1947 return *this_cache;
1948
1949 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
1950 *this_cache = info;
1951 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1952
34f75cc1 1953 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
7f07c5b6
RC
1954 info->base = frame_unwind_register_unsigned (next_frame, HPPA_SP_REGNUM);
1955
1956 return info;
1957}
1958
1959static void
1960hppa_stub_frame_this_id (struct frame_info *next_frame,
1961 void **this_prologue_cache,
1962 struct frame_id *this_id)
1963{
1964 struct hppa_stub_unwind_cache *info
1965 = hppa_stub_frame_unwind_cache (next_frame, this_prologue_cache);
1966 *this_id = frame_id_build (info->base, frame_pc_unwind (next_frame));
1967}
1968
1969static void
1970hppa_stub_frame_prev_register (struct frame_info *next_frame,
1971 void **this_prologue_cache,
1972 int regnum, int *optimizedp,
1973 enum lval_type *lvalp, CORE_ADDR *addrp,
1974 int *realnump, void *bufferp)
1975{
1976 struct hppa_stub_unwind_cache *info
1977 = hppa_stub_frame_unwind_cache (next_frame, this_prologue_cache);
34f75cc1 1978 int pcoqt = (regnum == HPPA_PCOQ_TAIL_REGNUM);
7f07c5b6 1979 struct gdbarch *gdbarch = get_frame_arch (next_frame);
34f75cc1 1980 int regsize = register_size (gdbarch, HPPA_PCOQ_HEAD_REGNUM);
7f07c5b6
RC
1981
1982 if (pcoqt)
34f75cc1 1983 regnum = HPPA_PCOQ_HEAD_REGNUM;
7f07c5b6
RC
1984
1985 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
1986 optimizedp, lvalp, addrp, realnump, bufferp);
1987
1988 if (pcoqt)
1989 store_unsigned_integer (bufferp, regsize,
1990 extract_unsigned_integer (bufferp, regsize) + 4);
1991}
1992
1993static const struct frame_unwind hppa_stub_frame_unwind = {
1994 NORMAL_FRAME,
1995 hppa_stub_frame_this_id,
1996 hppa_stub_frame_prev_register
1997};
1998
1999static const struct frame_unwind *
2000hppa_stub_unwind_sniffer (struct frame_info *next_frame)
2001{
2002 CORE_ADDR pc = frame_pc_unwind (next_frame);
2003
2004 if (IN_SOLIB_CALL_TRAMPOLINE (pc, NULL)
2005 || IN_SOLIB_RETURN_TRAMPOLINE (pc, NULL))
2006 return &hppa_stub_frame_unwind;
2007 return NULL;
2008}
2009
26d08f08
AC
2010static struct frame_id
2011hppa_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2012{
2013 return frame_id_build (frame_unwind_register_unsigned (next_frame,
eded0a31 2014 HPPA_SP_REGNUM),
26d08f08
AC
2015 frame_pc_unwind (next_frame));
2016}
2017
2018static CORE_ADDR
2019hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2020{
34f75cc1 2021 return frame_unwind_register_signed (next_frame, HPPA_PCOQ_HEAD_REGNUM) & ~3;
26d08f08
AC
2022}
2023
9a043c1d
AC
2024/* Instead of this nasty cast, add a method pvoid() that prints out a
2025 host VOID data type (remember %p isn't portable). */
2026
2027static CORE_ADDR
2028hppa_pointer_to_address_hack (void *ptr)
2029{
2030 gdb_assert (sizeof (ptr) == TYPE_LENGTH (builtin_type_void_data_ptr));
2031 return POINTER_TO_ADDRESS (builtin_type_void_data_ptr, &ptr);
2032}
2033
c906108c 2034static void
fba45db2 2035unwind_command (char *exp, int from_tty)
c906108c
SS
2036{
2037 CORE_ADDR address;
2038 struct unwind_table_entry *u;
2039
2040 /* If we have an expression, evaluate it and use it as the address. */
2041
2042 if (exp != 0 && *exp != 0)
2043 address = parse_and_eval_address (exp);
2044 else
2045 return;
2046
2047 u = find_unwind_entry (address);
2048
2049 if (!u)
2050 {
2051 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2052 return;
2053 }
2054
ce414844 2055 printf_unfiltered ("unwind_table_entry (0x%s):\n",
9a043c1d 2056 paddr_nz (hppa_pointer_to_address_hack (u)));
c906108c
SS
2057
2058 printf_unfiltered ("\tregion_start = ");
2059 print_address (u->region_start, gdb_stdout);
2060
2061 printf_unfiltered ("\n\tregion_end = ");
2062 print_address (u->region_end, gdb_stdout);
2063
c906108c 2064#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2065
2066 printf_unfiltered ("\n\tflags =");
2067 pif (Cannot_unwind);
2068 pif (Millicode);
2069 pif (Millicode_save_sr0);
2070 pif (Entry_SR);
2071 pif (Args_stored);
2072 pif (Variable_Frame);
2073 pif (Separate_Package_Body);
2074 pif (Frame_Extension_Millicode);
2075 pif (Stack_Overflow_Check);
2076 pif (Two_Instruction_SP_Increment);
2077 pif (Ada_Region);
2078 pif (Save_SP);
2079 pif (Save_RP);
2080 pif (Save_MRP_in_frame);
2081 pif (extn_ptr_defined);
2082 pif (Cleanup_defined);
2083 pif (MPE_XL_interrupt_marker);
2084 pif (HP_UX_interrupt_marker);
2085 pif (Large_frame);
2086
2087 putchar_unfiltered ('\n');
2088
c906108c 2089#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2090
2091 pin (Region_description);
2092 pin (Entry_FR);
2093 pin (Entry_GR);
2094 pin (Total_frame_size);
2095}
c906108c 2096
c2c6d25f 2097void
fba45db2 2098hppa_skip_permanent_breakpoint (void)
c2c6d25f
JM
2099{
2100 /* To step over a breakpoint instruction on the PA takes some
2101 fiddling with the instruction address queue.
2102
2103 When we stop at a breakpoint, the IA queue front (the instruction
2104 we're executing now) points at the breakpoint instruction, and
2105 the IA queue back (the next instruction to execute) points to
2106 whatever instruction we would execute after the breakpoint, if it
2107 were an ordinary instruction. This is the case even if the
2108 breakpoint is in the delay slot of a branch instruction.
2109
2110 Clearly, to step past the breakpoint, we need to set the queue
2111 front to the back. But what do we put in the back? What
2112 instruction comes after that one? Because of the branch delay
2113 slot, the next insn is always at the back + 4. */
34f75cc1
RC
2114 write_register (HPPA_PCOQ_HEAD_REGNUM, read_register (HPPA_PCOQ_TAIL_REGNUM));
2115 write_register (HPPA_PCSQ_HEAD_REGNUM, read_register (HPPA_PCSQ_TAIL_REGNUM));
c2c6d25f 2116
34f75cc1 2117 write_register (HPPA_PCOQ_TAIL_REGNUM, read_register (HPPA_PCOQ_TAIL_REGNUM) + 4);
c2c6d25f
JM
2118 /* We can leave the tail's space the same, since there's no jump. */
2119}
2120
d709c020
JB
2121int
2122hppa_pc_requires_run_before_use (CORE_ADDR pc)
2123{
2124 /* Sometimes we may pluck out a minimal symbol that has a negative address.
2125
2126 An example of this occurs when an a.out is linked against a foo.sl.
2127 The foo.sl defines a global bar(), and the a.out declares a signature
2128 for bar(). However, the a.out doesn't directly call bar(), but passes
2129 its address in another call.
2130
2131 If you have this scenario and attempt to "break bar" before running,
2132 gdb will find a minimal symbol for bar() in the a.out. But that
2133 symbol's address will be negative. What this appears to denote is
2134 an index backwards from the base of the procedure linkage table (PLT)
2135 into the data linkage table (DLT), the end of which is contiguous
2136 with the start of the PLT. This is clearly not a valid address for
2137 us to set a breakpoint on.
2138
2139 Note that one must be careful in how one checks for a negative address.
2140 0xc0000000 is a legitimate address of something in a shared text
2141 segment, for example. Since I don't know what the possible range
2142 is of these "really, truly negative" addresses that come from the
2143 minimal symbols, I'm resorting to the gross hack of checking the
2144 top byte of the address for all 1's. Sigh. */
2145
2146 return (!target_has_stack && (pc & 0xFF000000));
2147}
2148
2149int
2150hppa_instruction_nullified (void)
2151{
2152 /* brobecker 2002/11/07: Couldn't we use a ULONGEST here? It would
2153 avoid the type cast. I'm leaving it as is for now as I'm doing
2154 semi-mechanical multiarching-related changes. */
34f75cc1
RC
2155 const int ipsw = (int) read_register (HPPA_IPSW_REGNUM);
2156 const int flags = (int) read_register (HPPA_FLAGS_REGNUM);
d709c020
JB
2157
2158 return ((ipsw & 0x00200000) && !(flags & 0x2));
2159}
2160
d709c020
JB
2161/* Return the GDB type object for the "standard" data type of data
2162 in register N. */
2163
eded0a31
AC
2164static struct type *
2165hppa32_register_type (struct gdbarch *gdbarch, int reg_nr)
d709c020 2166{
34f75cc1 2167 if (reg_nr < HPPA_FP4_REGNUM)
eded0a31 2168 return builtin_type_uint32;
d709c020 2169 else
eded0a31 2170 return builtin_type_ieee_single_big;
d709c020
JB
2171}
2172
3ff7cf9e
JB
2173/* Return the GDB type object for the "standard" data type of data
2174 in register N. hppa64 version. */
2175
eded0a31
AC
2176static struct type *
2177hppa64_register_type (struct gdbarch *gdbarch, int reg_nr)
3ff7cf9e 2178{
34f75cc1 2179 if (reg_nr < HPPA_FP4_REGNUM)
eded0a31 2180 return builtin_type_uint64;
3ff7cf9e 2181 else
eded0a31 2182 return builtin_type_ieee_double_big;
3ff7cf9e
JB
2183}
2184
d709c020
JB
2185/* Return True if REGNUM is not a register available to the user
2186 through ptrace(). */
2187
8d153463 2188static int
d709c020
JB
2189hppa_cannot_store_register (int regnum)
2190{
2191 return (regnum == 0
34f75cc1
RC
2192 || regnum == HPPA_PCSQ_HEAD_REGNUM
2193 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2194 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
d709c020
JB
2195
2196}
2197
8d153463 2198static CORE_ADDR
d709c020
JB
2199hppa_smash_text_address (CORE_ADDR addr)
2200{
2201 /* The low two bits of the PC on the PA contain the privilege level.
2202 Some genius implementing a (non-GCC) compiler apparently decided
2203 this means that "addresses" in a text section therefore include a
2204 privilege level, and thus symbol tables should contain these bits.
2205 This seems like a bonehead thing to do--anyway, it seems to work
2206 for our purposes to just ignore those bits. */
2207
2208 return (addr &= ~0x3);
2209}
2210
143985b7
AF
2211/* Get the ith function argument for the current function. */
2212CORE_ADDR
2213hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2214 struct type *type)
2215{
2216 CORE_ADDR addr;
34f75cc1 2217 get_frame_register (frame, HPPA_R0_REGNUM + 26 - argi, &addr);
143985b7
AF
2218 return addr;
2219}
2220
0f8d9d59
RC
2221static void
2222hppa_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
2223 int regnum, void *buf)
2224{
2225 ULONGEST tmp;
2226
2227 regcache_raw_read_unsigned (regcache, regnum, &tmp);
34f75cc1 2228 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
0f8d9d59
RC
2229 tmp &= ~0x3;
2230 store_unsigned_integer (buf, sizeof(tmp), tmp);
2231}
2232
8e8b2dba
MC
2233/* Here is a table of C type sizes on hppa with various compiles
2234 and options. I measured this on PA 9000/800 with HP-UX 11.11
2235 and these compilers:
2236
2237 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2238 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2239 /opt/aCC/bin/aCC B3910B A.03.45
2240 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2241
2242 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2243 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2244 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2245 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2246 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2247 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2248 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2249 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2250
2251 Each line is:
2252
2253 compiler and options
2254 char, short, int, long, long long
2255 float, double, long double
2256 char *, void (*)()
2257
2258 So all these compilers use either ILP32 or LP64 model.
2259 TODO: gcc has more options so it needs more investigation.
2260
a2379359
MC
2261 For floating point types, see:
2262
2263 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2264 HP-UX floating-point guide, hpux 11.00
2265
8e8b2dba
MC
2266 -- chastain 2003-12-18 */
2267
e6e68f1f
JB
2268static struct gdbarch *
2269hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2270{
3ff7cf9e 2271 struct gdbarch_tdep *tdep;
e6e68f1f 2272 struct gdbarch *gdbarch;
59623e27
JB
2273
2274 /* Try to determine the ABI of the object we are loading. */
4be87837 2275 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
59623e27 2276 {
4be87837
DJ
2277 /* If it's a SOM file, assume it's HP/UX SOM. */
2278 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
2279 info.osabi = GDB_OSABI_HPUX_SOM;
59623e27 2280 }
e6e68f1f
JB
2281
2282 /* find a candidate among the list of pre-declared architectures. */
2283 arches = gdbarch_list_lookup_by_info (arches, &info);
2284 if (arches != NULL)
2285 return (arches->gdbarch);
2286
2287 /* If none found, then allocate and initialize one. */
fdd72f95 2288 tdep = XZALLOC (struct gdbarch_tdep);
3ff7cf9e
JB
2289 gdbarch = gdbarch_alloc (&info, tdep);
2290
2291 /* Determine from the bfd_arch_info structure if we are dealing with
2292 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
2293 then default to a 32bit machine. */
2294 if (info.bfd_arch_info != NULL)
2295 tdep->bytes_per_address =
2296 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
2297 else
2298 tdep->bytes_per_address = 4;
2299
2300 /* Some parts of the gdbarch vector depend on whether we are running
2301 on a 32 bits or 64 bits target. */
2302 switch (tdep->bytes_per_address)
2303 {
2304 case 4:
2305 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
2306 set_gdbarch_register_name (gdbarch, hppa32_register_name);
eded0a31 2307 set_gdbarch_register_type (gdbarch, hppa32_register_type);
3ff7cf9e
JB
2308 break;
2309 case 8:
2310 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
2311 set_gdbarch_register_name (gdbarch, hppa64_register_name);
eded0a31 2312 set_gdbarch_register_type (gdbarch, hppa64_register_type);
3ff7cf9e
JB
2313 break;
2314 default:
2315 internal_error (__FILE__, __LINE__, "Unsupported address size: %d",
2316 tdep->bytes_per_address);
2317 }
2318
3ff7cf9e 2319 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 2320 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 2321
8e8b2dba
MC
2322 /* The following gdbarch vector elements are the same in both ILP32
2323 and LP64, but might show differences some day. */
2324 set_gdbarch_long_long_bit (gdbarch, 64);
2325 set_gdbarch_long_double_bit (gdbarch, 128);
a2379359 2326 set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big);
8e8b2dba 2327
3ff7cf9e
JB
2328 /* The following gdbarch vector elements do not depend on the address
2329 size, or in any other gdbarch element previously set. */
60383d10 2330 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
a2a84a72 2331 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
2332 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
2333 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
60383d10 2334 set_gdbarch_cannot_store_register (gdbarch, hppa_cannot_store_register);
50306a9d 2335 set_gdbarch_cannot_fetch_register (gdbarch, hppa_cannot_store_register);
b6fbdd1d 2336 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
60383d10
JB
2337 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
2338 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2339 set_gdbarch_read_pc (gdbarch, hppa_target_read_pc);
2340 set_gdbarch_write_pc (gdbarch, hppa_target_write_pc);
60383d10 2341
143985b7
AF
2342 /* Helper for function argument information. */
2343 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
2344
36482093
AC
2345 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
2346
3a3bc038
AC
2347 /* When a hardware watchpoint triggers, we'll move the inferior past
2348 it by removing all eventpoints; stepping past the instruction
2349 that caused the trigger; reinserting eventpoints; and checking
2350 whether any watched location changed. */
2351 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
2352
5979bc46 2353 /* Inferior function call methods. */
fca7aa43 2354 switch (tdep->bytes_per_address)
5979bc46 2355 {
fca7aa43
AC
2356 case 4:
2357 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
2358 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
2359 break;
2360 case 8:
782eae8b
AC
2361 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
2362 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 2363 break;
782eae8b
AC
2364 default:
2365 internal_error (__FILE__, __LINE__, "bad switch");
fad850b2
AC
2366 }
2367
2368 /* Struct return methods. */
fca7aa43 2369 switch (tdep->bytes_per_address)
fad850b2 2370 {
fca7aa43
AC
2371 case 4:
2372 set_gdbarch_return_value (gdbarch, hppa32_return_value);
2373 break;
2374 case 8:
782eae8b 2375 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 2376 break;
fca7aa43
AC
2377 default:
2378 internal_error (__FILE__, __LINE__, "bad switch");
e963316f 2379 }
7f07c5b6 2380
85f4f2d8 2381 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
7f07c5b6 2382 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 2383
5979bc46 2384 /* Frame unwind methods. */
782eae8b
AC
2385 set_gdbarch_unwind_dummy_id (gdbarch, hppa_unwind_dummy_id);
2386 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 2387
50306a9d
RC
2388 /* Hook in ABI-specific overrides, if they have been registered. */
2389 gdbarch_init_osabi (info, gdbarch);
2390
7f07c5b6
RC
2391 /* Hook in the default unwinders. */
2392 frame_unwind_append_sniffer (gdbarch, hppa_stub_unwind_sniffer);
782eae8b
AC
2393 frame_unwind_append_sniffer (gdbarch, hppa_frame_unwind_sniffer);
2394 frame_base_append_sniffer (gdbarch, hppa_frame_base_sniffer);
5979bc46 2395
e6e68f1f
JB
2396 return gdbarch;
2397}
2398
2399static void
2400hppa_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
2401{
fdd72f95
RC
2402 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
2403
2404 fprintf_unfiltered (file, "bytes_per_address = %d\n",
2405 tdep->bytes_per_address);
2406 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
2407}
2408
4facf7e8
JB
2409void
2410_initialize_hppa_tdep (void)
2411{
2412 struct cmd_list_element *c;
2413 void break_at_finish_command (char *arg, int from_tty);
2414 void tbreak_at_finish_command (char *arg, int from_tty);
2415 void break_at_finish_at_depth_command (char *arg, int from_tty);
2416
e6e68f1f 2417 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8 2418
7c46b9fb
RC
2419 hppa_objfile_priv_data = register_objfile_data ();
2420
4facf7e8
JB
2421 add_cmd ("unwind", class_maintenance, unwind_command,
2422 "Print unwind table entry at given address.",
2423 &maintenanceprintlist);
2424
2425 deprecate_cmd (add_com ("xbreak", class_breakpoint,
2426 break_at_finish_command,
2427 concat ("Set breakpoint at procedure exit. \n\
2428Argument may be function name, or \"*\" and an address.\n\
2429If function is specified, break at end of code for that function.\n\
2430If an address is specified, break at the end of the function that contains \n\
2431that exact address.\n",
2432 "With no arg, uses current execution address of selected stack frame.\n\
2433This is useful for breaking on return to a stack frame.\n\
2434\n\
2435Multiple breakpoints at one place are permitted, and useful if conditional.\n\
2436\n\
2437Do \"help breakpoints\" for info on other commands dealing with breakpoints.", NULL)), NULL);
2438 deprecate_cmd (add_com_alias ("xb", "xbreak", class_breakpoint, 1), NULL);
2439 deprecate_cmd (add_com_alias ("xbr", "xbreak", class_breakpoint, 1), NULL);
2440 deprecate_cmd (add_com_alias ("xbre", "xbreak", class_breakpoint, 1), NULL);
2441 deprecate_cmd (add_com_alias ("xbrea", "xbreak", class_breakpoint, 1), NULL);
2442
2443 deprecate_cmd (c = add_com ("txbreak", class_breakpoint,
2444 tbreak_at_finish_command,
2445"Set temporary breakpoint at procedure exit. Either there should\n\
2446be no argument or the argument must be a depth.\n"), NULL);
2447 set_cmd_completer (c, location_completer);
2448
2449 if (xdb_commands)
2450 deprecate_cmd (add_com ("bx", class_breakpoint,
2451 break_at_finish_at_depth_command,
2452"Set breakpoint at procedure exit. Either there should\n\
2453be no argument or the argument must be a depth.\n"), NULL);
369aa520
RC
2454
2455 /* Debug this files internals. */
2456 add_show_from_set (add_set_cmd ("hppa", class_maintenance, var_zinteger,
2457 &hppa_debug, "Set hppa debugging.\n\
2458When non-zero, hppa specific debugging is enabled.", &setdebuglist), &showdebuglist);
4facf7e8
JB
2459}
2460
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