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Merge drm-fixes into drm-next.
[deliverable/linux.git] / drivers / media / pci / cx88 / cx88-dvb.c
1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc4000.h"
45 #include "xc5000.h"
46 #include "nxt200x.h"
47 #include "cx24123.h"
48 #include "isl6421.h"
49 #include "tuner-simple.h"
50 #include "tda9887.h"
51 #include "s5h1411.h"
52 #include "stv0299.h"
53 #include "z0194a.h"
54 #include "stv0288.h"
55 #include "stb6000.h"
56 #include "cx24116.h"
57 #include "stv0900.h"
58 #include "stb6100.h"
59 #include "stb6100_proc.h"
60 #include "mb86a16.h"
61 #include "ts2020.h"
62 #include "ds3000.h"
63
64 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
65 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
66 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
67 MODULE_LICENSE("GPL");
68 MODULE_VERSION(CX88_VERSION);
69
70 static unsigned int debug;
71 module_param(debug, int, 0644);
72 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
73
74 static unsigned int dvb_buf_tscnt = 32;
75 module_param(dvb_buf_tscnt, int, 0644);
76 MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
77
78 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
79
80 #define dprintk(level,fmt, arg...) if (debug >= level) \
81 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
82
83 /* ------------------------------------------------------------------ */
84
85 static int queue_setup(struct vb2_queue *q,
86 unsigned int *num_buffers, unsigned int *num_planes,
87 unsigned int sizes[], void *alloc_ctxs[])
88 {
89 struct cx8802_dev *dev = q->drv_priv;
90
91 *num_planes = 1;
92 dev->ts_packet_size = 188 * 4;
93 dev->ts_packet_count = dvb_buf_tscnt;
94 sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
95 alloc_ctxs[0] = dev->alloc_ctx;
96 *num_buffers = dvb_buf_tscnt;
97 return 0;
98 }
99
100 static int buffer_prepare(struct vb2_buffer *vb)
101 {
102 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
103 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
104 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
105
106 return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
107 }
108
109 static void buffer_finish(struct vb2_buffer *vb)
110 {
111 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
112 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
113 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
114 struct cx88_riscmem *risc = &buf->risc;
115
116 if (risc->cpu)
117 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
118 memset(risc, 0, sizeof(*risc));
119 }
120
121 static void buffer_queue(struct vb2_buffer *vb)
122 {
123 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
124 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
125 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
126
127 cx8802_buf_queue(dev, buf);
128 }
129
130 static int start_streaming(struct vb2_queue *q, unsigned int count)
131 {
132 struct cx8802_dev *dev = q->drv_priv;
133 struct cx88_dmaqueue *dmaq = &dev->mpegq;
134 struct cx88_buffer *buf;
135
136 buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
137 cx8802_start_dma(dev, dmaq, buf);
138 return 0;
139 }
140
141 static void stop_streaming(struct vb2_queue *q)
142 {
143 struct cx8802_dev *dev = q->drv_priv;
144 struct cx88_dmaqueue *dmaq = &dev->mpegq;
145 unsigned long flags;
146
147 cx8802_cancel_buffers(dev);
148
149 spin_lock_irqsave(&dev->slock, flags);
150 while (!list_empty(&dmaq->active)) {
151 struct cx88_buffer *buf = list_entry(dmaq->active.next,
152 struct cx88_buffer, list);
153
154 list_del(&buf->list);
155 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
156 }
157 spin_unlock_irqrestore(&dev->slock, flags);
158 }
159
160 static struct vb2_ops dvb_qops = {
161 .queue_setup = queue_setup,
162 .buf_prepare = buffer_prepare,
163 .buf_finish = buffer_finish,
164 .buf_queue = buffer_queue,
165 .wait_prepare = vb2_ops_wait_prepare,
166 .wait_finish = vb2_ops_wait_finish,
167 .start_streaming = start_streaming,
168 .stop_streaming = stop_streaming,
169 };
170
171 /* ------------------------------------------------------------------ */
172
173 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
174 {
175 struct cx8802_dev *dev= fe->dvb->priv;
176 struct cx8802_driver *drv = NULL;
177 int ret = 0;
178 int fe_id;
179
180 fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
181 if (!fe_id) {
182 printk(KERN_ERR "%s() No frontend found\n", __func__);
183 return -EINVAL;
184 }
185
186 mutex_lock(&dev->core->lock);
187 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
188 if (drv) {
189 if (acquire){
190 dev->frontends.active_fe_id = fe_id;
191 ret = drv->request_acquire(drv);
192 } else {
193 ret = drv->request_release(drv);
194 dev->frontends.active_fe_id = 0;
195 }
196 }
197 mutex_unlock(&dev->core->lock);
198
199 return ret;
200 }
201
202 static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
203 {
204 struct vb2_dvb_frontends *f;
205 struct vb2_dvb_frontend *fe;
206
207 if (!core->dvbdev)
208 return;
209
210 f = &core->dvbdev->frontends;
211
212 if (!f)
213 return;
214
215 if (f->gate <= 1) /* undefined or fe0 */
216 fe = vb2_dvb_get_frontend(f, 1);
217 else
218 fe = vb2_dvb_get_frontend(f, f->gate);
219
220 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
221 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
222 }
223
224 /* ------------------------------------------------------------------ */
225
226 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
227 {
228 static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
229 static const u8 reset [] = { RESET, 0x80 };
230 static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
231 static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
232 static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
233 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
234
235 mt352_write(fe, clock_config, sizeof(clock_config));
236 udelay(200);
237 mt352_write(fe, reset, sizeof(reset));
238 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
239
240 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
241 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
242 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
243 return 0;
244 }
245
246 static int dvico_dual_demod_init(struct dvb_frontend *fe)
247 {
248 static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
249 static const u8 reset [] = { RESET, 0x80 };
250 static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
251 static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
252 static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
253 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
254
255 mt352_write(fe, clock_config, sizeof(clock_config));
256 udelay(200);
257 mt352_write(fe, reset, sizeof(reset));
258 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
259
260 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
261 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
262 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
263
264 return 0;
265 }
266
267 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
268 {
269 static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
270 static const u8 reset [] = { 0x50, 0x80 };
271 static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
272 static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
273 0x00, 0xFF, 0x00, 0x40, 0x40 };
274 static const u8 dntv_extra[] = { 0xB5, 0x7A };
275 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
276
277 mt352_write(fe, clock_config, sizeof(clock_config));
278 udelay(2000);
279 mt352_write(fe, reset, sizeof(reset));
280 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
281
282 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
283 udelay(2000);
284 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
285 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
286
287 return 0;
288 }
289
290 static const struct mt352_config dvico_fusionhdtv = {
291 .demod_address = 0x0f,
292 .demod_init = dvico_fusionhdtv_demod_init,
293 };
294
295 static const struct mt352_config dntv_live_dvbt_config = {
296 .demod_address = 0x0f,
297 .demod_init = dntv_live_dvbt_demod_init,
298 };
299
300 static const struct mt352_config dvico_fusionhdtv_dual = {
301 .demod_address = 0x0f,
302 .demod_init = dvico_dual_demod_init,
303 };
304
305 static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
306 .demod_address = (0x1e >> 1),
307 .no_tuner = 1,
308 .if2 = 45600,
309 };
310
311 static struct mb86a16_config twinhan_vp1027 = {
312 .demod_address = 0x08,
313 };
314
315 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
316 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
317 {
318 static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
319 static const u8 reset [] = { 0x50, 0x80 };
320 static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
321 static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
322 0x00, 0xFF, 0x00, 0x40, 0x40 };
323 static const u8 dntv_extra[] = { 0xB5, 0x7A };
324 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
325
326 mt352_write(fe, clock_config, sizeof(clock_config));
327 udelay(2000);
328 mt352_write(fe, reset, sizeof(reset));
329 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
330
331 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
332 udelay(2000);
333 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
334 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
335
336 return 0;
337 }
338
339 static const struct mt352_config dntv_live_dvbt_pro_config = {
340 .demod_address = 0x0f,
341 .no_tuner = 1,
342 .demod_init = dntv_live_dvbt_pro_demod_init,
343 };
344 #endif
345
346 static const struct zl10353_config dvico_fusionhdtv_hybrid = {
347 .demod_address = 0x0f,
348 .no_tuner = 1,
349 };
350
351 static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
352 .demod_address = 0x0f,
353 .if2 = 45600,
354 .no_tuner = 1,
355 };
356
357 static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
358 .demod_address = 0x0f,
359 .if2 = 4560,
360 .no_tuner = 1,
361 .demod_init = dvico_fusionhdtv_demod_init,
362 };
363
364 static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
365 .demod_address = 0x0f,
366 };
367
368 static const struct cx22702_config connexant_refboard_config = {
369 .demod_address = 0x43,
370 .output_mode = CX22702_SERIAL_OUTPUT,
371 };
372
373 static const struct cx22702_config hauppauge_hvr_config = {
374 .demod_address = 0x63,
375 .output_mode = CX22702_SERIAL_OUTPUT,
376 };
377
378 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
379 {
380 struct cx8802_dev *dev= fe->dvb->priv;
381 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
382 return 0;
383 }
384
385 static const struct or51132_config pchdtv_hd3000 = {
386 .demod_address = 0x15,
387 .set_ts_params = or51132_set_ts_param,
388 };
389
390 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
391 {
392 struct cx8802_dev *dev= fe->dvb->priv;
393 struct cx88_core *core = dev->core;
394
395 dprintk(1, "%s: index = %d\n", __func__, index);
396 if (index == 0)
397 cx_clear(MO_GP0_IO, 8);
398 else
399 cx_set(MO_GP0_IO, 8);
400 return 0;
401 }
402
403 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
404 {
405 struct cx8802_dev *dev= fe->dvb->priv;
406 if (is_punctured)
407 dev->ts_gen_cntrl |= 0x04;
408 else
409 dev->ts_gen_cntrl &= ~0x04;
410 return 0;
411 }
412
413 static struct lgdt330x_config fusionhdtv_3_gold = {
414 .demod_address = 0x0e,
415 .demod_chip = LGDT3302,
416 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
417 .set_ts_params = lgdt330x_set_ts_param,
418 };
419
420 static const struct lgdt330x_config fusionhdtv_5_gold = {
421 .demod_address = 0x0e,
422 .demod_chip = LGDT3303,
423 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
424 .set_ts_params = lgdt330x_set_ts_param,
425 };
426
427 static const struct lgdt330x_config pchdtv_hd5500 = {
428 .demod_address = 0x59,
429 .demod_chip = LGDT3303,
430 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
431 .set_ts_params = lgdt330x_set_ts_param,
432 };
433
434 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
435 {
436 struct cx8802_dev *dev= fe->dvb->priv;
437 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
438 return 0;
439 }
440
441 static const struct nxt200x_config ati_hdtvwonder = {
442 .demod_address = 0x0a,
443 .set_ts_params = nxt200x_set_ts_param,
444 };
445
446 static int cx24123_set_ts_param(struct dvb_frontend* fe,
447 int is_punctured)
448 {
449 struct cx8802_dev *dev= fe->dvb->priv;
450 dev->ts_gen_cntrl = 0x02;
451 return 0;
452 }
453
454 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
455 enum fe_sec_voltage voltage)
456 {
457 struct cx8802_dev *dev= fe->dvb->priv;
458 struct cx88_core *core = dev->core;
459
460 if (voltage == SEC_VOLTAGE_OFF)
461 cx_write(MO_GP0_IO, 0x000006fb);
462 else
463 cx_write(MO_GP0_IO, 0x000006f9);
464
465 if (core->prev_set_voltage)
466 return core->prev_set_voltage(fe, voltage);
467 return 0;
468 }
469
470 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
471 enum fe_sec_voltage voltage)
472 {
473 struct cx8802_dev *dev= fe->dvb->priv;
474 struct cx88_core *core = dev->core;
475
476 if (voltage == SEC_VOLTAGE_OFF) {
477 dprintk(1,"LNB Voltage OFF\n");
478 cx_write(MO_GP0_IO, 0x0000efff);
479 }
480
481 if (core->prev_set_voltage)
482 return core->prev_set_voltage(fe, voltage);
483 return 0;
484 }
485
486 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
487 enum fe_sec_voltage voltage)
488 {
489 struct cx8802_dev *dev= fe->dvb->priv;
490 struct cx88_core *core = dev->core;
491
492 cx_set(MO_GP0_IO, 0x6040);
493 switch (voltage) {
494 case SEC_VOLTAGE_13:
495 cx_clear(MO_GP0_IO, 0x20);
496 break;
497 case SEC_VOLTAGE_18:
498 cx_set(MO_GP0_IO, 0x20);
499 break;
500 case SEC_VOLTAGE_OFF:
501 cx_clear(MO_GP0_IO, 0x20);
502 break;
503 }
504
505 if (core->prev_set_voltage)
506 return core->prev_set_voltage(fe, voltage);
507 return 0;
508 }
509
510 static int vp1027_set_voltage(struct dvb_frontend *fe,
511 enum fe_sec_voltage voltage)
512 {
513 struct cx8802_dev *dev = fe->dvb->priv;
514 struct cx88_core *core = dev->core;
515
516 switch (voltage) {
517 case SEC_VOLTAGE_13:
518 dprintk(1, "LNB SEC Voltage=13\n");
519 cx_write(MO_GP0_IO, 0x00001220);
520 break;
521 case SEC_VOLTAGE_18:
522 dprintk(1, "LNB SEC Voltage=18\n");
523 cx_write(MO_GP0_IO, 0x00001222);
524 break;
525 case SEC_VOLTAGE_OFF:
526 dprintk(1, "LNB Voltage OFF\n");
527 cx_write(MO_GP0_IO, 0x00001230);
528 break;
529 }
530
531 if (core->prev_set_voltage)
532 return core->prev_set_voltage(fe, voltage);
533 return 0;
534 }
535
536 static const struct cx24123_config geniatech_dvbs_config = {
537 .demod_address = 0x55,
538 .set_ts_params = cx24123_set_ts_param,
539 };
540
541 static const struct cx24123_config hauppauge_novas_config = {
542 .demod_address = 0x55,
543 .set_ts_params = cx24123_set_ts_param,
544 };
545
546 static const struct cx24123_config kworld_dvbs_100_config = {
547 .demod_address = 0x15,
548 .set_ts_params = cx24123_set_ts_param,
549 .lnb_polarity = 1,
550 };
551
552 static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
553 .demod_address = 0x32 >> 1,
554 .output_mode = S5H1409_PARALLEL_OUTPUT,
555 .gpio = S5H1409_GPIO_ON,
556 .qam_if = 44000,
557 .inversion = S5H1409_INVERSION_OFF,
558 .status_mode = S5H1409_DEMODLOCKING,
559 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
560 };
561
562 static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
563 .demod_address = 0x32 >> 1,
564 .output_mode = S5H1409_SERIAL_OUTPUT,
565 .gpio = S5H1409_GPIO_OFF,
566 .inversion = S5H1409_INVERSION_OFF,
567 .status_mode = S5H1409_DEMODLOCKING,
568 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
569 };
570
571 static const struct s5h1409_config kworld_atsc_120_config = {
572 .demod_address = 0x32 >> 1,
573 .output_mode = S5H1409_SERIAL_OUTPUT,
574 .gpio = S5H1409_GPIO_OFF,
575 .inversion = S5H1409_INVERSION_OFF,
576 .status_mode = S5H1409_DEMODLOCKING,
577 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
578 };
579
580 static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
581 .i2c_address = 0x64,
582 .if_khz = 5380,
583 };
584
585 static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
586 .demod_address = (0x1e >> 1),
587 .no_tuner = 1,
588 .if2 = 45600,
589 };
590
591 static const struct zl10353_config cx88_geniatech_x8000_mt = {
592 .demod_address = (0x1e >> 1),
593 .no_tuner = 1,
594 .disable_i2c_gate_ctrl = 1,
595 };
596
597 static const struct s5h1411_config dvico_fusionhdtv7_config = {
598 .output_mode = S5H1411_SERIAL_OUTPUT,
599 .gpio = S5H1411_GPIO_ON,
600 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
601 .qam_if = S5H1411_IF_44000,
602 .vsb_if = S5H1411_IF_44000,
603 .inversion = S5H1411_INVERSION_OFF,
604 .status_mode = S5H1411_DEMODLOCKING
605 };
606
607 static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
608 .i2c_address = 0xc2 >> 1,
609 .if_khz = 5380,
610 };
611
612 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
613 {
614 struct dvb_frontend *fe;
615 struct vb2_dvb_frontend *fe0 = NULL;
616 struct xc2028_ctrl ctl;
617 struct xc2028_config cfg = {
618 .i2c_adap = &dev->core->i2c_adap,
619 .i2c_addr = addr,
620 .ctrl = &ctl,
621 };
622
623 /* Get the first frontend */
624 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
625 if (!fe0)
626 return -EINVAL;
627
628 if (!fe0->dvb.frontend) {
629 printk(KERN_ERR "%s/2: dvb frontend not attached. "
630 "Can't attach xc3028\n",
631 dev->core->name);
632 return -EINVAL;
633 }
634
635 /*
636 * Some xc3028 devices may be hidden by an I2C gate. This is known
637 * to happen with some s5h1409-based devices.
638 * Now that I2C gate is open, sets up xc3028 configuration
639 */
640 cx88_setup_xc3028(dev->core, &ctl);
641
642 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
643 if (!fe) {
644 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
645 dev->core->name);
646 dvb_frontend_detach(fe0->dvb.frontend);
647 dvb_unregister_frontend(fe0->dvb.frontend);
648 fe0->dvb.frontend = NULL;
649 return -EINVAL;
650 }
651
652 printk(KERN_INFO "%s/2: xc3028 attached\n",
653 dev->core->name);
654
655 return 0;
656 }
657
658 static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
659 {
660 struct dvb_frontend *fe;
661 struct vb2_dvb_frontend *fe0 = NULL;
662
663 /* Get the first frontend */
664 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
665 if (!fe0)
666 return -EINVAL;
667
668 if (!fe0->dvb.frontend) {
669 printk(KERN_ERR "%s/2: dvb frontend not attached. "
670 "Can't attach xc4000\n",
671 dev->core->name);
672 return -EINVAL;
673 }
674
675 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
676 cfg);
677 if (!fe) {
678 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
679 dev->core->name);
680 dvb_frontend_detach(fe0->dvb.frontend);
681 dvb_unregister_frontend(fe0->dvb.frontend);
682 fe0->dvb.frontend = NULL;
683 return -EINVAL;
684 }
685
686 printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name);
687
688 return 0;
689 }
690
691 static int cx24116_set_ts_param(struct dvb_frontend *fe,
692 int is_punctured)
693 {
694 struct cx8802_dev *dev = fe->dvb->priv;
695 dev->ts_gen_cntrl = 0x2;
696
697 return 0;
698 }
699
700 static int stv0900_set_ts_param(struct dvb_frontend *fe,
701 int is_punctured)
702 {
703 struct cx8802_dev *dev = fe->dvb->priv;
704 dev->ts_gen_cntrl = 0;
705
706 return 0;
707 }
708
709 static int cx24116_reset_device(struct dvb_frontend *fe)
710 {
711 struct cx8802_dev *dev = fe->dvb->priv;
712 struct cx88_core *core = dev->core;
713
714 /* Reset the part */
715 /* Put the cx24116 into reset */
716 cx_write(MO_SRST_IO, 0);
717 msleep(10);
718 /* Take the cx24116 out of reset */
719 cx_write(MO_SRST_IO, 1);
720 msleep(10);
721
722 return 0;
723 }
724
725 static const struct cx24116_config hauppauge_hvr4000_config = {
726 .demod_address = 0x05,
727 .set_ts_params = cx24116_set_ts_param,
728 .reset_device = cx24116_reset_device,
729 };
730
731 static const struct cx24116_config tevii_s460_config = {
732 .demod_address = 0x55,
733 .set_ts_params = cx24116_set_ts_param,
734 .reset_device = cx24116_reset_device,
735 };
736
737 static int ds3000_set_ts_param(struct dvb_frontend *fe,
738 int is_punctured)
739 {
740 struct cx8802_dev *dev = fe->dvb->priv;
741 dev->ts_gen_cntrl = 4;
742
743 return 0;
744 }
745
746 static struct ds3000_config tevii_ds3000_config = {
747 .demod_address = 0x68,
748 .set_ts_params = ds3000_set_ts_param,
749 };
750
751 static struct ts2020_config tevii_ts2020_config = {
752 .tuner_address = 0x60,
753 .clk_out_div = 1,
754 };
755
756 static const struct stv0900_config prof_7301_stv0900_config = {
757 .demod_address = 0x6a,
758 /* demod_mode = 0,*/
759 .xtal = 27000000,
760 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
761 .diseqc_mode = 2,/* 2/3 PWM */
762 .tun1_maddress = 0,/* 0x60 */
763 .tun1_adc = 0,/* 2 Vpp */
764 .path1_mode = 3,
765 .set_ts_params = stv0900_set_ts_param,
766 };
767
768 static const struct stb6100_config prof_7301_stb6100_config = {
769 .tuner_address = 0x60,
770 .refclock = 27000000,
771 };
772
773 static const struct stv0299_config tevii_tuner_sharp_config = {
774 .demod_address = 0x68,
775 .inittab = sharp_z0194a_inittab,
776 .mclk = 88000000UL,
777 .invert = 1,
778 .skip_reinit = 0,
779 .lock_output = 1,
780 .volt13_op0_op1 = STV0299_VOLT13_OP1,
781 .min_delay_ms = 100,
782 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
783 .set_ts_params = cx24116_set_ts_param,
784 };
785
786 static const struct stv0288_config tevii_tuner_earda_config = {
787 .demod_address = 0x68,
788 .min_delay_ms = 100,
789 .set_ts_params = cx24116_set_ts_param,
790 };
791
792 static int cx8802_alloc_frontends(struct cx8802_dev *dev)
793 {
794 struct cx88_core *core = dev->core;
795 struct vb2_dvb_frontend *fe = NULL;
796 int i;
797
798 mutex_init(&dev->frontends.lock);
799 INIT_LIST_HEAD(&dev->frontends.felist);
800
801 if (!core->board.num_frontends)
802 return -ENODEV;
803
804 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
805 core->board.num_frontends);
806 for (i = 1; i <= core->board.num_frontends; i++) {
807 fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
808 if (!fe) {
809 printk(KERN_ERR "%s() failed to alloc\n", __func__);
810 vb2_dvb_dealloc_frontends(&dev->frontends);
811 return -ENOMEM;
812 }
813 }
814 return 0;
815 }
816
817
818
819 static const u8 samsung_smt_7020_inittab[] = {
820 0x01, 0x15,
821 0x02, 0x00,
822 0x03, 0x00,
823 0x04, 0x7D,
824 0x05, 0x0F,
825 0x06, 0x02,
826 0x07, 0x00,
827 0x08, 0x60,
828
829 0x0A, 0xC2,
830 0x0B, 0x00,
831 0x0C, 0x01,
832 0x0D, 0x81,
833 0x0E, 0x44,
834 0x0F, 0x09,
835 0x10, 0x3C,
836 0x11, 0x84,
837 0x12, 0xDA,
838 0x13, 0x99,
839 0x14, 0x8D,
840 0x15, 0xCE,
841 0x16, 0xE8,
842 0x17, 0x43,
843 0x18, 0x1C,
844 0x19, 0x1B,
845 0x1A, 0x1D,
846
847 0x1C, 0x12,
848 0x1D, 0x00,
849 0x1E, 0x00,
850 0x1F, 0x00,
851 0x20, 0x00,
852 0x21, 0x00,
853 0x22, 0x00,
854 0x23, 0x00,
855
856 0x28, 0x02,
857 0x29, 0x28,
858 0x2A, 0x14,
859 0x2B, 0x0F,
860 0x2C, 0x09,
861 0x2D, 0x05,
862
863 0x31, 0x1F,
864 0x32, 0x19,
865 0x33, 0xFC,
866 0x34, 0x13,
867 0xff, 0xff,
868 };
869
870
871 static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
872 {
873 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
874 struct cx8802_dev *dev = fe->dvb->priv;
875 u8 buf[4];
876 u32 div;
877 struct i2c_msg msg = {
878 .addr = 0x61,
879 .flags = 0,
880 .buf = buf,
881 .len = sizeof(buf) };
882
883 div = c->frequency / 125;
884
885 buf[0] = (div >> 8) & 0x7f;
886 buf[1] = div & 0xff;
887 buf[2] = 0x84; /* 0xC4 */
888 buf[3] = 0x00;
889
890 if (c->frequency < 1500000)
891 buf[3] |= 0x10;
892
893 if (fe->ops.i2c_gate_ctrl)
894 fe->ops.i2c_gate_ctrl(fe, 1);
895
896 if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
897 return -EIO;
898
899 return 0;
900 }
901
902 static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
903 enum fe_sec_tone_mode tone)
904 {
905 struct cx8802_dev *dev = fe->dvb->priv;
906 struct cx88_core *core = dev->core;
907
908 cx_set(MO_GP0_IO, 0x0800);
909
910 switch (tone) {
911 case SEC_TONE_ON:
912 cx_set(MO_GP0_IO, 0x08);
913 break;
914 case SEC_TONE_OFF:
915 cx_clear(MO_GP0_IO, 0x08);
916 break;
917 default:
918 return -EINVAL;
919 }
920
921 return 0;
922 }
923
924 static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
925 enum fe_sec_voltage voltage)
926 {
927 struct cx8802_dev *dev = fe->dvb->priv;
928 struct cx88_core *core = dev->core;
929
930 u8 data;
931 struct i2c_msg msg = {
932 .addr = 8,
933 .flags = 0,
934 .buf = &data,
935 .len = sizeof(data) };
936
937 cx_set(MO_GP0_IO, 0x8000);
938
939 switch (voltage) {
940 case SEC_VOLTAGE_OFF:
941 break;
942 case SEC_VOLTAGE_13:
943 data = ISL6421_EN1 | ISL6421_LLC1;
944 cx_clear(MO_GP0_IO, 0x80);
945 break;
946 case SEC_VOLTAGE_18:
947 data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
948 cx_clear(MO_GP0_IO, 0x80);
949 break;
950 default:
951 return -EINVAL;
952 }
953
954 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
955 }
956
957 static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
958 u32 srate, u32 ratio)
959 {
960 u8 aclk = 0;
961 u8 bclk = 0;
962
963 if (srate < 1500000) {
964 aclk = 0xb7;
965 bclk = 0x47;
966 } else if (srate < 3000000) {
967 aclk = 0xb7;
968 bclk = 0x4b;
969 } else if (srate < 7000000) {
970 aclk = 0xb7;
971 bclk = 0x4f;
972 } else if (srate < 14000000) {
973 aclk = 0xb7;
974 bclk = 0x53;
975 } else if (srate < 30000000) {
976 aclk = 0xb6;
977 bclk = 0x53;
978 } else if (srate < 45000000) {
979 aclk = 0xb4;
980 bclk = 0x51;
981 }
982
983 stv0299_writereg(fe, 0x13, aclk);
984 stv0299_writereg(fe, 0x14, bclk);
985 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
986 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
987 stv0299_writereg(fe, 0x21, ratio & 0xf0);
988
989 return 0;
990 }
991
992
993 static const struct stv0299_config samsung_stv0299_config = {
994 .demod_address = 0x68,
995 .inittab = samsung_smt_7020_inittab,
996 .mclk = 88000000UL,
997 .invert = 0,
998 .skip_reinit = 0,
999 .lock_output = STV0299_LOCKOUTPUT_LK,
1000 .volt13_op0_op1 = STV0299_VOLT13_OP1,
1001 .min_delay_ms = 100,
1002 .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
1003 };
1004
1005 static int dvb_register(struct cx8802_dev *dev)
1006 {
1007 struct cx88_core *core = dev->core;
1008 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
1009 int mfe_shared = 0; /* bus not shared by default */
1010 int res = -EINVAL;
1011
1012 if (0 != core->i2c_rc) {
1013 printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
1014 goto frontend_detach;
1015 }
1016
1017 /* Get the first frontend */
1018 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
1019 if (!fe0)
1020 goto frontend_detach;
1021
1022 /* multi-frontend gate control is undefined or defaults to fe0 */
1023 dev->frontends.gate = 0;
1024
1025 /* Sets the gate control callback to be used by i2c command calls */
1026 core->gate_ctrl = cx88_dvb_gate_ctrl;
1027
1028 /* init frontend(s) */
1029 switch (core->boardnr) {
1030 case CX88_BOARD_HAUPPAUGE_DVB_T1:
1031 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1032 &connexant_refboard_config,
1033 &core->i2c_adap);
1034 if (fe0->dvb.frontend != NULL) {
1035 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1036 0x61, &core->i2c_adap,
1037 DVB_PLL_THOMSON_DTT759X))
1038 goto frontend_detach;
1039 }
1040 break;
1041 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
1042 case CX88_BOARD_CONEXANT_DVB_T1:
1043 case CX88_BOARD_KWORLD_DVB_T_CX22702:
1044 case CX88_BOARD_WINFAST_DTV1000:
1045 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1046 &connexant_refboard_config,
1047 &core->i2c_adap);
1048 if (fe0->dvb.frontend != NULL) {
1049 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1050 0x60, &core->i2c_adap,
1051 DVB_PLL_THOMSON_DTT7579))
1052 goto frontend_detach;
1053 }
1054 break;
1055 case CX88_BOARD_WINFAST_DTV2000H:
1056 case CX88_BOARD_HAUPPAUGE_HVR1100:
1057 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
1058 case CX88_BOARD_HAUPPAUGE_HVR1300:
1059 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1060 &hauppauge_hvr_config,
1061 &core->i2c_adap);
1062 if (fe0->dvb.frontend != NULL) {
1063 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1064 &core->i2c_adap, 0x61,
1065 TUNER_PHILIPS_FMD1216ME_MK3))
1066 goto frontend_detach;
1067 }
1068 break;
1069 case CX88_BOARD_WINFAST_DTV2000H_J:
1070 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1071 &hauppauge_hvr_config,
1072 &core->i2c_adap);
1073 if (fe0->dvb.frontend != NULL) {
1074 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1075 &core->i2c_adap, 0x61,
1076 TUNER_PHILIPS_FMD1216MEX_MK3))
1077 goto frontend_detach;
1078 }
1079 break;
1080 case CX88_BOARD_HAUPPAUGE_HVR3000:
1081 /* MFE frontend 1 */
1082 mfe_shared = 1;
1083 dev->frontends.gate = 2;
1084 /* DVB-S init */
1085 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1086 &hauppauge_novas_config,
1087 &dev->core->i2c_adap);
1088 if (fe0->dvb.frontend) {
1089 if (!dvb_attach(isl6421_attach,
1090 fe0->dvb.frontend,
1091 &dev->core->i2c_adap,
1092 0x08, ISL6421_DCL, 0x00, false))
1093 goto frontend_detach;
1094 }
1095 /* MFE frontend 2 */
1096 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1097 if (!fe1)
1098 goto frontend_detach;
1099 /* DVB-T init */
1100 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1101 &hauppauge_hvr_config,
1102 &dev->core->i2c_adap);
1103 if (fe1->dvb.frontend) {
1104 fe1->dvb.frontend->id = 1;
1105 if (!dvb_attach(simple_tuner_attach,
1106 fe1->dvb.frontend,
1107 &dev->core->i2c_adap,
1108 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1109 goto frontend_detach;
1110 }
1111 break;
1112 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
1113 fe0->dvb.frontend = dvb_attach(mt352_attach,
1114 &dvico_fusionhdtv,
1115 &core->i2c_adap);
1116 if (fe0->dvb.frontend != NULL) {
1117 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1118 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1119 goto frontend_detach;
1120 break;
1121 }
1122 /* ZL10353 replaces MT352 on later cards */
1123 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1124 &dvico_fusionhdtv_plus_v1_1,
1125 &core->i2c_adap);
1126 if (fe0->dvb.frontend != NULL) {
1127 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1128 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1129 goto frontend_detach;
1130 }
1131 break;
1132 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
1133 /* The tin box says DEE1601, but it seems to be DTT7579
1134 * compatible, with a slightly different MT352 AGC gain. */
1135 fe0->dvb.frontend = dvb_attach(mt352_attach,
1136 &dvico_fusionhdtv_dual,
1137 &core->i2c_adap);
1138 if (fe0->dvb.frontend != NULL) {
1139 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1140 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1141 goto frontend_detach;
1142 break;
1143 }
1144 /* ZL10353 replaces MT352 on later cards */
1145 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1146 &dvico_fusionhdtv_plus_v1_1,
1147 &core->i2c_adap);
1148 if (fe0->dvb.frontend != NULL) {
1149 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1150 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1151 goto frontend_detach;
1152 }
1153 break;
1154 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
1155 fe0->dvb.frontend = dvb_attach(mt352_attach,
1156 &dvico_fusionhdtv,
1157 &core->i2c_adap);
1158 if (fe0->dvb.frontend != NULL) {
1159 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1160 0x61, NULL, DVB_PLL_LG_Z201))
1161 goto frontend_detach;
1162 }
1163 break;
1164 case CX88_BOARD_KWORLD_DVB_T:
1165 case CX88_BOARD_DNTV_LIVE_DVB_T:
1166 case CX88_BOARD_ADSTECH_DVB_T_PCI:
1167 fe0->dvb.frontend = dvb_attach(mt352_attach,
1168 &dntv_live_dvbt_config,
1169 &core->i2c_adap);
1170 if (fe0->dvb.frontend != NULL) {
1171 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1172 0x61, NULL, DVB_PLL_UNKNOWN_1))
1173 goto frontend_detach;
1174 }
1175 break;
1176 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
1177 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
1178 /* MT352 is on a secondary I2C bus made from some GPIO lines */
1179 fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
1180 &dev->vp3054->adap);
1181 if (fe0->dvb.frontend != NULL) {
1182 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1183 &core->i2c_adap, 0x61,
1184 TUNER_PHILIPS_FMD1216ME_MK3))
1185 goto frontend_detach;
1186 }
1187 #else
1188 printk(KERN_ERR "%s/2: built without vp3054 support\n",
1189 core->name);
1190 #endif
1191 break;
1192 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
1193 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1194 &dvico_fusionhdtv_hybrid,
1195 &core->i2c_adap);
1196 if (fe0->dvb.frontend != NULL) {
1197 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1198 &core->i2c_adap, 0x61,
1199 TUNER_THOMSON_FE6600))
1200 goto frontend_detach;
1201 }
1202 break;
1203 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
1204 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1205 &dvico_fusionhdtv_xc3028,
1206 &core->i2c_adap);
1207 if (fe0->dvb.frontend == NULL)
1208 fe0->dvb.frontend = dvb_attach(mt352_attach,
1209 &dvico_fusionhdtv_mt352_xc3028,
1210 &core->i2c_adap);
1211 /*
1212 * On this board, the demod provides the I2C bus pullup.
1213 * We must not permit gate_ctrl to be performed, or
1214 * the xc3028 cannot communicate on the bus.
1215 */
1216 if (fe0->dvb.frontend)
1217 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1218 if (attach_xc3028(0x61, dev) < 0)
1219 goto frontend_detach;
1220 break;
1221 case CX88_BOARD_PCHDTV_HD3000:
1222 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
1223 &core->i2c_adap);
1224 if (fe0->dvb.frontend != NULL) {
1225 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1226 &core->i2c_adap, 0x61,
1227 TUNER_THOMSON_DTT761X))
1228 goto frontend_detach;
1229 }
1230 break;
1231 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
1232 dev->ts_gen_cntrl = 0x08;
1233
1234 /* Do a hardware reset of chip before using it. */
1235 cx_clear(MO_GP0_IO, 1);
1236 mdelay(100);
1237 cx_set(MO_GP0_IO, 1);
1238 mdelay(200);
1239
1240 /* Select RF connector callback */
1241 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
1242 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1243 &fusionhdtv_3_gold,
1244 &core->i2c_adap);
1245 if (fe0->dvb.frontend != NULL) {
1246 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1247 &core->i2c_adap, 0x61,
1248 TUNER_MICROTUNE_4042FI5))
1249 goto frontend_detach;
1250 }
1251 break;
1252 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
1253 dev->ts_gen_cntrl = 0x08;
1254
1255 /* Do a hardware reset of chip before using it. */
1256 cx_clear(MO_GP0_IO, 1);
1257 mdelay(100);
1258 cx_set(MO_GP0_IO, 9);
1259 mdelay(200);
1260 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1261 &fusionhdtv_3_gold,
1262 &core->i2c_adap);
1263 if (fe0->dvb.frontend != NULL) {
1264 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1265 &core->i2c_adap, 0x61,
1266 TUNER_THOMSON_DTT761X))
1267 goto frontend_detach;
1268 }
1269 break;
1270 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1271 dev->ts_gen_cntrl = 0x08;
1272
1273 /* Do a hardware reset of chip before using it. */
1274 cx_clear(MO_GP0_IO, 1);
1275 mdelay(100);
1276 cx_set(MO_GP0_IO, 1);
1277 mdelay(200);
1278 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1279 &fusionhdtv_5_gold,
1280 &core->i2c_adap);
1281 if (fe0->dvb.frontend != NULL) {
1282 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1283 &core->i2c_adap, 0x61,
1284 TUNER_LG_TDVS_H06XF))
1285 goto frontend_detach;
1286 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1287 &core->i2c_adap, 0x43))
1288 goto frontend_detach;
1289 }
1290 break;
1291 case CX88_BOARD_PCHDTV_HD5500:
1292 dev->ts_gen_cntrl = 0x08;
1293
1294 /* Do a hardware reset of chip before using it. */
1295 cx_clear(MO_GP0_IO, 1);
1296 mdelay(100);
1297 cx_set(MO_GP0_IO, 1);
1298 mdelay(200);
1299 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1300 &pchdtv_hd5500,
1301 &core->i2c_adap);
1302 if (fe0->dvb.frontend != NULL) {
1303 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1304 &core->i2c_adap, 0x61,
1305 TUNER_LG_TDVS_H06XF))
1306 goto frontend_detach;
1307 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1308 &core->i2c_adap, 0x43))
1309 goto frontend_detach;
1310 }
1311 break;
1312 case CX88_BOARD_ATI_HDTVWONDER:
1313 fe0->dvb.frontend = dvb_attach(nxt200x_attach,
1314 &ati_hdtvwonder,
1315 &core->i2c_adap);
1316 if (fe0->dvb.frontend != NULL) {
1317 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1318 &core->i2c_adap, 0x61,
1319 TUNER_PHILIPS_TUV1236D))
1320 goto frontend_detach;
1321 }
1322 break;
1323 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
1324 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
1325 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1326 &hauppauge_novas_config,
1327 &core->i2c_adap);
1328 if (fe0->dvb.frontend) {
1329 bool override_tone;
1330
1331 if (core->model == 92001)
1332 override_tone = true;
1333 else
1334 override_tone = false;
1335
1336 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
1337 &core->i2c_adap, 0x08, ISL6421_DCL, 0x00,
1338 override_tone))
1339 goto frontend_detach;
1340 }
1341 break;
1342 case CX88_BOARD_KWORLD_DVBS_100:
1343 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1344 &kworld_dvbs_100_config,
1345 &core->i2c_adap);
1346 if (fe0->dvb.frontend) {
1347 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1348 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
1349 }
1350 break;
1351 case CX88_BOARD_GENIATECH_DVBS:
1352 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1353 &geniatech_dvbs_config,
1354 &core->i2c_adap);
1355 if (fe0->dvb.frontend) {
1356 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1357 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
1358 }
1359 break;
1360 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
1361 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1362 &pinnacle_pctv_hd_800i_config,
1363 &core->i2c_adap);
1364 if (fe0->dvb.frontend != NULL) {
1365 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1366 &core->i2c_adap,
1367 &pinnacle_pctv_hd_800i_tuner_config))
1368 goto frontend_detach;
1369 }
1370 break;
1371 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1372 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1373 &dvico_hdtv5_pci_nano_config,
1374 &core->i2c_adap);
1375 if (fe0->dvb.frontend != NULL) {
1376 struct dvb_frontend *fe;
1377 struct xc2028_config cfg = {
1378 .i2c_adap = &core->i2c_adap,
1379 .i2c_addr = 0x61,
1380 };
1381 static struct xc2028_ctrl ctl = {
1382 .fname = XC2028_DEFAULT_FIRMWARE,
1383 .max_len = 64,
1384 .scode_table = XC3028_FE_OREN538,
1385 };
1386
1387 fe = dvb_attach(xc2028_attach,
1388 fe0->dvb.frontend, &cfg);
1389 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1390 fe->ops.tuner_ops.set_config(fe, &ctl);
1391 }
1392 break;
1393 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1394 case CX88_BOARD_WINFAST_DTV1800H:
1395 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1396 &cx88_pinnacle_hybrid_pctv,
1397 &core->i2c_adap);
1398 if (fe0->dvb.frontend) {
1399 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1400 if (attach_xc3028(0x61, dev) < 0)
1401 goto frontend_detach;
1402 }
1403 break;
1404 case CX88_BOARD_WINFAST_DTV1800H_XC4000:
1405 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1406 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1407 &cx88_pinnacle_hybrid_pctv,
1408 &core->i2c_adap);
1409 if (fe0->dvb.frontend) {
1410 struct xc4000_config cfg = {
1411 .i2c_address = 0x61,
1412 .default_pm = 0,
1413 .dvb_amplitude = 134,
1414 .set_smoothedcvbs = 1,
1415 .if_khz = 4560
1416 };
1417 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1418 if (attach_xc4000(dev, &cfg) < 0)
1419 goto frontend_detach;
1420 }
1421 break;
1422 case CX88_BOARD_GENIATECH_X8000_MT:
1423 dev->ts_gen_cntrl = 0x00;
1424
1425 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1426 &cx88_geniatech_x8000_mt,
1427 &core->i2c_adap);
1428 if (attach_xc3028(0x61, dev) < 0)
1429 goto frontend_detach;
1430 break;
1431 case CX88_BOARD_KWORLD_ATSC_120:
1432 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1433 &kworld_atsc_120_config,
1434 &core->i2c_adap);
1435 if (attach_xc3028(0x61, dev) < 0)
1436 goto frontend_detach;
1437 break;
1438 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1439 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1440 &dvico_fusionhdtv7_config,
1441 &core->i2c_adap);
1442 if (fe0->dvb.frontend != NULL) {
1443 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1444 &core->i2c_adap,
1445 &dvico_fusionhdtv7_tuner_config))
1446 goto frontend_detach;
1447 }
1448 break;
1449 case CX88_BOARD_HAUPPAUGE_HVR4000:
1450 /* MFE frontend 1 */
1451 mfe_shared = 1;
1452 dev->frontends.gate = 2;
1453 /* DVB-S/S2 Init */
1454 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1455 &hauppauge_hvr4000_config,
1456 &dev->core->i2c_adap);
1457 if (fe0->dvb.frontend) {
1458 if (!dvb_attach(isl6421_attach,
1459 fe0->dvb.frontend,
1460 &dev->core->i2c_adap,
1461 0x08, ISL6421_DCL, 0x00, false))
1462 goto frontend_detach;
1463 }
1464 /* MFE frontend 2 */
1465 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1466 if (!fe1)
1467 goto frontend_detach;
1468 /* DVB-T Init */
1469 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1470 &hauppauge_hvr_config,
1471 &dev->core->i2c_adap);
1472 if (fe1->dvb.frontend) {
1473 fe1->dvb.frontend->id = 1;
1474 if (!dvb_attach(simple_tuner_attach,
1475 fe1->dvb.frontend,
1476 &dev->core->i2c_adap,
1477 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1478 goto frontend_detach;
1479 }
1480 break;
1481 case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1482 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1483 &hauppauge_hvr4000_config,
1484 &dev->core->i2c_adap);
1485 if (fe0->dvb.frontend) {
1486 if (!dvb_attach(isl6421_attach,
1487 fe0->dvb.frontend,
1488 &dev->core->i2c_adap,
1489 0x08, ISL6421_DCL, 0x00, false))
1490 goto frontend_detach;
1491 }
1492 break;
1493 case CX88_BOARD_PROF_6200:
1494 case CX88_BOARD_TBS_8910:
1495 case CX88_BOARD_TEVII_S420:
1496 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1497 &tevii_tuner_sharp_config,
1498 &core->i2c_adap);
1499 if (fe0->dvb.frontend != NULL) {
1500 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1501 &core->i2c_adap, DVB_PLL_OPERA1))
1502 goto frontend_detach;
1503 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1504 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1505
1506 } else {
1507 fe0->dvb.frontend = dvb_attach(stv0288_attach,
1508 &tevii_tuner_earda_config,
1509 &core->i2c_adap);
1510 if (fe0->dvb.frontend != NULL) {
1511 if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
1512 &core->i2c_adap))
1513 goto frontend_detach;
1514 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1515 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1516 }
1517 }
1518 break;
1519 case CX88_BOARD_TEVII_S460:
1520 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1521 &tevii_s460_config,
1522 &core->i2c_adap);
1523 if (fe0->dvb.frontend != NULL)
1524 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1525 break;
1526 case CX88_BOARD_TEVII_S464:
1527 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1528 &tevii_ds3000_config,
1529 &core->i2c_adap);
1530 if (fe0->dvb.frontend != NULL) {
1531 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1532 &tevii_ts2020_config, &core->i2c_adap);
1533 fe0->dvb.frontend->ops.set_voltage =
1534 tevii_dvbs_set_voltage;
1535 }
1536 break;
1537 case CX88_BOARD_OMICOM_SS4_PCI:
1538 case CX88_BOARD_TBS_8920:
1539 case CX88_BOARD_PROF_7300:
1540 case CX88_BOARD_SATTRADE_ST4200:
1541 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1542 &hauppauge_hvr4000_config,
1543 &core->i2c_adap);
1544 if (fe0->dvb.frontend != NULL)
1545 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1546 break;
1547 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1548 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1549 &cx88_terratec_cinergy_ht_pci_mkii_config,
1550 &core->i2c_adap);
1551 if (fe0->dvb.frontend) {
1552 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1553 if (attach_xc3028(0x61, dev) < 0)
1554 goto frontend_detach;
1555 }
1556 break;
1557 case CX88_BOARD_PROF_7301:{
1558 struct dvb_tuner_ops *tuner_ops = NULL;
1559
1560 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1561 &prof_7301_stv0900_config,
1562 &core->i2c_adap, 0);
1563 if (fe0->dvb.frontend != NULL) {
1564 if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
1565 &prof_7301_stb6100_config,
1566 &core->i2c_adap))
1567 goto frontend_detach;
1568
1569 tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
1570 tuner_ops->set_frequency = stb6100_set_freq;
1571 tuner_ops->get_frequency = stb6100_get_freq;
1572 tuner_ops->set_bandwidth = stb6100_set_bandw;
1573 tuner_ops->get_bandwidth = stb6100_get_bandw;
1574
1575 core->prev_set_voltage =
1576 fe0->dvb.frontend->ops.set_voltage;
1577 fe0->dvb.frontend->ops.set_voltage =
1578 tevii_dvbs_set_voltage;
1579 }
1580 break;
1581 }
1582 case CX88_BOARD_SAMSUNG_SMT_7020:
1583 dev->ts_gen_cntrl = 0x08;
1584
1585 cx_set(MO_GP0_IO, 0x0101);
1586
1587 cx_clear(MO_GP0_IO, 0x01);
1588 mdelay(100);
1589 cx_set(MO_GP0_IO, 0x01);
1590 mdelay(200);
1591
1592 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1593 &samsung_stv0299_config,
1594 &dev->core->i2c_adap);
1595 if (fe0->dvb.frontend) {
1596 fe0->dvb.frontend->ops.tuner_ops.set_params =
1597 samsung_smt_7020_tuner_set_params;
1598 fe0->dvb.frontend->tuner_priv =
1599 &dev->core->i2c_adap;
1600 fe0->dvb.frontend->ops.set_voltage =
1601 samsung_smt_7020_set_voltage;
1602 fe0->dvb.frontend->ops.set_tone =
1603 samsung_smt_7020_set_tone;
1604 }
1605
1606 break;
1607 case CX88_BOARD_TWINHAN_VP1027_DVBS:
1608 dev->ts_gen_cntrl = 0x00;
1609 fe0->dvb.frontend = dvb_attach(mb86a16_attach,
1610 &twinhan_vp1027,
1611 &core->i2c_adap);
1612 if (fe0->dvb.frontend) {
1613 core->prev_set_voltage =
1614 fe0->dvb.frontend->ops.set_voltage;
1615 fe0->dvb.frontend->ops.set_voltage =
1616 vp1027_set_voltage;
1617 }
1618 break;
1619
1620 default:
1621 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
1622 core->name);
1623 break;
1624 }
1625
1626 if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
1627 printk(KERN_ERR
1628 "%s/2: frontend initialization failed\n",
1629 core->name);
1630 goto frontend_detach;
1631 }
1632 /* define general-purpose callback pointer */
1633 fe0->dvb.frontend->callback = cx88_tuner_callback;
1634
1635 /* Ensure all frontends negotiate bus access */
1636 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1637 if (fe1)
1638 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1639
1640 /* Put the analog decoder in standby to keep it quiet */
1641 call_all(core, core, s_power, 0);
1642
1643 /* register everything */
1644 res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1645 &dev->pci->dev, NULL, adapter_nr,
1646 mfe_shared);
1647 if (res)
1648 goto frontend_detach;
1649 return res;
1650
1651 frontend_detach:
1652 core->gate_ctrl = NULL;
1653 vb2_dvb_dealloc_frontends(&dev->frontends);
1654 return res;
1655 }
1656
1657 /* ----------------------------------------------------------- */
1658
1659 /* CX8802 MPEG -> mini driver - We have been given the hardware */
1660 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1661 {
1662 struct cx88_core *core = drv->core;
1663 int err = 0;
1664 dprintk( 1, "%s\n", __func__);
1665
1666 switch (core->boardnr) {
1667 case CX88_BOARD_HAUPPAUGE_HVR1300:
1668 /* We arrive here with either the cx23416 or the cx22702
1669 * on the bus. Take the bus from the cx23416 and enable the
1670 * cx22702 demod
1671 */
1672 /* Toggle reset on cx22702 leaving i2c active */
1673 cx_set(MO_GP0_IO, 0x00000080);
1674 udelay(1000);
1675 cx_clear(MO_GP0_IO, 0x00000080);
1676 udelay(50);
1677 cx_set(MO_GP0_IO, 0x00000080);
1678 udelay(1000);
1679 /* enable the cx22702 pins */
1680 cx_clear(MO_GP0_IO, 0x00000004);
1681 udelay(1000);
1682 break;
1683
1684 case CX88_BOARD_HAUPPAUGE_HVR3000:
1685 case CX88_BOARD_HAUPPAUGE_HVR4000:
1686 /* Toggle reset on cx22702 leaving i2c active */
1687 cx_set(MO_GP0_IO, 0x00000080);
1688 udelay(1000);
1689 cx_clear(MO_GP0_IO, 0x00000080);
1690 udelay(50);
1691 cx_set(MO_GP0_IO, 0x00000080);
1692 udelay(1000);
1693 switch (core->dvbdev->frontends.active_fe_id) {
1694 case 1: /* DVB-S/S2 Enabled */
1695 /* tri-state the cx22702 pins */
1696 cx_set(MO_GP0_IO, 0x00000004);
1697 /* Take the cx24116/cx24123 out of reset */
1698 cx_write(MO_SRST_IO, 1);
1699 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
1700 break;
1701 case 2: /* DVB-T Enabled */
1702 /* Put the cx24116/cx24123 into reset */
1703 cx_write(MO_SRST_IO, 0);
1704 /* enable the cx22702 pins */
1705 cx_clear(MO_GP0_IO, 0x00000004);
1706 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
1707 break;
1708 }
1709 udelay(1000);
1710 break;
1711
1712 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1713 /* set RF input to AIR for DVB-T (GPIO 16) */
1714 cx_write(MO_GP2_IO, 0x0101);
1715 break;
1716
1717 default:
1718 err = -ENODEV;
1719 }
1720 return err;
1721 }
1722
1723 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
1724 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1725 {
1726 struct cx88_core *core = drv->core;
1727 int err = 0;
1728 dprintk( 1, "%s\n", __func__);
1729
1730 switch (core->boardnr) {
1731 case CX88_BOARD_HAUPPAUGE_HVR1300:
1732 /* Do Nothing, leave the cx22702 on the bus. */
1733 break;
1734 case CX88_BOARD_HAUPPAUGE_HVR3000:
1735 case CX88_BOARD_HAUPPAUGE_HVR4000:
1736 break;
1737 default:
1738 err = -ENODEV;
1739 }
1740 return err;
1741 }
1742
1743 static int cx8802_dvb_probe(struct cx8802_driver *drv)
1744 {
1745 struct cx88_core *core = drv->core;
1746 struct cx8802_dev *dev = drv->core->dvbdev;
1747 int err;
1748 struct vb2_dvb_frontend *fe;
1749 int i;
1750
1751 dprintk( 1, "%s\n", __func__);
1752 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1753 core->boardnr,
1754 core->name,
1755 core->pci_bus,
1756 core->pci_slot);
1757
1758 err = -ENODEV;
1759 if (!(core->board.mpeg & CX88_MPEG_DVB))
1760 goto fail_core;
1761
1762 /* If vp3054 isn't enabled, a stub will just return 0 */
1763 err = vp3054_i2c_probe(dev);
1764 if (0 != err)
1765 goto fail_core;
1766
1767 /* dvb stuff */
1768 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
1769 dev->ts_gen_cntrl = 0x0c;
1770
1771 err = cx8802_alloc_frontends(dev);
1772 if (err)
1773 goto fail_core;
1774
1775 err = -ENODEV;
1776 for (i = 1; i <= core->board.num_frontends; i++) {
1777 struct vb2_queue *q;
1778
1779 fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
1780 if (fe == NULL) {
1781 printk(KERN_ERR "%s() failed to get frontend(%d)\n",
1782 __func__, i);
1783 goto fail_probe;
1784 }
1785 q = &fe->dvb.dvbq;
1786 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1787 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1788 q->gfp_flags = GFP_DMA32;
1789 q->min_buffers_needed = 2;
1790 q->drv_priv = dev;
1791 q->buf_struct_size = sizeof(struct cx88_buffer);
1792 q->ops = &dvb_qops;
1793 q->mem_ops = &vb2_dma_sg_memops;
1794 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1795 q->lock = &core->lock;
1796
1797 err = vb2_queue_init(q);
1798 if (err < 0)
1799 goto fail_probe;
1800
1801 /* init struct vb2_dvb */
1802 fe->dvb.name = dev->core->name;
1803 }
1804
1805 err = dvb_register(dev);
1806 if (err)
1807 /* frontends/adapter de-allocated in dvb_register */
1808 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
1809 core->name, err);
1810 return err;
1811 fail_probe:
1812 vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
1813 fail_core:
1814 return err;
1815 }
1816
1817 static int cx8802_dvb_remove(struct cx8802_driver *drv)
1818 {
1819 struct cx88_core *core = drv->core;
1820 struct cx8802_dev *dev = drv->core->dvbdev;
1821
1822 dprintk( 1, "%s\n", __func__);
1823
1824 vb2_dvb_unregister_bus(&dev->frontends);
1825
1826 vp3054_i2c_remove(dev);
1827
1828 core->gate_ctrl = NULL;
1829
1830 return 0;
1831 }
1832
1833 static struct cx8802_driver cx8802_dvb_driver = {
1834 .type_id = CX88_MPEG_DVB,
1835 .hw_access = CX8802_DRVCTL_SHARED,
1836 .probe = cx8802_dvb_probe,
1837 .remove = cx8802_dvb_remove,
1838 .advise_acquire = cx8802_dvb_advise_acquire,
1839 .advise_release = cx8802_dvb_advise_release,
1840 };
1841
1842 static int __init dvb_init(void)
1843 {
1844 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n",
1845 CX88_VERSION);
1846 return cx8802_register_driver(&cx8802_dvb_driver);
1847 }
1848
1849 static void __exit dvb_fini(void)
1850 {
1851 cx8802_unregister_driver(&cx8802_dvb_driver);
1852 }
1853
1854 module_init(dvb_init);
1855 module_exit(dvb_fini);
Linux kernel - Deliverables
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