projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge remote-tracking branch 'mmc-uh/next'
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
30
31 /* Local includes */
32 #include "i40e.h"
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
35
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
39
40 #define DRV_KERN "-k"
41
42 #define DRV_VERSION_MAJOR 1
43 #define DRV_VERSION_MINOR 6
44 #define DRV_VERSION_BUILD 12
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
50
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
61 u16 rss_table_size, u16 rss_size);
62 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
63 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
64
65 /* i40e_pci_tbl - PCI Device ID Table
66 *
67 * Last entry must be all 0s
68 *
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
71 */
72 static const struct pci_device_id i40e_pci_tbl[] = {
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
91 /* required last entry */
92 {0, }
93 };
94 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
95
96 #define I40E_MAX_VF_COUNT 128
97 static int debug = -1;
98 module_param(debug, int, 0);
99 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
100
101 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
102 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
103 MODULE_LICENSE("GPL");
104 MODULE_VERSION(DRV_VERSION);
105
106 static struct workqueue_struct *i40e_wq;
107
108 /**
109 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
110 * @hw: pointer to the HW structure
111 * @mem: ptr to mem struct to fill out
112 * @size: size of memory requested
113 * @alignment: what to align the allocation to
114 **/
115 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
116 u64 size, u32 alignment)
117 {
118 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
119
120 mem->size = ALIGN(size, alignment);
121 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
122 &mem->pa, GFP_KERNEL);
123 if (!mem->va)
124 return -ENOMEM;
125
126 return 0;
127 }
128
129 /**
130 * i40e_free_dma_mem_d - OS specific memory free for shared code
131 * @hw: pointer to the HW structure
132 * @mem: ptr to mem struct to free
133 **/
134 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
135 {
136 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
137
138 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
139 mem->va = NULL;
140 mem->pa = 0;
141 mem->size = 0;
142
143 return 0;
144 }
145
146 /**
147 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
148 * @hw: pointer to the HW structure
149 * @mem: ptr to mem struct to fill out
150 * @size: size of memory requested
151 **/
152 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
153 u32 size)
154 {
155 mem->size = size;
156 mem->va = kzalloc(size, GFP_KERNEL);
157
158 if (!mem->va)
159 return -ENOMEM;
160
161 return 0;
162 }
163
164 /**
165 * i40e_free_virt_mem_d - OS specific memory free for shared code
166 * @hw: pointer to the HW structure
167 * @mem: ptr to mem struct to free
168 **/
169 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
170 {
171 /* it's ok to kfree a NULL pointer */
172 kfree(mem->va);
173 mem->va = NULL;
174 mem->size = 0;
175
176 return 0;
177 }
178
179 /**
180 * i40e_get_lump - find a lump of free generic resource
181 * @pf: board private structure
182 * @pile: the pile of resource to search
183 * @needed: the number of items needed
184 * @id: an owner id to stick on the items assigned
185 *
186 * Returns the base item index of the lump, or negative for error
187 *
188 * The search_hint trick and lack of advanced fit-finding only work
189 * because we're highly likely to have all the same size lump requests.
190 * Linear search time and any fragmentation should be minimal.
191 **/
192 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
193 u16 needed, u16 id)
194 {
195 int ret = -ENOMEM;
196 int i, j;
197
198 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
199 dev_info(&pf->pdev->dev,
200 "param err: pile=%p needed=%d id=0x%04x\n",
201 pile, needed, id);
202 return -EINVAL;
203 }
204
205 /* start the linear search with an imperfect hint */
206 i = pile->search_hint;
207 while (i < pile->num_entries) {
208 /* skip already allocated entries */
209 if (pile->list[i] & I40E_PILE_VALID_BIT) {
210 i++;
211 continue;
212 }
213
214 /* do we have enough in this lump? */
215 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
216 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
217 break;
218 }
219
220 if (j == needed) {
221 /* there was enough, so assign it to the requestor */
222 for (j = 0; j < needed; j++)
223 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
224 ret = i;
225 pile->search_hint = i + j;
226 break;
227 }
228
229 /* not enough, so skip over it and continue looking */
230 i += j;
231 }
232
233 return ret;
234 }
235
236 /**
237 * i40e_put_lump - return a lump of generic resource
238 * @pile: the pile of resource to search
239 * @index: the base item index
240 * @id: the owner id of the items assigned
241 *
242 * Returns the count of items in the lump
243 **/
244 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
245 {
246 int valid_id = (id | I40E_PILE_VALID_BIT);
247 int count = 0;
248 int i;
249
250 if (!pile || index >= pile->num_entries)
251 return -EINVAL;
252
253 for (i = index;
254 i < pile->num_entries && pile->list[i] == valid_id;
255 i++) {
256 pile->list[i] = 0;
257 count++;
258 }
259
260 if (count && index < pile->search_hint)
261 pile->search_hint = index;
262
263 return count;
264 }
265
266 /**
267 * i40e_find_vsi_from_id - searches for the vsi with the given id
268 * @pf - the pf structure to search for the vsi
269 * @id - id of the vsi it is searching for
270 **/
271 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
272 {
273 int i;
274
275 for (i = 0; i < pf->num_alloc_vsi; i++)
276 if (pf->vsi[i] && (pf->vsi[i]->id == id))
277 return pf->vsi[i];
278
279 return NULL;
280 }
281
282 /**
283 * i40e_service_event_schedule - Schedule the service task to wake up
284 * @pf: board private structure
285 *
286 * If not already scheduled, this puts the task into the work queue
287 **/
288 void i40e_service_event_schedule(struct i40e_pf *pf)
289 {
290 if (!test_bit(__I40E_DOWN, &pf->state) &&
291 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
292 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
293 queue_work(i40e_wq, &pf->service_task);
294 }
295
296 /**
297 * i40e_tx_timeout - Respond to a Tx Hang
298 * @netdev: network interface device structure
299 *
300 * If any port has noticed a Tx timeout, it is likely that the whole
301 * device is munged, not just the one netdev port, so go for the full
302 * reset.
303 **/
304 #ifdef I40E_FCOE
305 void i40e_tx_timeout(struct net_device *netdev)
306 #else
307 static void i40e_tx_timeout(struct net_device *netdev)
308 #endif
309 {
310 struct i40e_netdev_priv *np = netdev_priv(netdev);
311 struct i40e_vsi *vsi = np->vsi;
312 struct i40e_pf *pf = vsi->back;
313 struct i40e_ring *tx_ring = NULL;
314 unsigned int i, hung_queue = 0;
315 u32 head, val;
316
317 pf->tx_timeout_count++;
318
319 /* find the stopped queue the same way the stack does */
320 for (i = 0; i < netdev->num_tx_queues; i++) {
321 struct netdev_queue *q;
322 unsigned long trans_start;
323
324 q = netdev_get_tx_queue(netdev, i);
325 trans_start = q->trans_start;
326 if (netif_xmit_stopped(q) &&
327 time_after(jiffies,
328 (trans_start + netdev->watchdog_timeo))) {
329 hung_queue = i;
330 break;
331 }
332 }
333
334 if (i == netdev->num_tx_queues) {
335 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
336 } else {
337 /* now that we have an index, find the tx_ring struct */
338 for (i = 0; i < vsi->num_queue_pairs; i++) {
339 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
340 if (hung_queue ==
341 vsi->tx_rings[i]->queue_index) {
342 tx_ring = vsi->tx_rings[i];
343 break;
344 }
345 }
346 }
347 }
348
349 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
350 pf->tx_timeout_recovery_level = 1; /* reset after some time */
351 else if (time_before(jiffies,
352 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
353 return; /* don't do any new action before the next timeout */
354
355 if (tx_ring) {
356 head = i40e_get_head(tx_ring);
357 /* Read interrupt register */
358 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
359 val = rd32(&pf->hw,
360 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
361 tx_ring->vsi->base_vector - 1));
362 else
363 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
364
365 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
366 vsi->seid, hung_queue, tx_ring->next_to_clean,
367 head, tx_ring->next_to_use,
368 readl(tx_ring->tail), val);
369 }
370
371 pf->tx_timeout_last_recovery = jiffies;
372 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
373 pf->tx_timeout_recovery_level, hung_queue);
374
375 switch (pf->tx_timeout_recovery_level) {
376 case 1:
377 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
378 break;
379 case 2:
380 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
381 break;
382 case 3:
383 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
384 break;
385 default:
386 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
387 break;
388 }
389
390 i40e_service_event_schedule(pf);
391 pf->tx_timeout_recovery_level++;
392 }
393
394 /**
395 * i40e_get_vsi_stats_struct - Get System Network Statistics
396 * @vsi: the VSI we care about
397 *
398 * Returns the address of the device statistics structure.
399 * The statistics are actually updated from the service task.
400 **/
401 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
402 {
403 return &vsi->net_stats;
404 }
405
406 /**
407 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
408 * @netdev: network interface device structure
409 *
410 * Returns the address of the device statistics structure.
411 * The statistics are actually updated from the service task.
412 **/
413 #ifdef I40E_FCOE
414 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
415 struct net_device *netdev,
416 struct rtnl_link_stats64 *stats)
417 #else
418 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
419 struct net_device *netdev,
420 struct rtnl_link_stats64 *stats)
421 #endif
422 {
423 struct i40e_netdev_priv *np = netdev_priv(netdev);
424 struct i40e_ring *tx_ring, *rx_ring;
425 struct i40e_vsi *vsi = np->vsi;
426 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
427 int i;
428
429 if (test_bit(__I40E_DOWN, &vsi->state))
430 return stats;
431
432 if (!vsi->tx_rings)
433 return stats;
434
435 rcu_read_lock();
436 for (i = 0; i < vsi->num_queue_pairs; i++) {
437 u64 bytes, packets;
438 unsigned int start;
439
440 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
441 if (!tx_ring)
442 continue;
443
444 do {
445 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
446 packets = tx_ring->stats.packets;
447 bytes = tx_ring->stats.bytes;
448 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
449
450 stats->tx_packets += packets;
451 stats->tx_bytes += bytes;
452 rx_ring = &tx_ring[1];
453
454 do {
455 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
456 packets = rx_ring->stats.packets;
457 bytes = rx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
459
460 stats->rx_packets += packets;
461 stats->rx_bytes += bytes;
462 }
463 rcu_read_unlock();
464
465 /* following stats updated by i40e_watchdog_subtask() */
466 stats->multicast = vsi_stats->multicast;
467 stats->tx_errors = vsi_stats->tx_errors;
468 stats->tx_dropped = vsi_stats->tx_dropped;
469 stats->rx_errors = vsi_stats->rx_errors;
470 stats->rx_dropped = vsi_stats->rx_dropped;
471 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
472 stats->rx_length_errors = vsi_stats->rx_length_errors;
473
474 return stats;
475 }
476
477 /**
478 * i40e_vsi_reset_stats - Resets all stats of the given vsi
479 * @vsi: the VSI to have its stats reset
480 **/
481 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
482 {
483 struct rtnl_link_stats64 *ns;
484 int i;
485
486 if (!vsi)
487 return;
488
489 ns = i40e_get_vsi_stats_struct(vsi);
490 memset(ns, 0, sizeof(*ns));
491 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
492 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
493 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
494 if (vsi->rx_rings && vsi->rx_rings[0]) {
495 for (i = 0; i < vsi->num_queue_pairs; i++) {
496 memset(&vsi->rx_rings[i]->stats, 0,
497 sizeof(vsi->rx_rings[i]->stats));
498 memset(&vsi->rx_rings[i]->rx_stats, 0,
499 sizeof(vsi->rx_rings[i]->rx_stats));
500 memset(&vsi->tx_rings[i]->stats, 0,
501 sizeof(vsi->tx_rings[i]->stats));
502 memset(&vsi->tx_rings[i]->tx_stats, 0,
503 sizeof(vsi->tx_rings[i]->tx_stats));
504 }
505 }
506 vsi->stat_offsets_loaded = false;
507 }
508
509 /**
510 * i40e_pf_reset_stats - Reset all of the stats for the given PF
511 * @pf: the PF to be reset
512 **/
513 void i40e_pf_reset_stats(struct i40e_pf *pf)
514 {
515 int i;
516
517 memset(&pf->stats, 0, sizeof(pf->stats));
518 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
519 pf->stat_offsets_loaded = false;
520
521 for (i = 0; i < I40E_MAX_VEB; i++) {
522 if (pf->veb[i]) {
523 memset(&pf->veb[i]->stats, 0,
524 sizeof(pf->veb[i]->stats));
525 memset(&pf->veb[i]->stats_offsets, 0,
526 sizeof(pf->veb[i]->stats_offsets));
527 pf->veb[i]->stat_offsets_loaded = false;
528 }
529 }
530 pf->hw_csum_rx_error = 0;
531 }
532
533 /**
534 * i40e_stat_update48 - read and update a 48 bit stat from the chip
535 * @hw: ptr to the hardware info
536 * @hireg: the high 32 bit reg to read
537 * @loreg: the low 32 bit reg to read
538 * @offset_loaded: has the initial offset been loaded yet
539 * @offset: ptr to current offset value
540 * @stat: ptr to the stat
541 *
542 * Since the device stats are not reset at PFReset, they likely will not
543 * be zeroed when the driver starts. We'll save the first values read
544 * and use them as offsets to be subtracted from the raw values in order
545 * to report stats that count from zero. In the process, we also manage
546 * the potential roll-over.
547 **/
548 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
549 bool offset_loaded, u64 *offset, u64 *stat)
550 {
551 u64 new_data;
552
553 if (hw->device_id == I40E_DEV_ID_QEMU) {
554 new_data = rd32(hw, loreg);
555 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
556 } else {
557 new_data = rd64(hw, loreg);
558 }
559 if (!offset_loaded)
560 *offset = new_data;
561 if (likely(new_data >= *offset))
562 *stat = new_data - *offset;
563 else
564 *stat = (new_data + BIT_ULL(48)) - *offset;
565 *stat &= 0xFFFFFFFFFFFFULL;
566 }
567
568 /**
569 * i40e_stat_update32 - read and update a 32 bit stat from the chip
570 * @hw: ptr to the hardware info
571 * @reg: the hw reg to read
572 * @offset_loaded: has the initial offset been loaded yet
573 * @offset: ptr to current offset value
574 * @stat: ptr to the stat
575 **/
576 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
577 bool offset_loaded, u64 *offset, u64 *stat)
578 {
579 u32 new_data;
580
581 new_data = rd32(hw, reg);
582 if (!offset_loaded)
583 *offset = new_data;
584 if (likely(new_data >= *offset))
585 *stat = (u32)(new_data - *offset);
586 else
587 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
588 }
589
590 /**
591 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
592 * @vsi: the VSI to be updated
593 **/
594 void i40e_update_eth_stats(struct i40e_vsi *vsi)
595 {
596 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
597 struct i40e_pf *pf = vsi->back;
598 struct i40e_hw *hw = &pf->hw;
599 struct i40e_eth_stats *oes;
600 struct i40e_eth_stats *es; /* device's eth stats */
601
602 es = &vsi->eth_stats;
603 oes = &vsi->eth_stats_offsets;
604
605 /* Gather up the stats that the hw collects */
606 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
607 vsi->stat_offsets_loaded,
608 &oes->tx_errors, &es->tx_errors);
609 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
610 vsi->stat_offsets_loaded,
611 &oes->rx_discards, &es->rx_discards);
612 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
613 vsi->stat_offsets_loaded,
614 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618
619 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
620 I40E_GLV_GORCL(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_bytes, &es->rx_bytes);
623 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
624 I40E_GLV_UPRCL(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->rx_unicast, &es->rx_unicast);
627 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
628 I40E_GLV_MPRCL(stat_idx),
629 vsi->stat_offsets_loaded,
630 &oes->rx_multicast, &es->rx_multicast);
631 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
632 I40E_GLV_BPRCL(stat_idx),
633 vsi->stat_offsets_loaded,
634 &oes->rx_broadcast, &es->rx_broadcast);
635
636 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
637 I40E_GLV_GOTCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->tx_bytes, &es->tx_bytes);
640 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
641 I40E_GLV_UPTCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->tx_unicast, &es->tx_unicast);
644 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
645 I40E_GLV_MPTCL(stat_idx),
646 vsi->stat_offsets_loaded,
647 &oes->tx_multicast, &es->tx_multicast);
648 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
649 I40E_GLV_BPTCL(stat_idx),
650 vsi->stat_offsets_loaded,
651 &oes->tx_broadcast, &es->tx_broadcast);
652 vsi->stat_offsets_loaded = true;
653 }
654
655 /**
656 * i40e_update_veb_stats - Update Switch component statistics
657 * @veb: the VEB being updated
658 **/
659 static void i40e_update_veb_stats(struct i40e_veb *veb)
660 {
661 struct i40e_pf *pf = veb->pf;
662 struct i40e_hw *hw = &pf->hw;
663 struct i40e_eth_stats *oes;
664 struct i40e_eth_stats *es; /* device's eth stats */
665 struct i40e_veb_tc_stats *veb_oes;
666 struct i40e_veb_tc_stats *veb_es;
667 int i, idx = 0;
668
669 idx = veb->stats_idx;
670 es = &veb->stats;
671 oes = &veb->stats_offsets;
672 veb_es = &veb->tc_stats;
673 veb_oes = &veb->tc_stats_offsets;
674
675 /* Gather up the stats that the hw collects */
676 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
677 veb->stat_offsets_loaded,
678 &oes->tx_discards, &es->tx_discards);
679 if (hw->revision_id > 0)
680 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
681 veb->stat_offsets_loaded,
682 &oes->rx_unknown_protocol,
683 &es->rx_unknown_protocol);
684 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
685 veb->stat_offsets_loaded,
686 &oes->rx_bytes, &es->rx_bytes);
687 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
688 veb->stat_offsets_loaded,
689 &oes->rx_unicast, &es->rx_unicast);
690 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
691 veb->stat_offsets_loaded,
692 &oes->rx_multicast, &es->rx_multicast);
693 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_broadcast, &es->rx_broadcast);
696
697 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
698 veb->stat_offsets_loaded,
699 &oes->tx_bytes, &es->tx_bytes);
700 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
701 veb->stat_offsets_loaded,
702 &oes->tx_unicast, &es->tx_unicast);
703 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
704 veb->stat_offsets_loaded,
705 &oes->tx_multicast, &es->tx_multicast);
706 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_broadcast, &es->tx_broadcast);
709 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
710 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
711 I40E_GLVEBTC_RPCL(i, idx),
712 veb->stat_offsets_loaded,
713 &veb_oes->tc_rx_packets[i],
714 &veb_es->tc_rx_packets[i]);
715 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
716 I40E_GLVEBTC_RBCL(i, idx),
717 veb->stat_offsets_loaded,
718 &veb_oes->tc_rx_bytes[i],
719 &veb_es->tc_rx_bytes[i]);
720 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
721 I40E_GLVEBTC_TPCL(i, idx),
722 veb->stat_offsets_loaded,
723 &veb_oes->tc_tx_packets[i],
724 &veb_es->tc_tx_packets[i]);
725 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
726 I40E_GLVEBTC_TBCL(i, idx),
727 veb->stat_offsets_loaded,
728 &veb_oes->tc_tx_bytes[i],
729 &veb_es->tc_tx_bytes[i]);
730 }
731 veb->stat_offsets_loaded = true;
732 }
733
734 #ifdef I40E_FCOE
735 /**
736 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
737 * @vsi: the VSI that is capable of doing FCoE
738 **/
739 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
740 {
741 struct i40e_pf *pf = vsi->back;
742 struct i40e_hw *hw = &pf->hw;
743 struct i40e_fcoe_stats *ofs;
744 struct i40e_fcoe_stats *fs; /* device's eth stats */
745 int idx;
746
747 if (vsi->type != I40E_VSI_FCOE)
748 return;
749
750 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
751 fs = &vsi->fcoe_stats;
752 ofs = &vsi->fcoe_stats_offsets;
753
754 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
755 vsi->fcoe_stat_offsets_loaded,
756 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
757 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
758 vsi->fcoe_stat_offsets_loaded,
759 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
760 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
761 vsi->fcoe_stat_offsets_loaded,
762 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
763 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
772 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->fcoe_last_error, &fs->fcoe_last_error);
775 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
778
779 vsi->fcoe_stat_offsets_loaded = true;
780 }
781
782 #endif
783 /**
784 * i40e_update_vsi_stats - Update the vsi statistics counters.
785 * @vsi: the VSI to be updated
786 *
787 * There are a few instances where we store the same stat in a
788 * couple of different structs. This is partly because we have
789 * the netdev stats that need to be filled out, which is slightly
790 * different from the "eth_stats" defined by the chip and used in
791 * VF communications. We sort it out here.
792 **/
793 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
794 {
795 struct i40e_pf *pf = vsi->back;
796 struct rtnl_link_stats64 *ons;
797 struct rtnl_link_stats64 *ns; /* netdev stats */
798 struct i40e_eth_stats *oes;
799 struct i40e_eth_stats *es; /* device's eth stats */
800 u32 tx_restart, tx_busy;
801 u64 tx_lost_interrupt;
802 struct i40e_ring *p;
803 u32 rx_page, rx_buf;
804 u64 bytes, packets;
805 unsigned int start;
806 u64 tx_linearize;
807 u64 tx_force_wb;
808 u64 rx_p, rx_b;
809 u64 tx_p, tx_b;
810 u16 q;
811
812 if (test_bit(__I40E_DOWN, &vsi->state) ||
813 test_bit(__I40E_CONFIG_BUSY, &pf->state))
814 return;
815
816 ns = i40e_get_vsi_stats_struct(vsi);
817 ons = &vsi->net_stats_offsets;
818 es = &vsi->eth_stats;
819 oes = &vsi->eth_stats_offsets;
820
821 /* Gather up the netdev and vsi stats that the driver collects
822 * on the fly during packet processing
823 */
824 rx_b = rx_p = 0;
825 tx_b = tx_p = 0;
826 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
827 tx_lost_interrupt = 0;
828 rx_page = 0;
829 rx_buf = 0;
830 rcu_read_lock();
831 for (q = 0; q < vsi->num_queue_pairs; q++) {
832 /* locate Tx ring */
833 p = ACCESS_ONCE(vsi->tx_rings[q]);
834
835 do {
836 start = u64_stats_fetch_begin_irq(&p->syncp);
837 packets = p->stats.packets;
838 bytes = p->stats.bytes;
839 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
840 tx_b += bytes;
841 tx_p += packets;
842 tx_restart += p->tx_stats.restart_queue;
843 tx_busy += p->tx_stats.tx_busy;
844 tx_linearize += p->tx_stats.tx_linearize;
845 tx_force_wb += p->tx_stats.tx_force_wb;
846 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
847
848 /* Rx queue is part of the same block as Tx queue */
849 p = &p[1];
850 do {
851 start = u64_stats_fetch_begin_irq(&p->syncp);
852 packets = p->stats.packets;
853 bytes = p->stats.bytes;
854 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
855 rx_b += bytes;
856 rx_p += packets;
857 rx_buf += p->rx_stats.alloc_buff_failed;
858 rx_page += p->rx_stats.alloc_page_failed;
859 }
860 rcu_read_unlock();
861 vsi->tx_restart = tx_restart;
862 vsi->tx_busy = tx_busy;
863 vsi->tx_linearize = tx_linearize;
864 vsi->tx_force_wb = tx_force_wb;
865 vsi->tx_lost_interrupt = tx_lost_interrupt;
866 vsi->rx_page_failed = rx_page;
867 vsi->rx_buf_failed = rx_buf;
868
869 ns->rx_packets = rx_p;
870 ns->rx_bytes = rx_b;
871 ns->tx_packets = tx_p;
872 ns->tx_bytes = tx_b;
873
874 /* update netdev stats from eth stats */
875 i40e_update_eth_stats(vsi);
876 ons->tx_errors = oes->tx_errors;
877 ns->tx_errors = es->tx_errors;
878 ons->multicast = oes->rx_multicast;
879 ns->multicast = es->rx_multicast;
880 ons->rx_dropped = oes->rx_discards;
881 ns->rx_dropped = es->rx_discards;
882 ons->tx_dropped = oes->tx_discards;
883 ns->tx_dropped = es->tx_discards;
884
885 /* pull in a couple PF stats if this is the main vsi */
886 if (vsi == pf->vsi[pf->lan_vsi]) {
887 ns->rx_crc_errors = pf->stats.crc_errors;
888 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
889 ns->rx_length_errors = pf->stats.rx_length_errors;
890 }
891 }
892
893 /**
894 * i40e_update_pf_stats - Update the PF statistics counters.
895 * @pf: the PF to be updated
896 **/
897 static void i40e_update_pf_stats(struct i40e_pf *pf)
898 {
899 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
900 struct i40e_hw_port_stats *nsd = &pf->stats;
901 struct i40e_hw *hw = &pf->hw;
902 u32 val;
903 int i;
904
905 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
906 I40E_GLPRT_GORCL(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
909 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
910 I40E_GLPRT_GOTCL(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
913 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
914 pf->stat_offsets_loaded,
915 &osd->eth.rx_discards,
916 &nsd->eth.rx_discards);
917 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
918 I40E_GLPRT_UPRCL(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_unicast,
921 &nsd->eth.rx_unicast);
922 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
923 I40E_GLPRT_MPRCL(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_multicast,
926 &nsd->eth.rx_multicast);
927 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
928 I40E_GLPRT_BPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_broadcast,
931 &nsd->eth.rx_broadcast);
932 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
933 I40E_GLPRT_UPTCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.tx_unicast,
936 &nsd->eth.tx_unicast);
937 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
938 I40E_GLPRT_MPTCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.tx_multicast,
941 &nsd->eth.tx_multicast);
942 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
943 I40E_GLPRT_BPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_broadcast,
946 &nsd->eth.tx_broadcast);
947
948 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->tx_dropped_link_down,
951 &nsd->tx_dropped_link_down);
952
953 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->crc_errors, &nsd->crc_errors);
956
957 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->illegal_bytes, &nsd->illegal_bytes);
960
961 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
962 pf->stat_offsets_loaded,
963 &osd->mac_local_faults,
964 &nsd->mac_local_faults);
965 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
966 pf->stat_offsets_loaded,
967 &osd->mac_remote_faults,
968 &nsd->mac_remote_faults);
969
970 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_length_errors,
973 &nsd->rx_length_errors);
974
975 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->link_xon_rx, &nsd->link_xon_rx);
978 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->link_xon_tx, &nsd->link_xon_tx);
981 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->link_xoff_rx, &nsd->link_xoff_rx);
984 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
985 pf->stat_offsets_loaded,
986 &osd->link_xoff_tx, &nsd->link_xoff_tx);
987
988 for (i = 0; i < 8; i++) {
989 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
990 pf->stat_offsets_loaded,
991 &osd->priority_xoff_rx[i],
992 &nsd->priority_xoff_rx[i]);
993 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
994 pf->stat_offsets_loaded,
995 &osd->priority_xon_rx[i],
996 &nsd->priority_xon_rx[i]);
997 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
998 pf->stat_offsets_loaded,
999 &osd->priority_xon_tx[i],
1000 &nsd->priority_xon_tx[i]);
1001 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1002 pf->stat_offsets_loaded,
1003 &osd->priority_xoff_tx[i],
1004 &nsd->priority_xoff_tx[i]);
1005 i40e_stat_update32(hw,
1006 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1007 pf->stat_offsets_loaded,
1008 &osd->priority_xon_2_xoff[i],
1009 &nsd->priority_xon_2_xoff[i]);
1010 }
1011
1012 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1013 I40E_GLPRT_PRC64L(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->rx_size_64, &nsd->rx_size_64);
1016 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1017 I40E_GLPRT_PRC127L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_size_127, &nsd->rx_size_127);
1020 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1021 I40E_GLPRT_PRC255L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_size_255, &nsd->rx_size_255);
1024 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1025 I40E_GLPRT_PRC511L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->rx_size_511, &nsd->rx_size_511);
1028 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1029 I40E_GLPRT_PRC1023L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->rx_size_1023, &nsd->rx_size_1023);
1032 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1033 I40E_GLPRT_PRC1522L(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->rx_size_1522, &nsd->rx_size_1522);
1036 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1037 I40E_GLPRT_PRC9522L(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->rx_size_big, &nsd->rx_size_big);
1040
1041 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1042 I40E_GLPRT_PTC64L(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->tx_size_64, &nsd->tx_size_64);
1045 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1046 I40E_GLPRT_PTC127L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->tx_size_127, &nsd->tx_size_127);
1049 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1050 I40E_GLPRT_PTC255L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->tx_size_255, &nsd->tx_size_255);
1053 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1054 I40E_GLPRT_PTC511L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->tx_size_511, &nsd->tx_size_511);
1057 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1058 I40E_GLPRT_PTC1023L(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->tx_size_1023, &nsd->tx_size_1023);
1061 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1062 I40E_GLPRT_PTC1522L(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->tx_size_1522, &nsd->tx_size_1522);
1065 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1066 I40E_GLPRT_PTC9522L(hw->port),
1067 pf->stat_offsets_loaded,
1068 &osd->tx_size_big, &nsd->tx_size_big);
1069
1070 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1071 pf->stat_offsets_loaded,
1072 &osd->rx_undersize, &nsd->rx_undersize);
1073 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1074 pf->stat_offsets_loaded,
1075 &osd->rx_fragments, &nsd->rx_fragments);
1076 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->rx_oversize, &nsd->rx_oversize);
1079 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1080 pf->stat_offsets_loaded,
1081 &osd->rx_jabber, &nsd->rx_jabber);
1082
1083 /* FDIR stats */
1084 i40e_stat_update32(hw,
1085 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1086 pf->stat_offsets_loaded,
1087 &osd->fd_atr_match, &nsd->fd_atr_match);
1088 i40e_stat_update32(hw,
1089 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1090 pf->stat_offsets_loaded,
1091 &osd->fd_sb_match, &nsd->fd_sb_match);
1092 i40e_stat_update32(hw,
1093 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1094 pf->stat_offsets_loaded,
1095 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1096
1097 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1098 nsd->tx_lpi_status =
1099 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1100 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1101 nsd->rx_lpi_status =
1102 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1103 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1104 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1105 pf->stat_offsets_loaded,
1106 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1107 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1108 pf->stat_offsets_loaded,
1109 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1110
1111 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1112 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1113 nsd->fd_sb_status = true;
1114 else
1115 nsd->fd_sb_status = false;
1116
1117 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1118 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1119 nsd->fd_atr_status = true;
1120 else
1121 nsd->fd_atr_status = false;
1122
1123 pf->stat_offsets_loaded = true;
1124 }
1125
1126 /**
1127 * i40e_update_stats - Update the various statistics counters.
1128 * @vsi: the VSI to be updated
1129 *
1130 * Update the various stats for this VSI and its related entities.
1131 **/
1132 void i40e_update_stats(struct i40e_vsi *vsi)
1133 {
1134 struct i40e_pf *pf = vsi->back;
1135
1136 if (vsi == pf->vsi[pf->lan_vsi])
1137 i40e_update_pf_stats(pf);
1138
1139 i40e_update_vsi_stats(vsi);
1140 #ifdef I40E_FCOE
1141 i40e_update_fcoe_stats(vsi);
1142 #endif
1143 }
1144
1145 /**
1146 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1147 * @vsi: the VSI to be searched
1148 * @macaddr: the MAC address
1149 * @vlan: the vlan
1150 * @is_vf: make sure its a VF filter, else doesn't matter
1151 * @is_netdev: make sure its a netdev filter, else doesn't matter
1152 *
1153 * Returns ptr to the filter object or NULL
1154 **/
1155 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1156 u8 *macaddr, s16 vlan,
1157 bool is_vf, bool is_netdev)
1158 {
1159 struct i40e_mac_filter *f;
1160
1161 if (!vsi || !macaddr)
1162 return NULL;
1163
1164 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1165 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1166 (vlan == f->vlan) &&
1167 (!is_vf || f->is_vf) &&
1168 (!is_netdev || f->is_netdev))
1169 return f;
1170 }
1171 return NULL;
1172 }
1173
1174 /**
1175 * i40e_find_mac - Find a mac addr in the macvlan filters list
1176 * @vsi: the VSI to be searched
1177 * @macaddr: the MAC address we are searching for
1178 * @is_vf: make sure its a VF filter, else doesn't matter
1179 * @is_netdev: make sure its a netdev filter, else doesn't matter
1180 *
1181 * Returns the first filter with the provided MAC address or NULL if
1182 * MAC address was not found
1183 **/
1184 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1185 bool is_vf, bool is_netdev)
1186 {
1187 struct i40e_mac_filter *f;
1188
1189 if (!vsi || !macaddr)
1190 return NULL;
1191
1192 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1193 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1194 (!is_vf || f->is_vf) &&
1195 (!is_netdev || f->is_netdev))
1196 return f;
1197 }
1198 return NULL;
1199 }
1200
1201 /**
1202 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1203 * @vsi: the VSI to be searched
1204 *
1205 * Returns true if VSI is in vlan mode or false otherwise
1206 **/
1207 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1208 {
1209 struct i40e_mac_filter *f;
1210
1211 /* Only -1 for all the filters denotes not in vlan mode
1212 * so we have to go through all the list in order to make sure
1213 */
1214 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1215 if (f->vlan >= 0 || vsi->info.pvid)
1216 return true;
1217 }
1218
1219 return false;
1220 }
1221
1222 /**
1223 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1224 * @vsi: the VSI to be searched
1225 * @macaddr: the mac address to be filtered
1226 * @is_vf: true if it is a VF
1227 * @is_netdev: true if it is a netdev
1228 *
1229 * Goes through all the macvlan filters and adds a
1230 * macvlan filter for each unique vlan that already exists
1231 *
1232 * Returns first filter found on success, else NULL
1233 **/
1234 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1235 bool is_vf, bool is_netdev)
1236 {
1237 struct i40e_mac_filter *f;
1238
1239 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1240 if (vsi->info.pvid)
1241 f->vlan = le16_to_cpu(vsi->info.pvid);
1242 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1243 is_vf, is_netdev)) {
1244 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1245 is_vf, is_netdev))
1246 return NULL;
1247 }
1248 }
1249
1250 return list_first_entry_or_null(&vsi->mac_filter_list,
1251 struct i40e_mac_filter, list);
1252 }
1253
1254 /**
1255 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1256 * @vsi: the VSI to be searched
1257 * @macaddr: the mac address to be removed
1258 * @is_vf: true if it is a VF
1259 * @is_netdev: true if it is a netdev
1260 *
1261 * Removes a given MAC address from a VSI, regardless of VLAN
1262 *
1263 * Returns 0 for success, or error
1264 **/
1265 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1266 bool is_vf, bool is_netdev)
1267 {
1268 struct i40e_mac_filter *f = NULL;
1269 int changed = 0;
1270
1271 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1272 "Missing mac_filter_list_lock\n");
1273 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1274 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1275 (is_vf == f->is_vf) &&
1276 (is_netdev == f->is_netdev)) {
1277 f->counter--;
1278 changed = 1;
1279 if (f->counter == 0)
1280 f->state = I40E_FILTER_REMOVE;
1281 }
1282 }
1283 if (changed) {
1284 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1285 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1286 return 0;
1287 }
1288 return -ENOENT;
1289 }
1290
1291 /**
1292 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1293 * @vsi: the PF Main VSI - inappropriate for any other VSI
1294 * @macaddr: the MAC address
1295 *
1296 * Remove whatever filter the firmware set up so the driver can manage
1297 * its own filtering intelligently.
1298 **/
1299 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1300 {
1301 struct i40e_aqc_remove_macvlan_element_data element;
1302 struct i40e_pf *pf = vsi->back;
1303
1304 /* Only appropriate for the PF main VSI */
1305 if (vsi->type != I40E_VSI_MAIN)
1306 return;
1307
1308 memset(&element, 0, sizeof(element));
1309 ether_addr_copy(element.mac_addr, macaddr);
1310 element.vlan_tag = 0;
1311 /* Ignore error returns, some firmware does it this way... */
1312 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1313 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1314
1315 memset(&element, 0, sizeof(element));
1316 ether_addr_copy(element.mac_addr, macaddr);
1317 element.vlan_tag = 0;
1318 /* ...and some firmware does it this way. */
1319 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1320 I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
1321 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1322 }
1323
1324 /**
1325 * i40e_add_filter - Add a mac/vlan filter to the VSI
1326 * @vsi: the VSI to be searched
1327 * @macaddr: the MAC address
1328 * @vlan: the vlan
1329 * @is_vf: make sure its a VF filter, else doesn't matter
1330 * @is_netdev: make sure its a netdev filter, else doesn't matter
1331 *
1332 * Returns ptr to the filter object or NULL when no memory available.
1333 *
1334 * NOTE: This function is expected to be called with mac_filter_list_lock
1335 * being held.
1336 **/
1337 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1338 u8 *macaddr, s16 vlan,
1339 bool is_vf, bool is_netdev)
1340 {
1341 struct i40e_mac_filter *f;
1342 int changed = false;
1343
1344 if (!vsi || !macaddr)
1345 return NULL;
1346
1347 /* Do not allow broadcast filter to be added since broadcast filter
1348 * is added as part of add VSI for any newly created VSI except
1349 * FDIR VSI
1350 */
1351 if (is_broadcast_ether_addr(macaddr))
1352 return NULL;
1353
1354 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1355 if (!f) {
1356 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1357 if (!f)
1358 goto add_filter_out;
1359
1360 ether_addr_copy(f->macaddr, macaddr);
1361 f->vlan = vlan;
1362 /* If we're in overflow promisc mode, set the state directly
1363 * to failed, so we don't bother to try sending the filter
1364 * to the hardware.
1365 */
1366 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1367 f->state = I40E_FILTER_FAILED;
1368 else
1369 f->state = I40E_FILTER_NEW;
1370 changed = true;
1371 INIT_LIST_HEAD(&f->list);
1372 list_add_tail(&f->list, &vsi->mac_filter_list);
1373 }
1374
1375 /* increment counter and add a new flag if needed */
1376 if (is_vf) {
1377 if (!f->is_vf) {
1378 f->is_vf = true;
1379 f->counter++;
1380 }
1381 } else if (is_netdev) {
1382 if (!f->is_netdev) {
1383 f->is_netdev = true;
1384 f->counter++;
1385 }
1386 } else {
1387 f->counter++;
1388 }
1389
1390 if (changed) {
1391 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1392 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1393 }
1394
1395 add_filter_out:
1396 return f;
1397 }
1398
1399 /**
1400 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1401 * @vsi: the VSI to be searched
1402 * @macaddr: the MAC address
1403 * @vlan: the vlan
1404 * @is_vf: make sure it's a VF filter, else doesn't matter
1405 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1406 *
1407 * NOTE: This function is expected to be called with mac_filter_list_lock
1408 * being held.
1409 * ANOTHER NOTE: This function MUST be called from within the context of
1410 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1411 * instead of list_for_each_entry().
1412 **/
1413 void i40e_del_filter(struct i40e_vsi *vsi,
1414 u8 *macaddr, s16 vlan,
1415 bool is_vf, bool is_netdev)
1416 {
1417 struct i40e_mac_filter *f;
1418
1419 if (!vsi || !macaddr)
1420 return;
1421
1422 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1423 if (!f || f->counter == 0)
1424 return;
1425
1426 if (is_vf) {
1427 if (f->is_vf) {
1428 f->is_vf = false;
1429 f->counter--;
1430 }
1431 } else if (is_netdev) {
1432 if (f->is_netdev) {
1433 f->is_netdev = false;
1434 f->counter--;
1435 }
1436 } else {
1437 /* make sure we don't remove a filter in use by VF or netdev */
1438 int min_f = 0;
1439
1440 min_f += (f->is_vf ? 1 : 0);
1441 min_f += (f->is_netdev ? 1 : 0);
1442
1443 if (f->counter > min_f)
1444 f->counter--;
1445 }
1446
1447 /* counter == 0 tells sync_filters_subtask to
1448 * remove the filter from the firmware's list
1449 */
1450 if (f->counter == 0) {
1451 if ((f->state == I40E_FILTER_FAILED) ||
1452 (f->state == I40E_FILTER_NEW)) {
1453 /* this one never got added by the FW. Just remove it,
1454 * no need to sync anything.
1455 */
1456 list_del(&f->list);
1457 kfree(f);
1458 } else {
1459 f->state = I40E_FILTER_REMOVE;
1460 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1461 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1462 }
1463 }
1464 }
1465
1466 /**
1467 * i40e_set_mac - NDO callback to set mac address
1468 * @netdev: network interface device structure
1469 * @p: pointer to an address structure
1470 *
1471 * Returns 0 on success, negative on failure
1472 **/
1473 #ifdef I40E_FCOE
1474 int i40e_set_mac(struct net_device *netdev, void *p)
1475 #else
1476 static int i40e_set_mac(struct net_device *netdev, void *p)
1477 #endif
1478 {
1479 struct i40e_netdev_priv *np = netdev_priv(netdev);
1480 struct i40e_vsi *vsi = np->vsi;
1481 struct i40e_pf *pf = vsi->back;
1482 struct i40e_hw *hw = &pf->hw;
1483 struct sockaddr *addr = p;
1484
1485 if (!is_valid_ether_addr(addr->sa_data))
1486 return -EADDRNOTAVAIL;
1487
1488 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1489 netdev_info(netdev, "already using mac address %pM\n",
1490 addr->sa_data);
1491 return 0;
1492 }
1493
1494 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1495 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1496 return -EADDRNOTAVAIL;
1497
1498 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1499 netdev_info(netdev, "returning to hw mac address %pM\n",
1500 hw->mac.addr);
1501 else
1502 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1503
1504 spin_lock_bh(&vsi->mac_filter_list_lock);
1505 i40e_del_mac_all_vlan(vsi, netdev->dev_addr, false, true);
1506 i40e_put_mac_in_vlan(vsi, addr->sa_data, false, true);
1507 spin_unlock_bh(&vsi->mac_filter_list_lock);
1508 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1509 if (vsi->type == I40E_VSI_MAIN) {
1510 i40e_status ret;
1511
1512 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1513 I40E_AQC_WRITE_TYPE_LAA_WOL,
1514 addr->sa_data, NULL);
1515 if (ret)
1516 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1517 i40e_stat_str(hw, ret),
1518 i40e_aq_str(hw, hw->aq.asq_last_status));
1519 }
1520
1521 /* schedule our worker thread which will take care of
1522 * applying the new filter changes
1523 */
1524 i40e_service_event_schedule(vsi->back);
1525 return 0;
1526 }
1527
1528 /**
1529 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1530 * @vsi: the VSI being setup
1531 * @ctxt: VSI context structure
1532 * @enabled_tc: Enabled TCs bitmap
1533 * @is_add: True if called before Add VSI
1534 *
1535 * Setup VSI queue mapping for enabled traffic classes.
1536 **/
1537 #ifdef I40E_FCOE
1538 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1539 struct i40e_vsi_context *ctxt,
1540 u8 enabled_tc,
1541 bool is_add)
1542 #else
1543 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1544 struct i40e_vsi_context *ctxt,
1545 u8 enabled_tc,
1546 bool is_add)
1547 #endif
1548 {
1549 struct i40e_pf *pf = vsi->back;
1550 u16 sections = 0;
1551 u8 netdev_tc = 0;
1552 u16 numtc = 0;
1553 u16 qcount;
1554 u8 offset;
1555 u16 qmap;
1556 int i;
1557 u16 num_tc_qps = 0;
1558
1559 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1560 offset = 0;
1561
1562 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1563 /* Find numtc from enabled TC bitmap */
1564 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1565 if (enabled_tc & BIT(i)) /* TC is enabled */
1566 numtc++;
1567 }
1568 if (!numtc) {
1569 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1570 numtc = 1;
1571 }
1572 } else {
1573 /* At least TC0 is enabled in case of non-DCB case */
1574 numtc = 1;
1575 }
1576
1577 vsi->tc_config.numtc = numtc;
1578 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1579 /* Number of queues per enabled TC */
1580 qcount = vsi->alloc_queue_pairs;
1581
1582 num_tc_qps = qcount / numtc;
1583 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1584
1585 /* Setup queue offset/count for all TCs for given VSI */
1586 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1587 /* See if the given TC is enabled for the given VSI */
1588 if (vsi->tc_config.enabled_tc & BIT(i)) {
1589 /* TC is enabled */
1590 int pow, num_qps;
1591
1592 switch (vsi->type) {
1593 case I40E_VSI_MAIN:
1594 qcount = min_t(int, pf->alloc_rss_size,
1595 num_tc_qps);
1596 break;
1597 #ifdef I40E_FCOE
1598 case I40E_VSI_FCOE:
1599 qcount = num_tc_qps;
1600 break;
1601 #endif
1602 case I40E_VSI_FDIR:
1603 case I40E_VSI_SRIOV:
1604 case I40E_VSI_VMDQ2:
1605 default:
1606 qcount = num_tc_qps;
1607 WARN_ON(i != 0);
1608 break;
1609 }
1610 vsi->tc_config.tc_info[i].qoffset = offset;
1611 vsi->tc_config.tc_info[i].qcount = qcount;
1612
1613 /* find the next higher power-of-2 of num queue pairs */
1614 num_qps = qcount;
1615 pow = 0;
1616 while (num_qps && (BIT_ULL(pow) < qcount)) {
1617 pow++;
1618 num_qps >>= 1;
1619 }
1620
1621 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1622 qmap =
1623 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1624 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1625
1626 offset += qcount;
1627 } else {
1628 /* TC is not enabled so set the offset to
1629 * default queue and allocate one queue
1630 * for the given TC.
1631 */
1632 vsi->tc_config.tc_info[i].qoffset = 0;
1633 vsi->tc_config.tc_info[i].qcount = 1;
1634 vsi->tc_config.tc_info[i].netdev_tc = 0;
1635
1636 qmap = 0;
1637 }
1638 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1639 }
1640
1641 /* Set actual Tx/Rx queue pairs */
1642 vsi->num_queue_pairs = offset;
1643 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1644 if (vsi->req_queue_pairs > 0)
1645 vsi->num_queue_pairs = vsi->req_queue_pairs;
1646 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1647 vsi->num_queue_pairs = pf->num_lan_msix;
1648 }
1649
1650 /* Scheduler section valid can only be set for ADD VSI */
1651 if (is_add) {
1652 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1653
1654 ctxt->info.up_enable_bits = enabled_tc;
1655 }
1656 if (vsi->type == I40E_VSI_SRIOV) {
1657 ctxt->info.mapping_flags |=
1658 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1659 for (i = 0; i < vsi->num_queue_pairs; i++)
1660 ctxt->info.queue_mapping[i] =
1661 cpu_to_le16(vsi->base_queue + i);
1662 } else {
1663 ctxt->info.mapping_flags |=
1664 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1665 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1666 }
1667 ctxt->info.valid_sections |= cpu_to_le16(sections);
1668 }
1669
1670 /**
1671 * i40e_set_rx_mode - NDO callback to set the netdev filters
1672 * @netdev: network interface device structure
1673 **/
1674 #ifdef I40E_FCOE
1675 void i40e_set_rx_mode(struct net_device *netdev)
1676 #else
1677 static void i40e_set_rx_mode(struct net_device *netdev)
1678 #endif
1679 {
1680 struct i40e_netdev_priv *np = netdev_priv(netdev);
1681 struct i40e_mac_filter *f, *ftmp;
1682 struct i40e_vsi *vsi = np->vsi;
1683 struct netdev_hw_addr *uca;
1684 struct netdev_hw_addr *mca;
1685 struct netdev_hw_addr *ha;
1686
1687 spin_lock_bh(&vsi->mac_filter_list_lock);
1688
1689 /* add addr if not already in the filter list */
1690 netdev_for_each_uc_addr(uca, netdev) {
1691 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1692 if (i40e_is_vsi_in_vlan(vsi))
1693 i40e_put_mac_in_vlan(vsi, uca->addr,
1694 false, true);
1695 else
1696 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1697 false, true);
1698 }
1699 }
1700
1701 netdev_for_each_mc_addr(mca, netdev) {
1702 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1703 if (i40e_is_vsi_in_vlan(vsi))
1704 i40e_put_mac_in_vlan(vsi, mca->addr,
1705 false, true);
1706 else
1707 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1708 false, true);
1709 }
1710 }
1711
1712 /* remove filter if not in netdev list */
1713 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1714
1715 if (!f->is_netdev)
1716 continue;
1717
1718 netdev_for_each_mc_addr(mca, netdev)
1719 if (ether_addr_equal(mca->addr, f->macaddr))
1720 goto bottom_of_search_loop;
1721
1722 netdev_for_each_uc_addr(uca, netdev)
1723 if (ether_addr_equal(uca->addr, f->macaddr))
1724 goto bottom_of_search_loop;
1725
1726 for_each_dev_addr(netdev, ha)
1727 if (ether_addr_equal(ha->addr, f->macaddr))
1728 goto bottom_of_search_loop;
1729
1730 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1731 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1732
1733 bottom_of_search_loop:
1734 continue;
1735 }
1736 spin_unlock_bh(&vsi->mac_filter_list_lock);
1737
1738 /* check for other flag changes */
1739 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1740 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1741 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1742 }
1743
1744 /* schedule our worker thread which will take care of
1745 * applying the new filter changes
1746 */
1747 i40e_service_event_schedule(vsi->back);
1748 }
1749
1750 /**
1751 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1752 * @vsi: pointer to vsi struct
1753 * @from: Pointer to list which contains MAC filter entries - changes to
1754 * those entries needs to be undone.
1755 *
1756 * MAC filter entries from list were slated to be removed from device.
1757 **/
1758 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1759 struct list_head *from)
1760 {
1761 struct i40e_mac_filter *f, *ftmp;
1762
1763 list_for_each_entry_safe(f, ftmp, from, list) {
1764 /* Move the element back into MAC filter list*/
1765 list_move_tail(&f->list, &vsi->mac_filter_list);
1766 }
1767 }
1768
1769 /**
1770 * i40e_update_filter_state - Update filter state based on return data
1771 * from firmware
1772 * @count: Number of filters added
1773 * @add_list: return data from fw
1774 * @head: pointer to first filter in current batch
1775 * @aq_err: status from fw
1776 *
1777 * MAC filter entries from list were slated to be added to device. Returns
1778 * number of successful filters. Note that 0 does NOT mean success!
1779 **/
1780 static int
1781 i40e_update_filter_state(int count,
1782 struct i40e_aqc_add_macvlan_element_data *add_list,
1783 struct i40e_mac_filter *add_head, int aq_err)
1784 {
1785 int retval = 0;
1786 int i;
1787
1788
1789 if (!aq_err) {
1790 retval = count;
1791 /* Everything's good, mark all filters active. */
1792 for (i = 0; i < count ; i++) {
1793 add_head->state = I40E_FILTER_ACTIVE;
1794 add_head = list_next_entry(add_head, list);
1795 }
1796 } else if (aq_err == I40E_AQ_RC_ENOSPC) {
1797 /* Device ran out of filter space. Check the return value
1798 * for each filter to see which ones are active.
1799 */
1800 for (i = 0; i < count ; i++) {
1801 if (add_list[i].match_method ==
1802 I40E_AQC_MM_ERR_NO_RES) {
1803 add_head->state = I40E_FILTER_FAILED;
1804 } else {
1805 add_head->state = I40E_FILTER_ACTIVE;
1806 retval++;
1807 }
1808 add_head = list_next_entry(add_head, list);
1809 }
1810 } else {
1811 /* Some other horrible thing happened, fail all filters */
1812 retval = 0;
1813 for (i = 0; i < count ; i++) {
1814 add_head->state = I40E_FILTER_FAILED;
1815 add_head = list_next_entry(add_head, list);
1816 }
1817 }
1818 return retval;
1819 }
1820
1821 /**
1822 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1823 * @vsi: ptr to the VSI
1824 *
1825 * Push any outstanding VSI filter changes through the AdminQ.
1826 *
1827 * Returns 0 or error value
1828 **/
1829 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1830 {
1831 struct i40e_mac_filter *f, *ftmp, *add_head = NULL;
1832 struct list_head tmp_add_list, tmp_del_list;
1833 struct i40e_hw *hw = &vsi->back->hw;
1834 bool promisc_changed = false;
1835 char vsi_name[16] = "PF";
1836 int filter_list_len = 0;
1837 u32 changed_flags = 0;
1838 i40e_status aq_ret = 0;
1839 int retval = 0;
1840 struct i40e_pf *pf;
1841 int num_add = 0;
1842 int num_del = 0;
1843 int aq_err = 0;
1844 u16 cmd_flags;
1845 int list_size;
1846 int fcnt;
1847
1848 /* empty array typed pointers, kcalloc later */
1849 struct i40e_aqc_add_macvlan_element_data *add_list;
1850 struct i40e_aqc_remove_macvlan_element_data *del_list;
1851
1852 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1853 usleep_range(1000, 2000);
1854 pf = vsi->back;
1855
1856 if (vsi->netdev) {
1857 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1858 vsi->current_netdev_flags = vsi->netdev->flags;
1859 }
1860
1861 INIT_LIST_HEAD(&tmp_add_list);
1862 INIT_LIST_HEAD(&tmp_del_list);
1863
1864 if (vsi->type == I40E_VSI_SRIOV)
1865 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
1866 else if (vsi->type != I40E_VSI_MAIN)
1867 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
1868
1869 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1870 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1871
1872 spin_lock_bh(&vsi->mac_filter_list_lock);
1873 /* Create a list of filters to delete. */
1874 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1875 if (f->state == I40E_FILTER_REMOVE) {
1876 WARN_ON(f->counter != 0);
1877 /* Move the element into temporary del_list */
1878 list_move_tail(&f->list, &tmp_del_list);
1879 vsi->active_filters--;
1880 }
1881 if (f->state == I40E_FILTER_NEW) {
1882 WARN_ON(f->counter == 0);
1883 /* Move the element into temporary add_list */
1884 list_move_tail(&f->list, &tmp_add_list);
1885 }
1886 }
1887 spin_unlock_bh(&vsi->mac_filter_list_lock);
1888 }
1889
1890 /* Now process 'del_list' outside the lock */
1891 if (!list_empty(&tmp_del_list)) {
1892 filter_list_len = hw->aq.asq_buf_size /
1893 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1894 list_size = filter_list_len *
1895 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1896 del_list = kzalloc(list_size, GFP_ATOMIC);
1897 if (!del_list) {
1898 /* Undo VSI's MAC filter entry element updates */
1899 spin_lock_bh(&vsi->mac_filter_list_lock);
1900 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1901 spin_unlock_bh(&vsi->mac_filter_list_lock);
1902 retval = -ENOMEM;
1903 goto out;
1904 }
1905
1906 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1907 cmd_flags = 0;
1908
1909 /* add to delete list */
1910 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1911 if (f->vlan == I40E_VLAN_ANY) {
1912 del_list[num_del].vlan_tag = 0;
1913 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
1914 } else {
1915 del_list[num_del].vlan_tag =
1916 cpu_to_le16((u16)(f->vlan));
1917 }
1918
1919 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1920 del_list[num_del].flags = cmd_flags;
1921 num_del++;
1922
1923 /* flush a full buffer */
1924 if (num_del == filter_list_len) {
1925 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid,
1926 del_list,
1927 num_del, NULL);
1928 aq_err = hw->aq.asq_last_status;
1929 num_del = 0;
1930 memset(del_list, 0, list_size);
1931
1932 /* Explicitly ignore and do not report when
1933 * firmware returns ENOENT.
1934 */
1935 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1936 retval = -EIO;
1937 dev_info(&pf->pdev->dev,
1938 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1939 vsi_name,
1940 i40e_stat_str(hw, aq_ret),
1941 i40e_aq_str(hw, aq_err));
1942 }
1943 }
1944 /* Release memory for MAC filter entries which were
1945 * synced up with HW.
1946 */
1947 list_del(&f->list);
1948 kfree(f);
1949 }
1950
1951 if (num_del) {
1952 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, del_list,
1953 num_del, NULL);
1954 aq_err = hw->aq.asq_last_status;
1955 num_del = 0;
1956
1957 /* Explicitly ignore and do not report when firmware
1958 * returns ENOENT.
1959 */
1960 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1961 retval = -EIO;
1962 dev_info(&pf->pdev->dev,
1963 "ignoring delete macvlan error on %s, err %s aq_err %s\n",
1964 vsi_name,
1965 i40e_stat_str(hw, aq_ret),
1966 i40e_aq_str(hw, aq_err));
1967 }
1968 }
1969
1970 kfree(del_list);
1971 del_list = NULL;
1972 }
1973
1974 if (!list_empty(&tmp_add_list)) {
1975 /* Do all the adds now. */
1976 filter_list_len = hw->aq.asq_buf_size /
1977 sizeof(struct i40e_aqc_add_macvlan_element_data);
1978 list_size = filter_list_len *
1979 sizeof(struct i40e_aqc_add_macvlan_element_data);
1980 add_list = kzalloc(list_size, GFP_ATOMIC);
1981 if (!add_list) {
1982 retval = -ENOMEM;
1983 goto out;
1984 }
1985 num_add = 0;
1986 list_for_each_entry(f, &tmp_add_list, list) {
1987 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1988 &vsi->state)) {
1989 f->state = I40E_FILTER_FAILED;
1990 continue;
1991 }
1992 /* add to add array */
1993 if (num_add == 0)
1994 add_head = f;
1995 cmd_flags = 0;
1996 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1997 if (f->vlan == I40E_VLAN_ANY) {
1998 add_list[num_add].vlan_tag = 0;
1999 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2000 } else {
2001 add_list[num_add].vlan_tag =
2002 cpu_to_le16((u16)(f->vlan));
2003 }
2004 add_list[num_add].queue_number = 0;
2005 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2006 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2007 num_add++;
2008
2009 /* flush a full buffer */
2010 if (num_add == filter_list_len) {
2011 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2012 add_list, num_add,
2013 NULL);
2014 aq_err = hw->aq.asq_last_status;
2015 fcnt = i40e_update_filter_state(num_add,
2016 add_list,
2017 add_head,
2018 aq_ret);
2019 vsi->active_filters += fcnt;
2020
2021 if (fcnt != num_add) {
2022 promisc_changed = true;
2023 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2024 &vsi->state);
2025 vsi->promisc_threshold =
2026 (vsi->active_filters * 3) / 4;
2027 dev_warn(&pf->pdev->dev,
2028 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2029 i40e_aq_str(hw, aq_err),
2030 vsi_name);
2031 }
2032 memset(add_list, 0, list_size);
2033 num_add = 0;
2034 }
2035 }
2036 if (num_add) {
2037 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2038 add_list, num_add, NULL);
2039 aq_err = hw->aq.asq_last_status;
2040 fcnt = i40e_update_filter_state(num_add, add_list,
2041 add_head, aq_ret);
2042 vsi->active_filters += fcnt;
2043 if (fcnt != num_add) {
2044 promisc_changed = true;
2045 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2046 &vsi->state);
2047 vsi->promisc_threshold =
2048 (vsi->active_filters * 3) / 4;
2049 dev_warn(&pf->pdev->dev,
2050 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2051 i40e_aq_str(hw, aq_err), vsi_name);
2052 }
2053 }
2054 /* Now move all of the filters from the temp add list back to
2055 * the VSI's list.
2056 */
2057 spin_lock_bh(&vsi->mac_filter_list_lock);
2058 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2059 list_move_tail(&f->list, &vsi->mac_filter_list);
2060 }
2061 spin_unlock_bh(&vsi->mac_filter_list_lock);
2062 kfree(add_list);
2063 add_list = NULL;
2064 }
2065
2066 /* Check to see if we can drop out of overflow promiscuous mode. */
2067 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2068 (vsi->active_filters < vsi->promisc_threshold)) {
2069 int failed_count = 0;
2070 /* See if we have any failed filters. We can't drop out of
2071 * promiscuous until these have all been deleted.
2072 */
2073 spin_lock_bh(&vsi->mac_filter_list_lock);
2074 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2075 if (f->state == I40E_FILTER_FAILED)
2076 failed_count++;
2077 }
2078 spin_unlock_bh(&vsi->mac_filter_list_lock);
2079 if (!failed_count) {
2080 dev_info(&pf->pdev->dev,
2081 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2082 vsi_name);
2083 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2084 promisc_changed = true;
2085 vsi->promisc_threshold = 0;
2086 }
2087 }
2088
2089 /* if the VF is not trusted do not do promisc */
2090 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2091 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2092 goto out;
2093 }
2094
2095 /* check for changes in promiscuous modes */
2096 if (changed_flags & IFF_ALLMULTI) {
2097 bool cur_multipromisc;
2098
2099 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2100 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2101 vsi->seid,
2102 cur_multipromisc,
2103 NULL);
2104 if (aq_ret) {
2105 retval = i40e_aq_rc_to_posix(aq_ret,
2106 hw->aq.asq_last_status);
2107 dev_info(&pf->pdev->dev,
2108 "set multi promisc failed on %s, err %s aq_err %s\n",
2109 vsi_name,
2110 i40e_stat_str(hw, aq_ret),
2111 i40e_aq_str(hw, hw->aq.asq_last_status));
2112 }
2113 }
2114 if ((changed_flags & IFF_PROMISC) ||
2115 (promisc_changed &&
2116 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2117 bool cur_promisc;
2118
2119 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2120 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2121 &vsi->state));
2122 if ((vsi->type == I40E_VSI_MAIN) &&
2123 (pf->lan_veb != I40E_NO_VEB) &&
2124 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2125 /* set defport ON for Main VSI instead of true promisc
2126 * this way we will get all unicast/multicast and VLAN
2127 * promisc behavior but will not get VF or VMDq traffic
2128 * replicated on the Main VSI.
2129 */
2130 if (pf->cur_promisc != cur_promisc) {
2131 pf->cur_promisc = cur_promisc;
2132 if (cur_promisc)
2133 aq_ret =
2134 i40e_aq_set_default_vsi(hw,
2135 vsi->seid,
2136 NULL);
2137 else
2138 aq_ret =
2139 i40e_aq_clear_default_vsi(hw,
2140 vsi->seid,
2141 NULL);
2142 if (aq_ret) {
2143 retval = i40e_aq_rc_to_posix(aq_ret,
2144 hw->aq.asq_last_status);
2145 dev_info(&pf->pdev->dev,
2146 "Set default VSI failed on %s, err %s, aq_err %s\n",
2147 vsi_name,
2148 i40e_stat_str(hw, aq_ret),
2149 i40e_aq_str(hw,
2150 hw->aq.asq_last_status));
2151 }
2152 }
2153 } else {
2154 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2155 hw,
2156 vsi->seid,
2157 cur_promisc, NULL,
2158 true);
2159 if (aq_ret) {
2160 retval =
2161 i40e_aq_rc_to_posix(aq_ret,
2162 hw->aq.asq_last_status);
2163 dev_info(&pf->pdev->dev,
2164 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2165 vsi_name,
2166 i40e_stat_str(hw, aq_ret),
2167 i40e_aq_str(hw,
2168 hw->aq.asq_last_status));
2169 }
2170 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2171 hw,
2172 vsi->seid,
2173 cur_promisc, NULL);
2174 if (aq_ret) {
2175 retval =
2176 i40e_aq_rc_to_posix(aq_ret,
2177 hw->aq.asq_last_status);
2178 dev_info(&pf->pdev->dev,
2179 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2180 vsi_name,
2181 i40e_stat_str(hw, aq_ret),
2182 i40e_aq_str(hw,
2183 hw->aq.asq_last_status));
2184 }
2185 }
2186 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2187 vsi->seid,
2188 cur_promisc, NULL);
2189 if (aq_ret) {
2190 retval = i40e_aq_rc_to_posix(aq_ret,
2191 pf->hw.aq.asq_last_status);
2192 dev_info(&pf->pdev->dev,
2193 "set brdcast promisc failed, err %s, aq_err %s\n",
2194 i40e_stat_str(hw, aq_ret),
2195 i40e_aq_str(hw,
2196 hw->aq.asq_last_status));
2197 }
2198 }
2199 out:
2200 /* if something went wrong then set the changed flag so we try again */
2201 if (retval)
2202 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2203
2204 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2205 return retval;
2206 }
2207
2208 /**
2209 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2210 * @pf: board private structure
2211 **/
2212 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2213 {
2214 int v;
2215
2216 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2217 return;
2218 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2219
2220 for (v = 0; v < pf->num_alloc_vsi; v++) {
2221 if (pf->vsi[v] &&
2222 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2223 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2224
2225 if (ret) {
2226 /* come back and try again later */
2227 pf->flags |= I40E_FLAG_FILTER_SYNC;
2228 break;
2229 }
2230 }
2231 }
2232 }
2233
2234 /**
2235 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2236 * @netdev: network interface device structure
2237 * @new_mtu: new value for maximum frame size
2238 *
2239 * Returns 0 on success, negative on failure
2240 **/
2241 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2242 {
2243 struct i40e_netdev_priv *np = netdev_priv(netdev);
2244 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2245 struct i40e_vsi *vsi = np->vsi;
2246
2247 /* MTU < 68 is an error and causes problems on some kernels */
2248 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2249 return -EINVAL;
2250
2251 netdev_info(netdev, "changing MTU from %d to %d\n",
2252 netdev->mtu, new_mtu);
2253 netdev->mtu = new_mtu;
2254 if (netif_running(netdev))
2255 i40e_vsi_reinit_locked(vsi);
2256 i40e_notify_client_of_l2_param_changes(vsi);
2257 return 0;
2258 }
2259
2260 /**
2261 * i40e_ioctl - Access the hwtstamp interface
2262 * @netdev: network interface device structure
2263 * @ifr: interface request data
2264 * @cmd: ioctl command
2265 **/
2266 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2267 {
2268 struct i40e_netdev_priv *np = netdev_priv(netdev);
2269 struct i40e_pf *pf = np->vsi->back;
2270
2271 switch (cmd) {
2272 case SIOCGHWTSTAMP:
2273 return i40e_ptp_get_ts_config(pf, ifr);
2274 case SIOCSHWTSTAMP:
2275 return i40e_ptp_set_ts_config(pf, ifr);
2276 default:
2277 return -EOPNOTSUPP;
2278 }
2279 }
2280
2281 /**
2282 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2283 * @vsi: the vsi being adjusted
2284 **/
2285 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2286 {
2287 struct i40e_vsi_context ctxt;
2288 i40e_status ret;
2289
2290 if ((vsi->info.valid_sections &
2291 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2292 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2293 return; /* already enabled */
2294
2295 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2296 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2297 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2298
2299 ctxt.seid = vsi->seid;
2300 ctxt.info = vsi->info;
2301 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2302 if (ret) {
2303 dev_info(&vsi->back->pdev->dev,
2304 "update vlan stripping failed, err %s aq_err %s\n",
2305 i40e_stat_str(&vsi->back->hw, ret),
2306 i40e_aq_str(&vsi->back->hw,
2307 vsi->back->hw.aq.asq_last_status));
2308 }
2309 }
2310
2311 /**
2312 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2313 * @vsi: the vsi being adjusted
2314 **/
2315 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2316 {
2317 struct i40e_vsi_context ctxt;
2318 i40e_status ret;
2319
2320 if ((vsi->info.valid_sections &
2321 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2322 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2323 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2324 return; /* already disabled */
2325
2326 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2327 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2328 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2329
2330 ctxt.seid = vsi->seid;
2331 ctxt.info = vsi->info;
2332 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2333 if (ret) {
2334 dev_info(&vsi->back->pdev->dev,
2335 "update vlan stripping failed, err %s aq_err %s\n",
2336 i40e_stat_str(&vsi->back->hw, ret),
2337 i40e_aq_str(&vsi->back->hw,
2338 vsi->back->hw.aq.asq_last_status));
2339 }
2340 }
2341
2342 /**
2343 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2344 * @netdev: network interface to be adjusted
2345 * @features: netdev features to test if VLAN offload is enabled or not
2346 **/
2347 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2348 {
2349 struct i40e_netdev_priv *np = netdev_priv(netdev);
2350 struct i40e_vsi *vsi = np->vsi;
2351
2352 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2353 i40e_vlan_stripping_enable(vsi);
2354 else
2355 i40e_vlan_stripping_disable(vsi);
2356 }
2357
2358 /**
2359 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2360 * @vsi: the vsi being configured
2361 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2362 **/
2363 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2364 {
2365 struct i40e_mac_filter *f, *ftmp, *add_f;
2366 bool is_netdev, is_vf;
2367
2368 is_vf = (vsi->type == I40E_VSI_SRIOV);
2369 is_netdev = !!(vsi->netdev);
2370
2371 /* Locked once because all functions invoked below iterates list*/
2372 spin_lock_bh(&vsi->mac_filter_list_lock);
2373
2374 if (is_netdev) {
2375 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2376 is_vf, is_netdev);
2377 if (!add_f) {
2378 dev_info(&vsi->back->pdev->dev,
2379 "Could not add vlan filter %d for %pM\n",
2380 vid, vsi->netdev->dev_addr);
2381 spin_unlock_bh(&vsi->mac_filter_list_lock);
2382 return -ENOMEM;
2383 }
2384 }
2385
2386 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2387 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2388 if (!add_f) {
2389 dev_info(&vsi->back->pdev->dev,
2390 "Could not add vlan filter %d for %pM\n",
2391 vid, f->macaddr);
2392 spin_unlock_bh(&vsi->mac_filter_list_lock);
2393 return -ENOMEM;
2394 }
2395 }
2396
2397 /* Now if we add a vlan tag, make sure to check if it is the first
2398 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2399 * with 0, so we now accept untagged and specified tagged traffic
2400 * (and not all tags along with untagged)
2401 */
2402 if (vid > 0) {
2403 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2404 I40E_VLAN_ANY,
2405 is_vf, is_netdev)) {
2406 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2407 I40E_VLAN_ANY, is_vf, is_netdev);
2408 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2409 is_vf, is_netdev);
2410 if (!add_f) {
2411 dev_info(&vsi->back->pdev->dev,
2412 "Could not add filter 0 for %pM\n",
2413 vsi->netdev->dev_addr);
2414 spin_unlock_bh(&vsi->mac_filter_list_lock);
2415 return -ENOMEM;
2416 }
2417 }
2418 }
2419
2420 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2421 if (vid > 0 && !vsi->info.pvid) {
2422 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2423 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2424 is_vf, is_netdev))
2425 continue;
2426 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2427 is_vf, is_netdev);
2428 add_f = i40e_add_filter(vsi, f->macaddr,
2429 0, is_vf, is_netdev);
2430 if (!add_f) {
2431 dev_info(&vsi->back->pdev->dev,
2432 "Could not add filter 0 for %pM\n",
2433 f->macaddr);
2434 spin_unlock_bh(&vsi->mac_filter_list_lock);
2435 return -ENOMEM;
2436 }
2437 }
2438 }
2439
2440 spin_unlock_bh(&vsi->mac_filter_list_lock);
2441
2442 /* schedule our worker thread which will take care of
2443 * applying the new filter changes
2444 */
2445 i40e_service_event_schedule(vsi->back);
2446 return 0;
2447 }
2448
2449 /**
2450 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2451 * @vsi: the vsi being configured
2452 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2453 *
2454 * Return: 0 on success or negative otherwise
2455 **/
2456 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2457 {
2458 struct net_device *netdev = vsi->netdev;
2459 struct i40e_mac_filter *f, *ftmp, *add_f;
2460 bool is_vf, is_netdev;
2461 int filter_count = 0;
2462
2463 is_vf = (vsi->type == I40E_VSI_SRIOV);
2464 is_netdev = !!(netdev);
2465
2466 /* Locked once because all functions invoked below iterates list */
2467 spin_lock_bh(&vsi->mac_filter_list_lock);
2468
2469 if (is_netdev)
2470 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2471
2472 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
2473 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2474
2475 /* go through all the filters for this VSI and if there is only
2476 * vid == 0 it means there are no other filters, so vid 0 must
2477 * be replaced with -1. This signifies that we should from now
2478 * on accept any traffic (with any tag present, or untagged)
2479 */
2480 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2481 if (is_netdev) {
2482 if (f->vlan &&
2483 ether_addr_equal(netdev->dev_addr, f->macaddr))
2484 filter_count++;
2485 }
2486
2487 if (f->vlan)
2488 filter_count++;
2489 }
2490
2491 if (!filter_count && is_netdev) {
2492 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2493 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2494 is_vf, is_netdev);
2495 if (!f) {
2496 dev_info(&vsi->back->pdev->dev,
2497 "Could not add filter %d for %pM\n",
2498 I40E_VLAN_ANY, netdev->dev_addr);
2499 spin_unlock_bh(&vsi->mac_filter_list_lock);
2500 return -ENOMEM;
2501 }
2502 }
2503
2504 if (!filter_count) {
2505 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2506 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2507 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2508 is_vf, is_netdev);
2509 if (!add_f) {
2510 dev_info(&vsi->back->pdev->dev,
2511 "Could not add filter %d for %pM\n",
2512 I40E_VLAN_ANY, f->macaddr);
2513 spin_unlock_bh(&vsi->mac_filter_list_lock);
2514 return -ENOMEM;
2515 }
2516 }
2517 }
2518
2519 spin_unlock_bh(&vsi->mac_filter_list_lock);
2520
2521 /* schedule our worker thread which will take care of
2522 * applying the new filter changes
2523 */
2524 i40e_service_event_schedule(vsi->back);
2525 return 0;
2526 }
2527
2528 /**
2529 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2530 * @netdev: network interface to be adjusted
2531 * @vid: vlan id to be added
2532 *
2533 * net_device_ops implementation for adding vlan ids
2534 **/
2535 #ifdef I40E_FCOE
2536 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2537 __always_unused __be16 proto, u16 vid)
2538 #else
2539 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2540 __always_unused __be16 proto, u16 vid)
2541 #endif
2542 {
2543 struct i40e_netdev_priv *np = netdev_priv(netdev);
2544 struct i40e_vsi *vsi = np->vsi;
2545 int ret = 0;
2546
2547 if (vid > 4095)
2548 return -EINVAL;
2549
2550 /* If the network stack called us with vid = 0 then
2551 * it is asking to receive priority tagged packets with
2552 * vlan id 0. Our HW receives them by default when configured
2553 * to receive untagged packets so there is no need to add an
2554 * extra filter for vlan 0 tagged packets.
2555 */
2556 if (vid)
2557 ret = i40e_vsi_add_vlan(vsi, vid);
2558
2559 if (!ret && (vid < VLAN_N_VID))
2560 set_bit(vid, vsi->active_vlans);
2561
2562 return ret;
2563 }
2564
2565 /**
2566 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2567 * @netdev: network interface to be adjusted
2568 * @vid: vlan id to be removed
2569 *
2570 * net_device_ops implementation for removing vlan ids
2571 **/
2572 #ifdef I40E_FCOE
2573 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2574 __always_unused __be16 proto, u16 vid)
2575 #else
2576 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2577 __always_unused __be16 proto, u16 vid)
2578 #endif
2579 {
2580 struct i40e_netdev_priv *np = netdev_priv(netdev);
2581 struct i40e_vsi *vsi = np->vsi;
2582
2583 /* return code is ignored as there is nothing a user
2584 * can do about failure to remove and a log message was
2585 * already printed from the other function
2586 */
2587 i40e_vsi_kill_vlan(vsi, vid);
2588
2589 clear_bit(vid, vsi->active_vlans);
2590
2591 return 0;
2592 }
2593
2594 /**
2595 * i40e_macaddr_init - explicitly write the mac address filters
2596 *
2597 * @vsi: pointer to the vsi
2598 * @macaddr: the MAC address
2599 *
2600 * This is needed when the macaddr has been obtained by other
2601 * means than the default, e.g., from Open Firmware or IDPROM.
2602 * Returns 0 on success, negative on failure
2603 **/
2604 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2605 {
2606 int ret;
2607 struct i40e_aqc_add_macvlan_element_data element;
2608
2609 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2610 I40E_AQC_WRITE_TYPE_LAA_WOL,
2611 macaddr, NULL);
2612 if (ret) {
2613 dev_info(&vsi->back->pdev->dev,
2614 "Addr change for VSI failed: %d\n", ret);
2615 return -EADDRNOTAVAIL;
2616 }
2617
2618 memset(&element, 0, sizeof(element));
2619 ether_addr_copy(element.mac_addr, macaddr);
2620 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2621 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2622 if (ret) {
2623 dev_info(&vsi->back->pdev->dev,
2624 "add filter failed err %s aq_err %s\n",
2625 i40e_stat_str(&vsi->back->hw, ret),
2626 i40e_aq_str(&vsi->back->hw,
2627 vsi->back->hw.aq.asq_last_status));
2628 }
2629 return ret;
2630 }
2631
2632 /**
2633 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2634 * @vsi: the vsi being brought back up
2635 **/
2636 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2637 {
2638 u16 vid;
2639
2640 if (!vsi->netdev)
2641 return;
2642
2643 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2644
2645 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2646 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2647 vid);
2648 }
2649
2650 /**
2651 * i40e_vsi_add_pvid - Add pvid for the VSI
2652 * @vsi: the vsi being adjusted
2653 * @vid: the vlan id to set as a PVID
2654 **/
2655 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2656 {
2657 struct i40e_vsi_context ctxt;
2658 i40e_status ret;
2659
2660 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2661 vsi->info.pvid = cpu_to_le16(vid);
2662 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2663 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2664 I40E_AQ_VSI_PVLAN_EMOD_STR;
2665
2666 ctxt.seid = vsi->seid;
2667 ctxt.info = vsi->info;
2668 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2669 if (ret) {
2670 dev_info(&vsi->back->pdev->dev,
2671 "add pvid failed, err %s aq_err %s\n",
2672 i40e_stat_str(&vsi->back->hw, ret),
2673 i40e_aq_str(&vsi->back->hw,
2674 vsi->back->hw.aq.asq_last_status));
2675 return -ENOENT;
2676 }
2677
2678 return 0;
2679 }
2680
2681 /**
2682 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2683 * @vsi: the vsi being adjusted
2684 *
2685 * Just use the vlan_rx_register() service to put it back to normal
2686 **/
2687 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2688 {
2689 i40e_vlan_stripping_disable(vsi);
2690
2691 vsi->info.pvid = 0;
2692 }
2693
2694 /**
2695 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2696 * @vsi: ptr to the VSI
2697 *
2698 * If this function returns with an error, then it's possible one or
2699 * more of the rings is populated (while the rest are not). It is the
2700 * callers duty to clean those orphaned rings.
2701 *
2702 * Return 0 on success, negative on failure
2703 **/
2704 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2705 {
2706 int i, err = 0;
2707
2708 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2709 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2710
2711 return err;
2712 }
2713
2714 /**
2715 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2716 * @vsi: ptr to the VSI
2717 *
2718 * Free VSI's transmit software resources
2719 **/
2720 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2721 {
2722 int i;
2723
2724 if (!vsi->tx_rings)
2725 return;
2726
2727 for (i = 0; i < vsi->num_queue_pairs; i++)
2728 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2729 i40e_free_tx_resources(vsi->tx_rings[i]);
2730 }
2731
2732 /**
2733 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2734 * @vsi: ptr to the VSI
2735 *
2736 * If this function returns with an error, then it's possible one or
2737 * more of the rings is populated (while the rest are not). It is the
2738 * callers duty to clean those orphaned rings.
2739 *
2740 * Return 0 on success, negative on failure
2741 **/
2742 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2743 {
2744 int i, err = 0;
2745
2746 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2747 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2748 #ifdef I40E_FCOE
2749 i40e_fcoe_setup_ddp_resources(vsi);
2750 #endif
2751 return err;
2752 }
2753
2754 /**
2755 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2756 * @vsi: ptr to the VSI
2757 *
2758 * Free all receive software resources
2759 **/
2760 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2761 {
2762 int i;
2763
2764 if (!vsi->rx_rings)
2765 return;
2766
2767 for (i = 0; i < vsi->num_queue_pairs; i++)
2768 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2769 i40e_free_rx_resources(vsi->rx_rings[i]);
2770 #ifdef I40E_FCOE
2771 i40e_fcoe_free_ddp_resources(vsi);
2772 #endif
2773 }
2774
2775 /**
2776 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2777 * @ring: The Tx ring to configure
2778 *
2779 * This enables/disables XPS for a given Tx descriptor ring
2780 * based on the TCs enabled for the VSI that ring belongs to.
2781 **/
2782 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2783 {
2784 struct i40e_vsi *vsi = ring->vsi;
2785 cpumask_var_t mask;
2786
2787 if (!ring->q_vector || !ring->netdev)
2788 return;
2789
2790 /* Single TC mode enable XPS */
2791 if (vsi->tc_config.numtc <= 1) {
2792 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2793 netif_set_xps_queue(ring->netdev,
2794 &ring->q_vector->affinity_mask,
2795 ring->queue_index);
2796 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2797 /* Disable XPS to allow selection based on TC */
2798 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2799 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2800 free_cpumask_var(mask);
2801 }
2802
2803 /* schedule our worker thread which will take care of
2804 * applying the new filter changes
2805 */
2806 i40e_service_event_schedule(vsi->back);
2807 }
2808
2809 /**
2810 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2811 * @ring: The Tx ring to configure
2812 *
2813 * Configure the Tx descriptor ring in the HMC context.
2814 **/
2815 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2816 {
2817 struct i40e_vsi *vsi = ring->vsi;
2818 u16 pf_q = vsi->base_queue + ring->queue_index;
2819 struct i40e_hw *hw = &vsi->back->hw;
2820 struct i40e_hmc_obj_txq tx_ctx;
2821 i40e_status err = 0;
2822 u32 qtx_ctl = 0;
2823
2824 /* some ATR related tx ring init */
2825 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2826 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2827 ring->atr_count = 0;
2828 } else {
2829 ring->atr_sample_rate = 0;
2830 }
2831
2832 /* configure XPS */
2833 i40e_config_xps_tx_ring(ring);
2834
2835 /* clear the context structure first */
2836 memset(&tx_ctx, 0, sizeof(tx_ctx));
2837
2838 tx_ctx.new_context = 1;
2839 tx_ctx.base = (ring->dma / 128);
2840 tx_ctx.qlen = ring->count;
2841 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2842 I40E_FLAG_FD_ATR_ENABLED));
2843 #ifdef I40E_FCOE
2844 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2845 #endif
2846 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2847 /* FDIR VSI tx ring can still use RS bit and writebacks */
2848 if (vsi->type != I40E_VSI_FDIR)
2849 tx_ctx.head_wb_ena = 1;
2850 tx_ctx.head_wb_addr = ring->dma +
2851 (ring->count * sizeof(struct i40e_tx_desc));
2852
2853 /* As part of VSI creation/update, FW allocates certain
2854 * Tx arbitration queue sets for each TC enabled for
2855 * the VSI. The FW returns the handles to these queue
2856 * sets as part of the response buffer to Add VSI,
2857 * Update VSI, etc. AQ commands. It is expected that
2858 * these queue set handles be associated with the Tx
2859 * queues by the driver as part of the TX queue context
2860 * initialization. This has to be done regardless of
2861 * DCB as by default everything is mapped to TC0.
2862 */
2863 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2864 tx_ctx.rdylist_act = 0;
2865
2866 /* clear the context in the HMC */
2867 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2868 if (err) {
2869 dev_info(&vsi->back->pdev->dev,
2870 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2871 ring->queue_index, pf_q, err);
2872 return -ENOMEM;
2873 }
2874
2875 /* set the context in the HMC */
2876 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2877 if (err) {
2878 dev_info(&vsi->back->pdev->dev,
2879 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2880 ring->queue_index, pf_q, err);
2881 return -ENOMEM;
2882 }
2883
2884 /* Now associate this queue with this PCI function */
2885 if (vsi->type == I40E_VSI_VMDQ2) {
2886 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2887 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2888 I40E_QTX_CTL_VFVM_INDX_MASK;
2889 } else {
2890 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2891 }
2892
2893 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2894 I40E_QTX_CTL_PF_INDX_MASK);
2895 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2896 i40e_flush(hw);
2897
2898 /* cache tail off for easier writes later */
2899 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2900
2901 return 0;
2902 }
2903
2904 /**
2905 * i40e_configure_rx_ring - Configure a receive ring context
2906 * @ring: The Rx ring to configure
2907 *
2908 * Configure the Rx descriptor ring in the HMC context.
2909 **/
2910 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2911 {
2912 struct i40e_vsi *vsi = ring->vsi;
2913 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2914 u16 pf_q = vsi->base_queue + ring->queue_index;
2915 struct i40e_hw *hw = &vsi->back->hw;
2916 struct i40e_hmc_obj_rxq rx_ctx;
2917 i40e_status err = 0;
2918
2919 ring->state = 0;
2920
2921 /* clear the context structure first */
2922 memset(&rx_ctx, 0, sizeof(rx_ctx));
2923
2924 ring->rx_buf_len = vsi->rx_buf_len;
2925
2926 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2927
2928 rx_ctx.base = (ring->dma / 128);
2929 rx_ctx.qlen = ring->count;
2930
2931 /* use 32 byte descriptors */
2932 rx_ctx.dsize = 1;
2933
2934 /* descriptor type is always zero
2935 * rx_ctx.dtype = 0;
2936 */
2937 rx_ctx.hsplit_0 = 0;
2938
2939 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
2940 if (hw->revision_id == 0)
2941 rx_ctx.lrxqthresh = 0;
2942 else
2943 rx_ctx.lrxqthresh = 2;
2944 rx_ctx.crcstrip = 1;
2945 rx_ctx.l2tsel = 1;
2946 /* this controls whether VLAN is stripped from inner headers */
2947 rx_ctx.showiv = 0;
2948 #ifdef I40E_FCOE
2949 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2950 #endif
2951 /* set the prefena field to 1 because the manual says to */
2952 rx_ctx.prefena = 1;
2953
2954 /* clear the context in the HMC */
2955 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2956 if (err) {
2957 dev_info(&vsi->back->pdev->dev,
2958 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2959 ring->queue_index, pf_q, err);
2960 return -ENOMEM;
2961 }
2962
2963 /* set the context in the HMC */
2964 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2965 if (err) {
2966 dev_info(&vsi->back->pdev->dev,
2967 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2968 ring->queue_index, pf_q, err);
2969 return -ENOMEM;
2970 }
2971
2972 /* cache tail for quicker writes, and clear the reg before use */
2973 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2974 writel(0, ring->tail);
2975
2976 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2977
2978 return 0;
2979 }
2980
2981 /**
2982 * i40e_vsi_configure_tx - Configure the VSI for Tx
2983 * @vsi: VSI structure describing this set of rings and resources
2984 *
2985 * Configure the Tx VSI for operation.
2986 **/
2987 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2988 {
2989 int err = 0;
2990 u16 i;
2991
2992 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2993 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2994
2995 return err;
2996 }
2997
2998 /**
2999 * i40e_vsi_configure_rx - Configure the VSI for Rx
3000 * @vsi: the VSI being configured
3001 *
3002 * Configure the Rx VSI for operation.
3003 **/
3004 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3005 {
3006 int err = 0;
3007 u16 i;
3008
3009 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
3010 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
3011 + ETH_FCS_LEN + VLAN_HLEN;
3012 else
3013 vsi->max_frame = I40E_RXBUFFER_2048;
3014
3015 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3016
3017 #ifdef I40E_FCOE
3018 /* setup rx buffer for FCoE */
3019 if ((vsi->type == I40E_VSI_FCOE) &&
3020 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
3021 vsi->rx_buf_len = I40E_RXBUFFER_3072;
3022 vsi->max_frame = I40E_RXBUFFER_3072;
3023 }
3024
3025 #endif /* I40E_FCOE */
3026 /* round up for the chip's needs */
3027 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3028 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3029
3030 /* set up individual rings */
3031 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3032 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3033
3034 return err;
3035 }
3036
3037 /**
3038 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3039 * @vsi: ptr to the VSI
3040 **/
3041 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3042 {
3043 struct i40e_ring *tx_ring, *rx_ring;
3044 u16 qoffset, qcount;
3045 int i, n;
3046
3047 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3048 /* Reset the TC information */
3049 for (i = 0; i < vsi->num_queue_pairs; i++) {
3050 rx_ring = vsi->rx_rings[i];
3051 tx_ring = vsi->tx_rings[i];
3052 rx_ring->dcb_tc = 0;
3053 tx_ring->dcb_tc = 0;
3054 }
3055 }
3056
3057 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3058 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3059 continue;
3060
3061 qoffset = vsi->tc_config.tc_info[n].qoffset;
3062 qcount = vsi->tc_config.tc_info[n].qcount;
3063 for (i = qoffset; i < (qoffset + qcount); i++) {
3064 rx_ring = vsi->rx_rings[i];
3065 tx_ring = vsi->tx_rings[i];
3066 rx_ring->dcb_tc = n;
3067 tx_ring->dcb_tc = n;
3068 }
3069 }
3070 }
3071
3072 /**
3073 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3074 * @vsi: ptr to the VSI
3075 **/
3076 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3077 {
3078 struct i40e_pf *pf = vsi->back;
3079 int err;
3080
3081 if (vsi->netdev)
3082 i40e_set_rx_mode(vsi->netdev);
3083
3084 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3085 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3086 if (err) {
3087 dev_warn(&pf->pdev->dev,
3088 "could not set up macaddr; err %d\n", err);
3089 }
3090 }
3091 }
3092
3093 /**
3094 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3095 * @vsi: Pointer to the targeted VSI
3096 *
3097 * This function replays the hlist on the hw where all the SB Flow Director
3098 * filters were saved.
3099 **/
3100 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3101 {
3102 struct i40e_fdir_filter *filter;
3103 struct i40e_pf *pf = vsi->back;
3104 struct hlist_node *node;
3105
3106 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3107 return;
3108
3109 hlist_for_each_entry_safe(filter, node,
3110 &pf->fdir_filter_list, fdir_node) {
3111 i40e_add_del_fdir(vsi, filter, true);
3112 }
3113 }
3114
3115 /**
3116 * i40e_vsi_configure - Set up the VSI for action
3117 * @vsi: the VSI being configured
3118 **/
3119 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3120 {
3121 int err;
3122
3123 i40e_set_vsi_rx_mode(vsi);
3124 i40e_restore_vlan(vsi);
3125 i40e_vsi_config_dcb_rings(vsi);
3126 err = i40e_vsi_configure_tx(vsi);
3127 if (!err)
3128 err = i40e_vsi_configure_rx(vsi);
3129
3130 return err;
3131 }
3132
3133 /**
3134 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3135 * @vsi: the VSI being configured
3136 **/
3137 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3138 {
3139 struct i40e_pf *pf = vsi->back;
3140 struct i40e_hw *hw = &pf->hw;
3141 u16 vector;
3142 int i, q;
3143 u32 qp;
3144
3145 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3146 * and PFINT_LNKLSTn registers, e.g.:
3147 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3148 */
3149 qp = vsi->base_queue;
3150 vector = vsi->base_vector;
3151 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3152 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3153
3154 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3155 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3156 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3157 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3158 q_vector->rx.itr);
3159 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3160 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3161 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3162 q_vector->tx.itr);
3163 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3164 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3165
3166 /* Linked list for the queuepairs assigned to this vector */
3167 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3168 for (q = 0; q < q_vector->num_ringpairs; q++) {
3169 u32 val;
3170
3171 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3172 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3173 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3174 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3175 (I40E_QUEUE_TYPE_TX
3176 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3177
3178 wr32(hw, I40E_QINT_RQCTL(qp), val);
3179
3180 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3181 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3182 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3183 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3184 (I40E_QUEUE_TYPE_RX
3185 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3186
3187 /* Terminate the linked list */
3188 if (q == (q_vector->num_ringpairs - 1))
3189 val |= (I40E_QUEUE_END_OF_LIST
3190 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3191
3192 wr32(hw, I40E_QINT_TQCTL(qp), val);
3193 qp++;
3194 }
3195 }
3196
3197 i40e_flush(hw);
3198 }
3199
3200 /**
3201 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3202 * @hw: ptr to the hardware info
3203 **/
3204 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3205 {
3206 struct i40e_hw *hw = &pf->hw;
3207 u32 val;
3208
3209 /* clear things first */
3210 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3211 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3212
3213 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3214 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3215 I40E_PFINT_ICR0_ENA_GRST_MASK |
3216 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3217 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3218 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3219 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3220 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3221
3222 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3223 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3224
3225 if (pf->flags & I40E_FLAG_PTP)
3226 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3227
3228 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3229
3230 /* SW_ITR_IDX = 0, but don't change INTENA */
3231 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3232 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3233
3234 /* OTHER_ITR_IDX = 0 */
3235 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3236 }
3237
3238 /**
3239 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3240 * @vsi: the VSI being configured
3241 **/
3242 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3243 {
3244 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3245 struct i40e_pf *pf = vsi->back;
3246 struct i40e_hw *hw = &pf->hw;
3247 u32 val;
3248
3249 /* set the ITR configuration */
3250 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3251 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3252 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3253 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3254 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3255 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3256 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3257
3258 i40e_enable_misc_int_causes(pf);
3259
3260 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3261 wr32(hw, I40E_PFINT_LNKLST0, 0);
3262
3263 /* Associate the queue pair to the vector and enable the queue int */
3264 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3265 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3266 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3267
3268 wr32(hw, I40E_QINT_RQCTL(0), val);
3269
3270 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3271 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3272 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3273
3274 wr32(hw, I40E_QINT_TQCTL(0), val);
3275 i40e_flush(hw);
3276 }
3277
3278 /**
3279 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3280 * @pf: board private structure
3281 **/
3282 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3283 {
3284 struct i40e_hw *hw = &pf->hw;
3285
3286 wr32(hw, I40E_PFINT_DYN_CTL0,
3287 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3288 i40e_flush(hw);
3289 }
3290
3291 /**
3292 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3293 * @pf: board private structure
3294 * @clearpba: true when all pending interrupt events should be cleared
3295 **/
3296 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3297 {
3298 struct i40e_hw *hw = &pf->hw;
3299 u32 val;
3300
3301 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3302 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3303 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3304
3305 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3306 i40e_flush(hw);
3307 }
3308
3309 /**
3310 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3311 * @irq: interrupt number
3312 * @data: pointer to a q_vector
3313 **/
3314 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3315 {
3316 struct i40e_q_vector *q_vector = data;
3317
3318 if (!q_vector->tx.ring && !q_vector->rx.ring)
3319 return IRQ_HANDLED;
3320
3321 napi_schedule_irqoff(&q_vector->napi);
3322
3323 return IRQ_HANDLED;
3324 }
3325
3326 /**
3327 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3328 * @vsi: the VSI being configured
3329 * @basename: name for the vector
3330 *
3331 * Allocates MSI-X vectors and requests interrupts from the kernel.
3332 **/
3333 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3334 {
3335 int q_vectors = vsi->num_q_vectors;
3336 struct i40e_pf *pf = vsi->back;
3337 int base = vsi->base_vector;
3338 int rx_int_idx = 0;
3339 int tx_int_idx = 0;
3340 int vector, err;
3341
3342 for (vector = 0; vector < q_vectors; vector++) {
3343 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3344
3345 if (q_vector->tx.ring && q_vector->rx.ring) {
3346 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3347 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3348 tx_int_idx++;
3349 } else if (q_vector->rx.ring) {
3350 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3351 "%s-%s-%d", basename, "rx", rx_int_idx++);
3352 } else if (q_vector->tx.ring) {
3353 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3354 "%s-%s-%d", basename, "tx", tx_int_idx++);
3355 } else {
3356 /* skip this unused q_vector */
3357 continue;
3358 }
3359 err = request_irq(pf->msix_entries[base + vector].vector,
3360 vsi->irq_handler,
3361 0,
3362 q_vector->name,
3363 q_vector);
3364 if (err) {
3365 dev_info(&pf->pdev->dev,
3366 "MSIX request_irq failed, error: %d\n", err);
3367 goto free_queue_irqs;
3368 }
3369 /* assign the mask for this irq */
3370 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3371 &q_vector->affinity_mask);
3372 }
3373
3374 vsi->irqs_ready = true;
3375 return 0;
3376
3377 free_queue_irqs:
3378 while (vector) {
3379 vector--;
3380 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3381 NULL);
3382 free_irq(pf->msix_entries[base + vector].vector,
3383 &(vsi->q_vectors[vector]));
3384 }
3385 return err;
3386 }
3387
3388 /**
3389 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3390 * @vsi: the VSI being un-configured
3391 **/
3392 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3393 {
3394 struct i40e_pf *pf = vsi->back;
3395 struct i40e_hw *hw = &pf->hw;
3396 int base = vsi->base_vector;
3397 int i;
3398
3399 for (i = 0; i < vsi->num_queue_pairs; i++) {
3400 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3401 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3402 }
3403
3404 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3405 for (i = vsi->base_vector;
3406 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3407 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3408
3409 i40e_flush(hw);
3410 for (i = 0; i < vsi->num_q_vectors; i++)
3411 synchronize_irq(pf->msix_entries[i + base].vector);
3412 } else {
3413 /* Legacy and MSI mode - this stops all interrupt handling */
3414 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3415 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3416 i40e_flush(hw);
3417 synchronize_irq(pf->pdev->irq);
3418 }
3419 }
3420
3421 /**
3422 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3423 * @vsi: the VSI being configured
3424 **/
3425 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3426 {
3427 struct i40e_pf *pf = vsi->back;
3428 int i;
3429
3430 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3431 for (i = 0; i < vsi->num_q_vectors; i++)
3432 i40e_irq_dynamic_enable(vsi, i);
3433 } else {
3434 i40e_irq_dynamic_enable_icr0(pf, true);
3435 }
3436
3437 i40e_flush(&pf->hw);
3438 return 0;
3439 }
3440
3441 /**
3442 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3443 * @pf: board private structure
3444 **/
3445 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3446 {
3447 /* Disable ICR 0 */
3448 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3449 i40e_flush(&pf->hw);
3450 }
3451
3452 /**
3453 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3454 * @irq: interrupt number
3455 * @data: pointer to a q_vector
3456 *
3457 * This is the handler used for all MSI/Legacy interrupts, and deals
3458 * with both queue and non-queue interrupts. This is also used in
3459 * MSIX mode to handle the non-queue interrupts.
3460 **/
3461 static irqreturn_t i40e_intr(int irq, void *data)
3462 {
3463 struct i40e_pf *pf = (struct i40e_pf *)data;
3464 struct i40e_hw *hw = &pf->hw;
3465 irqreturn_t ret = IRQ_NONE;
3466 u32 icr0, icr0_remaining;
3467 u32 val, ena_mask;
3468
3469 icr0 = rd32(hw, I40E_PFINT_ICR0);
3470 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3471
3472 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3473 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3474 goto enable_intr;
3475
3476 /* if interrupt but no bits showing, must be SWINT */
3477 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3478 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3479 pf->sw_int_count++;
3480
3481 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3482 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3483 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3484 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3485 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3486 }
3487
3488 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3489 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3490 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3491 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3492
3493 /* We do not have a way to disarm Queue causes while leaving
3494 * interrupt enabled for all other causes, ideally
3495 * interrupt should be disabled while we are in NAPI but
3496 * this is not a performance path and napi_schedule()
3497 * can deal with rescheduling.
3498 */
3499 if (!test_bit(__I40E_DOWN, &pf->state))
3500 napi_schedule_irqoff(&q_vector->napi);
3501 }
3502
3503 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3504 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3505 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3506 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3507 }
3508
3509 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3510 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3511 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3512 }
3513
3514 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3515 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3516 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3517 }
3518
3519 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3520 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3521 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3522 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3523 val = rd32(hw, I40E_GLGEN_RSTAT);
3524 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3525 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3526 if (val == I40E_RESET_CORER) {
3527 pf->corer_count++;
3528 } else if (val == I40E_RESET_GLOBR) {
3529 pf->globr_count++;
3530 } else if (val == I40E_RESET_EMPR) {
3531 pf->empr_count++;
3532 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3533 }
3534 }
3535
3536 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3537 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3538 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3539 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3540 rd32(hw, I40E_PFHMC_ERRORINFO),
3541 rd32(hw, I40E_PFHMC_ERRORDATA));
3542 }
3543
3544 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3545 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3546
3547 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3548 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3549 i40e_ptp_tx_hwtstamp(pf);
3550 }
3551 }
3552
3553 /* If a critical error is pending we have no choice but to reset the
3554 * device.
3555 * Report and mask out any remaining unexpected interrupts.
3556 */
3557 icr0_remaining = icr0 & ena_mask;
3558 if (icr0_remaining) {
3559 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3560 icr0_remaining);
3561 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3562 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3563 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3564 dev_info(&pf->pdev->dev, "device will be reset\n");
3565 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3566 i40e_service_event_schedule(pf);
3567 }
3568 ena_mask &= ~icr0_remaining;
3569 }
3570 ret = IRQ_HANDLED;
3571
3572 enable_intr:
3573 /* re-enable interrupt causes */
3574 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3575 if (!test_bit(__I40E_DOWN, &pf->state)) {
3576 i40e_service_event_schedule(pf);
3577 i40e_irq_dynamic_enable_icr0(pf, false);
3578 }
3579
3580 return ret;
3581 }
3582
3583 /**
3584 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3585 * @tx_ring: tx ring to clean
3586 * @budget: how many cleans we're allowed
3587 *
3588 * Returns true if there's any budget left (e.g. the clean is finished)
3589 **/
3590 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3591 {
3592 struct i40e_vsi *vsi = tx_ring->vsi;
3593 u16 i = tx_ring->next_to_clean;
3594 struct i40e_tx_buffer *tx_buf;
3595 struct i40e_tx_desc *tx_desc;
3596
3597 tx_buf = &tx_ring->tx_bi[i];
3598 tx_desc = I40E_TX_DESC(tx_ring, i);
3599 i -= tx_ring->count;
3600
3601 do {
3602 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3603
3604 /* if next_to_watch is not set then there is no work pending */
3605 if (!eop_desc)
3606 break;
3607
3608 /* prevent any other reads prior to eop_desc */
3609 read_barrier_depends();
3610
3611 /* if the descriptor isn't done, no work yet to do */
3612 if (!(eop_desc->cmd_type_offset_bsz &
3613 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3614 break;
3615
3616 /* clear next_to_watch to prevent false hangs */
3617 tx_buf->next_to_watch = NULL;
3618
3619 tx_desc->buffer_addr = 0;
3620 tx_desc->cmd_type_offset_bsz = 0;
3621 /* move past filter desc */
3622 tx_buf++;
3623 tx_desc++;
3624 i++;
3625 if (unlikely(!i)) {
3626 i -= tx_ring->count;
3627 tx_buf = tx_ring->tx_bi;
3628 tx_desc = I40E_TX_DESC(tx_ring, 0);
3629 }
3630 /* unmap skb header data */
3631 dma_unmap_single(tx_ring->dev,
3632 dma_unmap_addr(tx_buf, dma),
3633 dma_unmap_len(tx_buf, len),
3634 DMA_TO_DEVICE);
3635 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3636 kfree(tx_buf->raw_buf);
3637
3638 tx_buf->raw_buf = NULL;
3639 tx_buf->tx_flags = 0;
3640 tx_buf->next_to_watch = NULL;
3641 dma_unmap_len_set(tx_buf, len, 0);
3642 tx_desc->buffer_addr = 0;
3643 tx_desc->cmd_type_offset_bsz = 0;
3644
3645 /* move us past the eop_desc for start of next FD desc */
3646 tx_buf++;
3647 tx_desc++;
3648 i++;
3649 if (unlikely(!i)) {
3650 i -= tx_ring->count;
3651 tx_buf = tx_ring->tx_bi;
3652 tx_desc = I40E_TX_DESC(tx_ring, 0);
3653 }
3654
3655 /* update budget accounting */
3656 budget--;
3657 } while (likely(budget));
3658
3659 i += tx_ring->count;
3660 tx_ring->next_to_clean = i;
3661
3662 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3663 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3664
3665 return budget > 0;
3666 }
3667
3668 /**
3669 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3670 * @irq: interrupt number
3671 * @data: pointer to a q_vector
3672 **/
3673 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3674 {
3675 struct i40e_q_vector *q_vector = data;
3676 struct i40e_vsi *vsi;
3677
3678 if (!q_vector->tx.ring)
3679 return IRQ_HANDLED;
3680
3681 vsi = q_vector->tx.ring->vsi;
3682 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3683
3684 return IRQ_HANDLED;
3685 }
3686
3687 /**
3688 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3689 * @vsi: the VSI being configured
3690 * @v_idx: vector index
3691 * @qp_idx: queue pair index
3692 **/
3693 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3694 {
3695 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3696 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3697 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3698
3699 tx_ring->q_vector = q_vector;
3700 tx_ring->next = q_vector->tx.ring;
3701 q_vector->tx.ring = tx_ring;
3702 q_vector->tx.count++;
3703
3704 rx_ring->q_vector = q_vector;
3705 rx_ring->next = q_vector->rx.ring;
3706 q_vector->rx.ring = rx_ring;
3707 q_vector->rx.count++;
3708 }
3709
3710 /**
3711 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3712 * @vsi: the VSI being configured
3713 *
3714 * This function maps descriptor rings to the queue-specific vectors
3715 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3716 * one vector per queue pair, but on a constrained vector budget, we
3717 * group the queue pairs as "efficiently" as possible.
3718 **/
3719 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3720 {
3721 int qp_remaining = vsi->num_queue_pairs;
3722 int q_vectors = vsi->num_q_vectors;
3723 int num_ringpairs;
3724 int v_start = 0;
3725 int qp_idx = 0;
3726
3727 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3728 * group them so there are multiple queues per vector.
3729 * It is also important to go through all the vectors available to be
3730 * sure that if we don't use all the vectors, that the remaining vectors
3731 * are cleared. This is especially important when decreasing the
3732 * number of queues in use.
3733 */
3734 for (; v_start < q_vectors; v_start++) {
3735 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3736
3737 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3738
3739 q_vector->num_ringpairs = num_ringpairs;
3740
3741 q_vector->rx.count = 0;
3742 q_vector->tx.count = 0;
3743 q_vector->rx.ring = NULL;
3744 q_vector->tx.ring = NULL;
3745
3746 while (num_ringpairs--) {
3747 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3748 qp_idx++;
3749 qp_remaining--;
3750 }
3751 }
3752 }
3753
3754 /**
3755 * i40e_vsi_request_irq - Request IRQ from the OS
3756 * @vsi: the VSI being configured
3757 * @basename: name for the vector
3758 **/
3759 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3760 {
3761 struct i40e_pf *pf = vsi->back;
3762 int err;
3763
3764 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3765 err = i40e_vsi_request_irq_msix(vsi, basename);
3766 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3767 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3768 pf->int_name, pf);
3769 else
3770 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3771 pf->int_name, pf);
3772
3773 if (err)
3774 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3775
3776 return err;
3777 }
3778
3779 #ifdef CONFIG_NET_POLL_CONTROLLER
3780 /**
3781 * i40e_netpoll - A Polling 'interrupt' handler
3782 * @netdev: network interface device structure
3783 *
3784 * This is used by netconsole to send skbs without having to re-enable
3785 * interrupts. It's not called while the normal interrupt routine is executing.
3786 **/
3787 #ifdef I40E_FCOE
3788 void i40e_netpoll(struct net_device *netdev)
3789 #else
3790 static void i40e_netpoll(struct net_device *netdev)
3791 #endif
3792 {
3793 struct i40e_netdev_priv *np = netdev_priv(netdev);
3794 struct i40e_vsi *vsi = np->vsi;
3795 struct i40e_pf *pf = vsi->back;
3796 int i;
3797
3798 /* if interface is down do nothing */
3799 if (test_bit(__I40E_DOWN, &vsi->state))
3800 return;
3801
3802 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3803 for (i = 0; i < vsi->num_q_vectors; i++)
3804 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3805 } else {
3806 i40e_intr(pf->pdev->irq, netdev);
3807 }
3808 }
3809 #endif
3810
3811 /**
3812 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3813 * @pf: the PF being configured
3814 * @pf_q: the PF queue
3815 * @enable: enable or disable state of the queue
3816 *
3817 * This routine will wait for the given Tx queue of the PF to reach the
3818 * enabled or disabled state.
3819 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3820 * multiple retries; else will return 0 in case of success.
3821 **/
3822 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3823 {
3824 int i;
3825 u32 tx_reg;
3826
3827 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3828 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3829 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3830 break;
3831
3832 usleep_range(10, 20);
3833 }
3834 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3835 return -ETIMEDOUT;
3836
3837 return 0;
3838 }
3839
3840 /**
3841 * i40e_vsi_control_tx - Start or stop a VSI's rings
3842 * @vsi: the VSI being configured
3843 * @enable: start or stop the rings
3844 **/
3845 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3846 {
3847 struct i40e_pf *pf = vsi->back;
3848 struct i40e_hw *hw = &pf->hw;
3849 int i, j, pf_q, ret = 0;
3850 u32 tx_reg;
3851
3852 pf_q = vsi->base_queue;
3853 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3854
3855 /* warn the TX unit of coming changes */
3856 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3857 if (!enable)
3858 usleep_range(10, 20);
3859
3860 for (j = 0; j < 50; j++) {
3861 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3862 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3863 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3864 break;
3865 usleep_range(1000, 2000);
3866 }
3867 /* Skip if the queue is already in the requested state */
3868 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3869 continue;
3870
3871 /* turn on/off the queue */
3872 if (enable) {
3873 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3874 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3875 } else {
3876 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3877 }
3878
3879 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3880 /* No waiting for the Tx queue to disable */
3881 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3882 continue;
3883
3884 /* wait for the change to finish */
3885 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3886 if (ret) {
3887 dev_info(&pf->pdev->dev,
3888 "VSI seid %d Tx ring %d %sable timeout\n",
3889 vsi->seid, pf_q, (enable ? "en" : "dis"));
3890 break;
3891 }
3892 }
3893
3894 if (hw->revision_id == 0)
3895 mdelay(50);
3896 return ret;
3897 }
3898
3899 /**
3900 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3901 * @pf: the PF being configured
3902 * @pf_q: the PF queue
3903 * @enable: enable or disable state of the queue
3904 *
3905 * This routine will wait for the given Rx queue of the PF to reach the
3906 * enabled or disabled state.
3907 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3908 * multiple retries; else will return 0 in case of success.
3909 **/
3910 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3911 {
3912 int i;
3913 u32 rx_reg;
3914
3915 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3916 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3917 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3918 break;
3919
3920 usleep_range(10, 20);
3921 }
3922 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3923 return -ETIMEDOUT;
3924
3925 return 0;
3926 }
3927
3928 /**
3929 * i40e_vsi_control_rx - Start or stop a VSI's rings
3930 * @vsi: the VSI being configured
3931 * @enable: start or stop the rings
3932 **/
3933 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3934 {
3935 struct i40e_pf *pf = vsi->back;
3936 struct i40e_hw *hw = &pf->hw;
3937 int i, j, pf_q, ret = 0;
3938 u32 rx_reg;
3939
3940 pf_q = vsi->base_queue;
3941 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3942 for (j = 0; j < 50; j++) {
3943 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3944 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3945 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3946 break;
3947 usleep_range(1000, 2000);
3948 }
3949
3950 /* Skip if the queue is already in the requested state */
3951 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3952 continue;
3953
3954 /* turn on/off the queue */
3955 if (enable)
3956 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3957 else
3958 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3959 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3960 /* No waiting for the Tx queue to disable */
3961 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3962 continue;
3963
3964 /* wait for the change to finish */
3965 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3966 if (ret) {
3967 dev_info(&pf->pdev->dev,
3968 "VSI seid %d Rx ring %d %sable timeout\n",
3969 vsi->seid, pf_q, (enable ? "en" : "dis"));
3970 break;
3971 }
3972 }
3973
3974 return ret;
3975 }
3976
3977 /**
3978 * i40e_vsi_control_rings - Start or stop a VSI's rings
3979 * @vsi: the VSI being configured
3980 * @enable: start or stop the rings
3981 **/
3982 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3983 {
3984 int ret = 0;
3985
3986 /* do rx first for enable and last for disable */
3987 if (request) {
3988 ret = i40e_vsi_control_rx(vsi, request);
3989 if (ret)
3990 return ret;
3991 ret = i40e_vsi_control_tx(vsi, request);
3992 } else {
3993 /* Ignore return value, we need to shutdown whatever we can */
3994 i40e_vsi_control_tx(vsi, request);
3995 i40e_vsi_control_rx(vsi, request);
3996 }
3997
3998 return ret;
3999 }
4000
4001 /**
4002 * i40e_vsi_free_irq - Free the irq association with the OS
4003 * @vsi: the VSI being configured
4004 **/
4005 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4006 {
4007 struct i40e_pf *pf = vsi->back;
4008 struct i40e_hw *hw = &pf->hw;
4009 int base = vsi->base_vector;
4010 u32 val, qp;
4011 int i;
4012
4013 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4014 if (!vsi->q_vectors)
4015 return;
4016
4017 if (!vsi->irqs_ready)
4018 return;
4019
4020 vsi->irqs_ready = false;
4021 for (i = 0; i < vsi->num_q_vectors; i++) {
4022 u16 vector = i + base;
4023
4024 /* free only the irqs that were actually requested */
4025 if (!vsi->q_vectors[i] ||
4026 !vsi->q_vectors[i]->num_ringpairs)
4027 continue;
4028
4029 /* clear the affinity_mask in the IRQ descriptor */
4030 irq_set_affinity_hint(pf->msix_entries[vector].vector,
4031 NULL);
4032 synchronize_irq(pf->msix_entries[vector].vector);
4033 free_irq(pf->msix_entries[vector].vector,
4034 vsi->q_vectors[i]);
4035
4036 /* Tear down the interrupt queue link list
4037 *
4038 * We know that they come in pairs and always
4039 * the Rx first, then the Tx. To clear the
4040 * link list, stick the EOL value into the
4041 * next_q field of the registers.
4042 */
4043 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4044 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4045 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4046 val |= I40E_QUEUE_END_OF_LIST
4047 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4048 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4049
4050 while (qp != I40E_QUEUE_END_OF_LIST) {
4051 u32 next;
4052
4053 val = rd32(hw, I40E_QINT_RQCTL(qp));
4054
4055 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4056 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4057 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4058 I40E_QINT_RQCTL_INTEVENT_MASK);
4059
4060 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4061 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4062
4063 wr32(hw, I40E_QINT_RQCTL(qp), val);
4064
4065 val = rd32(hw, I40E_QINT_TQCTL(qp));
4066
4067 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4068 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4069
4070 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4071 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4072 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4073 I40E_QINT_TQCTL_INTEVENT_MASK);
4074
4075 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4076 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4077
4078 wr32(hw, I40E_QINT_TQCTL(qp), val);
4079 qp = next;
4080 }
4081 }
4082 } else {
4083 free_irq(pf->pdev->irq, pf);
4084
4085 val = rd32(hw, I40E_PFINT_LNKLST0);
4086 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4087 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4088 val |= I40E_QUEUE_END_OF_LIST
4089 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4090 wr32(hw, I40E_PFINT_LNKLST0, val);
4091
4092 val = rd32(hw, I40E_QINT_RQCTL(qp));
4093 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4094 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4095 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4096 I40E_QINT_RQCTL_INTEVENT_MASK);
4097
4098 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4099 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4100
4101 wr32(hw, I40E_QINT_RQCTL(qp), val);
4102
4103 val = rd32(hw, I40E_QINT_TQCTL(qp));
4104
4105 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4106 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4107 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4108 I40E_QINT_TQCTL_INTEVENT_MASK);
4109
4110 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4111 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4112
4113 wr32(hw, I40E_QINT_TQCTL(qp), val);
4114 }
4115 }
4116
4117 /**
4118 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4119 * @vsi: the VSI being configured
4120 * @v_idx: Index of vector to be freed
4121 *
4122 * This function frees the memory allocated to the q_vector. In addition if
4123 * NAPI is enabled it will delete any references to the NAPI struct prior
4124 * to freeing the q_vector.
4125 **/
4126 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4127 {
4128 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4129 struct i40e_ring *ring;
4130
4131 if (!q_vector)
4132 return;
4133
4134 /* disassociate q_vector from rings */
4135 i40e_for_each_ring(ring, q_vector->tx)
4136 ring->q_vector = NULL;
4137
4138 i40e_for_each_ring(ring, q_vector->rx)
4139 ring->q_vector = NULL;
4140
4141 /* only VSI w/ an associated netdev is set up w/ NAPI */
4142 if (vsi->netdev)
4143 netif_napi_del(&q_vector->napi);
4144
4145 vsi->q_vectors[v_idx] = NULL;
4146
4147 kfree_rcu(q_vector, rcu);
4148 }
4149
4150 /**
4151 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4152 * @vsi: the VSI being un-configured
4153 *
4154 * This frees the memory allocated to the q_vectors and
4155 * deletes references to the NAPI struct.
4156 **/
4157 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4158 {
4159 int v_idx;
4160
4161 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4162 i40e_free_q_vector(vsi, v_idx);
4163 }
4164
4165 /**
4166 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4167 * @pf: board private structure
4168 **/
4169 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4170 {
4171 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4172 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4173 pci_disable_msix(pf->pdev);
4174 kfree(pf->msix_entries);
4175 pf->msix_entries = NULL;
4176 kfree(pf->irq_pile);
4177 pf->irq_pile = NULL;
4178 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4179 pci_disable_msi(pf->pdev);
4180 }
4181 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4182 }
4183
4184 /**
4185 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4186 * @pf: board private structure
4187 *
4188 * We go through and clear interrupt specific resources and reset the structure
4189 * to pre-load conditions
4190 **/
4191 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4192 {
4193 int i;
4194
4195 i40e_stop_misc_vector(pf);
4196 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4197 synchronize_irq(pf->msix_entries[0].vector);
4198 free_irq(pf->msix_entries[0].vector, pf);
4199 }
4200
4201 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4202 I40E_IWARP_IRQ_PILE_ID);
4203
4204 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4205 for (i = 0; i < pf->num_alloc_vsi; i++)
4206 if (pf->vsi[i])
4207 i40e_vsi_free_q_vectors(pf->vsi[i]);
4208 i40e_reset_interrupt_capability(pf);
4209 }
4210
4211 /**
4212 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4213 * @vsi: the VSI being configured
4214 **/
4215 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4216 {
4217 int q_idx;
4218
4219 if (!vsi->netdev)
4220 return;
4221
4222 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4223 napi_enable(&vsi->q_vectors[q_idx]->napi);
4224 }
4225
4226 /**
4227 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4228 * @vsi: the VSI being configured
4229 **/
4230 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4231 {
4232 int q_idx;
4233
4234 if (!vsi->netdev)
4235 return;
4236
4237 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4238 napi_disable(&vsi->q_vectors[q_idx]->napi);
4239 }
4240
4241 /**
4242 * i40e_vsi_close - Shut down a VSI
4243 * @vsi: the vsi to be quelled
4244 **/
4245 static void i40e_vsi_close(struct i40e_vsi *vsi)
4246 {
4247 bool reset = false;
4248
4249 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4250 i40e_down(vsi);
4251 i40e_vsi_free_irq(vsi);
4252 i40e_vsi_free_tx_resources(vsi);
4253 i40e_vsi_free_rx_resources(vsi);
4254 vsi->current_netdev_flags = 0;
4255 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4256 reset = true;
4257 i40e_notify_client_of_netdev_close(vsi, reset);
4258 }
4259
4260 /**
4261 * i40e_quiesce_vsi - Pause a given VSI
4262 * @vsi: the VSI being paused
4263 **/
4264 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4265 {
4266 if (test_bit(__I40E_DOWN, &vsi->state))
4267 return;
4268
4269 /* No need to disable FCoE VSI when Tx suspended */
4270 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4271 vsi->type == I40E_VSI_FCOE) {
4272 dev_dbg(&vsi->back->pdev->dev,
4273 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4274 return;
4275 }
4276
4277 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4278 if (vsi->netdev && netif_running(vsi->netdev))
4279 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4280 else
4281 i40e_vsi_close(vsi);
4282 }
4283
4284 /**
4285 * i40e_unquiesce_vsi - Resume a given VSI
4286 * @vsi: the VSI being resumed
4287 **/
4288 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4289 {
4290 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4291 return;
4292
4293 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4294 if (vsi->netdev && netif_running(vsi->netdev))
4295 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4296 else
4297 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4298 }
4299
4300 /**
4301 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4302 * @pf: the PF
4303 **/
4304 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4305 {
4306 int v;
4307
4308 for (v = 0; v < pf->num_alloc_vsi; v++) {
4309 if (pf->vsi[v])
4310 i40e_quiesce_vsi(pf->vsi[v]);
4311 }
4312 }
4313
4314 /**
4315 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4316 * @pf: the PF
4317 **/
4318 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4319 {
4320 int v;
4321
4322 for (v = 0; v < pf->num_alloc_vsi; v++) {
4323 if (pf->vsi[v])
4324 i40e_unquiesce_vsi(pf->vsi[v]);
4325 }
4326 }
4327
4328 #ifdef CONFIG_I40E_DCB
4329 /**
4330 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4331 * @vsi: the VSI being configured
4332 *
4333 * This function waits for the given VSI's queues to be disabled.
4334 **/
4335 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4336 {
4337 struct i40e_pf *pf = vsi->back;
4338 int i, pf_q, ret;
4339
4340 pf_q = vsi->base_queue;
4341 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4342 /* Check and wait for the disable status of the queue */
4343 ret = i40e_pf_txq_wait(pf, pf_q, false);
4344 if (ret) {
4345 dev_info(&pf->pdev->dev,
4346 "VSI seid %d Tx ring %d disable timeout\n",
4347 vsi->seid, pf_q);
4348 return ret;
4349 }
4350 }
4351
4352 pf_q = vsi->base_queue;
4353 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4354 /* Check and wait for the disable status of the queue */
4355 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4356 if (ret) {
4357 dev_info(&pf->pdev->dev,
4358 "VSI seid %d Rx ring %d disable timeout\n",
4359 vsi->seid, pf_q);
4360 return ret;
4361 }
4362 }
4363
4364 return 0;
4365 }
4366
4367 /**
4368 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4369 * @pf: the PF
4370 *
4371 * This function waits for the queues to be in disabled state for all the
4372 * VSIs that are managed by this PF.
4373 **/
4374 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4375 {
4376 int v, ret = 0;
4377
4378 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4379 /* No need to wait for FCoE VSI queues */
4380 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4381 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4382 if (ret)
4383 break;
4384 }
4385 }
4386
4387 return ret;
4388 }
4389
4390 #endif
4391
4392 /**
4393 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4394 * @q_idx: TX queue number
4395 * @vsi: Pointer to VSI struct
4396 *
4397 * This function checks specified queue for given VSI. Detects hung condition.
4398 * Sets hung bit since it is two step process. Before next run of service task
4399 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4400 * hung condition remain unchanged and during subsequent run, this function
4401 * issues SW interrupt to recover from hung condition.
4402 **/
4403 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4404 {
4405 struct i40e_ring *tx_ring = NULL;
4406 struct i40e_pf *pf;
4407 u32 head, val, tx_pending_hw;
4408 int i;
4409
4410 pf = vsi->back;
4411
4412 /* now that we have an index, find the tx_ring struct */
4413 for (i = 0; i < vsi->num_queue_pairs; i++) {
4414 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4415 if (q_idx == vsi->tx_rings[i]->queue_index) {
4416 tx_ring = vsi->tx_rings[i];
4417 break;
4418 }
4419 }
4420 }
4421
4422 if (!tx_ring)
4423 return;
4424
4425 /* Read interrupt register */
4426 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4427 val = rd32(&pf->hw,
4428 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4429 tx_ring->vsi->base_vector - 1));
4430 else
4431 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4432
4433 head = i40e_get_head(tx_ring);
4434
4435 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4436
4437 /* HW is done executing descriptors, updated HEAD write back,
4438 * but SW hasn't processed those descriptors. If interrupt is
4439 * not generated from this point ON, it could result into
4440 * dev_watchdog detecting timeout on those netdev_queue,
4441 * hence proactively trigger SW interrupt.
4442 */
4443 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4444 /* NAPI Poll didn't run and clear since it was set */
4445 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4446 &tx_ring->q_vector->hung_detected)) {
4447 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4448 vsi->seid, q_idx, tx_pending_hw,
4449 tx_ring->next_to_clean, head,
4450 tx_ring->next_to_use,
4451 readl(tx_ring->tail));
4452 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4453 vsi->seid, q_idx, val);
4454 i40e_force_wb(vsi, tx_ring->q_vector);
4455 } else {
4456 /* First Chance - detected possible hung */
4457 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4458 &tx_ring->q_vector->hung_detected);
4459 }
4460 }
4461
4462 /* This is the case where we have interrupts missing,
4463 * so the tx_pending in HW will most likely be 0, but we
4464 * will have tx_pending in SW since the WB happened but the
4465 * interrupt got lost.
4466 */
4467 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4468 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4469 if (napi_reschedule(&tx_ring->q_vector->napi))
4470 tx_ring->tx_stats.tx_lost_interrupt++;
4471 }
4472 }
4473
4474 /**
4475 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4476 * @pf: pointer to PF struct
4477 *
4478 * LAN VSI has netdev and netdev has TX queues. This function is to check
4479 * each of those TX queues if they are hung, trigger recovery by issuing
4480 * SW interrupt.
4481 **/
4482 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4483 {
4484 struct net_device *netdev;
4485 struct i40e_vsi *vsi;
4486 int i;
4487
4488 /* Only for LAN VSI */
4489 vsi = pf->vsi[pf->lan_vsi];
4490
4491 if (!vsi)
4492 return;
4493
4494 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4495 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4496 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4497 return;
4498
4499 /* Make sure type is MAIN VSI */
4500 if (vsi->type != I40E_VSI_MAIN)
4501 return;
4502
4503 netdev = vsi->netdev;
4504 if (!netdev)
4505 return;
4506
4507 /* Bail out if netif_carrier is not OK */
4508 if (!netif_carrier_ok(netdev))
4509 return;
4510
4511 /* Go thru' TX queues for netdev */
4512 for (i = 0; i < netdev->num_tx_queues; i++) {
4513 struct netdev_queue *q;
4514
4515 q = netdev_get_tx_queue(netdev, i);
4516 if (q)
4517 i40e_detect_recover_hung_queue(i, vsi);
4518 }
4519 }
4520
4521 /**
4522 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4523 * @pf: pointer to PF
4524 *
4525 * Get TC map for ISCSI PF type that will include iSCSI TC
4526 * and LAN TC.
4527 **/
4528 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4529 {
4530 struct i40e_dcb_app_priority_table app;
4531 struct i40e_hw *hw = &pf->hw;
4532 u8 enabled_tc = 1; /* TC0 is always enabled */
4533 u8 tc, i;
4534 /* Get the iSCSI APP TLV */
4535 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4536
4537 for (i = 0; i < dcbcfg->numapps; i++) {
4538 app = dcbcfg->app[i];
4539 if (app.selector == I40E_APP_SEL_TCPIP &&
4540 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4541 tc = dcbcfg->etscfg.prioritytable[app.priority];
4542 enabled_tc |= BIT(tc);
4543 break;
4544 }
4545 }
4546
4547 return enabled_tc;
4548 }
4549
4550 /**
4551 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4552 * @dcbcfg: the corresponding DCBx configuration structure
4553 *
4554 * Return the number of TCs from given DCBx configuration
4555 **/
4556 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4557 {
4558 int i, tc_unused = 0;
4559 u8 num_tc = 0;
4560 u8 ret = 0;
4561
4562 /* Scan the ETS Config Priority Table to find
4563 * traffic class enabled for a given priority
4564 * and create a bitmask of enabled TCs
4565 */
4566 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4567 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4568
4569 /* Now scan the bitmask to check for
4570 * contiguous TCs starting with TC0
4571 */
4572 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4573 if (num_tc & BIT(i)) {
4574 if (!tc_unused) {
4575 ret++;
4576 } else {
4577 pr_err("Non-contiguous TC - Disabling DCB\n");
4578 return 1;
4579 }
4580 } else {
4581 tc_unused = 1;
4582 }
4583 }
4584
4585 /* There is always at least TC0 */
4586 if (!ret)
4587 ret = 1;
4588
4589 return ret;
4590 }
4591
4592 /**
4593 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4594 * @dcbcfg: the corresponding DCBx configuration structure
4595 *
4596 * Query the current DCB configuration and return the number of
4597 * traffic classes enabled from the given DCBX config
4598 **/
4599 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4600 {
4601 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4602 u8 enabled_tc = 1;
4603 u8 i;
4604
4605 for (i = 0; i < num_tc; i++)
4606 enabled_tc |= BIT(i);
4607
4608 return enabled_tc;
4609 }
4610
4611 /**
4612 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4613 * @pf: PF being queried
4614 *
4615 * Return number of traffic classes enabled for the given PF
4616 **/
4617 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4618 {
4619 struct i40e_hw *hw = &pf->hw;
4620 u8 i, enabled_tc = 1;
4621 u8 num_tc = 0;
4622 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4623
4624 /* If DCB is not enabled then always in single TC */
4625 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4626 return 1;
4627
4628 /* SFP mode will be enabled for all TCs on port */
4629 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4630 return i40e_dcb_get_num_tc(dcbcfg);
4631
4632 /* MFP mode return count of enabled TCs for this PF */
4633 if (pf->hw.func_caps.iscsi)
4634 enabled_tc = i40e_get_iscsi_tc_map(pf);
4635 else
4636 return 1; /* Only TC0 */
4637
4638 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4639 if (enabled_tc & BIT(i))
4640 num_tc++;
4641 }
4642 return num_tc;
4643 }
4644
4645 /**
4646 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4647 * @pf: PF being queried
4648 *
4649 * Return a bitmap for first enabled traffic class for this PF.
4650 **/
4651 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4652 {
4653 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4654 u8 i = 0;
4655
4656 if (!enabled_tc)
4657 return 0x1; /* TC0 */
4658
4659 /* Find the first enabled TC */
4660 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4661 if (enabled_tc & BIT(i))
4662 break;
4663 }
4664
4665 return BIT(i);
4666 }
4667
4668 /**
4669 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4670 * @pf: PF being queried
4671 *
4672 * Return a bitmap for enabled traffic classes for this PF.
4673 **/
4674 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4675 {
4676 /* If DCB is not enabled for this PF then just return default TC */
4677 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4678 return i40e_pf_get_default_tc(pf);
4679
4680 /* SFP mode we want PF to be enabled for all TCs */
4681 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4682 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4683
4684 /* MFP enabled and iSCSI PF type */
4685 if (pf->hw.func_caps.iscsi)
4686 return i40e_get_iscsi_tc_map(pf);
4687 else
4688 return i40e_pf_get_default_tc(pf);
4689 }
4690
4691 /**
4692 * i40e_vsi_get_bw_info - Query VSI BW Information
4693 * @vsi: the VSI being queried
4694 *
4695 * Returns 0 on success, negative value on failure
4696 **/
4697 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4698 {
4699 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4700 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4701 struct i40e_pf *pf = vsi->back;
4702 struct i40e_hw *hw = &pf->hw;
4703 i40e_status ret;
4704 u32 tc_bw_max;
4705 int i;
4706
4707 /* Get the VSI level BW configuration */
4708 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4709 if (ret) {
4710 dev_info(&pf->pdev->dev,
4711 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4712 i40e_stat_str(&pf->hw, ret),
4713 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4714 return -EINVAL;
4715 }
4716
4717 /* Get the VSI level BW configuration per TC */
4718 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4719 NULL);
4720 if (ret) {
4721 dev_info(&pf->pdev->dev,
4722 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4723 i40e_stat_str(&pf->hw, ret),
4724 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4725 return -EINVAL;
4726 }
4727
4728 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4729 dev_info(&pf->pdev->dev,
4730 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4731 bw_config.tc_valid_bits,
4732 bw_ets_config.tc_valid_bits);
4733 /* Still continuing */
4734 }
4735
4736 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4737 vsi->bw_max_quanta = bw_config.max_bw;
4738 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4739 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4740 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4741 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4742 vsi->bw_ets_limit_credits[i] =
4743 le16_to_cpu(bw_ets_config.credits[i]);
4744 /* 3 bits out of 4 for each TC */
4745 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4746 }
4747
4748 return 0;
4749 }
4750
4751 /**
4752 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4753 * @vsi: the VSI being configured
4754 * @enabled_tc: TC bitmap
4755 * @bw_credits: BW shared credits per TC
4756 *
4757 * Returns 0 on success, negative value on failure
4758 **/
4759 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4760 u8 *bw_share)
4761 {
4762 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4763 i40e_status ret;
4764 int i;
4765
4766 bw_data.tc_valid_bits = enabled_tc;
4767 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4768 bw_data.tc_bw_credits[i] = bw_share[i];
4769
4770 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4771 NULL);
4772 if (ret) {
4773 dev_info(&vsi->back->pdev->dev,
4774 "AQ command Config VSI BW allocation per TC failed = %d\n",
4775 vsi->back->hw.aq.asq_last_status);
4776 return -EINVAL;
4777 }
4778
4779 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4780 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4781
4782 return 0;
4783 }
4784
4785 /**
4786 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4787 * @vsi: the VSI being configured
4788 * @enabled_tc: TC map to be enabled
4789 *
4790 **/
4791 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4792 {
4793 struct net_device *netdev = vsi->netdev;
4794 struct i40e_pf *pf = vsi->back;
4795 struct i40e_hw *hw = &pf->hw;
4796 u8 netdev_tc = 0;
4797 int i;
4798 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4799
4800 if (!netdev)
4801 return;
4802
4803 if (!enabled_tc) {
4804 netdev_reset_tc(netdev);
4805 return;
4806 }
4807
4808 /* Set up actual enabled TCs on the VSI */
4809 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4810 return;
4811
4812 /* set per TC queues for the VSI */
4813 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4814 /* Only set TC queues for enabled tcs
4815 *
4816 * e.g. For a VSI that has TC0 and TC3 enabled the
4817 * enabled_tc bitmap would be 0x00001001; the driver
4818 * will set the numtc for netdev as 2 that will be
4819 * referenced by the netdev layer as TC 0 and 1.
4820 */
4821 if (vsi->tc_config.enabled_tc & BIT(i))
4822 netdev_set_tc_queue(netdev,
4823 vsi->tc_config.tc_info[i].netdev_tc,
4824 vsi->tc_config.tc_info[i].qcount,
4825 vsi->tc_config.tc_info[i].qoffset);
4826 }
4827
4828 /* Assign UP2TC map for the VSI */
4829 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4830 /* Get the actual TC# for the UP */
4831 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4832 /* Get the mapped netdev TC# for the UP */
4833 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4834 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4835 }
4836 }
4837
4838 /**
4839 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4840 * @vsi: the VSI being configured
4841 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4842 **/
4843 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4844 struct i40e_vsi_context *ctxt)
4845 {
4846 /* copy just the sections touched not the entire info
4847 * since not all sections are valid as returned by
4848 * update vsi params
4849 */
4850 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4851 memcpy(&vsi->info.queue_mapping,
4852 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4853 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4854 sizeof(vsi->info.tc_mapping));
4855 }
4856
4857 /**
4858 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4859 * @vsi: VSI to be configured
4860 * @enabled_tc: TC bitmap
4861 *
4862 * This configures a particular VSI for TCs that are mapped to the
4863 * given TC bitmap. It uses default bandwidth share for TCs across
4864 * VSIs to configure TC for a particular VSI.
4865 *
4866 * NOTE:
4867 * It is expected that the VSI queues have been quisced before calling
4868 * this function.
4869 **/
4870 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4871 {
4872 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4873 struct i40e_vsi_context ctxt;
4874 int ret = 0;
4875 int i;
4876
4877 /* Check if enabled_tc is same as existing or new TCs */
4878 if (vsi->tc_config.enabled_tc == enabled_tc)
4879 return ret;
4880
4881 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4882 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4883 if (enabled_tc & BIT(i))
4884 bw_share[i] = 1;
4885 }
4886
4887 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4888 if (ret) {
4889 dev_info(&vsi->back->pdev->dev,
4890 "Failed configuring TC map %d for VSI %d\n",
4891 enabled_tc, vsi->seid);
4892 goto out;
4893 }
4894
4895 /* Update Queue Pairs Mapping for currently enabled UPs */
4896 ctxt.seid = vsi->seid;
4897 ctxt.pf_num = vsi->back->hw.pf_id;
4898 ctxt.vf_num = 0;
4899 ctxt.uplink_seid = vsi->uplink_seid;
4900 ctxt.info = vsi->info;
4901 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4902
4903 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4904 ctxt.info.valid_sections |=
4905 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4906 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4907 }
4908
4909 /* Update the VSI after updating the VSI queue-mapping information */
4910 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4911 if (ret) {
4912 dev_info(&vsi->back->pdev->dev,
4913 "Update vsi tc config failed, err %s aq_err %s\n",
4914 i40e_stat_str(&vsi->back->hw, ret),
4915 i40e_aq_str(&vsi->back->hw,
4916 vsi->back->hw.aq.asq_last_status));
4917 goto out;
4918 }
4919 /* update the local VSI info with updated queue map */
4920 i40e_vsi_update_queue_map(vsi, &ctxt);
4921 vsi->info.valid_sections = 0;
4922
4923 /* Update current VSI BW information */
4924 ret = i40e_vsi_get_bw_info(vsi);
4925 if (ret) {
4926 dev_info(&vsi->back->pdev->dev,
4927 "Failed updating vsi bw info, err %s aq_err %s\n",
4928 i40e_stat_str(&vsi->back->hw, ret),
4929 i40e_aq_str(&vsi->back->hw,
4930 vsi->back->hw.aq.asq_last_status));
4931 goto out;
4932 }
4933
4934 /* Update the netdev TC setup */
4935 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4936 out:
4937 return ret;
4938 }
4939
4940 /**
4941 * i40e_veb_config_tc - Configure TCs for given VEB
4942 * @veb: given VEB
4943 * @enabled_tc: TC bitmap
4944 *
4945 * Configures given TC bitmap for VEB (switching) element
4946 **/
4947 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4948 {
4949 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4950 struct i40e_pf *pf = veb->pf;
4951 int ret = 0;
4952 int i;
4953
4954 /* No TCs or already enabled TCs just return */
4955 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4956 return ret;
4957
4958 bw_data.tc_valid_bits = enabled_tc;
4959 /* bw_data.absolute_credits is not set (relative) */
4960
4961 /* Enable ETS TCs with equal BW Share for now */
4962 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4963 if (enabled_tc & BIT(i))
4964 bw_data.tc_bw_share_credits[i] = 1;
4965 }
4966
4967 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4968 &bw_data, NULL);
4969 if (ret) {
4970 dev_info(&pf->pdev->dev,
4971 "VEB bw config failed, err %s aq_err %s\n",
4972 i40e_stat_str(&pf->hw, ret),
4973 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4974 goto out;
4975 }
4976
4977 /* Update the BW information */
4978 ret = i40e_veb_get_bw_info(veb);
4979 if (ret) {
4980 dev_info(&pf->pdev->dev,
4981 "Failed getting veb bw config, err %s aq_err %s\n",
4982 i40e_stat_str(&pf->hw, ret),
4983 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4984 }
4985
4986 out:
4987 return ret;
4988 }
4989
4990 #ifdef CONFIG_I40E_DCB
4991 /**
4992 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4993 * @pf: PF struct
4994 *
4995 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4996 * the caller would've quiesce all the VSIs before calling
4997 * this function
4998 **/
4999 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
5000 {
5001 u8 tc_map = 0;
5002 int ret;
5003 u8 v;
5004
5005 /* Enable the TCs available on PF to all VEBs */
5006 tc_map = i40e_pf_get_tc_map(pf);
5007 for (v = 0; v < I40E_MAX_VEB; v++) {
5008 if (!pf->veb[v])
5009 continue;
5010 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
5011 if (ret) {
5012 dev_info(&pf->pdev->dev,
5013 "Failed configuring TC for VEB seid=%d\n",
5014 pf->veb[v]->seid);
5015 /* Will try to configure as many components */
5016 }
5017 }
5018
5019 /* Update each VSI */
5020 for (v = 0; v < pf->num_alloc_vsi; v++) {
5021 if (!pf->vsi[v])
5022 continue;
5023
5024 /* - Enable all TCs for the LAN VSI
5025 #ifdef I40E_FCOE
5026 * - For FCoE VSI only enable the TC configured
5027 * as per the APP TLV
5028 #endif
5029 * - For all others keep them at TC0 for now
5030 */
5031 if (v == pf->lan_vsi)
5032 tc_map = i40e_pf_get_tc_map(pf);
5033 else
5034 tc_map = i40e_pf_get_default_tc(pf);
5035 #ifdef I40E_FCOE
5036 if (pf->vsi[v]->type == I40E_VSI_FCOE)
5037 tc_map = i40e_get_fcoe_tc_map(pf);
5038 #endif /* #ifdef I40E_FCOE */
5039
5040 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5041 if (ret) {
5042 dev_info(&pf->pdev->dev,
5043 "Failed configuring TC for VSI seid=%d\n",
5044 pf->vsi[v]->seid);
5045 /* Will try to configure as many components */
5046 } else {
5047 /* Re-configure VSI vectors based on updated TC map */
5048 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5049 if (pf->vsi[v]->netdev)
5050 i40e_dcbnl_set_all(pf->vsi[v]);
5051 }
5052 }
5053 }
5054
5055 /**
5056 * i40e_resume_port_tx - Resume port Tx
5057 * @pf: PF struct
5058 *
5059 * Resume a port's Tx and issue a PF reset in case of failure to
5060 * resume.
5061 **/
5062 static int i40e_resume_port_tx(struct i40e_pf *pf)
5063 {
5064 struct i40e_hw *hw = &pf->hw;
5065 int ret;
5066
5067 ret = i40e_aq_resume_port_tx(hw, NULL);
5068 if (ret) {
5069 dev_info(&pf->pdev->dev,
5070 "Resume Port Tx failed, err %s aq_err %s\n",
5071 i40e_stat_str(&pf->hw, ret),
5072 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5073 /* Schedule PF reset to recover */
5074 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5075 i40e_service_event_schedule(pf);
5076 }
5077
5078 return ret;
5079 }
5080
5081 /**
5082 * i40e_init_pf_dcb - Initialize DCB configuration
5083 * @pf: PF being configured
5084 *
5085 * Query the current DCB configuration and cache it
5086 * in the hardware structure
5087 **/
5088 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5089 {
5090 struct i40e_hw *hw = &pf->hw;
5091 int err = 0;
5092
5093 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5094 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5095 goto out;
5096
5097 /* Get the initial DCB configuration */
5098 err = i40e_init_dcb(hw);
5099 if (!err) {
5100 /* Device/Function is not DCBX capable */
5101 if ((!hw->func_caps.dcb) ||
5102 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5103 dev_info(&pf->pdev->dev,
5104 "DCBX offload is not supported or is disabled for this PF.\n");
5105
5106 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5107 goto out;
5108
5109 } else {
5110 /* When status is not DISABLED then DCBX in FW */
5111 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5112 DCB_CAP_DCBX_VER_IEEE;
5113
5114 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5115 /* Enable DCB tagging only when more than one TC
5116 * or explicitly disable if only one TC
5117 */
5118 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5119 pf->flags |= I40E_FLAG_DCB_ENABLED;
5120 else
5121 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5122 dev_dbg(&pf->pdev->dev,
5123 "DCBX offload is supported for this PF.\n");
5124 }
5125 } else {
5126 dev_info(&pf->pdev->dev,
5127 "Query for DCB configuration failed, err %s aq_err %s\n",
5128 i40e_stat_str(&pf->hw, err),
5129 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5130 }
5131
5132 out:
5133 return err;
5134 }
5135 #endif /* CONFIG_I40E_DCB */
5136 #define SPEED_SIZE 14
5137 #define FC_SIZE 8
5138 /**
5139 * i40e_print_link_message - print link up or down
5140 * @vsi: the VSI for which link needs a message
5141 */
5142 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5143 {
5144 char *speed = "Unknown";
5145 char *fc = "Unknown";
5146
5147 if (vsi->current_isup == isup)
5148 return;
5149 vsi->current_isup = isup;
5150 if (!isup) {
5151 netdev_info(vsi->netdev, "NIC Link is Down\n");
5152 return;
5153 }
5154
5155 /* Warn user if link speed on NPAR enabled partition is not at
5156 * least 10GB
5157 */
5158 if (vsi->back->hw.func_caps.npar_enable &&
5159 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5160 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5161 netdev_warn(vsi->netdev,
5162 "The partition detected link speed that is less than 10Gbps\n");
5163
5164 switch (vsi->back->hw.phy.link_info.link_speed) {
5165 case I40E_LINK_SPEED_40GB:
5166 speed = "40 G";
5167 break;
5168 case I40E_LINK_SPEED_20GB:
5169 speed = "20 G";
5170 break;
5171 case I40E_LINK_SPEED_10GB:
5172 speed = "10 G";
5173 break;
5174 case I40E_LINK_SPEED_1GB:
5175 speed = "1000 M";
5176 break;
5177 case I40E_LINK_SPEED_100MB:
5178 speed = "100 M";
5179 break;
5180 default:
5181 break;
5182 }
5183
5184 switch (vsi->back->hw.fc.current_mode) {
5185 case I40E_FC_FULL:
5186 fc = "RX/TX";
5187 break;
5188 case I40E_FC_TX_PAUSE:
5189 fc = "TX";
5190 break;
5191 case I40E_FC_RX_PAUSE:
5192 fc = "RX";
5193 break;
5194 default:
5195 fc = "None";
5196 break;
5197 }
5198
5199 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5200 speed, fc);
5201 }
5202
5203 /**
5204 * i40e_up_complete - Finish the last steps of bringing up a connection
5205 * @vsi: the VSI being configured
5206 **/
5207 static int i40e_up_complete(struct i40e_vsi *vsi)
5208 {
5209 struct i40e_pf *pf = vsi->back;
5210 int err;
5211
5212 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5213 i40e_vsi_configure_msix(vsi);
5214 else
5215 i40e_configure_msi_and_legacy(vsi);
5216
5217 /* start rings */
5218 err = i40e_vsi_control_rings(vsi, true);
5219 if (err)
5220 return err;
5221
5222 clear_bit(__I40E_DOWN, &vsi->state);
5223 i40e_napi_enable_all(vsi);
5224 i40e_vsi_enable_irq(vsi);
5225
5226 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5227 (vsi->netdev)) {
5228 i40e_print_link_message(vsi, true);
5229 netif_tx_start_all_queues(vsi->netdev);
5230 netif_carrier_on(vsi->netdev);
5231 } else if (vsi->netdev) {
5232 i40e_print_link_message(vsi, false);
5233 /* need to check for qualified module here*/
5234 if ((pf->hw.phy.link_info.link_info &
5235 I40E_AQ_MEDIA_AVAILABLE) &&
5236 (!(pf->hw.phy.link_info.an_info &
5237 I40E_AQ_QUALIFIED_MODULE)))
5238 netdev_err(vsi->netdev,
5239 "the driver failed to link because an unqualified module was detected.");
5240 }
5241
5242 /* replay FDIR SB filters */
5243 if (vsi->type == I40E_VSI_FDIR) {
5244 /* reset fd counters */
5245 pf->fd_add_err = pf->fd_atr_cnt = 0;
5246 if (pf->fd_tcp_rule > 0) {
5247 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5248 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5249 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5250 pf->fd_tcp_rule = 0;
5251 }
5252 i40e_fdir_filter_restore(vsi);
5253 }
5254
5255 /* On the next run of the service_task, notify any clients of the new
5256 * opened netdev
5257 */
5258 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5259 i40e_service_event_schedule(pf);
5260
5261 return 0;
5262 }
5263
5264 /**
5265 * i40e_vsi_reinit_locked - Reset the VSI
5266 * @vsi: the VSI being configured
5267 *
5268 * Rebuild the ring structs after some configuration
5269 * has changed, e.g. MTU size.
5270 **/
5271 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5272 {
5273 struct i40e_pf *pf = vsi->back;
5274
5275 WARN_ON(in_interrupt());
5276 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5277 usleep_range(1000, 2000);
5278 i40e_down(vsi);
5279
5280 i40e_up(vsi);
5281 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5282 }
5283
5284 /**
5285 * i40e_up - Bring the connection back up after being down
5286 * @vsi: the VSI being configured
5287 **/
5288 int i40e_up(struct i40e_vsi *vsi)
5289 {
5290 int err;
5291
5292 err = i40e_vsi_configure(vsi);
5293 if (!err)
5294 err = i40e_up_complete(vsi);
5295
5296 return err;
5297 }
5298
5299 /**
5300 * i40e_down - Shutdown the connection processing
5301 * @vsi: the VSI being stopped
5302 **/
5303 void i40e_down(struct i40e_vsi *vsi)
5304 {
5305 int i;
5306
5307 /* It is assumed that the caller of this function
5308 * sets the vsi->state __I40E_DOWN bit.
5309 */
5310 if (vsi->netdev) {
5311 netif_carrier_off(vsi->netdev);
5312 netif_tx_disable(vsi->netdev);
5313 }
5314 i40e_vsi_disable_irq(vsi);
5315 i40e_vsi_control_rings(vsi, false);
5316 i40e_napi_disable_all(vsi);
5317
5318 for (i = 0; i < vsi->num_queue_pairs; i++) {
5319 i40e_clean_tx_ring(vsi->tx_rings[i]);
5320 i40e_clean_rx_ring(vsi->rx_rings[i]);
5321 }
5322
5323 i40e_notify_client_of_netdev_close(vsi, false);
5324
5325 }
5326
5327 /**
5328 * i40e_setup_tc - configure multiple traffic classes
5329 * @netdev: net device to configure
5330 * @tc: number of traffic classes to enable
5331 **/
5332 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5333 {
5334 struct i40e_netdev_priv *np = netdev_priv(netdev);
5335 struct i40e_vsi *vsi = np->vsi;
5336 struct i40e_pf *pf = vsi->back;
5337 u8 enabled_tc = 0;
5338 int ret = -EINVAL;
5339 int i;
5340
5341 /* Check if DCB enabled to continue */
5342 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5343 netdev_info(netdev, "DCB is not enabled for adapter\n");
5344 goto exit;
5345 }
5346
5347 /* Check if MFP enabled */
5348 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5349 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5350 goto exit;
5351 }
5352
5353 /* Check whether tc count is within enabled limit */
5354 if (tc > i40e_pf_get_num_tc(pf)) {
5355 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5356 goto exit;
5357 }
5358
5359 /* Generate TC map for number of tc requested */
5360 for (i = 0; i < tc; i++)
5361 enabled_tc |= BIT(i);
5362
5363 /* Requesting same TC configuration as already enabled */
5364 if (enabled_tc == vsi->tc_config.enabled_tc)
5365 return 0;
5366
5367 /* Quiesce VSI queues */
5368 i40e_quiesce_vsi(vsi);
5369
5370 /* Configure VSI for enabled TCs */
5371 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5372 if (ret) {
5373 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5374 vsi->seid);
5375 goto exit;
5376 }
5377
5378 /* Unquiesce VSI */
5379 i40e_unquiesce_vsi(vsi);
5380
5381 exit:
5382 return ret;
5383 }
5384
5385 #ifdef I40E_FCOE
5386 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5387 struct tc_to_netdev *tc)
5388 #else
5389 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5390 struct tc_to_netdev *tc)
5391 #endif
5392 {
5393 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5394 return -EINVAL;
5395 return i40e_setup_tc(netdev, tc->tc);
5396 }
5397
5398 /**
5399 * i40e_open - Called when a network interface is made active
5400 * @netdev: network interface device structure
5401 *
5402 * The open entry point is called when a network interface is made
5403 * active by the system (IFF_UP). At this point all resources needed
5404 * for transmit and receive operations are allocated, the interrupt
5405 * handler is registered with the OS, the netdev watchdog subtask is
5406 * enabled, and the stack is notified that the interface is ready.
5407 *
5408 * Returns 0 on success, negative value on failure
5409 **/
5410 int i40e_open(struct net_device *netdev)
5411 {
5412 struct i40e_netdev_priv *np = netdev_priv(netdev);
5413 struct i40e_vsi *vsi = np->vsi;
5414 struct i40e_pf *pf = vsi->back;
5415 int err;
5416
5417 /* disallow open during test or if eeprom is broken */
5418 if (test_bit(__I40E_TESTING, &pf->state) ||
5419 test_bit(__I40E_BAD_EEPROM, &pf->state))
5420 return -EBUSY;
5421
5422 netif_carrier_off(netdev);
5423
5424 err = i40e_vsi_open(vsi);
5425 if (err)
5426 return err;
5427
5428 /* configure global TSO hardware offload settings */
5429 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5430 TCP_FLAG_FIN) >> 16);
5431 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5432 TCP_FLAG_FIN |
5433 TCP_FLAG_CWR) >> 16);
5434 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5435
5436 udp_tunnel_get_rx_info(netdev);
5437
5438 return 0;
5439 }
5440
5441 /**
5442 * i40e_vsi_open -
5443 * @vsi: the VSI to open
5444 *
5445 * Finish initialization of the VSI.
5446 *
5447 * Returns 0 on success, negative value on failure
5448 **/
5449 int i40e_vsi_open(struct i40e_vsi *vsi)
5450 {
5451 struct i40e_pf *pf = vsi->back;
5452 char int_name[I40E_INT_NAME_STR_LEN];
5453 int err;
5454
5455 /* allocate descriptors */
5456 err = i40e_vsi_setup_tx_resources(vsi);
5457 if (err)
5458 goto err_setup_tx;
5459 err = i40e_vsi_setup_rx_resources(vsi);
5460 if (err)
5461 goto err_setup_rx;
5462
5463 err = i40e_vsi_configure(vsi);
5464 if (err)
5465 goto err_setup_rx;
5466
5467 if (vsi->netdev) {
5468 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5469 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5470 err = i40e_vsi_request_irq(vsi, int_name);
5471 if (err)
5472 goto err_setup_rx;
5473
5474 /* Notify the stack of the actual queue counts. */
5475 err = netif_set_real_num_tx_queues(vsi->netdev,
5476 vsi->num_queue_pairs);
5477 if (err)
5478 goto err_set_queues;
5479
5480 err = netif_set_real_num_rx_queues(vsi->netdev,
5481 vsi->num_queue_pairs);
5482 if (err)
5483 goto err_set_queues;
5484
5485 } else if (vsi->type == I40E_VSI_FDIR) {
5486 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5487 dev_driver_string(&pf->pdev->dev),
5488 dev_name(&pf->pdev->dev));
5489 err = i40e_vsi_request_irq(vsi, int_name);
5490
5491 } else {
5492 err = -EINVAL;
5493 goto err_setup_rx;
5494 }
5495
5496 err = i40e_up_complete(vsi);
5497 if (err)
5498 goto err_up_complete;
5499
5500 return 0;
5501
5502 err_up_complete:
5503 i40e_down(vsi);
5504 err_set_queues:
5505 i40e_vsi_free_irq(vsi);
5506 err_setup_rx:
5507 i40e_vsi_free_rx_resources(vsi);
5508 err_setup_tx:
5509 i40e_vsi_free_tx_resources(vsi);
5510 if (vsi == pf->vsi[pf->lan_vsi])
5511 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5512
5513 return err;
5514 }
5515
5516 /**
5517 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5518 * @pf: Pointer to PF
5519 *
5520 * This function destroys the hlist where all the Flow Director
5521 * filters were saved.
5522 **/
5523 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5524 {
5525 struct i40e_fdir_filter *filter;
5526 struct hlist_node *node2;
5527
5528 hlist_for_each_entry_safe(filter, node2,
5529 &pf->fdir_filter_list, fdir_node) {
5530 hlist_del(&filter->fdir_node);
5531 kfree(filter);
5532 }
5533 pf->fdir_pf_active_filters = 0;
5534 }
5535
5536 /**
5537 * i40e_close - Disables a network interface
5538 * @netdev: network interface device structure
5539 *
5540 * The close entry point is called when an interface is de-activated
5541 * by the OS. The hardware is still under the driver's control, but
5542 * this netdev interface is disabled.
5543 *
5544 * Returns 0, this is not allowed to fail
5545 **/
5546 int i40e_close(struct net_device *netdev)
5547 {
5548 struct i40e_netdev_priv *np = netdev_priv(netdev);
5549 struct i40e_vsi *vsi = np->vsi;
5550
5551 i40e_vsi_close(vsi);
5552
5553 return 0;
5554 }
5555
5556 /**
5557 * i40e_do_reset - Start a PF or Core Reset sequence
5558 * @pf: board private structure
5559 * @reset_flags: which reset is requested
5560 *
5561 * The essential difference in resets is that the PF Reset
5562 * doesn't clear the packet buffers, doesn't reset the PE
5563 * firmware, and doesn't bother the other PFs on the chip.
5564 **/
5565 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5566 {
5567 u32 val;
5568
5569 WARN_ON(in_interrupt());
5570
5571
5572 /* do the biggest reset indicated */
5573 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5574
5575 /* Request a Global Reset
5576 *
5577 * This will start the chip's countdown to the actual full
5578 * chip reset event, and a warning interrupt to be sent
5579 * to all PFs, including the requestor. Our handler
5580 * for the warning interrupt will deal with the shutdown
5581 * and recovery of the switch setup.
5582 */
5583 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5584 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5585 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5586 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5587
5588 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5589
5590 /* Request a Core Reset
5591 *
5592 * Same as Global Reset, except does *not* include the MAC/PHY
5593 */
5594 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5595 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5596 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5597 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5598 i40e_flush(&pf->hw);
5599
5600 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5601
5602 /* Request a PF Reset
5603 *
5604 * Resets only the PF-specific registers
5605 *
5606 * This goes directly to the tear-down and rebuild of
5607 * the switch, since we need to do all the recovery as
5608 * for the Core Reset.
5609 */
5610 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5611 i40e_handle_reset_warning(pf);
5612
5613 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5614 int v;
5615
5616 /* Find the VSI(s) that requested a re-init */
5617 dev_info(&pf->pdev->dev,
5618 "VSI reinit requested\n");
5619 for (v = 0; v < pf->num_alloc_vsi; v++) {
5620 struct i40e_vsi *vsi = pf->vsi[v];
5621
5622 if (vsi != NULL &&
5623 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5624 i40e_vsi_reinit_locked(pf->vsi[v]);
5625 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5626 }
5627 }
5628 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5629 int v;
5630
5631 /* Find the VSI(s) that needs to be brought down */
5632 dev_info(&pf->pdev->dev, "VSI down requested\n");
5633 for (v = 0; v < pf->num_alloc_vsi; v++) {
5634 struct i40e_vsi *vsi = pf->vsi[v];
5635
5636 if (vsi != NULL &&
5637 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5638 set_bit(__I40E_DOWN, &vsi->state);
5639 i40e_down(vsi);
5640 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5641 }
5642 }
5643 } else {
5644 dev_info(&pf->pdev->dev,
5645 "bad reset request 0x%08x\n", reset_flags);
5646 }
5647 }
5648
5649 #ifdef CONFIG_I40E_DCB
5650 /**
5651 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5652 * @pf: board private structure
5653 * @old_cfg: current DCB config
5654 * @new_cfg: new DCB config
5655 **/
5656 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5657 struct i40e_dcbx_config *old_cfg,
5658 struct i40e_dcbx_config *new_cfg)
5659 {
5660 bool need_reconfig = false;
5661
5662 /* Check if ETS configuration has changed */
5663 if (memcmp(&new_cfg->etscfg,
5664 &old_cfg->etscfg,
5665 sizeof(new_cfg->etscfg))) {
5666 /* If Priority Table has changed reconfig is needed */
5667 if (memcmp(&new_cfg->etscfg.prioritytable,
5668 &old_cfg->etscfg.prioritytable,
5669 sizeof(new_cfg->etscfg.prioritytable))) {
5670 need_reconfig = true;
5671 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5672 }
5673
5674 if (memcmp(&new_cfg->etscfg.tcbwtable,
5675 &old_cfg->etscfg.tcbwtable,
5676 sizeof(new_cfg->etscfg.tcbwtable)))
5677 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5678
5679 if (memcmp(&new_cfg->etscfg.tsatable,
5680 &old_cfg->etscfg.tsatable,
5681 sizeof(new_cfg->etscfg.tsatable)))
5682 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5683 }
5684
5685 /* Check if PFC configuration has changed */
5686 if (memcmp(&new_cfg->pfc,
5687 &old_cfg->pfc,
5688 sizeof(new_cfg->pfc))) {
5689 need_reconfig = true;
5690 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5691 }
5692
5693 /* Check if APP Table has changed */
5694 if (memcmp(&new_cfg->app,
5695 &old_cfg->app,
5696 sizeof(new_cfg->app))) {
5697 need_reconfig = true;
5698 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5699 }
5700
5701 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5702 return need_reconfig;
5703 }
5704
5705 /**
5706 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5707 * @pf: board private structure
5708 * @e: event info posted on ARQ
5709 **/
5710 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5711 struct i40e_arq_event_info *e)
5712 {
5713 struct i40e_aqc_lldp_get_mib *mib =
5714 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5715 struct i40e_hw *hw = &pf->hw;
5716 struct i40e_dcbx_config tmp_dcbx_cfg;
5717 bool need_reconfig = false;
5718 int ret = 0;
5719 u8 type;
5720
5721 /* Not DCB capable or capability disabled */
5722 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5723 return ret;
5724
5725 /* Ignore if event is not for Nearest Bridge */
5726 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5727 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5728 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5729 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5730 return ret;
5731
5732 /* Check MIB Type and return if event for Remote MIB update */
5733 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5734 dev_dbg(&pf->pdev->dev,
5735 "LLDP event mib type %s\n", type ? "remote" : "local");
5736 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5737 /* Update the remote cached instance and return */
5738 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5739 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5740 &hw->remote_dcbx_config);
5741 goto exit;
5742 }
5743
5744 /* Store the old configuration */
5745 tmp_dcbx_cfg = hw->local_dcbx_config;
5746
5747 /* Reset the old DCBx configuration data */
5748 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5749 /* Get updated DCBX data from firmware */
5750 ret = i40e_get_dcb_config(&pf->hw);
5751 if (ret) {
5752 dev_info(&pf->pdev->dev,
5753 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5754 i40e_stat_str(&pf->hw, ret),
5755 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5756 goto exit;
5757 }
5758
5759 /* No change detected in DCBX configs */
5760 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5761 sizeof(tmp_dcbx_cfg))) {
5762 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5763 goto exit;
5764 }
5765
5766 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5767 &hw->local_dcbx_config);
5768
5769 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5770
5771 if (!need_reconfig)
5772 goto exit;
5773
5774 /* Enable DCB tagging only when more than one TC */
5775 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5776 pf->flags |= I40E_FLAG_DCB_ENABLED;
5777 else
5778 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5779
5780 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5781 /* Reconfiguration needed quiesce all VSIs */
5782 i40e_pf_quiesce_all_vsi(pf);
5783
5784 /* Changes in configuration update VEB/VSI */
5785 i40e_dcb_reconfigure(pf);
5786
5787 ret = i40e_resume_port_tx(pf);
5788
5789 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5790 /* In case of error no point in resuming VSIs */
5791 if (ret)
5792 goto exit;
5793
5794 /* Wait for the PF's queues to be disabled */
5795 ret = i40e_pf_wait_queues_disabled(pf);
5796 if (ret) {
5797 /* Schedule PF reset to recover */
5798 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5799 i40e_service_event_schedule(pf);
5800 } else {
5801 i40e_pf_unquiesce_all_vsi(pf);
5802 /* Notify the client for the DCB changes */
5803 i40e_notify_client_of_l2_param_changes(pf->vsi[pf->lan_vsi]);
5804 }
5805
5806 exit:
5807 return ret;
5808 }
5809 #endif /* CONFIG_I40E_DCB */
5810
5811 /**
5812 * i40e_do_reset_safe - Protected reset path for userland calls.
5813 * @pf: board private structure
5814 * @reset_flags: which reset is requested
5815 *
5816 **/
5817 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5818 {
5819 rtnl_lock();
5820 i40e_do_reset(pf, reset_flags);
5821 rtnl_unlock();
5822 }
5823
5824 /**
5825 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5826 * @pf: board private structure
5827 * @e: event info posted on ARQ
5828 *
5829 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5830 * and VF queues
5831 **/
5832 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5833 struct i40e_arq_event_info *e)
5834 {
5835 struct i40e_aqc_lan_overflow *data =
5836 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5837 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5838 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5839 struct i40e_hw *hw = &pf->hw;
5840 struct i40e_vf *vf;
5841 u16 vf_id;
5842
5843 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5844 queue, qtx_ctl);
5845
5846 /* Queue belongs to VF, find the VF and issue VF reset */
5847 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5848 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5849 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5850 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5851 vf_id -= hw->func_caps.vf_base_id;
5852 vf = &pf->vf[vf_id];
5853 i40e_vc_notify_vf_reset(vf);
5854 /* Allow VF to process pending reset notification */
5855 msleep(20);
5856 i40e_reset_vf(vf, false);
5857 }
5858 }
5859
5860 /**
5861 * i40e_service_event_complete - Finish up the service event
5862 * @pf: board private structure
5863 **/
5864 static void i40e_service_event_complete(struct i40e_pf *pf)
5865 {
5866 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5867
5868 /* flush memory to make sure state is correct before next watchog */
5869 smp_mb__before_atomic();
5870 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5871 }
5872
5873 /**
5874 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5875 * @pf: board private structure
5876 **/
5877 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5878 {
5879 u32 val, fcnt_prog;
5880
5881 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5882 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5883 return fcnt_prog;
5884 }
5885
5886 /**
5887 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5888 * @pf: board private structure
5889 **/
5890 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5891 {
5892 u32 val, fcnt_prog;
5893
5894 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5895 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5896 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5897 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5898 return fcnt_prog;
5899 }
5900
5901 /**
5902 * i40e_get_global_fd_count - Get total FD filters programmed on device
5903 * @pf: board private structure
5904 **/
5905 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5906 {
5907 u32 val, fcnt_prog;
5908
5909 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5910 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5911 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5912 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5913 return fcnt_prog;
5914 }
5915
5916 /**
5917 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5918 * @pf: board private structure
5919 **/
5920 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5921 {
5922 struct i40e_fdir_filter *filter;
5923 u32 fcnt_prog, fcnt_avail;
5924 struct hlist_node *node;
5925
5926 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5927 return;
5928
5929 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5930 * to re-enable
5931 */
5932 fcnt_prog = i40e_get_global_fd_count(pf);
5933 fcnt_avail = pf->fdir_pf_filter_count;
5934 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5935 (pf->fd_add_err == 0) ||
5936 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5937 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5938 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5939 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5940 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5941 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5942 }
5943 }
5944 /* Wait for some more space to be available to turn on ATR */
5945 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5946 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5947 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5948 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5949 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5950 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5951 }
5952 }
5953
5954 /* if hw had a problem adding a filter, delete it */
5955 if (pf->fd_inv > 0) {
5956 hlist_for_each_entry_safe(filter, node,
5957 &pf->fdir_filter_list, fdir_node) {
5958 if (filter->fd_id == pf->fd_inv) {
5959 hlist_del(&filter->fdir_node);
5960 kfree(filter);
5961 pf->fdir_pf_active_filters--;
5962 }
5963 }
5964 }
5965 }
5966
5967 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5968 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5969 /**
5970 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5971 * @pf: board private structure
5972 **/
5973 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5974 {
5975 unsigned long min_flush_time;
5976 int flush_wait_retry = 50;
5977 bool disable_atr = false;
5978 int fd_room;
5979 int reg;
5980
5981 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5982 return;
5983
5984 if (!time_after(jiffies, pf->fd_flush_timestamp +
5985 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5986 return;
5987
5988 /* If the flush is happening too quick and we have mostly SB rules we
5989 * should not re-enable ATR for some time.
5990 */
5991 min_flush_time = pf->fd_flush_timestamp +
5992 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5993 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5994
5995 if (!(time_after(jiffies, min_flush_time)) &&
5996 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5997 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5998 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5999 disable_atr = true;
6000 }
6001
6002 pf->fd_flush_timestamp = jiffies;
6003 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6004 /* flush all filters */
6005 wr32(&pf->hw, I40E_PFQF_CTL_1,
6006 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
6007 i40e_flush(&pf->hw);
6008 pf->fd_flush_cnt++;
6009 pf->fd_add_err = 0;
6010 do {
6011 /* Check FD flush status every 5-6msec */
6012 usleep_range(5000, 6000);
6013 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
6014 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
6015 break;
6016 } while (flush_wait_retry--);
6017 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
6018 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
6019 } else {
6020 /* replay sideband filters */
6021 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
6022 if (!disable_atr)
6023 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6024 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6025 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6026 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6027 }
6028 }
6029
6030 /**
6031 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6032 * @pf: board private structure
6033 **/
6034 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6035 {
6036 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6037 }
6038
6039 /* We can see up to 256 filter programming desc in transit if the filters are
6040 * being applied really fast; before we see the first
6041 * filter miss error on Rx queue 0. Accumulating enough error messages before
6042 * reacting will make sure we don't cause flush too often.
6043 */
6044 #define I40E_MAX_FD_PROGRAM_ERROR 256
6045
6046 /**
6047 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6048 * @pf: board private structure
6049 **/
6050 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6051 {
6052
6053 /* if interface is down do nothing */
6054 if (test_bit(__I40E_DOWN, &pf->state))
6055 return;
6056
6057 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
6058 return;
6059
6060 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6061 i40e_fdir_flush_and_replay(pf);
6062
6063 i40e_fdir_check_and_reenable(pf);
6064
6065 }
6066
6067 /**
6068 * i40e_vsi_link_event - notify VSI of a link event
6069 * @vsi: vsi to be notified
6070 * @link_up: link up or down
6071 **/
6072 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6073 {
6074 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6075 return;
6076
6077 switch (vsi->type) {
6078 case I40E_VSI_MAIN:
6079 #ifdef I40E_FCOE
6080 case I40E_VSI_FCOE:
6081 #endif
6082 if (!vsi->netdev || !vsi->netdev_registered)
6083 break;
6084
6085 if (link_up) {
6086 netif_carrier_on(vsi->netdev);
6087 netif_tx_wake_all_queues(vsi->netdev);
6088 } else {
6089 netif_carrier_off(vsi->netdev);
6090 netif_tx_stop_all_queues(vsi->netdev);
6091 }
6092 break;
6093
6094 case I40E_VSI_SRIOV:
6095 case I40E_VSI_VMDQ2:
6096 case I40E_VSI_CTRL:
6097 case I40E_VSI_IWARP:
6098 case I40E_VSI_MIRROR:
6099 default:
6100 /* there is no notification for other VSIs */
6101 break;
6102 }
6103 }
6104
6105 /**
6106 * i40e_veb_link_event - notify elements on the veb of a link event
6107 * @veb: veb to be notified
6108 * @link_up: link up or down
6109 **/
6110 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6111 {
6112 struct i40e_pf *pf;
6113 int i;
6114
6115 if (!veb || !veb->pf)
6116 return;
6117 pf = veb->pf;
6118
6119 /* depth first... */
6120 for (i = 0; i < I40E_MAX_VEB; i++)
6121 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6122 i40e_veb_link_event(pf->veb[i], link_up);
6123
6124 /* ... now the local VSIs */
6125 for (i = 0; i < pf->num_alloc_vsi; i++)
6126 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6127 i40e_vsi_link_event(pf->vsi[i], link_up);
6128 }
6129
6130 /**
6131 * i40e_link_event - Update netif_carrier status
6132 * @pf: board private structure
6133 **/
6134 static void i40e_link_event(struct i40e_pf *pf)
6135 {
6136 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6137 u8 new_link_speed, old_link_speed;
6138 i40e_status status;
6139 bool new_link, old_link;
6140
6141 /* save off old link status information */
6142 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6143
6144 /* set this to force the get_link_status call to refresh state */
6145 pf->hw.phy.get_link_info = true;
6146
6147 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6148
6149 status = i40e_get_link_status(&pf->hw, &new_link);
6150 if (status) {
6151 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6152 status);
6153 return;
6154 }
6155
6156 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6157 new_link_speed = pf->hw.phy.link_info.link_speed;
6158
6159 if (new_link == old_link &&
6160 new_link_speed == old_link_speed &&
6161 (test_bit(__I40E_DOWN, &vsi->state) ||
6162 new_link == netif_carrier_ok(vsi->netdev)))
6163 return;
6164
6165 if (!test_bit(__I40E_DOWN, &vsi->state))
6166 i40e_print_link_message(vsi, new_link);
6167
6168 /* Notify the base of the switch tree connected to
6169 * the link. Floating VEBs are not notified.
6170 */
6171 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6172 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6173 else
6174 i40e_vsi_link_event(vsi, new_link);
6175
6176 if (pf->vf)
6177 i40e_vc_notify_link_state(pf);
6178
6179 if (pf->flags & I40E_FLAG_PTP)
6180 i40e_ptp_set_increment(pf);
6181 }
6182
6183 /**
6184 * i40e_watchdog_subtask - periodic checks not using event driven response
6185 * @pf: board private structure
6186 **/
6187 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6188 {
6189 int i;
6190
6191 /* if interface is down do nothing */
6192 if (test_bit(__I40E_DOWN, &pf->state) ||
6193 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6194 return;
6195
6196 /* make sure we don't do these things too often */
6197 if (time_before(jiffies, (pf->service_timer_previous +
6198 pf->service_timer_period)))
6199 return;
6200 pf->service_timer_previous = jiffies;
6201
6202 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6203 i40e_link_event(pf);
6204
6205 /* Update the stats for active netdevs so the network stack
6206 * can look at updated numbers whenever it cares to
6207 */
6208 for (i = 0; i < pf->num_alloc_vsi; i++)
6209 if (pf->vsi[i] && pf->vsi[i]->netdev)
6210 i40e_update_stats(pf->vsi[i]);
6211
6212 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6213 /* Update the stats for the active switching components */
6214 for (i = 0; i < I40E_MAX_VEB; i++)
6215 if (pf->veb[i])
6216 i40e_update_veb_stats(pf->veb[i]);
6217 }
6218
6219 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6220 }
6221
6222 /**
6223 * i40e_reset_subtask - Set up for resetting the device and driver
6224 * @pf: board private structure
6225 **/
6226 static void i40e_reset_subtask(struct i40e_pf *pf)
6227 {
6228 u32 reset_flags = 0;
6229
6230 rtnl_lock();
6231 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6232 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6233 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6234 }
6235 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6236 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6237 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6238 }
6239 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6240 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6241 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6242 }
6243 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6244 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6245 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6246 }
6247 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6248 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6249 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6250 }
6251
6252 /* If there's a recovery already waiting, it takes
6253 * precedence before starting a new reset sequence.
6254 */
6255 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6256 i40e_handle_reset_warning(pf);
6257 goto unlock;
6258 }
6259
6260 /* If we're already down or resetting, just bail */
6261 if (reset_flags &&
6262 !test_bit(__I40E_DOWN, &pf->state) &&
6263 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6264 i40e_do_reset(pf, reset_flags);
6265
6266 unlock:
6267 rtnl_unlock();
6268 }
6269
6270 /**
6271 * i40e_handle_link_event - Handle link event
6272 * @pf: board private structure
6273 * @e: event info posted on ARQ
6274 **/
6275 static void i40e_handle_link_event(struct i40e_pf *pf,
6276 struct i40e_arq_event_info *e)
6277 {
6278 struct i40e_aqc_get_link_status *status =
6279 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6280
6281 /* Do a new status request to re-enable LSE reporting
6282 * and load new status information into the hw struct
6283 * This completely ignores any state information
6284 * in the ARQ event info, instead choosing to always
6285 * issue the AQ update link status command.
6286 */
6287 i40e_link_event(pf);
6288
6289 /* check for unqualified module, if link is down */
6290 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6291 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6292 (!(status->link_info & I40E_AQ_LINK_UP)))
6293 dev_err(&pf->pdev->dev,
6294 "The driver failed to link because an unqualified module was detected.\n");
6295 }
6296
6297 /**
6298 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6299 * @pf: board private structure
6300 **/
6301 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6302 {
6303 struct i40e_arq_event_info event;
6304 struct i40e_hw *hw = &pf->hw;
6305 u16 pending, i = 0;
6306 i40e_status ret;
6307 u16 opcode;
6308 u32 oldval;
6309 u32 val;
6310
6311 /* Do not run clean AQ when PF reset fails */
6312 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6313 return;
6314
6315 /* check for error indications */
6316 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6317 oldval = val;
6318 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6319 if (hw->debug_mask & I40E_DEBUG_AQ)
6320 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6321 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6322 }
6323 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6324 if (hw->debug_mask & I40E_DEBUG_AQ)
6325 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6326 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6327 pf->arq_overflows++;
6328 }
6329 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6330 if (hw->debug_mask & I40E_DEBUG_AQ)
6331 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6332 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6333 }
6334 if (oldval != val)
6335 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6336
6337 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6338 oldval = val;
6339 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6340 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6341 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6342 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6343 }
6344 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6345 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6346 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6347 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6348 }
6349 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6350 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6351 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6352 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6353 }
6354 if (oldval != val)
6355 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6356
6357 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6358 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6359 if (!event.msg_buf)
6360 return;
6361
6362 do {
6363 ret = i40e_clean_arq_element(hw, &event, &pending);
6364 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6365 break;
6366 else if (ret) {
6367 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6368 break;
6369 }
6370
6371 opcode = le16_to_cpu(event.desc.opcode);
6372 switch (opcode) {
6373
6374 case i40e_aqc_opc_get_link_status:
6375 i40e_handle_link_event(pf, &event);
6376 break;
6377 case i40e_aqc_opc_send_msg_to_pf:
6378 ret = i40e_vc_process_vf_msg(pf,
6379 le16_to_cpu(event.desc.retval),
6380 le32_to_cpu(event.desc.cookie_high),
6381 le32_to_cpu(event.desc.cookie_low),
6382 event.msg_buf,
6383 event.msg_len);
6384 break;
6385 case i40e_aqc_opc_lldp_update_mib:
6386 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6387 #ifdef CONFIG_I40E_DCB
6388 rtnl_lock();
6389 ret = i40e_handle_lldp_event(pf, &event);
6390 rtnl_unlock();
6391 #endif /* CONFIG_I40E_DCB */
6392 break;
6393 case i40e_aqc_opc_event_lan_overflow:
6394 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6395 i40e_handle_lan_overflow_event(pf, &event);
6396 break;
6397 case i40e_aqc_opc_send_msg_to_peer:
6398 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6399 break;
6400 case i40e_aqc_opc_nvm_erase:
6401 case i40e_aqc_opc_nvm_update:
6402 case i40e_aqc_opc_oem_post_update:
6403 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6404 "ARQ NVM operation 0x%04x completed\n",
6405 opcode);
6406 break;
6407 default:
6408 dev_info(&pf->pdev->dev,
6409 "ARQ: Unknown event 0x%04x ignored\n",
6410 opcode);
6411 break;
6412 }
6413 } while (pending && (i++ < pf->adminq_work_limit));
6414
6415 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6416 /* re-enable Admin queue interrupt cause */
6417 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6418 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6419 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6420 i40e_flush(hw);
6421
6422 kfree(event.msg_buf);
6423 }
6424
6425 /**
6426 * i40e_verify_eeprom - make sure eeprom is good to use
6427 * @pf: board private structure
6428 **/
6429 static void i40e_verify_eeprom(struct i40e_pf *pf)
6430 {
6431 int err;
6432
6433 err = i40e_diag_eeprom_test(&pf->hw);
6434 if (err) {
6435 /* retry in case of garbage read */
6436 err = i40e_diag_eeprom_test(&pf->hw);
6437 if (err) {
6438 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6439 err);
6440 set_bit(__I40E_BAD_EEPROM, &pf->state);
6441 }
6442 }
6443
6444 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6445 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6446 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6447 }
6448 }
6449
6450 /**
6451 * i40e_enable_pf_switch_lb
6452 * @pf: pointer to the PF structure
6453 *
6454 * enable switch loop back or die - no point in a return value
6455 **/
6456 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6457 {
6458 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6459 struct i40e_vsi_context ctxt;
6460 int ret;
6461
6462 ctxt.seid = pf->main_vsi_seid;
6463 ctxt.pf_num = pf->hw.pf_id;
6464 ctxt.vf_num = 0;
6465 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6466 if (ret) {
6467 dev_info(&pf->pdev->dev,
6468 "couldn't get PF vsi config, err %s aq_err %s\n",
6469 i40e_stat_str(&pf->hw, ret),
6470 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6471 return;
6472 }
6473 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6474 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6475 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6476
6477 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6478 if (ret) {
6479 dev_info(&pf->pdev->dev,
6480 "update vsi switch failed, err %s aq_err %s\n",
6481 i40e_stat_str(&pf->hw, ret),
6482 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6483 }
6484 }
6485
6486 /**
6487 * i40e_disable_pf_switch_lb
6488 * @pf: pointer to the PF structure
6489 *
6490 * disable switch loop back or die - no point in a return value
6491 **/
6492 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6493 {
6494 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6495 struct i40e_vsi_context ctxt;
6496 int ret;
6497
6498 ctxt.seid = pf->main_vsi_seid;
6499 ctxt.pf_num = pf->hw.pf_id;
6500 ctxt.vf_num = 0;
6501 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6502 if (ret) {
6503 dev_info(&pf->pdev->dev,
6504 "couldn't get PF vsi config, err %s aq_err %s\n",
6505 i40e_stat_str(&pf->hw, ret),
6506 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6507 return;
6508 }
6509 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6510 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6511 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6512
6513 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6514 if (ret) {
6515 dev_info(&pf->pdev->dev,
6516 "update vsi switch failed, err %s aq_err %s\n",
6517 i40e_stat_str(&pf->hw, ret),
6518 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6519 }
6520 }
6521
6522 /**
6523 * i40e_config_bridge_mode - Configure the HW bridge mode
6524 * @veb: pointer to the bridge instance
6525 *
6526 * Configure the loop back mode for the LAN VSI that is downlink to the
6527 * specified HW bridge instance. It is expected this function is called
6528 * when a new HW bridge is instantiated.
6529 **/
6530 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6531 {
6532 struct i40e_pf *pf = veb->pf;
6533
6534 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6535 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6536 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6537 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6538 i40e_disable_pf_switch_lb(pf);
6539 else
6540 i40e_enable_pf_switch_lb(pf);
6541 }
6542
6543 /**
6544 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6545 * @veb: pointer to the VEB instance
6546 *
6547 * This is a recursive function that first builds the attached VSIs then
6548 * recurses in to build the next layer of VEB. We track the connections
6549 * through our own index numbers because the seid's from the HW could
6550 * change across the reset.
6551 **/
6552 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6553 {
6554 struct i40e_vsi *ctl_vsi = NULL;
6555 struct i40e_pf *pf = veb->pf;
6556 int v, veb_idx;
6557 int ret;
6558
6559 /* build VSI that owns this VEB, temporarily attached to base VEB */
6560 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6561 if (pf->vsi[v] &&
6562 pf->vsi[v]->veb_idx == veb->idx &&
6563 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6564 ctl_vsi = pf->vsi[v];
6565 break;
6566 }
6567 }
6568 if (!ctl_vsi) {
6569 dev_info(&pf->pdev->dev,
6570 "missing owner VSI for veb_idx %d\n", veb->idx);
6571 ret = -ENOENT;
6572 goto end_reconstitute;
6573 }
6574 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6575 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6576 ret = i40e_add_vsi(ctl_vsi);
6577 if (ret) {
6578 dev_info(&pf->pdev->dev,
6579 "rebuild of veb_idx %d owner VSI failed: %d\n",
6580 veb->idx, ret);
6581 goto end_reconstitute;
6582 }
6583 i40e_vsi_reset_stats(ctl_vsi);
6584
6585 /* create the VEB in the switch and move the VSI onto the VEB */
6586 ret = i40e_add_veb(veb, ctl_vsi);
6587 if (ret)
6588 goto end_reconstitute;
6589
6590 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6591 veb->bridge_mode = BRIDGE_MODE_VEB;
6592 else
6593 veb->bridge_mode = BRIDGE_MODE_VEPA;
6594 i40e_config_bridge_mode(veb);
6595
6596 /* create the remaining VSIs attached to this VEB */
6597 for (v = 0; v < pf->num_alloc_vsi; v++) {
6598 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6599 continue;
6600
6601 if (pf->vsi[v]->veb_idx == veb->idx) {
6602 struct i40e_vsi *vsi = pf->vsi[v];
6603
6604 vsi->uplink_seid = veb->seid;
6605 ret = i40e_add_vsi(vsi);
6606 if (ret) {
6607 dev_info(&pf->pdev->dev,
6608 "rebuild of vsi_idx %d failed: %d\n",
6609 v, ret);
6610 goto end_reconstitute;
6611 }
6612 i40e_vsi_reset_stats(vsi);
6613 }
6614 }
6615
6616 /* create any VEBs attached to this VEB - RECURSION */
6617 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6618 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6619 pf->veb[veb_idx]->uplink_seid = veb->seid;
6620 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6621 if (ret)
6622 break;
6623 }
6624 }
6625
6626 end_reconstitute:
6627 return ret;
6628 }
6629
6630 /**
6631 * i40e_get_capabilities - get info about the HW
6632 * @pf: the PF struct
6633 **/
6634 static int i40e_get_capabilities(struct i40e_pf *pf)
6635 {
6636 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6637 u16 data_size;
6638 int buf_len;
6639 int err;
6640
6641 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6642 do {
6643 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6644 if (!cap_buf)
6645 return -ENOMEM;
6646
6647 /* this loads the data into the hw struct for us */
6648 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6649 &data_size,
6650 i40e_aqc_opc_list_func_capabilities,
6651 NULL);
6652 /* data loaded, buffer no longer needed */
6653 kfree(cap_buf);
6654
6655 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6656 /* retry with a larger buffer */
6657 buf_len = data_size;
6658 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6659 dev_info(&pf->pdev->dev,
6660 "capability discovery failed, err %s aq_err %s\n",
6661 i40e_stat_str(&pf->hw, err),
6662 i40e_aq_str(&pf->hw,
6663 pf->hw.aq.asq_last_status));
6664 return -ENODEV;
6665 }
6666 } while (err);
6667
6668 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6669 dev_info(&pf->pdev->dev,
6670 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6671 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6672 pf->hw.func_caps.num_msix_vectors,
6673 pf->hw.func_caps.num_msix_vectors_vf,
6674 pf->hw.func_caps.fd_filters_guaranteed,
6675 pf->hw.func_caps.fd_filters_best_effort,
6676 pf->hw.func_caps.num_tx_qp,
6677 pf->hw.func_caps.num_vsis);
6678
6679 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6680 + pf->hw.func_caps.num_vfs)
6681 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6682 dev_info(&pf->pdev->dev,
6683 "got num_vsis %d, setting num_vsis to %d\n",
6684 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6685 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6686 }
6687
6688 return 0;
6689 }
6690
6691 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6692
6693 /**
6694 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6695 * @pf: board private structure
6696 **/
6697 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6698 {
6699 struct i40e_vsi *vsi;
6700 int i;
6701
6702 /* quick workaround for an NVM issue that leaves a critical register
6703 * uninitialized
6704 */
6705 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6706 static const u32 hkey[] = {
6707 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6708 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6709 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6710 0x95b3a76d};
6711
6712 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6713 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6714 }
6715
6716 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6717 return;
6718
6719 /* find existing VSI and see if it needs configuring */
6720 vsi = NULL;
6721 for (i = 0; i < pf->num_alloc_vsi; i++) {
6722 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6723 vsi = pf->vsi[i];
6724 break;
6725 }
6726 }
6727
6728 /* create a new VSI if none exists */
6729 if (!vsi) {
6730 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6731 pf->vsi[pf->lan_vsi]->seid, 0);
6732 if (!vsi) {
6733 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6734 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6735 return;
6736 }
6737 }
6738
6739 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6740 }
6741
6742 /**
6743 * i40e_fdir_teardown - release the Flow Director resources
6744 * @pf: board private structure
6745 **/
6746 static void i40e_fdir_teardown(struct i40e_pf *pf)
6747 {
6748 int i;
6749
6750 i40e_fdir_filter_exit(pf);
6751 for (i = 0; i < pf->num_alloc_vsi; i++) {
6752 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6753 i40e_vsi_release(pf->vsi[i]);
6754 break;
6755 }
6756 }
6757 }
6758
6759 /**
6760 * i40e_prep_for_reset - prep for the core to reset
6761 * @pf: board private structure
6762 *
6763 * Close up the VFs and other things in prep for PF Reset.
6764 **/
6765 static void i40e_prep_for_reset(struct i40e_pf *pf)
6766 {
6767 struct i40e_hw *hw = &pf->hw;
6768 i40e_status ret = 0;
6769 u32 v;
6770
6771 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6772 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6773 return;
6774 if (i40e_check_asq_alive(&pf->hw))
6775 i40e_vc_notify_reset(pf);
6776
6777 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6778
6779 /* quiesce the VSIs and their queues that are not already DOWN */
6780 i40e_pf_quiesce_all_vsi(pf);
6781
6782 for (v = 0; v < pf->num_alloc_vsi; v++) {
6783 if (pf->vsi[v])
6784 pf->vsi[v]->seid = 0;
6785 }
6786
6787 i40e_shutdown_adminq(&pf->hw);
6788
6789 /* call shutdown HMC */
6790 if (hw->hmc.hmc_obj) {
6791 ret = i40e_shutdown_lan_hmc(hw);
6792 if (ret)
6793 dev_warn(&pf->pdev->dev,
6794 "shutdown_lan_hmc failed: %d\n", ret);
6795 }
6796 }
6797
6798 /**
6799 * i40e_send_version - update firmware with driver version
6800 * @pf: PF struct
6801 */
6802 static void i40e_send_version(struct i40e_pf *pf)
6803 {
6804 struct i40e_driver_version dv;
6805
6806 dv.major_version = DRV_VERSION_MAJOR;
6807 dv.minor_version = DRV_VERSION_MINOR;
6808 dv.build_version = DRV_VERSION_BUILD;
6809 dv.subbuild_version = 0;
6810 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6811 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6812 }
6813
6814 /**
6815 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6816 * @pf: board private structure
6817 * @reinit: if the Main VSI needs to re-initialized.
6818 **/
6819 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6820 {
6821 struct i40e_hw *hw = &pf->hw;
6822 u8 set_fc_aq_fail = 0;
6823 i40e_status ret;
6824 u32 val;
6825 u32 v;
6826
6827 /* Now we wait for GRST to settle out.
6828 * We don't have to delete the VEBs or VSIs from the hw switch
6829 * because the reset will make them disappear.
6830 */
6831 ret = i40e_pf_reset(hw);
6832 if (ret) {
6833 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6834 set_bit(__I40E_RESET_FAILED, &pf->state);
6835 goto clear_recovery;
6836 }
6837 pf->pfr_count++;
6838
6839 if (test_bit(__I40E_DOWN, &pf->state))
6840 goto clear_recovery;
6841 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6842
6843 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6844 ret = i40e_init_adminq(&pf->hw);
6845 if (ret) {
6846 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6847 i40e_stat_str(&pf->hw, ret),
6848 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6849 goto clear_recovery;
6850 }
6851
6852 /* re-verify the eeprom if we just had an EMP reset */
6853 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6854 i40e_verify_eeprom(pf);
6855
6856 i40e_clear_pxe_mode(hw);
6857 ret = i40e_get_capabilities(pf);
6858 if (ret)
6859 goto end_core_reset;
6860
6861 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6862 hw->func_caps.num_rx_qp,
6863 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6864 if (ret) {
6865 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6866 goto end_core_reset;
6867 }
6868 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6869 if (ret) {
6870 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6871 goto end_core_reset;
6872 }
6873
6874 #ifdef CONFIG_I40E_DCB
6875 ret = i40e_init_pf_dcb(pf);
6876 if (ret) {
6877 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6878 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6879 /* Continue without DCB enabled */
6880 }
6881 #endif /* CONFIG_I40E_DCB */
6882 #ifdef I40E_FCOE
6883 i40e_init_pf_fcoe(pf);
6884
6885 #endif
6886 /* do basic switch setup */
6887 ret = i40e_setup_pf_switch(pf, reinit);
6888 if (ret)
6889 goto end_core_reset;
6890
6891 /* The driver only wants link up/down and module qualification
6892 * reports from firmware. Note the negative logic.
6893 */
6894 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6895 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6896 I40E_AQ_EVENT_MEDIA_NA |
6897 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6898 if (ret)
6899 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6900 i40e_stat_str(&pf->hw, ret),
6901 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6902
6903 /* make sure our flow control settings are restored */
6904 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6905 if (ret)
6906 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6907 i40e_stat_str(&pf->hw, ret),
6908 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6909
6910 /* Rebuild the VSIs and VEBs that existed before reset.
6911 * They are still in our local switch element arrays, so only
6912 * need to rebuild the switch model in the HW.
6913 *
6914 * If there were VEBs but the reconstitution failed, we'll try
6915 * try to recover minimal use by getting the basic PF VSI working.
6916 */
6917 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6918 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6919 /* find the one VEB connected to the MAC, and find orphans */
6920 for (v = 0; v < I40E_MAX_VEB; v++) {
6921 if (!pf->veb[v])
6922 continue;
6923
6924 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6925 pf->veb[v]->uplink_seid == 0) {
6926 ret = i40e_reconstitute_veb(pf->veb[v]);
6927
6928 if (!ret)
6929 continue;
6930
6931 /* If Main VEB failed, we're in deep doodoo,
6932 * so give up rebuilding the switch and set up
6933 * for minimal rebuild of PF VSI.
6934 * If orphan failed, we'll report the error
6935 * but try to keep going.
6936 */
6937 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6938 dev_info(&pf->pdev->dev,
6939 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6940 ret);
6941 pf->vsi[pf->lan_vsi]->uplink_seid
6942 = pf->mac_seid;
6943 break;
6944 } else if (pf->veb[v]->uplink_seid == 0) {
6945 dev_info(&pf->pdev->dev,
6946 "rebuild of orphan VEB failed: %d\n",
6947 ret);
6948 }
6949 }
6950 }
6951 }
6952
6953 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6954 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6955 /* no VEB, so rebuild only the Main VSI */
6956 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6957 if (ret) {
6958 dev_info(&pf->pdev->dev,
6959 "rebuild of Main VSI failed: %d\n", ret);
6960 goto end_core_reset;
6961 }
6962 }
6963
6964 /* Reconfigure hardware for allowing smaller MSS in the case
6965 * of TSO, so that we avoid the MDD being fired and causing
6966 * a reset in the case of small MSS+TSO.
6967 */
6968 #define I40E_REG_MSS 0x000E64DC
6969 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6970 #define I40E_64BYTE_MSS 0x400000
6971 val = rd32(hw, I40E_REG_MSS);
6972 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6973 val &= ~I40E_REG_MSS_MIN_MASK;
6974 val |= I40E_64BYTE_MSS;
6975 wr32(hw, I40E_REG_MSS, val);
6976 }
6977
6978 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6979 msleep(75);
6980 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6981 if (ret)
6982 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6983 i40e_stat_str(&pf->hw, ret),
6984 i40e_aq_str(&pf->hw,
6985 pf->hw.aq.asq_last_status));
6986 }
6987 /* reinit the misc interrupt */
6988 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6989 ret = i40e_setup_misc_vector(pf);
6990
6991 /* Add a filter to drop all Flow control frames from any VSI from being
6992 * transmitted. By doing so we stop a malicious VF from sending out
6993 * PAUSE or PFC frames and potentially controlling traffic for other
6994 * PF/VF VSIs.
6995 * The FW can still send Flow control frames if enabled.
6996 */
6997 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6998 pf->main_vsi_seid);
6999
7000 /* restart the VSIs that were rebuilt and running before the reset */
7001 i40e_pf_unquiesce_all_vsi(pf);
7002
7003 if (pf->num_alloc_vfs) {
7004 for (v = 0; v < pf->num_alloc_vfs; v++)
7005 i40e_reset_vf(&pf->vf[v], true);
7006 }
7007
7008 /* tell the firmware that we're starting */
7009 i40e_send_version(pf);
7010
7011 end_core_reset:
7012 clear_bit(__I40E_RESET_FAILED, &pf->state);
7013 clear_recovery:
7014 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
7015 }
7016
7017 /**
7018 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
7019 * @pf: board private structure
7020 *
7021 * Close up the VFs and other things in prep for a Core Reset,
7022 * then get ready to rebuild the world.
7023 **/
7024 static void i40e_handle_reset_warning(struct i40e_pf *pf)
7025 {
7026 i40e_prep_for_reset(pf);
7027 i40e_reset_and_rebuild(pf, false);
7028 }
7029
7030 /**
7031 * i40e_handle_mdd_event
7032 * @pf: pointer to the PF structure
7033 *
7034 * Called from the MDD irq handler to identify possibly malicious vfs
7035 **/
7036 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7037 {
7038 struct i40e_hw *hw = &pf->hw;
7039 bool mdd_detected = false;
7040 bool pf_mdd_detected = false;
7041 struct i40e_vf *vf;
7042 u32 reg;
7043 int i;
7044
7045 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7046 return;
7047
7048 /* find what triggered the MDD event */
7049 reg = rd32(hw, I40E_GL_MDET_TX);
7050 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7051 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7052 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7053 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7054 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7055 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7056 I40E_GL_MDET_TX_EVENT_SHIFT;
7057 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7058 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7059 pf->hw.func_caps.base_queue;
7060 if (netif_msg_tx_err(pf))
7061 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7062 event, queue, pf_num, vf_num);
7063 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7064 mdd_detected = true;
7065 }
7066 reg = rd32(hw, I40E_GL_MDET_RX);
7067 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7068 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7069 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7070 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7071 I40E_GL_MDET_RX_EVENT_SHIFT;
7072 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7073 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7074 pf->hw.func_caps.base_queue;
7075 if (netif_msg_rx_err(pf))
7076 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7077 event, queue, func);
7078 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7079 mdd_detected = true;
7080 }
7081
7082 if (mdd_detected) {
7083 reg = rd32(hw, I40E_PF_MDET_TX);
7084 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7085 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7086 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7087 pf_mdd_detected = true;
7088 }
7089 reg = rd32(hw, I40E_PF_MDET_RX);
7090 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7091 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7092 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7093 pf_mdd_detected = true;
7094 }
7095 /* Queue belongs to the PF, initiate a reset */
7096 if (pf_mdd_detected) {
7097 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7098 i40e_service_event_schedule(pf);
7099 }
7100 }
7101
7102 /* see if one of the VFs needs its hand slapped */
7103 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7104 vf = &(pf->vf[i]);
7105 reg = rd32(hw, I40E_VP_MDET_TX(i));
7106 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7107 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7108 vf->num_mdd_events++;
7109 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7110 i);
7111 }
7112
7113 reg = rd32(hw, I40E_VP_MDET_RX(i));
7114 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7115 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7116 vf->num_mdd_events++;
7117 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7118 i);
7119 }
7120
7121 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7122 dev_info(&pf->pdev->dev,
7123 "Too many MDD events on VF %d, disabled\n", i);
7124 dev_info(&pf->pdev->dev,
7125 "Use PF Control I/F to re-enable the VF\n");
7126 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7127 }
7128 }
7129
7130 /* re-enable mdd interrupt cause */
7131 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7132 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7133 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7134 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7135 i40e_flush(hw);
7136 }
7137
7138 /**
7139 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7140 * @pf: board private structure
7141 **/
7142 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7143 {
7144 struct i40e_hw *hw = &pf->hw;
7145 i40e_status ret;
7146 __be16 port;
7147 int i;
7148
7149 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7150 return;
7151
7152 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7153
7154 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7155 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7156 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7157 port = pf->udp_ports[i].index;
7158 if (port)
7159 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7160 pf->udp_ports[i].type,
7161 NULL, NULL);
7162 else
7163 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7164
7165 if (ret) {
7166 dev_dbg(&pf->pdev->dev,
7167 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7168 pf->udp_ports[i].type ? "vxlan" : "geneve",
7169 port ? "add" : "delete",
7170 ntohs(port), i,
7171 i40e_stat_str(&pf->hw, ret),
7172 i40e_aq_str(&pf->hw,
7173 pf->hw.aq.asq_last_status));
7174 pf->udp_ports[i].index = 0;
7175 }
7176 }
7177 }
7178 }
7179
7180 /**
7181 * i40e_service_task - Run the driver's async subtasks
7182 * @work: pointer to work_struct containing our data
7183 **/
7184 static void i40e_service_task(struct work_struct *work)
7185 {
7186 struct i40e_pf *pf = container_of(work,
7187 struct i40e_pf,
7188 service_task);
7189 unsigned long start_time = jiffies;
7190
7191 /* don't bother with service tasks if a reset is in progress */
7192 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7193 i40e_service_event_complete(pf);
7194 return;
7195 }
7196
7197 i40e_detect_recover_hung(pf);
7198 i40e_sync_filters_subtask(pf);
7199 i40e_reset_subtask(pf);
7200 i40e_handle_mdd_event(pf);
7201 i40e_vc_process_vflr_event(pf);
7202 i40e_watchdog_subtask(pf);
7203 i40e_fdir_reinit_subtask(pf);
7204 i40e_client_subtask(pf);
7205 i40e_sync_filters_subtask(pf);
7206 i40e_sync_udp_filters_subtask(pf);
7207 i40e_clean_adminq_subtask(pf);
7208
7209 i40e_service_event_complete(pf);
7210
7211 /* If the tasks have taken longer than one timer cycle or there
7212 * is more work to be done, reschedule the service task now
7213 * rather than wait for the timer to tick again.
7214 */
7215 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7216 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7217 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7218 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7219 i40e_service_event_schedule(pf);
7220 }
7221
7222 /**
7223 * i40e_service_timer - timer callback
7224 * @data: pointer to PF struct
7225 **/
7226 static void i40e_service_timer(unsigned long data)
7227 {
7228 struct i40e_pf *pf = (struct i40e_pf *)data;
7229
7230 mod_timer(&pf->service_timer,
7231 round_jiffies(jiffies + pf->service_timer_period));
7232 i40e_service_event_schedule(pf);
7233 }
7234
7235 /**
7236 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7237 * @vsi: the VSI being configured
7238 **/
7239 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7240 {
7241 struct i40e_pf *pf = vsi->back;
7242
7243 switch (vsi->type) {
7244 case I40E_VSI_MAIN:
7245 vsi->alloc_queue_pairs = pf->num_lan_qps;
7246 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7247 I40E_REQ_DESCRIPTOR_MULTIPLE);
7248 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7249 vsi->num_q_vectors = pf->num_lan_msix;
7250 else
7251 vsi->num_q_vectors = 1;
7252
7253 break;
7254
7255 case I40E_VSI_FDIR:
7256 vsi->alloc_queue_pairs = 1;
7257 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7258 I40E_REQ_DESCRIPTOR_MULTIPLE);
7259 vsi->num_q_vectors = pf->num_fdsb_msix;
7260 break;
7261
7262 case I40E_VSI_VMDQ2:
7263 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7264 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7265 I40E_REQ_DESCRIPTOR_MULTIPLE);
7266 vsi->num_q_vectors = pf->num_vmdq_msix;
7267 break;
7268
7269 case I40E_VSI_SRIOV:
7270 vsi->alloc_queue_pairs = pf->num_vf_qps;
7271 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7272 I40E_REQ_DESCRIPTOR_MULTIPLE);
7273 break;
7274
7275 #ifdef I40E_FCOE
7276 case I40E_VSI_FCOE:
7277 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7278 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7279 I40E_REQ_DESCRIPTOR_MULTIPLE);
7280 vsi->num_q_vectors = pf->num_fcoe_msix;
7281 break;
7282
7283 #endif /* I40E_FCOE */
7284 default:
7285 WARN_ON(1);
7286 return -ENODATA;
7287 }
7288
7289 return 0;
7290 }
7291
7292 /**
7293 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7294 * @type: VSI pointer
7295 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7296 *
7297 * On error: returns error code (negative)
7298 * On success: returns 0
7299 **/
7300 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7301 {
7302 int size;
7303 int ret = 0;
7304
7305 /* allocate memory for both Tx and Rx ring pointers */
7306 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7307 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7308 if (!vsi->tx_rings)
7309 return -ENOMEM;
7310 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7311
7312 if (alloc_qvectors) {
7313 /* allocate memory for q_vector pointers */
7314 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7315 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7316 if (!vsi->q_vectors) {
7317 ret = -ENOMEM;
7318 goto err_vectors;
7319 }
7320 }
7321 return ret;
7322
7323 err_vectors:
7324 kfree(vsi->tx_rings);
7325 return ret;
7326 }
7327
7328 /**
7329 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7330 * @pf: board private structure
7331 * @type: type of VSI
7332 *
7333 * On error: returns error code (negative)
7334 * On success: returns vsi index in PF (positive)
7335 **/
7336 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7337 {
7338 int ret = -ENODEV;
7339 struct i40e_vsi *vsi;
7340 int vsi_idx;
7341 int i;
7342
7343 /* Need to protect the allocation of the VSIs at the PF level */
7344 mutex_lock(&pf->switch_mutex);
7345
7346 /* VSI list may be fragmented if VSI creation/destruction has
7347 * been happening. We can afford to do a quick scan to look
7348 * for any free VSIs in the list.
7349 *
7350 * find next empty vsi slot, looping back around if necessary
7351 */
7352 i = pf->next_vsi;
7353 while (i < pf->num_alloc_vsi && pf->vsi[i])
7354 i++;
7355 if (i >= pf->num_alloc_vsi) {
7356 i = 0;
7357 while (i < pf->next_vsi && pf->vsi[i])
7358 i++;
7359 }
7360
7361 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7362 vsi_idx = i; /* Found one! */
7363 } else {
7364 ret = -ENODEV;
7365 goto unlock_pf; /* out of VSI slots! */
7366 }
7367 pf->next_vsi = ++i;
7368
7369 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7370 if (!vsi) {
7371 ret = -ENOMEM;
7372 goto unlock_pf;
7373 }
7374 vsi->type = type;
7375 vsi->back = pf;
7376 set_bit(__I40E_DOWN, &vsi->state);
7377 vsi->flags = 0;
7378 vsi->idx = vsi_idx;
7379 vsi->int_rate_limit = 0;
7380 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7381 pf->rss_table_size : 64;
7382 vsi->netdev_registered = false;
7383 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7384 INIT_LIST_HEAD(&vsi->mac_filter_list);
7385 vsi->irqs_ready = false;
7386
7387 ret = i40e_set_num_rings_in_vsi(vsi);
7388 if (ret)
7389 goto err_rings;
7390
7391 ret = i40e_vsi_alloc_arrays(vsi, true);
7392 if (ret)
7393 goto err_rings;
7394
7395 /* Setup default MSIX irq handler for VSI */
7396 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7397
7398 /* Initialize VSI lock */
7399 spin_lock_init(&vsi->mac_filter_list_lock);
7400 pf->vsi[vsi_idx] = vsi;
7401 ret = vsi_idx;
7402 goto unlock_pf;
7403
7404 err_rings:
7405 pf->next_vsi = i - 1;
7406 kfree(vsi);
7407 unlock_pf:
7408 mutex_unlock(&pf->switch_mutex);
7409 return ret;
7410 }
7411
7412 /**
7413 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7414 * @type: VSI pointer
7415 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7416 *
7417 * On error: returns error code (negative)
7418 * On success: returns 0
7419 **/
7420 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7421 {
7422 /* free the ring and vector containers */
7423 if (free_qvectors) {
7424 kfree(vsi->q_vectors);
7425 vsi->q_vectors = NULL;
7426 }
7427 kfree(vsi->tx_rings);
7428 vsi->tx_rings = NULL;
7429 vsi->rx_rings = NULL;
7430 }
7431
7432 /**
7433 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7434 * and lookup table
7435 * @vsi: Pointer to VSI structure
7436 */
7437 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7438 {
7439 if (!vsi)
7440 return;
7441
7442 kfree(vsi->rss_hkey_user);
7443 vsi->rss_hkey_user = NULL;
7444
7445 kfree(vsi->rss_lut_user);
7446 vsi->rss_lut_user = NULL;
7447 }
7448
7449 /**
7450 * i40e_vsi_clear - Deallocate the VSI provided
7451 * @vsi: the VSI being un-configured
7452 **/
7453 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7454 {
7455 struct i40e_pf *pf;
7456
7457 if (!vsi)
7458 return 0;
7459
7460 if (!vsi->back)
7461 goto free_vsi;
7462 pf = vsi->back;
7463
7464 mutex_lock(&pf->switch_mutex);
7465 if (!pf->vsi[vsi->idx]) {
7466 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7467 vsi->idx, vsi->idx, vsi, vsi->type);
7468 goto unlock_vsi;
7469 }
7470
7471 if (pf->vsi[vsi->idx] != vsi) {
7472 dev_err(&pf->pdev->dev,
7473 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7474 pf->vsi[vsi->idx]->idx,
7475 pf->vsi[vsi->idx],
7476 pf->vsi[vsi->idx]->type,
7477 vsi->idx, vsi, vsi->type);
7478 goto unlock_vsi;
7479 }
7480
7481 /* updates the PF for this cleared vsi */
7482 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7483 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7484
7485 i40e_vsi_free_arrays(vsi, true);
7486 i40e_clear_rss_config_user(vsi);
7487
7488 pf->vsi[vsi->idx] = NULL;
7489 if (vsi->idx < pf->next_vsi)
7490 pf->next_vsi = vsi->idx;
7491
7492 unlock_vsi:
7493 mutex_unlock(&pf->switch_mutex);
7494 free_vsi:
7495 kfree(vsi);
7496
7497 return 0;
7498 }
7499
7500 /**
7501 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7502 * @vsi: the VSI being cleaned
7503 **/
7504 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7505 {
7506 int i;
7507
7508 if (vsi->tx_rings && vsi->tx_rings[0]) {
7509 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7510 kfree_rcu(vsi->tx_rings[i], rcu);
7511 vsi->tx_rings[i] = NULL;
7512 vsi->rx_rings[i] = NULL;
7513 }
7514 }
7515 }
7516
7517 /**
7518 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7519 * @vsi: the VSI being configured
7520 **/
7521 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7522 {
7523 struct i40e_ring *tx_ring, *rx_ring;
7524 struct i40e_pf *pf = vsi->back;
7525 int i;
7526
7527 /* Set basic values in the rings to be used later during open() */
7528 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7529 /* allocate space for both Tx and Rx in one shot */
7530 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7531 if (!tx_ring)
7532 goto err_out;
7533
7534 tx_ring->queue_index = i;
7535 tx_ring->reg_idx = vsi->base_queue + i;
7536 tx_ring->ring_active = false;
7537 tx_ring->vsi = vsi;
7538 tx_ring->netdev = vsi->netdev;
7539 tx_ring->dev = &pf->pdev->dev;
7540 tx_ring->count = vsi->num_desc;
7541 tx_ring->size = 0;
7542 tx_ring->dcb_tc = 0;
7543 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7544 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7545 tx_ring->tx_itr_setting = pf->tx_itr_default;
7546 vsi->tx_rings[i] = tx_ring;
7547
7548 rx_ring = &tx_ring[1];
7549 rx_ring->queue_index = i;
7550 rx_ring->reg_idx = vsi->base_queue + i;
7551 rx_ring->ring_active = false;
7552 rx_ring->vsi = vsi;
7553 rx_ring->netdev = vsi->netdev;
7554 rx_ring->dev = &pf->pdev->dev;
7555 rx_ring->count = vsi->num_desc;
7556 rx_ring->size = 0;
7557 rx_ring->dcb_tc = 0;
7558 rx_ring->rx_itr_setting = pf->rx_itr_default;
7559 vsi->rx_rings[i] = rx_ring;
7560 }
7561
7562 return 0;
7563
7564 err_out:
7565 i40e_vsi_clear_rings(vsi);
7566 return -ENOMEM;
7567 }
7568
7569 /**
7570 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7571 * @pf: board private structure
7572 * @vectors: the number of MSI-X vectors to request
7573 *
7574 * Returns the number of vectors reserved, or error
7575 **/
7576 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7577 {
7578 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7579 I40E_MIN_MSIX, vectors);
7580 if (vectors < 0) {
7581 dev_info(&pf->pdev->dev,
7582 "MSI-X vector reservation failed: %d\n", vectors);
7583 vectors = 0;
7584 }
7585
7586 return vectors;
7587 }
7588
7589 /**
7590 * i40e_init_msix - Setup the MSIX capability
7591 * @pf: board private structure
7592 *
7593 * Work with the OS to set up the MSIX vectors needed.
7594 *
7595 * Returns the number of vectors reserved or negative on failure
7596 **/
7597 static int i40e_init_msix(struct i40e_pf *pf)
7598 {
7599 struct i40e_hw *hw = &pf->hw;
7600 int vectors_left;
7601 int v_budget, i;
7602 int v_actual;
7603 int iwarp_requested = 0;
7604
7605 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7606 return -ENODEV;
7607
7608 /* The number of vectors we'll request will be comprised of:
7609 * - Add 1 for "other" cause for Admin Queue events, etc.
7610 * - The number of LAN queue pairs
7611 * - Queues being used for RSS.
7612 * We don't need as many as max_rss_size vectors.
7613 * use rss_size instead in the calculation since that
7614 * is governed by number of cpus in the system.
7615 * - assumes symmetric Tx/Rx pairing
7616 * - The number of VMDq pairs
7617 * - The CPU count within the NUMA node if iWARP is enabled
7618 #ifdef I40E_FCOE
7619 * - The number of FCOE qps.
7620 #endif
7621 * Once we count this up, try the request.
7622 *
7623 * If we can't get what we want, we'll simplify to nearly nothing
7624 * and try again. If that still fails, we punt.
7625 */
7626 vectors_left = hw->func_caps.num_msix_vectors;
7627 v_budget = 0;
7628
7629 /* reserve one vector for miscellaneous handler */
7630 if (vectors_left) {
7631 v_budget++;
7632 vectors_left--;
7633 }
7634
7635 /* reserve vectors for the main PF traffic queues */
7636 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7637 vectors_left -= pf->num_lan_msix;
7638 v_budget += pf->num_lan_msix;
7639
7640 /* reserve one vector for sideband flow director */
7641 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7642 if (vectors_left) {
7643 pf->num_fdsb_msix = 1;
7644 v_budget++;
7645 vectors_left--;
7646 } else {
7647 pf->num_fdsb_msix = 0;
7648 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7649 }
7650 }
7651
7652 #ifdef I40E_FCOE
7653 /* can we reserve enough for FCoE? */
7654 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7655 if (!vectors_left)
7656 pf->num_fcoe_msix = 0;
7657 else if (vectors_left >= pf->num_fcoe_qps)
7658 pf->num_fcoe_msix = pf->num_fcoe_qps;
7659 else
7660 pf->num_fcoe_msix = 1;
7661 v_budget += pf->num_fcoe_msix;
7662 vectors_left -= pf->num_fcoe_msix;
7663 }
7664
7665 #endif
7666 /* can we reserve enough for iWARP? */
7667 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7668 if (!vectors_left)
7669 pf->num_iwarp_msix = 0;
7670 else if (vectors_left < pf->num_iwarp_msix)
7671 pf->num_iwarp_msix = 1;
7672 v_budget += pf->num_iwarp_msix;
7673 vectors_left -= pf->num_iwarp_msix;
7674 }
7675
7676 /* any vectors left over go for VMDq support */
7677 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7678 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7679 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7680
7681 /* if we're short on vectors for what's desired, we limit
7682 * the queues per vmdq. If this is still more than are
7683 * available, the user will need to change the number of
7684 * queues/vectors used by the PF later with the ethtool
7685 * channels command
7686 */
7687 if (vmdq_vecs < vmdq_vecs_wanted)
7688 pf->num_vmdq_qps = 1;
7689 pf->num_vmdq_msix = pf->num_vmdq_qps;
7690
7691 v_budget += vmdq_vecs;
7692 vectors_left -= vmdq_vecs;
7693 }
7694
7695 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7696 GFP_KERNEL);
7697 if (!pf->msix_entries)
7698 return -ENOMEM;
7699
7700 for (i = 0; i < v_budget; i++)
7701 pf->msix_entries[i].entry = i;
7702 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7703
7704 if (v_actual != v_budget) {
7705 /* If we have limited resources, we will start with no vectors
7706 * for the special features and then allocate vectors to some
7707 * of these features based on the policy and at the end disable
7708 * the features that did not get any vectors.
7709 */
7710 iwarp_requested = pf->num_iwarp_msix;
7711 pf->num_iwarp_msix = 0;
7712 #ifdef I40E_FCOE
7713 pf->num_fcoe_qps = 0;
7714 pf->num_fcoe_msix = 0;
7715 #endif
7716 pf->num_vmdq_msix = 0;
7717 }
7718
7719 if (v_actual < I40E_MIN_MSIX) {
7720 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7721 kfree(pf->msix_entries);
7722 pf->msix_entries = NULL;
7723 return -ENODEV;
7724
7725 } else if (v_actual == I40E_MIN_MSIX) {
7726 /* Adjust for minimal MSIX use */
7727 pf->num_vmdq_vsis = 0;
7728 pf->num_vmdq_qps = 0;
7729 pf->num_lan_qps = 1;
7730 pf->num_lan_msix = 1;
7731
7732 } else if (v_actual != v_budget) {
7733 int vec;
7734
7735 /* reserve the misc vector */
7736 vec = v_actual - 1;
7737
7738 /* Scale vector usage down */
7739 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7740 pf->num_vmdq_vsis = 1;
7741 pf->num_vmdq_qps = 1;
7742 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7743
7744 /* partition out the remaining vectors */
7745 switch (vec) {
7746 case 2:
7747 pf->num_lan_msix = 1;
7748 break;
7749 case 3:
7750 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7751 pf->num_lan_msix = 1;
7752 pf->num_iwarp_msix = 1;
7753 } else {
7754 pf->num_lan_msix = 2;
7755 }
7756 #ifdef I40E_FCOE
7757 /* give one vector to FCoE */
7758 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7759 pf->num_lan_msix = 1;
7760 pf->num_fcoe_msix = 1;
7761 }
7762 #endif
7763 break;
7764 default:
7765 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7766 pf->num_iwarp_msix = min_t(int, (vec / 3),
7767 iwarp_requested);
7768 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7769 I40E_DEFAULT_NUM_VMDQ_VSI);
7770 } else {
7771 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7772 I40E_DEFAULT_NUM_VMDQ_VSI);
7773 }
7774 pf->num_lan_msix = min_t(int,
7775 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7776 pf->num_lan_msix);
7777 #ifdef I40E_FCOE
7778 /* give one vector to FCoE */
7779 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7780 pf->num_fcoe_msix = 1;
7781 vec--;
7782 }
7783 #endif
7784 break;
7785 }
7786 }
7787
7788 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7789 (pf->num_vmdq_msix == 0)) {
7790 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7791 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7792 }
7793
7794 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7795 (pf->num_iwarp_msix == 0)) {
7796 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7797 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7798 }
7799 #ifdef I40E_FCOE
7800
7801 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7802 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7803 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7804 }
7805 #endif
7806 return v_actual;
7807 }
7808
7809 /**
7810 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7811 * @vsi: the VSI being configured
7812 * @v_idx: index of the vector in the vsi struct
7813 * @cpu: cpu to be used on affinity_mask
7814 *
7815 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7816 **/
7817 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
7818 {
7819 struct i40e_q_vector *q_vector;
7820
7821 /* allocate q_vector */
7822 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7823 if (!q_vector)
7824 return -ENOMEM;
7825
7826 q_vector->vsi = vsi;
7827 q_vector->v_idx = v_idx;
7828 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
7829
7830 if (vsi->netdev)
7831 netif_napi_add(vsi->netdev, &q_vector->napi,
7832 i40e_napi_poll, NAPI_POLL_WEIGHT);
7833
7834 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7835 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7836
7837 /* tie q_vector and vsi together */
7838 vsi->q_vectors[v_idx] = q_vector;
7839
7840 return 0;
7841 }
7842
7843 /**
7844 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7845 * @vsi: the VSI being configured
7846 *
7847 * We allocate one q_vector per queue interrupt. If allocation fails we
7848 * return -ENOMEM.
7849 **/
7850 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7851 {
7852 struct i40e_pf *pf = vsi->back;
7853 int err, v_idx, num_q_vectors, current_cpu;
7854
7855 /* if not MSIX, give the one vector only to the LAN VSI */
7856 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7857 num_q_vectors = vsi->num_q_vectors;
7858 else if (vsi == pf->vsi[pf->lan_vsi])
7859 num_q_vectors = 1;
7860 else
7861 return -EINVAL;
7862
7863 current_cpu = cpumask_first(cpu_online_mask);
7864
7865 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7866 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
7867 if (err)
7868 goto err_out;
7869 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
7870 if (unlikely(current_cpu >= nr_cpu_ids))
7871 current_cpu = cpumask_first(cpu_online_mask);
7872 }
7873
7874 return 0;
7875
7876 err_out:
7877 while (v_idx--)
7878 i40e_free_q_vector(vsi, v_idx);
7879
7880 return err;
7881 }
7882
7883 /**
7884 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7885 * @pf: board private structure to initialize
7886 **/
7887 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7888 {
7889 int vectors = 0;
7890 ssize_t size;
7891
7892 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7893 vectors = i40e_init_msix(pf);
7894 if (vectors < 0) {
7895 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7896 I40E_FLAG_IWARP_ENABLED |
7897 #ifdef I40E_FCOE
7898 I40E_FLAG_FCOE_ENABLED |
7899 #endif
7900 I40E_FLAG_RSS_ENABLED |
7901 I40E_FLAG_DCB_CAPABLE |
7902 I40E_FLAG_DCB_ENABLED |
7903 I40E_FLAG_SRIOV_ENABLED |
7904 I40E_FLAG_FD_SB_ENABLED |
7905 I40E_FLAG_FD_ATR_ENABLED |
7906 I40E_FLAG_VMDQ_ENABLED);
7907
7908 /* rework the queue expectations without MSIX */
7909 i40e_determine_queue_usage(pf);
7910 }
7911 }
7912
7913 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7914 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7915 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7916 vectors = pci_enable_msi(pf->pdev);
7917 if (vectors < 0) {
7918 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7919 vectors);
7920 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7921 }
7922 vectors = 1; /* one MSI or Legacy vector */
7923 }
7924
7925 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7926 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7927
7928 /* set up vector assignment tracking */
7929 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7930 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7931 if (!pf->irq_pile) {
7932 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7933 return -ENOMEM;
7934 }
7935 pf->irq_pile->num_entries = vectors;
7936 pf->irq_pile->search_hint = 0;
7937
7938 /* track first vector for misc interrupts, ignore return */
7939 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7940
7941 return 0;
7942 }
7943
7944 /**
7945 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7946 * @pf: board private structure
7947 *
7948 * This sets up the handler for MSIX 0, which is used to manage the
7949 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7950 * when in MSI or Legacy interrupt mode.
7951 **/
7952 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7953 {
7954 struct i40e_hw *hw = &pf->hw;
7955 int err = 0;
7956
7957 /* Only request the irq if this is the first time through, and
7958 * not when we're rebuilding after a Reset
7959 */
7960 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7961 err = request_irq(pf->msix_entries[0].vector,
7962 i40e_intr, 0, pf->int_name, pf);
7963 if (err) {
7964 dev_info(&pf->pdev->dev,
7965 "request_irq for %s failed: %d\n",
7966 pf->int_name, err);
7967 return -EFAULT;
7968 }
7969 }
7970
7971 i40e_enable_misc_int_causes(pf);
7972
7973 /* associate no queues to the misc vector */
7974 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7975 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7976
7977 i40e_flush(hw);
7978
7979 i40e_irq_dynamic_enable_icr0(pf, true);
7980
7981 return err;
7982 }
7983
7984 /**
7985 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7986 * @vsi: vsi structure
7987 * @seed: RSS hash seed
7988 **/
7989 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7990 u8 *lut, u16 lut_size)
7991 {
7992 struct i40e_pf *pf = vsi->back;
7993 struct i40e_hw *hw = &pf->hw;
7994 int ret = 0;
7995
7996 if (seed) {
7997 struct i40e_aqc_get_set_rss_key_data *seed_dw =
7998 (struct i40e_aqc_get_set_rss_key_data *)seed;
7999 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
8000 if (ret) {
8001 dev_info(&pf->pdev->dev,
8002 "Cannot set RSS key, err %s aq_err %s\n",
8003 i40e_stat_str(hw, ret),
8004 i40e_aq_str(hw, hw->aq.asq_last_status));
8005 return ret;
8006 }
8007 }
8008 if (lut) {
8009 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8010
8011 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8012 if (ret) {
8013 dev_info(&pf->pdev->dev,
8014 "Cannot set RSS lut, err %s aq_err %s\n",
8015 i40e_stat_str(hw, ret),
8016 i40e_aq_str(hw, hw->aq.asq_last_status));
8017 return ret;
8018 }
8019 }
8020 return ret;
8021 }
8022
8023 /**
8024 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8025 * @vsi: Pointer to vsi structure
8026 * @seed: Buffter to store the hash keys
8027 * @lut: Buffer to store the lookup table entries
8028 * @lut_size: Size of buffer to store the lookup table entries
8029 *
8030 * Return 0 on success, negative on failure
8031 */
8032 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8033 u8 *lut, u16 lut_size)
8034 {
8035 struct i40e_pf *pf = vsi->back;
8036 struct i40e_hw *hw = &pf->hw;
8037 int ret = 0;
8038
8039 if (seed) {
8040 ret = i40e_aq_get_rss_key(hw, vsi->id,
8041 (struct i40e_aqc_get_set_rss_key_data *)seed);
8042 if (ret) {
8043 dev_info(&pf->pdev->dev,
8044 "Cannot get RSS key, err %s aq_err %s\n",
8045 i40e_stat_str(&pf->hw, ret),
8046 i40e_aq_str(&pf->hw,
8047 pf->hw.aq.asq_last_status));
8048 return ret;
8049 }
8050 }
8051
8052 if (lut) {
8053 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8054
8055 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8056 if (ret) {
8057 dev_info(&pf->pdev->dev,
8058 "Cannot get RSS lut, err %s aq_err %s\n",
8059 i40e_stat_str(&pf->hw, ret),
8060 i40e_aq_str(&pf->hw,
8061 pf->hw.aq.asq_last_status));
8062 return ret;
8063 }
8064 }
8065
8066 return ret;
8067 }
8068
8069 /**
8070 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8071 * @vsi: VSI structure
8072 **/
8073 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8074 {
8075 u8 seed[I40E_HKEY_ARRAY_SIZE];
8076 struct i40e_pf *pf = vsi->back;
8077 u8 *lut;
8078 int ret;
8079
8080 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8081 return 0;
8082
8083 if (!vsi->rss_size)
8084 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8085 vsi->num_queue_pairs);
8086 if (!vsi->rss_size)
8087 return -EINVAL;
8088
8089 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8090 if (!lut)
8091 return -ENOMEM;
8092 /* Use the user configured hash keys and lookup table if there is one,
8093 * otherwise use default
8094 */
8095 if (vsi->rss_lut_user)
8096 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8097 else
8098 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8099 if (vsi->rss_hkey_user)
8100 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8101 else
8102 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8103 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8104 kfree(lut);
8105
8106 return ret;
8107 }
8108
8109 /**
8110 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8111 * @vsi: Pointer to vsi structure
8112 * @seed: RSS hash seed
8113 * @lut: Lookup table
8114 * @lut_size: Lookup table size
8115 *
8116 * Returns 0 on success, negative on failure
8117 **/
8118 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8119 const u8 *lut, u16 lut_size)
8120 {
8121 struct i40e_pf *pf = vsi->back;
8122 struct i40e_hw *hw = &pf->hw;
8123 u16 vf_id = vsi->vf_id;
8124 u8 i;
8125
8126 /* Fill out hash function seed */
8127 if (seed) {
8128 u32 *seed_dw = (u32 *)seed;
8129
8130 if (vsi->type == I40E_VSI_MAIN) {
8131 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8132 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i),
8133 seed_dw[i]);
8134 } else if (vsi->type == I40E_VSI_SRIOV) {
8135 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8136 i40e_write_rx_ctl(hw,
8137 I40E_VFQF_HKEY1(i, vf_id),
8138 seed_dw[i]);
8139 } else {
8140 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8141 }
8142 }
8143
8144 if (lut) {
8145 u32 *lut_dw = (u32 *)lut;
8146
8147 if (vsi->type == I40E_VSI_MAIN) {
8148 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8149 return -EINVAL;
8150 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8151 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8152 } else if (vsi->type == I40E_VSI_SRIOV) {
8153 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8154 return -EINVAL;
8155 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8156 i40e_write_rx_ctl(hw,
8157 I40E_VFQF_HLUT1(i, vf_id),
8158 lut_dw[i]);
8159 } else {
8160 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8161 }
8162 }
8163 i40e_flush(hw);
8164
8165 return 0;
8166 }
8167
8168 /**
8169 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8170 * @vsi: Pointer to VSI structure
8171 * @seed: Buffer to store the keys
8172 * @lut: Buffer to store the lookup table entries
8173 * @lut_size: Size of buffer to store the lookup table entries
8174 *
8175 * Returns 0 on success, negative on failure
8176 */
8177 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8178 u8 *lut, u16 lut_size)
8179 {
8180 struct i40e_pf *pf = vsi->back;
8181 struct i40e_hw *hw = &pf->hw;
8182 u16 i;
8183
8184 if (seed) {
8185 u32 *seed_dw = (u32 *)seed;
8186
8187 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8188 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8189 }
8190 if (lut) {
8191 u32 *lut_dw = (u32 *)lut;
8192
8193 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8194 return -EINVAL;
8195 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8196 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8197 }
8198
8199 return 0;
8200 }
8201
8202 /**
8203 * i40e_config_rss - Configure RSS keys and lut
8204 * @vsi: Pointer to VSI structure
8205 * @seed: RSS hash seed
8206 * @lut: Lookup table
8207 * @lut_size: Lookup table size
8208 *
8209 * Returns 0 on success, negative on failure
8210 */
8211 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8212 {
8213 struct i40e_pf *pf = vsi->back;
8214
8215 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8216 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8217 else
8218 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8219 }
8220
8221 /**
8222 * i40e_get_rss - Get RSS keys and lut
8223 * @vsi: Pointer to VSI structure
8224 * @seed: Buffer to store the keys
8225 * @lut: Buffer to store the lookup table entries
8226 * lut_size: Size of buffer to store the lookup table entries
8227 *
8228 * Returns 0 on success, negative on failure
8229 */
8230 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8231 {
8232 struct i40e_pf *pf = vsi->back;
8233
8234 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8235 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8236 else
8237 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8238 }
8239
8240 /**
8241 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8242 * @pf: Pointer to board private structure
8243 * @lut: Lookup table
8244 * @rss_table_size: Lookup table size
8245 * @rss_size: Range of queue number for hashing
8246 */
8247 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8248 u16 rss_table_size, u16 rss_size)
8249 {
8250 u16 i;
8251
8252 for (i = 0; i < rss_table_size; i++)
8253 lut[i] = i % rss_size;
8254 }
8255
8256 /**
8257 * i40e_pf_config_rss - Prepare for RSS if used
8258 * @pf: board private structure
8259 **/
8260 static int i40e_pf_config_rss(struct i40e_pf *pf)
8261 {
8262 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8263 u8 seed[I40E_HKEY_ARRAY_SIZE];
8264 u8 *lut;
8265 struct i40e_hw *hw = &pf->hw;
8266 u32 reg_val;
8267 u64 hena;
8268 int ret;
8269
8270 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8271 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8272 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8273 hena |= i40e_pf_get_default_rss_hena(pf);
8274
8275 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8276 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8277
8278 /* Determine the RSS table size based on the hardware capabilities */
8279 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8280 reg_val = (pf->rss_table_size == 512) ?
8281 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8282 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8283 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8284
8285 /* Determine the RSS size of the VSI */
8286 if (!vsi->rss_size)
8287 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8288 vsi->num_queue_pairs);
8289
8290 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8291 if (!lut)
8292 return -ENOMEM;
8293
8294 /* Use user configured lut if there is one, otherwise use default */
8295 if (vsi->rss_lut_user)
8296 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8297 else
8298 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8299
8300 /* Use user configured hash key if there is one, otherwise
8301 * use default.
8302 */
8303 if (vsi->rss_hkey_user)
8304 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8305 else
8306 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8307 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8308 kfree(lut);
8309
8310 return ret;
8311 }
8312
8313 /**
8314 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8315 * @pf: board private structure
8316 * @queue_count: the requested queue count for rss.
8317 *
8318 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8319 * count which may be different from the requested queue count.
8320 **/
8321 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8322 {
8323 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8324 int new_rss_size;
8325
8326 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8327 return 0;
8328
8329 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8330
8331 if (queue_count != vsi->num_queue_pairs) {
8332 vsi->req_queue_pairs = queue_count;
8333 i40e_prep_for_reset(pf);
8334
8335 pf->alloc_rss_size = new_rss_size;
8336
8337 i40e_reset_and_rebuild(pf, true);
8338
8339 /* Discard the user configured hash keys and lut, if less
8340 * queues are enabled.
8341 */
8342 if (queue_count < vsi->rss_size) {
8343 i40e_clear_rss_config_user(vsi);
8344 dev_dbg(&pf->pdev->dev,
8345 "discard user configured hash keys and lut\n");
8346 }
8347
8348 /* Reset vsi->rss_size, as number of enabled queues changed */
8349 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8350 vsi->num_queue_pairs);
8351
8352 i40e_pf_config_rss(pf);
8353 }
8354 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8355 pf->alloc_rss_size, pf->rss_size_max);
8356 return pf->alloc_rss_size;
8357 }
8358
8359 /**
8360 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8361 * @pf: board private structure
8362 **/
8363 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8364 {
8365 i40e_status status;
8366 bool min_valid, max_valid;
8367 u32 max_bw, min_bw;
8368
8369 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8370 &min_valid, &max_valid);
8371
8372 if (!status) {
8373 if (min_valid)
8374 pf->npar_min_bw = min_bw;
8375 if (max_valid)
8376 pf->npar_max_bw = max_bw;
8377 }
8378
8379 return status;
8380 }
8381
8382 /**
8383 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8384 * @pf: board private structure
8385 **/
8386 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8387 {
8388 struct i40e_aqc_configure_partition_bw_data bw_data;
8389 i40e_status status;
8390
8391 /* Set the valid bit for this PF */
8392 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8393 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8394 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8395
8396 /* Set the new bandwidths */
8397 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8398
8399 return status;
8400 }
8401
8402 /**
8403 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8404 * @pf: board private structure
8405 **/
8406 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8407 {
8408 /* Commit temporary BW setting to permanent NVM image */
8409 enum i40e_admin_queue_err last_aq_status;
8410 i40e_status ret;
8411 u16 nvm_word;
8412
8413 if (pf->hw.partition_id != 1) {
8414 dev_info(&pf->pdev->dev,
8415 "Commit BW only works on partition 1! This is partition %d",
8416 pf->hw.partition_id);
8417 ret = I40E_NOT_SUPPORTED;
8418 goto bw_commit_out;
8419 }
8420
8421 /* Acquire NVM for read access */
8422 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8423 last_aq_status = pf->hw.aq.asq_last_status;
8424 if (ret) {
8425 dev_info(&pf->pdev->dev,
8426 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8427 i40e_stat_str(&pf->hw, ret),
8428 i40e_aq_str(&pf->hw, last_aq_status));
8429 goto bw_commit_out;
8430 }
8431
8432 /* Read word 0x10 of NVM - SW compatibility word 1 */
8433 ret = i40e_aq_read_nvm(&pf->hw,
8434 I40E_SR_NVM_CONTROL_WORD,
8435 0x10, sizeof(nvm_word), &nvm_word,
8436 false, NULL);
8437 /* Save off last admin queue command status before releasing
8438 * the NVM
8439 */
8440 last_aq_status = pf->hw.aq.asq_last_status;
8441 i40e_release_nvm(&pf->hw);
8442 if (ret) {
8443 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8444 i40e_stat_str(&pf->hw, ret),
8445 i40e_aq_str(&pf->hw, last_aq_status));
8446 goto bw_commit_out;
8447 }
8448
8449 /* Wait a bit for NVM release to complete */
8450 msleep(50);
8451
8452 /* Acquire NVM for write access */
8453 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8454 last_aq_status = pf->hw.aq.asq_last_status;
8455 if (ret) {
8456 dev_info(&pf->pdev->dev,
8457 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8458 i40e_stat_str(&pf->hw, ret),
8459 i40e_aq_str(&pf->hw, last_aq_status));
8460 goto bw_commit_out;
8461 }
8462 /* Write it back out unchanged to initiate update NVM,
8463 * which will force a write of the shadow (alt) RAM to
8464 * the NVM - thus storing the bandwidth values permanently.
8465 */
8466 ret = i40e_aq_update_nvm(&pf->hw,
8467 I40E_SR_NVM_CONTROL_WORD,
8468 0x10, sizeof(nvm_word),
8469 &nvm_word, true, NULL);
8470 /* Save off last admin queue command status before releasing
8471 * the NVM
8472 */
8473 last_aq_status = pf->hw.aq.asq_last_status;
8474 i40e_release_nvm(&pf->hw);
8475 if (ret)
8476 dev_info(&pf->pdev->dev,
8477 "BW settings NOT SAVED, err %s aq_err %s\n",
8478 i40e_stat_str(&pf->hw, ret),
8479 i40e_aq_str(&pf->hw, last_aq_status));
8480 bw_commit_out:
8481
8482 return ret;
8483 }
8484
8485 /**
8486 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8487 * @pf: board private structure to initialize
8488 *
8489 * i40e_sw_init initializes the Adapter private data structure.
8490 * Fields are initialized based on PCI device information and
8491 * OS network device settings (MTU size).
8492 **/
8493 static int i40e_sw_init(struct i40e_pf *pf)
8494 {
8495 int err = 0;
8496 int size;
8497
8498 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8499 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8500 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8501 if (I40E_DEBUG_USER & debug)
8502 pf->hw.debug_mask = debug;
8503 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8504 I40E_DEFAULT_MSG_ENABLE);
8505 }
8506
8507 /* Set default capability flags */
8508 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8509 I40E_FLAG_MSI_ENABLED |
8510 I40E_FLAG_MSIX_ENABLED;
8511
8512 /* Set default ITR */
8513 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8514 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8515
8516 /* Depending on PF configurations, it is possible that the RSS
8517 * maximum might end up larger than the available queues
8518 */
8519 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8520 pf->alloc_rss_size = 1;
8521 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8522 pf->rss_size_max = min_t(int, pf->rss_size_max,
8523 pf->hw.func_caps.num_tx_qp);
8524 if (pf->hw.func_caps.rss) {
8525 pf->flags |= I40E_FLAG_RSS_ENABLED;
8526 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8527 num_online_cpus());
8528 }
8529
8530 /* MFP mode enabled */
8531 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8532 pf->flags |= I40E_FLAG_MFP_ENABLED;
8533 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8534 if (i40e_get_npar_bw_setting(pf))
8535 dev_warn(&pf->pdev->dev,
8536 "Could not get NPAR bw settings\n");
8537 else
8538 dev_info(&pf->pdev->dev,
8539 "Min BW = %8.8x, Max BW = %8.8x\n",
8540 pf->npar_min_bw, pf->npar_max_bw);
8541 }
8542
8543 /* FW/NVM is not yet fixed in this regard */
8544 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8545 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8546 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8547 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8548 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8549 pf->hw.num_partitions > 1)
8550 dev_info(&pf->pdev->dev,
8551 "Flow Director Sideband mode Disabled in MFP mode\n");
8552 else
8553 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8554 pf->fdir_pf_filter_count =
8555 pf->hw.func_caps.fd_filters_guaranteed;
8556 pf->hw.fdir_shared_filter_count =
8557 pf->hw.func_caps.fd_filters_best_effort;
8558 }
8559
8560 if (i40e_is_mac_710(&pf->hw) &&
8561 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8562 (pf->hw.aq.fw_maj_ver < 4))) {
8563 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8564 /* No DCB support for FW < v4.33 */
8565 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8566 }
8567
8568 /* Disable FW LLDP if FW < v4.3 */
8569 if (i40e_is_mac_710(&pf->hw) &&
8570 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8571 (pf->hw.aq.fw_maj_ver < 4)))
8572 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8573
8574 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8575 if (i40e_is_mac_710(&pf->hw) &&
8576 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8577 (pf->hw.aq.fw_maj_ver >= 5)))
8578 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8579
8580 if (pf->hw.func_caps.vmdq) {
8581 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8582 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8583 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8584 }
8585
8586 if (pf->hw.func_caps.iwarp) {
8587 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8588 /* IWARP needs one extra vector for CQP just like MISC.*/
8589 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8590 }
8591
8592 #ifdef I40E_FCOE
8593 i40e_init_pf_fcoe(pf);
8594
8595 #endif /* I40E_FCOE */
8596 #ifdef CONFIG_PCI_IOV
8597 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8598 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8599 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8600 pf->num_req_vfs = min_t(int,
8601 pf->hw.func_caps.num_vfs,
8602 I40E_MAX_VF_COUNT);
8603 }
8604 #endif /* CONFIG_PCI_IOV */
8605 if (pf->hw.mac.type == I40E_MAC_X722) {
8606 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8607 I40E_FLAG_128_QP_RSS_CAPABLE |
8608 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8609 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8610 I40E_FLAG_WB_ON_ITR_CAPABLE |
8611 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8612 I40E_FLAG_NO_PCI_LINK_CHECK |
8613 I40E_FLAG_100M_SGMII_CAPABLE |
8614 I40E_FLAG_USE_SET_LLDP_MIB |
8615 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8616 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8617 ((pf->hw.aq.api_maj_ver == 1) &&
8618 (pf->hw.aq.api_min_ver > 4))) {
8619 /* Supported in FW API version higher than 1.4 */
8620 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8621 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8622 } else {
8623 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8624 }
8625
8626 pf->eeprom_version = 0xDEAD;
8627 pf->lan_veb = I40E_NO_VEB;
8628 pf->lan_vsi = I40E_NO_VSI;
8629
8630 /* By default FW has this off for performance reasons */
8631 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8632
8633 /* set up queue assignment tracking */
8634 size = sizeof(struct i40e_lump_tracking)
8635 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8636 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8637 if (!pf->qp_pile) {
8638 err = -ENOMEM;
8639 goto sw_init_done;
8640 }
8641 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8642 pf->qp_pile->search_hint = 0;
8643
8644 pf->tx_timeout_recovery_level = 1;
8645
8646 mutex_init(&pf->switch_mutex);
8647
8648 /* If NPAR is enabled nudge the Tx scheduler */
8649 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8650 i40e_set_npar_bw_setting(pf);
8651
8652 sw_init_done:
8653 return err;
8654 }
8655
8656 /**
8657 * i40e_set_ntuple - set the ntuple feature flag and take action
8658 * @pf: board private structure to initialize
8659 * @features: the feature set that the stack is suggesting
8660 *
8661 * returns a bool to indicate if reset needs to happen
8662 **/
8663 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8664 {
8665 bool need_reset = false;
8666
8667 /* Check if Flow Director n-tuple support was enabled or disabled. If
8668 * the state changed, we need to reset.
8669 */
8670 if (features & NETIF_F_NTUPLE) {
8671 /* Enable filters and mark for reset */
8672 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8673 need_reset = true;
8674 /* enable FD_SB only if there is MSI-X vector */
8675 if (pf->num_fdsb_msix > 0)
8676 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8677 } else {
8678 /* turn off filters, mark for reset and clear SW filter list */
8679 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8680 need_reset = true;
8681 i40e_fdir_filter_exit(pf);
8682 }
8683 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8684 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8685 /* reset fd counters */
8686 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8687 pf->fdir_pf_active_filters = 0;
8688 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8689 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8690 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8691 /* if ATR was auto disabled it can be re-enabled. */
8692 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8693 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8694 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8695 }
8696 return need_reset;
8697 }
8698
8699 /**
8700 * i40e_clear_rss_lut - clear the rx hash lookup table
8701 * @vsi: the VSI being configured
8702 **/
8703 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
8704 {
8705 struct i40e_pf *pf = vsi->back;
8706 struct i40e_hw *hw = &pf->hw;
8707 u16 vf_id = vsi->vf_id;
8708 u8 i;
8709
8710 if (vsi->type == I40E_VSI_MAIN) {
8711 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8712 wr32(hw, I40E_PFQF_HLUT(i), 0);
8713 } else if (vsi->type == I40E_VSI_SRIOV) {
8714 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8715 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
8716 } else {
8717 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8718 }
8719 }
8720
8721 /**
8722 * i40e_set_features - set the netdev feature flags
8723 * @netdev: ptr to the netdev being adjusted
8724 * @features: the feature set that the stack is suggesting
8725 **/
8726 static int i40e_set_features(struct net_device *netdev,
8727 netdev_features_t features)
8728 {
8729 struct i40e_netdev_priv *np = netdev_priv(netdev);
8730 struct i40e_vsi *vsi = np->vsi;
8731 struct i40e_pf *pf = vsi->back;
8732 bool need_reset;
8733
8734 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
8735 i40e_pf_config_rss(pf);
8736 else if (!(features & NETIF_F_RXHASH) &&
8737 netdev->features & NETIF_F_RXHASH)
8738 i40e_clear_rss_lut(vsi);
8739
8740 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8741 i40e_vlan_stripping_enable(vsi);
8742 else
8743 i40e_vlan_stripping_disable(vsi);
8744
8745 need_reset = i40e_set_ntuple(pf, features);
8746
8747 if (need_reset)
8748 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8749
8750 return 0;
8751 }
8752
8753 /**
8754 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8755 * @pf: board private structure
8756 * @port: The UDP port to look up
8757 *
8758 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8759 **/
8760 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8761 {
8762 u8 i;
8763
8764 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8765 if (pf->udp_ports[i].index == port)
8766 return i;
8767 }
8768
8769 return i;
8770 }
8771
8772 /**
8773 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
8774 * @netdev: This physical port's netdev
8775 * @ti: Tunnel endpoint information
8776 **/
8777 static void i40e_udp_tunnel_add(struct net_device *netdev,
8778 struct udp_tunnel_info *ti)
8779 {
8780 struct i40e_netdev_priv *np = netdev_priv(netdev);
8781 struct i40e_vsi *vsi = np->vsi;
8782 struct i40e_pf *pf = vsi->back;
8783 __be16 port = ti->port;
8784 u8 next_idx;
8785 u8 idx;
8786
8787 idx = i40e_get_udp_port_idx(pf, port);
8788
8789 /* Check if port already exists */
8790 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8791 netdev_info(netdev, "port %d already offloaded\n",
8792 ntohs(port));
8793 return;
8794 }
8795
8796 /* Now check if there is space to add the new port */
8797 next_idx = i40e_get_udp_port_idx(pf, 0);
8798
8799 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8800 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
8801 ntohs(port));
8802 return;
8803 }
8804
8805 switch (ti->type) {
8806 case UDP_TUNNEL_TYPE_VXLAN:
8807 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8808 break;
8809 case UDP_TUNNEL_TYPE_GENEVE:
8810 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8811 return;
8812 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8813 break;
8814 default:
8815 return;
8816 }
8817
8818 /* New port: add it and mark its index in the bitmap */
8819 pf->udp_ports[next_idx].index = port;
8820 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8821 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8822 }
8823
8824 /**
8825 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
8826 * @netdev: This physical port's netdev
8827 * @ti: Tunnel endpoint information
8828 **/
8829 static void i40e_udp_tunnel_del(struct net_device *netdev,
8830 struct udp_tunnel_info *ti)
8831 {
8832 struct i40e_netdev_priv *np = netdev_priv(netdev);
8833 struct i40e_vsi *vsi = np->vsi;
8834 struct i40e_pf *pf = vsi->back;
8835 __be16 port = ti->port;
8836 u8 idx;
8837
8838 idx = i40e_get_udp_port_idx(pf, port);
8839
8840 /* Check if port already exists */
8841 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
8842 goto not_found;
8843
8844 switch (ti->type) {
8845 case UDP_TUNNEL_TYPE_VXLAN:
8846 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
8847 goto not_found;
8848 break;
8849 case UDP_TUNNEL_TYPE_GENEVE:
8850 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
8851 goto not_found;
8852 break;
8853 default:
8854 goto not_found;
8855 }
8856
8857 /* if port exists, set it to 0 (mark for deletion)
8858 * and make it pending
8859 */
8860 pf->udp_ports[idx].index = 0;
8861 pf->pending_udp_bitmap |= BIT_ULL(idx);
8862 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8863
8864 return;
8865 not_found:
8866 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
8867 ntohs(port));
8868 }
8869
8870 static int i40e_get_phys_port_id(struct net_device *netdev,
8871 struct netdev_phys_item_id *ppid)
8872 {
8873 struct i40e_netdev_priv *np = netdev_priv(netdev);
8874 struct i40e_pf *pf = np->vsi->back;
8875 struct i40e_hw *hw = &pf->hw;
8876
8877 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8878 return -EOPNOTSUPP;
8879
8880 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8881 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8882
8883 return 0;
8884 }
8885
8886 /**
8887 * i40e_ndo_fdb_add - add an entry to the hardware database
8888 * @ndm: the input from the stack
8889 * @tb: pointer to array of nladdr (unused)
8890 * @dev: the net device pointer
8891 * @addr: the MAC address entry being added
8892 * @flags: instructions from stack about fdb operation
8893 */
8894 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8895 struct net_device *dev,
8896 const unsigned char *addr, u16 vid,
8897 u16 flags)
8898 {
8899 struct i40e_netdev_priv *np = netdev_priv(dev);
8900 struct i40e_pf *pf = np->vsi->back;
8901 int err = 0;
8902
8903 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8904 return -EOPNOTSUPP;
8905
8906 if (vid) {
8907 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8908 return -EINVAL;
8909 }
8910
8911 /* Hardware does not support aging addresses so if a
8912 * ndm_state is given only allow permanent addresses
8913 */
8914 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8915 netdev_info(dev, "FDB only supports static addresses\n");
8916 return -EINVAL;
8917 }
8918
8919 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8920 err = dev_uc_add_excl(dev, addr);
8921 else if (is_multicast_ether_addr(addr))
8922 err = dev_mc_add_excl(dev, addr);
8923 else
8924 err = -EINVAL;
8925
8926 /* Only return duplicate errors if NLM_F_EXCL is set */
8927 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8928 err = 0;
8929
8930 return err;
8931 }
8932
8933 /**
8934 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8935 * @dev: the netdev being configured
8936 * @nlh: RTNL message
8937 *
8938 * Inserts a new hardware bridge if not already created and
8939 * enables the bridging mode requested (VEB or VEPA). If the
8940 * hardware bridge has already been inserted and the request
8941 * is to change the mode then that requires a PF reset to
8942 * allow rebuild of the components with required hardware
8943 * bridge mode enabled.
8944 **/
8945 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8946 struct nlmsghdr *nlh,
8947 u16 flags)
8948 {
8949 struct i40e_netdev_priv *np = netdev_priv(dev);
8950 struct i40e_vsi *vsi = np->vsi;
8951 struct i40e_pf *pf = vsi->back;
8952 struct i40e_veb *veb = NULL;
8953 struct nlattr *attr, *br_spec;
8954 int i, rem;
8955
8956 /* Only for PF VSI for now */
8957 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8958 return -EOPNOTSUPP;
8959
8960 /* Find the HW bridge for PF VSI */
8961 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8962 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8963 veb = pf->veb[i];
8964 }
8965
8966 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8967
8968 nla_for_each_nested(attr, br_spec, rem) {
8969 __u16 mode;
8970
8971 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8972 continue;
8973
8974 mode = nla_get_u16(attr);
8975 if ((mode != BRIDGE_MODE_VEPA) &&
8976 (mode != BRIDGE_MODE_VEB))
8977 return -EINVAL;
8978
8979 /* Insert a new HW bridge */
8980 if (!veb) {
8981 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8982 vsi->tc_config.enabled_tc);
8983 if (veb) {
8984 veb->bridge_mode = mode;
8985 i40e_config_bridge_mode(veb);
8986 } else {
8987 /* No Bridge HW offload available */
8988 return -ENOENT;
8989 }
8990 break;
8991 } else if (mode != veb->bridge_mode) {
8992 /* Existing HW bridge but different mode needs reset */
8993 veb->bridge_mode = mode;
8994 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8995 if (mode == BRIDGE_MODE_VEB)
8996 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8997 else
8998 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8999 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9000 break;
9001 }
9002 }
9003
9004 return 0;
9005 }
9006
9007 /**
9008 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
9009 * @skb: skb buff
9010 * @pid: process id
9011 * @seq: RTNL message seq #
9012 * @dev: the netdev being configured
9013 * @filter_mask: unused
9014 * @nlflags: netlink flags passed in
9015 *
9016 * Return the mode in which the hardware bridge is operating in
9017 * i.e VEB or VEPA.
9018 **/
9019 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9020 struct net_device *dev,
9021 u32 __always_unused filter_mask,
9022 int nlflags)
9023 {
9024 struct i40e_netdev_priv *np = netdev_priv(dev);
9025 struct i40e_vsi *vsi = np->vsi;
9026 struct i40e_pf *pf = vsi->back;
9027 struct i40e_veb *veb = NULL;
9028 int i;
9029
9030 /* Only for PF VSI for now */
9031 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9032 return -EOPNOTSUPP;
9033
9034 /* Find the HW bridge for the PF VSI */
9035 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9036 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9037 veb = pf->veb[i];
9038 }
9039
9040 if (!veb)
9041 return 0;
9042
9043 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9044 nlflags, 0, 0, filter_mask, NULL);
9045 }
9046
9047 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
9048 * inner mac plus all inner ethertypes.
9049 */
9050 #define I40E_MAX_TUNNEL_HDR_LEN 128
9051 /**
9052 * i40e_features_check - Validate encapsulated packet conforms to limits
9053 * @skb: skb buff
9054 * @dev: This physical port's netdev
9055 * @features: Offload features that the stack believes apply
9056 **/
9057 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9058 struct net_device *dev,
9059 netdev_features_t features)
9060 {
9061 if (skb->encapsulation &&
9062 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
9063 I40E_MAX_TUNNEL_HDR_LEN))
9064 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9065
9066 return features;
9067 }
9068
9069 static const struct net_device_ops i40e_netdev_ops = {
9070 .ndo_open = i40e_open,
9071 .ndo_stop = i40e_close,
9072 .ndo_start_xmit = i40e_lan_xmit_frame,
9073 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9074 .ndo_set_rx_mode = i40e_set_rx_mode,
9075 .ndo_validate_addr = eth_validate_addr,
9076 .ndo_set_mac_address = i40e_set_mac,
9077 .ndo_change_mtu = i40e_change_mtu,
9078 .ndo_do_ioctl = i40e_ioctl,
9079 .ndo_tx_timeout = i40e_tx_timeout,
9080 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9081 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9082 #ifdef CONFIG_NET_POLL_CONTROLLER
9083 .ndo_poll_controller = i40e_netpoll,
9084 #endif
9085 .ndo_setup_tc = __i40e_setup_tc,
9086 #ifdef I40E_FCOE
9087 .ndo_fcoe_enable = i40e_fcoe_enable,
9088 .ndo_fcoe_disable = i40e_fcoe_disable,
9089 #endif
9090 .ndo_set_features = i40e_set_features,
9091 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9092 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9093 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9094 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9095 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9096 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9097 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9098 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9099 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9100 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9101 .ndo_fdb_add = i40e_ndo_fdb_add,
9102 .ndo_features_check = i40e_features_check,
9103 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9104 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9105 };
9106
9107 /**
9108 * i40e_config_netdev - Setup the netdev flags
9109 * @vsi: the VSI being configured
9110 *
9111 * Returns 0 on success, negative value on failure
9112 **/
9113 static int i40e_config_netdev(struct i40e_vsi *vsi)
9114 {
9115 struct i40e_pf *pf = vsi->back;
9116 struct i40e_hw *hw = &pf->hw;
9117 struct i40e_netdev_priv *np;
9118 struct net_device *netdev;
9119 u8 mac_addr[ETH_ALEN];
9120 int etherdev_size;
9121
9122 etherdev_size = sizeof(struct i40e_netdev_priv);
9123 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9124 if (!netdev)
9125 return -ENOMEM;
9126
9127 vsi->netdev = netdev;
9128 np = netdev_priv(netdev);
9129 np->vsi = vsi;
9130
9131 netdev->hw_enc_features |= NETIF_F_SG |
9132 NETIF_F_IP_CSUM |
9133 NETIF_F_IPV6_CSUM |
9134 NETIF_F_HIGHDMA |
9135 NETIF_F_SOFT_FEATURES |
9136 NETIF_F_TSO |
9137 NETIF_F_TSO_ECN |
9138 NETIF_F_TSO6 |
9139 NETIF_F_GSO_GRE |
9140 NETIF_F_GSO_GRE_CSUM |
9141 NETIF_F_GSO_IPXIP4 |
9142 NETIF_F_GSO_IPXIP6 |
9143 NETIF_F_GSO_UDP_TUNNEL |
9144 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9145 NETIF_F_GSO_PARTIAL |
9146 NETIF_F_SCTP_CRC |
9147 NETIF_F_RXHASH |
9148 NETIF_F_RXCSUM |
9149 0;
9150
9151 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9152 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9153
9154 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9155
9156 /* record features VLANs can make use of */
9157 netdev->vlan_features |= netdev->hw_enc_features |
9158 NETIF_F_TSO_MANGLEID;
9159
9160 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9161 netdev->hw_features |= NETIF_F_NTUPLE;
9162
9163 netdev->hw_features |= netdev->hw_enc_features |
9164 NETIF_F_HW_VLAN_CTAG_TX |
9165 NETIF_F_HW_VLAN_CTAG_RX;
9166
9167 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9168 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9169
9170 if (vsi->type == I40E_VSI_MAIN) {
9171 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9172 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9173 /* The following steps are necessary to prevent reception
9174 * of tagged packets - some older NVM configurations load a
9175 * default a MAC-VLAN filter that accepts any tagged packet
9176 * which must be replaced by a normal filter.
9177 */
9178 i40e_rm_default_mac_filter(vsi, mac_addr);
9179 spin_lock_bh(&vsi->mac_filter_list_lock);
9180 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true);
9181 spin_unlock_bh(&vsi->mac_filter_list_lock);
9182 } else {
9183 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9184 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9185 pf->vsi[pf->lan_vsi]->netdev->name);
9186 random_ether_addr(mac_addr);
9187
9188 spin_lock_bh(&vsi->mac_filter_list_lock);
9189 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9190 spin_unlock_bh(&vsi->mac_filter_list_lock);
9191 }
9192
9193 ether_addr_copy(netdev->dev_addr, mac_addr);
9194 ether_addr_copy(netdev->perm_addr, mac_addr);
9195
9196 netdev->priv_flags |= IFF_UNICAST_FLT;
9197 netdev->priv_flags |= IFF_SUPP_NOFCS;
9198 /* Setup netdev TC information */
9199 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9200
9201 netdev->netdev_ops = &i40e_netdev_ops;
9202 netdev->watchdog_timeo = 5 * HZ;
9203 i40e_set_ethtool_ops(netdev);
9204 #ifdef I40E_FCOE
9205 i40e_fcoe_config_netdev(netdev, vsi);
9206 #endif
9207
9208 return 0;
9209 }
9210
9211 /**
9212 * i40e_vsi_delete - Delete a VSI from the switch
9213 * @vsi: the VSI being removed
9214 *
9215 * Returns 0 on success, negative value on failure
9216 **/
9217 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9218 {
9219 /* remove default VSI is not allowed */
9220 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9221 return;
9222
9223 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9224 }
9225
9226 /**
9227 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9228 * @vsi: the VSI being queried
9229 *
9230 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9231 **/
9232 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9233 {
9234 struct i40e_veb *veb;
9235 struct i40e_pf *pf = vsi->back;
9236
9237 /* Uplink is not a bridge so default to VEB */
9238 if (vsi->veb_idx == I40E_NO_VEB)
9239 return 1;
9240
9241 veb = pf->veb[vsi->veb_idx];
9242 if (!veb) {
9243 dev_info(&pf->pdev->dev,
9244 "There is no veb associated with the bridge\n");
9245 return -ENOENT;
9246 }
9247
9248 /* Uplink is a bridge in VEPA mode */
9249 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9250 return 0;
9251 } else {
9252 /* Uplink is a bridge in VEB mode */
9253 return 1;
9254 }
9255
9256 /* VEPA is now default bridge, so return 0 */
9257 return 0;
9258 }
9259
9260 /**
9261 * i40e_add_vsi - Add a VSI to the switch
9262 * @vsi: the VSI being configured
9263 *
9264 * This initializes a VSI context depending on the VSI type to be added and
9265 * passes it down to the add_vsi aq command.
9266 **/
9267 static int i40e_add_vsi(struct i40e_vsi *vsi)
9268 {
9269 int ret = -ENODEV;
9270 i40e_status aq_ret = 0;
9271 struct i40e_pf *pf = vsi->back;
9272 struct i40e_hw *hw = &pf->hw;
9273 struct i40e_vsi_context ctxt;
9274 struct i40e_mac_filter *f, *ftmp;
9275
9276 u8 enabled_tc = 0x1; /* TC0 enabled */
9277 int f_count = 0;
9278
9279 memset(&ctxt, 0, sizeof(ctxt));
9280 switch (vsi->type) {
9281 case I40E_VSI_MAIN:
9282 /* The PF's main VSI is already setup as part of the
9283 * device initialization, so we'll not bother with
9284 * the add_vsi call, but we will retrieve the current
9285 * VSI context.
9286 */
9287 ctxt.seid = pf->main_vsi_seid;
9288 ctxt.pf_num = pf->hw.pf_id;
9289 ctxt.vf_num = 0;
9290 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9291 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9292 if (ret) {
9293 dev_info(&pf->pdev->dev,
9294 "couldn't get PF vsi config, err %s aq_err %s\n",
9295 i40e_stat_str(&pf->hw, ret),
9296 i40e_aq_str(&pf->hw,
9297 pf->hw.aq.asq_last_status));
9298 return -ENOENT;
9299 }
9300 vsi->info = ctxt.info;
9301 vsi->info.valid_sections = 0;
9302
9303 vsi->seid = ctxt.seid;
9304 vsi->id = ctxt.vsi_number;
9305
9306 enabled_tc = i40e_pf_get_tc_map(pf);
9307
9308 /* MFP mode setup queue map and update VSI */
9309 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9310 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9311 memset(&ctxt, 0, sizeof(ctxt));
9312 ctxt.seid = pf->main_vsi_seid;
9313 ctxt.pf_num = pf->hw.pf_id;
9314 ctxt.vf_num = 0;
9315 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9316 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9317 if (ret) {
9318 dev_info(&pf->pdev->dev,
9319 "update vsi failed, err %s aq_err %s\n",
9320 i40e_stat_str(&pf->hw, ret),
9321 i40e_aq_str(&pf->hw,
9322 pf->hw.aq.asq_last_status));
9323 ret = -ENOENT;
9324 goto err;
9325 }
9326 /* update the local VSI info queue map */
9327 i40e_vsi_update_queue_map(vsi, &ctxt);
9328 vsi->info.valid_sections = 0;
9329 } else {
9330 /* Default/Main VSI is only enabled for TC0
9331 * reconfigure it to enable all TCs that are
9332 * available on the port in SFP mode.
9333 * For MFP case the iSCSI PF would use this
9334 * flow to enable LAN+iSCSI TC.
9335 */
9336 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9337 if (ret) {
9338 dev_info(&pf->pdev->dev,
9339 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9340 enabled_tc,
9341 i40e_stat_str(&pf->hw, ret),
9342 i40e_aq_str(&pf->hw,
9343 pf->hw.aq.asq_last_status));
9344 ret = -ENOENT;
9345 }
9346 }
9347 break;
9348
9349 case I40E_VSI_FDIR:
9350 ctxt.pf_num = hw->pf_id;
9351 ctxt.vf_num = 0;
9352 ctxt.uplink_seid = vsi->uplink_seid;
9353 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9354 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9355 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9356 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9357 ctxt.info.valid_sections |=
9358 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9359 ctxt.info.switch_id =
9360 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9361 }
9362 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9363 break;
9364
9365 case I40E_VSI_VMDQ2:
9366 ctxt.pf_num = hw->pf_id;
9367 ctxt.vf_num = 0;
9368 ctxt.uplink_seid = vsi->uplink_seid;
9369 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9370 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9371
9372 /* This VSI is connected to VEB so the switch_id
9373 * should be set to zero by default.
9374 */
9375 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9376 ctxt.info.valid_sections |=
9377 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9378 ctxt.info.switch_id =
9379 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9380 }
9381
9382 /* Setup the VSI tx/rx queue map for TC0 only for now */
9383 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9384 break;
9385
9386 case I40E_VSI_SRIOV:
9387 ctxt.pf_num = hw->pf_id;
9388 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9389 ctxt.uplink_seid = vsi->uplink_seid;
9390 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9391 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9392
9393 /* This VSI is connected to VEB so the switch_id
9394 * should be set to zero by default.
9395 */
9396 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9397 ctxt.info.valid_sections |=
9398 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9399 ctxt.info.switch_id =
9400 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9401 }
9402
9403 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9404 ctxt.info.valid_sections |=
9405 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9406 ctxt.info.queueing_opt_flags |=
9407 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9408 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9409 }
9410
9411 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9412 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9413 if (pf->vf[vsi->vf_id].spoofchk) {
9414 ctxt.info.valid_sections |=
9415 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9416 ctxt.info.sec_flags |=
9417 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9418 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9419 }
9420 /* Setup the VSI tx/rx queue map for TC0 only for now */
9421 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9422 break;
9423
9424 #ifdef I40E_FCOE
9425 case I40E_VSI_FCOE:
9426 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9427 if (ret) {
9428 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9429 return ret;
9430 }
9431 break;
9432
9433 #endif /* I40E_FCOE */
9434 case I40E_VSI_IWARP:
9435 /* send down message to iWARP */
9436 break;
9437
9438 default:
9439 return -ENODEV;
9440 }
9441
9442 if (vsi->type != I40E_VSI_MAIN) {
9443 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9444 if (ret) {
9445 dev_info(&vsi->back->pdev->dev,
9446 "add vsi failed, err %s aq_err %s\n",
9447 i40e_stat_str(&pf->hw, ret),
9448 i40e_aq_str(&pf->hw,
9449 pf->hw.aq.asq_last_status));
9450 ret = -ENOENT;
9451 goto err;
9452 }
9453 vsi->info = ctxt.info;
9454 vsi->info.valid_sections = 0;
9455 vsi->seid = ctxt.seid;
9456 vsi->id = ctxt.vsi_number;
9457 }
9458 /* Except FDIR VSI, for all othet VSI set the broadcast filter */
9459 if (vsi->type != I40E_VSI_FDIR) {
9460 aq_ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL);
9461 if (aq_ret) {
9462 ret = i40e_aq_rc_to_posix(aq_ret,
9463 hw->aq.asq_last_status);
9464 dev_info(&pf->pdev->dev,
9465 "set brdcast promisc failed, err %s, aq_err %s\n",
9466 i40e_stat_str(hw, aq_ret),
9467 i40e_aq_str(hw, hw->aq.asq_last_status));
9468 }
9469 }
9470
9471 vsi->active_filters = 0;
9472 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9473 spin_lock_bh(&vsi->mac_filter_list_lock);
9474 /* If macvlan filters already exist, force them to get loaded */
9475 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9476 f->state = I40E_FILTER_NEW;
9477 f_count++;
9478 }
9479 spin_unlock_bh(&vsi->mac_filter_list_lock);
9480
9481 if (f_count) {
9482 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9483 pf->flags |= I40E_FLAG_FILTER_SYNC;
9484 }
9485
9486 /* Update VSI BW information */
9487 ret = i40e_vsi_get_bw_info(vsi);
9488 if (ret) {
9489 dev_info(&pf->pdev->dev,
9490 "couldn't get vsi bw info, err %s aq_err %s\n",
9491 i40e_stat_str(&pf->hw, ret),
9492 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9493 /* VSI is already added so not tearing that up */
9494 ret = 0;
9495 }
9496
9497 err:
9498 return ret;
9499 }
9500
9501 /**
9502 * i40e_vsi_release - Delete a VSI and free its resources
9503 * @vsi: the VSI being removed
9504 *
9505 * Returns 0 on success or < 0 on error
9506 **/
9507 int i40e_vsi_release(struct i40e_vsi *vsi)
9508 {
9509 struct i40e_mac_filter *f, *ftmp;
9510 struct i40e_veb *veb = NULL;
9511 struct i40e_pf *pf;
9512 u16 uplink_seid;
9513 int i, n;
9514
9515 pf = vsi->back;
9516
9517 /* release of a VEB-owner or last VSI is not allowed */
9518 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9519 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9520 vsi->seid, vsi->uplink_seid);
9521 return -ENODEV;
9522 }
9523 if (vsi == pf->vsi[pf->lan_vsi] &&
9524 !test_bit(__I40E_DOWN, &pf->state)) {
9525 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9526 return -ENODEV;
9527 }
9528
9529 uplink_seid = vsi->uplink_seid;
9530 if (vsi->type != I40E_VSI_SRIOV) {
9531 if (vsi->netdev_registered) {
9532 vsi->netdev_registered = false;
9533 if (vsi->netdev) {
9534 /* results in a call to i40e_close() */
9535 unregister_netdev(vsi->netdev);
9536 }
9537 } else {
9538 i40e_vsi_close(vsi);
9539 }
9540 i40e_vsi_disable_irq(vsi);
9541 }
9542
9543 spin_lock_bh(&vsi->mac_filter_list_lock);
9544 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9545 i40e_del_filter(vsi, f->macaddr, f->vlan,
9546 f->is_vf, f->is_netdev);
9547 spin_unlock_bh(&vsi->mac_filter_list_lock);
9548
9549 i40e_sync_vsi_filters(vsi);
9550
9551 i40e_vsi_delete(vsi);
9552 i40e_vsi_free_q_vectors(vsi);
9553 if (vsi->netdev) {
9554 free_netdev(vsi->netdev);
9555 vsi->netdev = NULL;
9556 }
9557 i40e_vsi_clear_rings(vsi);
9558 i40e_vsi_clear(vsi);
9559
9560 /* If this was the last thing on the VEB, except for the
9561 * controlling VSI, remove the VEB, which puts the controlling
9562 * VSI onto the next level down in the switch.
9563 *
9564 * Well, okay, there's one more exception here: don't remove
9565 * the orphan VEBs yet. We'll wait for an explicit remove request
9566 * from up the network stack.
9567 */
9568 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9569 if (pf->vsi[i] &&
9570 pf->vsi[i]->uplink_seid == uplink_seid &&
9571 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9572 n++; /* count the VSIs */
9573 }
9574 }
9575 for (i = 0; i < I40E_MAX_VEB; i++) {
9576 if (!pf->veb[i])
9577 continue;
9578 if (pf->veb[i]->uplink_seid == uplink_seid)
9579 n++; /* count the VEBs */
9580 if (pf->veb[i]->seid == uplink_seid)
9581 veb = pf->veb[i];
9582 }
9583 if (n == 0 && veb && veb->uplink_seid != 0)
9584 i40e_veb_release(veb);
9585
9586 return 0;
9587 }
9588
9589 /**
9590 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9591 * @vsi: ptr to the VSI
9592 *
9593 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9594 * corresponding SW VSI structure and initializes num_queue_pairs for the
9595 * newly allocated VSI.
9596 *
9597 * Returns 0 on success or negative on failure
9598 **/
9599 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9600 {
9601 int ret = -ENOENT;
9602 struct i40e_pf *pf = vsi->back;
9603
9604 if (vsi->q_vectors[0]) {
9605 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9606 vsi->seid);
9607 return -EEXIST;
9608 }
9609
9610 if (vsi->base_vector) {
9611 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9612 vsi->seid, vsi->base_vector);
9613 return -EEXIST;
9614 }
9615
9616 ret = i40e_vsi_alloc_q_vectors(vsi);
9617 if (ret) {
9618 dev_info(&pf->pdev->dev,
9619 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9620 vsi->num_q_vectors, vsi->seid, ret);
9621 vsi->num_q_vectors = 0;
9622 goto vector_setup_out;
9623 }
9624
9625 /* In Legacy mode, we do not have to get any other vector since we
9626 * piggyback on the misc/ICR0 for queue interrupts.
9627 */
9628 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9629 return ret;
9630 if (vsi->num_q_vectors)
9631 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9632 vsi->num_q_vectors, vsi->idx);
9633 if (vsi->base_vector < 0) {
9634 dev_info(&pf->pdev->dev,
9635 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9636 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9637 i40e_vsi_free_q_vectors(vsi);
9638 ret = -ENOENT;
9639 goto vector_setup_out;
9640 }
9641
9642 vector_setup_out:
9643 return ret;
9644 }
9645
9646 /**
9647 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9648 * @vsi: pointer to the vsi.
9649 *
9650 * This re-allocates a vsi's queue resources.
9651 *
9652 * Returns pointer to the successfully allocated and configured VSI sw struct
9653 * on success, otherwise returns NULL on failure.
9654 **/
9655 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9656 {
9657 struct i40e_pf *pf;
9658 u8 enabled_tc;
9659 int ret;
9660
9661 if (!vsi)
9662 return NULL;
9663
9664 pf = vsi->back;
9665
9666 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9667 i40e_vsi_clear_rings(vsi);
9668
9669 i40e_vsi_free_arrays(vsi, false);
9670 i40e_set_num_rings_in_vsi(vsi);
9671 ret = i40e_vsi_alloc_arrays(vsi, false);
9672 if (ret)
9673 goto err_vsi;
9674
9675 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9676 if (ret < 0) {
9677 dev_info(&pf->pdev->dev,
9678 "failed to get tracking for %d queues for VSI %d err %d\n",
9679 vsi->alloc_queue_pairs, vsi->seid, ret);
9680 goto err_vsi;
9681 }
9682 vsi->base_queue = ret;
9683
9684 /* Update the FW view of the VSI. Force a reset of TC and queue
9685 * layout configurations.
9686 */
9687 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9688 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9689 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9690 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9691 if (vsi->type == I40E_VSI_MAIN)
9692 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
9693
9694 /* assign it some queues */
9695 ret = i40e_alloc_rings(vsi);
9696 if (ret)
9697 goto err_rings;
9698
9699 /* map all of the rings to the q_vectors */
9700 i40e_vsi_map_rings_to_vectors(vsi);
9701 return vsi;
9702
9703 err_rings:
9704 i40e_vsi_free_q_vectors(vsi);
9705 if (vsi->netdev_registered) {
9706 vsi->netdev_registered = false;
9707 unregister_netdev(vsi->netdev);
9708 free_netdev(vsi->netdev);
9709 vsi->netdev = NULL;
9710 }
9711 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9712 err_vsi:
9713 i40e_vsi_clear(vsi);
9714 return NULL;
9715 }
9716
9717 /**
9718 * i40e_vsi_setup - Set up a VSI by a given type
9719 * @pf: board private structure
9720 * @type: VSI type
9721 * @uplink_seid: the switch element to link to
9722 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9723 *
9724 * This allocates the sw VSI structure and its queue resources, then add a VSI
9725 * to the identified VEB.
9726 *
9727 * Returns pointer to the successfully allocated and configure VSI sw struct on
9728 * success, otherwise returns NULL on failure.
9729 **/
9730 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9731 u16 uplink_seid, u32 param1)
9732 {
9733 struct i40e_vsi *vsi = NULL;
9734 struct i40e_veb *veb = NULL;
9735 int ret, i;
9736 int v_idx;
9737
9738 /* The requested uplink_seid must be either
9739 * - the PF's port seid
9740 * no VEB is needed because this is the PF
9741 * or this is a Flow Director special case VSI
9742 * - seid of an existing VEB
9743 * - seid of a VSI that owns an existing VEB
9744 * - seid of a VSI that doesn't own a VEB
9745 * a new VEB is created and the VSI becomes the owner
9746 * - seid of the PF VSI, which is what creates the first VEB
9747 * this is a special case of the previous
9748 *
9749 * Find which uplink_seid we were given and create a new VEB if needed
9750 */
9751 for (i = 0; i < I40E_MAX_VEB; i++) {
9752 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9753 veb = pf->veb[i];
9754 break;
9755 }
9756 }
9757
9758 if (!veb && uplink_seid != pf->mac_seid) {
9759
9760 for (i = 0; i < pf->num_alloc_vsi; i++) {
9761 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9762 vsi = pf->vsi[i];
9763 break;
9764 }
9765 }
9766 if (!vsi) {
9767 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9768 uplink_seid);
9769 return NULL;
9770 }
9771
9772 if (vsi->uplink_seid == pf->mac_seid)
9773 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9774 vsi->tc_config.enabled_tc);
9775 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9776 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9777 vsi->tc_config.enabled_tc);
9778 if (veb) {
9779 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9780 dev_info(&vsi->back->pdev->dev,
9781 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9782 return NULL;
9783 }
9784 /* We come up by default in VEPA mode if SRIOV is not
9785 * already enabled, in which case we can't force VEPA
9786 * mode.
9787 */
9788 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9789 veb->bridge_mode = BRIDGE_MODE_VEPA;
9790 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9791 }
9792 i40e_config_bridge_mode(veb);
9793 }
9794 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9795 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9796 veb = pf->veb[i];
9797 }
9798 if (!veb) {
9799 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9800 return NULL;
9801 }
9802
9803 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9804 uplink_seid = veb->seid;
9805 }
9806
9807 /* get vsi sw struct */
9808 v_idx = i40e_vsi_mem_alloc(pf, type);
9809 if (v_idx < 0)
9810 goto err_alloc;
9811 vsi = pf->vsi[v_idx];
9812 if (!vsi)
9813 goto err_alloc;
9814 vsi->type = type;
9815 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9816
9817 if (type == I40E_VSI_MAIN)
9818 pf->lan_vsi = v_idx;
9819 else if (type == I40E_VSI_SRIOV)
9820 vsi->vf_id = param1;
9821 /* assign it some queues */
9822 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9823 vsi->idx);
9824 if (ret < 0) {
9825 dev_info(&pf->pdev->dev,
9826 "failed to get tracking for %d queues for VSI %d err=%d\n",
9827 vsi->alloc_queue_pairs, vsi->seid, ret);
9828 goto err_vsi;
9829 }
9830 vsi->base_queue = ret;
9831
9832 /* get a VSI from the hardware */
9833 vsi->uplink_seid = uplink_seid;
9834 ret = i40e_add_vsi(vsi);
9835 if (ret)
9836 goto err_vsi;
9837
9838 switch (vsi->type) {
9839 /* setup the netdev if needed */
9840 case I40E_VSI_MAIN:
9841 /* Apply relevant filters if a platform-specific mac
9842 * address was selected.
9843 */
9844 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9845 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9846 if (ret) {
9847 dev_warn(&pf->pdev->dev,
9848 "could not set up macaddr; err %d\n",
9849 ret);
9850 }
9851 }
9852 case I40E_VSI_VMDQ2:
9853 case I40E_VSI_FCOE:
9854 ret = i40e_config_netdev(vsi);
9855 if (ret)
9856 goto err_netdev;
9857 ret = register_netdev(vsi->netdev);
9858 if (ret)
9859 goto err_netdev;
9860 vsi->netdev_registered = true;
9861 netif_carrier_off(vsi->netdev);
9862 #ifdef CONFIG_I40E_DCB
9863 /* Setup DCB netlink interface */
9864 i40e_dcbnl_setup(vsi);
9865 #endif /* CONFIG_I40E_DCB */
9866 /* fall through */
9867
9868 case I40E_VSI_FDIR:
9869 /* set up vectors and rings if needed */
9870 ret = i40e_vsi_setup_vectors(vsi);
9871 if (ret)
9872 goto err_msix;
9873
9874 ret = i40e_alloc_rings(vsi);
9875 if (ret)
9876 goto err_rings;
9877
9878 /* map all of the rings to the q_vectors */
9879 i40e_vsi_map_rings_to_vectors(vsi);
9880
9881 i40e_vsi_reset_stats(vsi);
9882 break;
9883
9884 default:
9885 /* no netdev or rings for the other VSI types */
9886 break;
9887 }
9888
9889 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9890 (vsi->type == I40E_VSI_VMDQ2)) {
9891 ret = i40e_vsi_config_rss(vsi);
9892 }
9893 return vsi;
9894
9895 err_rings:
9896 i40e_vsi_free_q_vectors(vsi);
9897 err_msix:
9898 if (vsi->netdev_registered) {
9899 vsi->netdev_registered = false;
9900 unregister_netdev(vsi->netdev);
9901 free_netdev(vsi->netdev);
9902 vsi->netdev = NULL;
9903 }
9904 err_netdev:
9905 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9906 err_vsi:
9907 i40e_vsi_clear(vsi);
9908 err_alloc:
9909 return NULL;
9910 }
9911
9912 /**
9913 * i40e_veb_get_bw_info - Query VEB BW information
9914 * @veb: the veb to query
9915 *
9916 * Query the Tx scheduler BW configuration data for given VEB
9917 **/
9918 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9919 {
9920 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9921 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9922 struct i40e_pf *pf = veb->pf;
9923 struct i40e_hw *hw = &pf->hw;
9924 u32 tc_bw_max;
9925 int ret = 0;
9926 int i;
9927
9928 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9929 &bw_data, NULL);
9930 if (ret) {
9931 dev_info(&pf->pdev->dev,
9932 "query veb bw config failed, err %s aq_err %s\n",
9933 i40e_stat_str(&pf->hw, ret),
9934 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9935 goto out;
9936 }
9937
9938 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9939 &ets_data, NULL);
9940 if (ret) {
9941 dev_info(&pf->pdev->dev,
9942 "query veb bw ets config failed, err %s aq_err %s\n",
9943 i40e_stat_str(&pf->hw, ret),
9944 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9945 goto out;
9946 }
9947
9948 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9949 veb->bw_max_quanta = ets_data.tc_bw_max;
9950 veb->is_abs_credits = bw_data.absolute_credits_enable;
9951 veb->enabled_tc = ets_data.tc_valid_bits;
9952 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9953 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9954 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9955 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9956 veb->bw_tc_limit_credits[i] =
9957 le16_to_cpu(bw_data.tc_bw_limits[i]);
9958 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9959 }
9960
9961 out:
9962 return ret;
9963 }
9964
9965 /**
9966 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9967 * @pf: board private structure
9968 *
9969 * On error: returns error code (negative)
9970 * On success: returns vsi index in PF (positive)
9971 **/
9972 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9973 {
9974 int ret = -ENOENT;
9975 struct i40e_veb *veb;
9976 int i;
9977
9978 /* Need to protect the allocation of switch elements at the PF level */
9979 mutex_lock(&pf->switch_mutex);
9980
9981 /* VEB list may be fragmented if VEB creation/destruction has
9982 * been happening. We can afford to do a quick scan to look
9983 * for any free slots in the list.
9984 *
9985 * find next empty veb slot, looping back around if necessary
9986 */
9987 i = 0;
9988 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9989 i++;
9990 if (i >= I40E_MAX_VEB) {
9991 ret = -ENOMEM;
9992 goto err_alloc_veb; /* out of VEB slots! */
9993 }
9994
9995 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9996 if (!veb) {
9997 ret = -ENOMEM;
9998 goto err_alloc_veb;
9999 }
10000 veb->pf = pf;
10001 veb->idx = i;
10002 veb->enabled_tc = 1;
10003
10004 pf->veb[i] = veb;
10005 ret = i;
10006 err_alloc_veb:
10007 mutex_unlock(&pf->switch_mutex);
10008 return ret;
10009 }
10010
10011 /**
10012 * i40e_switch_branch_release - Delete a branch of the switch tree
10013 * @branch: where to start deleting
10014 *
10015 * This uses recursion to find the tips of the branch to be
10016 * removed, deleting until we get back to and can delete this VEB.
10017 **/
10018 static void i40e_switch_branch_release(struct i40e_veb *branch)
10019 {
10020 struct i40e_pf *pf = branch->pf;
10021 u16 branch_seid = branch->seid;
10022 u16 veb_idx = branch->idx;
10023 int i;
10024
10025 /* release any VEBs on this VEB - RECURSION */
10026 for (i = 0; i < I40E_MAX_VEB; i++) {
10027 if (!pf->veb[i])
10028 continue;
10029 if (pf->veb[i]->uplink_seid == branch->seid)
10030 i40e_switch_branch_release(pf->veb[i]);
10031 }
10032
10033 /* Release the VSIs on this VEB, but not the owner VSI.
10034 *
10035 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10036 * the VEB itself, so don't use (*branch) after this loop.
10037 */
10038 for (i = 0; i < pf->num_alloc_vsi; i++) {
10039 if (!pf->vsi[i])
10040 continue;
10041 if (pf->vsi[i]->uplink_seid == branch_seid &&
10042 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10043 i40e_vsi_release(pf->vsi[i]);
10044 }
10045 }
10046
10047 /* There's one corner case where the VEB might not have been
10048 * removed, so double check it here and remove it if needed.
10049 * This case happens if the veb was created from the debugfs
10050 * commands and no VSIs were added to it.
10051 */
10052 if (pf->veb[veb_idx])
10053 i40e_veb_release(pf->veb[veb_idx]);
10054 }
10055
10056 /**
10057 * i40e_veb_clear - remove veb struct
10058 * @veb: the veb to remove
10059 **/
10060 static void i40e_veb_clear(struct i40e_veb *veb)
10061 {
10062 if (!veb)
10063 return;
10064
10065 if (veb->pf) {
10066 struct i40e_pf *pf = veb->pf;
10067
10068 mutex_lock(&pf->switch_mutex);
10069 if (pf->veb[veb->idx] == veb)
10070 pf->veb[veb->idx] = NULL;
10071 mutex_unlock(&pf->switch_mutex);
10072 }
10073
10074 kfree(veb);
10075 }
10076
10077 /**
10078 * i40e_veb_release - Delete a VEB and free its resources
10079 * @veb: the VEB being removed
10080 **/
10081 void i40e_veb_release(struct i40e_veb *veb)
10082 {
10083 struct i40e_vsi *vsi = NULL;
10084 struct i40e_pf *pf;
10085 int i, n = 0;
10086
10087 pf = veb->pf;
10088
10089 /* find the remaining VSI and check for extras */
10090 for (i = 0; i < pf->num_alloc_vsi; i++) {
10091 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10092 n++;
10093 vsi = pf->vsi[i];
10094 }
10095 }
10096 if (n != 1) {
10097 dev_info(&pf->pdev->dev,
10098 "can't remove VEB %d with %d VSIs left\n",
10099 veb->seid, n);
10100 return;
10101 }
10102
10103 /* move the remaining VSI to uplink veb */
10104 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10105 if (veb->uplink_seid) {
10106 vsi->uplink_seid = veb->uplink_seid;
10107 if (veb->uplink_seid == pf->mac_seid)
10108 vsi->veb_idx = I40E_NO_VEB;
10109 else
10110 vsi->veb_idx = veb->veb_idx;
10111 } else {
10112 /* floating VEB */
10113 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10114 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10115 }
10116
10117 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10118 i40e_veb_clear(veb);
10119 }
10120
10121 /**
10122 * i40e_add_veb - create the VEB in the switch
10123 * @veb: the VEB to be instantiated
10124 * @vsi: the controlling VSI
10125 **/
10126 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10127 {
10128 struct i40e_pf *pf = veb->pf;
10129 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10130 int ret;
10131
10132 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10133 veb->enabled_tc, false,
10134 &veb->seid, enable_stats, NULL);
10135
10136 /* get a VEB from the hardware */
10137 if (ret) {
10138 dev_info(&pf->pdev->dev,
10139 "couldn't add VEB, err %s aq_err %s\n",
10140 i40e_stat_str(&pf->hw, ret),
10141 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10142 return -EPERM;
10143 }
10144
10145 /* get statistics counter */
10146 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10147 &veb->stats_idx, NULL, NULL, NULL);
10148 if (ret) {
10149 dev_info(&pf->pdev->dev,
10150 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10151 i40e_stat_str(&pf->hw, ret),
10152 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10153 return -EPERM;
10154 }
10155 ret = i40e_veb_get_bw_info(veb);
10156 if (ret) {
10157 dev_info(&pf->pdev->dev,
10158 "couldn't get VEB bw info, err %s aq_err %s\n",
10159 i40e_stat_str(&pf->hw, ret),
10160 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10161 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10162 return -ENOENT;
10163 }
10164
10165 vsi->uplink_seid = veb->seid;
10166 vsi->veb_idx = veb->idx;
10167 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10168
10169 return 0;
10170 }
10171
10172 /**
10173 * i40e_veb_setup - Set up a VEB
10174 * @pf: board private structure
10175 * @flags: VEB setup flags
10176 * @uplink_seid: the switch element to link to
10177 * @vsi_seid: the initial VSI seid
10178 * @enabled_tc: Enabled TC bit-map
10179 *
10180 * This allocates the sw VEB structure and links it into the switch
10181 * It is possible and legal for this to be a duplicate of an already
10182 * existing VEB. It is also possible for both uplink and vsi seids
10183 * to be zero, in order to create a floating VEB.
10184 *
10185 * Returns pointer to the successfully allocated VEB sw struct on
10186 * success, otherwise returns NULL on failure.
10187 **/
10188 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10189 u16 uplink_seid, u16 vsi_seid,
10190 u8 enabled_tc)
10191 {
10192 struct i40e_veb *veb, *uplink_veb = NULL;
10193 int vsi_idx, veb_idx;
10194 int ret;
10195
10196 /* if one seid is 0, the other must be 0 to create a floating relay */
10197 if ((uplink_seid == 0 || vsi_seid == 0) &&
10198 (uplink_seid + vsi_seid != 0)) {
10199 dev_info(&pf->pdev->dev,
10200 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10201 uplink_seid, vsi_seid);
10202 return NULL;
10203 }
10204
10205 /* make sure there is such a vsi and uplink */
10206 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10207 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10208 break;
10209 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10210 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10211 vsi_seid);
10212 return NULL;
10213 }
10214
10215 if (uplink_seid && uplink_seid != pf->mac_seid) {
10216 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10217 if (pf->veb[veb_idx] &&
10218 pf->veb[veb_idx]->seid == uplink_seid) {
10219 uplink_veb = pf->veb[veb_idx];
10220 break;
10221 }
10222 }
10223 if (!uplink_veb) {
10224 dev_info(&pf->pdev->dev,
10225 "uplink seid %d not found\n", uplink_seid);
10226 return NULL;
10227 }
10228 }
10229
10230 /* get veb sw struct */
10231 veb_idx = i40e_veb_mem_alloc(pf);
10232 if (veb_idx < 0)
10233 goto err_alloc;
10234 veb = pf->veb[veb_idx];
10235 veb->flags = flags;
10236 veb->uplink_seid = uplink_seid;
10237 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10238 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10239
10240 /* create the VEB in the switch */
10241 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10242 if (ret)
10243 goto err_veb;
10244 if (vsi_idx == pf->lan_vsi)
10245 pf->lan_veb = veb->idx;
10246
10247 return veb;
10248
10249 err_veb:
10250 i40e_veb_clear(veb);
10251 err_alloc:
10252 return NULL;
10253 }
10254
10255 /**
10256 * i40e_setup_pf_switch_element - set PF vars based on switch type
10257 * @pf: board private structure
10258 * @ele: element we are building info from
10259 * @num_reported: total number of elements
10260 * @printconfig: should we print the contents
10261 *
10262 * helper function to assist in extracting a few useful SEID values.
10263 **/
10264 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10265 struct i40e_aqc_switch_config_element_resp *ele,
10266 u16 num_reported, bool printconfig)
10267 {
10268 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10269 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10270 u8 element_type = ele->element_type;
10271 u16 seid = le16_to_cpu(ele->seid);
10272
10273 if (printconfig)
10274 dev_info(&pf->pdev->dev,
10275 "type=%d seid=%d uplink=%d downlink=%d\n",
10276 element_type, seid, uplink_seid, downlink_seid);
10277
10278 switch (element_type) {
10279 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10280 pf->mac_seid = seid;
10281 break;
10282 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10283 /* Main VEB? */
10284 if (uplink_seid != pf->mac_seid)
10285 break;
10286 if (pf->lan_veb == I40E_NO_VEB) {
10287 int v;
10288
10289 /* find existing or else empty VEB */
10290 for (v = 0; v < I40E_MAX_VEB; v++) {
10291 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10292 pf->lan_veb = v;
10293 break;
10294 }
10295 }
10296 if (pf->lan_veb == I40E_NO_VEB) {
10297 v = i40e_veb_mem_alloc(pf);
10298 if (v < 0)
10299 break;
10300 pf->lan_veb = v;
10301 }
10302 }
10303
10304 pf->veb[pf->lan_veb]->seid = seid;
10305 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10306 pf->veb[pf->lan_veb]->pf = pf;
10307 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10308 break;
10309 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10310 if (num_reported != 1)
10311 break;
10312 /* This is immediately after a reset so we can assume this is
10313 * the PF's VSI
10314 */
10315 pf->mac_seid = uplink_seid;
10316 pf->pf_seid = downlink_seid;
10317 pf->main_vsi_seid = seid;
10318 if (printconfig)
10319 dev_info(&pf->pdev->dev,
10320 "pf_seid=%d main_vsi_seid=%d\n",
10321 pf->pf_seid, pf->main_vsi_seid);
10322 break;
10323 case I40E_SWITCH_ELEMENT_TYPE_PF:
10324 case I40E_SWITCH_ELEMENT_TYPE_VF:
10325 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10326 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10327 case I40E_SWITCH_ELEMENT_TYPE_PE:
10328 case I40E_SWITCH_ELEMENT_TYPE_PA:
10329 /* ignore these for now */
10330 break;
10331 default:
10332 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10333 element_type, seid);
10334 break;
10335 }
10336 }
10337
10338 /**
10339 * i40e_fetch_switch_configuration - Get switch config from firmware
10340 * @pf: board private structure
10341 * @printconfig: should we print the contents
10342 *
10343 * Get the current switch configuration from the device and
10344 * extract a few useful SEID values.
10345 **/
10346 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10347 {
10348 struct i40e_aqc_get_switch_config_resp *sw_config;
10349 u16 next_seid = 0;
10350 int ret = 0;
10351 u8 *aq_buf;
10352 int i;
10353
10354 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10355 if (!aq_buf)
10356 return -ENOMEM;
10357
10358 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10359 do {
10360 u16 num_reported, num_total;
10361
10362 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10363 I40E_AQ_LARGE_BUF,
10364 &next_seid, NULL);
10365 if (ret) {
10366 dev_info(&pf->pdev->dev,
10367 "get switch config failed err %s aq_err %s\n",
10368 i40e_stat_str(&pf->hw, ret),
10369 i40e_aq_str(&pf->hw,
10370 pf->hw.aq.asq_last_status));
10371 kfree(aq_buf);
10372 return -ENOENT;
10373 }
10374
10375 num_reported = le16_to_cpu(sw_config->header.num_reported);
10376 num_total = le16_to_cpu(sw_config->header.num_total);
10377
10378 if (printconfig)
10379 dev_info(&pf->pdev->dev,
10380 "header: %d reported %d total\n",
10381 num_reported, num_total);
10382
10383 for (i = 0; i < num_reported; i++) {
10384 struct i40e_aqc_switch_config_element_resp *ele =
10385 &sw_config->element[i];
10386
10387 i40e_setup_pf_switch_element(pf, ele, num_reported,
10388 printconfig);
10389 }
10390 } while (next_seid != 0);
10391
10392 kfree(aq_buf);
10393 return ret;
10394 }
10395
10396 /**
10397 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10398 * @pf: board private structure
10399 * @reinit: if the Main VSI needs to re-initialized.
10400 *
10401 * Returns 0 on success, negative value on failure
10402 **/
10403 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10404 {
10405 u16 flags = 0;
10406 int ret;
10407
10408 /* find out what's out there already */
10409 ret = i40e_fetch_switch_configuration(pf, false);
10410 if (ret) {
10411 dev_info(&pf->pdev->dev,
10412 "couldn't fetch switch config, err %s aq_err %s\n",
10413 i40e_stat_str(&pf->hw, ret),
10414 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10415 return ret;
10416 }
10417 i40e_pf_reset_stats(pf);
10418
10419 /* set the switch config bit for the whole device to
10420 * support limited promisc or true promisc
10421 * when user requests promisc. The default is limited
10422 * promisc.
10423 */
10424
10425 if ((pf->hw.pf_id == 0) &&
10426 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10427 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10428
10429 if (pf->hw.pf_id == 0) {
10430 u16 valid_flags;
10431
10432 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10433 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10434 NULL);
10435 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10436 dev_info(&pf->pdev->dev,
10437 "couldn't set switch config bits, err %s aq_err %s\n",
10438 i40e_stat_str(&pf->hw, ret),
10439 i40e_aq_str(&pf->hw,
10440 pf->hw.aq.asq_last_status));
10441 /* not a fatal problem, just keep going */
10442 }
10443 }
10444
10445 /* first time setup */
10446 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10447 struct i40e_vsi *vsi = NULL;
10448 u16 uplink_seid;
10449
10450 /* Set up the PF VSI associated with the PF's main VSI
10451 * that is already in the HW switch
10452 */
10453 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10454 uplink_seid = pf->veb[pf->lan_veb]->seid;
10455 else
10456 uplink_seid = pf->mac_seid;
10457 if (pf->lan_vsi == I40E_NO_VSI)
10458 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10459 else if (reinit)
10460 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10461 if (!vsi) {
10462 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10463 i40e_fdir_teardown(pf);
10464 return -EAGAIN;
10465 }
10466 } else {
10467 /* force a reset of TC and queue layout configurations */
10468 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10469
10470 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10471 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10472 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10473 }
10474 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10475
10476 i40e_fdir_sb_setup(pf);
10477
10478 /* Setup static PF queue filter control settings */
10479 ret = i40e_setup_pf_filter_control(pf);
10480 if (ret) {
10481 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10482 ret);
10483 /* Failure here should not stop continuing other steps */
10484 }
10485
10486 /* enable RSS in the HW, even for only one queue, as the stack can use
10487 * the hash
10488 */
10489 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10490 i40e_pf_config_rss(pf);
10491
10492 /* fill in link information and enable LSE reporting */
10493 i40e_update_link_info(&pf->hw);
10494 i40e_link_event(pf);
10495
10496 /* Initialize user-specific link properties */
10497 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10498 I40E_AQ_AN_COMPLETED) ? true : false);
10499
10500 i40e_ptp_init(pf);
10501
10502 return ret;
10503 }
10504
10505 /**
10506 * i40e_determine_queue_usage - Work out queue distribution
10507 * @pf: board private structure
10508 **/
10509 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10510 {
10511 int queues_left;
10512
10513 pf->num_lan_qps = 0;
10514 #ifdef I40E_FCOE
10515 pf->num_fcoe_qps = 0;
10516 #endif
10517
10518 /* Find the max queues to be put into basic use. We'll always be
10519 * using TC0, whether or not DCB is running, and TC0 will get the
10520 * big RSS set.
10521 */
10522 queues_left = pf->hw.func_caps.num_tx_qp;
10523
10524 if ((queues_left == 1) ||
10525 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10526 /* one qp for PF, no queues for anything else */
10527 queues_left = 0;
10528 pf->alloc_rss_size = pf->num_lan_qps = 1;
10529
10530 /* make sure all the fancies are disabled */
10531 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10532 I40E_FLAG_IWARP_ENABLED |
10533 #ifdef I40E_FCOE
10534 I40E_FLAG_FCOE_ENABLED |
10535 #endif
10536 I40E_FLAG_FD_SB_ENABLED |
10537 I40E_FLAG_FD_ATR_ENABLED |
10538 I40E_FLAG_DCB_CAPABLE |
10539 I40E_FLAG_DCB_ENABLED |
10540 I40E_FLAG_SRIOV_ENABLED |
10541 I40E_FLAG_VMDQ_ENABLED);
10542 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10543 I40E_FLAG_FD_SB_ENABLED |
10544 I40E_FLAG_FD_ATR_ENABLED |
10545 I40E_FLAG_DCB_CAPABLE))) {
10546 /* one qp for PF */
10547 pf->alloc_rss_size = pf->num_lan_qps = 1;
10548 queues_left -= pf->num_lan_qps;
10549
10550 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10551 I40E_FLAG_IWARP_ENABLED |
10552 #ifdef I40E_FCOE
10553 I40E_FLAG_FCOE_ENABLED |
10554 #endif
10555 I40E_FLAG_FD_SB_ENABLED |
10556 I40E_FLAG_FD_ATR_ENABLED |
10557 I40E_FLAG_DCB_ENABLED |
10558 I40E_FLAG_VMDQ_ENABLED);
10559 } else {
10560 /* Not enough queues for all TCs */
10561 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10562 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10563 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10564 I40E_FLAG_DCB_ENABLED);
10565 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10566 }
10567 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10568 num_online_cpus());
10569 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10570 pf->hw.func_caps.num_tx_qp);
10571
10572 queues_left -= pf->num_lan_qps;
10573 }
10574
10575 #ifdef I40E_FCOE
10576 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10577 if (I40E_DEFAULT_FCOE <= queues_left) {
10578 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10579 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10580 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10581 } else {
10582 pf->num_fcoe_qps = 0;
10583 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10584 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10585 }
10586
10587 queues_left -= pf->num_fcoe_qps;
10588 }
10589
10590 #endif
10591 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10592 if (queues_left > 1) {
10593 queues_left -= 1; /* save 1 queue for FD */
10594 } else {
10595 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10596 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10597 }
10598 }
10599
10600 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10601 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10602 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10603 (queues_left / pf->num_vf_qps));
10604 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10605 }
10606
10607 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10608 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10609 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10610 (queues_left / pf->num_vmdq_qps));
10611 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10612 }
10613
10614 pf->queues_left = queues_left;
10615 dev_dbg(&pf->pdev->dev,
10616 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10617 pf->hw.func_caps.num_tx_qp,
10618 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10619 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10620 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10621 queues_left);
10622 #ifdef I40E_FCOE
10623 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10624 #endif
10625 }
10626
10627 /**
10628 * i40e_setup_pf_filter_control - Setup PF static filter control
10629 * @pf: PF to be setup
10630 *
10631 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10632 * settings. If PE/FCoE are enabled then it will also set the per PF
10633 * based filter sizes required for them. It also enables Flow director,
10634 * ethertype and macvlan type filter settings for the pf.
10635 *
10636 * Returns 0 on success, negative on failure
10637 **/
10638 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10639 {
10640 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10641
10642 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10643
10644 /* Flow Director is enabled */
10645 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10646 settings->enable_fdir = true;
10647
10648 /* Ethtype and MACVLAN filters enabled for PF */
10649 settings->enable_ethtype = true;
10650 settings->enable_macvlan = true;
10651
10652 if (i40e_set_filter_control(&pf->hw, settings))
10653 return -ENOENT;
10654
10655 return 0;
10656 }
10657
10658 #define INFO_STRING_LEN 255
10659 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10660 static void i40e_print_features(struct i40e_pf *pf)
10661 {
10662 struct i40e_hw *hw = &pf->hw;
10663 char *buf;
10664 int i;
10665
10666 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10667 if (!buf)
10668 return;
10669
10670 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10671 #ifdef CONFIG_PCI_IOV
10672 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10673 #endif
10674 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10675 pf->hw.func_caps.num_vsis,
10676 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10677 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10678 i += snprintf(&buf[i], REMAIN(i), " RSS");
10679 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10680 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10681 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10682 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10683 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10684 }
10685 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10686 i += snprintf(&buf[i], REMAIN(i), " DCB");
10687 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10688 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10689 if (pf->flags & I40E_FLAG_PTP)
10690 i += snprintf(&buf[i], REMAIN(i), " PTP");
10691 #ifdef I40E_FCOE
10692 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10693 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10694 #endif
10695 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10696 i += snprintf(&buf[i], REMAIN(i), " VEB");
10697 else
10698 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10699
10700 dev_info(&pf->pdev->dev, "%s\n", buf);
10701 kfree(buf);
10702 WARN_ON(i > INFO_STRING_LEN);
10703 }
10704
10705 /**
10706 * i40e_get_platform_mac_addr - get platform-specific MAC address
10707 *
10708 * @pdev: PCI device information struct
10709 * @pf: board private structure
10710 *
10711 * Look up the MAC address in Open Firmware on systems that support it,
10712 * and use IDPROM on SPARC if no OF address is found. On return, the
10713 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10714 * has been selected.
10715 **/
10716 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10717 {
10718 pf->flags &= ~I40E_FLAG_PF_MAC;
10719 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10720 pf->flags |= I40E_FLAG_PF_MAC;
10721 }
10722
10723 /**
10724 * i40e_probe - Device initialization routine
10725 * @pdev: PCI device information struct
10726 * @ent: entry in i40e_pci_tbl
10727 *
10728 * i40e_probe initializes a PF identified by a pci_dev structure.
10729 * The OS initialization, configuring of the PF private structure,
10730 * and a hardware reset occur.
10731 *
10732 * Returns 0 on success, negative on failure
10733 **/
10734 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10735 {
10736 struct i40e_aq_get_phy_abilities_resp abilities;
10737 struct i40e_pf *pf;
10738 struct i40e_hw *hw;
10739 static u16 pfs_found;
10740 u16 wol_nvm_bits;
10741 u16 link_status;
10742 int err;
10743 u32 val;
10744 u32 i;
10745 u8 set_fc_aq_fail;
10746
10747 err = pci_enable_device_mem(pdev);
10748 if (err)
10749 return err;
10750
10751 /* set up for high or low dma */
10752 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10753 if (err) {
10754 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10755 if (err) {
10756 dev_err(&pdev->dev,
10757 "DMA configuration failed: 0x%x\n", err);
10758 goto err_dma;
10759 }
10760 }
10761
10762 /* set up pci connections */
10763 err = pci_request_mem_regions(pdev, i40e_driver_name);
10764 if (err) {
10765 dev_info(&pdev->dev,
10766 "pci_request_selected_regions failed %d\n", err);
10767 goto err_pci_reg;
10768 }
10769
10770 pci_enable_pcie_error_reporting(pdev);
10771 pci_set_master(pdev);
10772
10773 /* Now that we have a PCI connection, we need to do the
10774 * low level device setup. This is primarily setting up
10775 * the Admin Queue structures and then querying for the
10776 * device's current profile information.
10777 */
10778 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10779 if (!pf) {
10780 err = -ENOMEM;
10781 goto err_pf_alloc;
10782 }
10783 pf->next_vsi = 0;
10784 pf->pdev = pdev;
10785 set_bit(__I40E_DOWN, &pf->state);
10786
10787 hw = &pf->hw;
10788 hw->back = pf;
10789
10790 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10791 I40E_MAX_CSR_SPACE);
10792
10793 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10794 if (!hw->hw_addr) {
10795 err = -EIO;
10796 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10797 (unsigned int)pci_resource_start(pdev, 0),
10798 pf->ioremap_len, err);
10799 goto err_ioremap;
10800 }
10801 hw->vendor_id = pdev->vendor;
10802 hw->device_id = pdev->device;
10803 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10804 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10805 hw->subsystem_device_id = pdev->subsystem_device;
10806 hw->bus.device = PCI_SLOT(pdev->devfn);
10807 hw->bus.func = PCI_FUNC(pdev->devfn);
10808 pf->instance = pfs_found;
10809
10810 /* set up the locks for the AQ, do this only once in probe
10811 * and destroy them only once in remove
10812 */
10813 mutex_init(&hw->aq.asq_mutex);
10814 mutex_init(&hw->aq.arq_mutex);
10815
10816 if (debug != -1) {
10817 pf->msg_enable = pf->hw.debug_mask;
10818 pf->msg_enable = debug;
10819 }
10820
10821 /* do a special CORER for clearing PXE mode once at init */
10822 if (hw->revision_id == 0 &&
10823 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10824 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10825 i40e_flush(hw);
10826 msleep(200);
10827 pf->corer_count++;
10828
10829 i40e_clear_pxe_mode(hw);
10830 }
10831
10832 /* Reset here to make sure all is clean and to define PF 'n' */
10833 i40e_clear_hw(hw);
10834 err = i40e_pf_reset(hw);
10835 if (err) {
10836 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10837 goto err_pf_reset;
10838 }
10839 pf->pfr_count++;
10840
10841 hw->aq.num_arq_entries = I40E_AQ_LEN;
10842 hw->aq.num_asq_entries = I40E_AQ_LEN;
10843 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10844 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10845 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10846
10847 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10848 "%s-%s:misc",
10849 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10850
10851 err = i40e_init_shared_code(hw);
10852 if (err) {
10853 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10854 err);
10855 goto err_pf_reset;
10856 }
10857
10858 /* set up a default setting for link flow control */
10859 pf->hw.fc.requested_mode = I40E_FC_NONE;
10860
10861 err = i40e_init_adminq(hw);
10862 if (err) {
10863 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10864 dev_info(&pdev->dev,
10865 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10866 else
10867 dev_info(&pdev->dev,
10868 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10869
10870 goto err_pf_reset;
10871 }
10872
10873 /* provide nvm, fw, api versions */
10874 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10875 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10876 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10877 i40e_nvm_version_str(hw));
10878
10879 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10880 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10881 dev_info(&pdev->dev,
10882 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10883 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10884 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10885 dev_info(&pdev->dev,
10886 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10887
10888 i40e_verify_eeprom(pf);
10889
10890 /* Rev 0 hardware was never productized */
10891 if (hw->revision_id < 1)
10892 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10893
10894 i40e_clear_pxe_mode(hw);
10895 err = i40e_get_capabilities(pf);
10896 if (err)
10897 goto err_adminq_setup;
10898
10899 err = i40e_sw_init(pf);
10900 if (err) {
10901 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10902 goto err_sw_init;
10903 }
10904
10905 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10906 hw->func_caps.num_rx_qp,
10907 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10908 if (err) {
10909 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10910 goto err_init_lan_hmc;
10911 }
10912
10913 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10914 if (err) {
10915 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10916 err = -ENOENT;
10917 goto err_configure_lan_hmc;
10918 }
10919
10920 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10921 * Ignore error return codes because if it was already disabled via
10922 * hardware settings this will fail
10923 */
10924 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
10925 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10926 i40e_aq_stop_lldp(hw, true, NULL);
10927 }
10928
10929 i40e_get_mac_addr(hw, hw->mac.addr);
10930 /* allow a platform config to override the HW addr */
10931 i40e_get_platform_mac_addr(pdev, pf);
10932 if (!is_valid_ether_addr(hw->mac.addr)) {
10933 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10934 err = -EIO;
10935 goto err_mac_addr;
10936 }
10937 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10938 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10939 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10940 if (is_valid_ether_addr(hw->mac.port_addr))
10941 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10942 #ifdef I40E_FCOE
10943 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10944 if (err)
10945 dev_info(&pdev->dev,
10946 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10947 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10948 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10949 hw->mac.san_addr);
10950 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10951 }
10952 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10953 #endif /* I40E_FCOE */
10954
10955 pci_set_drvdata(pdev, pf);
10956 pci_save_state(pdev);
10957 #ifdef CONFIG_I40E_DCB
10958 err = i40e_init_pf_dcb(pf);
10959 if (err) {
10960 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10961 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE & I40E_FLAG_DCB_ENABLED);
10962 /* Continue without DCB enabled */
10963 }
10964 #endif /* CONFIG_I40E_DCB */
10965
10966 /* set up periodic task facility */
10967 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10968 pf->service_timer_period = HZ;
10969
10970 INIT_WORK(&pf->service_task, i40e_service_task);
10971 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10972 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10973
10974 /* NVM bit on means WoL disabled for the port */
10975 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10976 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10977 pf->wol_en = false;
10978 else
10979 pf->wol_en = true;
10980 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10981
10982 /* set up the main switch operations */
10983 i40e_determine_queue_usage(pf);
10984 err = i40e_init_interrupt_scheme(pf);
10985 if (err)
10986 goto err_switch_setup;
10987
10988 /* The number of VSIs reported by the FW is the minimum guaranteed
10989 * to us; HW supports far more and we share the remaining pool with
10990 * the other PFs. We allocate space for more than the guarantee with
10991 * the understanding that we might not get them all later.
10992 */
10993 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10994 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10995 else
10996 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10997
10998 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10999 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11000 GFP_KERNEL);
11001 if (!pf->vsi) {
11002 err = -ENOMEM;
11003 goto err_switch_setup;
11004 }
11005
11006 #ifdef CONFIG_PCI_IOV
11007 /* prep for VF support */
11008 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11009 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11010 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11011 if (pci_num_vf(pdev))
11012 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11013 }
11014 #endif
11015 err = i40e_setup_pf_switch(pf, false);
11016 if (err) {
11017 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11018 goto err_vsis;
11019 }
11020
11021 /* Make sure flow control is set according to current settings */
11022 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11023 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11024 dev_dbg(&pf->pdev->dev,
11025 "Set fc with err %s aq_err %s on get_phy_cap\n",
11026 i40e_stat_str(hw, err),
11027 i40e_aq_str(hw, hw->aq.asq_last_status));
11028 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11029 dev_dbg(&pf->pdev->dev,
11030 "Set fc with err %s aq_err %s on set_phy_config\n",
11031 i40e_stat_str(hw, err),
11032 i40e_aq_str(hw, hw->aq.asq_last_status));
11033 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11034 dev_dbg(&pf->pdev->dev,
11035 "Set fc with err %s aq_err %s on get_link_info\n",
11036 i40e_stat_str(hw, err),
11037 i40e_aq_str(hw, hw->aq.asq_last_status));
11038
11039 /* if FDIR VSI was set up, start it now */
11040 for (i = 0; i < pf->num_alloc_vsi; i++) {
11041 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11042 i40e_vsi_open(pf->vsi[i]);
11043 break;
11044 }
11045 }
11046
11047 /* The driver only wants link up/down and module qualification
11048 * reports from firmware. Note the negative logic.
11049 */
11050 err = i40e_aq_set_phy_int_mask(&pf->hw,
11051 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11052 I40E_AQ_EVENT_MEDIA_NA |
11053 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11054 if (err)
11055 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11056 i40e_stat_str(&pf->hw, err),
11057 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11058
11059 /* Reconfigure hardware for allowing smaller MSS in the case
11060 * of TSO, so that we avoid the MDD being fired and causing
11061 * a reset in the case of small MSS+TSO.
11062 */
11063 val = rd32(hw, I40E_REG_MSS);
11064 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11065 val &= ~I40E_REG_MSS_MIN_MASK;
11066 val |= I40E_64BYTE_MSS;
11067 wr32(hw, I40E_REG_MSS, val);
11068 }
11069
11070 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11071 msleep(75);
11072 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11073 if (err)
11074 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11075 i40e_stat_str(&pf->hw, err),
11076 i40e_aq_str(&pf->hw,
11077 pf->hw.aq.asq_last_status));
11078 }
11079 /* The main driver is (mostly) up and happy. We need to set this state
11080 * before setting up the misc vector or we get a race and the vector
11081 * ends up disabled forever.
11082 */
11083 clear_bit(__I40E_DOWN, &pf->state);
11084
11085 /* In case of MSIX we are going to setup the misc vector right here
11086 * to handle admin queue events etc. In case of legacy and MSI
11087 * the misc functionality and queue processing is combined in
11088 * the same vector and that gets setup at open.
11089 */
11090 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11091 err = i40e_setup_misc_vector(pf);
11092 if (err) {
11093 dev_info(&pdev->dev,
11094 "setup of misc vector failed: %d\n", err);
11095 goto err_vsis;
11096 }
11097 }
11098
11099 #ifdef CONFIG_PCI_IOV
11100 /* prep for VF support */
11101 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11102 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11103 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11104 /* disable link interrupts for VFs */
11105 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11106 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11107 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11108 i40e_flush(hw);
11109
11110 if (pci_num_vf(pdev)) {
11111 dev_info(&pdev->dev,
11112 "Active VFs found, allocating resources.\n");
11113 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11114 if (err)
11115 dev_info(&pdev->dev,
11116 "Error %d allocating resources for existing VFs\n",
11117 err);
11118 }
11119 }
11120 #endif /* CONFIG_PCI_IOV */
11121
11122 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11123 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11124 pf->num_iwarp_msix,
11125 I40E_IWARP_IRQ_PILE_ID);
11126 if (pf->iwarp_base_vector < 0) {
11127 dev_info(&pdev->dev,
11128 "failed to get tracking for %d vectors for IWARP err=%d\n",
11129 pf->num_iwarp_msix, pf->iwarp_base_vector);
11130 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11131 }
11132 }
11133
11134 i40e_dbg_pf_init(pf);
11135
11136 /* tell the firmware that we're starting */
11137 i40e_send_version(pf);
11138
11139 /* since everything's happy, start the service_task timer */
11140 mod_timer(&pf->service_timer,
11141 round_jiffies(jiffies + pf->service_timer_period));
11142
11143 /* add this PF to client device list and launch a client service task */
11144 err = i40e_lan_add_device(pf);
11145 if (err)
11146 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11147 err);
11148
11149 #ifdef I40E_FCOE
11150 /* create FCoE interface */
11151 i40e_fcoe_vsi_setup(pf);
11152
11153 #endif
11154 #define PCI_SPEED_SIZE 8
11155 #define PCI_WIDTH_SIZE 8
11156 /* Devices on the IOSF bus do not have this information
11157 * and will report PCI Gen 1 x 1 by default so don't bother
11158 * checking them.
11159 */
11160 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11161 char speed[PCI_SPEED_SIZE] = "Unknown";
11162 char width[PCI_WIDTH_SIZE] = "Unknown";
11163
11164 /* Get the negotiated link width and speed from PCI config
11165 * space
11166 */
11167 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11168 &link_status);
11169
11170 i40e_set_pci_config_data(hw, link_status);
11171
11172 switch (hw->bus.speed) {
11173 case i40e_bus_speed_8000:
11174 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11175 case i40e_bus_speed_5000:
11176 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11177 case i40e_bus_speed_2500:
11178 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11179 default:
11180 break;
11181 }
11182 switch (hw->bus.width) {
11183 case i40e_bus_width_pcie_x8:
11184 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11185 case i40e_bus_width_pcie_x4:
11186 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11187 case i40e_bus_width_pcie_x2:
11188 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11189 case i40e_bus_width_pcie_x1:
11190 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11191 default:
11192 break;
11193 }
11194
11195 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11196 speed, width);
11197
11198 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11199 hw->bus.speed < i40e_bus_speed_8000) {
11200 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11201 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11202 }
11203 }
11204
11205 /* get the requested speeds from the fw */
11206 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11207 if (err)
11208 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11209 i40e_stat_str(&pf->hw, err),
11210 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11211 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11212
11213 /* get the supported phy types from the fw */
11214 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11215 if (err)
11216 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11217 i40e_stat_str(&pf->hw, err),
11218 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11219 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11220
11221 /* Add a filter to drop all Flow control frames from any VSI from being
11222 * transmitted. By doing so we stop a malicious VF from sending out
11223 * PAUSE or PFC frames and potentially controlling traffic for other
11224 * PF/VF VSIs.
11225 * The FW can still send Flow control frames if enabled.
11226 */
11227 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11228 pf->main_vsi_seid);
11229
11230 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11231 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11232 pf->flags |= I40E_FLAG_HAVE_10GBASET_PHY;
11233
11234 /* print a string summarizing features */
11235 i40e_print_features(pf);
11236
11237 return 0;
11238
11239 /* Unwind what we've done if something failed in the setup */
11240 err_vsis:
11241 set_bit(__I40E_DOWN, &pf->state);
11242 i40e_clear_interrupt_scheme(pf);
11243 kfree(pf->vsi);
11244 err_switch_setup:
11245 i40e_reset_interrupt_capability(pf);
11246 del_timer_sync(&pf->service_timer);
11247 err_mac_addr:
11248 err_configure_lan_hmc:
11249 (void)i40e_shutdown_lan_hmc(hw);
11250 err_init_lan_hmc:
11251 kfree(pf->qp_pile);
11252 err_sw_init:
11253 err_adminq_setup:
11254 err_pf_reset:
11255 iounmap(hw->hw_addr);
11256 err_ioremap:
11257 kfree(pf);
11258 err_pf_alloc:
11259 pci_disable_pcie_error_reporting(pdev);
11260 pci_release_mem_regions(pdev);
11261 err_pci_reg:
11262 err_dma:
11263 pci_disable_device(pdev);
11264 return err;
11265 }
11266
11267 /**
11268 * i40e_remove - Device removal routine
11269 * @pdev: PCI device information struct
11270 *
11271 * i40e_remove is called by the PCI subsystem to alert the driver
11272 * that is should release a PCI device. This could be caused by a
11273 * Hot-Plug event, or because the driver is going to be removed from
11274 * memory.
11275 **/
11276 static void i40e_remove(struct pci_dev *pdev)
11277 {
11278 struct i40e_pf *pf = pci_get_drvdata(pdev);
11279 struct i40e_hw *hw = &pf->hw;
11280 i40e_status ret_code;
11281 int i;
11282
11283 i40e_dbg_pf_exit(pf);
11284
11285 i40e_ptp_stop(pf);
11286
11287 /* Disable RSS in hw */
11288 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11289 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11290
11291 /* no more scheduling of any task */
11292 set_bit(__I40E_SUSPENDED, &pf->state);
11293 set_bit(__I40E_DOWN, &pf->state);
11294 if (pf->service_timer.data)
11295 del_timer_sync(&pf->service_timer);
11296 if (pf->service_task.func)
11297 cancel_work_sync(&pf->service_task);
11298
11299 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11300 i40e_free_vfs(pf);
11301 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11302 }
11303
11304 i40e_fdir_teardown(pf);
11305
11306 /* If there is a switch structure or any orphans, remove them.
11307 * This will leave only the PF's VSI remaining.
11308 */
11309 for (i = 0; i < I40E_MAX_VEB; i++) {
11310 if (!pf->veb[i])
11311 continue;
11312
11313 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11314 pf->veb[i]->uplink_seid == 0)
11315 i40e_switch_branch_release(pf->veb[i]);
11316 }
11317
11318 /* Now we can shutdown the PF's VSI, just before we kill
11319 * adminq and hmc.
11320 */
11321 if (pf->vsi[pf->lan_vsi])
11322 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11323
11324 /* remove attached clients */
11325 ret_code = i40e_lan_del_device(pf);
11326 if (ret_code) {
11327 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11328 ret_code);
11329 }
11330
11331 /* shutdown and destroy the HMC */
11332 if (hw->hmc.hmc_obj) {
11333 ret_code = i40e_shutdown_lan_hmc(hw);
11334 if (ret_code)
11335 dev_warn(&pdev->dev,
11336 "Failed to destroy the HMC resources: %d\n",
11337 ret_code);
11338 }
11339
11340 /* shutdown the adminq */
11341 ret_code = i40e_shutdown_adminq(hw);
11342 if (ret_code)
11343 dev_warn(&pdev->dev,
11344 "Failed to destroy the Admin Queue resources: %d\n",
11345 ret_code);
11346
11347 /* destroy the locks only once, here */
11348 mutex_destroy(&hw->aq.arq_mutex);
11349 mutex_destroy(&hw->aq.asq_mutex);
11350
11351 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11352 i40e_clear_interrupt_scheme(pf);
11353 for (i = 0; i < pf->num_alloc_vsi; i++) {
11354 if (pf->vsi[i]) {
11355 i40e_vsi_clear_rings(pf->vsi[i]);
11356 i40e_vsi_clear(pf->vsi[i]);
11357 pf->vsi[i] = NULL;
11358 }
11359 }
11360
11361 for (i = 0; i < I40E_MAX_VEB; i++) {
11362 kfree(pf->veb[i]);
11363 pf->veb[i] = NULL;
11364 }
11365
11366 kfree(pf->qp_pile);
11367 kfree(pf->vsi);
11368
11369 iounmap(hw->hw_addr);
11370 kfree(pf);
11371 pci_release_mem_regions(pdev);
11372
11373 pci_disable_pcie_error_reporting(pdev);
11374 pci_disable_device(pdev);
11375 }
11376
11377 /**
11378 * i40e_pci_error_detected - warning that something funky happened in PCI land
11379 * @pdev: PCI device information struct
11380 *
11381 * Called to warn that something happened and the error handling steps
11382 * are in progress. Allows the driver to quiesce things, be ready for
11383 * remediation.
11384 **/
11385 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11386 enum pci_channel_state error)
11387 {
11388 struct i40e_pf *pf = pci_get_drvdata(pdev);
11389
11390 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11391
11392 /* shutdown all operations */
11393 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11394 rtnl_lock();
11395 i40e_prep_for_reset(pf);
11396 rtnl_unlock();
11397 }
11398
11399 /* Request a slot reset */
11400 return PCI_ERS_RESULT_NEED_RESET;
11401 }
11402
11403 /**
11404 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11405 * @pdev: PCI device information struct
11406 *
11407 * Called to find if the driver can work with the device now that
11408 * the pci slot has been reset. If a basic connection seems good
11409 * (registers are readable and have sane content) then return a
11410 * happy little PCI_ERS_RESULT_xxx.
11411 **/
11412 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11413 {
11414 struct i40e_pf *pf = pci_get_drvdata(pdev);
11415 pci_ers_result_t result;
11416 int err;
11417 u32 reg;
11418
11419 dev_dbg(&pdev->dev, "%s\n", __func__);
11420 if (pci_enable_device_mem(pdev)) {
11421 dev_info(&pdev->dev,
11422 "Cannot re-enable PCI device after reset.\n");
11423 result = PCI_ERS_RESULT_DISCONNECT;
11424 } else {
11425 pci_set_master(pdev);
11426 pci_restore_state(pdev);
11427 pci_save_state(pdev);
11428 pci_wake_from_d3(pdev, false);
11429
11430 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11431 if (reg == 0)
11432 result = PCI_ERS_RESULT_RECOVERED;
11433 else
11434 result = PCI_ERS_RESULT_DISCONNECT;
11435 }
11436
11437 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11438 if (err) {
11439 dev_info(&pdev->dev,
11440 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11441 err);
11442 /* non-fatal, continue */
11443 }
11444
11445 return result;
11446 }
11447
11448 /**
11449 * i40e_pci_error_resume - restart operations after PCI error recovery
11450 * @pdev: PCI device information struct
11451 *
11452 * Called to allow the driver to bring things back up after PCI error
11453 * and/or reset recovery has finished.
11454 **/
11455 static void i40e_pci_error_resume(struct pci_dev *pdev)
11456 {
11457 struct i40e_pf *pf = pci_get_drvdata(pdev);
11458
11459 dev_dbg(&pdev->dev, "%s\n", __func__);
11460 if (test_bit(__I40E_SUSPENDED, &pf->state))
11461 return;
11462
11463 rtnl_lock();
11464 i40e_handle_reset_warning(pf);
11465 rtnl_unlock();
11466 }
11467
11468 /**
11469 * i40e_shutdown - PCI callback for shutting down
11470 * @pdev: PCI device information struct
11471 **/
11472 static void i40e_shutdown(struct pci_dev *pdev)
11473 {
11474 struct i40e_pf *pf = pci_get_drvdata(pdev);
11475 struct i40e_hw *hw = &pf->hw;
11476
11477 set_bit(__I40E_SUSPENDED, &pf->state);
11478 set_bit(__I40E_DOWN, &pf->state);
11479 rtnl_lock();
11480 i40e_prep_for_reset(pf);
11481 rtnl_unlock();
11482
11483 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11484 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11485
11486 del_timer_sync(&pf->service_timer);
11487 cancel_work_sync(&pf->service_task);
11488 i40e_fdir_teardown(pf);
11489
11490 rtnl_lock();
11491 i40e_prep_for_reset(pf);
11492 rtnl_unlock();
11493
11494 wr32(hw, I40E_PFPM_APM,
11495 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11496 wr32(hw, I40E_PFPM_WUFC,
11497 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11498
11499 i40e_clear_interrupt_scheme(pf);
11500
11501 if (system_state == SYSTEM_POWER_OFF) {
11502 pci_wake_from_d3(pdev, pf->wol_en);
11503 pci_set_power_state(pdev, PCI_D3hot);
11504 }
11505 }
11506
11507 #ifdef CONFIG_PM
11508 /**
11509 * i40e_suspend - PCI callback for moving to D3
11510 * @pdev: PCI device information struct
11511 **/
11512 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11513 {
11514 struct i40e_pf *pf = pci_get_drvdata(pdev);
11515 struct i40e_hw *hw = &pf->hw;
11516 int retval = 0;
11517
11518 set_bit(__I40E_SUSPENDED, &pf->state);
11519 set_bit(__I40E_DOWN, &pf->state);
11520
11521 rtnl_lock();
11522 i40e_prep_for_reset(pf);
11523 rtnl_unlock();
11524
11525 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11526 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11527
11528 i40e_stop_misc_vector(pf);
11529
11530 retval = pci_save_state(pdev);
11531 if (retval)
11532 return retval;
11533
11534 pci_wake_from_d3(pdev, pf->wol_en);
11535 pci_set_power_state(pdev, PCI_D3hot);
11536
11537 return retval;
11538 }
11539
11540 /**
11541 * i40e_resume - PCI callback for waking up from D3
11542 * @pdev: PCI device information struct
11543 **/
11544 static int i40e_resume(struct pci_dev *pdev)
11545 {
11546 struct i40e_pf *pf = pci_get_drvdata(pdev);
11547 u32 err;
11548
11549 pci_set_power_state(pdev, PCI_D0);
11550 pci_restore_state(pdev);
11551 /* pci_restore_state() clears dev->state_saves, so
11552 * call pci_save_state() again to restore it.
11553 */
11554 pci_save_state(pdev);
11555
11556 err = pci_enable_device_mem(pdev);
11557 if (err) {
11558 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11559 return err;
11560 }
11561 pci_set_master(pdev);
11562
11563 /* no wakeup events while running */
11564 pci_wake_from_d3(pdev, false);
11565
11566 /* handling the reset will rebuild the device state */
11567 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11568 clear_bit(__I40E_DOWN, &pf->state);
11569 rtnl_lock();
11570 i40e_reset_and_rebuild(pf, false);
11571 rtnl_unlock();
11572 }
11573
11574 return 0;
11575 }
11576
11577 #endif
11578 static const struct pci_error_handlers i40e_err_handler = {
11579 .error_detected = i40e_pci_error_detected,
11580 .slot_reset = i40e_pci_error_slot_reset,
11581 .resume = i40e_pci_error_resume,
11582 };
11583
11584 static struct pci_driver i40e_driver = {
11585 .name = i40e_driver_name,
11586 .id_table = i40e_pci_tbl,
11587 .probe = i40e_probe,
11588 .remove = i40e_remove,
11589 #ifdef CONFIG_PM
11590 .suspend = i40e_suspend,
11591 .resume = i40e_resume,
11592 #endif
11593 .shutdown = i40e_shutdown,
11594 .err_handler = &i40e_err_handler,
11595 .sriov_configure = i40e_pci_sriov_configure,
11596 };
11597
11598 /**
11599 * i40e_init_module - Driver registration routine
11600 *
11601 * i40e_init_module is the first routine called when the driver is
11602 * loaded. All it does is register with the PCI subsystem.
11603 **/
11604 static int __init i40e_init_module(void)
11605 {
11606 pr_info("%s: %s - version %s\n", i40e_driver_name,
11607 i40e_driver_string, i40e_driver_version_str);
11608 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11609
11610 /* we will see if single thread per module is enough for now,
11611 * it can't be any worse than using the system workqueue which
11612 * was already single threaded
11613 */
11614 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
11615 i40e_driver_name);
11616 if (!i40e_wq) {
11617 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11618 return -ENOMEM;
11619 }
11620
11621 i40e_dbg_init();
11622 return pci_register_driver(&i40e_driver);
11623 }
11624 module_init(i40e_init_module);
11625
11626 /**
11627 * i40e_exit_module - Driver exit cleanup routine
11628 *
11629 * i40e_exit_module is called just before the driver is removed
11630 * from memory.
11631 **/
11632 static void __exit i40e_exit_module(void)
11633 {
11634 pci_unregister_driver(&i40e_driver);
11635 destroy_workqueue(i40e_wq);
11636 i40e_dbg_exit();
11637 }
11638 module_exit(i40e_exit_module);
Linux kernel - Deliverables
This page took 0.306414 seconds and 5 git commands to generate.