1 #as: -mlfence-after-load=yes
3 #name: x86-64 -mlfence-after-load=yes
8 Disassembly of section .text:
11 +[a-f0-9]+: c5 f8 ae 55 00 vldmxcsr 0x0\(%rbp\)
12 +[a-f0-9]+: 0f ae e8 lfence
13 +[a-f0-9]+: 0f 01 55 00 lgdt 0x0\(%rbp\)
14 +[a-f0-9]+: 0f ae e8 lfence
15 +[a-f0-9]+: 0f c7 75 00 vmptrld 0x0\(%rbp\)
16 +[a-f0-9]+: 0f ae e8 lfence
17 +[a-f0-9]+: 66 0f c7 75 00 vmclear 0x0\(%rbp\)
18 +[a-f0-9]+: d9 55 00 fsts 0x0\(%rbp\)
19 +[a-f0-9]+: d9 45 00 flds 0x0\(%rbp\)
20 +[a-f0-9]+: 0f ae e8 lfence
21 +[a-f0-9]+: db 55 00 fistl 0x0\(%rbp\)
22 +[a-f0-9]+: df 55 00 fists 0x0\(%rbp\)
23 +[a-f0-9]+: db 45 00 fildl 0x0\(%rbp\)
24 +[a-f0-9]+: 0f ae e8 lfence
25 +[a-f0-9]+: df 45 00 filds 0x0\(%rbp\)
26 +[a-f0-9]+: 0f ae e8 lfence
27 +[a-f0-9]+: 9b dd 75 00 fsave 0x0\(%rbp\)
28 +[a-f0-9]+: dd 65 00 frstor 0x0\(%rbp\)
29 +[a-f0-9]+: 0f ae e8 lfence
30 +[a-f0-9]+: df 45 00 filds 0x0\(%rbp\)
31 +[a-f0-9]+: 0f ae e8 lfence
32 +[a-f0-9]+: df 4d 00 fisttps 0x0\(%rbp\)
33 +[a-f0-9]+: d9 65 00 fldenv 0x0\(%rbp\)
34 +[a-f0-9]+: 0f ae e8 lfence
35 +[a-f0-9]+: 9b d9 75 00 fstenv 0x0\(%rbp\)
36 +[a-f0-9]+: d8 45 00 fadds 0x0\(%rbp\)
37 +[a-f0-9]+: 0f ae e8 lfence
38 +[a-f0-9]+: d8 04 24 fadds \(%rsp\)
39 +[a-f0-9]+: 0f ae e8 lfence
40 +[a-f0-9]+: d8 c3 fadd %st\(3\),%st
41 +[a-f0-9]+: d8 01 fadds \(%rcx\)
42 +[a-f0-9]+: 0f ae e8 lfence
43 +[a-f0-9]+: df 01 filds \(%rcx\)
44 +[a-f0-9]+: 0f ae e8 lfence
45 +[a-f0-9]+: df 11 fists \(%rcx\)
46 +[a-f0-9]+: 0f ae 29 xrstor \(%rcx\)
47 +[a-f0-9]+: 0f ae e8 lfence
48 +[a-f0-9]+: 0f 18 01 prefetchnta \(%rcx\)
49 +[a-f0-9]+: 0f c7 09 cmpxchg8b \(%rcx\)
50 +[a-f0-9]+: 0f ae e8 lfence
51 +[a-f0-9]+: 48 0f c7 09 cmpxchg16b \(%rcx\)
52 +[a-f0-9]+: 0f ae e8 lfence
53 +[a-f0-9]+: ff c1 inc %ecx
54 +[a-f0-9]+: 0f 01 10 lgdt \(%rax\)
55 +[a-f0-9]+: 0f ae e8 lfence
56 +[a-f0-9]+: 0f 0f 66 02 b0 pfcmpeq 0x2\(%rsi\),%mm4
57 +[a-f0-9]+: 0f ae e8 lfence
58 +[a-f0-9]+: 8f 00 popq \(%rax\)
59 +[a-f0-9]+: 0f ae e8 lfence
60 +[a-f0-9]+: 58 pop %rax
61 +[a-f0-9]+: 0f ae e8 lfence
62 +[a-f0-9]+: 66 d1 11 rclw \(%rcx\)
63 +[a-f0-9]+: 0f ae e8 lfence
64 +[a-f0-9]+: f7 01 01 00 00 00 testl \$0x1,\(%rcx\)
65 +[a-f0-9]+: 0f ae e8 lfence
66 +[a-f0-9]+: ff 01 incl \(%rcx\)
67 +[a-f0-9]+: 0f ae e8 lfence
68 +[a-f0-9]+: f7 11 notl \(%rcx\)
69 +[a-f0-9]+: 0f ae e8 lfence
70 +[a-f0-9]+: f7 31 divl \(%rcx\)
71 +[a-f0-9]+: 0f ae e8 lfence
72 +[a-f0-9]+: f7 21 mull \(%rcx\)
73 +[a-f0-9]+: 0f ae e8 lfence
74 +[a-f0-9]+: f7 39 idivl \(%rcx\)
75 +[a-f0-9]+: 0f ae e8 lfence
76 +[a-f0-9]+: f7 29 imull \(%rcx\)
77 +[a-f0-9]+: 0f ae e8 lfence
78 +[a-f0-9]+: 48 8d 04 40 lea \(%rax,%rax,2\),%rax
80 +[a-f0-9]+: 6e outsb %ds:\(%rsi\),\(%dx\)
81 +[a-f0-9]+: 0f ae e8 lfence
82 +[a-f0-9]+: ac lods %ds:\(%rsi\),%al
83 +[a-f0-9]+: 0f ae e8 lfence
84 +[a-f0-9]+: f3 a5 rep movsl %ds:\(%rsi\),%es:\(%rdi\)
85 +[a-f0-9]+: 0f ae e8 lfence
86 +[a-f0-9]+: f3 af repz scas %es:\(%rdi\),%eax
87 +[a-f0-9]+: 0f ae e8 lfence
88 +[a-f0-9]+: f3 a7 repz cmpsl %es:\(%rdi\),%ds:\(%rsi\)
89 +[a-f0-9]+: 0f ae e8 lfence
90 +[a-f0-9]+: f3 ad rep lods %ds:\(%rsi\),%eax
91 +[a-f0-9]+: 0f ae e8 lfence
92 +[a-f0-9]+: 41 83 03 01 addl \$0x1,\(%r11\)
93 +[a-f0-9]+: 0f ae e8 lfence
94 +[a-f0-9]+: 41 0f ba 23 01 btl \$0x1,\(%r11\)
95 +[a-f0-9]+: 0f ae e8 lfence
96 +[a-f0-9]+: 48 0f c1 03 xadd %rax,\(%rbx\)
97 +[a-f0-9]+: 0f ae e8 lfence
98 +[a-f0-9]+: 48 0f c1 c3 xadd %rax,%rbx
99 +[a-f0-9]+: 48 87 03 xchg %rax,\(%rbx\)
100 +[a-f0-9]+: 0f ae e8 lfence
101 +[a-f0-9]+: 48 93 xchg %rax,%rbx
102 +[a-f0-9]+: 48 39 45 40 cmp %rax,0x40\(%rbp\)
103 +[a-f0-9]+: 0f ae e8 lfence
104 +[a-f0-9]+: 48 3b 45 40 cmp 0x40\(%rbp\),%rax
105 +[a-f0-9]+: 0f ae e8 lfence
106 +[a-f0-9]+: 48 01 45 40 add %rax,0x40\(%rbp\)
107 +[a-f0-9]+: 0f ae e8 lfence
108 +[a-f0-9]+: 48 03 00 add \(%rax\),%rax
109 +[a-f0-9]+: 0f ae e8 lfence
110 +[a-f0-9]+: 48 85 45 40 test %rax,0x40\(%rbp\)
111 +[a-f0-9]+: 0f ae e8 lfence
112 +[a-f0-9]+: 48 85 45 40 test %rax,0x40\(%rbp\)
113 +[a-f0-9]+: 0f ae e8 lfence
projects / deliverable / binutils-gdb.git / blob