x86: refine TPAUSE and UMWAIT
[deliverable/binutils-gdb.git] / opcodes / arc-regs.h
1 /* ARC Auxiliary register definitions
2 Copyright (C) 2015-2020 Free Software Foundation, Inc.
3
4 Contributed by Claudiu Zissulescu (claziss@synopsys.com)
5
6 This file is part of libopcodes.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software Foundation,
20 Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
21
22 DEF (0x0, ARC_OPCODE_ARCV1, NONE, status)
23 DEF (0x1, ARC_OPCODE_ARCV1, NONE, semaphore)
24 DEF (0x2, ARC_OPCODE_ARCALL, NONE, lp_start)
25 DEF (0x3, ARC_OPCODE_ARCALL, NONE, lp_end)
26 DEF (0x4, ARC_OPCODE_ARCALL, NONE, identity)
27 DEF (0x5, ARC_OPCODE_ARCALL, NONE, debug)
28 DEF (0x6, ARC_OPCODE_ARCALL, NONE, pc)
29 DEF (0x7, ARC_OPCODE_ARCv2HS, NONE, memseg)
30 DEF (0x7, ARC_OPCODE_ARCV1, NONE, adcr)
31 DEF (0x8, ARC_OPCODE_ARCV1, NONE, apcr)
32 DEF (0x9, ARC_OPCODE_ARCV1, NONE, acr)
33 DEF (0x9, ARC_OPCODE_ARCv2EM, NONE, sec_stat)
34 DEF (0xa, ARC_OPCODE_ARCALL, NONE, status32)
35 DEF (0xb, ARC_OPCODE_ARCV1, NONE, status32_l1)
36 DEF (0xb, ARC_OPCODE_ARCV2, NONE, status32_p0)
37 DEF (0xc, ARC_OPCODE_ARCV1, NONE, status32_l2)
38 DEF (0xc, ARC_OPCODE_ARCv2EM, NONE, sec_extra)
39 DEF (0xd, ARC_OPCODE_ARCV2, NONE, aux_user_sp)
40 DEF (0xe, ARC_OPCODE_ARCV2, NONE, aux_irq_ctrl)
41 DEF (0xe, ARC_OPCODE_ARC700, NONE, clk_enable)
42 DEF (0xf, ARC_OPCODE_ARC700, NONE, bpu_flush)
43 DEF (0xf, ARC_OPCODE_ARCv2HS, NONE, debugi)
44 DEF (0x10, ARC_OPCODE_ARCV1, NONE, ivic)
45 DEF (0x10, ARC_OPCODE_ARCALL, NONE, ic_ivic)
46 DEF (0x11, ARC_OPCODE_ARCV1, NONE, che_mode)
47 DEF (0x11, ARC_OPCODE_ARCALL, NONE, ic_ctrl)
48 DEF (0x12, ARC_OPCODE_ARC600, NONE, mulhi)
49 DEF (0x12, ARC_OPCODE_ARCv2HS, NONE, ic_startr_ext)
50 DEF (0x13, ARC_OPCODE_ARCV1, NONE, lockline)
51 DEF (0x13, ARC_OPCODE_ARCV2, NONE, ic_lil)
52 DEF (0x14, ARC_OPCODE_ARC600, NONE, dmc_code_ram)
53 DEF (0x15, ARC_OPCODE_ARCV1, NONE, tag_addr_mask)
54 DEF (0x16, ARC_OPCODE_ARCV1, NONE, tag_data_mask)
55 DEF (0x16, ARC_OPCODE_ARCv2HS, NONE, ic_ivir)
56 DEF (0x17, ARC_OPCODE_ARCV1, NONE, line_length_mask)
57 DEF (0x17, ARC_OPCODE_ARCv2HS, NONE, ic_endr)
58 DEF (0x18, ARC_OPCODE_ARC600, NONE, aux_ldst_ram)
59 DEF (0x18, ARC_OPCODE_NONE, NONE, aux_dccm)
60 DEF (0x19, ARC_OPCODE_ARCV1, NONE, unlockline)
61 DEF (0x19, ARC_OPCODE_ARCALL, NONE, ic_ivil)
62 DEF (0x1a, ARC_OPCODE_ARCALL, NONE, ic_ram_address)
63 DEF (0x1b, ARC_OPCODE_ARCALL, NONE, ic_tag)
64 DEF (0x1c, ARC_OPCODE_ARCALL, NONE, ic_wp)
65 DEF (0x1d, ARC_OPCODE_ARCALL, NONE, ic_data)
66 DEF (0x1e, ARC_OPCODE_ARCALL, NONE, ic_ptag)
67 DEF (0x1f, ARC_OPCODE_ARCv2EM, NONE, debugi)
68 DEF (0x1f, ARC_OPCODE_ARCv2HS, NONE, ic_endr_ext)
69 DEF (0x20, ARC_OPCODE_ARC600, NONE, sram_seq)
70 DEF (0x21, ARC_OPCODE_ARCALL, NONE, count0)
71 DEF (0x22, ARC_OPCODE_ARCALL, NONE, control0)
72 DEF (0x23, ARC_OPCODE_ARCALL, NONE, limit0)
73 DEF (0x24, ARC_OPCODE_ARCV1, NONE, pcport)
74 DEF (0x25, ARC_OPCODE_ARCALL, NONE, int_vector_base)
75 DEF (0x26, ARC_OPCODE_ARC600, NONE, aux_vbfdw_mode)
76 DEF (0x27, ARC_OPCODE_ARC600, NONE, aux_vbfdw_bm0)
77 DEF (0x28, ARC_OPCODE_ARC600, NONE, aux_vbfdw_bm1)
78 DEF (0x29, ARC_OPCODE_ARC600, NONE, aux_vbfdw_accu)
79 DEF (0x2a, ARC_OPCODE_ARC600, NONE, aux_vbfdw_ofst)
80 DEF (0x2b, ARC_OPCODE_ARC600, NONE, aux_vbfdw_intstat)
81 DEF (0x2c, ARC_OPCODE_ARC600, NONE, aux_xmac0_24)
82 DEF (0x2d, ARC_OPCODE_ARC600, NONE, aux_xmac1_24)
83 DEF (0x2e, ARC_OPCODE_ARC600, NONE, aux_xmac2_24)
84 DEF (0x2f, ARC_OPCODE_ARC600, NONE, aux_fbf_store_16)
85 DEF (0x30, ARC_OPCODE_ARCv2EM, NONE, acg_ctrl)
86 DEF (0x30, ARC_OPCODE_NONE, NONE, ax0)
87 DEF (0x31, ARC_OPCODE_NONE, NONE, ax1)
88 DEF (0x32, ARC_OPCODE_NONE, NONE, aux_crc_poly)
89 DEF (0x33, ARC_OPCODE_NONE, NONE, aux_crc_mode)
90 DEF (0x34, ARC_OPCODE_NONE, NONE, mx0)
91 DEF (0x35, ARC_OPCODE_NONE, NONE, mx1)
92 DEF (0x36, ARC_OPCODE_NONE, NONE, my0)
93 DEF (0x37, ARC_OPCODE_NONE, NONE, my1)
94 DEF (0x38, ARC_OPCODE_NONE, NONE, xyconfig)
95 DEF (0x38, ARC_OPCODE_ARCv2EM, NONE, aux_kernel_sp)
96 DEF (0x39, ARC_OPCODE_NONE, NONE, scratch_a)
97 DEF (0x39, ARC_OPCODE_ARCv2EM, NONE, aux_sec_u_sp)
98 DEF (0x3a, ARC_OPCODE_NONE, NONE, burstsys)
99 DEF (0x3a, ARC_OPCODE_NONE, NONE, tsch)
100 DEF (0x3a, ARC_OPCODE_ARCv2EM, NONE, aux_sec_k_sp)
101 DEF (0x3b, ARC_OPCODE_NONE, NONE, burstxym)
102 DEF (0x3c, ARC_OPCODE_NONE, NONE, burstsz)
103 DEF (0x3d, ARC_OPCODE_NONE, NONE, burstval)
104 DEF (0x3e, ARC_OPCODE_ARCv2EM, NONE, aux_sec_ctrl)
105 DEF (0x3f, ARC_OPCODE_ARCv2EM, NONE, erp_control)
106 DEF (0x40, ARC_OPCODE_ARCv2EM, NONE, rferp_status0)
107 DEF (0x41, ARC_OPCODE_ARCv2EM, NONE, rferp_status1)
108 DEF (0x40, ARC_OPCODE_ARC600, NONE, xtp_newval)
109 DEF (0x41, ARC_OPCODE_ARCV1, NONE, aux_macmode)
110 DEF (0x42, ARC_OPCODE_ARC600, NONE, lsp_newval)
111 DEF (0x43, ARC_OPCODE_ARCV1, NONE, aux_irq_lv12)
112 DEF (0x43, ARC_OPCODE_ARCV2, NONE, aux_irq_act)
113 DEF (0x44, ARC_OPCODE_ARCV1, NONE, aux_xmac0)
114 DEF (0x45, ARC_OPCODE_ARCV1, NONE, aux_xmac1)
115 DEF (0x46, ARC_OPCODE_ARCV1, NONE, aux_xmac2)
116 DEF (0x47, ARC_OPCODE_ARCALL, NONE, dc_ivdc)
117 DEF (0x48, ARC_OPCODE_ARCALL, NONE, dc_ctrl)
118 DEF (0x49, ARC_OPCODE_ARCALL, NONE, dc_ldl)
119 DEF (0x4a, ARC_OPCODE_ARCALL, NONE, dc_ivdl)
120 DEF (0x4b, ARC_OPCODE_ARCALL, NONE, dc_flsh)
121 DEF (0x4c, ARC_OPCODE_ARCALL, NONE, dc_fldl)
122 DEF (0x50, ARC_OPCODE_NONE, NONE, hexdata)
123 DEF (0x51, ARC_OPCODE_NONE, NONE, hexctrl)
124 DEF (0x52, ARC_OPCODE_NONE, NONE, led)
125 DEF (0x56, ARC_OPCODE_NONE, NONE, dilstat)
126 DEF (0x57, ARC_OPCODE_ARC600, NONE, swstat)
127 DEF (0x58, ARC_OPCODE_ARCALL, NONE, dc_ram_addr)
128 DEF (0x59, ARC_OPCODE_ARCALL, NONE, dc_tag)
129 DEF (0x5a, ARC_OPCODE_ARCALL, NONE, dc_wp)
130 DEF (0x5b, ARC_OPCODE_ARCALL, NONE, dc_data)
131 DEF (0x61, ARC_OPCODE_ARCALL, NONE, dccm_base_build)
132 DEF (0x62, ARC_OPCODE_ARCALL, NONE, crc_build)
133 DEF (0x63, ARC_OPCODE_ARCALL, NONE, bta_link_build)
134 DEF (0x64, ARC_OPCODE_ARCALL, NONE, vbfdw_build)
135 DEF (0x65, ARC_OPCODE_ARCALL, NONE, ea_build)
136 DEF (0x66, ARC_OPCODE_ARCALL, NONE, dataspace)
137 DEF (0x67, ARC_OPCODE_ARCALL, NONE, memsubsys)
138 DEF (0x68, ARC_OPCODE_ARCALL, NONE, vecbase_ac_build)
139 DEF (0x69, ARC_OPCODE_ARCALL, NONE, p_base_addr)
140 DEF (0x6a, ARC_OPCODE_ARCALL, NONE, data_uncached_build)
141 DEF (0x6b, ARC_OPCODE_ARCALL, NONE, fp_build)
142 DEF (0x6c, ARC_OPCODE_ARCALL, NONE, dpfp_build)
143 DEF (0x6d, ARC_OPCODE_ARCALL, NONE, mpu_build)
144 DEF (0x6e, ARC_OPCODE_ARCALL, NONE, rf_build)
145 DEF (0x6f, ARC_OPCODE_ARCALL, NONE, mmu_build)
146 DEF (0x70, ARC_OPCODE_ARCv2EM, NONE, sec_vecbase_build)
147 DEF (0x71, ARC_OPCODE_ARCALL, NONE, vecbase_build)
148 DEF (0x72, ARC_OPCODE_ARCALL, NONE, d_cache_build)
149 DEF (0x73, ARC_OPCODE_ARCALL, NONE, madi_build)
150 DEF (0x74, ARC_OPCODE_ARCALL, NONE, dccm_build)
151 DEF (0x75, ARC_OPCODE_ARCALL, NONE, timer_build)
152 DEF (0x76, ARC_OPCODE_ARCALL, NONE, ap_build)
153 DEF (0x77, ARC_OPCODE_ARCALL, NONE, i_cache_build)
154 DEF (0x78, ARC_OPCODE_ARCALL, NONE, iccm_build)
155 DEF (0x79, ARC_OPCODE_ARCALL, NONE, dspram_build)
156 DEF (0x7a, ARC_OPCODE_ARCALL, NONE, mac_build)
157 DEF (0x7b, ARC_OPCODE_ARCALL, NONE, multiply_build)
158 DEF (0x7c, ARC_OPCODE_ARCALL, NONE, swap_build)
159 DEF (0x7d, ARC_OPCODE_ARCALL, NONE, norm_build)
160 DEF (0x7e, ARC_OPCODE_ARCALL, NONE, minmax_build)
161 DEF (0x7f, ARC_OPCODE_ARCALL, NONE, barrel_build)
162 DEF (0x80, ARC_OPCODE_ARCALL, NONE, ax0)
163 DEF (0x81, ARC_OPCODE_ARCALL, NONE, ax1)
164 DEF (0x82, ARC_OPCODE_ARCALL, NONE, ax2)
165 DEF (0x83, ARC_OPCODE_ARCALL, NONE, ax3)
166 DEF (0x84, ARC_OPCODE_ARCALL, NONE, ay0)
167 DEF (0x85, ARC_OPCODE_ARCALL, NONE, ay1)
168 DEF (0x86, ARC_OPCODE_ARCALL, NONE, ay2)
169 DEF (0x87, ARC_OPCODE_ARCALL, NONE, ay3)
170 DEF (0x88, ARC_OPCODE_ARCALL, NONE, mx00)
171 DEF (0x89, ARC_OPCODE_ARCALL, NONE, mx01)
172 DEF (0x8a, ARC_OPCODE_ARCALL, NONE, mx10)
173 DEF (0x8b, ARC_OPCODE_ARCALL, NONE, mx11)
174 DEF (0x8c, ARC_OPCODE_ARCALL, NONE, mx20)
175 DEF (0x8d, ARC_OPCODE_ARCALL, NONE, mx21)
176 DEF (0x8e, ARC_OPCODE_ARCALL, NONE, mx30)
177 DEF (0x8f, ARC_OPCODE_ARCALL, NONE, mx31)
178 DEF (0x90, ARC_OPCODE_ARCALL, NONE, my00)
179 DEF (0x91, ARC_OPCODE_ARCALL, NONE, my01)
180 DEF (0x92, ARC_OPCODE_ARCALL, NONE, my10)
181 DEF (0x93, ARC_OPCODE_ARCALL, NONE, my11)
182 DEF (0x94, ARC_OPCODE_ARCALL, NONE, my20)
183 DEF (0x95, ARC_OPCODE_ARCALL, NONE, my21)
184 DEF (0x96, ARC_OPCODE_ARCALL, NONE, my30)
185 DEF (0x97, ARC_OPCODE_ARCALL, NONE, my31)
186 DEF (0x98, ARC_OPCODE_ARCALL, NONE, xyconfig)
187 DEF (0x99, ARC_OPCODE_ARCALL, NONE, burstsys)
188 DEF (0x9a, ARC_OPCODE_ARCALL, NONE, burstxym)
189 DEF (0x9b, ARC_OPCODE_ARCALL, NONE, burstsz)
190 DEF (0x9c, ARC_OPCODE_ARCALL, NONE, burstval)
191 DEF (0x9d, ARC_OPCODE_ARCALL, NONE, xylsbasex)
192 DEF (0x9e, ARC_OPCODE_ARCALL, NONE, xylsbasey)
193 DEF (0x9f, ARC_OPCODE_ARCALL, NONE, aux_xmaclw_h)
194 DEF (0xa0, ARC_OPCODE_ARCALL, NONE, aux_xmaclw_l)
195 DEF (0xa1, ARC_OPCODE_ARCALL, NONE, se_ctrl)
196 DEF (0xa2, ARC_OPCODE_ARCALL, NONE, se_stat)
197 DEF (0xa3, ARC_OPCODE_ARCALL, NONE, se_err)
198 DEF (0xa4, ARC_OPCODE_ARCALL, NONE, se_eadr)
199 DEF (0xa5, ARC_OPCODE_ARCALL, NONE, se_spc)
200 DEF (0xa6, ARC_OPCODE_ARCALL, NONE, sdm_base)
201 DEF (0xa7, ARC_OPCODE_ARCALL, NONE, scm_base)
202 DEF (0xa8, ARC_OPCODE_ARCALL, NONE, se_dbg_ctrl)
203 DEF (0xa9, ARC_OPCODE_ARCALL, NONE, se_dbg_data0)
204 DEF (0xaa, ARC_OPCODE_ARCALL, NONE, se_dbg_data1)
205 DEF (0xab, ARC_OPCODE_ARCALL, NONE, se_dbg_data2)
206 DEF (0xac, ARC_OPCODE_ARCALL, NONE, se_dbg_data3)
207 DEF (0xad, ARC_OPCODE_ARCALL, NONE, se_watch)
208 DEF (0xc0, ARC_OPCODE_ARCALL, NONE, bpu_build)
209 DEF (0xc1, ARC_OPCODE_ARC600, NONE, arc600_build_config)
210 DEF (0xc2, ARC_OPCODE_ARCALL, NONE, isa_config)
211 DEF (0xf4, ARC_OPCODE_ARCALL, NONE, hwp_build)
212 DEF (0xf5, ARC_OPCODE_ARCALL, NONE, pct_build)
213 DEF (0xf6, ARC_OPCODE_ARCALL, NONE, cc_build)
214 DEF (0xf7, ARC_OPCODE_ARCALL, NONE, pm_bcr)
215 DEF (0xf8, ARC_OPCODE_ARCALL, NONE, scq_switch_build)
216 DEF (0xf9, ARC_OPCODE_ARCALL, NONE, vraptor_build)
217 DEF (0xfa, ARC_OPCODE_ARCALL, NONE, dma_config)
218 DEF (0xfb, ARC_OPCODE_ARCALL, NONE, simd_config)
219 DEF (0xfc, ARC_OPCODE_ARCALL, NONE, vlc_build)
220 DEF (0xfd, ARC_OPCODE_ARCALL, NONE, simd_dma_build)
221 DEF (0xfe, ARC_OPCODE_ARCALL, NONE, ifetch_queue_build)
222 DEF (0xff, ARC_OPCODE_ARCALL, NONE, smart_build)
223 DEF (0x100, ARC_OPCODE_ARCALL, NONE, count1)
224 DEF (0x101, ARC_OPCODE_ARCALL, NONE, control1)
225 DEF (0x102, ARC_OPCODE_ARCALL, NONE, limit1)
226 DEF (0x103, ARC_OPCODE_ARCALL, NONE, timer_xx)
227 DEF (0x200, ARC_OPCODE_ARCV1, NONE, aux_irq_lev)
228 DEF (0x200, ARC_OPCODE_ARCV2, NONE, irq_priority_pending)
229 DEF (0x201, ARC_OPCODE_ARCALL, NONE, aux_irq_hint)
230 DEF (0x202, ARC_OPCODE_ARC600, NONE, aux_inter_core_interrupt)
231 DEF (0x206, ARC_OPCODE_ARCV2, NONE, irq_priority)
232 DEF (0x210, ARC_OPCODE_ARC700, NONE, aes_aux_0)
233 DEF (0x211, ARC_OPCODE_ARC700, NONE, aes_aux_1)
234 DEF (0x212, ARC_OPCODE_ARC700, NONE, aes_aux_2)
235 DEF (0x213, ARC_OPCODE_ARC700, NONE, aes_crypt_mode)
236 DEF (0x214, ARC_OPCODE_ARC700, NONE, aes_auxs)
237 DEF (0x215, ARC_OPCODE_ARC700, NONE, aes_auxi)
238 DEF (0x216, ARC_OPCODE_ARC700, NONE, aes_aux_3)
239 DEF (0x217, ARC_OPCODE_ARC700, NONE, aes_aux_4)
240 DEF (0x218, ARC_OPCODE_ARC700, NONE, arith_ctl_aux)
241 DEF (0x219, ARC_OPCODE_ARC700, NONE, des_aux)
242 DEF (0x220, ARC_OPCODE_ARCALL, NONE, ap_amv0)
243 DEF (0x221, ARC_OPCODE_ARCALL, NONE, ap_amm0)
244 DEF (0x222, ARC_OPCODE_ARCALL, NONE, ap_ac0)
245 DEF (0x223, ARC_OPCODE_ARCALL, NONE, ap_amv1)
246 DEF (0x224, ARC_OPCODE_ARCALL, NONE, ap_amm1)
247 DEF (0x225, ARC_OPCODE_ARCALL, NONE, ap_ac1)
248 DEF (0x226, ARC_OPCODE_ARCALL, NONE, ap_amv2)
249 DEF (0x227, ARC_OPCODE_ARCALL, NONE, ap_amm2)
250 DEF (0x228, ARC_OPCODE_ARCALL, NONE, ap_ac2)
251 DEF (0x229, ARC_OPCODE_ARCALL, NONE, ap_amv3)
252 DEF (0x22a, ARC_OPCODE_ARCALL, NONE, ap_amm3)
253 DEF (0x22b, ARC_OPCODE_ARCALL, NONE, ap_ac3)
254 DEF (0x22c, ARC_OPCODE_ARCALL, NONE, ap_amv4)
255 DEF (0x22d, ARC_OPCODE_ARCALL, NONE, ap_amm4)
256 DEF (0x22e, ARC_OPCODE_ARCALL, NONE, ap_ac4)
257 DEF (0x22f, ARC_OPCODE_ARCALL, NONE, ap_amv5)
258 DEF (0x230, ARC_OPCODE_ARCALL, NONE, ap_amm5)
259 DEF (0x231, ARC_OPCODE_ARCALL, NONE, ap_ac5)
260 DEF (0x232, ARC_OPCODE_ARCALL, NONE, ap_amv6)
261 DEF (0x233, ARC_OPCODE_ARCALL, NONE, ap_amm6)
262 DEF (0x234, ARC_OPCODE_ARCALL, NONE, ap_ac6)
263 DEF (0x235, ARC_OPCODE_ARCALL, NONE, ap_amv7)
264 DEF (0x236, ARC_OPCODE_ARCALL, NONE, ap_amm7)
265 DEF (0x237, ARC_OPCODE_ARCALL, NONE, ap_ac7)
266 DEF (0x268, ARC_OPCODE_ARCv2EM, NONE, nsc_table_top)
267 DEF (0x269, ARC_OPCODE_ARCv2EM, NONE, nsc_table_base)
268 DEF (0x290, ARC_OPCODE_ARCV2, NONE, jli_base)
269 DEF (0x291, ARC_OPCODE_ARCV2, NONE, ldi_base)
270 DEF (0x292, ARC_OPCODE_ARCV2, NONE, ei_base)
271 DEF (0x300, ARC_OPCODE_ARCFPX, DPX, fp_status)
272 DEF (0x301, ARC_OPCODE_ARCFPX, DPX, aux_dpfp1l)
273 DEF (0x301, ARC_OPCODE_ARCFPX, DPX, d1l)
274 DEF (0x302, ARC_OPCODE_ARCFPX, DPX, aux_dpfp1h)
275 DEF (0x302, ARC_OPCODE_ARCFPX, DPX, d1h)
276 DEF (0x302, ARC_OPCODE_ARCv2EM, DPA, d1l)
277 DEF (0x303, ARC_OPCODE_ARCFPX, DPX, aux_dpfp2l)
278 DEF (0x303, ARC_OPCODE_ARCFPX, DPX, d2l)
279 DEF (0x303, ARC_OPCODE_ARCv2EM, DPA, d1h)
280 DEF (0x304, ARC_OPCODE_ARCFPX, DPX, aux_dpfp2h)
281 DEF (0x304, ARC_OPCODE_ARCFPX, DPX, d2h)
282 DEF (0x304, ARC_OPCODE_ARCv2EM, DPA, d2l)
283 DEF (0x305, ARC_OPCODE_ARCFPX, DPX, dpfp_status)
284 DEF (0x305, ARC_OPCODE_ARCv2EM, DPA, d2h)
285 DEF (0x400, ARC_OPCODE_ARCALL, NONE, eret)
286 DEF (0x401, ARC_OPCODE_ARCALL, NONE, erbta)
287 DEF (0x402, ARC_OPCODE_ARCALL, NONE, erstatus)
288 DEF (0x403, ARC_OPCODE_ARCALL, NONE, ecr)
289 DEF (0x404, ARC_OPCODE_ARCALL, NONE, efa)
290 DEF (0x405, ARC_OPCODE_ARC700, NONE, tlbpd0)
291 DEF (0x406, ARC_OPCODE_ARC700, NONE, tlbpd1)
292 DEF (0x406, ARC_OPCODE_ARCv2EM, NONE, ersec_stat)
293 DEF (0x407, ARC_OPCODE_ARCv2EM, NONE, aux_sec_except)
294 DEF (0x407, ARC_OPCODE_ARC700, NONE, tlbindex)
295 DEF (0x408, ARC_OPCODE_ARC700, NONE, tlbcommand)
296 DEF (0x409, ARC_OPCODE_ARC700, NONE, pid)
297 DEF (0x409, ARC_OPCODE_ARCALL, NONE, mpuen)
298 DEF (0x40a, ARC_OPCODE_ARCALL, NONE, icause1)
299 DEF (0x40b, ARC_OPCODE_ARCALL, NONE, icause2)
300 DEF (0x40c, ARC_OPCODE_ARCALL, NONE, aux_ienable)
301 DEF (0x40d, ARC_OPCODE_ARCALL, NONE, aux_itrigger)
302 DEF (0x410, ARC_OPCODE_ARCALL, NONE, xpu)
303 DEF (0x412, ARC_OPCODE_ARCALL, NONE, bta)
304 DEF (0x413, ARC_OPCODE_ARC700, NONE, bta_l1)
305 DEF (0x414, ARC_OPCODE_ARC700, NONE, bta_l2)
306 DEF (0x415, ARC_OPCODE_ARCALL, NONE, aux_irq_pulse_cancel)
307 DEF (0x416, ARC_OPCODE_ARCALL, NONE, aux_irq_pending)
308 DEF (0x418, ARC_OPCODE_ARC700, NONE, scratch_data0)
309 DEF (0x420, ARC_OPCODE_ARCALL, NONE, mpuic)
310 DEF (0x421, ARC_OPCODE_ARCALL, NONE, mpufa)
311 DEF (0x422, ARC_OPCODE_ARCALL, NONE, mpurdb0)
312 DEF (0x423, ARC_OPCODE_ARCALL, NONE, mpurdp0)
313 DEF (0x424, ARC_OPCODE_ARCALL, NONE, mpurdb1)
314 DEF (0x425, ARC_OPCODE_ARCALL, NONE, mpurdp1)
315 DEF (0x426, ARC_OPCODE_ARCALL, NONE, mpurdb2)
316 DEF (0x427, ARC_OPCODE_ARCALL, NONE, mpurdp2)
317 DEF (0x428, ARC_OPCODE_ARCALL, NONE, mpurdb3)
318 DEF (0x429, ARC_OPCODE_ARCALL, NONE, mpurdp3)
319 DEF (0x42a, ARC_OPCODE_ARCALL, NONE, mpurdb4)
320 DEF (0x42b, ARC_OPCODE_ARCALL, NONE, mpurdp4)
321 DEF (0x42c, ARC_OPCODE_ARCALL, NONE, mpurdb5)
322 DEF (0x42d, ARC_OPCODE_ARCALL, NONE, mpurdp5)
323 DEF (0x42e, ARC_OPCODE_ARCALL, NONE, mpurdb6)
324 DEF (0x42f, ARC_OPCODE_ARCALL, NONE, mpurdp6)
325 DEF (0x430, ARC_OPCODE_ARCALL, NONE, mpurdb7)
326 DEF (0x431, ARC_OPCODE_ARCALL, NONE, mpurdp7)
327 DEF (0x432, ARC_OPCODE_ARCALL, NONE, mpurdb8)
328 DEF (0x433, ARC_OPCODE_ARCALL, NONE, mpurdp8)
329 DEF (0x434, ARC_OPCODE_ARCALL, NONE, mpurdb9)
330 DEF (0x435, ARC_OPCODE_ARCALL, NONE, mpurdp9)
331 DEF (0x436, ARC_OPCODE_ARCALL, NONE, mpurdb10)
332 DEF (0x437, ARC_OPCODE_ARCALL, NONE, mpurdp10)
333 DEF (0x438, ARC_OPCODE_ARCALL, NONE, mpurdb11)
334 DEF (0x439, ARC_OPCODE_ARCALL, NONE, mpurdp11)
335 DEF (0x43a, ARC_OPCODE_ARCALL, NONE, mpurdb12)
336 DEF (0x43b, ARC_OPCODE_ARCALL, NONE, mpurdp12)
337 DEF (0x43c, ARC_OPCODE_ARCALL, NONE, mpurdb13)
338 DEF (0x43d, ARC_OPCODE_ARCALL, NONE, mpurdp13)
339 DEF (0x43e, ARC_OPCODE_ARCALL, NONE, mpurdb14)
340 DEF (0x43f, ARC_OPCODE_ARCALL, NONE, mpurdp14)
341 DEF (0x440, ARC_OPCODE_ARCALL, NONE, mpurdb15)
342 DEF (0x441, ARC_OPCODE_ARCALL, NONE, mpurdp15)
343 DEF (0x450, ARC_OPCODE_ARC600, NONE, pm_status)
344 DEF (0x451, ARC_OPCODE_ARC600, NONE, wake)
345 DEF (0x452, ARC_OPCODE_ARC600, NONE, dvfs_performance)
346 DEF (0x453, ARC_OPCODE_ARC600, NONE, pwr_ctrl)
347 DEF (0x460, ARC_OPCODE_ARCv2HS, NONE, tlbpd0)
348 DEF (0x461, ARC_OPCODE_ARCv2HS, NONE, tlbpd1)
349 DEF (0x463, ARC_OPCODE_ARCv2HS, NONE, tlbindex)
350 DEF (0x464, ARC_OPCODE_ARCv2HS, NONE, tlbcommand)
351 DEF (0x468, ARC_OPCODE_ARCv2HS, NONE, pid)
352 DEF (0x46c, ARC_OPCODE_ARCv2HS, NONE, scratch_data0)
353 DEF (0x500, ARC_OPCODE_ARC700, NONE, aux_vlc_buf_idx)
354 DEF (0x501, ARC_OPCODE_ARC700, NONE, aux_vlc_read_buf)
355 DEF (0x502, ARC_OPCODE_ARC700, NONE, aux_vlc_valid_bits)
356 DEF (0x503, ARC_OPCODE_ARC700, NONE, aux_vlc_buf_in)
357 DEF (0x504, ARC_OPCODE_ARC700, NONE, aux_vlc_buf_free)
358 DEF (0x505, ARC_OPCODE_ARC700, NONE, aux_vlc_ibuf_status)
359 DEF (0x506, ARC_OPCODE_ARC700, NONE, aux_vlc_setup)
360 DEF (0x507, ARC_OPCODE_ARC700, NONE, aux_vlc_bits)
361 DEF (0x508, ARC_OPCODE_ARC700, NONE, aux_vlc_table)
362 DEF (0x509, ARC_OPCODE_ARC700, NONE, aux_vlc_get_symbol)
363 DEF (0x50a, ARC_OPCODE_ARC700, NONE, aux_vlc_read_symbol)
364 DEF (0x510, ARC_OPCODE_ARC700, NONE, aux_ucavlc_setup)
365 DEF (0x511, ARC_OPCODE_ARC700, NONE, aux_ucavlc_state)
366 DEF (0x512, ARC_OPCODE_ARC700, NONE, aux_cavlc_zero_left)
367 DEF (0x514, ARC_OPCODE_ARC700, NONE, aux_uvlc_i_state)
368 DEF (0x51c, ARC_OPCODE_ARC700, NONE, aux_vlc_dma_ptr)
369 DEF (0x51d, ARC_OPCODE_ARC700, NONE, aux_vlc_dma_end)
370 DEF (0x51e, ARC_OPCODE_ARC700, NONE, aux_vlc_dma_esc)
371 DEF (0x51f, ARC_OPCODE_ARC700, NONE, aux_vlc_dma_ctrl)
372 DEF (0x520, ARC_OPCODE_ARC700, NONE, aux_vlc_get_0bit)
373 DEF (0x521, ARC_OPCODE_ARC700, NONE, aux_vlc_get_1bit)
374 DEF (0x522, ARC_OPCODE_ARC700, NONE, aux_vlc_get_2bit)
375 DEF (0x523, ARC_OPCODE_ARC700, NONE, aux_vlc_get_3bit)
376 DEF (0x524, ARC_OPCODE_ARC700, NONE, aux_vlc_get_4bit)
377 DEF (0x525, ARC_OPCODE_ARC700, NONE, aux_vlc_get_5bit)
378 DEF (0x526, ARC_OPCODE_ARC700, NONE, aux_vlc_get_6bit)
379 DEF (0x527, ARC_OPCODE_ARC700, NONE, aux_vlc_get_7bit)
380 DEF (0x528, ARC_OPCODE_ARC700, NONE, aux_vlc_get_8bit)
381 DEF (0x529, ARC_OPCODE_ARC700, NONE, aux_vlc_get_9bit)
382 DEF (0x52a, ARC_OPCODE_ARC700, NONE, aux_vlc_get_10bit)
383 DEF (0x52b, ARC_OPCODE_ARC700, NONE, aux_vlc_get_11bit)
384 DEF (0x52c, ARC_OPCODE_ARC700, NONE, aux_vlc_get_12bit)
385 DEF (0x52d, ARC_OPCODE_ARC700, NONE, aux_vlc_get_13bit)
386 DEF (0x52e, ARC_OPCODE_ARC700, NONE, aux_vlc_get_14bit)
387 DEF (0x52f, ARC_OPCODE_ARC700, NONE, aux_vlc_get_15bit)
388 DEF (0x530, ARC_OPCODE_ARC700, NONE, aux_vlc_get_16bit)
389 DEF (0x531, ARC_OPCODE_ARC700, NONE, aux_vlc_get_17bit)
390 DEF (0x532, ARC_OPCODE_ARC700, NONE, aux_vlc_get_18bit)
391 DEF (0x533, ARC_OPCODE_ARC700, NONE, aux_vlc_get_19bit)
392 DEF (0x534, ARC_OPCODE_ARC700, NONE, aux_vlc_get_20bit)
393 DEF (0x535, ARC_OPCODE_ARC700, NONE, aux_vlc_get_21bit)
394 DEF (0x536, ARC_OPCODE_ARC700, NONE, aux_vlc_get_22bit)
395 DEF (0x537, ARC_OPCODE_ARC700, NONE, aux_vlc_get_23bit)
396 DEF (0x538, ARC_OPCODE_ARC700, NONE, aux_vlc_get_24bit)
397 DEF (0x539, ARC_OPCODE_ARC700, NONE, aux_vlc_get_25bit)
398 DEF (0x53a, ARC_OPCODE_ARC700, NONE, aux_vlc_get_26bit)
399 DEF (0x53b, ARC_OPCODE_ARC700, NONE, aux_vlc_get_27bit)
400 DEF (0x53c, ARC_OPCODE_ARC700, NONE, aux_vlc_get_28bit)
401 DEF (0x53d, ARC_OPCODE_ARC700, NONE, aux_vlc_get_29bit)
402 DEF (0x53e, ARC_OPCODE_ARC700, NONE, aux_vlc_get_30bit)
403 DEF (0x53f, ARC_OPCODE_ARC700, NONE, aux_vlc_get_31bit)
404 DEF (0x540, ARC_OPCODE_ARC700, NONE, aux_cabac_ctrl)
405 DEF (0x541, ARC_OPCODE_ARC700, NONE, aux_cabac_ctx_state)
406 DEF (0x542, ARC_OPCODE_ARC700, NONE, aux_cabac_cod_param)
407 DEF (0x543, ARC_OPCODE_ARC700, NONE, aux_cabac_misc0)
408 DEF (0x544, ARC_OPCODE_ARC700, NONE, aux_cabac_misc1)
409 DEF (0x545, ARC_OPCODE_ARC700, NONE, aux_cabac_misc2)
410 DEF (0x700, ARC_OPCODE_ARCALL, NONE, smart_control)
411 DEF (0x701, ARC_OPCODE_ARC700, NONE, smart_data_0)
412 DEF (0x701, ARC_OPCODE_ARC600, NONE, smart_data)
413 DEF (0x701, ARC_OPCODE_ARC700, NONE, smart_data_2)
414 DEF (0x701, ARC_OPCODE_ARC700, NONE, smart_data_3)
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