x86: refine TPAUSE and UMWAIT

Allowing 64-bit registers is misleading here: Elsewhere these get allowed
when there's no difference between either variant, because of 32-bit
destination registers having their upper halves zeroed in 64-bit mode.
Here, however, they're source registers, and hence specifying 64-bit
registers would lead to the ambiguity of whether the upper 32 bits
actually matter.

Additionally, for proper code generation in 16-bit mode, IgnoreSize is
needed on both.

And finally, just like for e.g. MONITOR/MWAIT, add variants with all
input registers explicitly specified.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 859f01fae7915fdf1bc21f4d504ec5ccd088f06d..e82aef3c8d4683c996b92781a561cb44cab51ad2 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,15 @@
+2020-03-06  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
+       from having their operands swapped.
+       * testsuite/gas/i386/waitpkg.s,
+       testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
+       3-operand cases as well as testing of 16-bit code generation.
+       * testsuite/gas/i386/waitpkg.d,
+       testsuite/gas/i386/waitpkg-intel.d,
+       testsuite/gas/i386/x86-64-waitpkg.d,
+       testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
+
 2020-03-04  Nelson Chu  <nelson.chu@sifive.com>
 
        * config/tc-riscv.c (percent_op_utype): Support the modifier

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 7117aeb73e47ee090601fde07ae98e152927f5da..e36afa8024dcfd704b95d23927438cfca65daf4a 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4349,16 +4349,19 @@ md_assemble (char *line)
   /* Now we've parsed the mnemonic into a set of templates, and have the
      operands at hand.  */
 
-  /* All Intel opcodes have reversed operands except for "bound", "enter"
-     "monitor*", and "mwait*".  We also don't reverse intersegment "jmp"
-     and "call" instructions with 2 immediate operands so that the immediate
-     segment precedes the offset, as it does when in AT&T mode. */
+  /* All Intel opcodes have reversed operands except for "bound", "enter",
+     "monitor*", "mwait*", "tpause", and "umwait".  We also don't reverse
+     intersegment "jmp" and "call" instructions with 2 immediate operands so
+     that the immediate segment precedes the offset, as it does when in AT&T
+     mode.  */
   if (intel_syntax
       && i.operands > 1
       && (strcmp (mnemonic, "bound") != 0)
       && (strcmp (mnemonic, "invlpga") != 0)
       && (strncmp (mnemonic, "monitor", 7) != 0)
       && (strncmp (mnemonic, "mwait", 5) != 0)
+      && (strcmp (mnemonic, "tpause") != 0)
+      && (strcmp (mnemonic, "umwait") != 0)
       && !(operand_type_check (i.types[0], imm)
           && operand_type_check (i.types[1], imm)))
     swap_operands ();

diff --git a/gas/testsuite/gas/i386/waitpkg-intel.d b/gas/testsuite/gas/i386/waitpkg-intel.d
index 7930f50381ecb2720b46a0c82237377fb96fe054..e7a79c88a427c0da00a93db0ca94e68824da33b0 100644 (file)
--- a/gas/testsuite/gas/i386/waitpkg-intel.d
+++ b/gas/testsuite/gas/i386/waitpkg-intel.d
@@ -12,5 +12,17 @@ Disassembly of section \.text:
 [      ]*[a-f0-9]+:[   ]*f3 0f ae f0[  ]*umonitor eax
 [      ]*[a-f0-9]+:[   ]*67 f3 0f ae f1[       ]*umonitor cx
 [      ]*[a-f0-9]+:[   ]*f2 0f ae f1[  ]*umwait ecx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f3[  ]*umwait ebx
 [      ]*[a-f0-9]+:[   ]*66 0f ae f1[  ]*tpause ecx
+[      ]*[a-f0-9]+:[   ]*66 0f ae f3[  ]*tpause ebx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f7[  ]*umwait edi
+[      ]*[a-f0-9]+:[   ]*66 0f ae f7[  ]*tpause edi
+[      ]*[a-f0-9]+:[   ]*67 f3 0f ae f0[       ]*umonitor ax
+[      ]*[a-f0-9]+:[   ]*f3 0f ae f1[  ]*umonitor ecx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f1[  ]*umwait ecx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f3[  ]*umwait ebx
+[      ]*[a-f0-9]+:[   ]*66 0f ae f1[  ]*tpause ecx
+[      ]*[a-f0-9]+:[   ]*66 0f ae f3[  ]*tpause ebx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f7[  ]*umwait edi
+[      ]*[a-f0-9]+:[   ]*66 0f ae f7[  ]*tpause edi
 #pass

diff --git a/gas/testsuite/gas/i386/waitpkg.d b/gas/testsuite/gas/i386/waitpkg.d
index ec3b9ea4fd0baeffd46cbd63a27d9aa8e067d9b4..33ac8e11c89af53430eacef9999d1d8c71964835 100644 (file)
--- a/gas/testsuite/gas/i386/waitpkg.d
+++ b/gas/testsuite/gas/i386/waitpkg.d
@@ -12,5 +12,17 @@ Disassembly of section \.text:
 [      ]*[a-f0-9]+:[   ]*f3 0f ae f0[  ]*umonitor %eax
 [      ]*[a-f0-9]+:[   ]*67 f3 0f ae f1[       ]*umonitor %cx
 [      ]*[a-f0-9]+:[   ]*f2 0f ae f1[  ]*umwait %ecx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f3[  ]*umwait %ebx
 [      ]*[a-f0-9]+:[   ]*66 0f ae f1[  ]*tpause %ecx
+[      ]*[a-f0-9]+:[   ]*66 0f ae f3[  ]*tpause %ebx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f7[  ]*umwait %edi
+[      ]*[a-f0-9]+:[   ]*66 0f ae f7[  ]*tpause %edi
+[      ]*[a-f0-9]+:[   ]*67 f3 0f ae f0[       ]*umonitor %ax
+[      ]*[a-f0-9]+:[   ]*f3 0f ae f1[  ]*umonitor %ecx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f1[  ]*umwait %ecx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f3[  ]*umwait %ebx
+[      ]*[a-f0-9]+:[   ]*66 0f ae f1[  ]*tpause %ecx
+[      ]*[a-f0-9]+:[   ]*66 0f ae f3[  ]*tpause %ebx
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f7[  ]*umwait %edi
+[      ]*[a-f0-9]+:[   ]*66 0f ae f7[  ]*tpause %edi
 #pass

diff --git a/gas/testsuite/gas/i386/waitpkg.s b/gas/testsuite/gas/i386/waitpkg.s
index f18229e6fddb0a7ce955bb1e96477e2fe18a7ffb..a75351dcd4ae5aca7fd95e01521af8d861c9d76d 100644 (file)
--- a/gas/testsuite/gas/i386/waitpkg.s
+++ b/gas/testsuite/gas/i386/waitpkg.s
@@ -2,7 +2,19 @@
 
        .text
 _start:
+       .rept 2
        umonitor %eax
        umonitor %cx
        umwait %ecx
+       umwait %ebx, %edx, %eax
        tpause %ecx
+       tpause %ebx, %edx, %eax
+
+       .intel_syntax noprefix
+
+       umwait edi, edx, eax
+       tpause edi, edx, eax
+
+       .att_syntax prefix
+       .code16
+       .endr

diff --git a/gas/testsuite/gas/i386/x86-64-waitpkg-intel.d b/gas/testsuite/gas/i386/x86-64-waitpkg-intel.d
index e0387dd1ad795faa5a5dcd459ef84314176f06df..3076505c7eaf8da1e43de53dfe3a25d4903c4b28 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-waitpkg-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-waitpkg-intel.d
@@ -13,11 +13,11 @@ Disassembly of section \.text:
 [      ]*[a-f0-9]+:[   ]*f3 41 0f ae f2[       ]*umonitor r10
 [      ]*[a-f0-9]+:[   ]*67 f3 41 0f ae f2[    ]*umonitor r10d
 [      ]*[a-f0-9]+:[   ]*f2 0f ae f1[  ]*umwait ecx
-[      ]*[a-f0-9]+:[   ]*f2 0f ae f1[  ]*umwait ecx
-[      ]*[a-f0-9]+:[   ]*f2 41 0f ae f2[       ]*umwait r10d
 [      ]*[a-f0-9]+:[   ]*f2 41 0f ae f2[       ]*umwait r10d
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f7[  ]*umwait edi
 [      ]*[a-f0-9]+:[   ]*66 0f ae f1[  ]*tpause ecx
-[      ]*[a-f0-9]+:[   ]*66 0f ae f1[  ]*tpause ecx
-[      ]*[a-f0-9]+:[   ]*66 41 0f ae f2[       ]*tpause r10d
 [      ]*[a-f0-9]+:[   ]*66 41 0f ae f2[       ]*tpause r10d
+[      ]*[a-f0-9]+:[   ]*66 0f ae f7[  ]*tpause edi
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f6[  ]*umwait esi
+[      ]*[a-f0-9]+:[   ]*66 0f ae f6[  ]*tpause esi
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-waitpkg.d b/gas/testsuite/gas/i386/x86-64-waitpkg.d
index a10a8cde31fafae51ef463c3aed0e4ee8489d478..8217de007f906a2d18b0200f94208e3a05de3de8 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-waitpkg.d
+++ b/gas/testsuite/gas/i386/x86-64-waitpkg.d
@@ -13,11 +13,11 @@ Disassembly of section \.text:
 [      ]*[a-f0-9]+:[   ]*f3 41 0f ae f2[       ]*umonitor %r10
 [      ]*[a-f0-9]+:[   ]*67 f3 41 0f ae f2[    ]*umonitor %r10d
 [      ]*[a-f0-9]+:[   ]*f2 0f ae f1[  ]*umwait %ecx
-[      ]*[a-f0-9]+:[   ]*f2 0f ae f1[  ]*umwait %ecx
-[      ]*[a-f0-9]+:[   ]*f2 41 0f ae f2[       ]*umwait %r10d
 [      ]*[a-f0-9]+:[   ]*f2 41 0f ae f2[       ]*umwait %r10d
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f7[  ]*umwait %edi
 [      ]*[a-f0-9]+:[   ]*66 0f ae f1[  ]*tpause %ecx
-[      ]*[a-f0-9]+:[   ]*66 0f ae f1[  ]*tpause %ecx
-[      ]*[a-f0-9]+:[   ]*66 41 0f ae f2[       ]*tpause %r10d
 [      ]*[a-f0-9]+:[   ]*66 41 0f ae f2[       ]*tpause %r10d
+[      ]*[a-f0-9]+:[   ]*66 0f ae f7[  ]*tpause %edi
+[      ]*[a-f0-9]+:[   ]*f2 0f ae f6[  ]*umwait %esi
+[      ]*[a-f0-9]+:[   ]*66 0f ae f6[  ]*tpause %esi
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-waitpkg.s b/gas/testsuite/gas/i386/x86-64-waitpkg.s
index 9c6484894b66ed4106ea764c80ccb1bf2dae9d7a..8a173c2f59e24f9d21ccdef901365018ece4424f 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-waitpkg.s
+++ b/gas/testsuite/gas/i386/x86-64-waitpkg.s
@@ -6,10 +6,13 @@ _start:
        umonitor %r10
        umonitor %r10d
        umwait %ecx
-       umwait %rcx
-       umwait %r10
        umwait %r10d
+       umwait %edi, %edx, %eax
        tpause %ecx
-       tpause %rcx
-       tpause %r10
        tpause %r10d
+       tpause %edi, %edx, %eax
+
+       .intel_syntax noprefix
+
+       umwait esi, edx, eax
+       tpause esi, edx, eax

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 99958a10a5fadef7bca9b93ff0e1b4db5c690ad7..0b0a121063763805bccb56463f9d95f667fc0e2a 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2020-03-06  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
+       template.
+       * i386-tbl.h: Re-generate.
+
 2020-03-04  Jan Beulich  <jbeulich@suse.com>
 
        * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.

diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 41627344c26da6483c2450e8e592ec1f03f71967..c79ff5afb80cbfcadebbeab2bb6eafcc61416834 100644 (file)
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -4763,10 +4763,10 @@ pconfig, 0, 0x0f01c5, None, 3, CpuPCONFIG, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qS
 // WAITPKG instructions.
 
 umonitor, 1, 0xf30fae, 0x6, 2, CpuWAITPKG, Modrm|AddrPrefixOpReg, { Reg16|Reg32|Reg64 }
-
-tpause, 1, 0x660fae, 0x6, 2, CpuWAITPKG, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Reg32|Reg64 }
-
-umwait, 1, 0xf20fae, 0x6, 2, CpuWAITPKG, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Reg32|Reg64 }
+tpause, 1, 0x660fae, 0x6, 2, CpuWAITPKG, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32 }
+tpause, 3, 0x660fae, 0x6, 2, CpuWAITPKG, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32, RegD|Dword, Acc|Dword }
+umwait, 1, 0xf20fae, 0x6, 2, CpuWAITPKG, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32 }
+umwait, 3, 0xf20fae, 0x6, 2, CpuWAITPKG, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32, RegD|Dword, Acc|Dword }
 
 // WAITPKG instructions end.
 

diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 92b70f724c8f194bd32eb0fb41d5c109a204f800..e08f3743edc0dac2552b1f22fc37510882e869b9 100644 (file)
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -58351,10 +58351,26 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
+         0, 0, 0, 0, 0, 0 } } } },
+  { "tpause", 0x660fae, 0x6, 2, 3,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
+         0, 0, 0, 0, 0, 0 } },
+      { { 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
+         0, 0, 0, 0, 0, 0 } },
+      { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
          0, 0, 0, 0, 0, 0 } } } },
   { "umwait", 0xf20fae, 0x6, 2, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -58363,10 +58379,26 @@ const insn_template i386_optab[] =
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
+         0, 0, 0, 0, 0, 0 } } } },
+  { "umwait", 0xf20fae, 0x6, 2, 3,
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
+         0, 0, 0, 0, 0, 0 } },
+      { { 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
+         0, 0, 0, 0, 0, 0 } },
+      { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
          0, 0, 0, 0, 0, 0 } } } },
   { "cldemote", 0x0f1c, 0x0, 2, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,