Fix two regressions caused by CU / TU merging
[deliverable/binutils-gdb.git] / include / opcode /
2021-07-01  Mike Frysingeropcodes: constify aarch64_opcode_tables
2021-07-01  Richard Earnshawarm: don't treat XScale features as part of the FPU...
2021-05-29  Maciej W. RozyckiMIPS/opcodes: Properly handle ISA exclusion
2021-05-29  Maciej W. RozyckiMIPS/opcodes: Factor out ISA matching against flags
2021-05-29  Maciej W. RozyckiMIPS/opcodes: Do not use CP0 register names for control...
2021-05-29  Maciej W. RozyckiMIPS/opcodes: Free up redundant `g' operand code
2021-04-01  Martin LiskaRemove strneq macro and use startswith.
2021-03-31  Alan ModraUse bool in include
2021-03-31  Alan ModraRemove bfd_stdint.h
2021-03-29  Alan ModraTRUE/FALSE simplification
2021-03-29  Alan Modraopcodes int vs bfd_boolean fixes
2021-03-16  Kuan-Lin ChenRISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructions
2021-02-19  Nelson ChuRISC-V: PR27158, fixed UJ/SB types and added CSS/CL...
2021-02-18  Nelson ChuRISC-V: Add bfd/cpu-riscv.h to support all spec version...
2021-02-15  Andreas KrebbelIBM Z: Implement instruction set extensions
2021-02-08  Mike Frysingeropcodes: tic54x: namespace exported variables
2021-02-05  Nelson ChuRISC-V: PR27348, Remove the obsolete OP_*CUSTOM_IMM.
2021-02-05  Nelson ChuRISC-V: PR27348, Remove obsolete Xcustom support.
2021-02-04  Nelson ChuRISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instruct...
2021-01-15  Nelson ChuRISC-V: Indent and GNU coding standards tidy, also...
2021-01-15  Nelson ChuRISC-V: Comments tidy and improvement.
2021-01-11  Kyrylo Tkachovaarch64: Remove support for CSRE
2021-01-07  Philipp TomsichRISC-V: Add pause hint instruction.
2021-01-07  Claire Xenia WolfRISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instr...
2021-01-01  Alan ModraPR27116, Spelling errors found by Debian style checker
2021-01-01  Alan ModraUpdate year range in copyright notice of binutils files
2020-12-18  Alan ModraConstify more arrays
2020-12-10  Nelson ChuRISC-V: Add sext.[bh] and zext.[bhw] pseudo instructions.
2020-12-10  Nelson ChuRISC-V: Control fence.i and csr instructions by zifence...
2020-12-01  Nelson ChuRISC-V: Support to add implicit extensions for G.
2020-12-01  Nelson ChuRISC-V: Improve the version parsing for arch string.
2020-11-16  Przemyslaw Wirkusaarch64: Extract Condition flag manipulation feature...
2020-11-09  Spencer E. OlsonAdd support for the LMBD (left-most bit detect) instruc...
2020-11-09  Przemyslaw Wirkusaarch64: Limit Rt register number for LS64 load/store...
2020-11-06  Przemyslaw Wirkusaarch64: Extract Pointer Authentication feature from...
2020-11-04  Przemyslaw Wirkusaarch64: Update feature RAS system registers
2020-11-03  Przemyslaw Wirkus[PATCH][GAS] aarch64: Add atomic 64-byte load/store...
2020-10-28  Przemyslaw Wirkusaarch64: Add CSR PDEC instruction
2020-10-28  Przemyslaw Wirkusaarch64: Add DSB instruction Armv8.7-a variant
2020-10-28  Przemyslaw Wirkusaarch64: Add basic support for armv8.7-a architecture
2020-10-26  Cooper QuCSKY: Add version flag in eflag and fix bug in disassem...
2020-09-11  Cooper QuCSKY: Change ISA flag's type to bfd_uint64_t and fix...
2020-09-10  Nick CliftonFix compile time warnings when building for the CSKY...
2020-09-09  Cooper QuCSKY: Change mvtc and mulsw's ISA flag.
2020-09-09  Cooper QuCSKY: Add FPUV3 instructions, which supported by ck860f.
2020-09-08  Alex Coplanaarch64: Add support for Armv8-R system registers
2020-09-08  Alex Coplanaarch64: Add base support for Armv8-R
2020-09-02  Alan Modraubsan: v850-opc.c:412 left shift cannot be represented
2020-09-02  Cooper QuCSKY: Add CPU CK803r3.
2020-08-31  Alan ModraPR26493 UBSAN: elfnn-riscv.c left shift of negative...
2020-08-28  Cooper QuCSKY: Support attribute section.
2020-08-24  Cooper QuCSKY: Add new arch CK860.
2020-08-24  Cooper QuCSKY: Add ck803r2 series cpu.
2020-08-10  Alex Coplanaarch64: Don't assert on long sysreg names
2020-08-10  Przemyslaw Wirkus[aarch64] GAS doesn't validate the architecture version...
2020-06-30  Nelson ChuRISC-V: Support debug and float CSR as the unprivileged...
2020-06-30  Nelson ChuRISC-V: Cleanup the include/opcode/riscv-opc.h.
2020-06-22  Alex Coplanaarch64: Normalize and sort feature bit macros
2020-06-22  Nelson ChuRISC-V: Report warning when linking the objects with...
2020-06-12  Nelson ChuRISC-V: Drop the privileged spec v1.9 support.
2020-06-11  Alex Coplan[PATCH]: aarch64: Refactor representation of system...
2020-06-04  Jose E. Marchesiopcodes: discriminate endianness and insn-endianness...
2020-06-04  Jose E. Marchesiopcodes: support insn endianness in cgen_cpu_open
2020-06-03  Nelson ChuRISC-V: Fix the error when building RISC-V linux native...
2020-05-28  Alan ModraPR26044, Some targets can't be compiled with GCC 10...
2020-05-20  Nelson Chu[PATCH v2 0/9] RISC-V: Support version controling for...
2020-05-19  Alexander FedotovFix the ARM assembler to generate a Realtime profile...
2020-05-11  Alan ModraPower10 Reduced precision outer product operations
2020-05-11  Alan ModraPowerPC Rename powerxx to power10
2020-04-30  Alex CoplanAArch64: add GAS support for UDF instruction
2020-03-30  Nelson ChuRISC-V: Update CSR to privileged spec 1.11.
2020-02-21  Nelson ChuRISC-V: Support the ISA-dependent CSR checking.
2020-02-10  Matthew Malcomson[binutils][arm] arm support for ARMv8.m Custom Datapath...
2020-02-04  Alan Modraubsan: d30v: negation of -2147483648
2020-01-16  Andre Vieira[binutils][arm] PR25376 Change MVE into a CORE_HIGH...
2020-01-15  Jozef LawrynowiczMSP430: Fix relocation overflow when using #lo(EXP...
2020-01-13  Alan Modratic4x: sign extension using shifts
2020-01-10  Alan Modraubsan: spu: left shift of negative value
2020-01-07  Shahab Vahedi[ARC] Add finer details for LLOCK and SCOND
2020-01-02  Nick CliftonEnable building the s12z target on Solaris hosts where...
2020-01-01  Alan ModraUpdate year range in copyright notice of binutils files
2019-12-17  Alan ModraRemove tic80 support
2019-12-16  Alan Modraubsan: crx: left shift cannot be represented in type...
2019-12-16  Alan Modraubsan: nds32: left shift cannot be represented in type...
2019-12-11  Alan Modrabfd signed overflow fixes
2019-12-11  Alan Modraubsan: left shift of cannot be represented in type...
2019-12-05  Jan BeulichArm64: simplify Crypto arch extension handling
2019-11-22  Mihail IonescuArm: Change CRC from fpu feature to archititectural...
2019-11-07  Matthew Malcomson[Patch][binutils][arm] Armv8.6-A Matrix Multiply exten...
2019-11-07  Matthew Malcomson[binutils][aarch64] Matrix Multiply extension enablemen...
2019-11-07  Matthew Malcomson[binutils][arm] BFloat16 enablement [4/X]
2019-11-07  Matthew Malcomson[binutils][aarch64] Bfloat16 enablement [2/X]
2019-11-07  Matthew Malcomson[gas][aarch64] Armv8.6-a option [1/X]
2019-09-18  Jim WilsonRISC-V: Gate opcode tables by enum rather than string.
2019-08-30  Claudiu Zissulescu[ARC] [COMMITTED] Fix FASTMATH field.
2019-08-08  Yoshinori SatoUpdate the handling of shift rotate and load/store...
2019-07-24  Claudiu Zissulescu[ARC] Update ARC opcode table
2019-07-16  Jan Beulichx86: fold SReg{2,3}
2019-07-01  Matthew Malcomson[gas][aarch64][SVE2] Fix pmull{t,b} requirement on...
2019-05-24  Peter BergnerPowerPC add initial -mfuture instruction support
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