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Fix seg-fault in the linker introduced by the previous delta.
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1764 };
1765
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1768 {
1769 HOWTO (R_ARM_RREL32, /* type */
1770 0, /* rightshift */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1772 0, /* bitsize */
1773 FALSE, /* pc_relative */
1774 0, /* bitpos */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1779 0, /* src_mask */
1780 0, /* dst_mask */
1781 FALSE), /* pcrel_offset */
1782
1783 HOWTO (R_ARM_RABS32, /* type */
1784 0, /* rightshift */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1786 0, /* bitsize */
1787 FALSE, /* pc_relative */
1788 0, /* bitpos */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1793 0, /* src_mask */
1794 0, /* dst_mask */
1795 FALSE), /* pcrel_offset */
1796
1797 HOWTO (R_ARM_RPC24, /* type */
1798 0, /* rightshift */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1800 0, /* bitsize */
1801 FALSE, /* pc_relative */
1802 0, /* bitpos */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1807 0, /* src_mask */
1808 0, /* dst_mask */
1809 FALSE), /* pcrel_offset */
1810
1811 HOWTO (R_ARM_RBASE, /* type */
1812 0, /* rightshift */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1814 0, /* bitsize */
1815 FALSE, /* pc_relative */
1816 0, /* bitpos */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1821 0, /* src_mask */
1822 0, /* dst_mask */
1823 FALSE) /* pcrel_offset */
1824 };
1825
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1828 {
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1831
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1834
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1838
1839 return NULL;
1840 }
1841
1842 static void
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1845 {
1846 unsigned int r_type;
1847
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1850 }
1851
1852 struct elf32_arm_reloc_map
1853 {
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1856 };
1857
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1860 {
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1951 };
1952
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1956 {
1957 unsigned int i;
1958
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1962
1963 return NULL;
1964 }
1965
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1968 const char *r_name)
1969 {
1970 unsigned int i;
1971
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1976
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1981
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1986
1987 return NULL;
1988 }
1989
1990 /* Support for core dump NOTE sections. */
1991
1992 static bfd_boolean
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1994 {
1995 int offset;
1996 size_t size;
1997
1998 switch (note->descsz)
1999 {
2000 default:
2001 return FALSE;
2002
2003 case 148: /* Linux/ARM 32-bit. */
2004 /* pr_cursig */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2006
2007 /* pr_pid */
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2009
2010 /* pr_reg */
2011 offset = 72;
2012 size = 72;
2013
2014 break;
2015 }
2016
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2020 }
2021
2022 static bfd_boolean
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2024 {
2025 switch (note->descsz)
2026 {
2027 default:
2028 return FALSE;
2029
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2037 }
2038
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2042 {
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2045
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2048 }
2049
2050 return TRUE;
2051 }
2052
2053 static char *
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2055 int note_type, ...)
2056 {
2057 switch (note_type)
2058 {
2059 default:
2060 return NULL;
2061
2062 case NT_PRPSINFO:
2063 {
2064 char data[124];
2065 va_list ap;
2066
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2071 va_end (ap);
2072
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2075 }
2076
2077 case NT_PRSTATUS:
2078 {
2079 char data[148];
2080 va_list ap;
2081 long pid;
2082 int cursig;
2083 const void *greg;
2084
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2093 va_end (ap);
2094
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2097 }
2098 }
2099 }
2100
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2105
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2109
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2112
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2114 interworkable. */
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2119
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2126
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2129
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2132
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2135
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2138
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2140
2141 #define CMSE_PREFIX "__acle_se_"
2142
2143 /* The name of the dynamic interpreter. This is put in the .interp
2144 section. */
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2146
2147 static const unsigned long tls_trampoline [] =
2148 {
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2152 };
2153
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2155 {
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 };
2166
2167 #ifdef FOUR_WORD_PLT
2168
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2172 linker first. */
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2174 {
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 };
2180
2181 /* Subsequent entries in a procedure linkage table look like
2182 this. */
2183 static const bfd_vma elf32_arm_plt_entry [] =
2184 {
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2189 };
2190
2191 #else /* not FOUR_WORD_PLT */
2192
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2196 linker first. */
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2198 {
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2204 };
2205
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2209 {
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 };
2214
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2218 {
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 };
2224
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2226
2227 #endif /* not FOUR_WORD_PLT */
2228
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2233 {
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2238 /* add lr, pc */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2241 };
2242
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2244 look like this. */
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2246 {
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2253 /* nop */
2254 };
2255
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2259 {
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 };
2265
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2268 {
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 };
2276
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2279 {
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 };
2287
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2291 {
2292 0x4778, /* bx pc */
2293 0x46c0 /* nop */
2294 };
2295
2296 /* The entries in a PLT when using a DLL-based target with multiple
2297 address spaces. */
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2299 {
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 };
2303
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2307 linker first. */
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 {
2310 /* First bundle: */
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2320 /* Third bundle: */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2324 /* .Lplt_tail: */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2331 };
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2333
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2336 {
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2341 };
2342
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2351
2352 enum stub_insn_type
2353 {
2354 THUMB16_TYPE = 1,
2355 THUMB32_TYPE,
2356 ARM_TYPE,
2357 DATA_TYPE
2358 };
2359
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371
2372 typedef struct
2373 {
2374 bfd_vma data;
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2377 int reloc_addend;
2378 } insn_sequence;
2379
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2383 {
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2386 };
2387
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2389 available. */
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2391 {
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2395 };
2396
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2399 {
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2407 };
2408
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2411 {
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2414 };
2415
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2419 {
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2423 };
2424
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2426 allowed. */
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2428 {
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2434 };
2435
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2437 available. */
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2439 {
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2444 };
2445
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2449 {
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2453 };
2454
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2458 {
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2462 };
2463
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2467 ARMv7). */
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2469 {
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2474 };
2475
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2478 {
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2483 };
2484
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2487 {
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2493 };
2494
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2496 architectures. */
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2498 {
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2506 };
2507
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2509 allowed. */
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2511 {
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2518 };
2519
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2523 {
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2527 };
2528
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2532 {
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2538 };
2539
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2542 {
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2551 };
2552
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2555 {
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2564 };
2565
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2568 {
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2571 };
2572
2573
2574 /* Cortex-A8 erratum-workaround stubs. */
2575
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2578
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2580 {
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2584 };
2585
2586 /* Stub used for b.w and bl.w instructions. */
2587
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2589 {
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2591 };
2592
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2594 {
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2596 };
2597
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2601
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2603 {
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2605 };
2606
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2610 applied.
2611
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2615
2616 const char * stubborn_problems[] = { "np" };
2617
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2619 section called:
2620
2621 .data.rel.local.stubborn_problems
2622
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2624
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2627 continue;
2628
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2631 C identifier. */
2632 #define STUB_SUFFIX ".__stub"
2633
2634 /* One entry per long/short branch stub defined above. */
2635 #define DEF_STUBS \
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2659
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2662 {
2663 arm_stub_none,
2664 DEF_STUBS
2665 max_stub_type
2666 };
2667 #undef DEF_STUB
2668
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2671
2672 typedef struct
2673 {
2674 const insn_sequence* template_sequence;
2675 int template_size;
2676 } stub_def;
2677
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2680 {
2681 {NULL, 0},
2682 DEF_STUBS
2683 };
2684
2685 struct elf32_arm_stub_hash_entry
2686 {
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2689
2690 /* The stub section. */
2691 asection *stub_sec;
2692
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2695
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2700
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2705 same section. */
2706 bfd_vma source_value;
2707
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2711
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2715 int stub_size;
2716 /* Its template. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2720
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2723
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2726
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2729 asection *id_sec;
2730
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2734 char *output_name;
2735 };
2736
2737 /* Used to build a map of a section. This is required for mixed-endian
2738 code/data. */
2739
2740 typedef struct elf32_elf_section_map
2741 {
2742 bfd_vma vma;
2743 char type;
2744 }
2745 elf32_arm_section_map;
2746
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2748
2749 typedef enum
2750 {
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2755 }
2756 elf32_vfp11_erratum_type;
2757
2758 typedef struct elf32_vfp11_erratum_list
2759 {
2760 struct elf32_vfp11_erratum_list *next;
2761 bfd_vma vma;
2762 union
2763 {
2764 struct
2765 {
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2768 } b;
2769 struct
2770 {
2771 struct elf32_vfp11_erratum_list *branch;
2772 unsigned int id;
2773 } v;
2774 } u;
2775 elf32_vfp11_erratum_type type;
2776 }
2777 elf32_vfp11_erratum_list;
2778
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2780 veneer. */
2781 typedef enum
2782 {
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2785 }
2786 elf32_stm32l4xx_erratum_type;
2787
2788 typedef struct elf32_stm32l4xx_erratum_list
2789 {
2790 struct elf32_stm32l4xx_erratum_list *next;
2791 bfd_vma vma;
2792 union
2793 {
2794 struct
2795 {
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2797 unsigned int insn;
2798 } b;
2799 struct
2800 {
2801 struct elf32_stm32l4xx_erratum_list *branch;
2802 unsigned int id;
2803 } v;
2804 } u;
2805 elf32_stm32l4xx_erratum_type type;
2806 }
2807 elf32_stm32l4xx_erratum_list;
2808
2809 typedef enum
2810 {
2811 DELETE_EXIDX_ENTRY,
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2813 }
2814 arm_unwind_edit_type;
2815
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2818 {
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2824 unsigned int index;
2825 struct arm_unwind_table_edit *next;
2826 }
2827 arm_unwind_table_edit;
2828
2829 typedef struct _arm_elf_section_data
2830 {
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2843 union
2844 {
2845 /* Unwind info attached to a text section. */
2846 struct
2847 {
2848 asection *arm_exidx_sec;
2849 } text;
2850
2851 /* Unwind info attached to an .ARM.exidx section. */
2852 struct
2853 {
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2856 } exidx;
2857 } u;
2858 }
2859 _arm_elf_section_data;
2860
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2863
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2869
2870 struct a8_erratum_fix
2871 {
2872 bfd *input_bfd;
2873 asection *section;
2874 bfd_vma offset;
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2877 char *stub_name;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2880 };
2881
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2883 erratum. */
2884
2885 struct a8_erratum_reloc
2886 {
2887 bfd_vma from;
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2894 };
2895
2896 /* The size of the thread control block. */
2897 #define TCB_SIZE 8
2898
2899 /* ARM-specific information about a PLT entry, over and above the usual
2900 gotplt_union. */
2901 struct arm_plt_info
2902 {
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2906
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2910
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2917
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2922 };
2923
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2926 {
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2930
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2934
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2937 };
2938
2939 struct elf_arm_obj_tdata
2940 {
2941 struct elf_obj_tdata root;
2942
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2945
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2948
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2951
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2954
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2957 };
2958
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2961
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2964
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2967
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2970
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2975
2976 static bfd_boolean
2977 elf32_arm_mkobject (bfd *abfd)
2978 {
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2980 ARM_ELF_DATA);
2981 }
2982
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2984
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2987 {
2988 struct elf_link_hash_entry root;
2989
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2992
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2995
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3003
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3006
3007 unsigned int unused : 23;
3008
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3012
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3016
3017 /* A pointer to the most recently used stub hash entry against this
3018 symbol. */
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3020 };
3021
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3025 (&(table)->root, \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3027 (info)))
3028
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3033
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3037
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3040 struct map_stub
3041 {
3042 /* This is the section to which stubs in the group will be
3043 attached. */
3044 asection *link_sec;
3045 /* The stub section. */
3046 asection *stub_sec;
3047 };
3048
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3051
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3054 {
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3057
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3060
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3063
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3066
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3070
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3072 veneers. */
3073 bfd_size_type vfp11_erratum_glue_size;
3074
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3076 veneers. */
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3078
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3084
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3087
3088 /* Nonzero to output a BE8 image. */
3089 int byteswap_code;
3090
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3093 int target1_is_rel;
3094
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3096 int target2_reloc;
3097
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3101 int fix_v4bx;
3102
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3104 int fix_cortex_a8;
3105
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3107 int fix_arm1176;
3108
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3110 int use_blx;
3111
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3115
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3118
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3122
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3125
3126 /* Nonzero to force PIC branch veneers. */
3127 int pic_veneer;
3128
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3131
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3134
3135 /* True if the target system is VxWorks. */
3136 int vxworks_p;
3137
3138 /* True if the target system is Symbian OS. */
3139 int symbian_p;
3140
3141 /* True if the target system is Native Client. */
3142 int nacl_p;
3143
3144 /* True if the target uses REL relocations. */
3145 int use_rel;
3146
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3149 int cmse_implib;
3150
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3153 bfd *in_implib_bfd;
3154
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3157
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3160
3161 /* Short-cuts to get to dynamic linker sections. */
3162 asection *sdynbss;
3163 asection *srelbss;
3164
3165 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3166 asection *srelplt2;
3167
3168 /* The offset into splt of the PLT entry for the TLS descriptor
3169 resolver. Special values are 0, if not necessary (or not found
3170 to be necessary yet), and -1 if needed but not determined
3171 yet. */
3172 bfd_vma dt_tlsdesc_plt;
3173
3174 /* The offset into sgot of the GOT entry used by the PLT entry
3175 above. */
3176 bfd_vma dt_tlsdesc_got;
3177
3178 /* Offset in .plt section of tls_arm_trampoline. */
3179 bfd_vma tls_trampoline;
3180
3181 /* Data for R_ARM_TLS_LDM32 relocations. */
3182 union
3183 {
3184 bfd_signed_vma refcount;
3185 bfd_vma offset;
3186 } tls_ldm_got;
3187
3188 /* Small local sym cache. */
3189 struct sym_cache sym_cache;
3190
3191 /* For convenience in allocate_dynrelocs. */
3192 bfd * obfd;
3193
3194 /* The amount of space used by the reserved portion of the sgotplt
3195 section, plus whatever space is used by the jump slots. */
3196 bfd_vma sgotplt_jump_table_size;
3197
3198 /* The stub hash table. */
3199 struct bfd_hash_table stub_hash_table;
3200
3201 /* Linker stub bfd. */
3202 bfd *stub_bfd;
3203
3204 /* Linker call-backs. */
3205 asection * (*add_stub_section) (const char *, asection *, asection *,
3206 unsigned int);
3207 void (*layout_sections_again) (void);
3208
3209 /* Array to keep track of which stub sections have been created, and
3210 information on stub grouping. */
3211 struct map_stub *stub_group;
3212
3213 /* Input stub section holding secure gateway veneers. */
3214 asection *cmse_stub_sec;
3215
3216 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3217 start to be allocated. */
3218 bfd_vma new_cmse_stub_offset;
3219
3220 /* Number of elements in stub_group. */
3221 unsigned int top_id;
3222
3223 /* Assorted information used by elf32_arm_size_stubs. */
3224 unsigned int bfd_count;
3225 unsigned int top_index;
3226 asection **input_list;
3227 };
3228
3229 static inline int
3230 ctz (unsigned int mask)
3231 {
3232 #if GCC_VERSION >= 3004
3233 return __builtin_ctz (mask);
3234 #else
3235 unsigned int i;
3236
3237 for (i = 0; i < 8 * sizeof (mask); i++)
3238 {
3239 if (mask & 0x1)
3240 break;
3241 mask = (mask >> 1);
3242 }
3243 return i;
3244 #endif
3245 }
3246
3247 static inline int
3248 popcount (unsigned int mask)
3249 {
3250 #if GCC_VERSION >= 3004
3251 return __builtin_popcount (mask);
3252 #else
3253 unsigned int i, sum = 0;
3254
3255 for (i = 0; i < 8 * sizeof (mask); i++)
3256 {
3257 if (mask & 0x1)
3258 sum++;
3259 mask = (mask >> 1);
3260 }
3261 return sum;
3262 #endif
3263 }
3264
3265 /* Create an entry in an ARM ELF linker hash table. */
3266
3267 static struct bfd_hash_entry *
3268 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3269 struct bfd_hash_table * table,
3270 const char * string)
3271 {
3272 struct elf32_arm_link_hash_entry * ret =
3273 (struct elf32_arm_link_hash_entry *) entry;
3274
3275 /* Allocate the structure if it has not already been allocated by a
3276 subclass. */
3277 if (ret == NULL)
3278 ret = (struct elf32_arm_link_hash_entry *)
3279 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3280 if (ret == NULL)
3281 return (struct bfd_hash_entry *) ret;
3282
3283 /* Call the allocation method of the superclass. */
3284 ret = ((struct elf32_arm_link_hash_entry *)
3285 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3286 table, string));
3287 if (ret != NULL)
3288 {
3289 ret->dyn_relocs = NULL;
3290 ret->tls_type = GOT_UNKNOWN;
3291 ret->tlsdesc_got = (bfd_vma) -1;
3292 ret->plt.thumb_refcount = 0;
3293 ret->plt.maybe_thumb_refcount = 0;
3294 ret->plt.noncall_refcount = 0;
3295 ret->plt.got_offset = -1;
3296 ret->is_iplt = FALSE;
3297 ret->export_glue = NULL;
3298
3299 ret->stub_cache = NULL;
3300 }
3301
3302 return (struct bfd_hash_entry *) ret;
3303 }
3304
3305 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3306 symbols. */
3307
3308 static bfd_boolean
3309 elf32_arm_allocate_local_sym_info (bfd *abfd)
3310 {
3311 if (elf_local_got_refcounts (abfd) == NULL)
3312 {
3313 bfd_size_type num_syms;
3314 bfd_size_type size;
3315 char *data;
3316
3317 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3318 size = num_syms * (sizeof (bfd_signed_vma)
3319 + sizeof (struct arm_local_iplt_info *)
3320 + sizeof (bfd_vma)
3321 + sizeof (char));
3322 data = bfd_zalloc (abfd, size);
3323 if (data == NULL)
3324 return FALSE;
3325
3326 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3327 data += num_syms * sizeof (bfd_signed_vma);
3328
3329 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3330 data += num_syms * sizeof (struct arm_local_iplt_info *);
3331
3332 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3333 data += num_syms * sizeof (bfd_vma);
3334
3335 elf32_arm_local_got_tls_type (abfd) = data;
3336 }
3337 return TRUE;
3338 }
3339
3340 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3341 to input bfd ABFD. Create the information if it doesn't already exist.
3342 Return null if an allocation fails. */
3343
3344 static struct arm_local_iplt_info *
3345 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3346 {
3347 struct arm_local_iplt_info **ptr;
3348
3349 if (!elf32_arm_allocate_local_sym_info (abfd))
3350 return NULL;
3351
3352 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3353 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3354 if (*ptr == NULL)
3355 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3356 return *ptr;
3357 }
3358
3359 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3360 in ABFD's symbol table. If the symbol is global, H points to its
3361 hash table entry, otherwise H is null.
3362
3363 Return true if the symbol does have PLT information. When returning
3364 true, point *ROOT_PLT at the target-independent reference count/offset
3365 union and *ARM_PLT at the ARM-specific information. */
3366
3367 static bfd_boolean
3368 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3369 struct elf32_arm_link_hash_entry *h,
3370 unsigned long r_symndx, union gotplt_union **root_plt,
3371 struct arm_plt_info **arm_plt)
3372 {
3373 struct arm_local_iplt_info *local_iplt;
3374
3375 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3376 return FALSE;
3377
3378 if (h != NULL)
3379 {
3380 *root_plt = &h->root.plt;
3381 *arm_plt = &h->plt;
3382 return TRUE;
3383 }
3384
3385 if (elf32_arm_local_iplt (abfd) == NULL)
3386 return FALSE;
3387
3388 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3389 if (local_iplt == NULL)
3390 return FALSE;
3391
3392 *root_plt = &local_iplt->root;
3393 *arm_plt = &local_iplt->arm;
3394 return TRUE;
3395 }
3396
3397 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3398 before it. */
3399
3400 static bfd_boolean
3401 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3402 struct arm_plt_info *arm_plt)
3403 {
3404 struct elf32_arm_link_hash_table *htab;
3405
3406 htab = elf32_arm_hash_table (info);
3407 return (arm_plt->thumb_refcount != 0
3408 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3409 }
3410
3411 /* Return a pointer to the head of the dynamic reloc list that should
3412 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3413 ABFD's symbol table. Return null if an error occurs. */
3414
3415 static struct elf_dyn_relocs **
3416 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3417 Elf_Internal_Sym *isym)
3418 {
3419 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3420 {
3421 struct arm_local_iplt_info *local_iplt;
3422
3423 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3424 if (local_iplt == NULL)
3425 return NULL;
3426 return &local_iplt->dyn_relocs;
3427 }
3428 else
3429 {
3430 /* Track dynamic relocs needed for local syms too.
3431 We really need local syms available to do this
3432 easily. Oh well. */
3433 asection *s;
3434 void *vpp;
3435
3436 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3437 if (s == NULL)
3438 abort ();
3439
3440 vpp = &elf_section_data (s)->local_dynrel;
3441 return (struct elf_dyn_relocs **) vpp;
3442 }
3443 }
3444
3445 /* Initialize an entry in the stub hash table. */
3446
3447 static struct bfd_hash_entry *
3448 stub_hash_newfunc (struct bfd_hash_entry *entry,
3449 struct bfd_hash_table *table,
3450 const char *string)
3451 {
3452 /* Allocate the structure if it has not already been allocated by a
3453 subclass. */
3454 if (entry == NULL)
3455 {
3456 entry = (struct bfd_hash_entry *)
3457 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3458 if (entry == NULL)
3459 return entry;
3460 }
3461
3462 /* Call the allocation method of the superclass. */
3463 entry = bfd_hash_newfunc (entry, table, string);
3464 if (entry != NULL)
3465 {
3466 struct elf32_arm_stub_hash_entry *eh;
3467
3468 /* Initialize the local fields. */
3469 eh = (struct elf32_arm_stub_hash_entry *) entry;
3470 eh->stub_sec = NULL;
3471 eh->stub_offset = (bfd_vma) -1;
3472 eh->source_value = 0;
3473 eh->target_value = 0;
3474 eh->target_section = NULL;
3475 eh->orig_insn = 0;
3476 eh->stub_type = arm_stub_none;
3477 eh->stub_size = 0;
3478 eh->stub_template = NULL;
3479 eh->stub_template_size = -1;
3480 eh->h = NULL;
3481 eh->id_sec = NULL;
3482 eh->output_name = NULL;
3483 }
3484
3485 return entry;
3486 }
3487
3488 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3489 shortcuts to them in our hash table. */
3490
3491 static bfd_boolean
3492 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3493 {
3494 struct elf32_arm_link_hash_table *htab;
3495
3496 htab = elf32_arm_hash_table (info);
3497 if (htab == NULL)
3498 return FALSE;
3499
3500 /* BPABI objects never have a GOT, or associated sections. */
3501 if (htab->symbian_p)
3502 return TRUE;
3503
3504 if (! _bfd_elf_create_got_section (dynobj, info))
3505 return FALSE;
3506
3507 return TRUE;
3508 }
3509
3510 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3511
3512 static bfd_boolean
3513 create_ifunc_sections (struct bfd_link_info *info)
3514 {
3515 struct elf32_arm_link_hash_table *htab;
3516 const struct elf_backend_data *bed;
3517 bfd *dynobj;
3518 asection *s;
3519 flagword flags;
3520
3521 htab = elf32_arm_hash_table (info);
3522 dynobj = htab->root.dynobj;
3523 bed = get_elf_backend_data (dynobj);
3524 flags = bed->dynamic_sec_flags;
3525
3526 if (htab->root.iplt == NULL)
3527 {
3528 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3529 flags | SEC_READONLY | SEC_CODE);
3530 if (s == NULL
3531 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3532 return FALSE;
3533 htab->root.iplt = s;
3534 }
3535
3536 if (htab->root.irelplt == NULL)
3537 {
3538 s = bfd_make_section_anyway_with_flags (dynobj,
3539 RELOC_SECTION (htab, ".iplt"),
3540 flags | SEC_READONLY);
3541 if (s == NULL
3542 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3543 return FALSE;
3544 htab->root.irelplt = s;
3545 }
3546
3547 if (htab->root.igotplt == NULL)
3548 {
3549 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3550 if (s == NULL
3551 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3552 return FALSE;
3553 htab->root.igotplt = s;
3554 }
3555 return TRUE;
3556 }
3557
3558 /* Determine if we're dealing with a Thumb only architecture. */
3559
3560 static bfd_boolean
3561 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3562 {
3563 int arch;
3564 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3565 Tag_CPU_arch_profile);
3566
3567 if (profile)
3568 return profile == 'M';
3569
3570 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3571
3572 /* Force return logic to be reviewed for each new architecture. */
3573 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3574 || arch == TAG_CPU_ARCH_V8M_BASE
3575 || arch == TAG_CPU_ARCH_V8M_MAIN);
3576
3577 if (arch == TAG_CPU_ARCH_V6_M
3578 || arch == TAG_CPU_ARCH_V6S_M
3579 || arch == TAG_CPU_ARCH_V7E_M
3580 || arch == TAG_CPU_ARCH_V8M_BASE
3581 || arch == TAG_CPU_ARCH_V8M_MAIN)
3582 return TRUE;
3583
3584 return FALSE;
3585 }
3586
3587 /* Determine if we're dealing with a Thumb-2 object. */
3588
3589 static bfd_boolean
3590 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3591 {
3592 int arch;
3593 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3594 Tag_THUMB_ISA_use);
3595
3596 if (thumb_isa)
3597 return thumb_isa == 2;
3598
3599 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3600
3601 /* Force return logic to be reviewed for each new architecture. */
3602 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3603 || arch == TAG_CPU_ARCH_V8M_BASE
3604 || arch == TAG_CPU_ARCH_V8M_MAIN);
3605
3606 return (arch == TAG_CPU_ARCH_V6T2
3607 || arch == TAG_CPU_ARCH_V7
3608 || arch == TAG_CPU_ARCH_V7E_M
3609 || arch == TAG_CPU_ARCH_V8
3610 || arch == TAG_CPU_ARCH_V8M_MAIN);
3611 }
3612
3613 /* Determine whether Thumb-2 BL instruction is available. */
3614
3615 static bfd_boolean
3616 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3617 {
3618 int arch =
3619 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3620
3621 /* Force return logic to be reviewed for each new architecture. */
3622 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3623 || arch == TAG_CPU_ARCH_V8M_BASE
3624 || arch == TAG_CPU_ARCH_V8M_MAIN);
3625
3626 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3627 return (arch == TAG_CPU_ARCH_V6T2
3628 || arch >= TAG_CPU_ARCH_V7);
3629 }
3630
3631 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3632 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3633 hash table. */
3634
3635 static bfd_boolean
3636 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3637 {
3638 struct elf32_arm_link_hash_table *htab;
3639
3640 htab = elf32_arm_hash_table (info);
3641 if (htab == NULL)
3642 return FALSE;
3643
3644 if (!htab->root.sgot && !create_got_section (dynobj, info))
3645 return FALSE;
3646
3647 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3648 return FALSE;
3649
3650 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3651 if (!bfd_link_pic (info))
3652 htab->srelbss = bfd_get_linker_section (dynobj,
3653 RELOC_SECTION (htab, ".bss"));
3654
3655 if (htab->vxworks_p)
3656 {
3657 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3658 return FALSE;
3659
3660 if (bfd_link_pic (info))
3661 {
3662 htab->plt_header_size = 0;
3663 htab->plt_entry_size
3664 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3665 }
3666 else
3667 {
3668 htab->plt_header_size
3669 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3670 htab->plt_entry_size
3671 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3672 }
3673
3674 if (elf_elfheader (dynobj))
3675 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3676 }
3677 else
3678 {
3679 /* PR ld/16017
3680 Test for thumb only architectures. Note - we cannot just call
3681 using_thumb_only() as the attributes in the output bfd have not been
3682 initialised at this point, so instead we use the input bfd. */
3683 bfd * saved_obfd = htab->obfd;
3684
3685 htab->obfd = dynobj;
3686 if (using_thumb_only (htab))
3687 {
3688 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3689 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3690 }
3691 htab->obfd = saved_obfd;
3692 }
3693
3694 if (!htab->root.splt
3695 || !htab->root.srelplt
3696 || !htab->sdynbss
3697 || (!bfd_link_pic (info) && !htab->srelbss))
3698 abort ();
3699
3700 return TRUE;
3701 }
3702
3703 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3704
3705 static void
3706 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3707 struct elf_link_hash_entry *dir,
3708 struct elf_link_hash_entry *ind)
3709 {
3710 struct elf32_arm_link_hash_entry *edir, *eind;
3711
3712 edir = (struct elf32_arm_link_hash_entry *) dir;
3713 eind = (struct elf32_arm_link_hash_entry *) ind;
3714
3715 if (eind->dyn_relocs != NULL)
3716 {
3717 if (edir->dyn_relocs != NULL)
3718 {
3719 struct elf_dyn_relocs **pp;
3720 struct elf_dyn_relocs *p;
3721
3722 /* Add reloc counts against the indirect sym to the direct sym
3723 list. Merge any entries against the same section. */
3724 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3725 {
3726 struct elf_dyn_relocs *q;
3727
3728 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3729 if (q->sec == p->sec)
3730 {
3731 q->pc_count += p->pc_count;
3732 q->count += p->count;
3733 *pp = p->next;
3734 break;
3735 }
3736 if (q == NULL)
3737 pp = &p->next;
3738 }
3739 *pp = edir->dyn_relocs;
3740 }
3741
3742 edir->dyn_relocs = eind->dyn_relocs;
3743 eind->dyn_relocs = NULL;
3744 }
3745
3746 if (ind->root.type == bfd_link_hash_indirect)
3747 {
3748 /* Copy over PLT info. */
3749 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3750 eind->plt.thumb_refcount = 0;
3751 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3752 eind->plt.maybe_thumb_refcount = 0;
3753 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3754 eind->plt.noncall_refcount = 0;
3755
3756 /* We should only allocate a function to .iplt once the final
3757 symbol information is known. */
3758 BFD_ASSERT (!eind->is_iplt);
3759
3760 if (dir->got.refcount <= 0)
3761 {
3762 edir->tls_type = eind->tls_type;
3763 eind->tls_type = GOT_UNKNOWN;
3764 }
3765 }
3766
3767 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3768 }
3769
3770 /* Destroy an ARM elf linker hash table. */
3771
3772 static void
3773 elf32_arm_link_hash_table_free (bfd *obfd)
3774 {
3775 struct elf32_arm_link_hash_table *ret
3776 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3777
3778 bfd_hash_table_free (&ret->stub_hash_table);
3779 _bfd_elf_link_hash_table_free (obfd);
3780 }
3781
3782 /* Create an ARM elf linker hash table. */
3783
3784 static struct bfd_link_hash_table *
3785 elf32_arm_link_hash_table_create (bfd *abfd)
3786 {
3787 struct elf32_arm_link_hash_table *ret;
3788 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3789
3790 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3791 if (ret == NULL)
3792 return NULL;
3793
3794 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3795 elf32_arm_link_hash_newfunc,
3796 sizeof (struct elf32_arm_link_hash_entry),
3797 ARM_ELF_DATA))
3798 {
3799 free (ret);
3800 return NULL;
3801 }
3802
3803 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3804 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3805 #ifdef FOUR_WORD_PLT
3806 ret->plt_header_size = 16;
3807 ret->plt_entry_size = 16;
3808 #else
3809 ret->plt_header_size = 20;
3810 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3811 #endif
3812 ret->use_rel = 1;
3813 ret->obfd = abfd;
3814
3815 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3816 sizeof (struct elf32_arm_stub_hash_entry)))
3817 {
3818 _bfd_elf_link_hash_table_free (abfd);
3819 return NULL;
3820 }
3821 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3822
3823 return &ret->root.root;
3824 }
3825
3826 /* Determine what kind of NOPs are available. */
3827
3828 static bfd_boolean
3829 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3830 {
3831 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3832 Tag_CPU_arch);
3833
3834 /* Force return logic to be reviewed for each new architecture. */
3835 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3836 || arch == TAG_CPU_ARCH_V8M_BASE
3837 || arch == TAG_CPU_ARCH_V8M_MAIN);
3838
3839 return (arch == TAG_CPU_ARCH_V6T2
3840 || arch == TAG_CPU_ARCH_V6K
3841 || arch == TAG_CPU_ARCH_V7
3842 || arch == TAG_CPU_ARCH_V8);
3843 }
3844
3845 static bfd_boolean
3846 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3847 {
3848 switch (stub_type)
3849 {
3850 case arm_stub_long_branch_thumb_only:
3851 case arm_stub_long_branch_thumb2_only:
3852 case arm_stub_long_branch_thumb2_only_pure:
3853 case arm_stub_long_branch_v4t_thumb_arm:
3854 case arm_stub_short_branch_v4t_thumb_arm:
3855 case arm_stub_long_branch_v4t_thumb_arm_pic:
3856 case arm_stub_long_branch_v4t_thumb_tls_pic:
3857 case arm_stub_long_branch_thumb_only_pic:
3858 case arm_stub_cmse_branch_thumb_only:
3859 return TRUE;
3860 case arm_stub_none:
3861 BFD_FAIL ();
3862 return FALSE;
3863 break;
3864 default:
3865 return FALSE;
3866 }
3867 }
3868
3869 /* Determine the type of stub needed, if any, for a call. */
3870
3871 static enum elf32_arm_stub_type
3872 arm_type_of_stub (struct bfd_link_info *info,
3873 asection *input_sec,
3874 const Elf_Internal_Rela *rel,
3875 unsigned char st_type,
3876 enum arm_st_branch_type *actual_branch_type,
3877 struct elf32_arm_link_hash_entry *hash,
3878 bfd_vma destination,
3879 asection *sym_sec,
3880 bfd *input_bfd,
3881 const char *name)
3882 {
3883 bfd_vma location;
3884 bfd_signed_vma branch_offset;
3885 unsigned int r_type;
3886 struct elf32_arm_link_hash_table * globals;
3887 bfd_boolean thumb2, thumb2_bl, thumb_only;
3888 enum elf32_arm_stub_type stub_type = arm_stub_none;
3889 int use_plt = 0;
3890 enum arm_st_branch_type branch_type = *actual_branch_type;
3891 union gotplt_union *root_plt;
3892 struct arm_plt_info *arm_plt;
3893 int arch;
3894 int thumb2_movw;
3895
3896 if (branch_type == ST_BRANCH_LONG)
3897 return stub_type;
3898
3899 globals = elf32_arm_hash_table (info);
3900 if (globals == NULL)
3901 return stub_type;
3902
3903 thumb_only = using_thumb_only (globals);
3904 thumb2 = using_thumb2 (globals);
3905 thumb2_bl = using_thumb2_bl (globals);
3906
3907 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3908
3909 /* True for architectures that implement the thumb2 movw instruction. */
3910 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3911
3912 /* Determine where the call point is. */
3913 location = (input_sec->output_offset
3914 + input_sec->output_section->vma
3915 + rel->r_offset);
3916
3917 r_type = ELF32_R_TYPE (rel->r_info);
3918
3919 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3920 are considering a function call relocation. */
3921 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3922 || r_type == R_ARM_THM_JUMP19)
3923 && branch_type == ST_BRANCH_TO_ARM)
3924 branch_type = ST_BRANCH_TO_THUMB;
3925
3926 /* For TLS call relocs, it is the caller's responsibility to provide
3927 the address of the appropriate trampoline. */
3928 if (r_type != R_ARM_TLS_CALL
3929 && r_type != R_ARM_THM_TLS_CALL
3930 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3931 ELF32_R_SYM (rel->r_info), &root_plt,
3932 &arm_plt)
3933 && root_plt->offset != (bfd_vma) -1)
3934 {
3935 asection *splt;
3936
3937 if (hash == NULL || hash->is_iplt)
3938 splt = globals->root.iplt;
3939 else
3940 splt = globals->root.splt;
3941 if (splt != NULL)
3942 {
3943 use_plt = 1;
3944
3945 /* Note when dealing with PLT entries: the main PLT stub is in
3946 ARM mode, so if the branch is in Thumb mode, another
3947 Thumb->ARM stub will be inserted later just before the ARM
3948 PLT stub. If a long branch stub is needed, we'll add a
3949 Thumb->Arm one and branch directly to the ARM PLT entry.
3950 Here, we have to check if a pre-PLT Thumb->ARM stub
3951 is needed and if it will be close enough. */
3952
3953 destination = (splt->output_section->vma
3954 + splt->output_offset
3955 + root_plt->offset);
3956 st_type = STT_FUNC;
3957
3958 /* Thumb branch/call to PLT: it can become a branch to ARM
3959 or to Thumb. We must perform the same checks and
3960 corrections as in elf32_arm_final_link_relocate. */
3961 if ((r_type == R_ARM_THM_CALL)
3962 || (r_type == R_ARM_THM_JUMP24))
3963 {
3964 if (globals->use_blx
3965 && r_type == R_ARM_THM_CALL
3966 && !thumb_only)
3967 {
3968 /* If the Thumb BLX instruction is available, convert
3969 the BL to a BLX instruction to call the ARM-mode
3970 PLT entry. */
3971 branch_type = ST_BRANCH_TO_ARM;
3972 }
3973 else
3974 {
3975 if (!thumb_only)
3976 /* Target the Thumb stub before the ARM PLT entry. */
3977 destination -= PLT_THUMB_STUB_SIZE;
3978 branch_type = ST_BRANCH_TO_THUMB;
3979 }
3980 }
3981 else
3982 {
3983 branch_type = ST_BRANCH_TO_ARM;
3984 }
3985 }
3986 }
3987 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3988 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3989
3990 branch_offset = (bfd_signed_vma)(destination - location);
3991
3992 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3993 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3994 {
3995 /* Handle cases where:
3996 - this call goes too far (different Thumb/Thumb2 max
3997 distance)
3998 - it's a Thumb->Arm call and blx is not available, or it's a
3999 Thumb->Arm branch (not bl). A stub is needed in this case,
4000 but only if this call is not through a PLT entry. Indeed,
4001 PLT stubs handle mode switching already.
4002 */
4003 if ((!thumb2_bl
4004 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4005 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4006 || (thumb2_bl
4007 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4008 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4009 || (thumb2
4010 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4011 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4012 && (r_type == R_ARM_THM_JUMP19))
4013 || (branch_type == ST_BRANCH_TO_ARM
4014 && (((r_type == R_ARM_THM_CALL
4015 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4016 || (r_type == R_ARM_THM_JUMP24)
4017 || (r_type == R_ARM_THM_JUMP19))
4018 && !use_plt))
4019 {
4020 /* If we need to insert a Thumb-Thumb long branch stub to a
4021 PLT, use one that branches directly to the ARM PLT
4022 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4023 stub, undo this now. */
4024 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only) {
4025 branch_type = ST_BRANCH_TO_ARM;
4026 branch_offset += PLT_THUMB_STUB_SIZE;
4027 }
4028
4029 if (branch_type == ST_BRANCH_TO_THUMB)
4030 {
4031 /* Thumb to thumb. */
4032 if (!thumb_only)
4033 {
4034 if (input_sec->flags & SEC_ELF_PURECODE)
4035 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4036 " veneers used in section with "
4037 "SHF_ARM_PURECODE section "
4038 "attribute is only supported"
4039 " for M-profile targets that "
4040 "implement the movw "
4041 "instruction."));
4042
4043 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4044 /* PIC stubs. */
4045 ? ((globals->use_blx
4046 && (r_type == R_ARM_THM_CALL))
4047 /* V5T and above. Stub starts with ARM code, so
4048 we must be able to switch mode before
4049 reaching it, which is only possible for 'bl'
4050 (ie R_ARM_THM_CALL relocation). */
4051 ? arm_stub_long_branch_any_thumb_pic
4052 /* On V4T, use Thumb code only. */
4053 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4054
4055 /* non-PIC stubs. */
4056 : ((globals->use_blx
4057 && (r_type == R_ARM_THM_CALL))
4058 /* V5T and above. */
4059 ? arm_stub_long_branch_any_any
4060 /* V4T. */
4061 : arm_stub_long_branch_v4t_thumb_thumb);
4062 }
4063 else
4064 {
4065 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4066 stub_type = arm_stub_long_branch_thumb2_only_pure;
4067 else
4068 {
4069 if (input_sec->flags & SEC_ELF_PURECODE)
4070 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4071 " veneers used in section with "
4072 "SHF_ARM_PURECODE section "
4073 "attribute is only supported"
4074 " for M-profile targets that "
4075 "implement the movw "
4076 "instruction."));
4077
4078 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4079 /* PIC stub. */
4080 ? arm_stub_long_branch_thumb_only_pic
4081 /* non-PIC stub. */
4082 : (thumb2 ? arm_stub_long_branch_thumb2_only
4083 : arm_stub_long_branch_thumb_only);
4084 }
4085 }
4086 }
4087 else
4088 {
4089 if (input_sec->flags & SEC_ELF_PURECODE)
4090 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4091 " veneers used in section with "
4092 "SHF_ARM_PURECODE section "
4093 "attribute is only supported"
4094 " for M-profile targets that "
4095 "implement the movw "
4096 "instruction."));
4097
4098 /* Thumb to arm. */
4099 if (sym_sec != NULL
4100 && sym_sec->owner != NULL
4101 && !INTERWORK_FLAG (sym_sec->owner))
4102 {
4103 (*_bfd_error_handler)
4104 (_("%B(%s): warning: interworking not enabled.\n"
4105 " first occurrence: %B: Thumb call to ARM"),
4106 sym_sec->owner, input_bfd, name);
4107 }
4108
4109 stub_type =
4110 (bfd_link_pic (info) | globals->pic_veneer)
4111 /* PIC stubs. */
4112 ? (r_type == R_ARM_THM_TLS_CALL
4113 /* TLS PIC stubs. */
4114 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4115 : arm_stub_long_branch_v4t_thumb_tls_pic)
4116 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4117 /* V5T PIC and above. */
4118 ? arm_stub_long_branch_any_arm_pic
4119 /* V4T PIC stub. */
4120 : arm_stub_long_branch_v4t_thumb_arm_pic))
4121
4122 /* non-PIC stubs. */
4123 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4124 /* V5T and above. */
4125 ? arm_stub_long_branch_any_any
4126 /* V4T. */
4127 : arm_stub_long_branch_v4t_thumb_arm);
4128
4129 /* Handle v4t short branches. */
4130 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4131 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4132 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4133 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4134 }
4135 }
4136 }
4137 else if (r_type == R_ARM_CALL
4138 || r_type == R_ARM_JUMP24
4139 || r_type == R_ARM_PLT32
4140 || r_type == R_ARM_TLS_CALL)
4141 {
4142 if (input_sec->flags & SEC_ELF_PURECODE)
4143 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4144 " veneers used in section with "
4145 "SHF_ARM_PURECODE section "
4146 "attribute is only supported"
4147 " for M-profile targets that "
4148 "implement the movw "
4149 "instruction."));
4150 if (branch_type == ST_BRANCH_TO_THUMB)
4151 {
4152 /* Arm to thumb. */
4153
4154 if (sym_sec != NULL
4155 && sym_sec->owner != NULL
4156 && !INTERWORK_FLAG (sym_sec->owner))
4157 {
4158 (*_bfd_error_handler)
4159 (_("%B(%s): warning: interworking not enabled.\n"
4160 " first occurrence: %B: ARM call to Thumb"),
4161 sym_sec->owner, input_bfd, name);
4162 }
4163
4164 /* We have an extra 2-bytes reach because of
4165 the mode change (bit 24 (H) of BLX encoding). */
4166 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4167 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4168 || (r_type == R_ARM_CALL && !globals->use_blx)
4169 || (r_type == R_ARM_JUMP24)
4170 || (r_type == R_ARM_PLT32))
4171 {
4172 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4173 /* PIC stubs. */
4174 ? ((globals->use_blx)
4175 /* V5T and above. */
4176 ? arm_stub_long_branch_any_thumb_pic
4177 /* V4T stub. */
4178 : arm_stub_long_branch_v4t_arm_thumb_pic)
4179
4180 /* non-PIC stubs. */
4181 : ((globals->use_blx)
4182 /* V5T and above. */
4183 ? arm_stub_long_branch_any_any
4184 /* V4T. */
4185 : arm_stub_long_branch_v4t_arm_thumb);
4186 }
4187 }
4188 else
4189 {
4190 /* Arm to arm. */
4191 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4192 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4193 {
4194 stub_type =
4195 (bfd_link_pic (info) | globals->pic_veneer)
4196 /* PIC stubs. */
4197 ? (r_type == R_ARM_TLS_CALL
4198 /* TLS PIC Stub. */
4199 ? arm_stub_long_branch_any_tls_pic
4200 : (globals->nacl_p
4201 ? arm_stub_long_branch_arm_nacl_pic
4202 : arm_stub_long_branch_any_arm_pic))
4203 /* non-PIC stubs. */
4204 : (globals->nacl_p
4205 ? arm_stub_long_branch_arm_nacl
4206 : arm_stub_long_branch_any_any);
4207 }
4208 }
4209 }
4210
4211 /* If a stub is needed, record the actual destination type. */
4212 if (stub_type != arm_stub_none)
4213 *actual_branch_type = branch_type;
4214
4215 return stub_type;
4216 }
4217
4218 /* Build a name for an entry in the stub hash table. */
4219
4220 static char *
4221 elf32_arm_stub_name (const asection *input_section,
4222 const asection *sym_sec,
4223 const struct elf32_arm_link_hash_entry *hash,
4224 const Elf_Internal_Rela *rel,
4225 enum elf32_arm_stub_type stub_type)
4226 {
4227 char *stub_name;
4228 bfd_size_type len;
4229
4230 if (hash)
4231 {
4232 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4233 stub_name = (char *) bfd_malloc (len);
4234 if (stub_name != NULL)
4235 sprintf (stub_name, "%08x_%s+%x_%d",
4236 input_section->id & 0xffffffff,
4237 hash->root.root.root.string,
4238 (int) rel->r_addend & 0xffffffff,
4239 (int) stub_type);
4240 }
4241 else
4242 {
4243 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4244 stub_name = (char *) bfd_malloc (len);
4245 if (stub_name != NULL)
4246 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4247 input_section->id & 0xffffffff,
4248 sym_sec->id & 0xffffffff,
4249 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4250 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4251 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4252 (int) rel->r_addend & 0xffffffff,
4253 (int) stub_type);
4254 }
4255
4256 return stub_name;
4257 }
4258
4259 /* Look up an entry in the stub hash. Stub entries are cached because
4260 creating the stub name takes a bit of time. */
4261
4262 static struct elf32_arm_stub_hash_entry *
4263 elf32_arm_get_stub_entry (const asection *input_section,
4264 const asection *sym_sec,
4265 struct elf_link_hash_entry *hash,
4266 const Elf_Internal_Rela *rel,
4267 struct elf32_arm_link_hash_table *htab,
4268 enum elf32_arm_stub_type stub_type)
4269 {
4270 struct elf32_arm_stub_hash_entry *stub_entry;
4271 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4272 const asection *id_sec;
4273
4274 if ((input_section->flags & SEC_CODE) == 0)
4275 return NULL;
4276
4277 /* If this input section is part of a group of sections sharing one
4278 stub section, then use the id of the first section in the group.
4279 Stub names need to include a section id, as there may well be
4280 more than one stub used to reach say, printf, and we need to
4281 distinguish between them. */
4282 BFD_ASSERT (input_section->id <= htab->top_id);
4283 id_sec = htab->stub_group[input_section->id].link_sec;
4284
4285 if (h != NULL && h->stub_cache != NULL
4286 && h->stub_cache->h == h
4287 && h->stub_cache->id_sec == id_sec
4288 && h->stub_cache->stub_type == stub_type)
4289 {
4290 stub_entry = h->stub_cache;
4291 }
4292 else
4293 {
4294 char *stub_name;
4295
4296 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4297 if (stub_name == NULL)
4298 return NULL;
4299
4300 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4301 stub_name, FALSE, FALSE);
4302 if (h != NULL)
4303 h->stub_cache = stub_entry;
4304
4305 free (stub_name);
4306 }
4307
4308 return stub_entry;
4309 }
4310
4311 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4312 section. */
4313
4314 static bfd_boolean
4315 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4316 {
4317 if (stub_type >= max_stub_type)
4318 abort (); /* Should be unreachable. */
4319
4320 switch (stub_type)
4321 {
4322 case arm_stub_cmse_branch_thumb_only:
4323 return TRUE;
4324
4325 default:
4326 return FALSE;
4327 }
4328
4329 abort (); /* Should be unreachable. */
4330 }
4331
4332 /* Required alignment (as a power of 2) for the dedicated section holding
4333 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4334 with input sections. */
4335
4336 static int
4337 arm_dedicated_stub_output_section_required_alignment
4338 (enum elf32_arm_stub_type stub_type)
4339 {
4340 if (stub_type >= max_stub_type)
4341 abort (); /* Should be unreachable. */
4342
4343 switch (stub_type)
4344 {
4345 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4346 boundary. */
4347 case arm_stub_cmse_branch_thumb_only:
4348 return 5;
4349
4350 default:
4351 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4352 return 0;
4353 }
4354
4355 abort (); /* Should be unreachable. */
4356 }
4357
4358 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4359 NULL if veneers of this type are interspersed with input sections. */
4360
4361 static const char *
4362 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4363 {
4364 if (stub_type >= max_stub_type)
4365 abort (); /* Should be unreachable. */
4366
4367 switch (stub_type)
4368 {
4369 case arm_stub_cmse_branch_thumb_only:
4370 return ".gnu.sgstubs";
4371
4372 default:
4373 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4374 return NULL;
4375 }
4376
4377 abort (); /* Should be unreachable. */
4378 }
4379
4380 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4381 returns the address of the hash table field in HTAB holding a pointer to the
4382 corresponding input section. Otherwise, returns NULL. */
4383
4384 static asection **
4385 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4386 enum elf32_arm_stub_type stub_type)
4387 {
4388 if (stub_type >= max_stub_type)
4389 abort (); /* Should be unreachable. */
4390
4391 switch (stub_type)
4392 {
4393 case arm_stub_cmse_branch_thumb_only:
4394 return &htab->cmse_stub_sec;
4395
4396 default:
4397 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4398 return NULL;
4399 }
4400
4401 abort (); /* Should be unreachable. */
4402 }
4403
4404 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4405 is the section that branch into veneer and can be NULL if stub should go in
4406 a dedicated output section. Returns a pointer to the stub section, and the
4407 section to which the stub section will be attached (in *LINK_SEC_P).
4408 LINK_SEC_P may be NULL. */
4409
4410 static asection *
4411 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4412 struct elf32_arm_link_hash_table *htab,
4413 enum elf32_arm_stub_type stub_type)
4414 {
4415 asection *link_sec, *out_sec, **stub_sec_p;
4416 const char *stub_sec_prefix;
4417 bfd_boolean dedicated_output_section =
4418 arm_dedicated_stub_output_section_required (stub_type);
4419 int align;
4420
4421 if (dedicated_output_section)
4422 {
4423 bfd *output_bfd = htab->obfd;
4424 const char *out_sec_name =
4425 arm_dedicated_stub_output_section_name (stub_type);
4426 link_sec = NULL;
4427 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4428 stub_sec_prefix = out_sec_name;
4429 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4430 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4431 if (out_sec == NULL)
4432 {
4433 (*_bfd_error_handler) (_("No address assigned to the veneers output "
4434 "section %s"), out_sec_name);
4435 return NULL;
4436 }
4437 }
4438 else
4439 {
4440 BFD_ASSERT (section->id <= htab->top_id);
4441 link_sec = htab->stub_group[section->id].link_sec;
4442 BFD_ASSERT (link_sec != NULL);
4443 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4444 if (*stub_sec_p == NULL)
4445 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4446 stub_sec_prefix = link_sec->name;
4447 out_sec = link_sec->output_section;
4448 align = htab->nacl_p ? 4 : 3;
4449 }
4450
4451 if (*stub_sec_p == NULL)
4452 {
4453 size_t namelen;
4454 bfd_size_type len;
4455 char *s_name;
4456
4457 namelen = strlen (stub_sec_prefix);
4458 len = namelen + sizeof (STUB_SUFFIX);
4459 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4460 if (s_name == NULL)
4461 return NULL;
4462
4463 memcpy (s_name, stub_sec_prefix, namelen);
4464 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4465 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4466 align);
4467 if (*stub_sec_p == NULL)
4468 return NULL;
4469
4470 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4471 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4472 | SEC_KEEP;
4473 }
4474
4475 if (!dedicated_output_section)
4476 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4477
4478 if (link_sec_p)
4479 *link_sec_p = link_sec;
4480
4481 return *stub_sec_p;
4482 }
4483
4484 /* Add a new stub entry to the stub hash. Not all fields of the new
4485 stub entry are initialised. */
4486
4487 static struct elf32_arm_stub_hash_entry *
4488 elf32_arm_add_stub (const char *stub_name, asection *section,
4489 struct elf32_arm_link_hash_table *htab,
4490 enum elf32_arm_stub_type stub_type)
4491 {
4492 asection *link_sec;
4493 asection *stub_sec;
4494 struct elf32_arm_stub_hash_entry *stub_entry;
4495
4496 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4497 stub_type);
4498 if (stub_sec == NULL)
4499 return NULL;
4500
4501 /* Enter this entry into the linker stub hash table. */
4502 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4503 TRUE, FALSE);
4504 if (stub_entry == NULL)
4505 {
4506 if (section == NULL)
4507 section = stub_sec;
4508 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4509 section->owner,
4510 stub_name);
4511 return NULL;
4512 }
4513
4514 stub_entry->stub_sec = stub_sec;
4515 stub_entry->stub_offset = (bfd_vma) -1;
4516 stub_entry->id_sec = link_sec;
4517
4518 return stub_entry;
4519 }
4520
4521 /* Store an Arm insn into an output section not processed by
4522 elf32_arm_write_section. */
4523
4524 static void
4525 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4526 bfd * output_bfd, bfd_vma val, void * ptr)
4527 {
4528 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4529 bfd_putl32 (val, ptr);
4530 else
4531 bfd_putb32 (val, ptr);
4532 }
4533
4534 /* Store a 16-bit Thumb insn into an output section not processed by
4535 elf32_arm_write_section. */
4536
4537 static void
4538 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4539 bfd * output_bfd, bfd_vma val, void * ptr)
4540 {
4541 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4542 bfd_putl16 (val, ptr);
4543 else
4544 bfd_putb16 (val, ptr);
4545 }
4546
4547 /* Store a Thumb2 insn into an output section not processed by
4548 elf32_arm_write_section. */
4549
4550 static void
4551 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4552 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4553 {
4554 /* T2 instructions are 16-bit streamed. */
4555 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4556 {
4557 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4558 bfd_putl16 ((val & 0xffff), ptr + 2);
4559 }
4560 else
4561 {
4562 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4563 bfd_putb16 ((val & 0xffff), ptr + 2);
4564 }
4565 }
4566
4567 /* If it's possible to change R_TYPE to a more efficient access
4568 model, return the new reloc type. */
4569
4570 static unsigned
4571 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4572 struct elf_link_hash_entry *h)
4573 {
4574 int is_local = (h == NULL);
4575
4576 if (bfd_link_pic (info)
4577 || (h && h->root.type == bfd_link_hash_undefweak))
4578 return r_type;
4579
4580 /* We do not support relaxations for Old TLS models. */
4581 switch (r_type)
4582 {
4583 case R_ARM_TLS_GOTDESC:
4584 case R_ARM_TLS_CALL:
4585 case R_ARM_THM_TLS_CALL:
4586 case R_ARM_TLS_DESCSEQ:
4587 case R_ARM_THM_TLS_DESCSEQ:
4588 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4589 }
4590
4591 return r_type;
4592 }
4593
4594 static bfd_reloc_status_type elf32_arm_final_link_relocate
4595 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4596 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4597 const char *, unsigned char, enum arm_st_branch_type,
4598 struct elf_link_hash_entry *, bfd_boolean *, char **);
4599
4600 static unsigned int
4601 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4602 {
4603 switch (stub_type)
4604 {
4605 case arm_stub_a8_veneer_b_cond:
4606 case arm_stub_a8_veneer_b:
4607 case arm_stub_a8_veneer_bl:
4608 return 2;
4609
4610 case arm_stub_long_branch_any_any:
4611 case arm_stub_long_branch_v4t_arm_thumb:
4612 case arm_stub_long_branch_thumb_only:
4613 case arm_stub_long_branch_thumb2_only:
4614 case arm_stub_long_branch_thumb2_only_pure:
4615 case arm_stub_long_branch_v4t_thumb_thumb:
4616 case arm_stub_long_branch_v4t_thumb_arm:
4617 case arm_stub_short_branch_v4t_thumb_arm:
4618 case arm_stub_long_branch_any_arm_pic:
4619 case arm_stub_long_branch_any_thumb_pic:
4620 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4621 case arm_stub_long_branch_v4t_arm_thumb_pic:
4622 case arm_stub_long_branch_v4t_thumb_arm_pic:
4623 case arm_stub_long_branch_thumb_only_pic:
4624 case arm_stub_long_branch_any_tls_pic:
4625 case arm_stub_long_branch_v4t_thumb_tls_pic:
4626 case arm_stub_cmse_branch_thumb_only:
4627 case arm_stub_a8_veneer_blx:
4628 return 4;
4629
4630 case arm_stub_long_branch_arm_nacl:
4631 case arm_stub_long_branch_arm_nacl_pic:
4632 return 16;
4633
4634 default:
4635 abort (); /* Should be unreachable. */
4636 }
4637 }
4638
4639 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4640 veneering (TRUE) or have their own symbol (FALSE). */
4641
4642 static bfd_boolean
4643 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4644 {
4645 if (stub_type >= max_stub_type)
4646 abort (); /* Should be unreachable. */
4647
4648 switch (stub_type)
4649 {
4650 case arm_stub_cmse_branch_thumb_only:
4651 return TRUE;
4652
4653 default:
4654 return FALSE;
4655 }
4656
4657 abort (); /* Should be unreachable. */
4658 }
4659
4660 /* Returns the padding needed for the dedicated section used stubs of type
4661 STUB_TYPE. */
4662
4663 static int
4664 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4665 {
4666 if (stub_type >= max_stub_type)
4667 abort (); /* Should be unreachable. */
4668
4669 switch (stub_type)
4670 {
4671 case arm_stub_cmse_branch_thumb_only:
4672 return 32;
4673
4674 default:
4675 return 0;
4676 }
4677
4678 abort (); /* Should be unreachable. */
4679 }
4680
4681 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4682 returns the address of the hash table field in HTAB holding the offset at
4683 which new veneers should be layed out in the stub section. */
4684
4685 static bfd_vma*
4686 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4687 enum elf32_arm_stub_type stub_type)
4688 {
4689 switch (stub_type)
4690 {
4691 case arm_stub_cmse_branch_thumb_only:
4692 return &htab->new_cmse_stub_offset;
4693
4694 default:
4695 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4696 return NULL;
4697 }
4698 }
4699
4700 static bfd_boolean
4701 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4702 void * in_arg)
4703 {
4704 #define MAXRELOCS 3
4705 bfd_boolean removed_sg_veneer;
4706 struct elf32_arm_stub_hash_entry *stub_entry;
4707 struct elf32_arm_link_hash_table *globals;
4708 struct bfd_link_info *info;
4709 asection *stub_sec;
4710 bfd *stub_bfd;
4711 bfd_byte *loc;
4712 bfd_vma sym_value;
4713 int template_size;
4714 int size;
4715 const insn_sequence *template_sequence;
4716 int i;
4717 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4718 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4719 int nrelocs = 0;
4720 int just_allocated = 0;
4721
4722 /* Massage our args to the form they really have. */
4723 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4724 info = (struct bfd_link_info *) in_arg;
4725
4726 globals = elf32_arm_hash_table (info);
4727 if (globals == NULL)
4728 return FALSE;
4729
4730 stub_sec = stub_entry->stub_sec;
4731
4732 if ((globals->fix_cortex_a8 < 0)
4733 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4734 /* We have to do less-strictly-aligned fixes last. */
4735 return TRUE;
4736
4737 /* Assign a slot at the end of section if none assigned yet. */
4738 if (stub_entry->stub_offset == (bfd_vma) -1)
4739 {
4740 stub_entry->stub_offset = stub_sec->size;
4741 just_allocated = 1;
4742 }
4743 loc = stub_sec->contents + stub_entry->stub_offset;
4744
4745 stub_bfd = stub_sec->owner;
4746
4747 /* This is the address of the stub destination. */
4748 sym_value = (stub_entry->target_value
4749 + stub_entry->target_section->output_offset
4750 + stub_entry->target_section->output_section->vma);
4751
4752 template_sequence = stub_entry->stub_template;
4753 template_size = stub_entry->stub_template_size;
4754
4755 size = 0;
4756 for (i = 0; i < template_size; i++)
4757 {
4758 switch (template_sequence[i].type)
4759 {
4760 case THUMB16_TYPE:
4761 {
4762 bfd_vma data = (bfd_vma) template_sequence[i].data;
4763 if (template_sequence[i].reloc_addend != 0)
4764 {
4765 /* We've borrowed the reloc_addend field to mean we should
4766 insert a condition code into this (Thumb-1 branch)
4767 instruction. See THUMB16_BCOND_INSN. */
4768 BFD_ASSERT ((data & 0xff00) == 0xd000);
4769 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4770 }
4771 bfd_put_16 (stub_bfd, data, loc + size);
4772 size += 2;
4773 }
4774 break;
4775
4776 case THUMB32_TYPE:
4777 bfd_put_16 (stub_bfd,
4778 (template_sequence[i].data >> 16) & 0xffff,
4779 loc + size);
4780 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4781 loc + size + 2);
4782 if (template_sequence[i].r_type != R_ARM_NONE)
4783 {
4784 stub_reloc_idx[nrelocs] = i;
4785 stub_reloc_offset[nrelocs++] = size;
4786 }
4787 size += 4;
4788 break;
4789
4790 case ARM_TYPE:
4791 bfd_put_32 (stub_bfd, template_sequence[i].data,
4792 loc + size);
4793 /* Handle cases where the target is encoded within the
4794 instruction. */
4795 if (template_sequence[i].r_type == R_ARM_JUMP24)
4796 {
4797 stub_reloc_idx[nrelocs] = i;
4798 stub_reloc_offset[nrelocs++] = size;
4799 }
4800 size += 4;
4801 break;
4802
4803 case DATA_TYPE:
4804 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4805 stub_reloc_idx[nrelocs] = i;
4806 stub_reloc_offset[nrelocs++] = size;
4807 size += 4;
4808 break;
4809
4810 default:
4811 BFD_FAIL ();
4812 return FALSE;
4813 }
4814 }
4815
4816 if (just_allocated)
4817 stub_sec->size += size;
4818
4819 /* Stub size has already been computed in arm_size_one_stub. Check
4820 consistency. */
4821 BFD_ASSERT (size == stub_entry->stub_size);
4822
4823 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4824 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4825 sym_value |= 1;
4826
4827 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4828 to relocate in each stub. */
4829 removed_sg_veneer =
4830 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4831 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4832
4833 for (i = 0; i < nrelocs; i++)
4834 {
4835 Elf_Internal_Rela rel;
4836 bfd_boolean unresolved_reloc;
4837 char *error_message;
4838 bfd_vma points_to =
4839 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4840
4841 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4842 rel.r_info = ELF32_R_INFO (0,
4843 template_sequence[stub_reloc_idx[i]].r_type);
4844 rel.r_addend = 0;
4845
4846 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4847 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4848 template should refer back to the instruction after the original
4849 branch. We use target_section as Cortex-A8 erratum workaround stubs
4850 are only generated when both source and target are in the same
4851 section. */
4852 points_to = stub_entry->target_section->output_section->vma
4853 + stub_entry->target_section->output_offset
4854 + stub_entry->source_value;
4855
4856 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4857 (template_sequence[stub_reloc_idx[i]].r_type),
4858 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4859 points_to, info, stub_entry->target_section, "", STT_FUNC,
4860 stub_entry->branch_type,
4861 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4862 &error_message);
4863 }
4864
4865 return TRUE;
4866 #undef MAXRELOCS
4867 }
4868
4869 /* Calculate the template, template size and instruction size for a stub.
4870 Return value is the instruction size. */
4871
4872 static unsigned int
4873 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4874 const insn_sequence **stub_template,
4875 int *stub_template_size)
4876 {
4877 const insn_sequence *template_sequence = NULL;
4878 int template_size = 0, i;
4879 unsigned int size;
4880
4881 template_sequence = stub_definitions[stub_type].template_sequence;
4882 if (stub_template)
4883 *stub_template = template_sequence;
4884
4885 template_size = stub_definitions[stub_type].template_size;
4886 if (stub_template_size)
4887 *stub_template_size = template_size;
4888
4889 size = 0;
4890 for (i = 0; i < template_size; i++)
4891 {
4892 switch (template_sequence[i].type)
4893 {
4894 case THUMB16_TYPE:
4895 size += 2;
4896 break;
4897
4898 case ARM_TYPE:
4899 case THUMB32_TYPE:
4900 case DATA_TYPE:
4901 size += 4;
4902 break;
4903
4904 default:
4905 BFD_FAIL ();
4906 return 0;
4907 }
4908 }
4909
4910 return size;
4911 }
4912
4913 /* As above, but don't actually build the stub. Just bump offset so
4914 we know stub section sizes. */
4915
4916 static bfd_boolean
4917 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4918 void *in_arg ATTRIBUTE_UNUSED)
4919 {
4920 struct elf32_arm_stub_hash_entry *stub_entry;
4921 const insn_sequence *template_sequence;
4922 int template_size, size;
4923
4924 /* Massage our args to the form they really have. */
4925 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4926
4927 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4928 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4929
4930 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4931 &template_size);
4932
4933 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4934 if (stub_entry->stub_template_size)
4935 {
4936 stub_entry->stub_size = size;
4937 stub_entry->stub_template = template_sequence;
4938 stub_entry->stub_template_size = template_size;
4939 }
4940
4941 /* Already accounted for. */
4942 if (stub_entry->stub_offset != (bfd_vma) -1)
4943 return TRUE;
4944
4945 size = (size + 7) & ~7;
4946 stub_entry->stub_sec->size += size;
4947
4948 return TRUE;
4949 }
4950
4951 /* External entry points for sizing and building linker stubs. */
4952
4953 /* Set up various things so that we can make a list of input sections
4954 for each output section included in the link. Returns -1 on error,
4955 0 when no stubs will be needed, and 1 on success. */
4956
4957 int
4958 elf32_arm_setup_section_lists (bfd *output_bfd,
4959 struct bfd_link_info *info)
4960 {
4961 bfd *input_bfd;
4962 unsigned int bfd_count;
4963 unsigned int top_id, top_index;
4964 asection *section;
4965 asection **input_list, **list;
4966 bfd_size_type amt;
4967 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4968
4969 if (htab == NULL)
4970 return 0;
4971 if (! is_elf_hash_table (htab))
4972 return 0;
4973
4974 /* Count the number of input BFDs and find the top input section id. */
4975 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4976 input_bfd != NULL;
4977 input_bfd = input_bfd->link.next)
4978 {
4979 bfd_count += 1;
4980 for (section = input_bfd->sections;
4981 section != NULL;
4982 section = section->next)
4983 {
4984 if (top_id < section->id)
4985 top_id = section->id;
4986 }
4987 }
4988 htab->bfd_count = bfd_count;
4989
4990 amt = sizeof (struct map_stub) * (top_id + 1);
4991 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4992 if (htab->stub_group == NULL)
4993 return -1;
4994 htab->top_id = top_id;
4995
4996 /* We can't use output_bfd->section_count here to find the top output
4997 section index as some sections may have been removed, and
4998 _bfd_strip_section_from_output doesn't renumber the indices. */
4999 for (section = output_bfd->sections, top_index = 0;
5000 section != NULL;
5001 section = section->next)
5002 {
5003 if (top_index < section->index)
5004 top_index = section->index;
5005 }
5006
5007 htab->top_index = top_index;
5008 amt = sizeof (asection *) * (top_index + 1);
5009 input_list = (asection **) bfd_malloc (amt);
5010 htab->input_list = input_list;
5011 if (input_list == NULL)
5012 return -1;
5013
5014 /* For sections we aren't interested in, mark their entries with a
5015 value we can check later. */
5016 list = input_list + top_index;
5017 do
5018 *list = bfd_abs_section_ptr;
5019 while (list-- != input_list);
5020
5021 for (section = output_bfd->sections;
5022 section != NULL;
5023 section = section->next)
5024 {
5025 if ((section->flags & SEC_CODE) != 0)
5026 input_list[section->index] = NULL;
5027 }
5028
5029 return 1;
5030 }
5031
5032 /* The linker repeatedly calls this function for each input section,
5033 in the order that input sections are linked into output sections.
5034 Build lists of input sections to determine groupings between which
5035 we may insert linker stubs. */
5036
5037 void
5038 elf32_arm_next_input_section (struct bfd_link_info *info,
5039 asection *isec)
5040 {
5041 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5042
5043 if (htab == NULL)
5044 return;
5045
5046 if (isec->output_section->index <= htab->top_index)
5047 {
5048 asection **list = htab->input_list + isec->output_section->index;
5049
5050 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5051 {
5052 /* Steal the link_sec pointer for our list. */
5053 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5054 /* This happens to make the list in reverse order,
5055 which we reverse later. */
5056 PREV_SEC (isec) = *list;
5057 *list = isec;
5058 }
5059 }
5060 }
5061
5062 /* See whether we can group stub sections together. Grouping stub
5063 sections may result in fewer stubs. More importantly, we need to
5064 put all .init* and .fini* stubs at the end of the .init or
5065 .fini output sections respectively, because glibc splits the
5066 _init and _fini functions into multiple parts. Putting a stub in
5067 the middle of a function is not a good idea. */
5068
5069 static void
5070 group_sections (struct elf32_arm_link_hash_table *htab,
5071 bfd_size_type stub_group_size,
5072 bfd_boolean stubs_always_after_branch)
5073 {
5074 asection **list = htab->input_list;
5075
5076 do
5077 {
5078 asection *tail = *list;
5079 asection *head;
5080
5081 if (tail == bfd_abs_section_ptr)
5082 continue;
5083
5084 /* Reverse the list: we must avoid placing stubs at the
5085 beginning of the section because the beginning of the text
5086 section may be required for an interrupt vector in bare metal
5087 code. */
5088 #define NEXT_SEC PREV_SEC
5089 head = NULL;
5090 while (tail != NULL)
5091 {
5092 /* Pop from tail. */
5093 asection *item = tail;
5094 tail = PREV_SEC (item);
5095
5096 /* Push on head. */
5097 NEXT_SEC (item) = head;
5098 head = item;
5099 }
5100
5101 while (head != NULL)
5102 {
5103 asection *curr;
5104 asection *next;
5105 bfd_vma stub_group_start = head->output_offset;
5106 bfd_vma end_of_next;
5107
5108 curr = head;
5109 while (NEXT_SEC (curr) != NULL)
5110 {
5111 next = NEXT_SEC (curr);
5112 end_of_next = next->output_offset + next->size;
5113 if (end_of_next - stub_group_start >= stub_group_size)
5114 /* End of NEXT is too far from start, so stop. */
5115 break;
5116 /* Add NEXT to the group. */
5117 curr = next;
5118 }
5119
5120 /* OK, the size from the start to the start of CURR is less
5121 than stub_group_size and thus can be handled by one stub
5122 section. (Or the head section is itself larger than
5123 stub_group_size, in which case we may be toast.)
5124 We should really be keeping track of the total size of
5125 stubs added here, as stubs contribute to the final output
5126 section size. */
5127 do
5128 {
5129 next = NEXT_SEC (head);
5130 /* Set up this stub group. */
5131 htab->stub_group[head->id].link_sec = curr;
5132 }
5133 while (head != curr && (head = next) != NULL);
5134
5135 /* But wait, there's more! Input sections up to stub_group_size
5136 bytes after the stub section can be handled by it too. */
5137 if (!stubs_always_after_branch)
5138 {
5139 stub_group_start = curr->output_offset + curr->size;
5140
5141 while (next != NULL)
5142 {
5143 end_of_next = next->output_offset + next->size;
5144 if (end_of_next - stub_group_start >= stub_group_size)
5145 /* End of NEXT is too far from stubs, so stop. */
5146 break;
5147 /* Add NEXT to the stub group. */
5148 head = next;
5149 next = NEXT_SEC (head);
5150 htab->stub_group[head->id].link_sec = curr;
5151 }
5152 }
5153 head = next;
5154 }
5155 }
5156 while (list++ != htab->input_list + htab->top_index);
5157
5158 free (htab->input_list);
5159 #undef PREV_SEC
5160 #undef NEXT_SEC
5161 }
5162
5163 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5164 erratum fix. */
5165
5166 static int
5167 a8_reloc_compare (const void *a, const void *b)
5168 {
5169 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5170 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5171
5172 if (ra->from < rb->from)
5173 return -1;
5174 else if (ra->from > rb->from)
5175 return 1;
5176 else
5177 return 0;
5178 }
5179
5180 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5181 const char *, char **);
5182
5183 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5184 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5185 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5186 otherwise. */
5187
5188 static bfd_boolean
5189 cortex_a8_erratum_scan (bfd *input_bfd,
5190 struct bfd_link_info *info,
5191 struct a8_erratum_fix **a8_fixes_p,
5192 unsigned int *num_a8_fixes_p,
5193 unsigned int *a8_fix_table_size_p,
5194 struct a8_erratum_reloc *a8_relocs,
5195 unsigned int num_a8_relocs,
5196 unsigned prev_num_a8_fixes,
5197 bfd_boolean *stub_changed_p)
5198 {
5199 asection *section;
5200 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5201 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5202 unsigned int num_a8_fixes = *num_a8_fixes_p;
5203 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5204
5205 if (htab == NULL)
5206 return FALSE;
5207
5208 for (section = input_bfd->sections;
5209 section != NULL;
5210 section = section->next)
5211 {
5212 bfd_byte *contents = NULL;
5213 struct _arm_elf_section_data *sec_data;
5214 unsigned int span;
5215 bfd_vma base_vma;
5216
5217 if (elf_section_type (section) != SHT_PROGBITS
5218 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5219 || (section->flags & SEC_EXCLUDE) != 0
5220 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5221 || (section->output_section == bfd_abs_section_ptr))
5222 continue;
5223
5224 base_vma = section->output_section->vma + section->output_offset;
5225
5226 if (elf_section_data (section)->this_hdr.contents != NULL)
5227 contents = elf_section_data (section)->this_hdr.contents;
5228 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5229 return TRUE;
5230
5231 sec_data = elf32_arm_section_data (section);
5232
5233 for (span = 0; span < sec_data->mapcount; span++)
5234 {
5235 unsigned int span_start = sec_data->map[span].vma;
5236 unsigned int span_end = (span == sec_data->mapcount - 1)
5237 ? section->size : sec_data->map[span + 1].vma;
5238 unsigned int i;
5239 char span_type = sec_data->map[span].type;
5240 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5241
5242 if (span_type != 't')
5243 continue;
5244
5245 /* Span is entirely within a single 4KB region: skip scanning. */
5246 if (((base_vma + span_start) & ~0xfff)
5247 == ((base_vma + span_end) & ~0xfff))
5248 continue;
5249
5250 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5251
5252 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5253 * The branch target is in the same 4KB region as the
5254 first half of the branch.
5255 * The instruction before the branch is a 32-bit
5256 length non-branch instruction. */
5257 for (i = span_start; i < span_end;)
5258 {
5259 unsigned int insn = bfd_getl16 (&contents[i]);
5260 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5261 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5262
5263 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5264 insn_32bit = TRUE;
5265
5266 if (insn_32bit)
5267 {
5268 /* Load the rest of the insn (in manual-friendly order). */
5269 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5270
5271 /* Encoding T4: B<c>.W. */
5272 is_b = (insn & 0xf800d000) == 0xf0009000;
5273 /* Encoding T1: BL<c>.W. */
5274 is_bl = (insn & 0xf800d000) == 0xf000d000;
5275 /* Encoding T2: BLX<c>.W. */
5276 is_blx = (insn & 0xf800d000) == 0xf000c000;
5277 /* Encoding T3: B<c>.W (not permitted in IT block). */
5278 is_bcc = (insn & 0xf800d000) == 0xf0008000
5279 && (insn & 0x07f00000) != 0x03800000;
5280 }
5281
5282 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5283
5284 if (((base_vma + i) & 0xfff) == 0xffe
5285 && insn_32bit
5286 && is_32bit_branch
5287 && last_was_32bit
5288 && ! last_was_branch)
5289 {
5290 bfd_signed_vma offset = 0;
5291 bfd_boolean force_target_arm = FALSE;
5292 bfd_boolean force_target_thumb = FALSE;
5293 bfd_vma target;
5294 enum elf32_arm_stub_type stub_type = arm_stub_none;
5295 struct a8_erratum_reloc key, *found;
5296 bfd_boolean use_plt = FALSE;
5297
5298 key.from = base_vma + i;
5299 found = (struct a8_erratum_reloc *)
5300 bsearch (&key, a8_relocs, num_a8_relocs,
5301 sizeof (struct a8_erratum_reloc),
5302 &a8_reloc_compare);
5303
5304 if (found)
5305 {
5306 char *error_message = NULL;
5307 struct elf_link_hash_entry *entry;
5308
5309 /* We don't care about the error returned from this
5310 function, only if there is glue or not. */
5311 entry = find_thumb_glue (info, found->sym_name,
5312 &error_message);
5313
5314 if (entry)
5315 found->non_a8_stub = TRUE;
5316
5317 /* Keep a simpler condition, for the sake of clarity. */
5318 if (htab->root.splt != NULL && found->hash != NULL
5319 && found->hash->root.plt.offset != (bfd_vma) -1)
5320 use_plt = TRUE;
5321
5322 if (found->r_type == R_ARM_THM_CALL)
5323 {
5324 if (found->branch_type == ST_BRANCH_TO_ARM
5325 || use_plt)
5326 force_target_arm = TRUE;
5327 else
5328 force_target_thumb = TRUE;
5329 }
5330 }
5331
5332 /* Check if we have an offending branch instruction. */
5333
5334 if (found && found->non_a8_stub)
5335 /* We've already made a stub for this instruction, e.g.
5336 it's a long branch or a Thumb->ARM stub. Assume that
5337 stub will suffice to work around the A8 erratum (see
5338 setting of always_after_branch above). */
5339 ;
5340 else if (is_bcc)
5341 {
5342 offset = (insn & 0x7ff) << 1;
5343 offset |= (insn & 0x3f0000) >> 4;
5344 offset |= (insn & 0x2000) ? 0x40000 : 0;
5345 offset |= (insn & 0x800) ? 0x80000 : 0;
5346 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5347 if (offset & 0x100000)
5348 offset |= ~ ((bfd_signed_vma) 0xfffff);
5349 stub_type = arm_stub_a8_veneer_b_cond;
5350 }
5351 else if (is_b || is_bl || is_blx)
5352 {
5353 int s = (insn & 0x4000000) != 0;
5354 int j1 = (insn & 0x2000) != 0;
5355 int j2 = (insn & 0x800) != 0;
5356 int i1 = !(j1 ^ s);
5357 int i2 = !(j2 ^ s);
5358
5359 offset = (insn & 0x7ff) << 1;
5360 offset |= (insn & 0x3ff0000) >> 4;
5361 offset |= i2 << 22;
5362 offset |= i1 << 23;
5363 offset |= s << 24;
5364 if (offset & 0x1000000)
5365 offset |= ~ ((bfd_signed_vma) 0xffffff);
5366
5367 if (is_blx)
5368 offset &= ~ ((bfd_signed_vma) 3);
5369
5370 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5371 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5372 }
5373
5374 if (stub_type != arm_stub_none)
5375 {
5376 bfd_vma pc_for_insn = base_vma + i + 4;
5377
5378 /* The original instruction is a BL, but the target is
5379 an ARM instruction. If we were not making a stub,
5380 the BL would have been converted to a BLX. Use the
5381 BLX stub instead in that case. */
5382 if (htab->use_blx && force_target_arm
5383 && stub_type == arm_stub_a8_veneer_bl)
5384 {
5385 stub_type = arm_stub_a8_veneer_blx;
5386 is_blx = TRUE;
5387 is_bl = FALSE;
5388 }
5389 /* Conversely, if the original instruction was
5390 BLX but the target is Thumb mode, use the BL
5391 stub. */
5392 else if (force_target_thumb
5393 && stub_type == arm_stub_a8_veneer_blx)
5394 {
5395 stub_type = arm_stub_a8_veneer_bl;
5396 is_blx = FALSE;
5397 is_bl = TRUE;
5398 }
5399
5400 if (is_blx)
5401 pc_for_insn &= ~ ((bfd_vma) 3);
5402
5403 /* If we found a relocation, use the proper destination,
5404 not the offset in the (unrelocated) instruction.
5405 Note this is always done if we switched the stub type
5406 above. */
5407 if (found)
5408 offset =
5409 (bfd_signed_vma) (found->destination - pc_for_insn);
5410
5411 /* If the stub will use a Thumb-mode branch to a
5412 PLT target, redirect it to the preceding Thumb
5413 entry point. */
5414 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5415 offset -= PLT_THUMB_STUB_SIZE;
5416
5417 target = pc_for_insn + offset;
5418
5419 /* The BLX stub is ARM-mode code. Adjust the offset to
5420 take the different PC value (+8 instead of +4) into
5421 account. */
5422 if (stub_type == arm_stub_a8_veneer_blx)
5423 offset += 4;
5424
5425 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5426 {
5427 char *stub_name = NULL;
5428
5429 if (num_a8_fixes == a8_fix_table_size)
5430 {
5431 a8_fix_table_size *= 2;
5432 a8_fixes = (struct a8_erratum_fix *)
5433 bfd_realloc (a8_fixes,
5434 sizeof (struct a8_erratum_fix)
5435 * a8_fix_table_size);
5436 }
5437
5438 if (num_a8_fixes < prev_num_a8_fixes)
5439 {
5440 /* If we're doing a subsequent scan,
5441 check if we've found the same fix as
5442 before, and try and reuse the stub
5443 name. */
5444 stub_name = a8_fixes[num_a8_fixes].stub_name;
5445 if ((a8_fixes[num_a8_fixes].section != section)
5446 || (a8_fixes[num_a8_fixes].offset != i))
5447 {
5448 free (stub_name);
5449 stub_name = NULL;
5450 *stub_changed_p = TRUE;
5451 }
5452 }
5453
5454 if (!stub_name)
5455 {
5456 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5457 if (stub_name != NULL)
5458 sprintf (stub_name, "%x:%x", section->id, i);
5459 }
5460
5461 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5462 a8_fixes[num_a8_fixes].section = section;
5463 a8_fixes[num_a8_fixes].offset = i;
5464 a8_fixes[num_a8_fixes].target_offset =
5465 target - base_vma;
5466 a8_fixes[num_a8_fixes].orig_insn = insn;
5467 a8_fixes[num_a8_fixes].stub_name = stub_name;
5468 a8_fixes[num_a8_fixes].stub_type = stub_type;
5469 a8_fixes[num_a8_fixes].branch_type =
5470 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5471
5472 num_a8_fixes++;
5473 }
5474 }
5475 }
5476
5477 i += insn_32bit ? 4 : 2;
5478 last_was_32bit = insn_32bit;
5479 last_was_branch = is_32bit_branch;
5480 }
5481 }
5482
5483 if (elf_section_data (section)->this_hdr.contents == NULL)
5484 free (contents);
5485 }
5486
5487 *a8_fixes_p = a8_fixes;
5488 *num_a8_fixes_p = num_a8_fixes;
5489 *a8_fix_table_size_p = a8_fix_table_size;
5490
5491 return FALSE;
5492 }
5493
5494 /* Create or update a stub entry depending on whether the stub can already be
5495 found in HTAB. The stub is identified by:
5496 - its type STUB_TYPE
5497 - its source branch (note that several can share the same stub) whose
5498 section and relocation (if any) are given by SECTION and IRELA
5499 respectively
5500 - its target symbol whose input section, hash, name, value and branch type
5501 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5502 respectively
5503
5504 If found, the value of the stub's target symbol is updated from SYM_VALUE
5505 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5506 TRUE and the stub entry is initialized.
5507
5508 Returns the stub that was created or updated, or NULL if an error
5509 occurred. */
5510
5511 static struct elf32_arm_stub_hash_entry *
5512 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5513 enum elf32_arm_stub_type stub_type, asection *section,
5514 Elf_Internal_Rela *irela, asection *sym_sec,
5515 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5516 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5517 bfd_boolean *new_stub)
5518 {
5519 const asection *id_sec;
5520 char *stub_name;
5521 struct elf32_arm_stub_hash_entry *stub_entry;
5522 unsigned int r_type;
5523 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5524
5525 BFD_ASSERT (stub_type != arm_stub_none);
5526 *new_stub = FALSE;
5527
5528 if (sym_claimed)
5529 stub_name = sym_name;
5530 else
5531 {
5532 BFD_ASSERT (irela);
5533 BFD_ASSERT (section);
5534 BFD_ASSERT (section->id <= htab->top_id);
5535
5536 /* Support for grouping stub sections. */
5537 id_sec = htab->stub_group[section->id].link_sec;
5538
5539 /* Get the name of this stub. */
5540 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5541 stub_type);
5542 if (!stub_name)
5543 return NULL;
5544 }
5545
5546 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5547 FALSE);
5548 /* The proper stub has already been created, just update its value. */
5549 if (stub_entry != NULL)
5550 {
5551 if (!sym_claimed)
5552 free (stub_name);
5553 stub_entry->target_value = sym_value;
5554 return stub_entry;
5555 }
5556
5557 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5558 if (stub_entry == NULL)
5559 {
5560 if (!sym_claimed)
5561 free (stub_name);
5562 return NULL;
5563 }
5564
5565 stub_entry->target_value = sym_value;
5566 stub_entry->target_section = sym_sec;
5567 stub_entry->stub_type = stub_type;
5568 stub_entry->h = hash;
5569 stub_entry->branch_type = branch_type;
5570
5571 if (sym_claimed)
5572 stub_entry->output_name = sym_name;
5573 else
5574 {
5575 if (sym_name == NULL)
5576 sym_name = "unnamed";
5577 stub_entry->output_name = (char *)
5578 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5579 + strlen (sym_name));
5580 if (stub_entry->output_name == NULL)
5581 {
5582 free (stub_name);
5583 return NULL;
5584 }
5585
5586 /* For historical reasons, use the existing names for ARM-to-Thumb and
5587 Thumb-to-ARM stubs. */
5588 r_type = ELF32_R_TYPE (irela->r_info);
5589 if ((r_type == (unsigned int) R_ARM_THM_CALL
5590 || r_type == (unsigned int) R_ARM_THM_JUMP24
5591 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5592 && branch_type == ST_BRANCH_TO_ARM)
5593 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5594 else if ((r_type == (unsigned int) R_ARM_CALL
5595 || r_type == (unsigned int) R_ARM_JUMP24)
5596 && branch_type == ST_BRANCH_TO_THUMB)
5597 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5598 else
5599 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5600 }
5601
5602 *new_stub = TRUE;
5603 return stub_entry;
5604 }
5605
5606 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5607 gateway veneer to transition from non secure to secure state and create them
5608 accordingly.
5609
5610 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5611 defines the conditions that govern Secure Gateway veneer creation for a
5612 given symbol <SYM> as follows:
5613 - it has function type
5614 - it has non local binding
5615 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5616 same type, binding and value as <SYM> (called normal symbol).
5617 An entry function can handle secure state transition itself in which case
5618 its special symbol would have a different value from the normal symbol.
5619
5620 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5621 entry mapping while HTAB gives the name to hash entry mapping.
5622 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5623 created.
5624
5625 The return value gives whether a stub failed to be allocated. */
5626
5627 static bfd_boolean
5628 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5629 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5630 int *cmse_stub_created)
5631 {
5632 const struct elf_backend_data *bed;
5633 Elf_Internal_Shdr *symtab_hdr;
5634 unsigned i, j, sym_count, ext_start;
5635 Elf_Internal_Sym *cmse_sym, *local_syms;
5636 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5637 enum arm_st_branch_type branch_type;
5638 char *sym_name, *lsym_name;
5639 bfd_vma sym_value;
5640 asection *section;
5641 struct elf32_arm_stub_hash_entry *stub_entry;
5642 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5643
5644 bed = get_elf_backend_data (input_bfd);
5645 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5646 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5647 ext_start = symtab_hdr->sh_info;
5648 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5649 && out_attr[Tag_CPU_arch_profile].i == 'M');
5650
5651 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5652 if (local_syms == NULL)
5653 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5654 symtab_hdr->sh_info, 0, NULL, NULL,
5655 NULL);
5656 if (symtab_hdr->sh_info && local_syms == NULL)
5657 return FALSE;
5658
5659 /* Scan symbols. */
5660 for (i = 0; i < sym_count; i++)
5661 {
5662 cmse_invalid = FALSE;
5663
5664 if (i < ext_start)
5665 {
5666 cmse_sym = &local_syms[i];
5667 /* Not a special symbol. */
5668 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5669 continue;
5670 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5671 symtab_hdr->sh_link,
5672 cmse_sym->st_name);
5673 /* Special symbol with local binding. */
5674 cmse_invalid = TRUE;
5675 }
5676 else
5677 {
5678 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5679 sym_name = (char *) cmse_hash->root.root.root.string;
5680
5681 /* Not a special symbol. */
5682 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5683 continue;
5684
5685 /* Special symbol has incorrect binding or type. */
5686 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5687 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5688 || cmse_hash->root.type != STT_FUNC)
5689 cmse_invalid = TRUE;
5690 }
5691
5692 if (!is_v8m)
5693 {
5694 (*_bfd_error_handler) (_("%B: Special symbol `%s' only allowed for "
5695 "ARMv8-M architecture or later."),
5696 input_bfd, sym_name);
5697 is_v8m = TRUE; /* Avoid multiple warning. */
5698 ret = FALSE;
5699 }
5700
5701 if (cmse_invalid)
5702 {
5703 (*_bfd_error_handler) (_("%B: invalid special symbol `%s'."),
5704 input_bfd, sym_name);
5705 (*_bfd_error_handler) (_("It must be a global or weak function "
5706 "symbol."));
5707 ret = FALSE;
5708 if (i < ext_start)
5709 continue;
5710 }
5711
5712 sym_name += strlen (CMSE_PREFIX);
5713 hash = (struct elf32_arm_link_hash_entry *)
5714 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5715
5716 /* No associated normal symbol or it is neither global nor weak. */
5717 if (!hash
5718 || (hash->root.root.type != bfd_link_hash_defined
5719 && hash->root.root.type != bfd_link_hash_defweak)
5720 || hash->root.type != STT_FUNC)
5721 {
5722 /* Initialize here to avoid warning about use of possibly
5723 uninitialized variable. */
5724 j = 0;
5725
5726 if (!hash)
5727 {
5728 /* Searching for a normal symbol with local binding. */
5729 for (; j < ext_start; j++)
5730 {
5731 lsym_name =
5732 bfd_elf_string_from_elf_section (input_bfd,
5733 symtab_hdr->sh_link,
5734 local_syms[j].st_name);
5735 if (!strcmp (sym_name, lsym_name))
5736 break;
5737 }
5738 }
5739
5740 if (hash || j < ext_start)
5741 {
5742 (*_bfd_error_handler)
5743 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5744 (*_bfd_error_handler)
5745 (_("It must be a global or weak function symbol."));
5746 }
5747 else
5748 (*_bfd_error_handler)
5749 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5750 ret = FALSE;
5751 if (!hash)
5752 continue;
5753 }
5754
5755 sym_value = hash->root.root.u.def.value;
5756 section = hash->root.root.u.def.section;
5757
5758 if (cmse_hash->root.root.u.def.section != section)
5759 {
5760 (*_bfd_error_handler)
5761 (_("%B: `%s' and its special symbol are in different sections."),
5762 input_bfd, sym_name);
5763 ret = FALSE;
5764 }
5765 if (cmse_hash->root.root.u.def.value != sym_value)
5766 continue; /* Ignore: could be an entry function starting with SG. */
5767
5768 /* If this section is a link-once section that will be discarded, then
5769 don't create any stubs. */
5770 if (section->output_section == NULL)
5771 {
5772 (*_bfd_error_handler)
5773 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5774 continue;
5775 }
5776
5777 if (hash->root.size == 0)
5778 {
5779 (*_bfd_error_handler)
5780 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5781 ret = FALSE;
5782 }
5783
5784 if (!ret)
5785 continue;
5786 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5787 stub_entry
5788 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5789 NULL, NULL, section, hash, sym_name,
5790 sym_value, branch_type, &new_stub);
5791
5792 if (stub_entry == NULL)
5793 ret = FALSE;
5794 else
5795 {
5796 BFD_ASSERT (new_stub);
5797 (*cmse_stub_created)++;
5798 }
5799 }
5800
5801 if (!symtab_hdr->contents)
5802 free (local_syms);
5803 return ret;
5804 }
5805
5806 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5807 code entry function, ie can be called from non secure code without using a
5808 veneer. */
5809
5810 static bfd_boolean
5811 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5812 {
5813 bfd_byte contents[4];
5814 uint32_t first_insn;
5815 asection *section;
5816 file_ptr offset;
5817 bfd *abfd;
5818
5819 /* Defined symbol of function type. */
5820 if (hash->root.root.type != bfd_link_hash_defined
5821 && hash->root.root.type != bfd_link_hash_defweak)
5822 return FALSE;
5823 if (hash->root.type != STT_FUNC)
5824 return FALSE;
5825
5826 /* Read first instruction. */
5827 section = hash->root.root.u.def.section;
5828 abfd = section->owner;
5829 offset = hash->root.root.u.def.value - section->vma;
5830 if (!bfd_get_section_contents (abfd, section, contents, offset,
5831 sizeof (contents)))
5832 return FALSE;
5833
5834 first_insn = bfd_get_32 (abfd, contents);
5835
5836 /* Starts by SG instruction. */
5837 return first_insn == 0xe97fe97f;
5838 }
5839
5840 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5841 secure gateway veneers (ie. the veneers was not in the input import library)
5842 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5843
5844 static bfd_boolean
5845 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5846 {
5847 struct elf32_arm_stub_hash_entry *stub_entry;
5848 struct bfd_link_info *info;
5849
5850 /* Massage our args to the form they really have. */
5851 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5852 info = (struct bfd_link_info *) gen_info;
5853
5854 if (info->out_implib_bfd)
5855 return TRUE;
5856
5857 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5858 return TRUE;
5859
5860 if (stub_entry->stub_offset == (bfd_vma) -1)
5861 (*_bfd_error_handler) (" %s", stub_entry->output_name);
5862
5863 return TRUE;
5864 }
5865
5866 /* Set offset of each secure gateway veneers so that its address remain
5867 identical to the one in the input import library referred by
5868 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5869 (present in input import library but absent from the executable being
5870 linked) or if new veneers appeared and there is no output import library
5871 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5872 number of secure gateway veneers found in the input import library.
5873
5874 The function returns whether an error occurred. If no error occurred,
5875 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5876 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5877 veneer observed set for new veneers to be layed out after. */
5878
5879 static bfd_boolean
5880 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5881 struct elf32_arm_link_hash_table *htab,
5882 int *cmse_stub_created)
5883 {
5884 long symsize;
5885 char *sym_name;
5886 flagword flags;
5887 long i, symcount;
5888 bfd *in_implib_bfd;
5889 asection *stub_out_sec;
5890 bfd_boolean ret = TRUE;
5891 Elf_Internal_Sym *intsym;
5892 const char *out_sec_name;
5893 bfd_size_type cmse_stub_size;
5894 asymbol **sympp = NULL, *sym;
5895 struct elf32_arm_link_hash_entry *hash;
5896 const insn_sequence *cmse_stub_template;
5897 struct elf32_arm_stub_hash_entry *stub_entry;
5898 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5899 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5900 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5901
5902 /* No input secure gateway import library. */
5903 if (!htab->in_implib_bfd)
5904 return TRUE;
5905
5906 in_implib_bfd = htab->in_implib_bfd;
5907 if (!htab->cmse_implib)
5908 {
5909 (*_bfd_error_handler) (_("%B: --in-implib only supported for Secure "
5910 "Gateway import libraries."), in_implib_bfd);
5911 return FALSE;
5912 }
5913
5914 /* Get symbol table size. */
5915 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5916 if (symsize < 0)
5917 return FALSE;
5918
5919 /* Read in the input secure gateway import library's symbol table. */
5920 sympp = (asymbol **) xmalloc (symsize);
5921 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5922 if (symcount < 0)
5923 {
5924 ret = FALSE;
5925 goto free_sym_buf;
5926 }
5927
5928 htab->new_cmse_stub_offset = 0;
5929 cmse_stub_size =
5930 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5931 &cmse_stub_template,
5932 &cmse_stub_template_size);
5933 out_sec_name =
5934 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5935 stub_out_sec =
5936 bfd_get_section_by_name (htab->obfd, out_sec_name);
5937 if (stub_out_sec != NULL)
5938 cmse_stub_sec_vma = stub_out_sec->vma;
5939
5940 /* Set addresses of veneers mentionned in input secure gateway import
5941 library's symbol table. */
5942 for (i = 0; i < symcount; i++)
5943 {
5944 sym = sympp[i];
5945 flags = sym->flags;
5946 sym_name = (char *) bfd_asymbol_name (sym);
5947 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5948
5949 if (sym->section != bfd_abs_section_ptr
5950 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5951 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5952 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5953 != ST_BRANCH_TO_THUMB))
5954 {
5955 (*_bfd_error_handler) (_("%B: invalid import library entry: `%s'."),
5956 in_implib_bfd, sym_name);
5957 (*_bfd_error_handler) (_("Symbol should be absolute, global and "
5958 "refer to Thumb functions."));
5959 ret = FALSE;
5960 continue;
5961 }
5962
5963 veneer_value = bfd_asymbol_value (sym);
5964 stub_offset = veneer_value - cmse_stub_sec_vma;
5965 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5966 FALSE, FALSE);
5967 hash = (struct elf32_arm_link_hash_entry *)
5968 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5969
5970 /* Stub entry should have been created by cmse_scan or the symbol be of
5971 a secure function callable from non secure code. */
5972 if (!stub_entry && !hash)
5973 {
5974 bfd_boolean new_stub;
5975
5976 (*_bfd_error_handler)
5977 (_("Entry function `%s' disappeared from secure code."), sym_name);
5978 hash = (struct elf32_arm_link_hash_entry *)
5979 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5980 stub_entry
5981 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5982 NULL, NULL, bfd_abs_section_ptr, hash,
5983 sym_name, veneer_value,
5984 ST_BRANCH_TO_THUMB, &new_stub);
5985 if (stub_entry == NULL)
5986 ret = FALSE;
5987 else
5988 {
5989 BFD_ASSERT (new_stub);
5990 new_cmse_stubs_created++;
5991 (*cmse_stub_created)++;
5992 }
5993 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5994 stub_entry->stub_offset = stub_offset;
5995 }
5996 /* Symbol found is not callable from non secure code. */
5997 else if (!stub_entry)
5998 {
5999 if (!cmse_entry_fct_p (hash))
6000 {
6001 (*_bfd_error_handler) (_("`%s' refers to a non entry function."),
6002 sym_name);
6003 ret = FALSE;
6004 }
6005 continue;
6006 }
6007 else
6008 {
6009 /* Only stubs for SG veneers should have been created. */
6010 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6011
6012 /* Check visibility hasn't changed. */
6013 if (!!(flags & BSF_GLOBAL)
6014 != (hash->root.root.type == bfd_link_hash_defined))
6015 (*_bfd_error_handler)
6016 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
6017 sym_name);
6018
6019 stub_entry->stub_offset = stub_offset;
6020 }
6021
6022 /* Size should match that of a SG veneer. */
6023 if (intsym->st_size != cmse_stub_size)
6024 {
6025 (*_bfd_error_handler) (_("%B: incorrect size for symbol `%s'."),
6026 in_implib_bfd, sym_name);
6027 ret = FALSE;
6028 }
6029
6030 /* Previous veneer address is before current SG veneer section. */
6031 if (veneer_value < cmse_stub_sec_vma)
6032 {
6033 /* Avoid offset underflow. */
6034 if (stub_entry)
6035 stub_entry->stub_offset = 0;
6036 stub_offset = 0;
6037 ret = FALSE;
6038 }
6039
6040 /* Complain if stub offset not a multiple of stub size. */
6041 if (stub_offset % cmse_stub_size)
6042 {
6043 (*_bfd_error_handler)
6044 (_("Offset of veneer for entry function `%s' not a multiple of "
6045 "its size."), sym_name);
6046 ret = FALSE;
6047 }
6048
6049 if (!ret)
6050 continue;
6051
6052 new_cmse_stubs_created--;
6053 if (veneer_value < cmse_stub_array_start)
6054 cmse_stub_array_start = veneer_value;
6055 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6056 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6057 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6058 }
6059
6060 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6061 {
6062 BFD_ASSERT (new_cmse_stubs_created > 0);
6063 (*_bfd_error_handler)
6064 (_("new entry function(s) introduced but no output import library "
6065 "specified:"));
6066 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6067 }
6068
6069 if (cmse_stub_array_start != cmse_stub_sec_vma)
6070 {
6071 (*_bfd_error_handler)
6072 (_("Start address of `%s' is different from previous link."),
6073 out_sec_name);
6074 ret = FALSE;
6075 }
6076
6077 free_sym_buf:
6078 free (sympp);
6079 return ret;
6080 }
6081
6082 /* Determine and set the size of the stub section for a final link.
6083
6084 The basic idea here is to examine all the relocations looking for
6085 PC-relative calls to a target that is unreachable with a "bl"
6086 instruction. */
6087
6088 bfd_boolean
6089 elf32_arm_size_stubs (bfd *output_bfd,
6090 bfd *stub_bfd,
6091 struct bfd_link_info *info,
6092 bfd_signed_vma group_size,
6093 asection * (*add_stub_section) (const char *, asection *,
6094 asection *,
6095 unsigned int),
6096 void (*layout_sections_again) (void))
6097 {
6098 bfd_boolean ret = TRUE;
6099 obj_attribute *out_attr;
6100 int cmse_stub_created = 0;
6101 bfd_size_type stub_group_size;
6102 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6103 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6104 struct a8_erratum_fix *a8_fixes = NULL;
6105 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6106 struct a8_erratum_reloc *a8_relocs = NULL;
6107 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6108
6109 if (htab == NULL)
6110 return FALSE;
6111
6112 if (htab->fix_cortex_a8)
6113 {
6114 a8_fixes = (struct a8_erratum_fix *)
6115 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6116 a8_relocs = (struct a8_erratum_reloc *)
6117 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6118 }
6119
6120 /* Propagate mach to stub bfd, because it may not have been
6121 finalized when we created stub_bfd. */
6122 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6123 bfd_get_mach (output_bfd));
6124
6125 /* Stash our params away. */
6126 htab->stub_bfd = stub_bfd;
6127 htab->add_stub_section = add_stub_section;
6128 htab->layout_sections_again = layout_sections_again;
6129 stubs_always_after_branch = group_size < 0;
6130
6131 out_attr = elf_known_obj_attributes_proc (output_bfd);
6132 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6133
6134 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6135 as the first half of a 32-bit branch straddling two 4K pages. This is a
6136 crude way of enforcing that. */
6137 if (htab->fix_cortex_a8)
6138 stubs_always_after_branch = 1;
6139
6140 if (group_size < 0)
6141 stub_group_size = -group_size;
6142 else
6143 stub_group_size = group_size;
6144
6145 if (stub_group_size == 1)
6146 {
6147 /* Default values. */
6148 /* Thumb branch range is +-4MB has to be used as the default
6149 maximum size (a given section can contain both ARM and Thumb
6150 code, so the worst case has to be taken into account).
6151
6152 This value is 24K less than that, which allows for 2025
6153 12-byte stubs. If we exceed that, then we will fail to link.
6154 The user will have to relink with an explicit group size
6155 option. */
6156 stub_group_size = 4170000;
6157 }
6158
6159 group_sections (htab, stub_group_size, stubs_always_after_branch);
6160
6161 /* If we're applying the cortex A8 fix, we need to determine the
6162 program header size now, because we cannot change it later --
6163 that could alter section placements. Notice the A8 erratum fix
6164 ends up requiring the section addresses to remain unchanged
6165 modulo the page size. That's something we cannot represent
6166 inside BFD, and we don't want to force the section alignment to
6167 be the page size. */
6168 if (htab->fix_cortex_a8)
6169 (*htab->layout_sections_again) ();
6170
6171 while (1)
6172 {
6173 bfd *input_bfd;
6174 unsigned int bfd_indx;
6175 asection *stub_sec;
6176 enum elf32_arm_stub_type stub_type;
6177 bfd_boolean stub_changed = FALSE;
6178 unsigned prev_num_a8_fixes = num_a8_fixes;
6179
6180 num_a8_fixes = 0;
6181 for (input_bfd = info->input_bfds, bfd_indx = 0;
6182 input_bfd != NULL;
6183 input_bfd = input_bfd->link.next, bfd_indx++)
6184 {
6185 Elf_Internal_Shdr *symtab_hdr;
6186 asection *section;
6187 Elf_Internal_Sym *local_syms = NULL;
6188
6189 if (!is_arm_elf (input_bfd))
6190 continue;
6191
6192 num_a8_relocs = 0;
6193
6194 /* We'll need the symbol table in a second. */
6195 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6196 if (symtab_hdr->sh_info == 0)
6197 continue;
6198
6199 /* Limit scan of symbols to object file whose profile is
6200 Microcontroller to not hinder performance in the general case. */
6201 if (m_profile && first_veneer_scan)
6202 {
6203 struct elf_link_hash_entry **sym_hashes;
6204
6205 sym_hashes = elf_sym_hashes (input_bfd);
6206 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6207 &cmse_stub_created))
6208 goto error_ret_free_local;
6209
6210 if (cmse_stub_created != 0)
6211 stub_changed = TRUE;
6212 }
6213
6214 /* Walk over each section attached to the input bfd. */
6215 for (section = input_bfd->sections;
6216 section != NULL;
6217 section = section->next)
6218 {
6219 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6220
6221 /* If there aren't any relocs, then there's nothing more
6222 to do. */
6223 if ((section->flags & SEC_RELOC) == 0
6224 || section->reloc_count == 0
6225 || (section->flags & SEC_CODE) == 0)
6226 continue;
6227
6228 /* If this section is a link-once section that will be
6229 discarded, then don't create any stubs. */
6230 if (section->output_section == NULL
6231 || section->output_section->owner != output_bfd)
6232 continue;
6233
6234 /* Get the relocs. */
6235 internal_relocs
6236 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6237 NULL, info->keep_memory);
6238 if (internal_relocs == NULL)
6239 goto error_ret_free_local;
6240
6241 /* Now examine each relocation. */
6242 irela = internal_relocs;
6243 irelaend = irela + section->reloc_count;
6244 for (; irela < irelaend; irela++)
6245 {
6246 unsigned int r_type, r_indx;
6247 asection *sym_sec;
6248 bfd_vma sym_value;
6249 bfd_vma destination;
6250 struct elf32_arm_link_hash_entry *hash;
6251 const char *sym_name;
6252 unsigned char st_type;
6253 enum arm_st_branch_type branch_type;
6254 bfd_boolean created_stub = FALSE;
6255
6256 r_type = ELF32_R_TYPE (irela->r_info);
6257 r_indx = ELF32_R_SYM (irela->r_info);
6258
6259 if (r_type >= (unsigned int) R_ARM_max)
6260 {
6261 bfd_set_error (bfd_error_bad_value);
6262 error_ret_free_internal:
6263 if (elf_section_data (section)->relocs == NULL)
6264 free (internal_relocs);
6265 /* Fall through. */
6266 error_ret_free_local:
6267 if (local_syms != NULL
6268 && (symtab_hdr->contents
6269 != (unsigned char *) local_syms))
6270 free (local_syms);
6271 return FALSE;
6272 }
6273
6274 hash = NULL;
6275 if (r_indx >= symtab_hdr->sh_info)
6276 hash = elf32_arm_hash_entry
6277 (elf_sym_hashes (input_bfd)
6278 [r_indx - symtab_hdr->sh_info]);
6279
6280 /* Only look for stubs on branch instructions, or
6281 non-relaxed TLSCALL */
6282 if ((r_type != (unsigned int) R_ARM_CALL)
6283 && (r_type != (unsigned int) R_ARM_THM_CALL)
6284 && (r_type != (unsigned int) R_ARM_JUMP24)
6285 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6286 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6287 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6288 && (r_type != (unsigned int) R_ARM_PLT32)
6289 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6290 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6291 && r_type == elf32_arm_tls_transition
6292 (info, r_type, &hash->root)
6293 && ((hash ? hash->tls_type
6294 : (elf32_arm_local_got_tls_type
6295 (input_bfd)[r_indx]))
6296 & GOT_TLS_GDESC) != 0))
6297 continue;
6298
6299 /* Now determine the call target, its name, value,
6300 section. */
6301 sym_sec = NULL;
6302 sym_value = 0;
6303 destination = 0;
6304 sym_name = NULL;
6305
6306 if (r_type == (unsigned int) R_ARM_TLS_CALL
6307 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6308 {
6309 /* A non-relaxed TLS call. The target is the
6310 plt-resident trampoline and nothing to do
6311 with the symbol. */
6312 BFD_ASSERT (htab->tls_trampoline > 0);
6313 sym_sec = htab->root.splt;
6314 sym_value = htab->tls_trampoline;
6315 hash = 0;
6316 st_type = STT_FUNC;
6317 branch_type = ST_BRANCH_TO_ARM;
6318 }
6319 else if (!hash)
6320 {
6321 /* It's a local symbol. */
6322 Elf_Internal_Sym *sym;
6323
6324 if (local_syms == NULL)
6325 {
6326 local_syms
6327 = (Elf_Internal_Sym *) symtab_hdr->contents;
6328 if (local_syms == NULL)
6329 local_syms
6330 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6331 symtab_hdr->sh_info, 0,
6332 NULL, NULL, NULL);
6333 if (local_syms == NULL)
6334 goto error_ret_free_internal;
6335 }
6336
6337 sym = local_syms + r_indx;
6338 if (sym->st_shndx == SHN_UNDEF)
6339 sym_sec = bfd_und_section_ptr;
6340 else if (sym->st_shndx == SHN_ABS)
6341 sym_sec = bfd_abs_section_ptr;
6342 else if (sym->st_shndx == SHN_COMMON)
6343 sym_sec = bfd_com_section_ptr;
6344 else
6345 sym_sec =
6346 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6347
6348 if (!sym_sec)
6349 /* This is an undefined symbol. It can never
6350 be resolved. */
6351 continue;
6352
6353 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6354 sym_value = sym->st_value;
6355 destination = (sym_value + irela->r_addend
6356 + sym_sec->output_offset
6357 + sym_sec->output_section->vma);
6358 st_type = ELF_ST_TYPE (sym->st_info);
6359 branch_type =
6360 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6361 sym_name
6362 = bfd_elf_string_from_elf_section (input_bfd,
6363 symtab_hdr->sh_link,
6364 sym->st_name);
6365 }
6366 else
6367 {
6368 /* It's an external symbol. */
6369 while (hash->root.root.type == bfd_link_hash_indirect
6370 || hash->root.root.type == bfd_link_hash_warning)
6371 hash = ((struct elf32_arm_link_hash_entry *)
6372 hash->root.root.u.i.link);
6373
6374 if (hash->root.root.type == bfd_link_hash_defined
6375 || hash->root.root.type == bfd_link_hash_defweak)
6376 {
6377 sym_sec = hash->root.root.u.def.section;
6378 sym_value = hash->root.root.u.def.value;
6379
6380 struct elf32_arm_link_hash_table *globals =
6381 elf32_arm_hash_table (info);
6382
6383 /* For a destination in a shared library,
6384 use the PLT stub as target address to
6385 decide whether a branch stub is
6386 needed. */
6387 if (globals != NULL
6388 && globals->root.splt != NULL
6389 && hash != NULL
6390 && hash->root.plt.offset != (bfd_vma) -1)
6391 {
6392 sym_sec = globals->root.splt;
6393 sym_value = hash->root.plt.offset;
6394 if (sym_sec->output_section != NULL)
6395 destination = (sym_value
6396 + sym_sec->output_offset
6397 + sym_sec->output_section->vma);
6398 }
6399 else if (sym_sec->output_section != NULL)
6400 destination = (sym_value + irela->r_addend
6401 + sym_sec->output_offset
6402 + sym_sec->output_section->vma);
6403 }
6404 else if ((hash->root.root.type == bfd_link_hash_undefined)
6405 || (hash->root.root.type == bfd_link_hash_undefweak))
6406 {
6407 /* For a shared library, use the PLT stub as
6408 target address to decide whether a long
6409 branch stub is needed.
6410 For absolute code, they cannot be handled. */
6411 struct elf32_arm_link_hash_table *globals =
6412 elf32_arm_hash_table (info);
6413
6414 if (globals != NULL
6415 && globals->root.splt != NULL
6416 && hash != NULL
6417 && hash->root.plt.offset != (bfd_vma) -1)
6418 {
6419 sym_sec = globals->root.splt;
6420 sym_value = hash->root.plt.offset;
6421 if (sym_sec->output_section != NULL)
6422 destination = (sym_value
6423 + sym_sec->output_offset
6424 + sym_sec->output_section->vma);
6425 }
6426 else
6427 continue;
6428 }
6429 else
6430 {
6431 bfd_set_error (bfd_error_bad_value);
6432 goto error_ret_free_internal;
6433 }
6434 st_type = hash->root.type;
6435 branch_type =
6436 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6437 sym_name = hash->root.root.root.string;
6438 }
6439
6440 do
6441 {
6442 bfd_boolean new_stub;
6443 struct elf32_arm_stub_hash_entry *stub_entry;
6444
6445 /* Determine what (if any) linker stub is needed. */
6446 stub_type = arm_type_of_stub (info, section, irela,
6447 st_type, &branch_type,
6448 hash, destination, sym_sec,
6449 input_bfd, sym_name);
6450 if (stub_type == arm_stub_none)
6451 break;
6452
6453 /* We've either created a stub for this reloc already,
6454 or we are about to. */
6455 stub_entry =
6456 elf32_arm_create_stub (htab, stub_type, section, irela,
6457 sym_sec, hash,
6458 (char *) sym_name, sym_value,
6459 branch_type, &new_stub);
6460
6461 created_stub = stub_entry != NULL;
6462 if (!created_stub)
6463 goto error_ret_free_internal;
6464 else if (!new_stub)
6465 break;
6466 else
6467 stub_changed = TRUE;
6468 }
6469 while (0);
6470
6471 /* Look for relocations which might trigger Cortex-A8
6472 erratum. */
6473 if (htab->fix_cortex_a8
6474 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6475 || r_type == (unsigned int) R_ARM_THM_JUMP19
6476 || r_type == (unsigned int) R_ARM_THM_CALL
6477 || r_type == (unsigned int) R_ARM_THM_XPC22))
6478 {
6479 bfd_vma from = section->output_section->vma
6480 + section->output_offset
6481 + irela->r_offset;
6482
6483 if ((from & 0xfff) == 0xffe)
6484 {
6485 /* Found a candidate. Note we haven't checked the
6486 destination is within 4K here: if we do so (and
6487 don't create an entry in a8_relocs) we can't tell
6488 that a branch should have been relocated when
6489 scanning later. */
6490 if (num_a8_relocs == a8_reloc_table_size)
6491 {
6492 a8_reloc_table_size *= 2;
6493 a8_relocs = (struct a8_erratum_reloc *)
6494 bfd_realloc (a8_relocs,
6495 sizeof (struct a8_erratum_reloc)
6496 * a8_reloc_table_size);
6497 }
6498
6499 a8_relocs[num_a8_relocs].from = from;
6500 a8_relocs[num_a8_relocs].destination = destination;
6501 a8_relocs[num_a8_relocs].r_type = r_type;
6502 a8_relocs[num_a8_relocs].branch_type = branch_type;
6503 a8_relocs[num_a8_relocs].sym_name = sym_name;
6504 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6505 a8_relocs[num_a8_relocs].hash = hash;
6506
6507 num_a8_relocs++;
6508 }
6509 }
6510 }
6511
6512 /* We're done with the internal relocs, free them. */
6513 if (elf_section_data (section)->relocs == NULL)
6514 free (internal_relocs);
6515 }
6516
6517 if (htab->fix_cortex_a8)
6518 {
6519 /* Sort relocs which might apply to Cortex-A8 erratum. */
6520 qsort (a8_relocs, num_a8_relocs,
6521 sizeof (struct a8_erratum_reloc),
6522 &a8_reloc_compare);
6523
6524 /* Scan for branches which might trigger Cortex-A8 erratum. */
6525 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6526 &num_a8_fixes, &a8_fix_table_size,
6527 a8_relocs, num_a8_relocs,
6528 prev_num_a8_fixes, &stub_changed)
6529 != 0)
6530 goto error_ret_free_local;
6531 }
6532
6533 if (local_syms != NULL
6534 && symtab_hdr->contents != (unsigned char *) local_syms)
6535 {
6536 if (!info->keep_memory)
6537 free (local_syms);
6538 else
6539 symtab_hdr->contents = (unsigned char *) local_syms;
6540 }
6541 }
6542
6543 if (first_veneer_scan
6544 && !set_cmse_veneer_addr_from_implib (info, htab,
6545 &cmse_stub_created))
6546 ret = FALSE;
6547
6548 if (prev_num_a8_fixes != num_a8_fixes)
6549 stub_changed = TRUE;
6550
6551 if (!stub_changed)
6552 break;
6553
6554 /* OK, we've added some stubs. Find out the new size of the
6555 stub sections. */
6556 for (stub_sec = htab->stub_bfd->sections;
6557 stub_sec != NULL;
6558 stub_sec = stub_sec->next)
6559 {
6560 /* Ignore non-stub sections. */
6561 if (!strstr (stub_sec->name, STUB_SUFFIX))
6562 continue;
6563
6564 stub_sec->size = 0;
6565 }
6566
6567 /* Add new SG veneers after those already in the input import
6568 library. */
6569 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6570 stub_type++)
6571 {
6572 bfd_vma *start_offset_p;
6573 asection **stub_sec_p;
6574
6575 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6576 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6577 if (start_offset_p == NULL)
6578 continue;
6579
6580 BFD_ASSERT (stub_sec_p != NULL);
6581 if (*stub_sec_p != NULL)
6582 (*stub_sec_p)->size = *start_offset_p;
6583 }
6584
6585 /* Compute stub section size, considering padding. */
6586 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6587 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6588 stub_type++)
6589 {
6590 int size, padding;
6591 asection **stub_sec_p;
6592
6593 padding = arm_dedicated_stub_section_padding (stub_type);
6594 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6595 /* Skip if no stub input section or no stub section padding
6596 required. */
6597 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6598 continue;
6599 /* Stub section padding required but no dedicated section. */
6600 BFD_ASSERT (stub_sec_p);
6601
6602 size = (*stub_sec_p)->size;
6603 size = (size + padding - 1) & ~(padding - 1);
6604 (*stub_sec_p)->size = size;
6605 }
6606
6607 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6608 if (htab->fix_cortex_a8)
6609 for (i = 0; i < num_a8_fixes; i++)
6610 {
6611 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6612 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6613
6614 if (stub_sec == NULL)
6615 return FALSE;
6616
6617 stub_sec->size
6618 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6619 NULL);
6620 }
6621
6622
6623 /* Ask the linker to do its stuff. */
6624 (*htab->layout_sections_again) ();
6625 first_veneer_scan = FALSE;
6626 }
6627
6628 /* Add stubs for Cortex-A8 erratum fixes now. */
6629 if (htab->fix_cortex_a8)
6630 {
6631 for (i = 0; i < num_a8_fixes; i++)
6632 {
6633 struct elf32_arm_stub_hash_entry *stub_entry;
6634 char *stub_name = a8_fixes[i].stub_name;
6635 asection *section = a8_fixes[i].section;
6636 unsigned int section_id = a8_fixes[i].section->id;
6637 asection *link_sec = htab->stub_group[section_id].link_sec;
6638 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6639 const insn_sequence *template_sequence;
6640 int template_size, size = 0;
6641
6642 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6643 TRUE, FALSE);
6644 if (stub_entry == NULL)
6645 {
6646 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
6647 section->owner,
6648 stub_name);
6649 return FALSE;
6650 }
6651
6652 stub_entry->stub_sec = stub_sec;
6653 stub_entry->stub_offset = (bfd_vma) -1;
6654 stub_entry->id_sec = link_sec;
6655 stub_entry->stub_type = a8_fixes[i].stub_type;
6656 stub_entry->source_value = a8_fixes[i].offset;
6657 stub_entry->target_section = a8_fixes[i].section;
6658 stub_entry->target_value = a8_fixes[i].target_offset;
6659 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6660 stub_entry->branch_type = a8_fixes[i].branch_type;
6661
6662 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6663 &template_sequence,
6664 &template_size);
6665
6666 stub_entry->stub_size = size;
6667 stub_entry->stub_template = template_sequence;
6668 stub_entry->stub_template_size = template_size;
6669 }
6670
6671 /* Stash the Cortex-A8 erratum fix array for use later in
6672 elf32_arm_write_section(). */
6673 htab->a8_erratum_fixes = a8_fixes;
6674 htab->num_a8_erratum_fixes = num_a8_fixes;
6675 }
6676 else
6677 {
6678 htab->a8_erratum_fixes = NULL;
6679 htab->num_a8_erratum_fixes = 0;
6680 }
6681 return ret;
6682 }
6683
6684 /* Build all the stubs associated with the current output file. The
6685 stubs are kept in a hash table attached to the main linker hash
6686 table. We also set up the .plt entries for statically linked PIC
6687 functions here. This function is called via arm_elf_finish in the
6688 linker. */
6689
6690 bfd_boolean
6691 elf32_arm_build_stubs (struct bfd_link_info *info)
6692 {
6693 asection *stub_sec;
6694 struct bfd_hash_table *table;
6695 enum elf32_arm_stub_type stub_type;
6696 struct elf32_arm_link_hash_table *htab;
6697
6698 htab = elf32_arm_hash_table (info);
6699 if (htab == NULL)
6700 return FALSE;
6701
6702 for (stub_sec = htab->stub_bfd->sections;
6703 stub_sec != NULL;
6704 stub_sec = stub_sec->next)
6705 {
6706 bfd_size_type size;
6707
6708 /* Ignore non-stub sections. */
6709 if (!strstr (stub_sec->name, STUB_SUFFIX))
6710 continue;
6711
6712 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6713 must at least be done for stub section requiring padding and for SG
6714 veneers to ensure that a non secure code branching to a removed SG
6715 veneer causes an error. */
6716 size = stub_sec->size;
6717 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6718 if (stub_sec->contents == NULL && size != 0)
6719 return FALSE;
6720
6721 stub_sec->size = 0;
6722 }
6723
6724 /* Add new SG veneers after those already in the input import library. */
6725 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6726 {
6727 bfd_vma *start_offset_p;
6728 asection **stub_sec_p;
6729
6730 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6731 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6732 if (start_offset_p == NULL)
6733 continue;
6734
6735 BFD_ASSERT (stub_sec_p != NULL);
6736 if (*stub_sec_p != NULL)
6737 (*stub_sec_p)->size = *start_offset_p;
6738 }
6739
6740 /* Build the stubs as directed by the stub hash table. */
6741 table = &htab->stub_hash_table;
6742 bfd_hash_traverse (table, arm_build_one_stub, info);
6743 if (htab->fix_cortex_a8)
6744 {
6745 /* Place the cortex a8 stubs last. */
6746 htab->fix_cortex_a8 = -1;
6747 bfd_hash_traverse (table, arm_build_one_stub, info);
6748 }
6749
6750 return TRUE;
6751 }
6752
6753 /* Locate the Thumb encoded calling stub for NAME. */
6754
6755 static struct elf_link_hash_entry *
6756 find_thumb_glue (struct bfd_link_info *link_info,
6757 const char *name,
6758 char **error_message)
6759 {
6760 char *tmp_name;
6761 struct elf_link_hash_entry *hash;
6762 struct elf32_arm_link_hash_table *hash_table;
6763
6764 /* We need a pointer to the armelf specific hash table. */
6765 hash_table = elf32_arm_hash_table (link_info);
6766 if (hash_table == NULL)
6767 return NULL;
6768
6769 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6770 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6771
6772 BFD_ASSERT (tmp_name);
6773
6774 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6775
6776 hash = elf_link_hash_lookup
6777 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6778
6779 if (hash == NULL
6780 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6781 tmp_name, name) == -1)
6782 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6783
6784 free (tmp_name);
6785
6786 return hash;
6787 }
6788
6789 /* Locate the ARM encoded calling stub for NAME. */
6790
6791 static struct elf_link_hash_entry *
6792 find_arm_glue (struct bfd_link_info *link_info,
6793 const char *name,
6794 char **error_message)
6795 {
6796 char *tmp_name;
6797 struct elf_link_hash_entry *myh;
6798 struct elf32_arm_link_hash_table *hash_table;
6799
6800 /* We need a pointer to the elfarm specific hash table. */
6801 hash_table = elf32_arm_hash_table (link_info);
6802 if (hash_table == NULL)
6803 return NULL;
6804
6805 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6806 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6807
6808 BFD_ASSERT (tmp_name);
6809
6810 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6811
6812 myh = elf_link_hash_lookup
6813 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6814
6815 if (myh == NULL
6816 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6817 tmp_name, name) == -1)
6818 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6819
6820 free (tmp_name);
6821
6822 return myh;
6823 }
6824
6825 /* ARM->Thumb glue (static images):
6826
6827 .arm
6828 __func_from_arm:
6829 ldr r12, __func_addr
6830 bx r12
6831 __func_addr:
6832 .word func @ behave as if you saw a ARM_32 reloc.
6833
6834 (v5t static images)
6835 .arm
6836 __func_from_arm:
6837 ldr pc, __func_addr
6838 __func_addr:
6839 .word func @ behave as if you saw a ARM_32 reloc.
6840
6841 (relocatable images)
6842 .arm
6843 __func_from_arm:
6844 ldr r12, __func_offset
6845 add r12, r12, pc
6846 bx r12
6847 __func_offset:
6848 .word func - . */
6849
6850 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6851 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6852 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6853 static const insn32 a2t3_func_addr_insn = 0x00000001;
6854
6855 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6856 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6857 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6858
6859 #define ARM2THUMB_PIC_GLUE_SIZE 16
6860 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6861 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6862 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6863
6864 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6865
6866 .thumb .thumb
6867 .align 2 .align 2
6868 __func_from_thumb: __func_from_thumb:
6869 bx pc push {r6, lr}
6870 nop ldr r6, __func_addr
6871 .arm mov lr, pc
6872 b func bx r6
6873 .arm
6874 ;; back_to_thumb
6875 ldmia r13! {r6, lr}
6876 bx lr
6877 __func_addr:
6878 .word func */
6879
6880 #define THUMB2ARM_GLUE_SIZE 8
6881 static const insn16 t2a1_bx_pc_insn = 0x4778;
6882 static const insn16 t2a2_noop_insn = 0x46c0;
6883 static const insn32 t2a3_b_insn = 0xea000000;
6884
6885 #define VFP11_ERRATUM_VENEER_SIZE 8
6886 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6887 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6888
6889 #define ARM_BX_VENEER_SIZE 12
6890 static const insn32 armbx1_tst_insn = 0xe3100001;
6891 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6892 static const insn32 armbx3_bx_insn = 0xe12fff10;
6893
6894 #ifndef ELFARM_NABI_C_INCLUDED
6895 static void
6896 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6897 {
6898 asection * s;
6899 bfd_byte * contents;
6900
6901 if (size == 0)
6902 {
6903 /* Do not include empty glue sections in the output. */
6904 if (abfd != NULL)
6905 {
6906 s = bfd_get_linker_section (abfd, name);
6907 if (s != NULL)
6908 s->flags |= SEC_EXCLUDE;
6909 }
6910 return;
6911 }
6912
6913 BFD_ASSERT (abfd != NULL);
6914
6915 s = bfd_get_linker_section (abfd, name);
6916 BFD_ASSERT (s != NULL);
6917
6918 contents = (bfd_byte *) bfd_alloc (abfd, size);
6919
6920 BFD_ASSERT (s->size == size);
6921 s->contents = contents;
6922 }
6923
6924 bfd_boolean
6925 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6926 {
6927 struct elf32_arm_link_hash_table * globals;
6928
6929 globals = elf32_arm_hash_table (info);
6930 BFD_ASSERT (globals != NULL);
6931
6932 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6933 globals->arm_glue_size,
6934 ARM2THUMB_GLUE_SECTION_NAME);
6935
6936 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6937 globals->thumb_glue_size,
6938 THUMB2ARM_GLUE_SECTION_NAME);
6939
6940 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6941 globals->vfp11_erratum_glue_size,
6942 VFP11_ERRATUM_VENEER_SECTION_NAME);
6943
6944 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6945 globals->stm32l4xx_erratum_glue_size,
6946 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6947
6948 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6949 globals->bx_glue_size,
6950 ARM_BX_GLUE_SECTION_NAME);
6951
6952 return TRUE;
6953 }
6954
6955 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6956 returns the symbol identifying the stub. */
6957
6958 static struct elf_link_hash_entry *
6959 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6960 struct elf_link_hash_entry * h)
6961 {
6962 const char * name = h->root.root.string;
6963 asection * s;
6964 char * tmp_name;
6965 struct elf_link_hash_entry * myh;
6966 struct bfd_link_hash_entry * bh;
6967 struct elf32_arm_link_hash_table * globals;
6968 bfd_vma val;
6969 bfd_size_type size;
6970
6971 globals = elf32_arm_hash_table (link_info);
6972 BFD_ASSERT (globals != NULL);
6973 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6974
6975 s = bfd_get_linker_section
6976 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6977
6978 BFD_ASSERT (s != NULL);
6979
6980 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6981 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6982
6983 BFD_ASSERT (tmp_name);
6984
6985 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6986
6987 myh = elf_link_hash_lookup
6988 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6989
6990 if (myh != NULL)
6991 {
6992 /* We've already seen this guy. */
6993 free (tmp_name);
6994 return myh;
6995 }
6996
6997 /* The only trick here is using hash_table->arm_glue_size as the value.
6998 Even though the section isn't allocated yet, this is where we will be
6999 putting it. The +1 on the value marks that the stub has not been
7000 output yet - not that it is a Thumb function. */
7001 bh = NULL;
7002 val = globals->arm_glue_size + 1;
7003 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7004 tmp_name, BSF_GLOBAL, s, val,
7005 NULL, TRUE, FALSE, &bh);
7006
7007 myh = (struct elf_link_hash_entry *) bh;
7008 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7009 myh->forced_local = 1;
7010
7011 free (tmp_name);
7012
7013 if (bfd_link_pic (link_info)
7014 || globals->root.is_relocatable_executable
7015 || globals->pic_veneer)
7016 size = ARM2THUMB_PIC_GLUE_SIZE;
7017 else if (globals->use_blx)
7018 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7019 else
7020 size = ARM2THUMB_STATIC_GLUE_SIZE;
7021
7022 s->size += size;
7023 globals->arm_glue_size += size;
7024
7025 return myh;
7026 }
7027
7028 /* Allocate space for ARMv4 BX veneers. */
7029
7030 static void
7031 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7032 {
7033 asection * s;
7034 struct elf32_arm_link_hash_table *globals;
7035 char *tmp_name;
7036 struct elf_link_hash_entry *myh;
7037 struct bfd_link_hash_entry *bh;
7038 bfd_vma val;
7039
7040 /* BX PC does not need a veneer. */
7041 if (reg == 15)
7042 return;
7043
7044 globals = elf32_arm_hash_table (link_info);
7045 BFD_ASSERT (globals != NULL);
7046 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7047
7048 /* Check if this veneer has already been allocated. */
7049 if (globals->bx_glue_offset[reg])
7050 return;
7051
7052 s = bfd_get_linker_section
7053 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7054
7055 BFD_ASSERT (s != NULL);
7056
7057 /* Add symbol for veneer. */
7058 tmp_name = (char *)
7059 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7060
7061 BFD_ASSERT (tmp_name);
7062
7063 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7064
7065 myh = elf_link_hash_lookup
7066 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7067
7068 BFD_ASSERT (myh == NULL);
7069
7070 bh = NULL;
7071 val = globals->bx_glue_size;
7072 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7073 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7074 NULL, TRUE, FALSE, &bh);
7075
7076 myh = (struct elf_link_hash_entry *) bh;
7077 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7078 myh->forced_local = 1;
7079
7080 s->size += ARM_BX_VENEER_SIZE;
7081 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7082 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7083 }
7084
7085
7086 /* Add an entry to the code/data map for section SEC. */
7087
7088 static void
7089 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7090 {
7091 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7092 unsigned int newidx;
7093
7094 if (sec_data->map == NULL)
7095 {
7096 sec_data->map = (elf32_arm_section_map *)
7097 bfd_malloc (sizeof (elf32_arm_section_map));
7098 sec_data->mapcount = 0;
7099 sec_data->mapsize = 1;
7100 }
7101
7102 newidx = sec_data->mapcount++;
7103
7104 if (sec_data->mapcount > sec_data->mapsize)
7105 {
7106 sec_data->mapsize *= 2;
7107 sec_data->map = (elf32_arm_section_map *)
7108 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7109 * sizeof (elf32_arm_section_map));
7110 }
7111
7112 if (sec_data->map)
7113 {
7114 sec_data->map[newidx].vma = vma;
7115 sec_data->map[newidx].type = type;
7116 }
7117 }
7118
7119
7120 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7121 veneers are handled for now. */
7122
7123 static bfd_vma
7124 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7125 elf32_vfp11_erratum_list *branch,
7126 bfd *branch_bfd,
7127 asection *branch_sec,
7128 unsigned int offset)
7129 {
7130 asection *s;
7131 struct elf32_arm_link_hash_table *hash_table;
7132 char *tmp_name;
7133 struct elf_link_hash_entry *myh;
7134 struct bfd_link_hash_entry *bh;
7135 bfd_vma val;
7136 struct _arm_elf_section_data *sec_data;
7137 elf32_vfp11_erratum_list *newerr;
7138
7139 hash_table = elf32_arm_hash_table (link_info);
7140 BFD_ASSERT (hash_table != NULL);
7141 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7142
7143 s = bfd_get_linker_section
7144 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7145
7146 sec_data = elf32_arm_section_data (s);
7147
7148 BFD_ASSERT (s != NULL);
7149
7150 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7151 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7152
7153 BFD_ASSERT (tmp_name);
7154
7155 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7156 hash_table->num_vfp11_fixes);
7157
7158 myh = elf_link_hash_lookup
7159 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7160
7161 BFD_ASSERT (myh == NULL);
7162
7163 bh = NULL;
7164 val = hash_table->vfp11_erratum_glue_size;
7165 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7166 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7167 NULL, TRUE, FALSE, &bh);
7168
7169 myh = (struct elf_link_hash_entry *) bh;
7170 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7171 myh->forced_local = 1;
7172
7173 /* Link veneer back to calling location. */
7174 sec_data->erratumcount += 1;
7175 newerr = (elf32_vfp11_erratum_list *)
7176 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7177
7178 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7179 newerr->vma = -1;
7180 newerr->u.v.branch = branch;
7181 newerr->u.v.id = hash_table->num_vfp11_fixes;
7182 branch->u.b.veneer = newerr;
7183
7184 newerr->next = sec_data->erratumlist;
7185 sec_data->erratumlist = newerr;
7186
7187 /* A symbol for the return from the veneer. */
7188 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7189 hash_table->num_vfp11_fixes);
7190
7191 myh = elf_link_hash_lookup
7192 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7193
7194 if (myh != NULL)
7195 abort ();
7196
7197 bh = NULL;
7198 val = offset + 4;
7199 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7200 branch_sec, val, NULL, TRUE, FALSE, &bh);
7201
7202 myh = (struct elf_link_hash_entry *) bh;
7203 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7204 myh->forced_local = 1;
7205
7206 free (tmp_name);
7207
7208 /* Generate a mapping symbol for the veneer section, and explicitly add an
7209 entry for that symbol to the code/data map for the section. */
7210 if (hash_table->vfp11_erratum_glue_size == 0)
7211 {
7212 bh = NULL;
7213 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7214 ever requires this erratum fix. */
7215 _bfd_generic_link_add_one_symbol (link_info,
7216 hash_table->bfd_of_glue_owner, "$a",
7217 BSF_LOCAL, s, 0, NULL,
7218 TRUE, FALSE, &bh);
7219
7220 myh = (struct elf_link_hash_entry *) bh;
7221 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7222 myh->forced_local = 1;
7223
7224 /* The elf32_arm_init_maps function only cares about symbols from input
7225 BFDs. We must make a note of this generated mapping symbol
7226 ourselves so that code byteswapping works properly in
7227 elf32_arm_write_section. */
7228 elf32_arm_section_map_add (s, 'a', 0);
7229 }
7230
7231 s->size += VFP11_ERRATUM_VENEER_SIZE;
7232 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7233 hash_table->num_vfp11_fixes++;
7234
7235 /* The offset of the veneer. */
7236 return val;
7237 }
7238
7239 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7240 veneers need to be handled because used only in Cortex-M. */
7241
7242 static bfd_vma
7243 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7244 elf32_stm32l4xx_erratum_list *branch,
7245 bfd *branch_bfd,
7246 asection *branch_sec,
7247 unsigned int offset,
7248 bfd_size_type veneer_size)
7249 {
7250 asection *s;
7251 struct elf32_arm_link_hash_table *hash_table;
7252 char *tmp_name;
7253 struct elf_link_hash_entry *myh;
7254 struct bfd_link_hash_entry *bh;
7255 bfd_vma val;
7256 struct _arm_elf_section_data *sec_data;
7257 elf32_stm32l4xx_erratum_list *newerr;
7258
7259 hash_table = elf32_arm_hash_table (link_info);
7260 BFD_ASSERT (hash_table != NULL);
7261 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7262
7263 s = bfd_get_linker_section
7264 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7265
7266 BFD_ASSERT (s != NULL);
7267
7268 sec_data = elf32_arm_section_data (s);
7269
7270 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7271 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7272
7273 BFD_ASSERT (tmp_name);
7274
7275 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7276 hash_table->num_stm32l4xx_fixes);
7277
7278 myh = elf_link_hash_lookup
7279 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7280
7281 BFD_ASSERT (myh == NULL);
7282
7283 bh = NULL;
7284 val = hash_table->stm32l4xx_erratum_glue_size;
7285 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7286 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7287 NULL, TRUE, FALSE, &bh);
7288
7289 myh = (struct elf_link_hash_entry *) bh;
7290 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7291 myh->forced_local = 1;
7292
7293 /* Link veneer back to calling location. */
7294 sec_data->stm32l4xx_erratumcount += 1;
7295 newerr = (elf32_stm32l4xx_erratum_list *)
7296 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7297
7298 newerr->type = STM32L4XX_ERRATUM_VENEER;
7299 newerr->vma = -1;
7300 newerr->u.v.branch = branch;
7301 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7302 branch->u.b.veneer = newerr;
7303
7304 newerr->next = sec_data->stm32l4xx_erratumlist;
7305 sec_data->stm32l4xx_erratumlist = newerr;
7306
7307 /* A symbol for the return from the veneer. */
7308 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7309 hash_table->num_stm32l4xx_fixes);
7310
7311 myh = elf_link_hash_lookup
7312 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7313
7314 if (myh != NULL)
7315 abort ();
7316
7317 bh = NULL;
7318 val = offset + 4;
7319 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7320 branch_sec, val, NULL, TRUE, FALSE, &bh);
7321
7322 myh = (struct elf_link_hash_entry *) bh;
7323 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7324 myh->forced_local = 1;
7325
7326 free (tmp_name);
7327
7328 /* Generate a mapping symbol for the veneer section, and explicitly add an
7329 entry for that symbol to the code/data map for the section. */
7330 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7331 {
7332 bh = NULL;
7333 /* Creates a THUMB symbol since there is no other choice. */
7334 _bfd_generic_link_add_one_symbol (link_info,
7335 hash_table->bfd_of_glue_owner, "$t",
7336 BSF_LOCAL, s, 0, NULL,
7337 TRUE, FALSE, &bh);
7338
7339 myh = (struct elf_link_hash_entry *) bh;
7340 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7341 myh->forced_local = 1;
7342
7343 /* The elf32_arm_init_maps function only cares about symbols from input
7344 BFDs. We must make a note of this generated mapping symbol
7345 ourselves so that code byteswapping works properly in
7346 elf32_arm_write_section. */
7347 elf32_arm_section_map_add (s, 't', 0);
7348 }
7349
7350 s->size += veneer_size;
7351 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7352 hash_table->num_stm32l4xx_fixes++;
7353
7354 /* The offset of the veneer. */
7355 return val;
7356 }
7357
7358 #define ARM_GLUE_SECTION_FLAGS \
7359 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7360 | SEC_READONLY | SEC_LINKER_CREATED)
7361
7362 /* Create a fake section for use by the ARM backend of the linker. */
7363
7364 static bfd_boolean
7365 arm_make_glue_section (bfd * abfd, const char * name)
7366 {
7367 asection * sec;
7368
7369 sec = bfd_get_linker_section (abfd, name);
7370 if (sec != NULL)
7371 /* Already made. */
7372 return TRUE;
7373
7374 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7375
7376 if (sec == NULL
7377 || !bfd_set_section_alignment (abfd, sec, 2))
7378 return FALSE;
7379
7380 /* Set the gc mark to prevent the section from being removed by garbage
7381 collection, despite the fact that no relocs refer to this section. */
7382 sec->gc_mark = 1;
7383
7384 return TRUE;
7385 }
7386
7387 /* Set size of .plt entries. This function is called from the
7388 linker scripts in ld/emultempl/{armelf}.em. */
7389
7390 void
7391 bfd_elf32_arm_use_long_plt (void)
7392 {
7393 elf32_arm_use_long_plt_entry = TRUE;
7394 }
7395
7396 /* Add the glue sections to ABFD. This function is called from the
7397 linker scripts in ld/emultempl/{armelf}.em. */
7398
7399 bfd_boolean
7400 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7401 struct bfd_link_info *info)
7402 {
7403 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7404 bfd_boolean dostm32l4xx = globals
7405 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7406 bfd_boolean addglue;
7407
7408 /* If we are only performing a partial
7409 link do not bother adding the glue. */
7410 if (bfd_link_relocatable (info))
7411 return TRUE;
7412
7413 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7414 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7415 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7416 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7417
7418 if (!dostm32l4xx)
7419 return addglue;
7420
7421 return addglue
7422 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7423 }
7424
7425 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7426 ensures they are not marked for deletion by
7427 strip_excluded_output_sections () when veneers are going to be created
7428 later. Not doing so would trigger assert on empty section size in
7429 lang_size_sections_1 (). */
7430
7431 void
7432 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7433 {
7434 enum elf32_arm_stub_type stub_type;
7435
7436 /* If we are only performing a partial
7437 link do not bother adding the glue. */
7438 if (bfd_link_relocatable (info))
7439 return;
7440
7441 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7442 {
7443 asection *out_sec;
7444 const char *out_sec_name;
7445
7446 if (!arm_dedicated_stub_output_section_required (stub_type))
7447 continue;
7448
7449 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7450 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7451 if (out_sec != NULL)
7452 out_sec->flags |= SEC_KEEP;
7453 }
7454 }
7455
7456 /* Select a BFD to be used to hold the sections used by the glue code.
7457 This function is called from the linker scripts in ld/emultempl/
7458 {armelf/pe}.em. */
7459
7460 bfd_boolean
7461 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7462 {
7463 struct elf32_arm_link_hash_table *globals;
7464
7465 /* If we are only performing a partial link
7466 do not bother getting a bfd to hold the glue. */
7467 if (bfd_link_relocatable (info))
7468 return TRUE;
7469
7470 /* Make sure we don't attach the glue sections to a dynamic object. */
7471 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7472
7473 globals = elf32_arm_hash_table (info);
7474 BFD_ASSERT (globals != NULL);
7475
7476 if (globals->bfd_of_glue_owner != NULL)
7477 return TRUE;
7478
7479 /* Save the bfd for later use. */
7480 globals->bfd_of_glue_owner = abfd;
7481
7482 return TRUE;
7483 }
7484
7485 static void
7486 check_use_blx (struct elf32_arm_link_hash_table *globals)
7487 {
7488 int cpu_arch;
7489
7490 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7491 Tag_CPU_arch);
7492
7493 if (globals->fix_arm1176)
7494 {
7495 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7496 globals->use_blx = 1;
7497 }
7498 else
7499 {
7500 if (cpu_arch > TAG_CPU_ARCH_V4T)
7501 globals->use_blx = 1;
7502 }
7503 }
7504
7505 bfd_boolean
7506 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7507 struct bfd_link_info *link_info)
7508 {
7509 Elf_Internal_Shdr *symtab_hdr;
7510 Elf_Internal_Rela *internal_relocs = NULL;
7511 Elf_Internal_Rela *irel, *irelend;
7512 bfd_byte *contents = NULL;
7513
7514 asection *sec;
7515 struct elf32_arm_link_hash_table *globals;
7516
7517 /* If we are only performing a partial link do not bother
7518 to construct any glue. */
7519 if (bfd_link_relocatable (link_info))
7520 return TRUE;
7521
7522 /* Here we have a bfd that is to be included on the link. We have a
7523 hook to do reloc rummaging, before section sizes are nailed down. */
7524 globals = elf32_arm_hash_table (link_info);
7525 BFD_ASSERT (globals != NULL);
7526
7527 check_use_blx (globals);
7528
7529 if (globals->byteswap_code && !bfd_big_endian (abfd))
7530 {
7531 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7532 abfd);
7533 return FALSE;
7534 }
7535
7536 /* PR 5398: If we have not decided to include any loadable sections in
7537 the output then we will not have a glue owner bfd. This is OK, it
7538 just means that there is nothing else for us to do here. */
7539 if (globals->bfd_of_glue_owner == NULL)
7540 return TRUE;
7541
7542 /* Rummage around all the relocs and map the glue vectors. */
7543 sec = abfd->sections;
7544
7545 if (sec == NULL)
7546 return TRUE;
7547
7548 for (; sec != NULL; sec = sec->next)
7549 {
7550 if (sec->reloc_count == 0)
7551 continue;
7552
7553 if ((sec->flags & SEC_EXCLUDE) != 0)
7554 continue;
7555
7556 symtab_hdr = & elf_symtab_hdr (abfd);
7557
7558 /* Load the relocs. */
7559 internal_relocs
7560 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7561
7562 if (internal_relocs == NULL)
7563 goto error_return;
7564
7565 irelend = internal_relocs + sec->reloc_count;
7566 for (irel = internal_relocs; irel < irelend; irel++)
7567 {
7568 long r_type;
7569 unsigned long r_index;
7570
7571 struct elf_link_hash_entry *h;
7572
7573 r_type = ELF32_R_TYPE (irel->r_info);
7574 r_index = ELF32_R_SYM (irel->r_info);
7575
7576 /* These are the only relocation types we care about. */
7577 if ( r_type != R_ARM_PC24
7578 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7579 continue;
7580
7581 /* Get the section contents if we haven't done so already. */
7582 if (contents == NULL)
7583 {
7584 /* Get cached copy if it exists. */
7585 if (elf_section_data (sec)->this_hdr.contents != NULL)
7586 contents = elf_section_data (sec)->this_hdr.contents;
7587 else
7588 {
7589 /* Go get them off disk. */
7590 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7591 goto error_return;
7592 }
7593 }
7594
7595 if (r_type == R_ARM_V4BX)
7596 {
7597 int reg;
7598
7599 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7600 record_arm_bx_glue (link_info, reg);
7601 continue;
7602 }
7603
7604 /* If the relocation is not against a symbol it cannot concern us. */
7605 h = NULL;
7606
7607 /* We don't care about local symbols. */
7608 if (r_index < symtab_hdr->sh_info)
7609 continue;
7610
7611 /* This is an external symbol. */
7612 r_index -= symtab_hdr->sh_info;
7613 h = (struct elf_link_hash_entry *)
7614 elf_sym_hashes (abfd)[r_index];
7615
7616 /* If the relocation is against a static symbol it must be within
7617 the current section and so cannot be a cross ARM/Thumb relocation. */
7618 if (h == NULL)
7619 continue;
7620
7621 /* If the call will go through a PLT entry then we do not need
7622 glue. */
7623 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7624 continue;
7625
7626 switch (r_type)
7627 {
7628 case R_ARM_PC24:
7629 /* This one is a call from arm code. We need to look up
7630 the target of the call. If it is a thumb target, we
7631 insert glue. */
7632 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7633 == ST_BRANCH_TO_THUMB)
7634 record_arm_to_thumb_glue (link_info, h);
7635 break;
7636
7637 default:
7638 abort ();
7639 }
7640 }
7641
7642 if (contents != NULL
7643 && elf_section_data (sec)->this_hdr.contents != contents)
7644 free (contents);
7645 contents = NULL;
7646
7647 if (internal_relocs != NULL
7648 && elf_section_data (sec)->relocs != internal_relocs)
7649 free (internal_relocs);
7650 internal_relocs = NULL;
7651 }
7652
7653 return TRUE;
7654
7655 error_return:
7656 if (contents != NULL
7657 && elf_section_data (sec)->this_hdr.contents != contents)
7658 free (contents);
7659 if (internal_relocs != NULL
7660 && elf_section_data (sec)->relocs != internal_relocs)
7661 free (internal_relocs);
7662
7663 return FALSE;
7664 }
7665 #endif
7666
7667
7668 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7669
7670 void
7671 bfd_elf32_arm_init_maps (bfd *abfd)
7672 {
7673 Elf_Internal_Sym *isymbuf;
7674 Elf_Internal_Shdr *hdr;
7675 unsigned int i, localsyms;
7676
7677 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7678 if (! is_arm_elf (abfd))
7679 return;
7680
7681 if ((abfd->flags & DYNAMIC) != 0)
7682 return;
7683
7684 hdr = & elf_symtab_hdr (abfd);
7685 localsyms = hdr->sh_info;
7686
7687 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7688 should contain the number of local symbols, which should come before any
7689 global symbols. Mapping symbols are always local. */
7690 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7691 NULL);
7692
7693 /* No internal symbols read? Skip this BFD. */
7694 if (isymbuf == NULL)
7695 return;
7696
7697 for (i = 0; i < localsyms; i++)
7698 {
7699 Elf_Internal_Sym *isym = &isymbuf[i];
7700 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7701 const char *name;
7702
7703 if (sec != NULL
7704 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7705 {
7706 name = bfd_elf_string_from_elf_section (abfd,
7707 hdr->sh_link, isym->st_name);
7708
7709 if (bfd_is_arm_special_symbol_name (name,
7710 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7711 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7712 }
7713 }
7714 }
7715
7716
7717 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7718 say what they wanted. */
7719
7720 void
7721 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7722 {
7723 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7724 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7725
7726 if (globals == NULL)
7727 return;
7728
7729 if (globals->fix_cortex_a8 == -1)
7730 {
7731 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7732 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7733 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7734 || out_attr[Tag_CPU_arch_profile].i == 0))
7735 globals->fix_cortex_a8 = 1;
7736 else
7737 globals->fix_cortex_a8 = 0;
7738 }
7739 }
7740
7741
7742 void
7743 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7744 {
7745 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7746 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7747
7748 if (globals == NULL)
7749 return;
7750 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7751 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7752 {
7753 switch (globals->vfp11_fix)
7754 {
7755 case BFD_ARM_VFP11_FIX_DEFAULT:
7756 case BFD_ARM_VFP11_FIX_NONE:
7757 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7758 break;
7759
7760 default:
7761 /* Give a warning, but do as the user requests anyway. */
7762 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
7763 "workaround is not necessary for target architecture"), obfd);
7764 }
7765 }
7766 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7767 /* For earlier architectures, we might need the workaround, but do not
7768 enable it by default. If users is running with broken hardware, they
7769 must enable the erratum fix explicitly. */
7770 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7771 }
7772
7773 void
7774 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7775 {
7776 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7777 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7778
7779 if (globals == NULL)
7780 return;
7781
7782 /* We assume only Cortex-M4 may require the fix. */
7783 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7784 || out_attr[Tag_CPU_arch_profile].i != 'M')
7785 {
7786 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7787 /* Give a warning, but do as the user requests anyway. */
7788 (*_bfd_error_handler)
7789 (_("%B: warning: selected STM32L4XX erratum "
7790 "workaround is not necessary for target architecture"), obfd);
7791 }
7792 }
7793
7794 enum bfd_arm_vfp11_pipe
7795 {
7796 VFP11_FMAC,
7797 VFP11_LS,
7798 VFP11_DS,
7799 VFP11_BAD
7800 };
7801
7802 /* Return a VFP register number. This is encoded as RX:X for single-precision
7803 registers, or X:RX for double-precision registers, where RX is the group of
7804 four bits in the instruction encoding and X is the single extension bit.
7805 RX and X fields are specified using their lowest (starting) bit. The return
7806 value is:
7807
7808 0...31: single-precision registers s0...s31
7809 32...63: double-precision registers d0...d31.
7810
7811 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7812 encounter VFP3 instructions, so we allow the full range for DP registers. */
7813
7814 static unsigned int
7815 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7816 unsigned int x)
7817 {
7818 if (is_double)
7819 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7820 else
7821 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7822 }
7823
7824 /* Set bits in *WMASK according to a register number REG as encoded by
7825 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7826
7827 static void
7828 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7829 {
7830 if (reg < 32)
7831 *wmask |= 1 << reg;
7832 else if (reg < 48)
7833 *wmask |= 3 << ((reg - 32) * 2);
7834 }
7835
7836 /* Return TRUE if WMASK overwrites anything in REGS. */
7837
7838 static bfd_boolean
7839 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7840 {
7841 int i;
7842
7843 for (i = 0; i < numregs; i++)
7844 {
7845 unsigned int reg = regs[i];
7846
7847 if (reg < 32 && (wmask & (1 << reg)) != 0)
7848 return TRUE;
7849
7850 reg -= 32;
7851
7852 if (reg >= 16)
7853 continue;
7854
7855 if ((wmask & (3 << (reg * 2))) != 0)
7856 return TRUE;
7857 }
7858
7859 return FALSE;
7860 }
7861
7862 /* In this function, we're interested in two things: finding input registers
7863 for VFP data-processing instructions, and finding the set of registers which
7864 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7865 hold the written set, so FLDM etc. are easy to deal with (we're only
7866 interested in 32 SP registers or 16 dp registers, due to the VFP version
7867 implemented by the chip in question). DP registers are marked by setting
7868 both SP registers in the write mask). */
7869
7870 static enum bfd_arm_vfp11_pipe
7871 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7872 int *numregs)
7873 {
7874 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7875 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7876
7877 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7878 {
7879 unsigned int pqrs;
7880 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7881 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7882
7883 pqrs = ((insn & 0x00800000) >> 20)
7884 | ((insn & 0x00300000) >> 19)
7885 | ((insn & 0x00000040) >> 6);
7886
7887 switch (pqrs)
7888 {
7889 case 0: /* fmac[sd]. */
7890 case 1: /* fnmac[sd]. */
7891 case 2: /* fmsc[sd]. */
7892 case 3: /* fnmsc[sd]. */
7893 vpipe = VFP11_FMAC;
7894 bfd_arm_vfp11_write_mask (destmask, fd);
7895 regs[0] = fd;
7896 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7897 regs[2] = fm;
7898 *numregs = 3;
7899 break;
7900
7901 case 4: /* fmul[sd]. */
7902 case 5: /* fnmul[sd]. */
7903 case 6: /* fadd[sd]. */
7904 case 7: /* fsub[sd]. */
7905 vpipe = VFP11_FMAC;
7906 goto vfp_binop;
7907
7908 case 8: /* fdiv[sd]. */
7909 vpipe = VFP11_DS;
7910 vfp_binop:
7911 bfd_arm_vfp11_write_mask (destmask, fd);
7912 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7913 regs[1] = fm;
7914 *numregs = 2;
7915 break;
7916
7917 case 15: /* extended opcode. */
7918 {
7919 unsigned int extn = ((insn >> 15) & 0x1e)
7920 | ((insn >> 7) & 1);
7921
7922 switch (extn)
7923 {
7924 case 0: /* fcpy[sd]. */
7925 case 1: /* fabs[sd]. */
7926 case 2: /* fneg[sd]. */
7927 case 8: /* fcmp[sd]. */
7928 case 9: /* fcmpe[sd]. */
7929 case 10: /* fcmpz[sd]. */
7930 case 11: /* fcmpez[sd]. */
7931 case 16: /* fuito[sd]. */
7932 case 17: /* fsito[sd]. */
7933 case 24: /* ftoui[sd]. */
7934 case 25: /* ftouiz[sd]. */
7935 case 26: /* ftosi[sd]. */
7936 case 27: /* ftosiz[sd]. */
7937 /* These instructions will not bounce due to underflow. */
7938 *numregs = 0;
7939 vpipe = VFP11_FMAC;
7940 break;
7941
7942 case 3: /* fsqrt[sd]. */
7943 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7944 registers to cause the erratum in previous instructions. */
7945 bfd_arm_vfp11_write_mask (destmask, fd);
7946 vpipe = VFP11_DS;
7947 break;
7948
7949 case 15: /* fcvt{ds,sd}. */
7950 {
7951 int rnum = 0;
7952
7953 bfd_arm_vfp11_write_mask (destmask, fd);
7954
7955 /* Only FCVTSD can underflow. */
7956 if ((insn & 0x100) != 0)
7957 regs[rnum++] = fm;
7958
7959 *numregs = rnum;
7960
7961 vpipe = VFP11_FMAC;
7962 }
7963 break;
7964
7965 default:
7966 return VFP11_BAD;
7967 }
7968 }
7969 break;
7970
7971 default:
7972 return VFP11_BAD;
7973 }
7974 }
7975 /* Two-register transfer. */
7976 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7977 {
7978 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7979
7980 if ((insn & 0x100000) == 0)
7981 {
7982 if (is_double)
7983 bfd_arm_vfp11_write_mask (destmask, fm);
7984 else
7985 {
7986 bfd_arm_vfp11_write_mask (destmask, fm);
7987 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7988 }
7989 }
7990
7991 vpipe = VFP11_LS;
7992 }
7993 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7994 {
7995 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7996 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7997
7998 switch (puw)
7999 {
8000 case 0: /* Two-reg transfer. We should catch these above. */
8001 abort ();
8002
8003 case 2: /* fldm[sdx]. */
8004 case 3:
8005 case 5:
8006 {
8007 unsigned int i, offset = insn & 0xff;
8008
8009 if (is_double)
8010 offset >>= 1;
8011
8012 for (i = fd; i < fd + offset; i++)
8013 bfd_arm_vfp11_write_mask (destmask, i);
8014 }
8015 break;
8016
8017 case 4: /* fld[sd]. */
8018 case 6:
8019 bfd_arm_vfp11_write_mask (destmask, fd);
8020 break;
8021
8022 default:
8023 return VFP11_BAD;
8024 }
8025
8026 vpipe = VFP11_LS;
8027 }
8028 /* Single-register transfer. Note L==0. */
8029 else if ((insn & 0x0f100e10) == 0x0e000a10)
8030 {
8031 unsigned int opcode = (insn >> 21) & 7;
8032 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8033
8034 switch (opcode)
8035 {
8036 case 0: /* fmsr/fmdlr. */
8037 case 1: /* fmdhr. */
8038 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8039 destination register. I don't know if this is exactly right,
8040 but it is the conservative choice. */
8041 bfd_arm_vfp11_write_mask (destmask, fn);
8042 break;
8043
8044 case 7: /* fmxr. */
8045 break;
8046 }
8047
8048 vpipe = VFP11_LS;
8049 }
8050
8051 return vpipe;
8052 }
8053
8054
8055 static int elf32_arm_compare_mapping (const void * a, const void * b);
8056
8057
8058 /* Look for potentially-troublesome code sequences which might trigger the
8059 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8060 (available from ARM) for details of the erratum. A short version is
8061 described in ld.texinfo. */
8062
8063 bfd_boolean
8064 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8065 {
8066 asection *sec;
8067 bfd_byte *contents = NULL;
8068 int state = 0;
8069 int regs[3], numregs = 0;
8070 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8071 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8072
8073 if (globals == NULL)
8074 return FALSE;
8075
8076 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8077 The states transition as follows:
8078
8079 0 -> 1 (vector) or 0 -> 2 (scalar)
8080 A VFP FMAC-pipeline instruction has been seen. Fill
8081 regs[0]..regs[numregs-1] with its input operands. Remember this
8082 instruction in 'first_fmac'.
8083
8084 1 -> 2
8085 Any instruction, except for a VFP instruction which overwrites
8086 regs[*].
8087
8088 1 -> 3 [ -> 0 ] or
8089 2 -> 3 [ -> 0 ]
8090 A VFP instruction has been seen which overwrites any of regs[*].
8091 We must make a veneer! Reset state to 0 before examining next
8092 instruction.
8093
8094 2 -> 0
8095 If we fail to match anything in state 2, reset to state 0 and reset
8096 the instruction pointer to the instruction after 'first_fmac'.
8097
8098 If the VFP11 vector mode is in use, there must be at least two unrelated
8099 instructions between anti-dependent VFP11 instructions to properly avoid
8100 triggering the erratum, hence the use of the extra state 1. */
8101
8102 /* If we are only performing a partial link do not bother
8103 to construct any glue. */
8104 if (bfd_link_relocatable (link_info))
8105 return TRUE;
8106
8107 /* Skip if this bfd does not correspond to an ELF image. */
8108 if (! is_arm_elf (abfd))
8109 return TRUE;
8110
8111 /* We should have chosen a fix type by the time we get here. */
8112 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8113
8114 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8115 return TRUE;
8116
8117 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8118 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8119 return TRUE;
8120
8121 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8122 {
8123 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8124 struct _arm_elf_section_data *sec_data;
8125
8126 /* If we don't have executable progbits, we're not interested in this
8127 section. Also skip if section is to be excluded. */
8128 if (elf_section_type (sec) != SHT_PROGBITS
8129 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8130 || (sec->flags & SEC_EXCLUDE) != 0
8131 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8132 || sec->output_section == bfd_abs_section_ptr
8133 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8134 continue;
8135
8136 sec_data = elf32_arm_section_data (sec);
8137
8138 if (sec_data->mapcount == 0)
8139 continue;
8140
8141 if (elf_section_data (sec)->this_hdr.contents != NULL)
8142 contents = elf_section_data (sec)->this_hdr.contents;
8143 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8144 goto error_return;
8145
8146 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8147 elf32_arm_compare_mapping);
8148
8149 for (span = 0; span < sec_data->mapcount; span++)
8150 {
8151 unsigned int span_start = sec_data->map[span].vma;
8152 unsigned int span_end = (span == sec_data->mapcount - 1)
8153 ? sec->size : sec_data->map[span + 1].vma;
8154 char span_type = sec_data->map[span].type;
8155
8156 /* FIXME: Only ARM mode is supported at present. We may need to
8157 support Thumb-2 mode also at some point. */
8158 if (span_type != 'a')
8159 continue;
8160
8161 for (i = span_start; i < span_end;)
8162 {
8163 unsigned int next_i = i + 4;
8164 unsigned int insn = bfd_big_endian (abfd)
8165 ? (contents[i] << 24)
8166 | (contents[i + 1] << 16)
8167 | (contents[i + 2] << 8)
8168 | contents[i + 3]
8169 : (contents[i + 3] << 24)
8170 | (contents[i + 2] << 16)
8171 | (contents[i + 1] << 8)
8172 | contents[i];
8173 unsigned int writemask = 0;
8174 enum bfd_arm_vfp11_pipe vpipe;
8175
8176 switch (state)
8177 {
8178 case 0:
8179 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8180 &numregs);
8181 /* I'm assuming the VFP11 erratum can trigger with denorm
8182 operands on either the FMAC or the DS pipeline. This might
8183 lead to slightly overenthusiastic veneer insertion. */
8184 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8185 {
8186 state = use_vector ? 1 : 2;
8187 first_fmac = i;
8188 veneer_of_insn = insn;
8189 }
8190 break;
8191
8192 case 1:
8193 {
8194 int other_regs[3], other_numregs;
8195 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8196 other_regs,
8197 &other_numregs);
8198 if (vpipe != VFP11_BAD
8199 && bfd_arm_vfp11_antidependency (writemask, regs,
8200 numregs))
8201 state = 3;
8202 else
8203 state = 2;
8204 }
8205 break;
8206
8207 case 2:
8208 {
8209 int other_regs[3], other_numregs;
8210 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8211 other_regs,
8212 &other_numregs);
8213 if (vpipe != VFP11_BAD
8214 && bfd_arm_vfp11_antidependency (writemask, regs,
8215 numregs))
8216 state = 3;
8217 else
8218 {
8219 state = 0;
8220 next_i = first_fmac + 4;
8221 }
8222 }
8223 break;
8224
8225 case 3:
8226 abort (); /* Should be unreachable. */
8227 }
8228
8229 if (state == 3)
8230 {
8231 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8232 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8233
8234 elf32_arm_section_data (sec)->erratumcount += 1;
8235
8236 newerr->u.b.vfp_insn = veneer_of_insn;
8237
8238 switch (span_type)
8239 {
8240 case 'a':
8241 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8242 break;
8243
8244 default:
8245 abort ();
8246 }
8247
8248 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8249 first_fmac);
8250
8251 newerr->vma = -1;
8252
8253 newerr->next = sec_data->erratumlist;
8254 sec_data->erratumlist = newerr;
8255
8256 state = 0;
8257 }
8258
8259 i = next_i;
8260 }
8261 }
8262
8263 if (contents != NULL
8264 && elf_section_data (sec)->this_hdr.contents != contents)
8265 free (contents);
8266 contents = NULL;
8267 }
8268
8269 return TRUE;
8270
8271 error_return:
8272 if (contents != NULL
8273 && elf_section_data (sec)->this_hdr.contents != contents)
8274 free (contents);
8275
8276 return FALSE;
8277 }
8278
8279 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8280 after sections have been laid out, using specially-named symbols. */
8281
8282 void
8283 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8284 struct bfd_link_info *link_info)
8285 {
8286 asection *sec;
8287 struct elf32_arm_link_hash_table *globals;
8288 char *tmp_name;
8289
8290 if (bfd_link_relocatable (link_info))
8291 return;
8292
8293 /* Skip if this bfd does not correspond to an ELF image. */
8294 if (! is_arm_elf (abfd))
8295 return;
8296
8297 globals = elf32_arm_hash_table (link_info);
8298 if (globals == NULL)
8299 return;
8300
8301 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8302 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8303
8304 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8305 {
8306 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8307 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8308
8309 for (; errnode != NULL; errnode = errnode->next)
8310 {
8311 struct elf_link_hash_entry *myh;
8312 bfd_vma vma;
8313
8314 switch (errnode->type)
8315 {
8316 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8317 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8318 /* Find veneer symbol. */
8319 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8320 errnode->u.b.veneer->u.v.id);
8321
8322 myh = elf_link_hash_lookup
8323 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8324
8325 if (myh == NULL)
8326 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
8327 "`%s'"), abfd, tmp_name);
8328
8329 vma = myh->root.u.def.section->output_section->vma
8330 + myh->root.u.def.section->output_offset
8331 + myh->root.u.def.value;
8332
8333 errnode->u.b.veneer->vma = vma;
8334 break;
8335
8336 case VFP11_ERRATUM_ARM_VENEER:
8337 case VFP11_ERRATUM_THUMB_VENEER:
8338 /* Find return location. */
8339 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8340 errnode->u.v.id);
8341
8342 myh = elf_link_hash_lookup
8343 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8344
8345 if (myh == NULL)
8346 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
8347 "`%s'"), abfd, tmp_name);
8348
8349 vma = myh->root.u.def.section->output_section->vma
8350 + myh->root.u.def.section->output_offset
8351 + myh->root.u.def.value;
8352
8353 errnode->u.v.branch->vma = vma;
8354 break;
8355
8356 default:
8357 abort ();
8358 }
8359 }
8360 }
8361
8362 free (tmp_name);
8363 }
8364
8365 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8366 return locations after sections have been laid out, using
8367 specially-named symbols. */
8368
8369 void
8370 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8371 struct bfd_link_info *link_info)
8372 {
8373 asection *sec;
8374 struct elf32_arm_link_hash_table *globals;
8375 char *tmp_name;
8376
8377 if (bfd_link_relocatable (link_info))
8378 return;
8379
8380 /* Skip if this bfd does not correspond to an ELF image. */
8381 if (! is_arm_elf (abfd))
8382 return;
8383
8384 globals = elf32_arm_hash_table (link_info);
8385 if (globals == NULL)
8386 return;
8387
8388 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8389 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8390
8391 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8392 {
8393 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8394 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8395
8396 for (; errnode != NULL; errnode = errnode->next)
8397 {
8398 struct elf_link_hash_entry *myh;
8399 bfd_vma vma;
8400
8401 switch (errnode->type)
8402 {
8403 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8404 /* Find veneer symbol. */
8405 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8406 errnode->u.b.veneer->u.v.id);
8407
8408 myh = elf_link_hash_lookup
8409 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8410
8411 if (myh == NULL)
8412 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
8413 "`%s'"), abfd, tmp_name);
8414
8415 vma = myh->root.u.def.section->output_section->vma
8416 + myh->root.u.def.section->output_offset
8417 + myh->root.u.def.value;
8418
8419 errnode->u.b.veneer->vma = vma;
8420 break;
8421
8422 case STM32L4XX_ERRATUM_VENEER:
8423 /* Find return location. */
8424 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8425 errnode->u.v.id);
8426
8427 myh = elf_link_hash_lookup
8428 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8429
8430 if (myh == NULL)
8431 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
8432 "`%s'"), abfd, tmp_name);
8433
8434 vma = myh->root.u.def.section->output_section->vma
8435 + myh->root.u.def.section->output_offset
8436 + myh->root.u.def.value;
8437
8438 errnode->u.v.branch->vma = vma;
8439 break;
8440
8441 default:
8442 abort ();
8443 }
8444 }
8445 }
8446
8447 free (tmp_name);
8448 }
8449
8450 static inline bfd_boolean
8451 is_thumb2_ldmia (const insn32 insn)
8452 {
8453 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8454 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8455 return (insn & 0xffd02000) == 0xe8900000;
8456 }
8457
8458 static inline bfd_boolean
8459 is_thumb2_ldmdb (const insn32 insn)
8460 {
8461 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8462 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8463 return (insn & 0xffd02000) == 0xe9100000;
8464 }
8465
8466 static inline bfd_boolean
8467 is_thumb2_vldm (const insn32 insn)
8468 {
8469 /* A6.5 Extension register load or store instruction
8470 A7.7.229
8471 We look for SP 32-bit and DP 64-bit registers.
8472 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8473 <list> is consecutive 64-bit registers
8474 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8475 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8476 <list> is consecutive 32-bit registers
8477 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8478 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8479 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8480 return
8481 (((insn & 0xfe100f00) == 0xec100b00) ||
8482 ((insn & 0xfe100f00) == 0xec100a00))
8483 && /* (IA without !). */
8484 (((((insn << 7) >> 28) & 0xd) == 0x4)
8485 /* (IA with !), includes VPOP (when reg number is SP). */
8486 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8487 /* (DB with !). */
8488 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8489 }
8490
8491 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8492 VLDM opcode and:
8493 - computes the number and the mode of memory accesses
8494 - decides if the replacement should be done:
8495 . replaces only if > 8-word accesses
8496 . or (testing purposes only) replaces all accesses. */
8497
8498 static bfd_boolean
8499 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8500 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8501 {
8502 int nb_words = 0;
8503
8504 /* The field encoding the register list is the same for both LDMIA
8505 and LDMDB encodings. */
8506 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8507 nb_words = popcount (insn & 0x0000ffff);
8508 else if (is_thumb2_vldm (insn))
8509 nb_words = (insn & 0xff);
8510
8511 /* DEFAULT mode accounts for the real bug condition situation,
8512 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8513 return
8514 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8515 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8516 }
8517
8518 /* Look for potentially-troublesome code sequences which might trigger
8519 the STM STM32L4XX erratum. */
8520
8521 bfd_boolean
8522 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8523 struct bfd_link_info *link_info)
8524 {
8525 asection *sec;
8526 bfd_byte *contents = NULL;
8527 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8528
8529 if (globals == NULL)
8530 return FALSE;
8531
8532 /* If we are only performing a partial link do not bother
8533 to construct any glue. */
8534 if (bfd_link_relocatable (link_info))
8535 return TRUE;
8536
8537 /* Skip if this bfd does not correspond to an ELF image. */
8538 if (! is_arm_elf (abfd))
8539 return TRUE;
8540
8541 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8542 return TRUE;
8543
8544 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8545 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8546 return TRUE;
8547
8548 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8549 {
8550 unsigned int i, span;
8551 struct _arm_elf_section_data *sec_data;
8552
8553 /* If we don't have executable progbits, we're not interested in this
8554 section. Also skip if section is to be excluded. */
8555 if (elf_section_type (sec) != SHT_PROGBITS
8556 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8557 || (sec->flags & SEC_EXCLUDE) != 0
8558 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8559 || sec->output_section == bfd_abs_section_ptr
8560 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8561 continue;
8562
8563 sec_data = elf32_arm_section_data (sec);
8564
8565 if (sec_data->mapcount == 0)
8566 continue;
8567
8568 if (elf_section_data (sec)->this_hdr.contents != NULL)
8569 contents = elf_section_data (sec)->this_hdr.contents;
8570 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8571 goto error_return;
8572
8573 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8574 elf32_arm_compare_mapping);
8575
8576 for (span = 0; span < sec_data->mapcount; span++)
8577 {
8578 unsigned int span_start = sec_data->map[span].vma;
8579 unsigned int span_end = (span == sec_data->mapcount - 1)
8580 ? sec->size : sec_data->map[span + 1].vma;
8581 char span_type = sec_data->map[span].type;
8582 int itblock_current_pos = 0;
8583
8584 /* Only Thumb2 mode need be supported with this CM4 specific
8585 code, we should not encounter any arm mode eg span_type
8586 != 'a'. */
8587 if (span_type != 't')
8588 continue;
8589
8590 for (i = span_start; i < span_end;)
8591 {
8592 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8593 bfd_boolean insn_32bit = FALSE;
8594 bfd_boolean is_ldm = FALSE;
8595 bfd_boolean is_vldm = FALSE;
8596 bfd_boolean is_not_last_in_it_block = FALSE;
8597
8598 /* The first 16-bits of all 32-bit thumb2 instructions start
8599 with opcode[15..13]=0b111 and the encoded op1 can be anything
8600 except opcode[12..11]!=0b00.
8601 See 32-bit Thumb instruction encoding. */
8602 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8603 insn_32bit = TRUE;
8604
8605 /* Compute the predicate that tells if the instruction
8606 is concerned by the IT block
8607 - Creates an error if there is a ldm that is not
8608 last in the IT block thus cannot be replaced
8609 - Otherwise we can create a branch at the end of the
8610 IT block, it will be controlled naturally by IT
8611 with the proper pseudo-predicate
8612 - So the only interesting predicate is the one that
8613 tells that we are not on the last item of an IT
8614 block. */
8615 if (itblock_current_pos != 0)
8616 is_not_last_in_it_block = !!--itblock_current_pos;
8617
8618 if (insn_32bit)
8619 {
8620 /* Load the rest of the insn (in manual-friendly order). */
8621 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8622 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8623 is_vldm = is_thumb2_vldm (insn);
8624
8625 /* Veneers are created for (v)ldm depending on
8626 option flags and memory accesses conditions; but
8627 if the instruction is not the last instruction of
8628 an IT block, we cannot create a jump there, so we
8629 bail out. */
8630 if ((is_ldm || is_vldm)
8631 && stm32l4xx_need_create_replacing_stub
8632 (insn, globals->stm32l4xx_fix))
8633 {
8634 if (is_not_last_in_it_block)
8635 {
8636 (*_bfd_error_handler)
8637 /* Note - overlong line used here to allow for translation. */
8638 (_("\
8639 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
8640 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
8641 abfd, sec, (long)i);
8642 }
8643 else
8644 {
8645 elf32_stm32l4xx_erratum_list *newerr =
8646 (elf32_stm32l4xx_erratum_list *)
8647 bfd_zmalloc
8648 (sizeof (elf32_stm32l4xx_erratum_list));
8649
8650 elf32_arm_section_data (sec)
8651 ->stm32l4xx_erratumcount += 1;
8652 newerr->u.b.insn = insn;
8653 /* We create only thumb branches. */
8654 newerr->type =
8655 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8656 record_stm32l4xx_erratum_veneer
8657 (link_info, newerr, abfd, sec,
8658 i,
8659 is_ldm ?
8660 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8661 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8662 newerr->vma = -1;
8663 newerr->next = sec_data->stm32l4xx_erratumlist;
8664 sec_data->stm32l4xx_erratumlist = newerr;
8665 }
8666 }
8667 }
8668 else
8669 {
8670 /* A7.7.37 IT p208
8671 IT blocks are only encoded in T1
8672 Encoding T1: IT{x{y{z}}} <firstcond>
8673 1 0 1 1 - 1 1 1 1 - firstcond - mask
8674 if mask = '0000' then see 'related encodings'
8675 We don't deal with UNPREDICTABLE, just ignore these.
8676 There can be no nested IT blocks so an IT block
8677 is naturally a new one for which it is worth
8678 computing its size. */
8679 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8680 && ((insn & 0x000f) != 0x0000);
8681 /* If we have a new IT block we compute its size. */
8682 if (is_newitblock)
8683 {
8684 /* Compute the number of instructions controlled
8685 by the IT block, it will be used to decide
8686 whether we are inside an IT block or not. */
8687 unsigned int mask = insn & 0x000f;
8688 itblock_current_pos = 4 - ctz (mask);
8689 }
8690 }
8691
8692 i += insn_32bit ? 4 : 2;
8693 }
8694 }
8695
8696 if (contents != NULL
8697 && elf_section_data (sec)->this_hdr.contents != contents)
8698 free (contents);
8699 contents = NULL;
8700 }
8701
8702 return TRUE;
8703
8704 error_return:
8705 if (contents != NULL
8706 && elf_section_data (sec)->this_hdr.contents != contents)
8707 free (contents);
8708
8709 return FALSE;
8710 }
8711
8712 /* Set target relocation values needed during linking. */
8713
8714 void
8715 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8716 struct bfd_link_info *link_info,
8717 struct elf32_arm_params *params)
8718 {
8719 struct elf32_arm_link_hash_table *globals;
8720
8721 globals = elf32_arm_hash_table (link_info);
8722 if (globals == NULL)
8723 return;
8724
8725 globals->target1_is_rel = params->target1_is_rel;
8726 if (strcmp (params->target2_type, "rel") == 0)
8727 globals->target2_reloc = R_ARM_REL32;
8728 else if (strcmp (params->target2_type, "abs") == 0)
8729 globals->target2_reloc = R_ARM_ABS32;
8730 else if (strcmp (params->target2_type, "got-rel") == 0)
8731 globals->target2_reloc = R_ARM_GOT_PREL;
8732 else
8733 {
8734 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8735 params->target2_type);
8736 }
8737 globals->fix_v4bx = params->fix_v4bx;
8738 globals->use_blx |= params->use_blx;
8739 globals->vfp11_fix = params->vfp11_denorm_fix;
8740 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8741 globals->pic_veneer = params->pic_veneer;
8742 globals->fix_cortex_a8 = params->fix_cortex_a8;
8743 globals->fix_arm1176 = params->fix_arm1176;
8744 globals->cmse_implib = params->cmse_implib;
8745 globals->in_implib_bfd = params->in_implib_bfd;
8746
8747 BFD_ASSERT (is_arm_elf (output_bfd));
8748 elf_arm_tdata (output_bfd)->no_enum_size_warning
8749 = params->no_enum_size_warning;
8750 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8751 = params->no_wchar_size_warning;
8752 }
8753
8754 /* Replace the target offset of a Thumb bl or b.w instruction. */
8755
8756 static void
8757 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8758 {
8759 bfd_vma upper;
8760 bfd_vma lower;
8761 int reloc_sign;
8762
8763 BFD_ASSERT ((offset & 1) == 0);
8764
8765 upper = bfd_get_16 (abfd, insn);
8766 lower = bfd_get_16 (abfd, insn + 2);
8767 reloc_sign = (offset < 0) ? 1 : 0;
8768 upper = (upper & ~(bfd_vma) 0x7ff)
8769 | ((offset >> 12) & 0x3ff)
8770 | (reloc_sign << 10);
8771 lower = (lower & ~(bfd_vma) 0x2fff)
8772 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8773 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8774 | ((offset >> 1) & 0x7ff);
8775 bfd_put_16 (abfd, upper, insn);
8776 bfd_put_16 (abfd, lower, insn + 2);
8777 }
8778
8779 /* Thumb code calling an ARM function. */
8780
8781 static int
8782 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8783 const char * name,
8784 bfd * input_bfd,
8785 bfd * output_bfd,
8786 asection * input_section,
8787 bfd_byte * hit_data,
8788 asection * sym_sec,
8789 bfd_vma offset,
8790 bfd_signed_vma addend,
8791 bfd_vma val,
8792 char **error_message)
8793 {
8794 asection * s = 0;
8795 bfd_vma my_offset;
8796 long int ret_offset;
8797 struct elf_link_hash_entry * myh;
8798 struct elf32_arm_link_hash_table * globals;
8799
8800 myh = find_thumb_glue (info, name, error_message);
8801 if (myh == NULL)
8802 return FALSE;
8803
8804 globals = elf32_arm_hash_table (info);
8805 BFD_ASSERT (globals != NULL);
8806 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8807
8808 my_offset = myh->root.u.def.value;
8809
8810 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8811 THUMB2ARM_GLUE_SECTION_NAME);
8812
8813 BFD_ASSERT (s != NULL);
8814 BFD_ASSERT (s->contents != NULL);
8815 BFD_ASSERT (s->output_section != NULL);
8816
8817 if ((my_offset & 0x01) == 0x01)
8818 {
8819 if (sym_sec != NULL
8820 && sym_sec->owner != NULL
8821 && !INTERWORK_FLAG (sym_sec->owner))
8822 {
8823 (*_bfd_error_handler)
8824 (_("%B(%s): warning: interworking not enabled.\n"
8825 " first occurrence: %B: Thumb call to ARM"),
8826 sym_sec->owner, input_bfd, name);
8827
8828 return FALSE;
8829 }
8830
8831 --my_offset;
8832 myh->root.u.def.value = my_offset;
8833
8834 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8835 s->contents + my_offset);
8836
8837 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8838 s->contents + my_offset + 2);
8839
8840 ret_offset =
8841 /* Address of destination of the stub. */
8842 ((bfd_signed_vma) val)
8843 - ((bfd_signed_vma)
8844 /* Offset from the start of the current section
8845 to the start of the stubs. */
8846 (s->output_offset
8847 /* Offset of the start of this stub from the start of the stubs. */
8848 + my_offset
8849 /* Address of the start of the current section. */
8850 + s->output_section->vma)
8851 /* The branch instruction is 4 bytes into the stub. */
8852 + 4
8853 /* ARM branches work from the pc of the instruction + 8. */
8854 + 8);
8855
8856 put_arm_insn (globals, output_bfd,
8857 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8858 s->contents + my_offset + 4);
8859 }
8860
8861 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8862
8863 /* Now go back and fix up the original BL insn to point to here. */
8864 ret_offset =
8865 /* Address of where the stub is located. */
8866 (s->output_section->vma + s->output_offset + my_offset)
8867 /* Address of where the BL is located. */
8868 - (input_section->output_section->vma + input_section->output_offset
8869 + offset)
8870 /* Addend in the relocation. */
8871 - addend
8872 /* Biassing for PC-relative addressing. */
8873 - 8;
8874
8875 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8876
8877 return TRUE;
8878 }
8879
8880 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8881
8882 static struct elf_link_hash_entry *
8883 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8884 const char * name,
8885 bfd * input_bfd,
8886 bfd * output_bfd,
8887 asection * sym_sec,
8888 bfd_vma val,
8889 asection * s,
8890 char ** error_message)
8891 {
8892 bfd_vma my_offset;
8893 long int ret_offset;
8894 struct elf_link_hash_entry * myh;
8895 struct elf32_arm_link_hash_table * globals;
8896
8897 myh = find_arm_glue (info, name, error_message);
8898 if (myh == NULL)
8899 return NULL;
8900
8901 globals = elf32_arm_hash_table (info);
8902 BFD_ASSERT (globals != NULL);
8903 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8904
8905 my_offset = myh->root.u.def.value;
8906
8907 if ((my_offset & 0x01) == 0x01)
8908 {
8909 if (sym_sec != NULL
8910 && sym_sec->owner != NULL
8911 && !INTERWORK_FLAG (sym_sec->owner))
8912 {
8913 (*_bfd_error_handler)
8914 (_("%B(%s): warning: interworking not enabled.\n"
8915 " first occurrence: %B: arm call to thumb"),
8916 sym_sec->owner, input_bfd, name);
8917 }
8918
8919 --my_offset;
8920 myh->root.u.def.value = my_offset;
8921
8922 if (bfd_link_pic (info)
8923 || globals->root.is_relocatable_executable
8924 || globals->pic_veneer)
8925 {
8926 /* For relocatable objects we can't use absolute addresses,
8927 so construct the address from a relative offset. */
8928 /* TODO: If the offset is small it's probably worth
8929 constructing the address with adds. */
8930 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8931 s->contents + my_offset);
8932 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8933 s->contents + my_offset + 4);
8934 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8935 s->contents + my_offset + 8);
8936 /* Adjust the offset by 4 for the position of the add,
8937 and 8 for the pipeline offset. */
8938 ret_offset = (val - (s->output_offset
8939 + s->output_section->vma
8940 + my_offset + 12))
8941 | 1;
8942 bfd_put_32 (output_bfd, ret_offset,
8943 s->contents + my_offset + 12);
8944 }
8945 else if (globals->use_blx)
8946 {
8947 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8948 s->contents + my_offset);
8949
8950 /* It's a thumb address. Add the low order bit. */
8951 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8952 s->contents + my_offset + 4);
8953 }
8954 else
8955 {
8956 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8957 s->contents + my_offset);
8958
8959 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8960 s->contents + my_offset + 4);
8961
8962 /* It's a thumb address. Add the low order bit. */
8963 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8964 s->contents + my_offset + 8);
8965
8966 my_offset += 12;
8967 }
8968 }
8969
8970 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8971
8972 return myh;
8973 }
8974
8975 /* Arm code calling a Thumb function. */
8976
8977 static int
8978 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8979 const char * name,
8980 bfd * input_bfd,
8981 bfd * output_bfd,
8982 asection * input_section,
8983 bfd_byte * hit_data,
8984 asection * sym_sec,
8985 bfd_vma offset,
8986 bfd_signed_vma addend,
8987 bfd_vma val,
8988 char **error_message)
8989 {
8990 unsigned long int tmp;
8991 bfd_vma my_offset;
8992 asection * s;
8993 long int ret_offset;
8994 struct elf_link_hash_entry * myh;
8995 struct elf32_arm_link_hash_table * globals;
8996
8997 globals = elf32_arm_hash_table (info);
8998 BFD_ASSERT (globals != NULL);
8999 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9000
9001 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9002 ARM2THUMB_GLUE_SECTION_NAME);
9003 BFD_ASSERT (s != NULL);
9004 BFD_ASSERT (s->contents != NULL);
9005 BFD_ASSERT (s->output_section != NULL);
9006
9007 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9008 sym_sec, val, s, error_message);
9009 if (!myh)
9010 return FALSE;
9011
9012 my_offset = myh->root.u.def.value;
9013 tmp = bfd_get_32 (input_bfd, hit_data);
9014 tmp = tmp & 0xFF000000;
9015
9016 /* Somehow these are both 4 too far, so subtract 8. */
9017 ret_offset = (s->output_offset
9018 + my_offset
9019 + s->output_section->vma
9020 - (input_section->output_offset
9021 + input_section->output_section->vma
9022 + offset + addend)
9023 - 8);
9024
9025 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9026
9027 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9028
9029 return TRUE;
9030 }
9031
9032 /* Populate Arm stub for an exported Thumb function. */
9033
9034 static bfd_boolean
9035 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9036 {
9037 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9038 asection * s;
9039 struct elf_link_hash_entry * myh;
9040 struct elf32_arm_link_hash_entry *eh;
9041 struct elf32_arm_link_hash_table * globals;
9042 asection *sec;
9043 bfd_vma val;
9044 char *error_message;
9045
9046 eh = elf32_arm_hash_entry (h);
9047 /* Allocate stubs for exported Thumb functions on v4t. */
9048 if (eh->export_glue == NULL)
9049 return TRUE;
9050
9051 globals = elf32_arm_hash_table (info);
9052 BFD_ASSERT (globals != NULL);
9053 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9054
9055 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9056 ARM2THUMB_GLUE_SECTION_NAME);
9057 BFD_ASSERT (s != NULL);
9058 BFD_ASSERT (s->contents != NULL);
9059 BFD_ASSERT (s->output_section != NULL);
9060
9061 sec = eh->export_glue->root.u.def.section;
9062
9063 BFD_ASSERT (sec->output_section != NULL);
9064
9065 val = eh->export_glue->root.u.def.value + sec->output_offset
9066 + sec->output_section->vma;
9067
9068 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9069 h->root.u.def.section->owner,
9070 globals->obfd, sec, val, s,
9071 &error_message);
9072 BFD_ASSERT (myh);
9073 return TRUE;
9074 }
9075
9076 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9077
9078 static bfd_vma
9079 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9080 {
9081 bfd_byte *p;
9082 bfd_vma glue_addr;
9083 asection *s;
9084 struct elf32_arm_link_hash_table *globals;
9085
9086 globals = elf32_arm_hash_table (info);
9087 BFD_ASSERT (globals != NULL);
9088 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9089
9090 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9091 ARM_BX_GLUE_SECTION_NAME);
9092 BFD_ASSERT (s != NULL);
9093 BFD_ASSERT (s->contents != NULL);
9094 BFD_ASSERT (s->output_section != NULL);
9095
9096 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9097
9098 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9099
9100 if ((globals->bx_glue_offset[reg] & 1) == 0)
9101 {
9102 p = s->contents + glue_addr;
9103 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9104 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9105 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9106 globals->bx_glue_offset[reg] |= 1;
9107 }
9108
9109 return glue_addr + s->output_section->vma + s->output_offset;
9110 }
9111
9112 /* Generate Arm stubs for exported Thumb symbols. */
9113 static void
9114 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9115 struct bfd_link_info *link_info)
9116 {
9117 struct elf32_arm_link_hash_table * globals;
9118
9119 if (link_info == NULL)
9120 /* Ignore this if we are not called by the ELF backend linker. */
9121 return;
9122
9123 globals = elf32_arm_hash_table (link_info);
9124 if (globals == NULL)
9125 return;
9126
9127 /* If blx is available then exported Thumb symbols are OK and there is
9128 nothing to do. */
9129 if (globals->use_blx)
9130 return;
9131
9132 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9133 link_info);
9134 }
9135
9136 /* Reserve space for COUNT dynamic relocations in relocation selection
9137 SRELOC. */
9138
9139 static void
9140 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9141 bfd_size_type count)
9142 {
9143 struct elf32_arm_link_hash_table *htab;
9144
9145 htab = elf32_arm_hash_table (info);
9146 BFD_ASSERT (htab->root.dynamic_sections_created);
9147 if (sreloc == NULL)
9148 abort ();
9149 sreloc->size += RELOC_SIZE (htab) * count;
9150 }
9151
9152 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9153 dynamic, the relocations should go in SRELOC, otherwise they should
9154 go in the special .rel.iplt section. */
9155
9156 static void
9157 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9158 bfd_size_type count)
9159 {
9160 struct elf32_arm_link_hash_table *htab;
9161
9162 htab = elf32_arm_hash_table (info);
9163 if (!htab->root.dynamic_sections_created)
9164 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9165 else
9166 {
9167 BFD_ASSERT (sreloc != NULL);
9168 sreloc->size += RELOC_SIZE (htab) * count;
9169 }
9170 }
9171
9172 /* Add relocation REL to the end of relocation section SRELOC. */
9173
9174 static void
9175 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9176 asection *sreloc, Elf_Internal_Rela *rel)
9177 {
9178 bfd_byte *loc;
9179 struct elf32_arm_link_hash_table *htab;
9180
9181 htab = elf32_arm_hash_table (info);
9182 if (!htab->root.dynamic_sections_created
9183 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9184 sreloc = htab->root.irelplt;
9185 if (sreloc == NULL)
9186 abort ();
9187 loc = sreloc->contents;
9188 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9189 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9190 abort ();
9191 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9192 }
9193
9194 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9195 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9196 to .plt. */
9197
9198 static void
9199 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9200 bfd_boolean is_iplt_entry,
9201 union gotplt_union *root_plt,
9202 struct arm_plt_info *arm_plt)
9203 {
9204 struct elf32_arm_link_hash_table *htab;
9205 asection *splt;
9206 asection *sgotplt;
9207
9208 htab = elf32_arm_hash_table (info);
9209
9210 if (is_iplt_entry)
9211 {
9212 splt = htab->root.iplt;
9213 sgotplt = htab->root.igotplt;
9214
9215 /* NaCl uses a special first entry in .iplt too. */
9216 if (htab->nacl_p && splt->size == 0)
9217 splt->size += htab->plt_header_size;
9218
9219 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9220 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9221 }
9222 else
9223 {
9224 splt = htab->root.splt;
9225 sgotplt = htab->root.sgotplt;
9226
9227 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9228 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9229
9230 /* If this is the first .plt entry, make room for the special
9231 first entry. */
9232 if (splt->size == 0)
9233 splt->size += htab->plt_header_size;
9234
9235 htab->next_tls_desc_index++;
9236 }
9237
9238 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9239 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9240 splt->size += PLT_THUMB_STUB_SIZE;
9241 root_plt->offset = splt->size;
9242 splt->size += htab->plt_entry_size;
9243
9244 if (!htab->symbian_p)
9245 {
9246 /* We also need to make an entry in the .got.plt section, which
9247 will be placed in the .got section by the linker script. */
9248 if (is_iplt_entry)
9249 arm_plt->got_offset = sgotplt->size;
9250 else
9251 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9252 sgotplt->size += 4;
9253 }
9254 }
9255
9256 static bfd_vma
9257 arm_movw_immediate (bfd_vma value)
9258 {
9259 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9260 }
9261
9262 static bfd_vma
9263 arm_movt_immediate (bfd_vma value)
9264 {
9265 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9266 }
9267
9268 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9269 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9270 Otherwise, DYNINDX is the index of the symbol in the dynamic
9271 symbol table and SYM_VALUE is undefined.
9272
9273 ROOT_PLT points to the offset of the PLT entry from the start of its
9274 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9275 bookkeeping information.
9276
9277 Returns FALSE if there was a problem. */
9278
9279 static bfd_boolean
9280 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9281 union gotplt_union *root_plt,
9282 struct arm_plt_info *arm_plt,
9283 int dynindx, bfd_vma sym_value)
9284 {
9285 struct elf32_arm_link_hash_table *htab;
9286 asection *sgot;
9287 asection *splt;
9288 asection *srel;
9289 bfd_byte *loc;
9290 bfd_vma plt_index;
9291 Elf_Internal_Rela rel;
9292 bfd_vma plt_header_size;
9293 bfd_vma got_header_size;
9294
9295 htab = elf32_arm_hash_table (info);
9296
9297 /* Pick the appropriate sections and sizes. */
9298 if (dynindx == -1)
9299 {
9300 splt = htab->root.iplt;
9301 sgot = htab->root.igotplt;
9302 srel = htab->root.irelplt;
9303
9304 /* There are no reserved entries in .igot.plt, and no special
9305 first entry in .iplt. */
9306 got_header_size = 0;
9307 plt_header_size = 0;
9308 }
9309 else
9310 {
9311 splt = htab->root.splt;
9312 sgot = htab->root.sgotplt;
9313 srel = htab->root.srelplt;
9314
9315 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9316 plt_header_size = htab->plt_header_size;
9317 }
9318 BFD_ASSERT (splt != NULL && srel != NULL);
9319
9320 /* Fill in the entry in the procedure linkage table. */
9321 if (htab->symbian_p)
9322 {
9323 BFD_ASSERT (dynindx >= 0);
9324 put_arm_insn (htab, output_bfd,
9325 elf32_arm_symbian_plt_entry[0],
9326 splt->contents + root_plt->offset);
9327 bfd_put_32 (output_bfd,
9328 elf32_arm_symbian_plt_entry[1],
9329 splt->contents + root_plt->offset + 4);
9330
9331 /* Fill in the entry in the .rel.plt section. */
9332 rel.r_offset = (splt->output_section->vma
9333 + splt->output_offset
9334 + root_plt->offset + 4);
9335 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9336
9337 /* Get the index in the procedure linkage table which
9338 corresponds to this symbol. This is the index of this symbol
9339 in all the symbols for which we are making plt entries. The
9340 first entry in the procedure linkage table is reserved. */
9341 plt_index = ((root_plt->offset - plt_header_size)
9342 / htab->plt_entry_size);
9343 }
9344 else
9345 {
9346 bfd_vma got_offset, got_address, plt_address;
9347 bfd_vma got_displacement, initial_got_entry;
9348 bfd_byte * ptr;
9349
9350 BFD_ASSERT (sgot != NULL);
9351
9352 /* Get the offset into the .(i)got.plt table of the entry that
9353 corresponds to this function. */
9354 got_offset = (arm_plt->got_offset & -2);
9355
9356 /* Get the index in the procedure linkage table which
9357 corresponds to this symbol. This is the index of this symbol
9358 in all the symbols for which we are making plt entries.
9359 After the reserved .got.plt entries, all symbols appear in
9360 the same order as in .plt. */
9361 plt_index = (got_offset - got_header_size) / 4;
9362
9363 /* Calculate the address of the GOT entry. */
9364 got_address = (sgot->output_section->vma
9365 + sgot->output_offset
9366 + got_offset);
9367
9368 /* ...and the address of the PLT entry. */
9369 plt_address = (splt->output_section->vma
9370 + splt->output_offset
9371 + root_plt->offset);
9372
9373 ptr = splt->contents + root_plt->offset;
9374 if (htab->vxworks_p && bfd_link_pic (info))
9375 {
9376 unsigned int i;
9377 bfd_vma val;
9378
9379 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9380 {
9381 val = elf32_arm_vxworks_shared_plt_entry[i];
9382 if (i == 2)
9383 val |= got_address - sgot->output_section->vma;
9384 if (i == 5)
9385 val |= plt_index * RELOC_SIZE (htab);
9386 if (i == 2 || i == 5)
9387 bfd_put_32 (output_bfd, val, ptr);
9388 else
9389 put_arm_insn (htab, output_bfd, val, ptr);
9390 }
9391 }
9392 else if (htab->vxworks_p)
9393 {
9394 unsigned int i;
9395 bfd_vma val;
9396
9397 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9398 {
9399 val = elf32_arm_vxworks_exec_plt_entry[i];
9400 if (i == 2)
9401 val |= got_address;
9402 if (i == 4)
9403 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9404 if (i == 5)
9405 val |= plt_index * RELOC_SIZE (htab);
9406 if (i == 2 || i == 5)
9407 bfd_put_32 (output_bfd, val, ptr);
9408 else
9409 put_arm_insn (htab, output_bfd, val, ptr);
9410 }
9411
9412 loc = (htab->srelplt2->contents
9413 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9414
9415 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9416 referencing the GOT for this PLT entry. */
9417 rel.r_offset = plt_address + 8;
9418 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9419 rel.r_addend = got_offset;
9420 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9421 loc += RELOC_SIZE (htab);
9422
9423 /* Create the R_ARM_ABS32 relocation referencing the
9424 beginning of the PLT for this GOT entry. */
9425 rel.r_offset = got_address;
9426 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9427 rel.r_addend = 0;
9428 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9429 }
9430 else if (htab->nacl_p)
9431 {
9432 /* Calculate the displacement between the PLT slot and the
9433 common tail that's part of the special initial PLT slot. */
9434 int32_t tail_displacement
9435 = ((splt->output_section->vma + splt->output_offset
9436 + ARM_NACL_PLT_TAIL_OFFSET)
9437 - (plt_address + htab->plt_entry_size + 4));
9438 BFD_ASSERT ((tail_displacement & 3) == 0);
9439 tail_displacement >>= 2;
9440
9441 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9442 || (-tail_displacement & 0xff000000) == 0);
9443
9444 /* Calculate the displacement between the PLT slot and the entry
9445 in the GOT. The offset accounts for the value produced by
9446 adding to pc in the penultimate instruction of the PLT stub. */
9447 got_displacement = (got_address
9448 - (plt_address + htab->plt_entry_size));
9449
9450 /* NaCl does not support interworking at all. */
9451 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9452
9453 put_arm_insn (htab, output_bfd,
9454 elf32_arm_nacl_plt_entry[0]
9455 | arm_movw_immediate (got_displacement),
9456 ptr + 0);
9457 put_arm_insn (htab, output_bfd,
9458 elf32_arm_nacl_plt_entry[1]
9459 | arm_movt_immediate (got_displacement),
9460 ptr + 4);
9461 put_arm_insn (htab, output_bfd,
9462 elf32_arm_nacl_plt_entry[2],
9463 ptr + 8);
9464 put_arm_insn (htab, output_bfd,
9465 elf32_arm_nacl_plt_entry[3]
9466 | (tail_displacement & 0x00ffffff),
9467 ptr + 12);
9468 }
9469 else if (using_thumb_only (htab))
9470 {
9471 /* PR ld/16017: Generate thumb only PLT entries. */
9472 if (!using_thumb2 (htab))
9473 {
9474 /* FIXME: We ought to be able to generate thumb-1 PLT
9475 instructions... */
9476 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9477 output_bfd);
9478 return FALSE;
9479 }
9480
9481 /* Calculate the displacement between the PLT slot and the entry in
9482 the GOT. The 12-byte offset accounts for the value produced by
9483 adding to pc in the 3rd instruction of the PLT stub. */
9484 got_displacement = got_address - (plt_address + 12);
9485
9486 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9487 instead of 'put_thumb_insn'. */
9488 put_arm_insn (htab, output_bfd,
9489 elf32_thumb2_plt_entry[0]
9490 | ((got_displacement & 0x000000ff) << 16)
9491 | ((got_displacement & 0x00000700) << 20)
9492 | ((got_displacement & 0x00000800) >> 1)
9493 | ((got_displacement & 0x0000f000) >> 12),
9494 ptr + 0);
9495 put_arm_insn (htab, output_bfd,
9496 elf32_thumb2_plt_entry[1]
9497 | ((got_displacement & 0x00ff0000) )
9498 | ((got_displacement & 0x07000000) << 4)
9499 | ((got_displacement & 0x08000000) >> 17)
9500 | ((got_displacement & 0xf0000000) >> 28),
9501 ptr + 4);
9502 put_arm_insn (htab, output_bfd,
9503 elf32_thumb2_plt_entry[2],
9504 ptr + 8);
9505 put_arm_insn (htab, output_bfd,
9506 elf32_thumb2_plt_entry[3],
9507 ptr + 12);
9508 }
9509 else
9510 {
9511 /* Calculate the displacement between the PLT slot and the
9512 entry in the GOT. The eight-byte offset accounts for the
9513 value produced by adding to pc in the first instruction
9514 of the PLT stub. */
9515 got_displacement = got_address - (plt_address + 8);
9516
9517 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9518 {
9519 put_thumb_insn (htab, output_bfd,
9520 elf32_arm_plt_thumb_stub[0], ptr - 4);
9521 put_thumb_insn (htab, output_bfd,
9522 elf32_arm_plt_thumb_stub[1], ptr - 2);
9523 }
9524
9525 if (!elf32_arm_use_long_plt_entry)
9526 {
9527 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9528
9529 put_arm_insn (htab, output_bfd,
9530 elf32_arm_plt_entry_short[0]
9531 | ((got_displacement & 0x0ff00000) >> 20),
9532 ptr + 0);
9533 put_arm_insn (htab, output_bfd,
9534 elf32_arm_plt_entry_short[1]
9535 | ((got_displacement & 0x000ff000) >> 12),
9536 ptr+ 4);
9537 put_arm_insn (htab, output_bfd,
9538 elf32_arm_plt_entry_short[2]
9539 | (got_displacement & 0x00000fff),
9540 ptr + 8);
9541 #ifdef FOUR_WORD_PLT
9542 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9543 #endif
9544 }
9545 else
9546 {
9547 put_arm_insn (htab, output_bfd,
9548 elf32_arm_plt_entry_long[0]
9549 | ((got_displacement & 0xf0000000) >> 28),
9550 ptr + 0);
9551 put_arm_insn (htab, output_bfd,
9552 elf32_arm_plt_entry_long[1]
9553 | ((got_displacement & 0x0ff00000) >> 20),
9554 ptr + 4);
9555 put_arm_insn (htab, output_bfd,
9556 elf32_arm_plt_entry_long[2]
9557 | ((got_displacement & 0x000ff000) >> 12),
9558 ptr+ 8);
9559 put_arm_insn (htab, output_bfd,
9560 elf32_arm_plt_entry_long[3]
9561 | (got_displacement & 0x00000fff),
9562 ptr + 12);
9563 }
9564 }
9565
9566 /* Fill in the entry in the .rel(a).(i)plt section. */
9567 rel.r_offset = got_address;
9568 rel.r_addend = 0;
9569 if (dynindx == -1)
9570 {
9571 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9572 The dynamic linker or static executable then calls SYM_VALUE
9573 to determine the correct run-time value of the .igot.plt entry. */
9574 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9575 initial_got_entry = sym_value;
9576 }
9577 else
9578 {
9579 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9580 initial_got_entry = (splt->output_section->vma
9581 + splt->output_offset);
9582 }
9583
9584 /* Fill in the entry in the global offset table. */
9585 bfd_put_32 (output_bfd, initial_got_entry,
9586 sgot->contents + got_offset);
9587 }
9588
9589 if (dynindx == -1)
9590 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9591 else
9592 {
9593 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9594 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9595 }
9596
9597 return TRUE;
9598 }
9599
9600 /* Some relocations map to different relocations depending on the
9601 target. Return the real relocation. */
9602
9603 static int
9604 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9605 int r_type)
9606 {
9607 switch (r_type)
9608 {
9609 case R_ARM_TARGET1:
9610 if (globals->target1_is_rel)
9611 return R_ARM_REL32;
9612 else
9613 return R_ARM_ABS32;
9614
9615 case R_ARM_TARGET2:
9616 return globals->target2_reloc;
9617
9618 default:
9619 return r_type;
9620 }
9621 }
9622
9623 /* Return the base VMA address which should be subtracted from real addresses
9624 when resolving @dtpoff relocation.
9625 This is PT_TLS segment p_vaddr. */
9626
9627 static bfd_vma
9628 dtpoff_base (struct bfd_link_info *info)
9629 {
9630 /* If tls_sec is NULL, we should have signalled an error already. */
9631 if (elf_hash_table (info)->tls_sec == NULL)
9632 return 0;
9633 return elf_hash_table (info)->tls_sec->vma;
9634 }
9635
9636 /* Return the relocation value for @tpoff relocation
9637 if STT_TLS virtual address is ADDRESS. */
9638
9639 static bfd_vma
9640 tpoff (struct bfd_link_info *info, bfd_vma address)
9641 {
9642 struct elf_link_hash_table *htab = elf_hash_table (info);
9643 bfd_vma base;
9644
9645 /* If tls_sec is NULL, we should have signalled an error already. */
9646 if (htab->tls_sec == NULL)
9647 return 0;
9648 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9649 return address - htab->tls_sec->vma + base;
9650 }
9651
9652 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9653 VALUE is the relocation value. */
9654
9655 static bfd_reloc_status_type
9656 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9657 {
9658 if (value > 0xfff)
9659 return bfd_reloc_overflow;
9660
9661 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9662 bfd_put_32 (abfd, value, data);
9663 return bfd_reloc_ok;
9664 }
9665
9666 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9667 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9668 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9669
9670 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9671 is to then call final_link_relocate. Return other values in the
9672 case of error.
9673
9674 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9675 the pre-relaxed code. It would be nice if the relocs were updated
9676 to match the optimization. */
9677
9678 static bfd_reloc_status_type
9679 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9680 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9681 Elf_Internal_Rela *rel, unsigned long is_local)
9682 {
9683 unsigned long insn;
9684
9685 switch (ELF32_R_TYPE (rel->r_info))
9686 {
9687 default:
9688 return bfd_reloc_notsupported;
9689
9690 case R_ARM_TLS_GOTDESC:
9691 if (is_local)
9692 insn = 0;
9693 else
9694 {
9695 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9696 if (insn & 1)
9697 insn -= 5; /* THUMB */
9698 else
9699 insn -= 8; /* ARM */
9700 }
9701 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9702 return bfd_reloc_continue;
9703
9704 case R_ARM_THM_TLS_DESCSEQ:
9705 /* Thumb insn. */
9706 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9707 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9708 {
9709 if (is_local)
9710 /* nop */
9711 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9712 }
9713 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9714 {
9715 if (is_local)
9716 /* nop */
9717 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9718 else
9719 /* ldr rx,[ry] */
9720 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9721 }
9722 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9723 {
9724 if (is_local)
9725 /* nop */
9726 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9727 else
9728 /* mov r0, rx */
9729 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9730 contents + rel->r_offset);
9731 }
9732 else
9733 {
9734 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9735 /* It's a 32 bit instruction, fetch the rest of it for
9736 error generation. */
9737 insn = (insn << 16)
9738 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9739 (*_bfd_error_handler)
9740 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
9741 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9742 return bfd_reloc_notsupported;
9743 }
9744 break;
9745
9746 case R_ARM_TLS_DESCSEQ:
9747 /* arm insn. */
9748 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9749 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9750 {
9751 if (is_local)
9752 /* mov rx, ry */
9753 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9754 contents + rel->r_offset);
9755 }
9756 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9757 {
9758 if (is_local)
9759 /* nop */
9760 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9761 else
9762 /* ldr rx,[ry] */
9763 bfd_put_32 (input_bfd, insn & 0xfffff000,
9764 contents + rel->r_offset);
9765 }
9766 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9767 {
9768 if (is_local)
9769 /* nop */
9770 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9771 else
9772 /* mov r0, rx */
9773 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9774 contents + rel->r_offset);
9775 }
9776 else
9777 {
9778 (*_bfd_error_handler)
9779 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
9780 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9781 return bfd_reloc_notsupported;
9782 }
9783 break;
9784
9785 case R_ARM_TLS_CALL:
9786 /* GD->IE relaxation, turn the instruction into 'nop' or
9787 'ldr r0, [pc,r0]' */
9788 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9789 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9790 break;
9791
9792 case R_ARM_THM_TLS_CALL:
9793 /* GD->IE relaxation. */
9794 if (!is_local)
9795 /* add r0,pc; ldr r0, [r0] */
9796 insn = 0x44786800;
9797 else if (using_thumb2 (globals))
9798 /* nop.w */
9799 insn = 0xf3af8000;
9800 else
9801 /* nop; nop */
9802 insn = 0xbf00bf00;
9803
9804 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9805 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9806 break;
9807 }
9808 return bfd_reloc_ok;
9809 }
9810
9811 /* For a given value of n, calculate the value of G_n as required to
9812 deal with group relocations. We return it in the form of an
9813 encoded constant-and-rotation, together with the final residual. If n is
9814 specified as less than zero, then final_residual is filled with the
9815 input value and no further action is performed. */
9816
9817 static bfd_vma
9818 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9819 {
9820 int current_n;
9821 bfd_vma g_n;
9822 bfd_vma encoded_g_n = 0;
9823 bfd_vma residual = value; /* Also known as Y_n. */
9824
9825 for (current_n = 0; current_n <= n; current_n++)
9826 {
9827 int shift;
9828
9829 /* Calculate which part of the value to mask. */
9830 if (residual == 0)
9831 shift = 0;
9832 else
9833 {
9834 int msb;
9835
9836 /* Determine the most significant bit in the residual and
9837 align the resulting value to a 2-bit boundary. */
9838 for (msb = 30; msb >= 0; msb -= 2)
9839 if (residual & (3 << msb))
9840 break;
9841
9842 /* The desired shift is now (msb - 6), or zero, whichever
9843 is the greater. */
9844 shift = msb - 6;
9845 if (shift < 0)
9846 shift = 0;
9847 }
9848
9849 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9850 g_n = residual & (0xff << shift);
9851 encoded_g_n = (g_n >> shift)
9852 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9853
9854 /* Calculate the residual for the next time around. */
9855 residual &= ~g_n;
9856 }
9857
9858 *final_residual = residual;
9859
9860 return encoded_g_n;
9861 }
9862
9863 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9864 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9865
9866 static int
9867 identify_add_or_sub (bfd_vma insn)
9868 {
9869 int opcode = insn & 0x1e00000;
9870
9871 if (opcode == 1 << 23) /* ADD */
9872 return 1;
9873
9874 if (opcode == 1 << 22) /* SUB */
9875 return -1;
9876
9877 return 0;
9878 }
9879
9880 /* Perform a relocation as part of a final link. */
9881
9882 static bfd_reloc_status_type
9883 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9884 bfd * input_bfd,
9885 bfd * output_bfd,
9886 asection * input_section,
9887 bfd_byte * contents,
9888 Elf_Internal_Rela * rel,
9889 bfd_vma value,
9890 struct bfd_link_info * info,
9891 asection * sym_sec,
9892 const char * sym_name,
9893 unsigned char st_type,
9894 enum arm_st_branch_type branch_type,
9895 struct elf_link_hash_entry * h,
9896 bfd_boolean * unresolved_reloc_p,
9897 char ** error_message)
9898 {
9899 unsigned long r_type = howto->type;
9900 unsigned long r_symndx;
9901 bfd_byte * hit_data = contents + rel->r_offset;
9902 bfd_vma * local_got_offsets;
9903 bfd_vma * local_tlsdesc_gotents;
9904 asection * sgot;
9905 asection * splt;
9906 asection * sreloc = NULL;
9907 asection * srelgot;
9908 bfd_vma addend;
9909 bfd_signed_vma signed_addend;
9910 unsigned char dynreloc_st_type;
9911 bfd_vma dynreloc_value;
9912 struct elf32_arm_link_hash_table * globals;
9913 struct elf32_arm_link_hash_entry *eh;
9914 union gotplt_union *root_plt;
9915 struct arm_plt_info *arm_plt;
9916 bfd_vma plt_offset;
9917 bfd_vma gotplt_offset;
9918 bfd_boolean has_iplt_entry;
9919
9920 globals = elf32_arm_hash_table (info);
9921 if (globals == NULL)
9922 return bfd_reloc_notsupported;
9923
9924 BFD_ASSERT (is_arm_elf (input_bfd));
9925
9926 /* Some relocation types map to different relocations depending on the
9927 target. We pick the right one here. */
9928 r_type = arm_real_reloc_type (globals, r_type);
9929
9930 /* It is possible to have linker relaxations on some TLS access
9931 models. Update our information here. */
9932 r_type = elf32_arm_tls_transition (info, r_type, h);
9933
9934 if (r_type != howto->type)
9935 howto = elf32_arm_howto_from_type (r_type);
9936
9937 eh = (struct elf32_arm_link_hash_entry *) h;
9938 sgot = globals->root.sgot;
9939 local_got_offsets = elf_local_got_offsets (input_bfd);
9940 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9941
9942 if (globals->root.dynamic_sections_created)
9943 srelgot = globals->root.srelgot;
9944 else
9945 srelgot = NULL;
9946
9947 r_symndx = ELF32_R_SYM (rel->r_info);
9948
9949 if (globals->use_rel)
9950 {
9951 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9952
9953 if (addend & ((howto->src_mask + 1) >> 1))
9954 {
9955 signed_addend = -1;
9956 signed_addend &= ~ howto->src_mask;
9957 signed_addend |= addend;
9958 }
9959 else
9960 signed_addend = addend;
9961 }
9962 else
9963 addend = signed_addend = rel->r_addend;
9964
9965 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9966 are resolving a function call relocation. */
9967 if (using_thumb_only (globals)
9968 && (r_type == R_ARM_THM_CALL
9969 || r_type == R_ARM_THM_JUMP24)
9970 && branch_type == ST_BRANCH_TO_ARM)
9971 branch_type = ST_BRANCH_TO_THUMB;
9972
9973 /* Record the symbol information that should be used in dynamic
9974 relocations. */
9975 dynreloc_st_type = st_type;
9976 dynreloc_value = value;
9977 if (branch_type == ST_BRANCH_TO_THUMB)
9978 dynreloc_value |= 1;
9979
9980 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9981 VALUE appropriately for relocations that we resolve at link time. */
9982 has_iplt_entry = FALSE;
9983 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9984 &arm_plt)
9985 && root_plt->offset != (bfd_vma) -1)
9986 {
9987 plt_offset = root_plt->offset;
9988 gotplt_offset = arm_plt->got_offset;
9989
9990 if (h == NULL || eh->is_iplt)
9991 {
9992 has_iplt_entry = TRUE;
9993 splt = globals->root.iplt;
9994
9995 /* Populate .iplt entries here, because not all of them will
9996 be seen by finish_dynamic_symbol. The lower bit is set if
9997 we have already populated the entry. */
9998 if (plt_offset & 1)
9999 plt_offset--;
10000 else
10001 {
10002 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10003 -1, dynreloc_value))
10004 root_plt->offset |= 1;
10005 else
10006 return bfd_reloc_notsupported;
10007 }
10008
10009 /* Static relocations always resolve to the .iplt entry. */
10010 st_type = STT_FUNC;
10011 value = (splt->output_section->vma
10012 + splt->output_offset
10013 + plt_offset);
10014 branch_type = ST_BRANCH_TO_ARM;
10015
10016 /* If there are non-call relocations that resolve to the .iplt
10017 entry, then all dynamic ones must too. */
10018 if (arm_plt->noncall_refcount != 0)
10019 {
10020 dynreloc_st_type = st_type;
10021 dynreloc_value = value;
10022 }
10023 }
10024 else
10025 /* We populate the .plt entry in finish_dynamic_symbol. */
10026 splt = globals->root.splt;
10027 }
10028 else
10029 {
10030 splt = NULL;
10031 plt_offset = (bfd_vma) -1;
10032 gotplt_offset = (bfd_vma) -1;
10033 }
10034
10035 switch (r_type)
10036 {
10037 case R_ARM_NONE:
10038 /* We don't need to find a value for this symbol. It's just a
10039 marker. */
10040 *unresolved_reloc_p = FALSE;
10041 return bfd_reloc_ok;
10042
10043 case R_ARM_ABS12:
10044 if (!globals->vxworks_p)
10045 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10046
10047 case R_ARM_PC24:
10048 case R_ARM_ABS32:
10049 case R_ARM_ABS32_NOI:
10050 case R_ARM_REL32:
10051 case R_ARM_REL32_NOI:
10052 case R_ARM_CALL:
10053 case R_ARM_JUMP24:
10054 case R_ARM_XPC25:
10055 case R_ARM_PREL31:
10056 case R_ARM_PLT32:
10057 /* Handle relocations which should use the PLT entry. ABS32/REL32
10058 will use the symbol's value, which may point to a PLT entry, but we
10059 don't need to handle that here. If we created a PLT entry, all
10060 branches in this object should go to it, except if the PLT is too
10061 far away, in which case a long branch stub should be inserted. */
10062 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10063 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10064 && r_type != R_ARM_CALL
10065 && r_type != R_ARM_JUMP24
10066 && r_type != R_ARM_PLT32)
10067 && plt_offset != (bfd_vma) -1)
10068 {
10069 /* If we've created a .plt section, and assigned a PLT entry
10070 to this function, it must either be a STT_GNU_IFUNC reference
10071 or not be known to bind locally. In other cases, we should
10072 have cleared the PLT entry by now. */
10073 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10074
10075 value = (splt->output_section->vma
10076 + splt->output_offset
10077 + plt_offset);
10078 *unresolved_reloc_p = FALSE;
10079 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10080 contents, rel->r_offset, value,
10081 rel->r_addend);
10082 }
10083
10084 /* When generating a shared object or relocatable executable, these
10085 relocations are copied into the output file to be resolved at
10086 run time. */
10087 if ((bfd_link_pic (info)
10088 || globals->root.is_relocatable_executable)
10089 && (input_section->flags & SEC_ALLOC)
10090 && !(globals->vxworks_p
10091 && strcmp (input_section->output_section->name,
10092 ".tls_vars") == 0)
10093 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10094 || !SYMBOL_CALLS_LOCAL (info, h))
10095 && !(input_bfd == globals->stub_bfd
10096 && strstr (input_section->name, STUB_SUFFIX))
10097 && (h == NULL
10098 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10099 || h->root.type != bfd_link_hash_undefweak)
10100 && r_type != R_ARM_PC24
10101 && r_type != R_ARM_CALL
10102 && r_type != R_ARM_JUMP24
10103 && r_type != R_ARM_PREL31
10104 && r_type != R_ARM_PLT32)
10105 {
10106 Elf_Internal_Rela outrel;
10107 bfd_boolean skip, relocate;
10108
10109 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10110 && !h->def_regular)
10111 {
10112 char *v = _("shared object");
10113
10114 if (bfd_link_executable (info))
10115 v = _("PIE executable");
10116
10117 (*_bfd_error_handler)
10118 (_("%B: relocation %s against external or undefined symbol `%s'"
10119 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10120 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10121 return bfd_reloc_notsupported;
10122 }
10123
10124 *unresolved_reloc_p = FALSE;
10125
10126 if (sreloc == NULL && globals->root.dynamic_sections_created)
10127 {
10128 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10129 ! globals->use_rel);
10130
10131 if (sreloc == NULL)
10132 return bfd_reloc_notsupported;
10133 }
10134
10135 skip = FALSE;
10136 relocate = FALSE;
10137
10138 outrel.r_addend = addend;
10139 outrel.r_offset =
10140 _bfd_elf_section_offset (output_bfd, info, input_section,
10141 rel->r_offset);
10142 if (outrel.r_offset == (bfd_vma) -1)
10143 skip = TRUE;
10144 else if (outrel.r_offset == (bfd_vma) -2)
10145 skip = TRUE, relocate = TRUE;
10146 outrel.r_offset += (input_section->output_section->vma
10147 + input_section->output_offset);
10148
10149 if (skip)
10150 memset (&outrel, 0, sizeof outrel);
10151 else if (h != NULL
10152 && h->dynindx != -1
10153 && (!bfd_link_pic (info)
10154 || !SYMBOLIC_BIND (info, h)
10155 || !h->def_regular))
10156 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10157 else
10158 {
10159 int symbol;
10160
10161 /* This symbol is local, or marked to become local. */
10162 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10163 if (globals->symbian_p)
10164 {
10165 asection *osec;
10166
10167 /* On Symbian OS, the data segment and text segement
10168 can be relocated independently. Therefore, we
10169 must indicate the segment to which this
10170 relocation is relative. The BPABI allows us to
10171 use any symbol in the right segment; we just use
10172 the section symbol as it is convenient. (We
10173 cannot use the symbol given by "h" directly as it
10174 will not appear in the dynamic symbol table.)
10175
10176 Note that the dynamic linker ignores the section
10177 symbol value, so we don't subtract osec->vma
10178 from the emitted reloc addend. */
10179 if (sym_sec)
10180 osec = sym_sec->output_section;
10181 else
10182 osec = input_section->output_section;
10183 symbol = elf_section_data (osec)->dynindx;
10184 if (symbol == 0)
10185 {
10186 struct elf_link_hash_table *htab = elf_hash_table (info);
10187
10188 if ((osec->flags & SEC_READONLY) == 0
10189 && htab->data_index_section != NULL)
10190 osec = htab->data_index_section;
10191 else
10192 osec = htab->text_index_section;
10193 symbol = elf_section_data (osec)->dynindx;
10194 }
10195 BFD_ASSERT (symbol != 0);
10196 }
10197 else
10198 /* On SVR4-ish systems, the dynamic loader cannot
10199 relocate the text and data segments independently,
10200 so the symbol does not matter. */
10201 symbol = 0;
10202 if (dynreloc_st_type == STT_GNU_IFUNC)
10203 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10204 to the .iplt entry. Instead, every non-call reference
10205 must use an R_ARM_IRELATIVE relocation to obtain the
10206 correct run-time address. */
10207 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10208 else
10209 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10210 if (globals->use_rel)
10211 relocate = TRUE;
10212 else
10213 outrel.r_addend += dynreloc_value;
10214 }
10215
10216 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10217
10218 /* If this reloc is against an external symbol, we do not want to
10219 fiddle with the addend. Otherwise, we need to include the symbol
10220 value so that it becomes an addend for the dynamic reloc. */
10221 if (! relocate)
10222 return bfd_reloc_ok;
10223
10224 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10225 contents, rel->r_offset,
10226 dynreloc_value, (bfd_vma) 0);
10227 }
10228 else switch (r_type)
10229 {
10230 case R_ARM_ABS12:
10231 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10232
10233 case R_ARM_XPC25: /* Arm BLX instruction. */
10234 case R_ARM_CALL:
10235 case R_ARM_JUMP24:
10236 case R_ARM_PC24: /* Arm B/BL instruction. */
10237 case R_ARM_PLT32:
10238 {
10239 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10240
10241 if (r_type == R_ARM_XPC25)
10242 {
10243 /* Check for Arm calling Arm function. */
10244 /* FIXME: Should we translate the instruction into a BL
10245 instruction instead ? */
10246 if (branch_type != ST_BRANCH_TO_THUMB)
10247 (*_bfd_error_handler)
10248 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10249 input_bfd,
10250 h ? h->root.root.string : "(local)");
10251 }
10252 else if (r_type == R_ARM_PC24)
10253 {
10254 /* Check for Arm calling Thumb function. */
10255 if (branch_type == ST_BRANCH_TO_THUMB)
10256 {
10257 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10258 output_bfd, input_section,
10259 hit_data, sym_sec, rel->r_offset,
10260 signed_addend, value,
10261 error_message))
10262 return bfd_reloc_ok;
10263 else
10264 return bfd_reloc_dangerous;
10265 }
10266 }
10267
10268 /* Check if a stub has to be inserted because the
10269 destination is too far or we are changing mode. */
10270 if ( r_type == R_ARM_CALL
10271 || r_type == R_ARM_JUMP24
10272 || r_type == R_ARM_PLT32)
10273 {
10274 enum elf32_arm_stub_type stub_type = arm_stub_none;
10275 struct elf32_arm_link_hash_entry *hash;
10276
10277 hash = (struct elf32_arm_link_hash_entry *) h;
10278 stub_type = arm_type_of_stub (info, input_section, rel,
10279 st_type, &branch_type,
10280 hash, value, sym_sec,
10281 input_bfd, sym_name);
10282
10283 if (stub_type != arm_stub_none)
10284 {
10285 /* The target is out of reach, so redirect the
10286 branch to the local stub for this function. */
10287 stub_entry = elf32_arm_get_stub_entry (input_section,
10288 sym_sec, h,
10289 rel, globals,
10290 stub_type);
10291 {
10292 if (stub_entry != NULL)
10293 value = (stub_entry->stub_offset
10294 + stub_entry->stub_sec->output_offset
10295 + stub_entry->stub_sec->output_section->vma);
10296
10297 if (plt_offset != (bfd_vma) -1)
10298 *unresolved_reloc_p = FALSE;
10299 }
10300 }
10301 else
10302 {
10303 /* If the call goes through a PLT entry, make sure to
10304 check distance to the right destination address. */
10305 if (plt_offset != (bfd_vma) -1)
10306 {
10307 value = (splt->output_section->vma
10308 + splt->output_offset
10309 + plt_offset);
10310 *unresolved_reloc_p = FALSE;
10311 /* The PLT entry is in ARM mode, regardless of the
10312 target function. */
10313 branch_type = ST_BRANCH_TO_ARM;
10314 }
10315 }
10316 }
10317
10318 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10319 where:
10320 S is the address of the symbol in the relocation.
10321 P is address of the instruction being relocated.
10322 A is the addend (extracted from the instruction) in bytes.
10323
10324 S is held in 'value'.
10325 P is the base address of the section containing the
10326 instruction plus the offset of the reloc into that
10327 section, ie:
10328 (input_section->output_section->vma +
10329 input_section->output_offset +
10330 rel->r_offset).
10331 A is the addend, converted into bytes, ie:
10332 (signed_addend * 4)
10333
10334 Note: None of these operations have knowledge of the pipeline
10335 size of the processor, thus it is up to the assembler to
10336 encode this information into the addend. */
10337 value -= (input_section->output_section->vma
10338 + input_section->output_offset);
10339 value -= rel->r_offset;
10340 if (globals->use_rel)
10341 value += (signed_addend << howto->size);
10342 else
10343 /* RELA addends do not have to be adjusted by howto->size. */
10344 value += signed_addend;
10345
10346 signed_addend = value;
10347 signed_addend >>= howto->rightshift;
10348
10349 /* A branch to an undefined weak symbol is turned into a jump to
10350 the next instruction unless a PLT entry will be created.
10351 Do the same for local undefined symbols (but not for STN_UNDEF).
10352 The jump to the next instruction is optimized as a NOP depending
10353 on the architecture. */
10354 if (h ? (h->root.type == bfd_link_hash_undefweak
10355 && plt_offset == (bfd_vma) -1)
10356 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10357 {
10358 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10359
10360 if (arch_has_arm_nop (globals))
10361 value |= 0x0320f000;
10362 else
10363 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10364 }
10365 else
10366 {
10367 /* Perform a signed range check. */
10368 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10369 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10370 return bfd_reloc_overflow;
10371
10372 addend = (value & 2);
10373
10374 value = (signed_addend & howto->dst_mask)
10375 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10376
10377 if (r_type == R_ARM_CALL)
10378 {
10379 /* Set the H bit in the BLX instruction. */
10380 if (branch_type == ST_BRANCH_TO_THUMB)
10381 {
10382 if (addend)
10383 value |= (1 << 24);
10384 else
10385 value &= ~(bfd_vma)(1 << 24);
10386 }
10387
10388 /* Select the correct instruction (BL or BLX). */
10389 /* Only if we are not handling a BL to a stub. In this
10390 case, mode switching is performed by the stub. */
10391 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10392 value |= (1 << 28);
10393 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10394 {
10395 value &= ~(bfd_vma)(1 << 28);
10396 value |= (1 << 24);
10397 }
10398 }
10399 }
10400 }
10401 break;
10402
10403 case R_ARM_ABS32:
10404 value += addend;
10405 if (branch_type == ST_BRANCH_TO_THUMB)
10406 value |= 1;
10407 break;
10408
10409 case R_ARM_ABS32_NOI:
10410 value += addend;
10411 break;
10412
10413 case R_ARM_REL32:
10414 value += addend;
10415 if (branch_type == ST_BRANCH_TO_THUMB)
10416 value |= 1;
10417 value -= (input_section->output_section->vma
10418 + input_section->output_offset + rel->r_offset);
10419 break;
10420
10421 case R_ARM_REL32_NOI:
10422 value += addend;
10423 value -= (input_section->output_section->vma
10424 + input_section->output_offset + rel->r_offset);
10425 break;
10426
10427 case R_ARM_PREL31:
10428 value -= (input_section->output_section->vma
10429 + input_section->output_offset + rel->r_offset);
10430 value += signed_addend;
10431 if (! h || h->root.type != bfd_link_hash_undefweak)
10432 {
10433 /* Check for overflow. */
10434 if ((value ^ (value >> 1)) & (1 << 30))
10435 return bfd_reloc_overflow;
10436 }
10437 value &= 0x7fffffff;
10438 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10439 if (branch_type == ST_BRANCH_TO_THUMB)
10440 value |= 1;
10441 break;
10442 }
10443
10444 bfd_put_32 (input_bfd, value, hit_data);
10445 return bfd_reloc_ok;
10446
10447 case R_ARM_ABS8:
10448 /* PR 16202: Refectch the addend using the correct size. */
10449 if (globals->use_rel)
10450 addend = bfd_get_8 (input_bfd, hit_data);
10451 value += addend;
10452
10453 /* There is no way to tell whether the user intended to use a signed or
10454 unsigned addend. When checking for overflow we accept either,
10455 as specified by the AAELF. */
10456 if ((long) value > 0xff || (long) value < -0x80)
10457 return bfd_reloc_overflow;
10458
10459 bfd_put_8 (input_bfd, value, hit_data);
10460 return bfd_reloc_ok;
10461
10462 case R_ARM_ABS16:
10463 /* PR 16202: Refectch the addend using the correct size. */
10464 if (globals->use_rel)
10465 addend = bfd_get_16 (input_bfd, hit_data);
10466 value += addend;
10467
10468 /* See comment for R_ARM_ABS8. */
10469 if ((long) value > 0xffff || (long) value < -0x8000)
10470 return bfd_reloc_overflow;
10471
10472 bfd_put_16 (input_bfd, value, hit_data);
10473 return bfd_reloc_ok;
10474
10475 case R_ARM_THM_ABS5:
10476 /* Support ldr and str instructions for the thumb. */
10477 if (globals->use_rel)
10478 {
10479 /* Need to refetch addend. */
10480 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10481 /* ??? Need to determine shift amount from operand size. */
10482 addend >>= howto->rightshift;
10483 }
10484 value += addend;
10485
10486 /* ??? Isn't value unsigned? */
10487 if ((long) value > 0x1f || (long) value < -0x10)
10488 return bfd_reloc_overflow;
10489
10490 /* ??? Value needs to be properly shifted into place first. */
10491 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10492 bfd_put_16 (input_bfd, value, hit_data);
10493 return bfd_reloc_ok;
10494
10495 case R_ARM_THM_ALU_PREL_11_0:
10496 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10497 {
10498 bfd_vma insn;
10499 bfd_signed_vma relocation;
10500
10501 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10502 | bfd_get_16 (input_bfd, hit_data + 2);
10503
10504 if (globals->use_rel)
10505 {
10506 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10507 | ((insn & (1 << 26)) >> 15);
10508 if (insn & 0xf00000)
10509 signed_addend = -signed_addend;
10510 }
10511
10512 relocation = value + signed_addend;
10513 relocation -= Pa (input_section->output_section->vma
10514 + input_section->output_offset
10515 + rel->r_offset);
10516
10517 value = relocation;
10518
10519 if (value >= 0x1000)
10520 return bfd_reloc_overflow;
10521
10522 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10523 | ((value & 0x700) << 4)
10524 | ((value & 0x800) << 15);
10525 if (relocation < 0)
10526 insn |= 0xa00000;
10527
10528 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10529 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10530
10531 return bfd_reloc_ok;
10532 }
10533
10534 case R_ARM_THM_PC8:
10535 /* PR 10073: This reloc is not generated by the GNU toolchain,
10536 but it is supported for compatibility with third party libraries
10537 generated by other compilers, specifically the ARM/IAR. */
10538 {
10539 bfd_vma insn;
10540 bfd_signed_vma relocation;
10541
10542 insn = bfd_get_16 (input_bfd, hit_data);
10543
10544 if (globals->use_rel)
10545 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10546
10547 relocation = value + addend;
10548 relocation -= Pa (input_section->output_section->vma
10549 + input_section->output_offset
10550 + rel->r_offset);
10551
10552 value = relocation;
10553
10554 /* We do not check for overflow of this reloc. Although strictly
10555 speaking this is incorrect, it appears to be necessary in order
10556 to work with IAR generated relocs. Since GCC and GAS do not
10557 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10558 a problem for them. */
10559 value &= 0x3fc;
10560
10561 insn = (insn & 0xff00) | (value >> 2);
10562
10563 bfd_put_16 (input_bfd, insn, hit_data);
10564
10565 return bfd_reloc_ok;
10566 }
10567
10568 case R_ARM_THM_PC12:
10569 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10570 {
10571 bfd_vma insn;
10572 bfd_signed_vma relocation;
10573
10574 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10575 | bfd_get_16 (input_bfd, hit_data + 2);
10576
10577 if (globals->use_rel)
10578 {
10579 signed_addend = insn & 0xfff;
10580 if (!(insn & (1 << 23)))
10581 signed_addend = -signed_addend;
10582 }
10583
10584 relocation = value + signed_addend;
10585 relocation -= Pa (input_section->output_section->vma
10586 + input_section->output_offset
10587 + rel->r_offset);
10588
10589 value = relocation;
10590
10591 if (value >= 0x1000)
10592 return bfd_reloc_overflow;
10593
10594 insn = (insn & 0xff7ff000) | value;
10595 if (relocation >= 0)
10596 insn |= (1 << 23);
10597
10598 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10599 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10600
10601 return bfd_reloc_ok;
10602 }
10603
10604 case R_ARM_THM_XPC22:
10605 case R_ARM_THM_CALL:
10606 case R_ARM_THM_JUMP24:
10607 /* Thumb BL (branch long instruction). */
10608 {
10609 bfd_vma relocation;
10610 bfd_vma reloc_sign;
10611 bfd_boolean overflow = FALSE;
10612 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10613 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10614 bfd_signed_vma reloc_signed_max;
10615 bfd_signed_vma reloc_signed_min;
10616 bfd_vma check;
10617 bfd_signed_vma signed_check;
10618 int bitsize;
10619 const int thumb2 = using_thumb2 (globals);
10620 const int thumb2_bl = using_thumb2_bl (globals);
10621
10622 /* A branch to an undefined weak symbol is turned into a jump to
10623 the next instruction unless a PLT entry will be created.
10624 The jump to the next instruction is optimized as a NOP.W for
10625 Thumb-2 enabled architectures. */
10626 if (h && h->root.type == bfd_link_hash_undefweak
10627 && plt_offset == (bfd_vma) -1)
10628 {
10629 if (thumb2)
10630 {
10631 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10632 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10633 }
10634 else
10635 {
10636 bfd_put_16 (input_bfd, 0xe000, hit_data);
10637 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10638 }
10639 return bfd_reloc_ok;
10640 }
10641
10642 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10643 with Thumb-1) involving the J1 and J2 bits. */
10644 if (globals->use_rel)
10645 {
10646 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10647 bfd_vma upper = upper_insn & 0x3ff;
10648 bfd_vma lower = lower_insn & 0x7ff;
10649 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10650 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10651 bfd_vma i1 = j1 ^ s ? 0 : 1;
10652 bfd_vma i2 = j2 ^ s ? 0 : 1;
10653
10654 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10655 /* Sign extend. */
10656 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10657
10658 signed_addend = addend;
10659 }
10660
10661 if (r_type == R_ARM_THM_XPC22)
10662 {
10663 /* Check for Thumb to Thumb call. */
10664 /* FIXME: Should we translate the instruction into a BL
10665 instruction instead ? */
10666 if (branch_type == ST_BRANCH_TO_THUMB)
10667 (*_bfd_error_handler)
10668 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10669 input_bfd,
10670 h ? h->root.root.string : "(local)");
10671 }
10672 else
10673 {
10674 /* If it is not a call to Thumb, assume call to Arm.
10675 If it is a call relative to a section name, then it is not a
10676 function call at all, but rather a long jump. Calls through
10677 the PLT do not require stubs. */
10678 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10679 {
10680 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10681 {
10682 /* Convert BL to BLX. */
10683 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10684 }
10685 else if (( r_type != R_ARM_THM_CALL)
10686 && (r_type != R_ARM_THM_JUMP24))
10687 {
10688 if (elf32_thumb_to_arm_stub
10689 (info, sym_name, input_bfd, output_bfd, input_section,
10690 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10691 error_message))
10692 return bfd_reloc_ok;
10693 else
10694 return bfd_reloc_dangerous;
10695 }
10696 }
10697 else if (branch_type == ST_BRANCH_TO_THUMB
10698 && globals->use_blx
10699 && r_type == R_ARM_THM_CALL)
10700 {
10701 /* Make sure this is a BL. */
10702 lower_insn |= 0x1800;
10703 }
10704 }
10705
10706 enum elf32_arm_stub_type stub_type = arm_stub_none;
10707 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10708 {
10709 /* Check if a stub has to be inserted because the destination
10710 is too far. */
10711 struct elf32_arm_stub_hash_entry *stub_entry;
10712 struct elf32_arm_link_hash_entry *hash;
10713
10714 hash = (struct elf32_arm_link_hash_entry *) h;
10715
10716 stub_type = arm_type_of_stub (info, input_section, rel,
10717 st_type, &branch_type,
10718 hash, value, sym_sec,
10719 input_bfd, sym_name);
10720
10721 if (stub_type != arm_stub_none)
10722 {
10723 /* The target is out of reach or we are changing modes, so
10724 redirect the branch to the local stub for this
10725 function. */
10726 stub_entry = elf32_arm_get_stub_entry (input_section,
10727 sym_sec, h,
10728 rel, globals,
10729 stub_type);
10730 if (stub_entry != NULL)
10731 {
10732 value = (stub_entry->stub_offset
10733 + stub_entry->stub_sec->output_offset
10734 + stub_entry->stub_sec->output_section->vma);
10735
10736 if (plt_offset != (bfd_vma) -1)
10737 *unresolved_reloc_p = FALSE;
10738 }
10739
10740 /* If this call becomes a call to Arm, force BLX. */
10741 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10742 {
10743 if ((stub_entry
10744 && !arm_stub_is_thumb (stub_entry->stub_type))
10745 || branch_type != ST_BRANCH_TO_THUMB)
10746 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10747 }
10748 }
10749 }
10750
10751 /* Handle calls via the PLT. */
10752 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10753 {
10754 value = (splt->output_section->vma
10755 + splt->output_offset
10756 + plt_offset);
10757
10758 if (globals->use_blx
10759 && r_type == R_ARM_THM_CALL
10760 && ! using_thumb_only (globals))
10761 {
10762 /* If the Thumb BLX instruction is available, convert
10763 the BL to a BLX instruction to call the ARM-mode
10764 PLT entry. */
10765 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10766 branch_type = ST_BRANCH_TO_ARM;
10767 }
10768 else
10769 {
10770 if (! using_thumb_only (globals))
10771 /* Target the Thumb stub before the ARM PLT entry. */
10772 value -= PLT_THUMB_STUB_SIZE;
10773 branch_type = ST_BRANCH_TO_THUMB;
10774 }
10775 *unresolved_reloc_p = FALSE;
10776 }
10777
10778 relocation = value + signed_addend;
10779
10780 relocation -= (input_section->output_section->vma
10781 + input_section->output_offset
10782 + rel->r_offset);
10783
10784 check = relocation >> howto->rightshift;
10785
10786 /* If this is a signed value, the rightshift just dropped
10787 leading 1 bits (assuming twos complement). */
10788 if ((bfd_signed_vma) relocation >= 0)
10789 signed_check = check;
10790 else
10791 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10792
10793 /* Calculate the permissable maximum and minimum values for
10794 this relocation according to whether we're relocating for
10795 Thumb-2 or not. */
10796 bitsize = howto->bitsize;
10797 if (!thumb2_bl)
10798 bitsize -= 2;
10799 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10800 reloc_signed_min = ~reloc_signed_max;
10801
10802 /* Assumes two's complement. */
10803 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10804 overflow = TRUE;
10805
10806 if ((lower_insn & 0x5000) == 0x4000)
10807 /* For a BLX instruction, make sure that the relocation is rounded up
10808 to a word boundary. This follows the semantics of the instruction
10809 which specifies that bit 1 of the target address will come from bit
10810 1 of the base address. */
10811 relocation = (relocation + 2) & ~ 3;
10812
10813 /* Put RELOCATION back into the insn. Assumes two's complement.
10814 We use the Thumb-2 encoding, which is safe even if dealing with
10815 a Thumb-1 instruction by virtue of our overflow check above. */
10816 reloc_sign = (signed_check < 0) ? 1 : 0;
10817 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10818 | ((relocation >> 12) & 0x3ff)
10819 | (reloc_sign << 10);
10820 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10821 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10822 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10823 | ((relocation >> 1) & 0x7ff);
10824
10825 /* Put the relocated value back in the object file: */
10826 bfd_put_16 (input_bfd, upper_insn, hit_data);
10827 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10828
10829 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10830 }
10831 break;
10832
10833 case R_ARM_THM_JUMP19:
10834 /* Thumb32 conditional branch instruction. */
10835 {
10836 bfd_vma relocation;
10837 bfd_boolean overflow = FALSE;
10838 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10839 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10840 bfd_signed_vma reloc_signed_max = 0xffffe;
10841 bfd_signed_vma reloc_signed_min = -0x100000;
10842 bfd_signed_vma signed_check;
10843 enum elf32_arm_stub_type stub_type = arm_stub_none;
10844 struct elf32_arm_stub_hash_entry *stub_entry;
10845 struct elf32_arm_link_hash_entry *hash;
10846
10847 /* Need to refetch the addend, reconstruct the top three bits,
10848 and squish the two 11 bit pieces together. */
10849 if (globals->use_rel)
10850 {
10851 bfd_vma S = (upper_insn & 0x0400) >> 10;
10852 bfd_vma upper = (upper_insn & 0x003f);
10853 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10854 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10855 bfd_vma lower = (lower_insn & 0x07ff);
10856
10857 upper |= J1 << 6;
10858 upper |= J2 << 7;
10859 upper |= (!S) << 8;
10860 upper -= 0x0100; /* Sign extend. */
10861
10862 addend = (upper << 12) | (lower << 1);
10863 signed_addend = addend;
10864 }
10865
10866 /* Handle calls via the PLT. */
10867 if (plt_offset != (bfd_vma) -1)
10868 {
10869 value = (splt->output_section->vma
10870 + splt->output_offset
10871 + plt_offset);
10872 /* Target the Thumb stub before the ARM PLT entry. */
10873 value -= PLT_THUMB_STUB_SIZE;
10874 *unresolved_reloc_p = FALSE;
10875 }
10876
10877 hash = (struct elf32_arm_link_hash_entry *)h;
10878
10879 stub_type = arm_type_of_stub (info, input_section, rel,
10880 st_type, &branch_type,
10881 hash, value, sym_sec,
10882 input_bfd, sym_name);
10883 if (stub_type != arm_stub_none)
10884 {
10885 stub_entry = elf32_arm_get_stub_entry (input_section,
10886 sym_sec, h,
10887 rel, globals,
10888 stub_type);
10889 if (stub_entry != NULL)
10890 {
10891 value = (stub_entry->stub_offset
10892 + stub_entry->stub_sec->output_offset
10893 + stub_entry->stub_sec->output_section->vma);
10894 }
10895 }
10896
10897 relocation = value + signed_addend;
10898 relocation -= (input_section->output_section->vma
10899 + input_section->output_offset
10900 + rel->r_offset);
10901 signed_check = (bfd_signed_vma) relocation;
10902
10903 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10904 overflow = TRUE;
10905
10906 /* Put RELOCATION back into the insn. */
10907 {
10908 bfd_vma S = (relocation & 0x00100000) >> 20;
10909 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10910 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10911 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10912 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10913
10914 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10915 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10916 }
10917
10918 /* Put the relocated value back in the object file: */
10919 bfd_put_16 (input_bfd, upper_insn, hit_data);
10920 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10921
10922 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10923 }
10924
10925 case R_ARM_THM_JUMP11:
10926 case R_ARM_THM_JUMP8:
10927 case R_ARM_THM_JUMP6:
10928 /* Thumb B (branch) instruction). */
10929 {
10930 bfd_signed_vma relocation;
10931 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10932 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10933 bfd_signed_vma signed_check;
10934
10935 /* CZB cannot jump backward. */
10936 if (r_type == R_ARM_THM_JUMP6)
10937 reloc_signed_min = 0;
10938
10939 if (globals->use_rel)
10940 {
10941 /* Need to refetch addend. */
10942 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10943 if (addend & ((howto->src_mask + 1) >> 1))
10944 {
10945 signed_addend = -1;
10946 signed_addend &= ~ howto->src_mask;
10947 signed_addend |= addend;
10948 }
10949 else
10950 signed_addend = addend;
10951 /* The value in the insn has been right shifted. We need to
10952 undo this, so that we can perform the address calculation
10953 in terms of bytes. */
10954 signed_addend <<= howto->rightshift;
10955 }
10956 relocation = value + signed_addend;
10957
10958 relocation -= (input_section->output_section->vma
10959 + input_section->output_offset
10960 + rel->r_offset);
10961
10962 relocation >>= howto->rightshift;
10963 signed_check = relocation;
10964
10965 if (r_type == R_ARM_THM_JUMP6)
10966 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10967 else
10968 relocation &= howto->dst_mask;
10969 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10970
10971 bfd_put_16 (input_bfd, relocation, hit_data);
10972
10973 /* Assumes two's complement. */
10974 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10975 return bfd_reloc_overflow;
10976
10977 return bfd_reloc_ok;
10978 }
10979
10980 case R_ARM_ALU_PCREL7_0:
10981 case R_ARM_ALU_PCREL15_8:
10982 case R_ARM_ALU_PCREL23_15:
10983 {
10984 bfd_vma insn;
10985 bfd_vma relocation;
10986
10987 insn = bfd_get_32 (input_bfd, hit_data);
10988 if (globals->use_rel)
10989 {
10990 /* Extract the addend. */
10991 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10992 signed_addend = addend;
10993 }
10994 relocation = value + signed_addend;
10995
10996 relocation -= (input_section->output_section->vma
10997 + input_section->output_offset
10998 + rel->r_offset);
10999 insn = (insn & ~0xfff)
11000 | ((howto->bitpos << 7) & 0xf00)
11001 | ((relocation >> howto->bitpos) & 0xff);
11002 bfd_put_32 (input_bfd, value, hit_data);
11003 }
11004 return bfd_reloc_ok;
11005
11006 case R_ARM_GNU_VTINHERIT:
11007 case R_ARM_GNU_VTENTRY:
11008 return bfd_reloc_ok;
11009
11010 case R_ARM_GOTOFF32:
11011 /* Relocation is relative to the start of the
11012 global offset table. */
11013
11014 BFD_ASSERT (sgot != NULL);
11015 if (sgot == NULL)
11016 return bfd_reloc_notsupported;
11017
11018 /* If we are addressing a Thumb function, we need to adjust the
11019 address by one, so that attempts to call the function pointer will
11020 correctly interpret it as Thumb code. */
11021 if (branch_type == ST_BRANCH_TO_THUMB)
11022 value += 1;
11023
11024 /* Note that sgot->output_offset is not involved in this
11025 calculation. We always want the start of .got. If we
11026 define _GLOBAL_OFFSET_TABLE in a different way, as is
11027 permitted by the ABI, we might have to change this
11028 calculation. */
11029 value -= sgot->output_section->vma;
11030 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11031 contents, rel->r_offset, value,
11032 rel->r_addend);
11033
11034 case R_ARM_GOTPC:
11035 /* Use global offset table as symbol value. */
11036 BFD_ASSERT (sgot != NULL);
11037
11038 if (sgot == NULL)
11039 return bfd_reloc_notsupported;
11040
11041 *unresolved_reloc_p = FALSE;
11042 value = sgot->output_section->vma;
11043 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11044 contents, rel->r_offset, value,
11045 rel->r_addend);
11046
11047 case R_ARM_GOT32:
11048 case R_ARM_GOT_PREL:
11049 /* Relocation is to the entry for this symbol in the
11050 global offset table. */
11051 if (sgot == NULL)
11052 return bfd_reloc_notsupported;
11053
11054 if (dynreloc_st_type == STT_GNU_IFUNC
11055 && plt_offset != (bfd_vma) -1
11056 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11057 {
11058 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11059 symbol, and the relocation resolves directly to the runtime
11060 target rather than to the .iplt entry. This means that any
11061 .got entry would be the same value as the .igot.plt entry,
11062 so there's no point creating both. */
11063 sgot = globals->root.igotplt;
11064 value = sgot->output_offset + gotplt_offset;
11065 }
11066 else if (h != NULL)
11067 {
11068 bfd_vma off;
11069
11070 off = h->got.offset;
11071 BFD_ASSERT (off != (bfd_vma) -1);
11072 if ((off & 1) != 0)
11073 {
11074 /* We have already processsed one GOT relocation against
11075 this symbol. */
11076 off &= ~1;
11077 if (globals->root.dynamic_sections_created
11078 && !SYMBOL_REFERENCES_LOCAL (info, h))
11079 *unresolved_reloc_p = FALSE;
11080 }
11081 else
11082 {
11083 Elf_Internal_Rela outrel;
11084
11085 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11086 {
11087 /* If the symbol doesn't resolve locally in a static
11088 object, we have an undefined reference. If the
11089 symbol doesn't resolve locally in a dynamic object,
11090 it should be resolved by the dynamic linker. */
11091 if (globals->root.dynamic_sections_created)
11092 {
11093 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11094 *unresolved_reloc_p = FALSE;
11095 }
11096 else
11097 outrel.r_info = 0;
11098 outrel.r_addend = 0;
11099 }
11100 else
11101 {
11102 if (dynreloc_st_type == STT_GNU_IFUNC)
11103 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11104 else if (bfd_link_pic (info)
11105 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11106 || h->root.type != bfd_link_hash_undefweak))
11107 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11108 else
11109 outrel.r_info = 0;
11110 outrel.r_addend = dynreloc_value;
11111 }
11112
11113 /* The GOT entry is initialized to zero by default.
11114 See if we should install a different value. */
11115 if (outrel.r_addend != 0
11116 && (outrel.r_info == 0 || globals->use_rel))
11117 {
11118 bfd_put_32 (output_bfd, outrel.r_addend,
11119 sgot->contents + off);
11120 outrel.r_addend = 0;
11121 }
11122
11123 if (outrel.r_info != 0)
11124 {
11125 outrel.r_offset = (sgot->output_section->vma
11126 + sgot->output_offset
11127 + off);
11128 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11129 }
11130 h->got.offset |= 1;
11131 }
11132 value = sgot->output_offset + off;
11133 }
11134 else
11135 {
11136 bfd_vma off;
11137
11138 BFD_ASSERT (local_got_offsets != NULL
11139 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11140
11141 off = local_got_offsets[r_symndx];
11142
11143 /* The offset must always be a multiple of 4. We use the
11144 least significant bit to record whether we have already
11145 generated the necessary reloc. */
11146 if ((off & 1) != 0)
11147 off &= ~1;
11148 else
11149 {
11150 if (globals->use_rel)
11151 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11152
11153 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11154 {
11155 Elf_Internal_Rela outrel;
11156
11157 outrel.r_addend = addend + dynreloc_value;
11158 outrel.r_offset = (sgot->output_section->vma
11159 + sgot->output_offset
11160 + off);
11161 if (dynreloc_st_type == STT_GNU_IFUNC)
11162 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11163 else
11164 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11165 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11166 }
11167
11168 local_got_offsets[r_symndx] |= 1;
11169 }
11170
11171 value = sgot->output_offset + off;
11172 }
11173 if (r_type != R_ARM_GOT32)
11174 value += sgot->output_section->vma;
11175
11176 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11177 contents, rel->r_offset, value,
11178 rel->r_addend);
11179
11180 case R_ARM_TLS_LDO32:
11181 value = value - dtpoff_base (info);
11182
11183 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11184 contents, rel->r_offset, value,
11185 rel->r_addend);
11186
11187 case R_ARM_TLS_LDM32:
11188 {
11189 bfd_vma off;
11190
11191 if (sgot == NULL)
11192 abort ();
11193
11194 off = globals->tls_ldm_got.offset;
11195
11196 if ((off & 1) != 0)
11197 off &= ~1;
11198 else
11199 {
11200 /* If we don't know the module number, create a relocation
11201 for it. */
11202 if (bfd_link_pic (info))
11203 {
11204 Elf_Internal_Rela outrel;
11205
11206 if (srelgot == NULL)
11207 abort ();
11208
11209 outrel.r_addend = 0;
11210 outrel.r_offset = (sgot->output_section->vma
11211 + sgot->output_offset + off);
11212 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11213
11214 if (globals->use_rel)
11215 bfd_put_32 (output_bfd, outrel.r_addend,
11216 sgot->contents + off);
11217
11218 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11219 }
11220 else
11221 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11222
11223 globals->tls_ldm_got.offset |= 1;
11224 }
11225
11226 value = sgot->output_section->vma + sgot->output_offset + off
11227 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11228
11229 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11230 contents, rel->r_offset, value,
11231 rel->r_addend);
11232 }
11233
11234 case R_ARM_TLS_CALL:
11235 case R_ARM_THM_TLS_CALL:
11236 case R_ARM_TLS_GD32:
11237 case R_ARM_TLS_IE32:
11238 case R_ARM_TLS_GOTDESC:
11239 case R_ARM_TLS_DESCSEQ:
11240 case R_ARM_THM_TLS_DESCSEQ:
11241 {
11242 bfd_vma off, offplt;
11243 int indx = 0;
11244 char tls_type;
11245
11246 BFD_ASSERT (sgot != NULL);
11247
11248 if (h != NULL)
11249 {
11250 bfd_boolean dyn;
11251 dyn = globals->root.dynamic_sections_created;
11252 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11253 bfd_link_pic (info),
11254 h)
11255 && (!bfd_link_pic (info)
11256 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11257 {
11258 *unresolved_reloc_p = FALSE;
11259 indx = h->dynindx;
11260 }
11261 off = h->got.offset;
11262 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11263 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11264 }
11265 else
11266 {
11267 BFD_ASSERT (local_got_offsets != NULL);
11268 off = local_got_offsets[r_symndx];
11269 offplt = local_tlsdesc_gotents[r_symndx];
11270 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11271 }
11272
11273 /* Linker relaxations happens from one of the
11274 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11275 if (ELF32_R_TYPE(rel->r_info) != r_type)
11276 tls_type = GOT_TLS_IE;
11277
11278 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11279
11280 if ((off & 1) != 0)
11281 off &= ~1;
11282 else
11283 {
11284 bfd_boolean need_relocs = FALSE;
11285 Elf_Internal_Rela outrel;
11286 int cur_off = off;
11287
11288 /* The GOT entries have not been initialized yet. Do it
11289 now, and emit any relocations. If both an IE GOT and a
11290 GD GOT are necessary, we emit the GD first. */
11291
11292 if ((bfd_link_pic (info) || indx != 0)
11293 && (h == NULL
11294 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11295 || h->root.type != bfd_link_hash_undefweak))
11296 {
11297 need_relocs = TRUE;
11298 BFD_ASSERT (srelgot != NULL);
11299 }
11300
11301 if (tls_type & GOT_TLS_GDESC)
11302 {
11303 bfd_byte *loc;
11304
11305 /* We should have relaxed, unless this is an undefined
11306 weak symbol. */
11307 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11308 || bfd_link_pic (info));
11309 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11310 <= globals->root.sgotplt->size);
11311
11312 outrel.r_addend = 0;
11313 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11314 + globals->root.sgotplt->output_offset
11315 + offplt
11316 + globals->sgotplt_jump_table_size);
11317
11318 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11319 sreloc = globals->root.srelplt;
11320 loc = sreloc->contents;
11321 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11322 BFD_ASSERT (loc + RELOC_SIZE (globals)
11323 <= sreloc->contents + sreloc->size);
11324
11325 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11326
11327 /* For globals, the first word in the relocation gets
11328 the relocation index and the top bit set, or zero,
11329 if we're binding now. For locals, it gets the
11330 symbol's offset in the tls section. */
11331 bfd_put_32 (output_bfd,
11332 !h ? value - elf_hash_table (info)->tls_sec->vma
11333 : info->flags & DF_BIND_NOW ? 0
11334 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11335 globals->root.sgotplt->contents + offplt
11336 + globals->sgotplt_jump_table_size);
11337
11338 /* Second word in the relocation is always zero. */
11339 bfd_put_32 (output_bfd, 0,
11340 globals->root.sgotplt->contents + offplt
11341 + globals->sgotplt_jump_table_size + 4);
11342 }
11343 if (tls_type & GOT_TLS_GD)
11344 {
11345 if (need_relocs)
11346 {
11347 outrel.r_addend = 0;
11348 outrel.r_offset = (sgot->output_section->vma
11349 + sgot->output_offset
11350 + cur_off);
11351 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11352
11353 if (globals->use_rel)
11354 bfd_put_32 (output_bfd, outrel.r_addend,
11355 sgot->contents + cur_off);
11356
11357 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11358
11359 if (indx == 0)
11360 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11361 sgot->contents + cur_off + 4);
11362 else
11363 {
11364 outrel.r_addend = 0;
11365 outrel.r_info = ELF32_R_INFO (indx,
11366 R_ARM_TLS_DTPOFF32);
11367 outrel.r_offset += 4;
11368
11369 if (globals->use_rel)
11370 bfd_put_32 (output_bfd, outrel.r_addend,
11371 sgot->contents + cur_off + 4);
11372
11373 elf32_arm_add_dynreloc (output_bfd, info,
11374 srelgot, &outrel);
11375 }
11376 }
11377 else
11378 {
11379 /* If we are not emitting relocations for a
11380 general dynamic reference, then we must be in a
11381 static link or an executable link with the
11382 symbol binding locally. Mark it as belonging
11383 to module 1, the executable. */
11384 bfd_put_32 (output_bfd, 1,
11385 sgot->contents + cur_off);
11386 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11387 sgot->contents + cur_off + 4);
11388 }
11389
11390 cur_off += 8;
11391 }
11392
11393 if (tls_type & GOT_TLS_IE)
11394 {
11395 if (need_relocs)
11396 {
11397 if (indx == 0)
11398 outrel.r_addend = value - dtpoff_base (info);
11399 else
11400 outrel.r_addend = 0;
11401 outrel.r_offset = (sgot->output_section->vma
11402 + sgot->output_offset
11403 + cur_off);
11404 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11405
11406 if (globals->use_rel)
11407 bfd_put_32 (output_bfd, outrel.r_addend,
11408 sgot->contents + cur_off);
11409
11410 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11411 }
11412 else
11413 bfd_put_32 (output_bfd, tpoff (info, value),
11414 sgot->contents + cur_off);
11415 cur_off += 4;
11416 }
11417
11418 if (h != NULL)
11419 h->got.offset |= 1;
11420 else
11421 local_got_offsets[r_symndx] |= 1;
11422 }
11423
11424 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11425 off += 8;
11426 else if (tls_type & GOT_TLS_GDESC)
11427 off = offplt;
11428
11429 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11430 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11431 {
11432 bfd_signed_vma offset;
11433 /* TLS stubs are arm mode. The original symbol is a
11434 data object, so branch_type is bogus. */
11435 branch_type = ST_BRANCH_TO_ARM;
11436 enum elf32_arm_stub_type stub_type
11437 = arm_type_of_stub (info, input_section, rel,
11438 st_type, &branch_type,
11439 (struct elf32_arm_link_hash_entry *)h,
11440 globals->tls_trampoline, globals->root.splt,
11441 input_bfd, sym_name);
11442
11443 if (stub_type != arm_stub_none)
11444 {
11445 struct elf32_arm_stub_hash_entry *stub_entry
11446 = elf32_arm_get_stub_entry
11447 (input_section, globals->root.splt, 0, rel,
11448 globals, stub_type);
11449 offset = (stub_entry->stub_offset
11450 + stub_entry->stub_sec->output_offset
11451 + stub_entry->stub_sec->output_section->vma);
11452 }
11453 else
11454 offset = (globals->root.splt->output_section->vma
11455 + globals->root.splt->output_offset
11456 + globals->tls_trampoline);
11457
11458 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11459 {
11460 unsigned long inst;
11461
11462 offset -= (input_section->output_section->vma
11463 + input_section->output_offset
11464 + rel->r_offset + 8);
11465
11466 inst = offset >> 2;
11467 inst &= 0x00ffffff;
11468 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11469 }
11470 else
11471 {
11472 /* Thumb blx encodes the offset in a complicated
11473 fashion. */
11474 unsigned upper_insn, lower_insn;
11475 unsigned neg;
11476
11477 offset -= (input_section->output_section->vma
11478 + input_section->output_offset
11479 + rel->r_offset + 4);
11480
11481 if (stub_type != arm_stub_none
11482 && arm_stub_is_thumb (stub_type))
11483 {
11484 lower_insn = 0xd000;
11485 }
11486 else
11487 {
11488 lower_insn = 0xc000;
11489 /* Round up the offset to a word boundary. */
11490 offset = (offset + 2) & ~2;
11491 }
11492
11493 neg = offset < 0;
11494 upper_insn = (0xf000
11495 | ((offset >> 12) & 0x3ff)
11496 | (neg << 10));
11497 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11498 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11499 | ((offset >> 1) & 0x7ff);
11500 bfd_put_16 (input_bfd, upper_insn, hit_data);
11501 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11502 return bfd_reloc_ok;
11503 }
11504 }
11505 /* These relocations needs special care, as besides the fact
11506 they point somewhere in .gotplt, the addend must be
11507 adjusted accordingly depending on the type of instruction
11508 we refer to. */
11509 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11510 {
11511 unsigned long data, insn;
11512 unsigned thumb;
11513
11514 data = bfd_get_32 (input_bfd, hit_data);
11515 thumb = data & 1;
11516 data &= ~1u;
11517
11518 if (thumb)
11519 {
11520 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11521 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11522 insn = (insn << 16)
11523 | bfd_get_16 (input_bfd,
11524 contents + rel->r_offset - data + 2);
11525 if ((insn & 0xf800c000) == 0xf000c000)
11526 /* bl/blx */
11527 value = -6;
11528 else if ((insn & 0xffffff00) == 0x4400)
11529 /* add */
11530 value = -5;
11531 else
11532 {
11533 (*_bfd_error_handler)
11534 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11535 input_bfd, input_section,
11536 (unsigned long)rel->r_offset, insn);
11537 return bfd_reloc_notsupported;
11538 }
11539 }
11540 else
11541 {
11542 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11543
11544 switch (insn >> 24)
11545 {
11546 case 0xeb: /* bl */
11547 case 0xfa: /* blx */
11548 value = -4;
11549 break;
11550
11551 case 0xe0: /* add */
11552 value = -8;
11553 break;
11554
11555 default:
11556 (*_bfd_error_handler)
11557 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11558 input_bfd, input_section,
11559 (unsigned long)rel->r_offset, insn);
11560 return bfd_reloc_notsupported;
11561 }
11562 }
11563
11564 value += ((globals->root.sgotplt->output_section->vma
11565 + globals->root.sgotplt->output_offset + off)
11566 - (input_section->output_section->vma
11567 + input_section->output_offset
11568 + rel->r_offset)
11569 + globals->sgotplt_jump_table_size);
11570 }
11571 else
11572 value = ((globals->root.sgot->output_section->vma
11573 + globals->root.sgot->output_offset + off)
11574 - (input_section->output_section->vma
11575 + input_section->output_offset + rel->r_offset));
11576
11577 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11578 contents, rel->r_offset, value,
11579 rel->r_addend);
11580 }
11581
11582 case R_ARM_TLS_LE32:
11583 if (bfd_link_dll (info))
11584 {
11585 (*_bfd_error_handler)
11586 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11587 input_bfd, input_section,
11588 (long) rel->r_offset, howto->name);
11589 return bfd_reloc_notsupported;
11590 }
11591 else
11592 value = tpoff (info, value);
11593
11594 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11595 contents, rel->r_offset, value,
11596 rel->r_addend);
11597
11598 case R_ARM_V4BX:
11599 if (globals->fix_v4bx)
11600 {
11601 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11602
11603 /* Ensure that we have a BX instruction. */
11604 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11605
11606 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11607 {
11608 /* Branch to veneer. */
11609 bfd_vma glue_addr;
11610 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11611 glue_addr -= input_section->output_section->vma
11612 + input_section->output_offset
11613 + rel->r_offset + 8;
11614 insn = (insn & 0xf0000000) | 0x0a000000
11615 | ((glue_addr >> 2) & 0x00ffffff);
11616 }
11617 else
11618 {
11619 /* Preserve Rm (lowest four bits) and the condition code
11620 (highest four bits). Other bits encode MOV PC,Rm. */
11621 insn = (insn & 0xf000000f) | 0x01a0f000;
11622 }
11623
11624 bfd_put_32 (input_bfd, insn, hit_data);
11625 }
11626 return bfd_reloc_ok;
11627
11628 case R_ARM_MOVW_ABS_NC:
11629 case R_ARM_MOVT_ABS:
11630 case R_ARM_MOVW_PREL_NC:
11631 case R_ARM_MOVT_PREL:
11632 /* Until we properly support segment-base-relative addressing then
11633 we assume the segment base to be zero, as for the group relocations.
11634 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11635 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11636 case R_ARM_MOVW_BREL_NC:
11637 case R_ARM_MOVW_BREL:
11638 case R_ARM_MOVT_BREL:
11639 {
11640 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11641
11642 if (globals->use_rel)
11643 {
11644 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11645 signed_addend = (addend ^ 0x8000) - 0x8000;
11646 }
11647
11648 value += signed_addend;
11649
11650 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11651 value -= (input_section->output_section->vma
11652 + input_section->output_offset + rel->r_offset);
11653
11654 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11655 return bfd_reloc_overflow;
11656
11657 if (branch_type == ST_BRANCH_TO_THUMB)
11658 value |= 1;
11659
11660 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11661 || r_type == R_ARM_MOVT_BREL)
11662 value >>= 16;
11663
11664 insn &= 0xfff0f000;
11665 insn |= value & 0xfff;
11666 insn |= (value & 0xf000) << 4;
11667 bfd_put_32 (input_bfd, insn, hit_data);
11668 }
11669 return bfd_reloc_ok;
11670
11671 case R_ARM_THM_MOVW_ABS_NC:
11672 case R_ARM_THM_MOVT_ABS:
11673 case R_ARM_THM_MOVW_PREL_NC:
11674 case R_ARM_THM_MOVT_PREL:
11675 /* Until we properly support segment-base-relative addressing then
11676 we assume the segment base to be zero, as for the above relocations.
11677 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11678 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11679 as R_ARM_THM_MOVT_ABS. */
11680 case R_ARM_THM_MOVW_BREL_NC:
11681 case R_ARM_THM_MOVW_BREL:
11682 case R_ARM_THM_MOVT_BREL:
11683 {
11684 bfd_vma insn;
11685
11686 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11687 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11688
11689 if (globals->use_rel)
11690 {
11691 addend = ((insn >> 4) & 0xf000)
11692 | ((insn >> 15) & 0x0800)
11693 | ((insn >> 4) & 0x0700)
11694 | (insn & 0x00ff);
11695 signed_addend = (addend ^ 0x8000) - 0x8000;
11696 }
11697
11698 value += signed_addend;
11699
11700 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11701 value -= (input_section->output_section->vma
11702 + input_section->output_offset + rel->r_offset);
11703
11704 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11705 return bfd_reloc_overflow;
11706
11707 if (branch_type == ST_BRANCH_TO_THUMB)
11708 value |= 1;
11709
11710 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11711 || r_type == R_ARM_THM_MOVT_BREL)
11712 value >>= 16;
11713
11714 insn &= 0xfbf08f00;
11715 insn |= (value & 0xf000) << 4;
11716 insn |= (value & 0x0800) << 15;
11717 insn |= (value & 0x0700) << 4;
11718 insn |= (value & 0x00ff);
11719
11720 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11721 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11722 }
11723 return bfd_reloc_ok;
11724
11725 case R_ARM_ALU_PC_G0_NC:
11726 case R_ARM_ALU_PC_G1_NC:
11727 case R_ARM_ALU_PC_G0:
11728 case R_ARM_ALU_PC_G1:
11729 case R_ARM_ALU_PC_G2:
11730 case R_ARM_ALU_SB_G0_NC:
11731 case R_ARM_ALU_SB_G1_NC:
11732 case R_ARM_ALU_SB_G0:
11733 case R_ARM_ALU_SB_G1:
11734 case R_ARM_ALU_SB_G2:
11735 {
11736 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11737 bfd_vma pc = input_section->output_section->vma
11738 + input_section->output_offset + rel->r_offset;
11739 /* sb is the origin of the *segment* containing the symbol. */
11740 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11741 bfd_vma residual;
11742 bfd_vma g_n;
11743 bfd_signed_vma signed_value;
11744 int group = 0;
11745
11746 /* Determine which group of bits to select. */
11747 switch (r_type)
11748 {
11749 case R_ARM_ALU_PC_G0_NC:
11750 case R_ARM_ALU_PC_G0:
11751 case R_ARM_ALU_SB_G0_NC:
11752 case R_ARM_ALU_SB_G0:
11753 group = 0;
11754 break;
11755
11756 case R_ARM_ALU_PC_G1_NC:
11757 case R_ARM_ALU_PC_G1:
11758 case R_ARM_ALU_SB_G1_NC:
11759 case R_ARM_ALU_SB_G1:
11760 group = 1;
11761 break;
11762
11763 case R_ARM_ALU_PC_G2:
11764 case R_ARM_ALU_SB_G2:
11765 group = 2;
11766 break;
11767
11768 default:
11769 abort ();
11770 }
11771
11772 /* If REL, extract the addend from the insn. If RELA, it will
11773 have already been fetched for us. */
11774 if (globals->use_rel)
11775 {
11776 int negative;
11777 bfd_vma constant = insn & 0xff;
11778 bfd_vma rotation = (insn & 0xf00) >> 8;
11779
11780 if (rotation == 0)
11781 signed_addend = constant;
11782 else
11783 {
11784 /* Compensate for the fact that in the instruction, the
11785 rotation is stored in multiples of 2 bits. */
11786 rotation *= 2;
11787
11788 /* Rotate "constant" right by "rotation" bits. */
11789 signed_addend = (constant >> rotation) |
11790 (constant << (8 * sizeof (bfd_vma) - rotation));
11791 }
11792
11793 /* Determine if the instruction is an ADD or a SUB.
11794 (For REL, this determines the sign of the addend.) */
11795 negative = identify_add_or_sub (insn);
11796 if (negative == 0)
11797 {
11798 (*_bfd_error_handler)
11799 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11800 input_bfd, input_section,
11801 (long) rel->r_offset, howto->name);
11802 return bfd_reloc_overflow;
11803 }
11804
11805 signed_addend *= negative;
11806 }
11807
11808 /* Compute the value (X) to go in the place. */
11809 if (r_type == R_ARM_ALU_PC_G0_NC
11810 || r_type == R_ARM_ALU_PC_G1_NC
11811 || r_type == R_ARM_ALU_PC_G0
11812 || r_type == R_ARM_ALU_PC_G1
11813 || r_type == R_ARM_ALU_PC_G2)
11814 /* PC relative. */
11815 signed_value = value - pc + signed_addend;
11816 else
11817 /* Section base relative. */
11818 signed_value = value - sb + signed_addend;
11819
11820 /* If the target symbol is a Thumb function, then set the
11821 Thumb bit in the address. */
11822 if (branch_type == ST_BRANCH_TO_THUMB)
11823 signed_value |= 1;
11824
11825 /* Calculate the value of the relevant G_n, in encoded
11826 constant-with-rotation format. */
11827 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11828 group, &residual);
11829
11830 /* Check for overflow if required. */
11831 if ((r_type == R_ARM_ALU_PC_G0
11832 || r_type == R_ARM_ALU_PC_G1
11833 || r_type == R_ARM_ALU_PC_G2
11834 || r_type == R_ARM_ALU_SB_G0
11835 || r_type == R_ARM_ALU_SB_G1
11836 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11837 {
11838 (*_bfd_error_handler)
11839 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11840 input_bfd, input_section,
11841 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
11842 howto->name);
11843 return bfd_reloc_overflow;
11844 }
11845
11846 /* Mask out the value and the ADD/SUB part of the opcode; take care
11847 not to destroy the S bit. */
11848 insn &= 0xff1ff000;
11849
11850 /* Set the opcode according to whether the value to go in the
11851 place is negative. */
11852 if (signed_value < 0)
11853 insn |= 1 << 22;
11854 else
11855 insn |= 1 << 23;
11856
11857 /* Encode the offset. */
11858 insn |= g_n;
11859
11860 bfd_put_32 (input_bfd, insn, hit_data);
11861 }
11862 return bfd_reloc_ok;
11863
11864 case R_ARM_LDR_PC_G0:
11865 case R_ARM_LDR_PC_G1:
11866 case R_ARM_LDR_PC_G2:
11867 case R_ARM_LDR_SB_G0:
11868 case R_ARM_LDR_SB_G1:
11869 case R_ARM_LDR_SB_G2:
11870 {
11871 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11872 bfd_vma pc = input_section->output_section->vma
11873 + input_section->output_offset + rel->r_offset;
11874 /* sb is the origin of the *segment* containing the symbol. */
11875 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11876 bfd_vma residual;
11877 bfd_signed_vma signed_value;
11878 int group = 0;
11879
11880 /* Determine which groups of bits to calculate. */
11881 switch (r_type)
11882 {
11883 case R_ARM_LDR_PC_G0:
11884 case R_ARM_LDR_SB_G0:
11885 group = 0;
11886 break;
11887
11888 case R_ARM_LDR_PC_G1:
11889 case R_ARM_LDR_SB_G1:
11890 group = 1;
11891 break;
11892
11893 case R_ARM_LDR_PC_G2:
11894 case R_ARM_LDR_SB_G2:
11895 group = 2;
11896 break;
11897
11898 default:
11899 abort ();
11900 }
11901
11902 /* If REL, extract the addend from the insn. If RELA, it will
11903 have already been fetched for us. */
11904 if (globals->use_rel)
11905 {
11906 int negative = (insn & (1 << 23)) ? 1 : -1;
11907 signed_addend = negative * (insn & 0xfff);
11908 }
11909
11910 /* Compute the value (X) to go in the place. */
11911 if (r_type == R_ARM_LDR_PC_G0
11912 || r_type == R_ARM_LDR_PC_G1
11913 || r_type == R_ARM_LDR_PC_G2)
11914 /* PC relative. */
11915 signed_value = value - pc + signed_addend;
11916 else
11917 /* Section base relative. */
11918 signed_value = value - sb + signed_addend;
11919
11920 /* Calculate the value of the relevant G_{n-1} to obtain
11921 the residual at that stage. */
11922 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11923 group - 1, &residual);
11924
11925 /* Check for overflow. */
11926 if (residual >= 0x1000)
11927 {
11928 (*_bfd_error_handler)
11929 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11930 input_bfd, input_section,
11931 (long) rel->r_offset, labs (signed_value), howto->name);
11932 return bfd_reloc_overflow;
11933 }
11934
11935 /* Mask out the value and U bit. */
11936 insn &= 0xff7ff000;
11937
11938 /* Set the U bit if the value to go in the place is non-negative. */
11939 if (signed_value >= 0)
11940 insn |= 1 << 23;
11941
11942 /* Encode the offset. */
11943 insn |= residual;
11944
11945 bfd_put_32 (input_bfd, insn, hit_data);
11946 }
11947 return bfd_reloc_ok;
11948
11949 case R_ARM_LDRS_PC_G0:
11950 case R_ARM_LDRS_PC_G1:
11951 case R_ARM_LDRS_PC_G2:
11952 case R_ARM_LDRS_SB_G0:
11953 case R_ARM_LDRS_SB_G1:
11954 case R_ARM_LDRS_SB_G2:
11955 {
11956 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11957 bfd_vma pc = input_section->output_section->vma
11958 + input_section->output_offset + rel->r_offset;
11959 /* sb is the origin of the *segment* containing the symbol. */
11960 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11961 bfd_vma residual;
11962 bfd_signed_vma signed_value;
11963 int group = 0;
11964
11965 /* Determine which groups of bits to calculate. */
11966 switch (r_type)
11967 {
11968 case R_ARM_LDRS_PC_G0:
11969 case R_ARM_LDRS_SB_G0:
11970 group = 0;
11971 break;
11972
11973 case R_ARM_LDRS_PC_G1:
11974 case R_ARM_LDRS_SB_G1:
11975 group = 1;
11976 break;
11977
11978 case R_ARM_LDRS_PC_G2:
11979 case R_ARM_LDRS_SB_G2:
11980 group = 2;
11981 break;
11982
11983 default:
11984 abort ();
11985 }
11986
11987 /* If REL, extract the addend from the insn. If RELA, it will
11988 have already been fetched for us. */
11989 if (globals->use_rel)
11990 {
11991 int negative = (insn & (1 << 23)) ? 1 : -1;
11992 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11993 }
11994
11995 /* Compute the value (X) to go in the place. */
11996 if (r_type == R_ARM_LDRS_PC_G0
11997 || r_type == R_ARM_LDRS_PC_G1
11998 || r_type == R_ARM_LDRS_PC_G2)
11999 /* PC relative. */
12000 signed_value = value - pc + signed_addend;
12001 else
12002 /* Section base relative. */
12003 signed_value = value - sb + signed_addend;
12004
12005 /* Calculate the value of the relevant G_{n-1} to obtain
12006 the residual at that stage. */
12007 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12008 group - 1, &residual);
12009
12010 /* Check for overflow. */
12011 if (residual >= 0x100)
12012 {
12013 (*_bfd_error_handler)
12014 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12015 input_bfd, input_section,
12016 (long) rel->r_offset, labs (signed_value), howto->name);
12017 return bfd_reloc_overflow;
12018 }
12019
12020 /* Mask out the value and U bit. */
12021 insn &= 0xff7ff0f0;
12022
12023 /* Set the U bit if the value to go in the place is non-negative. */
12024 if (signed_value >= 0)
12025 insn |= 1 << 23;
12026
12027 /* Encode the offset. */
12028 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12029
12030 bfd_put_32 (input_bfd, insn, hit_data);
12031 }
12032 return bfd_reloc_ok;
12033
12034 case R_ARM_LDC_PC_G0:
12035 case R_ARM_LDC_PC_G1:
12036 case R_ARM_LDC_PC_G2:
12037 case R_ARM_LDC_SB_G0:
12038 case R_ARM_LDC_SB_G1:
12039 case R_ARM_LDC_SB_G2:
12040 {
12041 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12042 bfd_vma pc = input_section->output_section->vma
12043 + input_section->output_offset + rel->r_offset;
12044 /* sb is the origin of the *segment* containing the symbol. */
12045 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12046 bfd_vma residual;
12047 bfd_signed_vma signed_value;
12048 int group = 0;
12049
12050 /* Determine which groups of bits to calculate. */
12051 switch (r_type)
12052 {
12053 case R_ARM_LDC_PC_G0:
12054 case R_ARM_LDC_SB_G0:
12055 group = 0;
12056 break;
12057
12058 case R_ARM_LDC_PC_G1:
12059 case R_ARM_LDC_SB_G1:
12060 group = 1;
12061 break;
12062
12063 case R_ARM_LDC_PC_G2:
12064 case R_ARM_LDC_SB_G2:
12065 group = 2;
12066 break;
12067
12068 default:
12069 abort ();
12070 }
12071
12072 /* If REL, extract the addend from the insn. If RELA, it will
12073 have already been fetched for us. */
12074 if (globals->use_rel)
12075 {
12076 int negative = (insn & (1 << 23)) ? 1 : -1;
12077 signed_addend = negative * ((insn & 0xff) << 2);
12078 }
12079
12080 /* Compute the value (X) to go in the place. */
12081 if (r_type == R_ARM_LDC_PC_G0
12082 || r_type == R_ARM_LDC_PC_G1
12083 || r_type == R_ARM_LDC_PC_G2)
12084 /* PC relative. */
12085 signed_value = value - pc + signed_addend;
12086 else
12087 /* Section base relative. */
12088 signed_value = value - sb + signed_addend;
12089
12090 /* Calculate the value of the relevant G_{n-1} to obtain
12091 the residual at that stage. */
12092 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12093 group - 1, &residual);
12094
12095 /* Check for overflow. (The absolute value to go in the place must be
12096 divisible by four and, after having been divided by four, must
12097 fit in eight bits.) */
12098 if ((residual & 0x3) != 0 || residual >= 0x400)
12099 {
12100 (*_bfd_error_handler)
12101 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12102 input_bfd, input_section,
12103 (long) rel->r_offset, labs (signed_value), howto->name);
12104 return bfd_reloc_overflow;
12105 }
12106
12107 /* Mask out the value and U bit. */
12108 insn &= 0xff7fff00;
12109
12110 /* Set the U bit if the value to go in the place is non-negative. */
12111 if (signed_value >= 0)
12112 insn |= 1 << 23;
12113
12114 /* Encode the offset. */
12115 insn |= residual >> 2;
12116
12117 bfd_put_32 (input_bfd, insn, hit_data);
12118 }
12119 return bfd_reloc_ok;
12120
12121 case R_ARM_THM_ALU_ABS_G0_NC:
12122 case R_ARM_THM_ALU_ABS_G1_NC:
12123 case R_ARM_THM_ALU_ABS_G2_NC:
12124 case R_ARM_THM_ALU_ABS_G3_NC:
12125 {
12126 const int shift_array[4] = {0, 8, 16, 24};
12127 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12128 bfd_vma addr = value;
12129 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12130
12131 /* Compute address. */
12132 if (globals->use_rel)
12133 signed_addend = insn & 0xff;
12134 addr += signed_addend;
12135 if (branch_type == ST_BRANCH_TO_THUMB)
12136 addr |= 1;
12137 /* Clean imm8 insn. */
12138 insn &= 0xff00;
12139 /* And update with correct part of address. */
12140 insn |= (addr >> shift) & 0xff;
12141 /* Update insn. */
12142 bfd_put_16 (input_bfd, insn, hit_data);
12143 }
12144
12145 *unresolved_reloc_p = FALSE;
12146 return bfd_reloc_ok;
12147
12148 default:
12149 return bfd_reloc_notsupported;
12150 }
12151 }
12152
12153 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12154 static void
12155 arm_add_to_rel (bfd * abfd,
12156 bfd_byte * address,
12157 reloc_howto_type * howto,
12158 bfd_signed_vma increment)
12159 {
12160 bfd_signed_vma addend;
12161
12162 if (howto->type == R_ARM_THM_CALL
12163 || howto->type == R_ARM_THM_JUMP24)
12164 {
12165 int upper_insn, lower_insn;
12166 int upper, lower;
12167
12168 upper_insn = bfd_get_16 (abfd, address);
12169 lower_insn = bfd_get_16 (abfd, address + 2);
12170 upper = upper_insn & 0x7ff;
12171 lower = lower_insn & 0x7ff;
12172
12173 addend = (upper << 12) | (lower << 1);
12174 addend += increment;
12175 addend >>= 1;
12176
12177 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12178 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12179
12180 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12181 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12182 }
12183 else
12184 {
12185 bfd_vma contents;
12186
12187 contents = bfd_get_32 (abfd, address);
12188
12189 /* Get the (signed) value from the instruction. */
12190 addend = contents & howto->src_mask;
12191 if (addend & ((howto->src_mask + 1) >> 1))
12192 {
12193 bfd_signed_vma mask;
12194
12195 mask = -1;
12196 mask &= ~ howto->src_mask;
12197 addend |= mask;
12198 }
12199
12200 /* Add in the increment, (which is a byte value). */
12201 switch (howto->type)
12202 {
12203 default:
12204 addend += increment;
12205 break;
12206
12207 case R_ARM_PC24:
12208 case R_ARM_PLT32:
12209 case R_ARM_CALL:
12210 case R_ARM_JUMP24:
12211 addend <<= howto->size;
12212 addend += increment;
12213
12214 /* Should we check for overflow here ? */
12215
12216 /* Drop any undesired bits. */
12217 addend >>= howto->rightshift;
12218 break;
12219 }
12220
12221 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12222
12223 bfd_put_32 (abfd, contents, address);
12224 }
12225 }
12226
12227 #define IS_ARM_TLS_RELOC(R_TYPE) \
12228 ((R_TYPE) == R_ARM_TLS_GD32 \
12229 || (R_TYPE) == R_ARM_TLS_LDO32 \
12230 || (R_TYPE) == R_ARM_TLS_LDM32 \
12231 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12232 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12233 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12234 || (R_TYPE) == R_ARM_TLS_LE32 \
12235 || (R_TYPE) == R_ARM_TLS_IE32 \
12236 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12237
12238 /* Specific set of relocations for the gnu tls dialect. */
12239 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12240 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12241 || (R_TYPE) == R_ARM_TLS_CALL \
12242 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12243 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12244 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12245
12246 /* Relocate an ARM ELF section. */
12247
12248 static bfd_boolean
12249 elf32_arm_relocate_section (bfd * output_bfd,
12250 struct bfd_link_info * info,
12251 bfd * input_bfd,
12252 asection * input_section,
12253 bfd_byte * contents,
12254 Elf_Internal_Rela * relocs,
12255 Elf_Internal_Sym * local_syms,
12256 asection ** local_sections)
12257 {
12258 Elf_Internal_Shdr *symtab_hdr;
12259 struct elf_link_hash_entry **sym_hashes;
12260 Elf_Internal_Rela *rel;
12261 Elf_Internal_Rela *relend;
12262 const char *name;
12263 struct elf32_arm_link_hash_table * globals;
12264
12265 globals = elf32_arm_hash_table (info);
12266 if (globals == NULL)
12267 return FALSE;
12268
12269 symtab_hdr = & elf_symtab_hdr (input_bfd);
12270 sym_hashes = elf_sym_hashes (input_bfd);
12271
12272 rel = relocs;
12273 relend = relocs + input_section->reloc_count;
12274 for (; rel < relend; rel++)
12275 {
12276 int r_type;
12277 reloc_howto_type * howto;
12278 unsigned long r_symndx;
12279 Elf_Internal_Sym * sym;
12280 asection * sec;
12281 struct elf_link_hash_entry * h;
12282 bfd_vma relocation;
12283 bfd_reloc_status_type r;
12284 arelent bfd_reloc;
12285 char sym_type;
12286 bfd_boolean unresolved_reloc = FALSE;
12287 char *error_message = NULL;
12288
12289 r_symndx = ELF32_R_SYM (rel->r_info);
12290 r_type = ELF32_R_TYPE (rel->r_info);
12291 r_type = arm_real_reloc_type (globals, r_type);
12292
12293 if ( r_type == R_ARM_GNU_VTENTRY
12294 || r_type == R_ARM_GNU_VTINHERIT)
12295 continue;
12296
12297 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12298 howto = bfd_reloc.howto;
12299
12300 h = NULL;
12301 sym = NULL;
12302 sec = NULL;
12303
12304 if (r_symndx < symtab_hdr->sh_info)
12305 {
12306 sym = local_syms + r_symndx;
12307 sym_type = ELF32_ST_TYPE (sym->st_info);
12308 sec = local_sections[r_symndx];
12309
12310 /* An object file might have a reference to a local
12311 undefined symbol. This is a daft object file, but we
12312 should at least do something about it. V4BX & NONE
12313 relocations do not use the symbol and are explicitly
12314 allowed to use the undefined symbol, so allow those.
12315 Likewise for relocations against STN_UNDEF. */
12316 if (r_type != R_ARM_V4BX
12317 && r_type != R_ARM_NONE
12318 && r_symndx != STN_UNDEF
12319 && bfd_is_und_section (sec)
12320 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12321 (*info->callbacks->undefined_symbol)
12322 (info, bfd_elf_string_from_elf_section
12323 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12324 input_bfd, input_section,
12325 rel->r_offset, TRUE);
12326
12327 if (globals->use_rel)
12328 {
12329 relocation = (sec->output_section->vma
12330 + sec->output_offset
12331 + sym->st_value);
12332 if (!bfd_link_relocatable (info)
12333 && (sec->flags & SEC_MERGE)
12334 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12335 {
12336 asection *msec;
12337 bfd_vma addend, value;
12338
12339 switch (r_type)
12340 {
12341 case R_ARM_MOVW_ABS_NC:
12342 case R_ARM_MOVT_ABS:
12343 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12344 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12345 addend = (addend ^ 0x8000) - 0x8000;
12346 break;
12347
12348 case R_ARM_THM_MOVW_ABS_NC:
12349 case R_ARM_THM_MOVT_ABS:
12350 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12351 << 16;
12352 value |= bfd_get_16 (input_bfd,
12353 contents + rel->r_offset + 2);
12354 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12355 | ((value & 0x04000000) >> 15);
12356 addend = (addend ^ 0x8000) - 0x8000;
12357 break;
12358
12359 default:
12360 if (howto->rightshift
12361 || (howto->src_mask & (howto->src_mask + 1)))
12362 {
12363 (*_bfd_error_handler)
12364 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
12365 input_bfd, input_section,
12366 (long) rel->r_offset, howto->name);
12367 return FALSE;
12368 }
12369
12370 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12371
12372 /* Get the (signed) value from the instruction. */
12373 addend = value & howto->src_mask;
12374 if (addend & ((howto->src_mask + 1) >> 1))
12375 {
12376 bfd_signed_vma mask;
12377
12378 mask = -1;
12379 mask &= ~ howto->src_mask;
12380 addend |= mask;
12381 }
12382 break;
12383 }
12384
12385 msec = sec;
12386 addend =
12387 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12388 - relocation;
12389 addend += msec->output_section->vma + msec->output_offset;
12390
12391 /* Cases here must match those in the preceding
12392 switch statement. */
12393 switch (r_type)
12394 {
12395 case R_ARM_MOVW_ABS_NC:
12396 case R_ARM_MOVT_ABS:
12397 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12398 | (addend & 0xfff);
12399 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12400 break;
12401
12402 case R_ARM_THM_MOVW_ABS_NC:
12403 case R_ARM_THM_MOVT_ABS:
12404 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12405 | (addend & 0xff) | ((addend & 0x0800) << 15);
12406 bfd_put_16 (input_bfd, value >> 16,
12407 contents + rel->r_offset);
12408 bfd_put_16 (input_bfd, value,
12409 contents + rel->r_offset + 2);
12410 break;
12411
12412 default:
12413 value = (value & ~ howto->dst_mask)
12414 | (addend & howto->dst_mask);
12415 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12416 break;
12417 }
12418 }
12419 }
12420 else
12421 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12422 }
12423 else
12424 {
12425 bfd_boolean warned, ignored;
12426
12427 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12428 r_symndx, symtab_hdr, sym_hashes,
12429 h, sec, relocation,
12430 unresolved_reloc, warned, ignored);
12431
12432 sym_type = h->type;
12433 }
12434
12435 if (sec != NULL && discarded_section (sec))
12436 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12437 rel, 1, relend, howto, 0, contents);
12438
12439 if (bfd_link_relocatable (info))
12440 {
12441 /* This is a relocatable link. We don't have to change
12442 anything, unless the reloc is against a section symbol,
12443 in which case we have to adjust according to where the
12444 section symbol winds up in the output section. */
12445 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12446 {
12447 if (globals->use_rel)
12448 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12449 howto, (bfd_signed_vma) sec->output_offset);
12450 else
12451 rel->r_addend += sec->output_offset;
12452 }
12453 continue;
12454 }
12455
12456 if (h != NULL)
12457 name = h->root.root.string;
12458 else
12459 {
12460 name = (bfd_elf_string_from_elf_section
12461 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12462 if (name == NULL || *name == '\0')
12463 name = bfd_section_name (input_bfd, sec);
12464 }
12465
12466 if (r_symndx != STN_UNDEF
12467 && r_type != R_ARM_NONE
12468 && (h == NULL
12469 || h->root.type == bfd_link_hash_defined
12470 || h->root.type == bfd_link_hash_defweak)
12471 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12472 {
12473 (*_bfd_error_handler)
12474 ((sym_type == STT_TLS
12475 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12476 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12477 input_bfd,
12478 input_section,
12479 (long) rel->r_offset,
12480 howto->name,
12481 name);
12482 }
12483
12484 /* We call elf32_arm_final_link_relocate unless we're completely
12485 done, i.e., the relaxation produced the final output we want,
12486 and we won't let anybody mess with it. Also, we have to do
12487 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12488 both in relaxed and non-relaxed cases. */
12489 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12490 || (IS_ARM_TLS_GNU_RELOC (r_type)
12491 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12492 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12493 & GOT_TLS_GDESC)))
12494 {
12495 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12496 contents, rel, h == NULL);
12497 /* This may have been marked unresolved because it came from
12498 a shared library. But we've just dealt with that. */
12499 unresolved_reloc = 0;
12500 }
12501 else
12502 r = bfd_reloc_continue;
12503
12504 if (r == bfd_reloc_continue)
12505 {
12506 unsigned char branch_type =
12507 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12508 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12509
12510 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12511 input_section, contents, rel,
12512 relocation, info, sec, name,
12513 sym_type, branch_type, h,
12514 &unresolved_reloc,
12515 &error_message);
12516 }
12517
12518 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12519 because such sections are not SEC_ALLOC and thus ld.so will
12520 not process them. */
12521 if (unresolved_reloc
12522 && !((input_section->flags & SEC_DEBUGGING) != 0
12523 && h->def_dynamic)
12524 && _bfd_elf_section_offset (output_bfd, info, input_section,
12525 rel->r_offset) != (bfd_vma) -1)
12526 {
12527 (*_bfd_error_handler)
12528 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12529 input_bfd,
12530 input_section,
12531 (long) rel->r_offset,
12532 howto->name,
12533 h->root.root.string);
12534 return FALSE;
12535 }
12536
12537 if (r != bfd_reloc_ok)
12538 {
12539 switch (r)
12540 {
12541 case bfd_reloc_overflow:
12542 /* If the overflowing reloc was to an undefined symbol,
12543 we have already printed one error message and there
12544 is no point complaining again. */
12545 if (!h || h->root.type != bfd_link_hash_undefined)
12546 (*info->callbacks->reloc_overflow)
12547 (info, (h ? &h->root : NULL), name, howto->name,
12548 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12549 break;
12550
12551 case bfd_reloc_undefined:
12552 (*info->callbacks->undefined_symbol)
12553 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12554 break;
12555
12556 case bfd_reloc_outofrange:
12557 error_message = _("out of range");
12558 goto common_error;
12559
12560 case bfd_reloc_notsupported:
12561 error_message = _("unsupported relocation");
12562 goto common_error;
12563
12564 case bfd_reloc_dangerous:
12565 /* error_message should already be set. */
12566 goto common_error;
12567
12568 default:
12569 error_message = _("unknown error");
12570 /* Fall through. */
12571
12572 common_error:
12573 BFD_ASSERT (error_message != NULL);
12574 (*info->callbacks->reloc_dangerous)
12575 (info, error_message, input_bfd, input_section, rel->r_offset);
12576 break;
12577 }
12578 }
12579 }
12580
12581 return TRUE;
12582 }
12583
12584 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12585 adds the edit to the start of the list. (The list must be built in order of
12586 ascending TINDEX: the function's callers are primarily responsible for
12587 maintaining that condition). */
12588
12589 static void
12590 add_unwind_table_edit (arm_unwind_table_edit **head,
12591 arm_unwind_table_edit **tail,
12592 arm_unwind_edit_type type,
12593 asection *linked_section,
12594 unsigned int tindex)
12595 {
12596 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12597 xmalloc (sizeof (arm_unwind_table_edit));
12598
12599 new_edit->type = type;
12600 new_edit->linked_section = linked_section;
12601 new_edit->index = tindex;
12602
12603 if (tindex > 0)
12604 {
12605 new_edit->next = NULL;
12606
12607 if (*tail)
12608 (*tail)->next = new_edit;
12609
12610 (*tail) = new_edit;
12611
12612 if (!*head)
12613 (*head) = new_edit;
12614 }
12615 else
12616 {
12617 new_edit->next = *head;
12618
12619 if (!*tail)
12620 *tail = new_edit;
12621
12622 *head = new_edit;
12623 }
12624 }
12625
12626 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12627
12628 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12629 static void
12630 adjust_exidx_size(asection *exidx_sec, int adjust)
12631 {
12632 asection *out_sec;
12633
12634 if (!exidx_sec->rawsize)
12635 exidx_sec->rawsize = exidx_sec->size;
12636
12637 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12638 out_sec = exidx_sec->output_section;
12639 /* Adjust size of output section. */
12640 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12641 }
12642
12643 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12644 static void
12645 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12646 {
12647 struct _arm_elf_section_data *exidx_arm_data;
12648
12649 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12650 add_unwind_table_edit (
12651 &exidx_arm_data->u.exidx.unwind_edit_list,
12652 &exidx_arm_data->u.exidx.unwind_edit_tail,
12653 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12654
12655 exidx_arm_data->additional_reloc_count++;
12656
12657 adjust_exidx_size(exidx_sec, 8);
12658 }
12659
12660 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12661 made to those tables, such that:
12662
12663 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12664 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12665 codes which have been inlined into the index).
12666
12667 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12668
12669 The edits are applied when the tables are written
12670 (in elf32_arm_write_section). */
12671
12672 bfd_boolean
12673 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12674 unsigned int num_text_sections,
12675 struct bfd_link_info *info,
12676 bfd_boolean merge_exidx_entries)
12677 {
12678 bfd *inp;
12679 unsigned int last_second_word = 0, i;
12680 asection *last_exidx_sec = NULL;
12681 asection *last_text_sec = NULL;
12682 int last_unwind_type = -1;
12683
12684 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12685 text sections. */
12686 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12687 {
12688 asection *sec;
12689
12690 for (sec = inp->sections; sec != NULL; sec = sec->next)
12691 {
12692 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12693 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12694
12695 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12696 continue;
12697
12698 if (elf_sec->linked_to)
12699 {
12700 Elf_Internal_Shdr *linked_hdr
12701 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12702 struct _arm_elf_section_data *linked_sec_arm_data
12703 = get_arm_elf_section_data (linked_hdr->bfd_section);
12704
12705 if (linked_sec_arm_data == NULL)
12706 continue;
12707
12708 /* Link this .ARM.exidx section back from the text section it
12709 describes. */
12710 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12711 }
12712 }
12713 }
12714
12715 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12716 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12717 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12718
12719 for (i = 0; i < num_text_sections; i++)
12720 {
12721 asection *sec = text_section_order[i];
12722 asection *exidx_sec;
12723 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12724 struct _arm_elf_section_data *exidx_arm_data;
12725 bfd_byte *contents = NULL;
12726 int deleted_exidx_bytes = 0;
12727 bfd_vma j;
12728 arm_unwind_table_edit *unwind_edit_head = NULL;
12729 arm_unwind_table_edit *unwind_edit_tail = NULL;
12730 Elf_Internal_Shdr *hdr;
12731 bfd *ibfd;
12732
12733 if (arm_data == NULL)
12734 continue;
12735
12736 exidx_sec = arm_data->u.text.arm_exidx_sec;
12737 if (exidx_sec == NULL)
12738 {
12739 /* Section has no unwind data. */
12740 if (last_unwind_type == 0 || !last_exidx_sec)
12741 continue;
12742
12743 /* Ignore zero sized sections. */
12744 if (sec->size == 0)
12745 continue;
12746
12747 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12748 last_unwind_type = 0;
12749 continue;
12750 }
12751
12752 /* Skip /DISCARD/ sections. */
12753 if (bfd_is_abs_section (exidx_sec->output_section))
12754 continue;
12755
12756 hdr = &elf_section_data (exidx_sec)->this_hdr;
12757 if (hdr->sh_type != SHT_ARM_EXIDX)
12758 continue;
12759
12760 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12761 if (exidx_arm_data == NULL)
12762 continue;
12763
12764 ibfd = exidx_sec->owner;
12765
12766 if (hdr->contents != NULL)
12767 contents = hdr->contents;
12768 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12769 /* An error? */
12770 continue;
12771
12772 if (last_unwind_type > 0)
12773 {
12774 unsigned int first_word = bfd_get_32 (ibfd, contents);
12775 /* Add cantunwind if first unwind item does not match section
12776 start. */
12777 if (first_word != sec->vma)
12778 {
12779 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12780 last_unwind_type = 0;
12781 }
12782 }
12783
12784 for (j = 0; j < hdr->sh_size; j += 8)
12785 {
12786 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12787 int unwind_type;
12788 int elide = 0;
12789
12790 /* An EXIDX_CANTUNWIND entry. */
12791 if (second_word == 1)
12792 {
12793 if (last_unwind_type == 0)
12794 elide = 1;
12795 unwind_type = 0;
12796 }
12797 /* Inlined unwinding data. Merge if equal to previous. */
12798 else if ((second_word & 0x80000000) != 0)
12799 {
12800 if (merge_exidx_entries
12801 && last_second_word == second_word && last_unwind_type == 1)
12802 elide = 1;
12803 unwind_type = 1;
12804 last_second_word = second_word;
12805 }
12806 /* Normal table entry. In theory we could merge these too,
12807 but duplicate entries are likely to be much less common. */
12808 else
12809 unwind_type = 2;
12810
12811 if (elide && !bfd_link_relocatable (info))
12812 {
12813 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12814 DELETE_EXIDX_ENTRY, NULL, j / 8);
12815
12816 deleted_exidx_bytes += 8;
12817 }
12818
12819 last_unwind_type = unwind_type;
12820 }
12821
12822 /* Free contents if we allocated it ourselves. */
12823 if (contents != hdr->contents)
12824 free (contents);
12825
12826 /* Record edits to be applied later (in elf32_arm_write_section). */
12827 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12828 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12829
12830 if (deleted_exidx_bytes > 0)
12831 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12832
12833 last_exidx_sec = exidx_sec;
12834 last_text_sec = sec;
12835 }
12836
12837 /* Add terminating CANTUNWIND entry. */
12838 if (!bfd_link_relocatable (info) && last_exidx_sec
12839 && last_unwind_type != 0)
12840 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12841
12842 return TRUE;
12843 }
12844
12845 static bfd_boolean
12846 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12847 bfd *ibfd, const char *name)
12848 {
12849 asection *sec, *osec;
12850
12851 sec = bfd_get_linker_section (ibfd, name);
12852 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12853 return TRUE;
12854
12855 osec = sec->output_section;
12856 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12857 return TRUE;
12858
12859 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12860 sec->output_offset, sec->size))
12861 return FALSE;
12862
12863 return TRUE;
12864 }
12865
12866 static bfd_boolean
12867 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12868 {
12869 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12870 asection *sec, *osec;
12871
12872 if (globals == NULL)
12873 return FALSE;
12874
12875 /* Invoke the regular ELF backend linker to do all the work. */
12876 if (!bfd_elf_final_link (abfd, info))
12877 return FALSE;
12878
12879 /* Process stub sections (eg BE8 encoding, ...). */
12880 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12881 unsigned int i;
12882 for (i=0; i<htab->top_id; i++)
12883 {
12884 sec = htab->stub_group[i].stub_sec;
12885 /* Only process it once, in its link_sec slot. */
12886 if (sec && i == htab->stub_group[i].link_sec->id)
12887 {
12888 osec = sec->output_section;
12889 elf32_arm_write_section (abfd, info, sec, sec->contents);
12890 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12891 sec->output_offset, sec->size))
12892 return FALSE;
12893 }
12894 }
12895
12896 /* Write out any glue sections now that we have created all the
12897 stubs. */
12898 if (globals->bfd_of_glue_owner != NULL)
12899 {
12900 if (! elf32_arm_output_glue_section (info, abfd,
12901 globals->bfd_of_glue_owner,
12902 ARM2THUMB_GLUE_SECTION_NAME))
12903 return FALSE;
12904
12905 if (! elf32_arm_output_glue_section (info, abfd,
12906 globals->bfd_of_glue_owner,
12907 THUMB2ARM_GLUE_SECTION_NAME))
12908 return FALSE;
12909
12910 if (! elf32_arm_output_glue_section (info, abfd,
12911 globals->bfd_of_glue_owner,
12912 VFP11_ERRATUM_VENEER_SECTION_NAME))
12913 return FALSE;
12914
12915 if (! elf32_arm_output_glue_section (info, abfd,
12916 globals->bfd_of_glue_owner,
12917 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12918 return FALSE;
12919
12920 if (! elf32_arm_output_glue_section (info, abfd,
12921 globals->bfd_of_glue_owner,
12922 ARM_BX_GLUE_SECTION_NAME))
12923 return FALSE;
12924 }
12925
12926 return TRUE;
12927 }
12928
12929 /* Return a best guess for the machine number based on the attributes. */
12930
12931 static unsigned int
12932 bfd_arm_get_mach_from_attributes (bfd * abfd)
12933 {
12934 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12935
12936 switch (arch)
12937 {
12938 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12939 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12940 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12941
12942 case TAG_CPU_ARCH_V5TE:
12943 {
12944 char * name;
12945
12946 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12947 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12948
12949 if (name)
12950 {
12951 if (strcmp (name, "IWMMXT2") == 0)
12952 return bfd_mach_arm_iWMMXt2;
12953
12954 if (strcmp (name, "IWMMXT") == 0)
12955 return bfd_mach_arm_iWMMXt;
12956
12957 if (strcmp (name, "XSCALE") == 0)
12958 {
12959 int wmmx;
12960
12961 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12962 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12963 switch (wmmx)
12964 {
12965 case 1: return bfd_mach_arm_iWMMXt;
12966 case 2: return bfd_mach_arm_iWMMXt2;
12967 default: return bfd_mach_arm_XScale;
12968 }
12969 }
12970 }
12971
12972 return bfd_mach_arm_5TE;
12973 }
12974
12975 default:
12976 return bfd_mach_arm_unknown;
12977 }
12978 }
12979
12980 /* Set the right machine number. */
12981
12982 static bfd_boolean
12983 elf32_arm_object_p (bfd *abfd)
12984 {
12985 unsigned int mach;
12986
12987 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12988
12989 if (mach == bfd_mach_arm_unknown)
12990 {
12991 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
12992 mach = bfd_mach_arm_ep9312;
12993 else
12994 mach = bfd_arm_get_mach_from_attributes (abfd);
12995 }
12996
12997 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
12998 return TRUE;
12999 }
13000
13001 /* Function to keep ARM specific flags in the ELF header. */
13002
13003 static bfd_boolean
13004 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13005 {
13006 if (elf_flags_init (abfd)
13007 && elf_elfheader (abfd)->e_flags != flags)
13008 {
13009 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13010 {
13011 if (flags & EF_ARM_INTERWORK)
13012 (*_bfd_error_handler)
13013 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
13014 abfd);
13015 else
13016 _bfd_error_handler
13017 (_("Warning: Clearing the interworking flag of %B due to outside request"),
13018 abfd);
13019 }
13020 }
13021 else
13022 {
13023 elf_elfheader (abfd)->e_flags = flags;
13024 elf_flags_init (abfd) = TRUE;
13025 }
13026
13027 return TRUE;
13028 }
13029
13030 /* Copy backend specific data from one object module to another. */
13031
13032 static bfd_boolean
13033 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13034 {
13035 flagword in_flags;
13036 flagword out_flags;
13037
13038 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13039 return TRUE;
13040
13041 in_flags = elf_elfheader (ibfd)->e_flags;
13042 out_flags = elf_elfheader (obfd)->e_flags;
13043
13044 if (elf_flags_init (obfd)
13045 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13046 && in_flags != out_flags)
13047 {
13048 /* Cannot mix APCS26 and APCS32 code. */
13049 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13050 return FALSE;
13051
13052 /* Cannot mix float APCS and non-float APCS code. */
13053 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13054 return FALSE;
13055
13056 /* If the src and dest have different interworking flags
13057 then turn off the interworking bit. */
13058 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13059 {
13060 if (out_flags & EF_ARM_INTERWORK)
13061 _bfd_error_handler
13062 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13063 obfd, ibfd);
13064
13065 in_flags &= ~EF_ARM_INTERWORK;
13066 }
13067
13068 /* Likewise for PIC, though don't warn for this case. */
13069 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13070 in_flags &= ~EF_ARM_PIC;
13071 }
13072
13073 elf_elfheader (obfd)->e_flags = in_flags;
13074 elf_flags_init (obfd) = TRUE;
13075
13076 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13077 }
13078
13079 /* Values for Tag_ABI_PCS_R9_use. */
13080 enum
13081 {
13082 AEABI_R9_V6,
13083 AEABI_R9_SB,
13084 AEABI_R9_TLS,
13085 AEABI_R9_unused
13086 };
13087
13088 /* Values for Tag_ABI_PCS_RW_data. */
13089 enum
13090 {
13091 AEABI_PCS_RW_data_absolute,
13092 AEABI_PCS_RW_data_PCrel,
13093 AEABI_PCS_RW_data_SBrel,
13094 AEABI_PCS_RW_data_unused
13095 };
13096
13097 /* Values for Tag_ABI_enum_size. */
13098 enum
13099 {
13100 AEABI_enum_unused,
13101 AEABI_enum_short,
13102 AEABI_enum_wide,
13103 AEABI_enum_forced_wide
13104 };
13105
13106 /* Determine whether an object attribute tag takes an integer, a
13107 string or both. */
13108
13109 static int
13110 elf32_arm_obj_attrs_arg_type (int tag)
13111 {
13112 if (tag == Tag_compatibility)
13113 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13114 else if (tag == Tag_nodefaults)
13115 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13116 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13117 return ATTR_TYPE_FLAG_STR_VAL;
13118 else if (tag < 32)
13119 return ATTR_TYPE_FLAG_INT_VAL;
13120 else
13121 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13122 }
13123
13124 /* The ABI defines that Tag_conformance should be emitted first, and that
13125 Tag_nodefaults should be second (if either is defined). This sets those
13126 two positions, and bumps up the position of all the remaining tags to
13127 compensate. */
13128 static int
13129 elf32_arm_obj_attrs_order (int num)
13130 {
13131 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13132 return Tag_conformance;
13133 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13134 return Tag_nodefaults;
13135 if ((num - 2) < Tag_nodefaults)
13136 return num - 2;
13137 if ((num - 1) < Tag_conformance)
13138 return num - 1;
13139 return num;
13140 }
13141
13142 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13143 static bfd_boolean
13144 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13145 {
13146 if ((tag & 127) < 64)
13147 {
13148 _bfd_error_handler
13149 (_("%B: Unknown mandatory EABI object attribute %d"),
13150 abfd, tag);
13151 bfd_set_error (bfd_error_bad_value);
13152 return FALSE;
13153 }
13154 else
13155 {
13156 _bfd_error_handler
13157 (_("Warning: %B: Unknown EABI object attribute %d"),
13158 abfd, tag);
13159 return TRUE;
13160 }
13161 }
13162
13163 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13164 Returns -1 if no architecture could be read. */
13165
13166 static int
13167 get_secondary_compatible_arch (bfd *abfd)
13168 {
13169 obj_attribute *attr =
13170 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13171
13172 /* Note: the tag and its argument below are uleb128 values, though
13173 currently-defined values fit in one byte for each. */
13174 if (attr->s
13175 && attr->s[0] == Tag_CPU_arch
13176 && (attr->s[1] & 128) != 128
13177 && attr->s[2] == 0)
13178 return attr->s[1];
13179
13180 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13181 return -1;
13182 }
13183
13184 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13185 The tag is removed if ARCH is -1. */
13186
13187 static void
13188 set_secondary_compatible_arch (bfd *abfd, int arch)
13189 {
13190 obj_attribute *attr =
13191 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13192
13193 if (arch == -1)
13194 {
13195 attr->s = NULL;
13196 return;
13197 }
13198
13199 /* Note: the tag and its argument below are uleb128 values, though
13200 currently-defined values fit in one byte for each. */
13201 if (!attr->s)
13202 attr->s = (char *) bfd_alloc (abfd, 3);
13203 attr->s[0] = Tag_CPU_arch;
13204 attr->s[1] = arch;
13205 attr->s[2] = '\0';
13206 }
13207
13208 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13209 into account. */
13210
13211 static int
13212 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13213 int newtag, int secondary_compat)
13214 {
13215 #define T(X) TAG_CPU_ARCH_##X
13216 int tagl, tagh, result;
13217 const int v6t2[] =
13218 {
13219 T(V6T2), /* PRE_V4. */
13220 T(V6T2), /* V4. */
13221 T(V6T2), /* V4T. */
13222 T(V6T2), /* V5T. */
13223 T(V6T2), /* V5TE. */
13224 T(V6T2), /* V5TEJ. */
13225 T(V6T2), /* V6. */
13226 T(V7), /* V6KZ. */
13227 T(V6T2) /* V6T2. */
13228 };
13229 const int v6k[] =
13230 {
13231 T(V6K), /* PRE_V4. */
13232 T(V6K), /* V4. */
13233 T(V6K), /* V4T. */
13234 T(V6K), /* V5T. */
13235 T(V6K), /* V5TE. */
13236 T(V6K), /* V5TEJ. */
13237 T(V6K), /* V6. */
13238 T(V6KZ), /* V6KZ. */
13239 T(V7), /* V6T2. */
13240 T(V6K) /* V6K. */
13241 };
13242 const int v7[] =
13243 {
13244 T(V7), /* PRE_V4. */
13245 T(V7), /* V4. */
13246 T(V7), /* V4T. */
13247 T(V7), /* V5T. */
13248 T(V7), /* V5TE. */
13249 T(V7), /* V5TEJ. */
13250 T(V7), /* V6. */
13251 T(V7), /* V6KZ. */
13252 T(V7), /* V6T2. */
13253 T(V7), /* V6K. */
13254 T(V7) /* V7. */
13255 };
13256 const int v6_m[] =
13257 {
13258 -1, /* PRE_V4. */
13259 -1, /* V4. */
13260 T(V6K), /* V4T. */
13261 T(V6K), /* V5T. */
13262 T(V6K), /* V5TE. */
13263 T(V6K), /* V5TEJ. */
13264 T(V6K), /* V6. */
13265 T(V6KZ), /* V6KZ. */
13266 T(V7), /* V6T2. */
13267 T(V6K), /* V6K. */
13268 T(V7), /* V7. */
13269 T(V6_M) /* V6_M. */
13270 };
13271 const int v6s_m[] =
13272 {
13273 -1, /* PRE_V4. */
13274 -1, /* V4. */
13275 T(V6K), /* V4T. */
13276 T(V6K), /* V5T. */
13277 T(V6K), /* V5TE. */
13278 T(V6K), /* V5TEJ. */
13279 T(V6K), /* V6. */
13280 T(V6KZ), /* V6KZ. */
13281 T(V7), /* V6T2. */
13282 T(V6K), /* V6K. */
13283 T(V7), /* V7. */
13284 T(V6S_M), /* V6_M. */
13285 T(V6S_M) /* V6S_M. */
13286 };
13287 const int v7e_m[] =
13288 {
13289 -1, /* PRE_V4. */
13290 -1, /* V4. */
13291 T(V7E_M), /* V4T. */
13292 T(V7E_M), /* V5T. */
13293 T(V7E_M), /* V5TE. */
13294 T(V7E_M), /* V5TEJ. */
13295 T(V7E_M), /* V6. */
13296 T(V7E_M), /* V6KZ. */
13297 T(V7E_M), /* V6T2. */
13298 T(V7E_M), /* V6K. */
13299 T(V7E_M), /* V7. */
13300 T(V7E_M), /* V6_M. */
13301 T(V7E_M), /* V6S_M. */
13302 T(V7E_M) /* V7E_M. */
13303 };
13304 const int v8[] =
13305 {
13306 T(V8), /* PRE_V4. */
13307 T(V8), /* V4. */
13308 T(V8), /* V4T. */
13309 T(V8), /* V5T. */
13310 T(V8), /* V5TE. */
13311 T(V8), /* V5TEJ. */
13312 T(V8), /* V6. */
13313 T(V8), /* V6KZ. */
13314 T(V8), /* V6T2. */
13315 T(V8), /* V6K. */
13316 T(V8), /* V7. */
13317 T(V8), /* V6_M. */
13318 T(V8), /* V6S_M. */
13319 T(V8), /* V7E_M. */
13320 T(V8) /* V8. */
13321 };
13322 const int v8m_baseline[] =
13323 {
13324 -1, /* PRE_V4. */
13325 -1, /* V4. */
13326 -1, /* V4T. */
13327 -1, /* V5T. */
13328 -1, /* V5TE. */
13329 -1, /* V5TEJ. */
13330 -1, /* V6. */
13331 -1, /* V6KZ. */
13332 -1, /* V6T2. */
13333 -1, /* V6K. */
13334 -1, /* V7. */
13335 T(V8M_BASE), /* V6_M. */
13336 T(V8M_BASE), /* V6S_M. */
13337 -1, /* V7E_M. */
13338 -1, /* V8. */
13339 -1,
13340 T(V8M_BASE) /* V8-M BASELINE. */
13341 };
13342 const int v8m_mainline[] =
13343 {
13344 -1, /* PRE_V4. */
13345 -1, /* V4. */
13346 -1, /* V4T. */
13347 -1, /* V5T. */
13348 -1, /* V5TE. */
13349 -1, /* V5TEJ. */
13350 -1, /* V6. */
13351 -1, /* V6KZ. */
13352 -1, /* V6T2. */
13353 -1, /* V6K. */
13354 T(V8M_MAIN), /* V7. */
13355 T(V8M_MAIN), /* V6_M. */
13356 T(V8M_MAIN), /* V6S_M. */
13357 T(V8M_MAIN), /* V7E_M. */
13358 -1, /* V8. */
13359 -1,
13360 T(V8M_MAIN), /* V8-M BASELINE. */
13361 T(V8M_MAIN) /* V8-M MAINLINE. */
13362 };
13363 const int v4t_plus_v6_m[] =
13364 {
13365 -1, /* PRE_V4. */
13366 -1, /* V4. */
13367 T(V4T), /* V4T. */
13368 T(V5T), /* V5T. */
13369 T(V5TE), /* V5TE. */
13370 T(V5TEJ), /* V5TEJ. */
13371 T(V6), /* V6. */
13372 T(V6KZ), /* V6KZ. */
13373 T(V6T2), /* V6T2. */
13374 T(V6K), /* V6K. */
13375 T(V7), /* V7. */
13376 T(V6_M), /* V6_M. */
13377 T(V6S_M), /* V6S_M. */
13378 T(V7E_M), /* V7E_M. */
13379 T(V8), /* V8. */
13380 -1, /* Unused. */
13381 T(V8M_BASE), /* V8-M BASELINE. */
13382 T(V8M_MAIN), /* V8-M MAINLINE. */
13383 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13384 };
13385 const int *comb[] =
13386 {
13387 v6t2,
13388 v6k,
13389 v7,
13390 v6_m,
13391 v6s_m,
13392 v7e_m,
13393 v8,
13394 NULL,
13395 v8m_baseline,
13396 v8m_mainline,
13397 /* Pseudo-architecture. */
13398 v4t_plus_v6_m
13399 };
13400
13401 /* Check we've not got a higher architecture than we know about. */
13402
13403 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13404 {
13405 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13406 return -1;
13407 }
13408
13409 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13410
13411 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13412 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13413 oldtag = T(V4T_PLUS_V6_M);
13414
13415 /* And override the new tag if we have a Tag_also_compatible_with on the
13416 input. */
13417
13418 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13419 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13420 newtag = T(V4T_PLUS_V6_M);
13421
13422 tagl = (oldtag < newtag) ? oldtag : newtag;
13423 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13424
13425 /* Architectures before V6KZ add features monotonically. */
13426 if (tagh <= TAG_CPU_ARCH_V6KZ)
13427 return result;
13428
13429 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13430
13431 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13432 as the canonical version. */
13433 if (result == T(V4T_PLUS_V6_M))
13434 {
13435 result = T(V4T);
13436 *secondary_compat_out = T(V6_M);
13437 }
13438 else
13439 *secondary_compat_out = -1;
13440
13441 if (result == -1)
13442 {
13443 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13444 ibfd, oldtag, newtag);
13445 return -1;
13446 }
13447
13448 return result;
13449 #undef T
13450 }
13451
13452 /* Query attributes object to see if integer divide instructions may be
13453 present in an object. */
13454 static bfd_boolean
13455 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13456 {
13457 int arch = attr[Tag_CPU_arch].i;
13458 int profile = attr[Tag_CPU_arch_profile].i;
13459
13460 switch (attr[Tag_DIV_use].i)
13461 {
13462 case 0:
13463 /* Integer divide allowed if instruction contained in archetecture. */
13464 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13465 return TRUE;
13466 else if (arch >= TAG_CPU_ARCH_V7E_M)
13467 return TRUE;
13468 else
13469 return FALSE;
13470
13471 case 1:
13472 /* Integer divide explicitly prohibited. */
13473 return FALSE;
13474
13475 default:
13476 /* Unrecognised case - treat as allowing divide everywhere. */
13477 case 2:
13478 /* Integer divide allowed in ARM state. */
13479 return TRUE;
13480 }
13481 }
13482
13483 /* Query attributes object to see if integer divide instructions are
13484 forbidden to be in the object. This is not the inverse of
13485 elf32_arm_attributes_accept_div. */
13486 static bfd_boolean
13487 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13488 {
13489 return attr[Tag_DIV_use].i == 1;
13490 }
13491
13492 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13493 are conflicting attributes. */
13494
13495 static bfd_boolean
13496 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
13497 {
13498 obj_attribute *in_attr;
13499 obj_attribute *out_attr;
13500 /* Some tags have 0 = don't care, 1 = strong requirement,
13501 2 = weak requirement. */
13502 static const int order_021[3] = {0, 2, 1};
13503 int i;
13504 bfd_boolean result = TRUE;
13505 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13506
13507 /* Skip the linker stubs file. This preserves previous behavior
13508 of accepting unknown attributes in the first input file - but
13509 is that a bug? */
13510 if (ibfd->flags & BFD_LINKER_CREATED)
13511 return TRUE;
13512
13513 /* Skip any input that hasn't attribute section.
13514 This enables to link object files without attribute section with
13515 any others. */
13516 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13517 return TRUE;
13518
13519 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13520 {
13521 /* This is the first object. Copy the attributes. */
13522 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13523
13524 out_attr = elf_known_obj_attributes_proc (obfd);
13525
13526 /* Use the Tag_null value to indicate the attributes have been
13527 initialized. */
13528 out_attr[0].i = 1;
13529
13530 /* We do not output objects with Tag_MPextension_use_legacy - we move
13531 the attribute's value to Tag_MPextension_use. */
13532 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13533 {
13534 if (out_attr[Tag_MPextension_use].i != 0
13535 && out_attr[Tag_MPextension_use_legacy].i
13536 != out_attr[Tag_MPextension_use].i)
13537 {
13538 _bfd_error_handler
13539 (_("Error: %B has both the current and legacy "
13540 "Tag_MPextension_use attributes"), ibfd);
13541 result = FALSE;
13542 }
13543
13544 out_attr[Tag_MPextension_use] =
13545 out_attr[Tag_MPextension_use_legacy];
13546 out_attr[Tag_MPextension_use_legacy].type = 0;
13547 out_attr[Tag_MPextension_use_legacy].i = 0;
13548 }
13549
13550 return result;
13551 }
13552
13553 in_attr = elf_known_obj_attributes_proc (ibfd);
13554 out_attr = elf_known_obj_attributes_proc (obfd);
13555 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13556 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13557 {
13558 /* Ignore mismatches if the object doesn't use floating point or is
13559 floating point ABI independent. */
13560 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13561 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13562 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13563 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13564 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13565 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13566 {
13567 _bfd_error_handler
13568 (_("error: %B uses VFP register arguments, %B does not"),
13569 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13570 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13571 result = FALSE;
13572 }
13573 }
13574
13575 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13576 {
13577 /* Merge this attribute with existing attributes. */
13578 switch (i)
13579 {
13580 case Tag_CPU_raw_name:
13581 case Tag_CPU_name:
13582 /* These are merged after Tag_CPU_arch. */
13583 break;
13584
13585 case Tag_ABI_optimization_goals:
13586 case Tag_ABI_FP_optimization_goals:
13587 /* Use the first value seen. */
13588 break;
13589
13590 case Tag_CPU_arch:
13591 {
13592 int secondary_compat = -1, secondary_compat_out = -1;
13593 unsigned int saved_out_attr = out_attr[i].i;
13594 int arch_attr;
13595 static const char *name_table[] =
13596 {
13597 /* These aren't real CPU names, but we can't guess
13598 that from the architecture version alone. */
13599 "Pre v4",
13600 "ARM v4",
13601 "ARM v4T",
13602 "ARM v5T",
13603 "ARM v5TE",
13604 "ARM v5TEJ",
13605 "ARM v6",
13606 "ARM v6KZ",
13607 "ARM v6T2",
13608 "ARM v6K",
13609 "ARM v7",
13610 "ARM v6-M",
13611 "ARM v6S-M",
13612 "ARM v8",
13613 "",
13614 "ARM v8-M.baseline",
13615 "ARM v8-M.mainline",
13616 };
13617
13618 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13619 secondary_compat = get_secondary_compatible_arch (ibfd);
13620 secondary_compat_out = get_secondary_compatible_arch (obfd);
13621 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13622 &secondary_compat_out,
13623 in_attr[i].i,
13624 secondary_compat);
13625
13626 /* Return with error if failed to merge. */
13627 if (arch_attr == -1)
13628 return FALSE;
13629
13630 out_attr[i].i = arch_attr;
13631
13632 set_secondary_compatible_arch (obfd, secondary_compat_out);
13633
13634 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13635 if (out_attr[i].i == saved_out_attr)
13636 ; /* Leave the names alone. */
13637 else if (out_attr[i].i == in_attr[i].i)
13638 {
13639 /* The output architecture has been changed to match the
13640 input architecture. Use the input names. */
13641 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13642 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13643 : NULL;
13644 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13645 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13646 : NULL;
13647 }
13648 else
13649 {
13650 out_attr[Tag_CPU_name].s = NULL;
13651 out_attr[Tag_CPU_raw_name].s = NULL;
13652 }
13653
13654 /* If we still don't have a value for Tag_CPU_name,
13655 make one up now. Tag_CPU_raw_name remains blank. */
13656 if (out_attr[Tag_CPU_name].s == NULL
13657 && out_attr[i].i < ARRAY_SIZE (name_table))
13658 out_attr[Tag_CPU_name].s =
13659 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13660 }
13661 break;
13662
13663 case Tag_ARM_ISA_use:
13664 case Tag_THUMB_ISA_use:
13665 case Tag_WMMX_arch:
13666 case Tag_Advanced_SIMD_arch:
13667 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13668 case Tag_ABI_FP_rounding:
13669 case Tag_ABI_FP_exceptions:
13670 case Tag_ABI_FP_user_exceptions:
13671 case Tag_ABI_FP_number_model:
13672 case Tag_FP_HP_extension:
13673 case Tag_CPU_unaligned_access:
13674 case Tag_T2EE_use:
13675 case Tag_MPextension_use:
13676 /* Use the largest value specified. */
13677 if (in_attr[i].i > out_attr[i].i)
13678 out_attr[i].i = in_attr[i].i;
13679 break;
13680
13681 case Tag_ABI_align_preserved:
13682 case Tag_ABI_PCS_RO_data:
13683 /* Use the smallest value specified. */
13684 if (in_attr[i].i < out_attr[i].i)
13685 out_attr[i].i = in_attr[i].i;
13686 break;
13687
13688 case Tag_ABI_align_needed:
13689 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13690 && (in_attr[Tag_ABI_align_preserved].i == 0
13691 || out_attr[Tag_ABI_align_preserved].i == 0))
13692 {
13693 /* This error message should be enabled once all non-conformant
13694 binaries in the toolchain have had the attributes set
13695 properly.
13696 _bfd_error_handler
13697 (_("error: %B: 8-byte data alignment conflicts with %B"),
13698 obfd, ibfd);
13699 result = FALSE; */
13700 }
13701 /* Fall through. */
13702 case Tag_ABI_FP_denormal:
13703 case Tag_ABI_PCS_GOT_use:
13704 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13705 value if greater than 2 (for future-proofing). */
13706 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13707 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13708 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13709 out_attr[i].i = in_attr[i].i;
13710 break;
13711
13712 case Tag_Virtualization_use:
13713 /* The virtualization tag effectively stores two bits of
13714 information: the intended use of TrustZone (in bit 0), and the
13715 intended use of Virtualization (in bit 1). */
13716 if (out_attr[i].i == 0)
13717 out_attr[i].i = in_attr[i].i;
13718 else if (in_attr[i].i != 0
13719 && in_attr[i].i != out_attr[i].i)
13720 {
13721 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13722 out_attr[i].i = 3;
13723 else
13724 {
13725 _bfd_error_handler
13726 (_("error: %B: unable to merge virtualization attributes "
13727 "with %B"),
13728 obfd, ibfd);
13729 result = FALSE;
13730 }
13731 }
13732 break;
13733
13734 case Tag_CPU_arch_profile:
13735 if (out_attr[i].i != in_attr[i].i)
13736 {
13737 /* 0 will merge with anything.
13738 'A' and 'S' merge to 'A'.
13739 'R' and 'S' merge to 'R'.
13740 'M' and 'A|R|S' is an error. */
13741 if (out_attr[i].i == 0
13742 || (out_attr[i].i == 'S'
13743 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13744 out_attr[i].i = in_attr[i].i;
13745 else if (in_attr[i].i == 0
13746 || (in_attr[i].i == 'S'
13747 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13748 ; /* Do nothing. */
13749 else
13750 {
13751 _bfd_error_handler
13752 (_("error: %B: Conflicting architecture profiles %c/%c"),
13753 ibfd,
13754 in_attr[i].i ? in_attr[i].i : '0',
13755 out_attr[i].i ? out_attr[i].i : '0');
13756 result = FALSE;
13757 }
13758 }
13759 break;
13760
13761 case Tag_DSP_extension:
13762 /* No need to change output value if any of:
13763 - pre (<=) ARMv5T input architecture (do not have DSP)
13764 - M input profile not ARMv7E-M and do not have DSP. */
13765 if (in_attr[Tag_CPU_arch].i <= 3
13766 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13767 && in_attr[Tag_CPU_arch].i != 13
13768 && in_attr[i].i == 0))
13769 ; /* Do nothing. */
13770 /* Output value should be 0 if DSP part of architecture, ie.
13771 - post (>=) ARMv5te architecture output
13772 - A, R or S profile output or ARMv7E-M output architecture. */
13773 else if (out_attr[Tag_CPU_arch].i >= 4
13774 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13775 || out_attr[Tag_CPU_arch_profile].i == 'R'
13776 || out_attr[Tag_CPU_arch_profile].i == 'S'
13777 || out_attr[Tag_CPU_arch].i == 13))
13778 out_attr[i].i = 0;
13779 /* Otherwise, DSP instructions are added and not part of output
13780 architecture. */
13781 else
13782 out_attr[i].i = 1;
13783 break;
13784
13785 case Tag_FP_arch:
13786 {
13787 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13788 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13789 when it's 0. It might mean absence of FP hardware if
13790 Tag_FP_arch is zero. */
13791
13792 #define VFP_VERSION_COUNT 9
13793 static const struct
13794 {
13795 int ver;
13796 int regs;
13797 } vfp_versions[VFP_VERSION_COUNT] =
13798 {
13799 {0, 0},
13800 {1, 16},
13801 {2, 16},
13802 {3, 32},
13803 {3, 16},
13804 {4, 32},
13805 {4, 16},
13806 {8, 32},
13807 {8, 16}
13808 };
13809 int ver;
13810 int regs;
13811 int newval;
13812
13813 /* If the output has no requirement about FP hardware,
13814 follow the requirement of the input. */
13815 if (out_attr[i].i == 0)
13816 {
13817 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13818 out_attr[i].i = in_attr[i].i;
13819 out_attr[Tag_ABI_HardFP_use].i
13820 = in_attr[Tag_ABI_HardFP_use].i;
13821 break;
13822 }
13823 /* If the input has no requirement about FP hardware, do
13824 nothing. */
13825 else if (in_attr[i].i == 0)
13826 {
13827 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
13828 break;
13829 }
13830
13831 /* Both the input and the output have nonzero Tag_FP_arch.
13832 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13833
13834 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13835 do nothing. */
13836 if (in_attr[Tag_ABI_HardFP_use].i == 0
13837 && out_attr[Tag_ABI_HardFP_use].i == 0)
13838 ;
13839 /* If the input and the output have different Tag_ABI_HardFP_use,
13840 the combination of them is 0 (implied by Tag_FP_arch). */
13841 else if (in_attr[Tag_ABI_HardFP_use].i
13842 != out_attr[Tag_ABI_HardFP_use].i)
13843 out_attr[Tag_ABI_HardFP_use].i = 0;
13844
13845 /* Now we can handle Tag_FP_arch. */
13846
13847 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13848 pick the biggest. */
13849 if (in_attr[i].i >= VFP_VERSION_COUNT
13850 && in_attr[i].i > out_attr[i].i)
13851 {
13852 out_attr[i] = in_attr[i];
13853 break;
13854 }
13855 /* The output uses the superset of input features
13856 (ISA version) and registers. */
13857 ver = vfp_versions[in_attr[i].i].ver;
13858 if (ver < vfp_versions[out_attr[i].i].ver)
13859 ver = vfp_versions[out_attr[i].i].ver;
13860 regs = vfp_versions[in_attr[i].i].regs;
13861 if (regs < vfp_versions[out_attr[i].i].regs)
13862 regs = vfp_versions[out_attr[i].i].regs;
13863 /* This assumes all possible supersets are also a valid
13864 options. */
13865 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13866 {
13867 if (regs == vfp_versions[newval].regs
13868 && ver == vfp_versions[newval].ver)
13869 break;
13870 }
13871 out_attr[i].i = newval;
13872 }
13873 break;
13874 case Tag_PCS_config:
13875 if (out_attr[i].i == 0)
13876 out_attr[i].i = in_attr[i].i;
13877 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13878 {
13879 /* It's sometimes ok to mix different configs, so this is only
13880 a warning. */
13881 _bfd_error_handler
13882 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13883 }
13884 break;
13885 case Tag_ABI_PCS_R9_use:
13886 if (in_attr[i].i != out_attr[i].i
13887 && out_attr[i].i != AEABI_R9_unused
13888 && in_attr[i].i != AEABI_R9_unused)
13889 {
13890 _bfd_error_handler
13891 (_("error: %B: Conflicting use of R9"), ibfd);
13892 result = FALSE;
13893 }
13894 if (out_attr[i].i == AEABI_R9_unused)
13895 out_attr[i].i = in_attr[i].i;
13896 break;
13897 case Tag_ABI_PCS_RW_data:
13898 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13899 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13900 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13901 {
13902 _bfd_error_handler
13903 (_("error: %B: SB relative addressing conflicts with use of R9"),
13904 ibfd);
13905 result = FALSE;
13906 }
13907 /* Use the smallest value specified. */
13908 if (in_attr[i].i < out_attr[i].i)
13909 out_attr[i].i = in_attr[i].i;
13910 break;
13911 case Tag_ABI_PCS_wchar_t:
13912 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13913 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13914 {
13915 _bfd_error_handler
13916 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13917 ibfd, in_attr[i].i, out_attr[i].i);
13918 }
13919 else if (in_attr[i].i && !out_attr[i].i)
13920 out_attr[i].i = in_attr[i].i;
13921 break;
13922 case Tag_ABI_enum_size:
13923 if (in_attr[i].i != AEABI_enum_unused)
13924 {
13925 if (out_attr[i].i == AEABI_enum_unused
13926 || out_attr[i].i == AEABI_enum_forced_wide)
13927 {
13928 /* The existing object is compatible with anything.
13929 Use whatever requirements the new object has. */
13930 out_attr[i].i = in_attr[i].i;
13931 }
13932 else if (in_attr[i].i != AEABI_enum_forced_wide
13933 && out_attr[i].i != in_attr[i].i
13934 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13935 {
13936 static const char *aeabi_enum_names[] =
13937 { "", "variable-size", "32-bit", "" };
13938 const char *in_name =
13939 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13940 ? aeabi_enum_names[in_attr[i].i]
13941 : "<unknown>";
13942 const char *out_name =
13943 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13944 ? aeabi_enum_names[out_attr[i].i]
13945 : "<unknown>";
13946 _bfd_error_handler
13947 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13948 ibfd, in_name, out_name);
13949 }
13950 }
13951 break;
13952 case Tag_ABI_VFP_args:
13953 /* Aready done. */
13954 break;
13955 case Tag_ABI_WMMX_args:
13956 if (in_attr[i].i != out_attr[i].i)
13957 {
13958 _bfd_error_handler
13959 (_("error: %B uses iWMMXt register arguments, %B does not"),
13960 ibfd, obfd);
13961 result = FALSE;
13962 }
13963 break;
13964 case Tag_compatibility:
13965 /* Merged in target-independent code. */
13966 break;
13967 case Tag_ABI_HardFP_use:
13968 /* This is handled along with Tag_FP_arch. */
13969 break;
13970 case Tag_ABI_FP_16bit_format:
13971 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13972 {
13973 if (in_attr[i].i != out_attr[i].i)
13974 {
13975 _bfd_error_handler
13976 (_("error: fp16 format mismatch between %B and %B"),
13977 ibfd, obfd);
13978 result = FALSE;
13979 }
13980 }
13981 if (in_attr[i].i != 0)
13982 out_attr[i].i = in_attr[i].i;
13983 break;
13984
13985 case Tag_DIV_use:
13986 /* A value of zero on input means that the divide instruction may
13987 be used if available in the base architecture as specified via
13988 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
13989 the user did not want divide instructions. A value of 2
13990 explicitly means that divide instructions were allowed in ARM
13991 and Thumb state. */
13992 if (in_attr[i].i == out_attr[i].i)
13993 /* Do nothing. */ ;
13994 else if (elf32_arm_attributes_forbid_div (in_attr)
13995 && !elf32_arm_attributes_accept_div (out_attr))
13996 out_attr[i].i = 1;
13997 else if (elf32_arm_attributes_forbid_div (out_attr)
13998 && elf32_arm_attributes_accept_div (in_attr))
13999 out_attr[i].i = in_attr[i].i;
14000 else if (in_attr[i].i == 2)
14001 out_attr[i].i = in_attr[i].i;
14002 break;
14003
14004 case Tag_MPextension_use_legacy:
14005 /* We don't output objects with Tag_MPextension_use_legacy - we
14006 move the value to Tag_MPextension_use. */
14007 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14008 {
14009 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14010 {
14011 _bfd_error_handler
14012 (_("%B has has both the current and legacy "
14013 "Tag_MPextension_use attributes"),
14014 ibfd);
14015 result = FALSE;
14016 }
14017 }
14018
14019 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14020 out_attr[Tag_MPextension_use] = in_attr[i];
14021
14022 break;
14023
14024 case Tag_nodefaults:
14025 /* This tag is set if it exists, but the value is unused (and is
14026 typically zero). We don't actually need to do anything here -
14027 the merge happens automatically when the type flags are merged
14028 below. */
14029 break;
14030 case Tag_also_compatible_with:
14031 /* Already done in Tag_CPU_arch. */
14032 break;
14033 case Tag_conformance:
14034 /* Keep the attribute if it matches. Throw it away otherwise.
14035 No attribute means no claim to conform. */
14036 if (!in_attr[i].s || !out_attr[i].s
14037 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14038 out_attr[i].s = NULL;
14039 break;
14040
14041 default:
14042 result
14043 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14044 }
14045
14046 /* If out_attr was copied from in_attr then it won't have a type yet. */
14047 if (in_attr[i].type && !out_attr[i].type)
14048 out_attr[i].type = in_attr[i].type;
14049 }
14050
14051 /* Merge Tag_compatibility attributes and any common GNU ones. */
14052 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
14053 return FALSE;
14054
14055 /* Check for any attributes not known on ARM. */
14056 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14057
14058 return result;
14059 }
14060
14061
14062 /* Return TRUE if the two EABI versions are incompatible. */
14063
14064 static bfd_boolean
14065 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14066 {
14067 /* v4 and v5 are the same spec before and after it was released,
14068 so allow mixing them. */
14069 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14070 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14071 return TRUE;
14072
14073 return (iver == over);
14074 }
14075
14076 /* Merge backend specific data from an object file to the output
14077 object file when linking. */
14078
14079 static bfd_boolean
14080 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
14081
14082 /* Display the flags field. */
14083
14084 static bfd_boolean
14085 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14086 {
14087 FILE * file = (FILE *) ptr;
14088 unsigned long flags;
14089
14090 BFD_ASSERT (abfd != NULL && ptr != NULL);
14091
14092 /* Print normal ELF private data. */
14093 _bfd_elf_print_private_bfd_data (abfd, ptr);
14094
14095 flags = elf_elfheader (abfd)->e_flags;
14096 /* Ignore init flag - it may not be set, despite the flags field
14097 containing valid data. */
14098
14099 /* xgettext:c-format */
14100 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14101
14102 switch (EF_ARM_EABI_VERSION (flags))
14103 {
14104 case EF_ARM_EABI_UNKNOWN:
14105 /* The following flag bits are GNU extensions and not part of the
14106 official ARM ELF extended ABI. Hence they are only decoded if
14107 the EABI version is not set. */
14108 if (flags & EF_ARM_INTERWORK)
14109 fprintf (file, _(" [interworking enabled]"));
14110
14111 if (flags & EF_ARM_APCS_26)
14112 fprintf (file, " [APCS-26]");
14113 else
14114 fprintf (file, " [APCS-32]");
14115
14116 if (flags & EF_ARM_VFP_FLOAT)
14117 fprintf (file, _(" [VFP float format]"));
14118 else if (flags & EF_ARM_MAVERICK_FLOAT)
14119 fprintf (file, _(" [Maverick float format]"));
14120 else
14121 fprintf (file, _(" [FPA float format]"));
14122
14123 if (flags & EF_ARM_APCS_FLOAT)
14124 fprintf (file, _(" [floats passed in float registers]"));
14125
14126 if (flags & EF_ARM_PIC)
14127 fprintf (file, _(" [position independent]"));
14128
14129 if (flags & EF_ARM_NEW_ABI)
14130 fprintf (file, _(" [new ABI]"));
14131
14132 if (flags & EF_ARM_OLD_ABI)
14133 fprintf (file, _(" [old ABI]"));
14134
14135 if (flags & EF_ARM_SOFT_FLOAT)
14136 fprintf (file, _(" [software FP]"));
14137
14138 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14139 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14140 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14141 | EF_ARM_MAVERICK_FLOAT);
14142 break;
14143
14144 case EF_ARM_EABI_VER1:
14145 fprintf (file, _(" [Version1 EABI]"));
14146
14147 if (flags & EF_ARM_SYMSARESORTED)
14148 fprintf (file, _(" [sorted symbol table]"));
14149 else
14150 fprintf (file, _(" [unsorted symbol table]"));
14151
14152 flags &= ~ EF_ARM_SYMSARESORTED;
14153 break;
14154
14155 case EF_ARM_EABI_VER2:
14156 fprintf (file, _(" [Version2 EABI]"));
14157
14158 if (flags & EF_ARM_SYMSARESORTED)
14159 fprintf (file, _(" [sorted symbol table]"));
14160 else
14161 fprintf (file, _(" [unsorted symbol table]"));
14162
14163 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14164 fprintf (file, _(" [dynamic symbols use segment index]"));
14165
14166 if (flags & EF_ARM_MAPSYMSFIRST)
14167 fprintf (file, _(" [mapping symbols precede others]"));
14168
14169 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14170 | EF_ARM_MAPSYMSFIRST);
14171 break;
14172
14173 case EF_ARM_EABI_VER3:
14174 fprintf (file, _(" [Version3 EABI]"));
14175 break;
14176
14177 case EF_ARM_EABI_VER4:
14178 fprintf (file, _(" [Version4 EABI]"));
14179 goto eabi;
14180
14181 case EF_ARM_EABI_VER5:
14182 fprintf (file, _(" [Version5 EABI]"));
14183
14184 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14185 fprintf (file, _(" [soft-float ABI]"));
14186
14187 if (flags & EF_ARM_ABI_FLOAT_HARD)
14188 fprintf (file, _(" [hard-float ABI]"));
14189
14190 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14191
14192 eabi:
14193 if (flags & EF_ARM_BE8)
14194 fprintf (file, _(" [BE8]"));
14195
14196 if (flags & EF_ARM_LE8)
14197 fprintf (file, _(" [LE8]"));
14198
14199 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14200 break;
14201
14202 default:
14203 fprintf (file, _(" <EABI version unrecognised>"));
14204 break;
14205 }
14206
14207 flags &= ~ EF_ARM_EABIMASK;
14208
14209 if (flags & EF_ARM_RELEXEC)
14210 fprintf (file, _(" [relocatable executable]"));
14211
14212 flags &= ~EF_ARM_RELEXEC;
14213
14214 if (flags)
14215 fprintf (file, _("<Unrecognised flag bits set>"));
14216
14217 fputc ('\n', file);
14218
14219 return TRUE;
14220 }
14221
14222 static int
14223 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14224 {
14225 switch (ELF_ST_TYPE (elf_sym->st_info))
14226 {
14227 case STT_ARM_TFUNC:
14228 return ELF_ST_TYPE (elf_sym->st_info);
14229
14230 case STT_ARM_16BIT:
14231 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14232 This allows us to distinguish between data used by Thumb instructions
14233 and non-data (which is probably code) inside Thumb regions of an
14234 executable. */
14235 if (type != STT_OBJECT && type != STT_TLS)
14236 return ELF_ST_TYPE (elf_sym->st_info);
14237 break;
14238
14239 default:
14240 break;
14241 }
14242
14243 return type;
14244 }
14245
14246 static asection *
14247 elf32_arm_gc_mark_hook (asection *sec,
14248 struct bfd_link_info *info,
14249 Elf_Internal_Rela *rel,
14250 struct elf_link_hash_entry *h,
14251 Elf_Internal_Sym *sym)
14252 {
14253 if (h != NULL)
14254 switch (ELF32_R_TYPE (rel->r_info))
14255 {
14256 case R_ARM_GNU_VTINHERIT:
14257 case R_ARM_GNU_VTENTRY:
14258 return NULL;
14259 }
14260
14261 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14262 }
14263
14264 /* Update the got entry reference counts for the section being removed. */
14265
14266 static bfd_boolean
14267 elf32_arm_gc_sweep_hook (bfd * abfd,
14268 struct bfd_link_info * info,
14269 asection * sec,
14270 const Elf_Internal_Rela * relocs)
14271 {
14272 Elf_Internal_Shdr *symtab_hdr;
14273 struct elf_link_hash_entry **sym_hashes;
14274 bfd_signed_vma *local_got_refcounts;
14275 const Elf_Internal_Rela *rel, *relend;
14276 struct elf32_arm_link_hash_table * globals;
14277
14278 if (bfd_link_relocatable (info))
14279 return TRUE;
14280
14281 globals = elf32_arm_hash_table (info);
14282 if (globals == NULL)
14283 return FALSE;
14284
14285 elf_section_data (sec)->local_dynrel = NULL;
14286
14287 symtab_hdr = & elf_symtab_hdr (abfd);
14288 sym_hashes = elf_sym_hashes (abfd);
14289 local_got_refcounts = elf_local_got_refcounts (abfd);
14290
14291 check_use_blx (globals);
14292
14293 relend = relocs + sec->reloc_count;
14294 for (rel = relocs; rel < relend; rel++)
14295 {
14296 unsigned long r_symndx;
14297 struct elf_link_hash_entry *h = NULL;
14298 struct elf32_arm_link_hash_entry *eh;
14299 int r_type;
14300 bfd_boolean call_reloc_p;
14301 bfd_boolean may_become_dynamic_p;
14302 bfd_boolean may_need_local_target_p;
14303 union gotplt_union *root_plt;
14304 struct arm_plt_info *arm_plt;
14305
14306 r_symndx = ELF32_R_SYM (rel->r_info);
14307 if (r_symndx >= symtab_hdr->sh_info)
14308 {
14309 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14310 while (h->root.type == bfd_link_hash_indirect
14311 || h->root.type == bfd_link_hash_warning)
14312 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14313 }
14314 eh = (struct elf32_arm_link_hash_entry *) h;
14315
14316 call_reloc_p = FALSE;
14317 may_become_dynamic_p = FALSE;
14318 may_need_local_target_p = FALSE;
14319
14320 r_type = ELF32_R_TYPE (rel->r_info);
14321 r_type = arm_real_reloc_type (globals, r_type);
14322 switch (r_type)
14323 {
14324 case R_ARM_GOT32:
14325 case R_ARM_GOT_PREL:
14326 case R_ARM_TLS_GD32:
14327 case R_ARM_TLS_IE32:
14328 if (h != NULL)
14329 {
14330 if (h->got.refcount > 0)
14331 h->got.refcount -= 1;
14332 }
14333 else if (local_got_refcounts != NULL)
14334 {
14335 if (local_got_refcounts[r_symndx] > 0)
14336 local_got_refcounts[r_symndx] -= 1;
14337 }
14338 break;
14339
14340 case R_ARM_TLS_LDM32:
14341 globals->tls_ldm_got.refcount -= 1;
14342 break;
14343
14344 case R_ARM_PC24:
14345 case R_ARM_PLT32:
14346 case R_ARM_CALL:
14347 case R_ARM_JUMP24:
14348 case R_ARM_PREL31:
14349 case R_ARM_THM_CALL:
14350 case R_ARM_THM_JUMP24:
14351 case R_ARM_THM_JUMP19:
14352 call_reloc_p = TRUE;
14353 may_need_local_target_p = TRUE;
14354 break;
14355
14356 case R_ARM_ABS12:
14357 if (!globals->vxworks_p)
14358 {
14359 may_need_local_target_p = TRUE;
14360 break;
14361 }
14362 /* Fall through. */
14363 case R_ARM_ABS32:
14364 case R_ARM_ABS32_NOI:
14365 case R_ARM_REL32:
14366 case R_ARM_REL32_NOI:
14367 case R_ARM_MOVW_ABS_NC:
14368 case R_ARM_MOVT_ABS:
14369 case R_ARM_MOVW_PREL_NC:
14370 case R_ARM_MOVT_PREL:
14371 case R_ARM_THM_MOVW_ABS_NC:
14372 case R_ARM_THM_MOVT_ABS:
14373 case R_ARM_THM_MOVW_PREL_NC:
14374 case R_ARM_THM_MOVT_PREL:
14375 /* Should the interworking branches be here also? */
14376 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14377 && (sec->flags & SEC_ALLOC) != 0)
14378 {
14379 if (h == NULL
14380 && elf32_arm_howto_from_type (r_type)->pc_relative)
14381 {
14382 call_reloc_p = TRUE;
14383 may_need_local_target_p = TRUE;
14384 }
14385 else
14386 may_become_dynamic_p = TRUE;
14387 }
14388 else
14389 may_need_local_target_p = TRUE;
14390 break;
14391
14392 default:
14393 break;
14394 }
14395
14396 if (may_need_local_target_p
14397 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14398 &arm_plt))
14399 {
14400 /* If PLT refcount book-keeping is wrong and too low, we'll
14401 see a zero value (going to -1) for the root PLT reference
14402 count. */
14403 if (root_plt->refcount >= 0)
14404 {
14405 BFD_ASSERT (root_plt->refcount != 0);
14406 root_plt->refcount -= 1;
14407 }
14408 else
14409 /* A value of -1 means the symbol has become local, forced
14410 or seeing a hidden definition. Any other negative value
14411 is an error. */
14412 BFD_ASSERT (root_plt->refcount == -1);
14413
14414 if (!call_reloc_p)
14415 arm_plt->noncall_refcount--;
14416
14417 if (r_type == R_ARM_THM_CALL)
14418 arm_plt->maybe_thumb_refcount--;
14419
14420 if (r_type == R_ARM_THM_JUMP24
14421 || r_type == R_ARM_THM_JUMP19)
14422 arm_plt->thumb_refcount--;
14423 }
14424
14425 if (may_become_dynamic_p)
14426 {
14427 struct elf_dyn_relocs **pp;
14428 struct elf_dyn_relocs *p;
14429
14430 if (h != NULL)
14431 pp = &(eh->dyn_relocs);
14432 else
14433 {
14434 Elf_Internal_Sym *isym;
14435
14436 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14437 abfd, r_symndx);
14438 if (isym == NULL)
14439 return FALSE;
14440 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14441 if (pp == NULL)
14442 return FALSE;
14443 }
14444 for (; (p = *pp) != NULL; pp = &p->next)
14445 if (p->sec == sec)
14446 {
14447 /* Everything must go for SEC. */
14448 *pp = p->next;
14449 break;
14450 }
14451 }
14452 }
14453
14454 return TRUE;
14455 }
14456
14457 /* Look through the relocs for a section during the first phase. */
14458
14459 static bfd_boolean
14460 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14461 asection *sec, const Elf_Internal_Rela *relocs)
14462 {
14463 Elf_Internal_Shdr *symtab_hdr;
14464 struct elf_link_hash_entry **sym_hashes;
14465 const Elf_Internal_Rela *rel;
14466 const Elf_Internal_Rela *rel_end;
14467 bfd *dynobj;
14468 asection *sreloc;
14469 struct elf32_arm_link_hash_table *htab;
14470 bfd_boolean call_reloc_p;
14471 bfd_boolean may_become_dynamic_p;
14472 bfd_boolean may_need_local_target_p;
14473 unsigned long nsyms;
14474
14475 if (bfd_link_relocatable (info))
14476 return TRUE;
14477
14478 BFD_ASSERT (is_arm_elf (abfd));
14479
14480 htab = elf32_arm_hash_table (info);
14481 if (htab == NULL)
14482 return FALSE;
14483
14484 sreloc = NULL;
14485
14486 /* Create dynamic sections for relocatable executables so that we can
14487 copy relocations. */
14488 if (htab->root.is_relocatable_executable
14489 && ! htab->root.dynamic_sections_created)
14490 {
14491 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14492 return FALSE;
14493 }
14494
14495 if (htab->root.dynobj == NULL)
14496 htab->root.dynobj = abfd;
14497 if (!create_ifunc_sections (info))
14498 return FALSE;
14499
14500 dynobj = htab->root.dynobj;
14501
14502 symtab_hdr = & elf_symtab_hdr (abfd);
14503 sym_hashes = elf_sym_hashes (abfd);
14504 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14505
14506 rel_end = relocs + sec->reloc_count;
14507 for (rel = relocs; rel < rel_end; rel++)
14508 {
14509 Elf_Internal_Sym *isym;
14510 struct elf_link_hash_entry *h;
14511 struct elf32_arm_link_hash_entry *eh;
14512 unsigned long r_symndx;
14513 int r_type;
14514
14515 r_symndx = ELF32_R_SYM (rel->r_info);
14516 r_type = ELF32_R_TYPE (rel->r_info);
14517 r_type = arm_real_reloc_type (htab, r_type);
14518
14519 if (r_symndx >= nsyms
14520 /* PR 9934: It is possible to have relocations that do not
14521 refer to symbols, thus it is also possible to have an
14522 object file containing relocations but no symbol table. */
14523 && (r_symndx > STN_UNDEF || nsyms > 0))
14524 {
14525 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
14526 r_symndx);
14527 return FALSE;
14528 }
14529
14530 h = NULL;
14531 isym = NULL;
14532 if (nsyms > 0)
14533 {
14534 if (r_symndx < symtab_hdr->sh_info)
14535 {
14536 /* A local symbol. */
14537 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14538 abfd, r_symndx);
14539 if (isym == NULL)
14540 return FALSE;
14541 }
14542 else
14543 {
14544 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14545 while (h->root.type == bfd_link_hash_indirect
14546 || h->root.type == bfd_link_hash_warning)
14547 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14548
14549 /* PR15323, ref flags aren't set for references in the
14550 same object. */
14551 h->root.non_ir_ref = 1;
14552 }
14553 }
14554
14555 eh = (struct elf32_arm_link_hash_entry *) h;
14556
14557 call_reloc_p = FALSE;
14558 may_become_dynamic_p = FALSE;
14559 may_need_local_target_p = FALSE;
14560
14561 /* Could be done earlier, if h were already available. */
14562 r_type = elf32_arm_tls_transition (info, r_type, h);
14563 switch (r_type)
14564 {
14565 case R_ARM_GOT32:
14566 case R_ARM_GOT_PREL:
14567 case R_ARM_TLS_GD32:
14568 case R_ARM_TLS_IE32:
14569 case R_ARM_TLS_GOTDESC:
14570 case R_ARM_TLS_DESCSEQ:
14571 case R_ARM_THM_TLS_DESCSEQ:
14572 case R_ARM_TLS_CALL:
14573 case R_ARM_THM_TLS_CALL:
14574 /* This symbol requires a global offset table entry. */
14575 {
14576 int tls_type, old_tls_type;
14577
14578 switch (r_type)
14579 {
14580 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14581
14582 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14583
14584 case R_ARM_TLS_GOTDESC:
14585 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14586 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14587 tls_type = GOT_TLS_GDESC; break;
14588
14589 default: tls_type = GOT_NORMAL; break;
14590 }
14591
14592 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14593 info->flags |= DF_STATIC_TLS;
14594
14595 if (h != NULL)
14596 {
14597 h->got.refcount++;
14598 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14599 }
14600 else
14601 {
14602 /* This is a global offset table entry for a local symbol. */
14603 if (!elf32_arm_allocate_local_sym_info (abfd))
14604 return FALSE;
14605 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14606 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14607 }
14608
14609 /* If a variable is accessed with both tls methods, two
14610 slots may be created. */
14611 if (GOT_TLS_GD_ANY_P (old_tls_type)
14612 && GOT_TLS_GD_ANY_P (tls_type))
14613 tls_type |= old_tls_type;
14614
14615 /* We will already have issued an error message if there
14616 is a TLS/non-TLS mismatch, based on the symbol
14617 type. So just combine any TLS types needed. */
14618 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14619 && tls_type != GOT_NORMAL)
14620 tls_type |= old_tls_type;
14621
14622 /* If the symbol is accessed in both IE and GDESC
14623 method, we're able to relax. Turn off the GDESC flag,
14624 without messing up with any other kind of tls types
14625 that may be involved. */
14626 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14627 tls_type &= ~GOT_TLS_GDESC;
14628
14629 if (old_tls_type != tls_type)
14630 {
14631 if (h != NULL)
14632 elf32_arm_hash_entry (h)->tls_type = tls_type;
14633 else
14634 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14635 }
14636 }
14637 /* Fall through. */
14638
14639 case R_ARM_TLS_LDM32:
14640 if (r_type == R_ARM_TLS_LDM32)
14641 htab->tls_ldm_got.refcount++;
14642 /* Fall through. */
14643
14644 case R_ARM_GOTOFF32:
14645 case R_ARM_GOTPC:
14646 if (htab->root.sgot == NULL
14647 && !create_got_section (htab->root.dynobj, info))
14648 return FALSE;
14649 break;
14650
14651 case R_ARM_PC24:
14652 case R_ARM_PLT32:
14653 case R_ARM_CALL:
14654 case R_ARM_JUMP24:
14655 case R_ARM_PREL31:
14656 case R_ARM_THM_CALL:
14657 case R_ARM_THM_JUMP24:
14658 case R_ARM_THM_JUMP19:
14659 call_reloc_p = TRUE;
14660 may_need_local_target_p = TRUE;
14661 break;
14662
14663 case R_ARM_ABS12:
14664 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14665 ldr __GOTT_INDEX__ offsets. */
14666 if (!htab->vxworks_p)
14667 {
14668 may_need_local_target_p = TRUE;
14669 break;
14670 }
14671 else goto jump_over;
14672
14673 /* Fall through. */
14674
14675 case R_ARM_MOVW_ABS_NC:
14676 case R_ARM_MOVT_ABS:
14677 case R_ARM_THM_MOVW_ABS_NC:
14678 case R_ARM_THM_MOVT_ABS:
14679 if (bfd_link_pic (info))
14680 {
14681 (*_bfd_error_handler)
14682 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14683 abfd, elf32_arm_howto_table_1[r_type].name,
14684 (h) ? h->root.root.string : "a local symbol");
14685 bfd_set_error (bfd_error_bad_value);
14686 return FALSE;
14687 }
14688
14689 /* Fall through. */
14690 case R_ARM_ABS32:
14691 case R_ARM_ABS32_NOI:
14692 jump_over:
14693 if (h != NULL && bfd_link_executable (info))
14694 {
14695 h->pointer_equality_needed = 1;
14696 }
14697 /* Fall through. */
14698 case R_ARM_REL32:
14699 case R_ARM_REL32_NOI:
14700 case R_ARM_MOVW_PREL_NC:
14701 case R_ARM_MOVT_PREL:
14702 case R_ARM_THM_MOVW_PREL_NC:
14703 case R_ARM_THM_MOVT_PREL:
14704
14705 /* Should the interworking branches be listed here? */
14706 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14707 && (sec->flags & SEC_ALLOC) != 0)
14708 {
14709 if (h == NULL
14710 && elf32_arm_howto_from_type (r_type)->pc_relative)
14711 {
14712 /* In shared libraries and relocatable executables,
14713 we treat local relative references as calls;
14714 see the related SYMBOL_CALLS_LOCAL code in
14715 allocate_dynrelocs. */
14716 call_reloc_p = TRUE;
14717 may_need_local_target_p = TRUE;
14718 }
14719 else
14720 /* We are creating a shared library or relocatable
14721 executable, and this is a reloc against a global symbol,
14722 or a non-PC-relative reloc against a local symbol.
14723 We may need to copy the reloc into the output. */
14724 may_become_dynamic_p = TRUE;
14725 }
14726 else
14727 may_need_local_target_p = TRUE;
14728 break;
14729
14730 /* This relocation describes the C++ object vtable hierarchy.
14731 Reconstruct it for later use during GC. */
14732 case R_ARM_GNU_VTINHERIT:
14733 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14734 return FALSE;
14735 break;
14736
14737 /* This relocation describes which C++ vtable entries are actually
14738 used. Record for later use during GC. */
14739 case R_ARM_GNU_VTENTRY:
14740 BFD_ASSERT (h != NULL);
14741 if (h != NULL
14742 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14743 return FALSE;
14744 break;
14745 }
14746
14747 if (h != NULL)
14748 {
14749 if (call_reloc_p)
14750 /* We may need a .plt entry if the function this reloc
14751 refers to is in a different object, regardless of the
14752 symbol's type. We can't tell for sure yet, because
14753 something later might force the symbol local. */
14754 h->needs_plt = 1;
14755 else if (may_need_local_target_p)
14756 /* If this reloc is in a read-only section, we might
14757 need a copy reloc. We can't check reliably at this
14758 stage whether the section is read-only, as input
14759 sections have not yet been mapped to output sections.
14760 Tentatively set the flag for now, and correct in
14761 adjust_dynamic_symbol. */
14762 h->non_got_ref = 1;
14763 }
14764
14765 if (may_need_local_target_p
14766 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14767 {
14768 union gotplt_union *root_plt;
14769 struct arm_plt_info *arm_plt;
14770 struct arm_local_iplt_info *local_iplt;
14771
14772 if (h != NULL)
14773 {
14774 root_plt = &h->plt;
14775 arm_plt = &eh->plt;
14776 }
14777 else
14778 {
14779 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14780 if (local_iplt == NULL)
14781 return FALSE;
14782 root_plt = &local_iplt->root;
14783 arm_plt = &local_iplt->arm;
14784 }
14785
14786 /* If the symbol is a function that doesn't bind locally,
14787 this relocation will need a PLT entry. */
14788 if (root_plt->refcount != -1)
14789 root_plt->refcount += 1;
14790
14791 if (!call_reloc_p)
14792 arm_plt->noncall_refcount++;
14793
14794 /* It's too early to use htab->use_blx here, so we have to
14795 record possible blx references separately from
14796 relocs that definitely need a thumb stub. */
14797
14798 if (r_type == R_ARM_THM_CALL)
14799 arm_plt->maybe_thumb_refcount += 1;
14800
14801 if (r_type == R_ARM_THM_JUMP24
14802 || r_type == R_ARM_THM_JUMP19)
14803 arm_plt->thumb_refcount += 1;
14804 }
14805
14806 if (may_become_dynamic_p)
14807 {
14808 struct elf_dyn_relocs *p, **head;
14809
14810 /* Create a reloc section in dynobj. */
14811 if (sreloc == NULL)
14812 {
14813 sreloc = _bfd_elf_make_dynamic_reloc_section
14814 (sec, dynobj, 2, abfd, ! htab->use_rel);
14815
14816 if (sreloc == NULL)
14817 return FALSE;
14818
14819 /* BPABI objects never have dynamic relocations mapped. */
14820 if (htab->symbian_p)
14821 {
14822 flagword flags;
14823
14824 flags = bfd_get_section_flags (dynobj, sreloc);
14825 flags &= ~(SEC_LOAD | SEC_ALLOC);
14826 bfd_set_section_flags (dynobj, sreloc, flags);
14827 }
14828 }
14829
14830 /* If this is a global symbol, count the number of
14831 relocations we need for this symbol. */
14832 if (h != NULL)
14833 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14834 else
14835 {
14836 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14837 if (head == NULL)
14838 return FALSE;
14839 }
14840
14841 p = *head;
14842 if (p == NULL || p->sec != sec)
14843 {
14844 bfd_size_type amt = sizeof *p;
14845
14846 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14847 if (p == NULL)
14848 return FALSE;
14849 p->next = *head;
14850 *head = p;
14851 p->sec = sec;
14852 p->count = 0;
14853 p->pc_count = 0;
14854 }
14855
14856 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14857 p->pc_count += 1;
14858 p->count += 1;
14859 }
14860 }
14861
14862 return TRUE;
14863 }
14864
14865 static void
14866 elf32_arm_update_relocs (asection *o,
14867 struct bfd_elf_section_reloc_data *reldata)
14868 {
14869 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14870 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14871 const struct elf_backend_data *bed;
14872 _arm_elf_section_data *eado;
14873 struct bfd_link_order *p;
14874 bfd_byte *erela_head, *erela;
14875 Elf_Internal_Rela *irela_head, *irela;
14876 Elf_Internal_Shdr *rel_hdr;
14877 bfd *abfd;
14878 unsigned int count;
14879
14880 eado = get_arm_elf_section_data (o);
14881
14882 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14883 return;
14884
14885 abfd = o->owner;
14886 bed = get_elf_backend_data (abfd);
14887 rel_hdr = reldata->hdr;
14888
14889 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14890 {
14891 swap_in = bed->s->swap_reloc_in;
14892 swap_out = bed->s->swap_reloc_out;
14893 }
14894 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14895 {
14896 swap_in = bed->s->swap_reloca_in;
14897 swap_out = bed->s->swap_reloca_out;
14898 }
14899 else
14900 abort ();
14901
14902 erela_head = rel_hdr->contents;
14903 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14904 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14905
14906 erela = erela_head;
14907 irela = irela_head;
14908 count = 0;
14909
14910 for (p = o->map_head.link_order; p; p = p->next)
14911 {
14912 if (p->type == bfd_section_reloc_link_order
14913 || p->type == bfd_symbol_reloc_link_order)
14914 {
14915 (*swap_in) (abfd, erela, irela);
14916 erela += rel_hdr->sh_entsize;
14917 irela++;
14918 count++;
14919 }
14920 else if (p->type == bfd_indirect_link_order)
14921 {
14922 struct bfd_elf_section_reloc_data *input_reldata;
14923 arm_unwind_table_edit *edit_list, *edit_tail;
14924 _arm_elf_section_data *eadi;
14925 bfd_size_type j;
14926 bfd_vma offset;
14927 asection *i;
14928
14929 i = p->u.indirect.section;
14930
14931 eadi = get_arm_elf_section_data (i);
14932 edit_list = eadi->u.exidx.unwind_edit_list;
14933 edit_tail = eadi->u.exidx.unwind_edit_tail;
14934 offset = o->vma + i->output_offset;
14935
14936 if (eadi->elf.rel.hdr &&
14937 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14938 input_reldata = &eadi->elf.rel;
14939 else if (eadi->elf.rela.hdr &&
14940 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14941 input_reldata = &eadi->elf.rela;
14942 else
14943 abort ();
14944
14945 if (edit_list)
14946 {
14947 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14948 {
14949 arm_unwind_table_edit *edit_node, *edit_next;
14950 bfd_vma bias;
14951 bfd_vma index;
14952
14953 (*swap_in) (abfd, erela, irela);
14954 index = (irela->r_offset - offset) / 8;
14955
14956 bias = 0;
14957 edit_node = edit_list;
14958 for (edit_next = edit_list;
14959 edit_next && edit_next->index <= index;
14960 edit_next = edit_node->next)
14961 {
14962 bias++;
14963 edit_node = edit_next;
14964 }
14965
14966 if (edit_node->type != DELETE_EXIDX_ENTRY
14967 || edit_node->index != index)
14968 {
14969 irela->r_offset -= bias * 8;
14970 irela++;
14971 count++;
14972 }
14973
14974 erela += rel_hdr->sh_entsize;
14975 }
14976
14977 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
14978 {
14979 /* New relocation entity. */
14980 asection *text_sec = edit_tail->linked_section;
14981 asection *text_out = text_sec->output_section;
14982 bfd_vma exidx_offset = offset + i->size - 8;
14983
14984 irela->r_addend = 0;
14985 irela->r_offset = exidx_offset;
14986 irela->r_info = ELF32_R_INFO
14987 (text_out->target_index, R_ARM_PREL31);
14988 irela++;
14989 count++;
14990 }
14991 }
14992 else
14993 {
14994 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14995 {
14996 (*swap_in) (abfd, erela, irela);
14997 erela += rel_hdr->sh_entsize;
14998 irela++;
14999 }
15000
15001 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15002 }
15003 }
15004 }
15005
15006 reldata->count = count;
15007 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15008
15009 erela = erela_head;
15010 irela = irela_head;
15011 while (count > 0)
15012 {
15013 (*swap_out) (abfd, irela, erela);
15014 erela += rel_hdr->sh_entsize;
15015 irela++;
15016 count--;
15017 }
15018
15019 free (irela_head);
15020
15021 /* Hashes are no longer valid. */
15022 free (reldata->hashes);
15023 reldata->hashes = NULL;
15024 }
15025
15026 /* Unwinding tables are not referenced directly. This pass marks them as
15027 required if the corresponding code section is marked. Similarly, ARMv8-M
15028 secure entry functions can only be referenced by SG veneers which are
15029 created after the GC process. They need to be marked in case they reside in
15030 their own section (as would be the case if code was compiled with
15031 -ffunction-sections). */
15032
15033 static bfd_boolean
15034 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15035 elf_gc_mark_hook_fn gc_mark_hook)
15036 {
15037 bfd *sub;
15038 Elf_Internal_Shdr **elf_shdrp;
15039 asection *cmse_sec;
15040 obj_attribute *out_attr;
15041 Elf_Internal_Shdr *symtab_hdr;
15042 unsigned i, sym_count, ext_start;
15043 const struct elf_backend_data *bed;
15044 struct elf_link_hash_entry **sym_hashes;
15045 struct elf32_arm_link_hash_entry *cmse_hash;
15046 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15047
15048 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15049
15050 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15051 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15052 && out_attr[Tag_CPU_arch_profile].i == 'M';
15053
15054 /* Marking EH data may cause additional code sections to be marked,
15055 requiring multiple passes. */
15056 again = TRUE;
15057 while (again)
15058 {
15059 again = FALSE;
15060 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15061 {
15062 asection *o;
15063
15064 if (! is_arm_elf (sub))
15065 continue;
15066
15067 elf_shdrp = elf_elfsections (sub);
15068 for (o = sub->sections; o != NULL; o = o->next)
15069 {
15070 Elf_Internal_Shdr *hdr;
15071
15072 hdr = &elf_section_data (o)->this_hdr;
15073 if (hdr->sh_type == SHT_ARM_EXIDX
15074 && hdr->sh_link
15075 && hdr->sh_link < elf_numsections (sub)
15076 && !o->gc_mark
15077 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15078 {
15079 again = TRUE;
15080 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15081 return FALSE;
15082 }
15083 }
15084
15085 /* Mark section holding ARMv8-M secure entry functions. We mark all
15086 of them so no need for a second browsing. */
15087 if (is_v8m && first_bfd_browse)
15088 {
15089 sym_hashes = elf_sym_hashes (sub);
15090 bed = get_elf_backend_data (sub);
15091 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15092 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15093 ext_start = symtab_hdr->sh_info;
15094
15095 /* Scan symbols. */
15096 for (i = ext_start; i < sym_count; i++)
15097 {
15098 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15099
15100 /* Assume it is a special symbol. If not, cmse_scan will
15101 warn about it and user can do something about it. */
15102 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15103 {
15104 cmse_sec = cmse_hash->root.root.u.def.section;
15105 if (!cmse_sec->gc_mark
15106 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15107 return FALSE;
15108 }
15109 }
15110 }
15111 }
15112 first_bfd_browse = FALSE;
15113 }
15114
15115 return TRUE;
15116 }
15117
15118 /* Treat mapping symbols as special target symbols. */
15119
15120 static bfd_boolean
15121 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15122 {
15123 return bfd_is_arm_special_symbol_name (sym->name,
15124 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15125 }
15126
15127 /* This is a copy of elf_find_function() from elf.c except that
15128 ARM mapping symbols are ignored when looking for function names
15129 and STT_ARM_TFUNC is considered to a function type. */
15130
15131 static bfd_boolean
15132 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15133 asymbol ** symbols,
15134 asection * section,
15135 bfd_vma offset,
15136 const char ** filename_ptr,
15137 const char ** functionname_ptr)
15138 {
15139 const char * filename = NULL;
15140 asymbol * func = NULL;
15141 bfd_vma low_func = 0;
15142 asymbol ** p;
15143
15144 for (p = symbols; *p != NULL; p++)
15145 {
15146 elf_symbol_type *q;
15147
15148 q = (elf_symbol_type *) *p;
15149
15150 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15151 {
15152 default:
15153 break;
15154 case STT_FILE:
15155 filename = bfd_asymbol_name (&q->symbol);
15156 break;
15157 case STT_FUNC:
15158 case STT_ARM_TFUNC:
15159 case STT_NOTYPE:
15160 /* Skip mapping symbols. */
15161 if ((q->symbol.flags & BSF_LOCAL)
15162 && bfd_is_arm_special_symbol_name (q->symbol.name,
15163 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15164 continue;
15165 /* Fall through. */
15166 if (bfd_get_section (&q->symbol) == section
15167 && q->symbol.value >= low_func
15168 && q->symbol.value <= offset)
15169 {
15170 func = (asymbol *) q;
15171 low_func = q->symbol.value;
15172 }
15173 break;
15174 }
15175 }
15176
15177 if (func == NULL)
15178 return FALSE;
15179
15180 if (filename_ptr)
15181 *filename_ptr = filename;
15182 if (functionname_ptr)
15183 *functionname_ptr = bfd_asymbol_name (func);
15184
15185 return TRUE;
15186 }
15187
15188
15189 /* Find the nearest line to a particular section and offset, for error
15190 reporting. This code is a duplicate of the code in elf.c, except
15191 that it uses arm_elf_find_function. */
15192
15193 static bfd_boolean
15194 elf32_arm_find_nearest_line (bfd * abfd,
15195 asymbol ** symbols,
15196 asection * section,
15197 bfd_vma offset,
15198 const char ** filename_ptr,
15199 const char ** functionname_ptr,
15200 unsigned int * line_ptr,
15201 unsigned int * discriminator_ptr)
15202 {
15203 bfd_boolean found = FALSE;
15204
15205 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15206 filename_ptr, functionname_ptr,
15207 line_ptr, discriminator_ptr,
15208 dwarf_debug_sections, 0,
15209 & elf_tdata (abfd)->dwarf2_find_line_info))
15210 {
15211 if (!*functionname_ptr)
15212 arm_elf_find_function (abfd, symbols, section, offset,
15213 *filename_ptr ? NULL : filename_ptr,
15214 functionname_ptr);
15215
15216 return TRUE;
15217 }
15218
15219 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15220 uses DWARF1. */
15221
15222 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15223 & found, filename_ptr,
15224 functionname_ptr, line_ptr,
15225 & elf_tdata (abfd)->line_info))
15226 return FALSE;
15227
15228 if (found && (*functionname_ptr || *line_ptr))
15229 return TRUE;
15230
15231 if (symbols == NULL)
15232 return FALSE;
15233
15234 if (! arm_elf_find_function (abfd, symbols, section, offset,
15235 filename_ptr, functionname_ptr))
15236 return FALSE;
15237
15238 *line_ptr = 0;
15239 return TRUE;
15240 }
15241
15242 static bfd_boolean
15243 elf32_arm_find_inliner_info (bfd * abfd,
15244 const char ** filename_ptr,
15245 const char ** functionname_ptr,
15246 unsigned int * line_ptr)
15247 {
15248 bfd_boolean found;
15249 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15250 functionname_ptr, line_ptr,
15251 & elf_tdata (abfd)->dwarf2_find_line_info);
15252 return found;
15253 }
15254
15255 /* Adjust a symbol defined by a dynamic object and referenced by a
15256 regular object. The current definition is in some section of the
15257 dynamic object, but we're not including those sections. We have to
15258 change the definition to something the rest of the link can
15259 understand. */
15260
15261 static bfd_boolean
15262 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15263 struct elf_link_hash_entry * h)
15264 {
15265 bfd * dynobj;
15266 asection * s;
15267 struct elf32_arm_link_hash_entry * eh;
15268 struct elf32_arm_link_hash_table *globals;
15269
15270 globals = elf32_arm_hash_table (info);
15271 if (globals == NULL)
15272 return FALSE;
15273
15274 dynobj = elf_hash_table (info)->dynobj;
15275
15276 /* Make sure we know what is going on here. */
15277 BFD_ASSERT (dynobj != NULL
15278 && (h->needs_plt
15279 || h->type == STT_GNU_IFUNC
15280 || h->u.weakdef != NULL
15281 || (h->def_dynamic
15282 && h->ref_regular
15283 && !h->def_regular)));
15284
15285 eh = (struct elf32_arm_link_hash_entry *) h;
15286
15287 /* If this is a function, put it in the procedure linkage table. We
15288 will fill in the contents of the procedure linkage table later,
15289 when we know the address of the .got section. */
15290 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15291 {
15292 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15293 symbol binds locally. */
15294 if (h->plt.refcount <= 0
15295 || (h->type != STT_GNU_IFUNC
15296 && (SYMBOL_CALLS_LOCAL (info, h)
15297 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15298 && h->root.type == bfd_link_hash_undefweak))))
15299 {
15300 /* This case can occur if we saw a PLT32 reloc in an input
15301 file, but the symbol was never referred to by a dynamic
15302 object, or if all references were garbage collected. In
15303 such a case, we don't actually need to build a procedure
15304 linkage table, and we can just do a PC24 reloc instead. */
15305 h->plt.offset = (bfd_vma) -1;
15306 eh->plt.thumb_refcount = 0;
15307 eh->plt.maybe_thumb_refcount = 0;
15308 eh->plt.noncall_refcount = 0;
15309 h->needs_plt = 0;
15310 }
15311
15312 return TRUE;
15313 }
15314 else
15315 {
15316 /* It's possible that we incorrectly decided a .plt reloc was
15317 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15318 in check_relocs. We can't decide accurately between function
15319 and non-function syms in check-relocs; Objects loaded later in
15320 the link may change h->type. So fix it now. */
15321 h->plt.offset = (bfd_vma) -1;
15322 eh->plt.thumb_refcount = 0;
15323 eh->plt.maybe_thumb_refcount = 0;
15324 eh->plt.noncall_refcount = 0;
15325 }
15326
15327 /* If this is a weak symbol, and there is a real definition, the
15328 processor independent code will have arranged for us to see the
15329 real definition first, and we can just use the same value. */
15330 if (h->u.weakdef != NULL)
15331 {
15332 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15333 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15334 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15335 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15336 return TRUE;
15337 }
15338
15339 /* If there are no non-GOT references, we do not need a copy
15340 relocation. */
15341 if (!h->non_got_ref)
15342 return TRUE;
15343
15344 /* This is a reference to a symbol defined by a dynamic object which
15345 is not a function. */
15346
15347 /* If we are creating a shared library, we must presume that the
15348 only references to the symbol are via the global offset table.
15349 For such cases we need not do anything here; the relocations will
15350 be handled correctly by relocate_section. Relocatable executables
15351 can reference data in shared objects directly, so we don't need to
15352 do anything here. */
15353 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15354 return TRUE;
15355
15356 /* We must allocate the symbol in our .dynbss section, which will
15357 become part of the .bss section of the executable. There will be
15358 an entry for this symbol in the .dynsym section. The dynamic
15359 object will contain position independent code, so all references
15360 from the dynamic object to this symbol will go through the global
15361 offset table. The dynamic linker will use the .dynsym entry to
15362 determine the address it must put in the global offset table, so
15363 both the dynamic object and the regular object will refer to the
15364 same memory location for the variable. */
15365 s = bfd_get_linker_section (dynobj, ".dynbss");
15366 BFD_ASSERT (s != NULL);
15367
15368 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15369 linker to copy the initial value out of the dynamic object and into
15370 the runtime process image. We need to remember the offset into the
15371 .rel(a).bss section we are going to use. */
15372 if (info->nocopyreloc == 0
15373 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15374 && h->size != 0)
15375 {
15376 asection *srel;
15377
15378 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
15379 elf32_arm_allocate_dynrelocs (info, srel, 1);
15380 h->needs_copy = 1;
15381 }
15382
15383 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15384 }
15385
15386 /* Allocate space in .plt, .got and associated reloc sections for
15387 dynamic relocs. */
15388
15389 static bfd_boolean
15390 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15391 {
15392 struct bfd_link_info *info;
15393 struct elf32_arm_link_hash_table *htab;
15394 struct elf32_arm_link_hash_entry *eh;
15395 struct elf_dyn_relocs *p;
15396
15397 if (h->root.type == bfd_link_hash_indirect)
15398 return TRUE;
15399
15400 eh = (struct elf32_arm_link_hash_entry *) h;
15401
15402 info = (struct bfd_link_info *) inf;
15403 htab = elf32_arm_hash_table (info);
15404 if (htab == NULL)
15405 return FALSE;
15406
15407 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15408 && h->plt.refcount > 0)
15409 {
15410 /* Make sure this symbol is output as a dynamic symbol.
15411 Undefined weak syms won't yet be marked as dynamic. */
15412 if (h->dynindx == -1
15413 && !h->forced_local)
15414 {
15415 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15416 return FALSE;
15417 }
15418
15419 /* If the call in the PLT entry binds locally, the associated
15420 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15421 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15422 than the .plt section. */
15423 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15424 {
15425 eh->is_iplt = 1;
15426 if (eh->plt.noncall_refcount == 0
15427 && SYMBOL_REFERENCES_LOCAL (info, h))
15428 /* All non-call references can be resolved directly.
15429 This means that they can (and in some cases, must)
15430 resolve directly to the run-time target, rather than
15431 to the PLT. That in turns means that any .got entry
15432 would be equal to the .igot.plt entry, so there's
15433 no point having both. */
15434 h->got.refcount = 0;
15435 }
15436
15437 if (bfd_link_pic (info)
15438 || eh->is_iplt
15439 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15440 {
15441 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15442
15443 /* If this symbol is not defined in a regular file, and we are
15444 not generating a shared library, then set the symbol to this
15445 location in the .plt. This is required to make function
15446 pointers compare as equal between the normal executable and
15447 the shared library. */
15448 if (! bfd_link_pic (info)
15449 && !h->def_regular)
15450 {
15451 h->root.u.def.section = htab->root.splt;
15452 h->root.u.def.value = h->plt.offset;
15453
15454 /* Make sure the function is not marked as Thumb, in case
15455 it is the target of an ABS32 relocation, which will
15456 point to the PLT entry. */
15457 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15458 }
15459
15460 /* VxWorks executables have a second set of relocations for
15461 each PLT entry. They go in a separate relocation section,
15462 which is processed by the kernel loader. */
15463 if (htab->vxworks_p && !bfd_link_pic (info))
15464 {
15465 /* There is a relocation for the initial PLT entry:
15466 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15467 if (h->plt.offset == htab->plt_header_size)
15468 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15469
15470 /* There are two extra relocations for each subsequent
15471 PLT entry: an R_ARM_32 relocation for the GOT entry,
15472 and an R_ARM_32 relocation for the PLT entry. */
15473 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15474 }
15475 }
15476 else
15477 {
15478 h->plt.offset = (bfd_vma) -1;
15479 h->needs_plt = 0;
15480 }
15481 }
15482 else
15483 {
15484 h->plt.offset = (bfd_vma) -1;
15485 h->needs_plt = 0;
15486 }
15487
15488 eh = (struct elf32_arm_link_hash_entry *) h;
15489 eh->tlsdesc_got = (bfd_vma) -1;
15490
15491 if (h->got.refcount > 0)
15492 {
15493 asection *s;
15494 bfd_boolean dyn;
15495 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15496 int indx;
15497
15498 /* Make sure this symbol is output as a dynamic symbol.
15499 Undefined weak syms won't yet be marked as dynamic. */
15500 if (h->dynindx == -1
15501 && !h->forced_local)
15502 {
15503 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15504 return FALSE;
15505 }
15506
15507 if (!htab->symbian_p)
15508 {
15509 s = htab->root.sgot;
15510 h->got.offset = s->size;
15511
15512 if (tls_type == GOT_UNKNOWN)
15513 abort ();
15514
15515 if (tls_type == GOT_NORMAL)
15516 /* Non-TLS symbols need one GOT slot. */
15517 s->size += 4;
15518 else
15519 {
15520 if (tls_type & GOT_TLS_GDESC)
15521 {
15522 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15523 eh->tlsdesc_got
15524 = (htab->root.sgotplt->size
15525 - elf32_arm_compute_jump_table_size (htab));
15526 htab->root.sgotplt->size += 8;
15527 h->got.offset = (bfd_vma) -2;
15528 /* plt.got_offset needs to know there's a TLS_DESC
15529 reloc in the middle of .got.plt. */
15530 htab->num_tls_desc++;
15531 }
15532
15533 if (tls_type & GOT_TLS_GD)
15534 {
15535 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15536 the symbol is both GD and GDESC, got.offset may
15537 have been overwritten. */
15538 h->got.offset = s->size;
15539 s->size += 8;
15540 }
15541
15542 if (tls_type & GOT_TLS_IE)
15543 /* R_ARM_TLS_IE32 needs one GOT slot. */
15544 s->size += 4;
15545 }
15546
15547 dyn = htab->root.dynamic_sections_created;
15548
15549 indx = 0;
15550 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15551 bfd_link_pic (info),
15552 h)
15553 && (!bfd_link_pic (info)
15554 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15555 indx = h->dynindx;
15556
15557 if (tls_type != GOT_NORMAL
15558 && (bfd_link_pic (info) || indx != 0)
15559 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15560 || h->root.type != bfd_link_hash_undefweak))
15561 {
15562 if (tls_type & GOT_TLS_IE)
15563 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15564
15565 if (tls_type & GOT_TLS_GD)
15566 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15567
15568 if (tls_type & GOT_TLS_GDESC)
15569 {
15570 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15571 /* GDESC needs a trampoline to jump to. */
15572 htab->tls_trampoline = -1;
15573 }
15574
15575 /* Only GD needs it. GDESC just emits one relocation per
15576 2 entries. */
15577 if ((tls_type & GOT_TLS_GD) && indx != 0)
15578 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15579 }
15580 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15581 {
15582 if (htab->root.dynamic_sections_created)
15583 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15584 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15585 }
15586 else if (h->type == STT_GNU_IFUNC
15587 && eh->plt.noncall_refcount == 0)
15588 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15589 they all resolve dynamically instead. Reserve room for the
15590 GOT entry's R_ARM_IRELATIVE relocation. */
15591 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15592 else if (bfd_link_pic (info)
15593 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15594 || h->root.type != bfd_link_hash_undefweak))
15595 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15596 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15597 }
15598 }
15599 else
15600 h->got.offset = (bfd_vma) -1;
15601
15602 /* Allocate stubs for exported Thumb functions on v4t. */
15603 if (!htab->use_blx && h->dynindx != -1
15604 && h->def_regular
15605 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15606 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15607 {
15608 struct elf_link_hash_entry * th;
15609 struct bfd_link_hash_entry * bh;
15610 struct elf_link_hash_entry * myh;
15611 char name[1024];
15612 asection *s;
15613 bh = NULL;
15614 /* Create a new symbol to regist the real location of the function. */
15615 s = h->root.u.def.section;
15616 sprintf (name, "__real_%s", h->root.root.string);
15617 _bfd_generic_link_add_one_symbol (info, s->owner,
15618 name, BSF_GLOBAL, s,
15619 h->root.u.def.value,
15620 NULL, TRUE, FALSE, &bh);
15621
15622 myh = (struct elf_link_hash_entry *) bh;
15623 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15624 myh->forced_local = 1;
15625 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15626 eh->export_glue = myh;
15627 th = record_arm_to_thumb_glue (info, h);
15628 /* Point the symbol at the stub. */
15629 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15630 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15631 h->root.u.def.section = th->root.u.def.section;
15632 h->root.u.def.value = th->root.u.def.value & ~1;
15633 }
15634
15635 if (eh->dyn_relocs == NULL)
15636 return TRUE;
15637
15638 /* In the shared -Bsymbolic case, discard space allocated for
15639 dynamic pc-relative relocs against symbols which turn out to be
15640 defined in regular objects. For the normal shared case, discard
15641 space for pc-relative relocs that have become local due to symbol
15642 visibility changes. */
15643
15644 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15645 {
15646 /* Relocs that use pc_count are PC-relative forms, which will appear
15647 on something like ".long foo - ." or "movw REG, foo - .". We want
15648 calls to protected symbols to resolve directly to the function
15649 rather than going via the plt. If people want function pointer
15650 comparisons to work as expected then they should avoid writing
15651 assembly like ".long foo - .". */
15652 if (SYMBOL_CALLS_LOCAL (info, h))
15653 {
15654 struct elf_dyn_relocs **pp;
15655
15656 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15657 {
15658 p->count -= p->pc_count;
15659 p->pc_count = 0;
15660 if (p->count == 0)
15661 *pp = p->next;
15662 else
15663 pp = &p->next;
15664 }
15665 }
15666
15667 if (htab->vxworks_p)
15668 {
15669 struct elf_dyn_relocs **pp;
15670
15671 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15672 {
15673 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15674 *pp = p->next;
15675 else
15676 pp = &p->next;
15677 }
15678 }
15679
15680 /* Also discard relocs on undefined weak syms with non-default
15681 visibility. */
15682 if (eh->dyn_relocs != NULL
15683 && h->root.type == bfd_link_hash_undefweak)
15684 {
15685 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15686 eh->dyn_relocs = NULL;
15687
15688 /* Make sure undefined weak symbols are output as a dynamic
15689 symbol in PIEs. */
15690 else if (h->dynindx == -1
15691 && !h->forced_local)
15692 {
15693 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15694 return FALSE;
15695 }
15696 }
15697
15698 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15699 && h->root.type == bfd_link_hash_new)
15700 {
15701 /* Output absolute symbols so that we can create relocations
15702 against them. For normal symbols we output a relocation
15703 against the section that contains them. */
15704 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15705 return FALSE;
15706 }
15707
15708 }
15709 else
15710 {
15711 /* For the non-shared case, discard space for relocs against
15712 symbols which turn out to need copy relocs or are not
15713 dynamic. */
15714
15715 if (!h->non_got_ref
15716 && ((h->def_dynamic
15717 && !h->def_regular)
15718 || (htab->root.dynamic_sections_created
15719 && (h->root.type == bfd_link_hash_undefweak
15720 || h->root.type == bfd_link_hash_undefined))))
15721 {
15722 /* Make sure this symbol is output as a dynamic symbol.
15723 Undefined weak syms won't yet be marked as dynamic. */
15724 if (h->dynindx == -1
15725 && !h->forced_local)
15726 {
15727 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15728 return FALSE;
15729 }
15730
15731 /* If that succeeded, we know we'll be keeping all the
15732 relocs. */
15733 if (h->dynindx != -1)
15734 goto keep;
15735 }
15736
15737 eh->dyn_relocs = NULL;
15738
15739 keep: ;
15740 }
15741
15742 /* Finally, allocate space. */
15743 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15744 {
15745 asection *sreloc = elf_section_data (p->sec)->sreloc;
15746 if (h->type == STT_GNU_IFUNC
15747 && eh->plt.noncall_refcount == 0
15748 && SYMBOL_REFERENCES_LOCAL (info, h))
15749 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15750 else
15751 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15752 }
15753
15754 return TRUE;
15755 }
15756
15757 /* Find any dynamic relocs that apply to read-only sections. */
15758
15759 static bfd_boolean
15760 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15761 {
15762 struct elf32_arm_link_hash_entry * eh;
15763 struct elf_dyn_relocs * p;
15764
15765 eh = (struct elf32_arm_link_hash_entry *) h;
15766 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15767 {
15768 asection *s = p->sec;
15769
15770 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15771 {
15772 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15773
15774 info->flags |= DF_TEXTREL;
15775
15776 /* Not an error, just cut short the traversal. */
15777 return FALSE;
15778 }
15779 }
15780 return TRUE;
15781 }
15782
15783 void
15784 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15785 int byteswap_code)
15786 {
15787 struct elf32_arm_link_hash_table *globals;
15788
15789 globals = elf32_arm_hash_table (info);
15790 if (globals == NULL)
15791 return;
15792
15793 globals->byteswap_code = byteswap_code;
15794 }
15795
15796 /* Set the sizes of the dynamic sections. */
15797
15798 static bfd_boolean
15799 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15800 struct bfd_link_info * info)
15801 {
15802 bfd * dynobj;
15803 asection * s;
15804 bfd_boolean plt;
15805 bfd_boolean relocs;
15806 bfd *ibfd;
15807 struct elf32_arm_link_hash_table *htab;
15808
15809 htab = elf32_arm_hash_table (info);
15810 if (htab == NULL)
15811 return FALSE;
15812
15813 dynobj = elf_hash_table (info)->dynobj;
15814 BFD_ASSERT (dynobj != NULL);
15815 check_use_blx (htab);
15816
15817 if (elf_hash_table (info)->dynamic_sections_created)
15818 {
15819 /* Set the contents of the .interp section to the interpreter. */
15820 if (bfd_link_executable (info) && !info->nointerp)
15821 {
15822 s = bfd_get_linker_section (dynobj, ".interp");
15823 BFD_ASSERT (s != NULL);
15824 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15825 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15826 }
15827 }
15828
15829 /* Set up .got offsets for local syms, and space for local dynamic
15830 relocs. */
15831 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15832 {
15833 bfd_signed_vma *local_got;
15834 bfd_signed_vma *end_local_got;
15835 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15836 char *local_tls_type;
15837 bfd_vma *local_tlsdesc_gotent;
15838 bfd_size_type locsymcount;
15839 Elf_Internal_Shdr *symtab_hdr;
15840 asection *srel;
15841 bfd_boolean is_vxworks = htab->vxworks_p;
15842 unsigned int symndx;
15843
15844 if (! is_arm_elf (ibfd))
15845 continue;
15846
15847 for (s = ibfd->sections; s != NULL; s = s->next)
15848 {
15849 struct elf_dyn_relocs *p;
15850
15851 for (p = (struct elf_dyn_relocs *)
15852 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15853 {
15854 if (!bfd_is_abs_section (p->sec)
15855 && bfd_is_abs_section (p->sec->output_section))
15856 {
15857 /* Input section has been discarded, either because
15858 it is a copy of a linkonce section or due to
15859 linker script /DISCARD/, so we'll be discarding
15860 the relocs too. */
15861 }
15862 else if (is_vxworks
15863 && strcmp (p->sec->output_section->name,
15864 ".tls_vars") == 0)
15865 {
15866 /* Relocations in vxworks .tls_vars sections are
15867 handled specially by the loader. */
15868 }
15869 else if (p->count != 0)
15870 {
15871 srel = elf_section_data (p->sec)->sreloc;
15872 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15873 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15874 info->flags |= DF_TEXTREL;
15875 }
15876 }
15877 }
15878
15879 local_got = elf_local_got_refcounts (ibfd);
15880 if (!local_got)
15881 continue;
15882
15883 symtab_hdr = & elf_symtab_hdr (ibfd);
15884 locsymcount = symtab_hdr->sh_info;
15885 end_local_got = local_got + locsymcount;
15886 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15887 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15888 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15889 symndx = 0;
15890 s = htab->root.sgot;
15891 srel = htab->root.srelgot;
15892 for (; local_got < end_local_got;
15893 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15894 ++local_tlsdesc_gotent, ++symndx)
15895 {
15896 *local_tlsdesc_gotent = (bfd_vma) -1;
15897 local_iplt = *local_iplt_ptr;
15898 if (local_iplt != NULL)
15899 {
15900 struct elf_dyn_relocs *p;
15901
15902 if (local_iplt->root.refcount > 0)
15903 {
15904 elf32_arm_allocate_plt_entry (info, TRUE,
15905 &local_iplt->root,
15906 &local_iplt->arm);
15907 if (local_iplt->arm.noncall_refcount == 0)
15908 /* All references to the PLT are calls, so all
15909 non-call references can resolve directly to the
15910 run-time target. This means that the .got entry
15911 would be the same as the .igot.plt entry, so there's
15912 no point creating both. */
15913 *local_got = 0;
15914 }
15915 else
15916 {
15917 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15918 local_iplt->root.offset = (bfd_vma) -1;
15919 }
15920
15921 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15922 {
15923 asection *psrel;
15924
15925 psrel = elf_section_data (p->sec)->sreloc;
15926 if (local_iplt->arm.noncall_refcount == 0)
15927 elf32_arm_allocate_irelocs (info, psrel, p->count);
15928 else
15929 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15930 }
15931 }
15932 if (*local_got > 0)
15933 {
15934 Elf_Internal_Sym *isym;
15935
15936 *local_got = s->size;
15937 if (*local_tls_type & GOT_TLS_GD)
15938 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15939 s->size += 8;
15940 if (*local_tls_type & GOT_TLS_GDESC)
15941 {
15942 *local_tlsdesc_gotent = htab->root.sgotplt->size
15943 - elf32_arm_compute_jump_table_size (htab);
15944 htab->root.sgotplt->size += 8;
15945 *local_got = (bfd_vma) -2;
15946 /* plt.got_offset needs to know there's a TLS_DESC
15947 reloc in the middle of .got.plt. */
15948 htab->num_tls_desc++;
15949 }
15950 if (*local_tls_type & GOT_TLS_IE)
15951 s->size += 4;
15952
15953 if (*local_tls_type & GOT_NORMAL)
15954 {
15955 /* If the symbol is both GD and GDESC, *local_got
15956 may have been overwritten. */
15957 *local_got = s->size;
15958 s->size += 4;
15959 }
15960
15961 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15962 if (isym == NULL)
15963 return FALSE;
15964
15965 /* If all references to an STT_GNU_IFUNC PLT are calls,
15966 then all non-call references, including this GOT entry,
15967 resolve directly to the run-time target. */
15968 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15969 && (local_iplt == NULL
15970 || local_iplt->arm.noncall_refcount == 0))
15971 elf32_arm_allocate_irelocs (info, srel, 1);
15972 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15973 {
15974 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15975 || *local_tls_type & GOT_TLS_GD)
15976 elf32_arm_allocate_dynrelocs (info, srel, 1);
15977
15978 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15979 {
15980 elf32_arm_allocate_dynrelocs (info,
15981 htab->root.srelplt, 1);
15982 htab->tls_trampoline = -1;
15983 }
15984 }
15985 }
15986 else
15987 *local_got = (bfd_vma) -1;
15988 }
15989 }
15990
15991 if (htab->tls_ldm_got.refcount > 0)
15992 {
15993 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15994 for R_ARM_TLS_LDM32 relocations. */
15995 htab->tls_ldm_got.offset = htab->root.sgot->size;
15996 htab->root.sgot->size += 8;
15997 if (bfd_link_pic (info))
15998 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15999 }
16000 else
16001 htab->tls_ldm_got.offset = -1;
16002
16003 /* Allocate global sym .plt and .got entries, and space for global
16004 sym dynamic relocs. */
16005 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16006
16007 /* Here we rummage through the found bfds to collect glue information. */
16008 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16009 {
16010 if (! is_arm_elf (ibfd))
16011 continue;
16012
16013 /* Initialise mapping tables for code/data. */
16014 bfd_elf32_arm_init_maps (ibfd);
16015
16016 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16017 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16018 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16019 /* xgettext:c-format */
16020 _bfd_error_handler (_("Errors encountered processing file %s"),
16021 ibfd->filename);
16022 }
16023
16024 /* Allocate space for the glue sections now that we've sized them. */
16025 bfd_elf32_arm_allocate_interworking_sections (info);
16026
16027 /* For every jump slot reserved in the sgotplt, reloc_count is
16028 incremented. However, when we reserve space for TLS descriptors,
16029 it's not incremented, so in order to compute the space reserved
16030 for them, it suffices to multiply the reloc count by the jump
16031 slot size. */
16032 if (htab->root.srelplt)
16033 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16034
16035 if (htab->tls_trampoline)
16036 {
16037 if (htab->root.splt->size == 0)
16038 htab->root.splt->size += htab->plt_header_size;
16039
16040 htab->tls_trampoline = htab->root.splt->size;
16041 htab->root.splt->size += htab->plt_entry_size;
16042
16043 /* If we're not using lazy TLS relocations, don't generate the
16044 PLT and GOT entries they require. */
16045 if (!(info->flags & DF_BIND_NOW))
16046 {
16047 htab->dt_tlsdesc_got = htab->root.sgot->size;
16048 htab->root.sgot->size += 4;
16049
16050 htab->dt_tlsdesc_plt = htab->root.splt->size;
16051 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16052 }
16053 }
16054
16055 /* The check_relocs and adjust_dynamic_symbol entry points have
16056 determined the sizes of the various dynamic sections. Allocate
16057 memory for them. */
16058 plt = FALSE;
16059 relocs = FALSE;
16060 for (s = dynobj->sections; s != NULL; s = s->next)
16061 {
16062 const char * name;
16063
16064 if ((s->flags & SEC_LINKER_CREATED) == 0)
16065 continue;
16066
16067 /* It's OK to base decisions on the section name, because none
16068 of the dynobj section names depend upon the input files. */
16069 name = bfd_get_section_name (dynobj, s);
16070
16071 if (s == htab->root.splt)
16072 {
16073 /* Remember whether there is a PLT. */
16074 plt = s->size != 0;
16075 }
16076 else if (CONST_STRNEQ (name, ".rel"))
16077 {
16078 if (s->size != 0)
16079 {
16080 /* Remember whether there are any reloc sections other
16081 than .rel(a).plt and .rela.plt.unloaded. */
16082 if (s != htab->root.srelplt && s != htab->srelplt2)
16083 relocs = TRUE;
16084
16085 /* We use the reloc_count field as a counter if we need
16086 to copy relocs into the output file. */
16087 s->reloc_count = 0;
16088 }
16089 }
16090 else if (s != htab->root.sgot
16091 && s != htab->root.sgotplt
16092 && s != htab->root.iplt
16093 && s != htab->root.igotplt
16094 && s != htab->sdynbss)
16095 {
16096 /* It's not one of our sections, so don't allocate space. */
16097 continue;
16098 }
16099
16100 if (s->size == 0)
16101 {
16102 /* If we don't need this section, strip it from the
16103 output file. This is mostly to handle .rel(a).bss and
16104 .rel(a).plt. We must create both sections in
16105 create_dynamic_sections, because they must be created
16106 before the linker maps input sections to output
16107 sections. The linker does that before
16108 adjust_dynamic_symbol is called, and it is that
16109 function which decides whether anything needs to go
16110 into these sections. */
16111 s->flags |= SEC_EXCLUDE;
16112 continue;
16113 }
16114
16115 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16116 continue;
16117
16118 /* Allocate memory for the section contents. */
16119 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16120 if (s->contents == NULL)
16121 return FALSE;
16122 }
16123
16124 if (elf_hash_table (info)->dynamic_sections_created)
16125 {
16126 /* Add some entries to the .dynamic section. We fill in the
16127 values later, in elf32_arm_finish_dynamic_sections, but we
16128 must add the entries now so that we get the correct size for
16129 the .dynamic section. The DT_DEBUG entry is filled in by the
16130 dynamic linker and used by the debugger. */
16131 #define add_dynamic_entry(TAG, VAL) \
16132 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16133
16134 if (bfd_link_executable (info))
16135 {
16136 if (!add_dynamic_entry (DT_DEBUG, 0))
16137 return FALSE;
16138 }
16139
16140 if (plt)
16141 {
16142 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16143 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16144 || !add_dynamic_entry (DT_PLTREL,
16145 htab->use_rel ? DT_REL : DT_RELA)
16146 || !add_dynamic_entry (DT_JMPREL, 0))
16147 return FALSE;
16148
16149 if (htab->dt_tlsdesc_plt
16150 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16151 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16152 return FALSE;
16153 }
16154
16155 if (relocs)
16156 {
16157 if (htab->use_rel)
16158 {
16159 if (!add_dynamic_entry (DT_REL, 0)
16160 || !add_dynamic_entry (DT_RELSZ, 0)
16161 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16162 return FALSE;
16163 }
16164 else
16165 {
16166 if (!add_dynamic_entry (DT_RELA, 0)
16167 || !add_dynamic_entry (DT_RELASZ, 0)
16168 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16169 return FALSE;
16170 }
16171 }
16172
16173 /* If any dynamic relocs apply to a read-only section,
16174 then we need a DT_TEXTREL entry. */
16175 if ((info->flags & DF_TEXTREL) == 0)
16176 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
16177 info);
16178
16179 if ((info->flags & DF_TEXTREL) != 0)
16180 {
16181 if (!add_dynamic_entry (DT_TEXTREL, 0))
16182 return FALSE;
16183 }
16184 if (htab->vxworks_p
16185 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16186 return FALSE;
16187 }
16188 #undef add_dynamic_entry
16189
16190 return TRUE;
16191 }
16192
16193 /* Size sections even though they're not dynamic. We use it to setup
16194 _TLS_MODULE_BASE_, if needed. */
16195
16196 static bfd_boolean
16197 elf32_arm_always_size_sections (bfd *output_bfd,
16198 struct bfd_link_info *info)
16199 {
16200 asection *tls_sec;
16201
16202 if (bfd_link_relocatable (info))
16203 return TRUE;
16204
16205 tls_sec = elf_hash_table (info)->tls_sec;
16206
16207 if (tls_sec)
16208 {
16209 struct elf_link_hash_entry *tlsbase;
16210
16211 tlsbase = elf_link_hash_lookup
16212 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16213
16214 if (tlsbase)
16215 {
16216 struct bfd_link_hash_entry *bh = NULL;
16217 const struct elf_backend_data *bed
16218 = get_elf_backend_data (output_bfd);
16219
16220 if (!(_bfd_generic_link_add_one_symbol
16221 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16222 tls_sec, 0, NULL, FALSE,
16223 bed->collect, &bh)))
16224 return FALSE;
16225
16226 tlsbase->type = STT_TLS;
16227 tlsbase = (struct elf_link_hash_entry *)bh;
16228 tlsbase->def_regular = 1;
16229 tlsbase->other = STV_HIDDEN;
16230 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16231 }
16232 }
16233 return TRUE;
16234 }
16235
16236 /* Finish up dynamic symbol handling. We set the contents of various
16237 dynamic sections here. */
16238
16239 static bfd_boolean
16240 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16241 struct bfd_link_info * info,
16242 struct elf_link_hash_entry * h,
16243 Elf_Internal_Sym * sym)
16244 {
16245 struct elf32_arm_link_hash_table *htab;
16246 struct elf32_arm_link_hash_entry *eh;
16247
16248 htab = elf32_arm_hash_table (info);
16249 if (htab == NULL)
16250 return FALSE;
16251
16252 eh = (struct elf32_arm_link_hash_entry *) h;
16253
16254 if (h->plt.offset != (bfd_vma) -1)
16255 {
16256 if (!eh->is_iplt)
16257 {
16258 BFD_ASSERT (h->dynindx != -1);
16259 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16260 h->dynindx, 0))
16261 return FALSE;
16262 }
16263
16264 if (!h->def_regular)
16265 {
16266 /* Mark the symbol as undefined, rather than as defined in
16267 the .plt section. */
16268 sym->st_shndx = SHN_UNDEF;
16269 /* If the symbol is weak we need to clear the value.
16270 Otherwise, the PLT entry would provide a definition for
16271 the symbol even if the symbol wasn't defined anywhere,
16272 and so the symbol would never be NULL. Leave the value if
16273 there were any relocations where pointer equality matters
16274 (this is a clue for the dynamic linker, to make function
16275 pointer comparisons work between an application and shared
16276 library). */
16277 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16278 sym->st_value = 0;
16279 }
16280 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16281 {
16282 /* At least one non-call relocation references this .iplt entry,
16283 so the .iplt entry is the function's canonical address. */
16284 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16285 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16286 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16287 (output_bfd, htab->root.iplt->output_section));
16288 sym->st_value = (h->plt.offset
16289 + htab->root.iplt->output_section->vma
16290 + htab->root.iplt->output_offset);
16291 }
16292 }
16293
16294 if (h->needs_copy)
16295 {
16296 asection * s;
16297 Elf_Internal_Rela rel;
16298
16299 /* This symbol needs a copy reloc. Set it up. */
16300 BFD_ASSERT (h->dynindx != -1
16301 && (h->root.type == bfd_link_hash_defined
16302 || h->root.type == bfd_link_hash_defweak));
16303
16304 s = htab->srelbss;
16305 BFD_ASSERT (s != NULL);
16306
16307 rel.r_addend = 0;
16308 rel.r_offset = (h->root.u.def.value
16309 + h->root.u.def.section->output_section->vma
16310 + h->root.u.def.section->output_offset);
16311 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16312 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16313 }
16314
16315 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16316 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16317 to the ".got" section. */
16318 if (h == htab->root.hdynamic
16319 || (!htab->vxworks_p && h == htab->root.hgot))
16320 sym->st_shndx = SHN_ABS;
16321
16322 return TRUE;
16323 }
16324
16325 static void
16326 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16327 void *contents,
16328 const unsigned long *template, unsigned count)
16329 {
16330 unsigned ix;
16331
16332 for (ix = 0; ix != count; ix++)
16333 {
16334 unsigned long insn = template[ix];
16335
16336 /* Emit mov pc,rx if bx is not permitted. */
16337 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16338 insn = (insn & 0xf000000f) | 0x01a0f000;
16339 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16340 }
16341 }
16342
16343 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16344 other variants, NaCl needs this entry in a static executable's
16345 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16346 zero. For .iplt really only the last bundle is useful, and .iplt
16347 could have a shorter first entry, with each individual PLT entry's
16348 relative branch calculated differently so it targets the last
16349 bundle instead of the instruction before it (labelled .Lplt_tail
16350 above). But it's simpler to keep the size and layout of PLT0
16351 consistent with the dynamic case, at the cost of some dead code at
16352 the start of .iplt and the one dead store to the stack at the start
16353 of .Lplt_tail. */
16354 static void
16355 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16356 asection *plt, bfd_vma got_displacement)
16357 {
16358 unsigned int i;
16359
16360 put_arm_insn (htab, output_bfd,
16361 elf32_arm_nacl_plt0_entry[0]
16362 | arm_movw_immediate (got_displacement),
16363 plt->contents + 0);
16364 put_arm_insn (htab, output_bfd,
16365 elf32_arm_nacl_plt0_entry[1]
16366 | arm_movt_immediate (got_displacement),
16367 plt->contents + 4);
16368
16369 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16370 put_arm_insn (htab, output_bfd,
16371 elf32_arm_nacl_plt0_entry[i],
16372 plt->contents + (i * 4));
16373 }
16374
16375 /* Finish up the dynamic sections. */
16376
16377 static bfd_boolean
16378 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16379 {
16380 bfd * dynobj;
16381 asection * sgot;
16382 asection * sdyn;
16383 struct elf32_arm_link_hash_table *htab;
16384
16385 htab = elf32_arm_hash_table (info);
16386 if (htab == NULL)
16387 return FALSE;
16388
16389 dynobj = elf_hash_table (info)->dynobj;
16390
16391 sgot = htab->root.sgotplt;
16392 /* A broken linker script might have discarded the dynamic sections.
16393 Catch this here so that we do not seg-fault later on. */
16394 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16395 return FALSE;
16396 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16397
16398 if (elf_hash_table (info)->dynamic_sections_created)
16399 {
16400 asection *splt;
16401 Elf32_External_Dyn *dyncon, *dynconend;
16402
16403 splt = htab->root.splt;
16404 BFD_ASSERT (splt != NULL && sdyn != NULL);
16405 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16406
16407 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16408 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16409
16410 for (; dyncon < dynconend; dyncon++)
16411 {
16412 Elf_Internal_Dyn dyn;
16413 const char * name;
16414 asection * s;
16415
16416 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16417
16418 switch (dyn.d_tag)
16419 {
16420 unsigned int type;
16421
16422 default:
16423 if (htab->vxworks_p
16424 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16425 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16426 break;
16427
16428 case DT_HASH:
16429 name = ".hash";
16430 goto get_vma_if_bpabi;
16431 case DT_STRTAB:
16432 name = ".dynstr";
16433 goto get_vma_if_bpabi;
16434 case DT_SYMTAB:
16435 name = ".dynsym";
16436 goto get_vma_if_bpabi;
16437 case DT_VERSYM:
16438 name = ".gnu.version";
16439 goto get_vma_if_bpabi;
16440 case DT_VERDEF:
16441 name = ".gnu.version_d";
16442 goto get_vma_if_bpabi;
16443 case DT_VERNEED:
16444 name = ".gnu.version_r";
16445 goto get_vma_if_bpabi;
16446
16447 case DT_PLTGOT:
16448 name = htab->symbian_p ? ".got" : ".got.plt";
16449 goto get_vma;
16450 case DT_JMPREL:
16451 name = RELOC_SECTION (htab, ".plt");
16452 get_vma:
16453 s = bfd_get_linker_section (dynobj, name);
16454 if (s == NULL)
16455 {
16456 (*_bfd_error_handler)
16457 (_("could not find section %s"), name);
16458 bfd_set_error (bfd_error_invalid_operation);
16459 return FALSE;
16460 }
16461 if (!htab->symbian_p)
16462 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16463 else
16464 /* In the BPABI, tags in the PT_DYNAMIC section point
16465 at the file offset, not the memory address, for the
16466 convenience of the post linker. */
16467 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16468 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16469 break;
16470
16471 get_vma_if_bpabi:
16472 if (htab->symbian_p)
16473 goto get_vma;
16474 break;
16475
16476 case DT_PLTRELSZ:
16477 s = htab->root.srelplt;
16478 BFD_ASSERT (s != NULL);
16479 dyn.d_un.d_val = s->size;
16480 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16481 break;
16482
16483 case DT_RELSZ:
16484 case DT_RELASZ:
16485 if (!htab->symbian_p)
16486 {
16487 /* My reading of the SVR4 ABI indicates that the
16488 procedure linkage table relocs (DT_JMPREL) should be
16489 included in the overall relocs (DT_REL). This is
16490 what Solaris does. However, UnixWare can not handle
16491 that case. Therefore, we override the DT_RELSZ entry
16492 here to make it not include the JMPREL relocs. Since
16493 the linker script arranges for .rel(a).plt to follow all
16494 other relocation sections, we don't have to worry
16495 about changing the DT_REL entry. */
16496 s = htab->root.srelplt;
16497 if (s != NULL)
16498 dyn.d_un.d_val -= s->size;
16499 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16500 break;
16501 }
16502 /* Fall through. */
16503
16504 case DT_REL:
16505 case DT_RELA:
16506 /* In the BPABI, the DT_REL tag must point at the file
16507 offset, not the VMA, of the first relocation
16508 section. So, we use code similar to that in
16509 elflink.c, but do not check for SHF_ALLOC on the
16510 relcoation section, since relocations sections are
16511 never allocated under the BPABI. The comments above
16512 about Unixware notwithstanding, we include all of the
16513 relocations here. */
16514 if (htab->symbian_p)
16515 {
16516 unsigned int i;
16517 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16518 ? SHT_REL : SHT_RELA);
16519 dyn.d_un.d_val = 0;
16520 for (i = 1; i < elf_numsections (output_bfd); i++)
16521 {
16522 Elf_Internal_Shdr *hdr
16523 = elf_elfsections (output_bfd)[i];
16524 if (hdr->sh_type == type)
16525 {
16526 if (dyn.d_tag == DT_RELSZ
16527 || dyn.d_tag == DT_RELASZ)
16528 dyn.d_un.d_val += hdr->sh_size;
16529 else if ((ufile_ptr) hdr->sh_offset
16530 <= dyn.d_un.d_val - 1)
16531 dyn.d_un.d_val = hdr->sh_offset;
16532 }
16533 }
16534 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16535 }
16536 break;
16537
16538 case DT_TLSDESC_PLT:
16539 s = htab->root.splt;
16540 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16541 + htab->dt_tlsdesc_plt);
16542 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16543 break;
16544
16545 case DT_TLSDESC_GOT:
16546 s = htab->root.sgot;
16547 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16548 + htab->dt_tlsdesc_got);
16549 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16550 break;
16551
16552 /* Set the bottom bit of DT_INIT/FINI if the
16553 corresponding function is Thumb. */
16554 case DT_INIT:
16555 name = info->init_function;
16556 goto get_sym;
16557 case DT_FINI:
16558 name = info->fini_function;
16559 get_sym:
16560 /* If it wasn't set by elf_bfd_final_link
16561 then there is nothing to adjust. */
16562 if (dyn.d_un.d_val != 0)
16563 {
16564 struct elf_link_hash_entry * eh;
16565
16566 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16567 FALSE, FALSE, TRUE);
16568 if (eh != NULL
16569 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16570 == ST_BRANCH_TO_THUMB)
16571 {
16572 dyn.d_un.d_val |= 1;
16573 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16574 }
16575 }
16576 break;
16577 }
16578 }
16579
16580 /* Fill in the first entry in the procedure linkage table. */
16581 if (splt->size > 0 && htab->plt_header_size)
16582 {
16583 const bfd_vma *plt0_entry;
16584 bfd_vma got_address, plt_address, got_displacement;
16585
16586 /* Calculate the addresses of the GOT and PLT. */
16587 got_address = sgot->output_section->vma + sgot->output_offset;
16588 plt_address = splt->output_section->vma + splt->output_offset;
16589
16590 if (htab->vxworks_p)
16591 {
16592 /* The VxWorks GOT is relocated by the dynamic linker.
16593 Therefore, we must emit relocations rather than simply
16594 computing the values now. */
16595 Elf_Internal_Rela rel;
16596
16597 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16598 put_arm_insn (htab, output_bfd, plt0_entry[0],
16599 splt->contents + 0);
16600 put_arm_insn (htab, output_bfd, plt0_entry[1],
16601 splt->contents + 4);
16602 put_arm_insn (htab, output_bfd, plt0_entry[2],
16603 splt->contents + 8);
16604 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16605
16606 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16607 rel.r_offset = plt_address + 12;
16608 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16609 rel.r_addend = 0;
16610 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16611 htab->srelplt2->contents);
16612 }
16613 else if (htab->nacl_p)
16614 arm_nacl_put_plt0 (htab, output_bfd, splt,
16615 got_address + 8 - (plt_address + 16));
16616 else if (using_thumb_only (htab))
16617 {
16618 got_displacement = got_address - (plt_address + 12);
16619
16620 plt0_entry = elf32_thumb2_plt0_entry;
16621 put_arm_insn (htab, output_bfd, plt0_entry[0],
16622 splt->contents + 0);
16623 put_arm_insn (htab, output_bfd, plt0_entry[1],
16624 splt->contents + 4);
16625 put_arm_insn (htab, output_bfd, plt0_entry[2],
16626 splt->contents + 8);
16627
16628 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16629 }
16630 else
16631 {
16632 got_displacement = got_address - (plt_address + 16);
16633
16634 plt0_entry = elf32_arm_plt0_entry;
16635 put_arm_insn (htab, output_bfd, plt0_entry[0],
16636 splt->contents + 0);
16637 put_arm_insn (htab, output_bfd, plt0_entry[1],
16638 splt->contents + 4);
16639 put_arm_insn (htab, output_bfd, plt0_entry[2],
16640 splt->contents + 8);
16641 put_arm_insn (htab, output_bfd, plt0_entry[3],
16642 splt->contents + 12);
16643
16644 #ifdef FOUR_WORD_PLT
16645 /* The displacement value goes in the otherwise-unused
16646 last word of the second entry. */
16647 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16648 #else
16649 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16650 #endif
16651 }
16652 }
16653
16654 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16655 really seem like the right value. */
16656 if (splt->output_section->owner == output_bfd)
16657 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16658
16659 if (htab->dt_tlsdesc_plt)
16660 {
16661 bfd_vma got_address
16662 = sgot->output_section->vma + sgot->output_offset;
16663 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16664 + htab->root.sgot->output_offset);
16665 bfd_vma plt_address
16666 = splt->output_section->vma + splt->output_offset;
16667
16668 arm_put_trampoline (htab, output_bfd,
16669 splt->contents + htab->dt_tlsdesc_plt,
16670 dl_tlsdesc_lazy_trampoline, 6);
16671
16672 bfd_put_32 (output_bfd,
16673 gotplt_address + htab->dt_tlsdesc_got
16674 - (plt_address + htab->dt_tlsdesc_plt)
16675 - dl_tlsdesc_lazy_trampoline[6],
16676 splt->contents + htab->dt_tlsdesc_plt + 24);
16677 bfd_put_32 (output_bfd,
16678 got_address - (plt_address + htab->dt_tlsdesc_plt)
16679 - dl_tlsdesc_lazy_trampoline[7],
16680 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16681 }
16682
16683 if (htab->tls_trampoline)
16684 {
16685 arm_put_trampoline (htab, output_bfd,
16686 splt->contents + htab->tls_trampoline,
16687 tls_trampoline, 3);
16688 #ifdef FOUR_WORD_PLT
16689 bfd_put_32 (output_bfd, 0x00000000,
16690 splt->contents + htab->tls_trampoline + 12);
16691 #endif
16692 }
16693
16694 if (htab->vxworks_p
16695 && !bfd_link_pic (info)
16696 && htab->root.splt->size > 0)
16697 {
16698 /* Correct the .rel(a).plt.unloaded relocations. They will have
16699 incorrect symbol indexes. */
16700 int num_plts;
16701 unsigned char *p;
16702
16703 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16704 / htab->plt_entry_size);
16705 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16706
16707 for (; num_plts; num_plts--)
16708 {
16709 Elf_Internal_Rela rel;
16710
16711 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16712 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16713 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16714 p += RELOC_SIZE (htab);
16715
16716 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16717 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16718 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16719 p += RELOC_SIZE (htab);
16720 }
16721 }
16722 }
16723
16724 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16725 /* NaCl uses a special first entry in .iplt too. */
16726 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16727
16728 /* Fill in the first three entries in the global offset table. */
16729 if (sgot)
16730 {
16731 if (sgot->size > 0)
16732 {
16733 if (sdyn == NULL)
16734 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16735 else
16736 bfd_put_32 (output_bfd,
16737 sdyn->output_section->vma + sdyn->output_offset,
16738 sgot->contents);
16739 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16740 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16741 }
16742
16743 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16744 }
16745
16746 return TRUE;
16747 }
16748
16749 static void
16750 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16751 {
16752 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16753 struct elf32_arm_link_hash_table *globals;
16754 struct elf_segment_map *m;
16755
16756 i_ehdrp = elf_elfheader (abfd);
16757
16758 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16759 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16760 else
16761 _bfd_elf_post_process_headers (abfd, link_info);
16762 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16763
16764 if (link_info)
16765 {
16766 globals = elf32_arm_hash_table (link_info);
16767 if (globals != NULL && globals->byteswap_code)
16768 i_ehdrp->e_flags |= EF_ARM_BE8;
16769 }
16770
16771 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16772 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16773 {
16774 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16775 if (abi == AEABI_VFP_args_vfp)
16776 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16777 else
16778 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16779 }
16780
16781 /* Scan segment to set p_flags attribute if it contains only sections with
16782 SHF_ARM_PURECODE flag. */
16783 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16784 {
16785 unsigned int j;
16786
16787 if (m->count == 0)
16788 continue;
16789 for (j = 0; j < m->count; j++)
16790 {
16791 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16792 break;
16793 }
16794 if (j == m->count)
16795 {
16796 m->p_flags = PF_X;
16797 m->p_flags_valid = 1;
16798 }
16799 }
16800 }
16801
16802 static enum elf_reloc_type_class
16803 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16804 const asection *rel_sec ATTRIBUTE_UNUSED,
16805 const Elf_Internal_Rela *rela)
16806 {
16807 switch ((int) ELF32_R_TYPE (rela->r_info))
16808 {
16809 case R_ARM_RELATIVE:
16810 return reloc_class_relative;
16811 case R_ARM_JUMP_SLOT:
16812 return reloc_class_plt;
16813 case R_ARM_COPY:
16814 return reloc_class_copy;
16815 case R_ARM_IRELATIVE:
16816 return reloc_class_ifunc;
16817 default:
16818 return reloc_class_normal;
16819 }
16820 }
16821
16822 static void
16823 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16824 {
16825 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16826 }
16827
16828 /* Return TRUE if this is an unwinding table entry. */
16829
16830 static bfd_boolean
16831 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16832 {
16833 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16834 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16835 }
16836
16837
16838 /* Set the type and flags for an ARM section. We do this by
16839 the section name, which is a hack, but ought to work. */
16840
16841 static bfd_boolean
16842 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16843 {
16844 const char * name;
16845
16846 name = bfd_get_section_name (abfd, sec);
16847
16848 if (is_arm_elf_unwind_section_name (abfd, name))
16849 {
16850 hdr->sh_type = SHT_ARM_EXIDX;
16851 hdr->sh_flags |= SHF_LINK_ORDER;
16852 }
16853
16854 if (sec->flags & SEC_ELF_PURECODE)
16855 hdr->sh_flags |= SHF_ARM_PURECODE;
16856
16857 return TRUE;
16858 }
16859
16860 /* Handle an ARM specific section when reading an object file. This is
16861 called when bfd_section_from_shdr finds a section with an unknown
16862 type. */
16863
16864 static bfd_boolean
16865 elf32_arm_section_from_shdr (bfd *abfd,
16866 Elf_Internal_Shdr * hdr,
16867 const char *name,
16868 int shindex)
16869 {
16870 /* There ought to be a place to keep ELF backend specific flags, but
16871 at the moment there isn't one. We just keep track of the
16872 sections by their name, instead. Fortunately, the ABI gives
16873 names for all the ARM specific sections, so we will probably get
16874 away with this. */
16875 switch (hdr->sh_type)
16876 {
16877 case SHT_ARM_EXIDX:
16878 case SHT_ARM_PREEMPTMAP:
16879 case SHT_ARM_ATTRIBUTES:
16880 break;
16881
16882 default:
16883 return FALSE;
16884 }
16885
16886 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16887 return FALSE;
16888
16889 return TRUE;
16890 }
16891
16892 static _arm_elf_section_data *
16893 get_arm_elf_section_data (asection * sec)
16894 {
16895 if (sec && sec->owner && is_arm_elf (sec->owner))
16896 return elf32_arm_section_data (sec);
16897 else
16898 return NULL;
16899 }
16900
16901 typedef struct
16902 {
16903 void *flaginfo;
16904 struct bfd_link_info *info;
16905 asection *sec;
16906 int sec_shndx;
16907 int (*func) (void *, const char *, Elf_Internal_Sym *,
16908 asection *, struct elf_link_hash_entry *);
16909 } output_arch_syminfo;
16910
16911 enum map_symbol_type
16912 {
16913 ARM_MAP_ARM,
16914 ARM_MAP_THUMB,
16915 ARM_MAP_DATA
16916 };
16917
16918
16919 /* Output a single mapping symbol. */
16920
16921 static bfd_boolean
16922 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16923 enum map_symbol_type type,
16924 bfd_vma offset)
16925 {
16926 static const char *names[3] = {"$a", "$t", "$d"};
16927 Elf_Internal_Sym sym;
16928
16929 sym.st_value = osi->sec->output_section->vma
16930 + osi->sec->output_offset
16931 + offset;
16932 sym.st_size = 0;
16933 sym.st_other = 0;
16934 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16935 sym.st_shndx = osi->sec_shndx;
16936 sym.st_target_internal = 0;
16937 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16938 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16939 }
16940
16941 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16942 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16943
16944 static bfd_boolean
16945 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16946 bfd_boolean is_iplt_entry_p,
16947 union gotplt_union *root_plt,
16948 struct arm_plt_info *arm_plt)
16949 {
16950 struct elf32_arm_link_hash_table *htab;
16951 bfd_vma addr, plt_header_size;
16952
16953 if (root_plt->offset == (bfd_vma) -1)
16954 return TRUE;
16955
16956 htab = elf32_arm_hash_table (osi->info);
16957 if (htab == NULL)
16958 return FALSE;
16959
16960 if (is_iplt_entry_p)
16961 {
16962 osi->sec = htab->root.iplt;
16963 plt_header_size = 0;
16964 }
16965 else
16966 {
16967 osi->sec = htab->root.splt;
16968 plt_header_size = htab->plt_header_size;
16969 }
16970 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16971 (osi->info->output_bfd, osi->sec->output_section));
16972
16973 addr = root_plt->offset & -2;
16974 if (htab->symbian_p)
16975 {
16976 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16977 return FALSE;
16978 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16979 return FALSE;
16980 }
16981 else if (htab->vxworks_p)
16982 {
16983 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16984 return FALSE;
16985 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16986 return FALSE;
16987 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16988 return FALSE;
16989 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16990 return FALSE;
16991 }
16992 else if (htab->nacl_p)
16993 {
16994 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16995 return FALSE;
16996 }
16997 else if (using_thumb_only (htab))
16998 {
16999 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17000 return FALSE;
17001 }
17002 else
17003 {
17004 bfd_boolean thumb_stub_p;
17005
17006 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17007 if (thumb_stub_p)
17008 {
17009 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17010 return FALSE;
17011 }
17012 #ifdef FOUR_WORD_PLT
17013 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17014 return FALSE;
17015 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17016 return FALSE;
17017 #else
17018 /* A three-word PLT with no Thumb thunk contains only Arm code,
17019 so only need to output a mapping symbol for the first PLT entry and
17020 entries with thumb thunks. */
17021 if (thumb_stub_p || addr == plt_header_size)
17022 {
17023 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17024 return FALSE;
17025 }
17026 #endif
17027 }
17028
17029 return TRUE;
17030 }
17031
17032 /* Output mapping symbols for PLT entries associated with H. */
17033
17034 static bfd_boolean
17035 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17036 {
17037 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17038 struct elf32_arm_link_hash_entry *eh;
17039
17040 if (h->root.type == bfd_link_hash_indirect)
17041 return TRUE;
17042
17043 if (h->root.type == bfd_link_hash_warning)
17044 /* When warning symbols are created, they **replace** the "real"
17045 entry in the hash table, thus we never get to see the real
17046 symbol in a hash traversal. So look at it now. */
17047 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17048
17049 eh = (struct elf32_arm_link_hash_entry *) h;
17050 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17051 &h->plt, &eh->plt);
17052 }
17053
17054 /* Bind a veneered symbol to its veneer identified by its hash entry
17055 STUB_ENTRY. The veneered location thus loose its symbol. */
17056
17057 static void
17058 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17059 {
17060 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17061
17062 BFD_ASSERT (hash);
17063 hash->root.root.u.def.section = stub_entry->stub_sec;
17064 hash->root.root.u.def.value = stub_entry->stub_offset;
17065 hash->root.size = stub_entry->stub_size;
17066 }
17067
17068 /* Output a single local symbol for a generated stub. */
17069
17070 static bfd_boolean
17071 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17072 bfd_vma offset, bfd_vma size)
17073 {
17074 Elf_Internal_Sym sym;
17075
17076 sym.st_value = osi->sec->output_section->vma
17077 + osi->sec->output_offset
17078 + offset;
17079 sym.st_size = size;
17080 sym.st_other = 0;
17081 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17082 sym.st_shndx = osi->sec_shndx;
17083 sym.st_target_internal = 0;
17084 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17085 }
17086
17087 static bfd_boolean
17088 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17089 void * in_arg)
17090 {
17091 struct elf32_arm_stub_hash_entry *stub_entry;
17092 asection *stub_sec;
17093 bfd_vma addr;
17094 char *stub_name;
17095 output_arch_syminfo *osi;
17096 const insn_sequence *template_sequence;
17097 enum stub_insn_type prev_type;
17098 int size;
17099 int i;
17100 enum map_symbol_type sym_type;
17101
17102 /* Massage our args to the form they really have. */
17103 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17104 osi = (output_arch_syminfo *) in_arg;
17105
17106 stub_sec = stub_entry->stub_sec;
17107
17108 /* Ensure this stub is attached to the current section being
17109 processed. */
17110 if (stub_sec != osi->sec)
17111 return TRUE;
17112
17113 addr = (bfd_vma) stub_entry->stub_offset;
17114 template_sequence = stub_entry->stub_template;
17115
17116 if (arm_stub_sym_claimed (stub_entry->stub_type))
17117 arm_stub_claim_sym (stub_entry);
17118 else
17119 {
17120 stub_name = stub_entry->output_name;
17121 switch (template_sequence[0].type)
17122 {
17123 case ARM_TYPE:
17124 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17125 stub_entry->stub_size))
17126 return FALSE;
17127 break;
17128 case THUMB16_TYPE:
17129 case THUMB32_TYPE:
17130 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17131 stub_entry->stub_size))
17132 return FALSE;
17133 break;
17134 default:
17135 BFD_FAIL ();
17136 return 0;
17137 }
17138 }
17139
17140 prev_type = DATA_TYPE;
17141 size = 0;
17142 for (i = 0; i < stub_entry->stub_template_size; i++)
17143 {
17144 switch (template_sequence[i].type)
17145 {
17146 case ARM_TYPE:
17147 sym_type = ARM_MAP_ARM;
17148 break;
17149
17150 case THUMB16_TYPE:
17151 case THUMB32_TYPE:
17152 sym_type = ARM_MAP_THUMB;
17153 break;
17154
17155 case DATA_TYPE:
17156 sym_type = ARM_MAP_DATA;
17157 break;
17158
17159 default:
17160 BFD_FAIL ();
17161 return FALSE;
17162 }
17163
17164 if (template_sequence[i].type != prev_type)
17165 {
17166 prev_type = template_sequence[i].type;
17167 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17168 return FALSE;
17169 }
17170
17171 switch (template_sequence[i].type)
17172 {
17173 case ARM_TYPE:
17174 case THUMB32_TYPE:
17175 size += 4;
17176 break;
17177
17178 case THUMB16_TYPE:
17179 size += 2;
17180 break;
17181
17182 case DATA_TYPE:
17183 size += 4;
17184 break;
17185
17186 default:
17187 BFD_FAIL ();
17188 return FALSE;
17189 }
17190 }
17191
17192 return TRUE;
17193 }
17194
17195 /* Output mapping symbols for linker generated sections,
17196 and for those data-only sections that do not have a
17197 $d. */
17198
17199 static bfd_boolean
17200 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17201 struct bfd_link_info *info,
17202 void *flaginfo,
17203 int (*func) (void *, const char *,
17204 Elf_Internal_Sym *,
17205 asection *,
17206 struct elf_link_hash_entry *))
17207 {
17208 output_arch_syminfo osi;
17209 struct elf32_arm_link_hash_table *htab;
17210 bfd_vma offset;
17211 bfd_size_type size;
17212 bfd *input_bfd;
17213
17214 htab = elf32_arm_hash_table (info);
17215 if (htab == NULL)
17216 return FALSE;
17217
17218 check_use_blx (htab);
17219
17220 osi.flaginfo = flaginfo;
17221 osi.info = info;
17222 osi.func = func;
17223
17224 /* Add a $d mapping symbol to data-only sections that
17225 don't have any mapping symbol. This may result in (harmless) redundant
17226 mapping symbols. */
17227 for (input_bfd = info->input_bfds;
17228 input_bfd != NULL;
17229 input_bfd = input_bfd->link.next)
17230 {
17231 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17232 for (osi.sec = input_bfd->sections;
17233 osi.sec != NULL;
17234 osi.sec = osi.sec->next)
17235 {
17236 if (osi.sec->output_section != NULL
17237 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17238 != 0)
17239 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17240 == SEC_HAS_CONTENTS
17241 && get_arm_elf_section_data (osi.sec) != NULL
17242 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17243 && osi.sec->size > 0
17244 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17245 {
17246 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17247 (output_bfd, osi.sec->output_section);
17248 if (osi.sec_shndx != (int)SHN_BAD)
17249 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17250 }
17251 }
17252 }
17253
17254 /* ARM->Thumb glue. */
17255 if (htab->arm_glue_size > 0)
17256 {
17257 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17258 ARM2THUMB_GLUE_SECTION_NAME);
17259
17260 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17261 (output_bfd, osi.sec->output_section);
17262 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17263 || htab->pic_veneer)
17264 size = ARM2THUMB_PIC_GLUE_SIZE;
17265 else if (htab->use_blx)
17266 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17267 else
17268 size = ARM2THUMB_STATIC_GLUE_SIZE;
17269
17270 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17271 {
17272 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17273 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17274 }
17275 }
17276
17277 /* Thumb->ARM glue. */
17278 if (htab->thumb_glue_size > 0)
17279 {
17280 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17281 THUMB2ARM_GLUE_SECTION_NAME);
17282
17283 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17284 (output_bfd, osi.sec->output_section);
17285 size = THUMB2ARM_GLUE_SIZE;
17286
17287 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17288 {
17289 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17290 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17291 }
17292 }
17293
17294 /* ARMv4 BX veneers. */
17295 if (htab->bx_glue_size > 0)
17296 {
17297 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17298 ARM_BX_GLUE_SECTION_NAME);
17299
17300 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17301 (output_bfd, osi.sec->output_section);
17302
17303 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17304 }
17305
17306 /* Long calls stubs. */
17307 if (htab->stub_bfd && htab->stub_bfd->sections)
17308 {
17309 asection* stub_sec;
17310
17311 for (stub_sec = htab->stub_bfd->sections;
17312 stub_sec != NULL;
17313 stub_sec = stub_sec->next)
17314 {
17315 /* Ignore non-stub sections. */
17316 if (!strstr (stub_sec->name, STUB_SUFFIX))
17317 continue;
17318
17319 osi.sec = stub_sec;
17320
17321 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17322 (output_bfd, osi.sec->output_section);
17323
17324 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17325 }
17326 }
17327
17328 /* Finally, output mapping symbols for the PLT. */
17329 if (htab->root.splt && htab->root.splt->size > 0)
17330 {
17331 osi.sec = htab->root.splt;
17332 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17333 (output_bfd, osi.sec->output_section));
17334
17335 /* Output mapping symbols for the plt header. SymbianOS does not have a
17336 plt header. */
17337 if (htab->vxworks_p)
17338 {
17339 /* VxWorks shared libraries have no PLT header. */
17340 if (!bfd_link_pic (info))
17341 {
17342 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17343 return FALSE;
17344 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17345 return FALSE;
17346 }
17347 }
17348 else if (htab->nacl_p)
17349 {
17350 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17351 return FALSE;
17352 }
17353 else if (using_thumb_only (htab))
17354 {
17355 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17356 return FALSE;
17357 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17358 return FALSE;
17359 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17360 return FALSE;
17361 }
17362 else if (!htab->symbian_p)
17363 {
17364 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17365 return FALSE;
17366 #ifndef FOUR_WORD_PLT
17367 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17368 return FALSE;
17369 #endif
17370 }
17371 }
17372 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17373 {
17374 /* NaCl uses a special first entry in .iplt too. */
17375 osi.sec = htab->root.iplt;
17376 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17377 (output_bfd, osi.sec->output_section));
17378 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17379 return FALSE;
17380 }
17381 if ((htab->root.splt && htab->root.splt->size > 0)
17382 || (htab->root.iplt && htab->root.iplt->size > 0))
17383 {
17384 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17385 for (input_bfd = info->input_bfds;
17386 input_bfd != NULL;
17387 input_bfd = input_bfd->link.next)
17388 {
17389 struct arm_local_iplt_info **local_iplt;
17390 unsigned int i, num_syms;
17391
17392 local_iplt = elf32_arm_local_iplt (input_bfd);
17393 if (local_iplt != NULL)
17394 {
17395 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17396 for (i = 0; i < num_syms; i++)
17397 if (local_iplt[i] != NULL
17398 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17399 &local_iplt[i]->root,
17400 &local_iplt[i]->arm))
17401 return FALSE;
17402 }
17403 }
17404 }
17405 if (htab->dt_tlsdesc_plt != 0)
17406 {
17407 /* Mapping symbols for the lazy tls trampoline. */
17408 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17409 return FALSE;
17410
17411 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17412 htab->dt_tlsdesc_plt + 24))
17413 return FALSE;
17414 }
17415 if (htab->tls_trampoline != 0)
17416 {
17417 /* Mapping symbols for the tls trampoline. */
17418 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17419 return FALSE;
17420 #ifdef FOUR_WORD_PLT
17421 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17422 htab->tls_trampoline + 12))
17423 return FALSE;
17424 #endif
17425 }
17426
17427 return TRUE;
17428 }
17429
17430 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17431 the import library. All SYMCOUNT symbols of ABFD can be examined
17432 from their pointers in SYMS. Pointers of symbols to keep should be
17433 stored continuously at the beginning of that array.
17434
17435 Returns the number of symbols to keep. */
17436
17437 static unsigned int
17438 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17439 struct bfd_link_info *info,
17440 asymbol **syms, long symcount)
17441 {
17442 size_t maxnamelen;
17443 char *cmse_name;
17444 long src_count, dst_count = 0;
17445 struct elf32_arm_link_hash_table *htab;
17446
17447 htab = elf32_arm_hash_table (info);
17448 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17449 symcount = 0;
17450
17451 maxnamelen = 128;
17452 cmse_name = (char *) bfd_malloc (maxnamelen);
17453 for (src_count = 0; src_count < symcount; src_count++)
17454 {
17455 struct elf32_arm_link_hash_entry *cmse_hash;
17456 asymbol *sym;
17457 flagword flags;
17458 char *name;
17459 size_t namelen;
17460
17461 sym = syms[src_count];
17462 flags = sym->flags;
17463 name = (char *) bfd_asymbol_name (sym);
17464
17465 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17466 continue;
17467 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17468 continue;
17469
17470 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17471 if (namelen > maxnamelen)
17472 {
17473 cmse_name = (char *)
17474 bfd_realloc (cmse_name, namelen);
17475 maxnamelen = namelen;
17476 }
17477 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17478 cmse_hash = (struct elf32_arm_link_hash_entry *)
17479 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17480
17481 if (!cmse_hash
17482 || (cmse_hash->root.root.type != bfd_link_hash_defined
17483 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17484 || cmse_hash->root.type != STT_FUNC)
17485 continue;
17486
17487 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17488 continue;
17489
17490 syms[dst_count++] = sym;
17491 }
17492 free (cmse_name);
17493
17494 syms[dst_count] = NULL;
17495
17496 return dst_count;
17497 }
17498
17499 /* Filter symbols of ABFD to include in the import library. All
17500 SYMCOUNT symbols of ABFD can be examined from their pointers in
17501 SYMS. Pointers of symbols to keep should be stored continuously at
17502 the beginning of that array.
17503
17504 Returns the number of symbols to keep. */
17505
17506 static unsigned int
17507 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17508 struct bfd_link_info *info,
17509 asymbol **syms, long symcount)
17510 {
17511 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17512
17513 if (globals->cmse_implib)
17514 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17515 else
17516 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17517 }
17518
17519 /* Allocate target specific section data. */
17520
17521 static bfd_boolean
17522 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17523 {
17524 if (!sec->used_by_bfd)
17525 {
17526 _arm_elf_section_data *sdata;
17527 bfd_size_type amt = sizeof (*sdata);
17528
17529 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17530 if (sdata == NULL)
17531 return FALSE;
17532 sec->used_by_bfd = sdata;
17533 }
17534
17535 return _bfd_elf_new_section_hook (abfd, sec);
17536 }
17537
17538
17539 /* Used to order a list of mapping symbols by address. */
17540
17541 static int
17542 elf32_arm_compare_mapping (const void * a, const void * b)
17543 {
17544 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17545 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17546
17547 if (amap->vma > bmap->vma)
17548 return 1;
17549 else if (amap->vma < bmap->vma)
17550 return -1;
17551 else if (amap->type > bmap->type)
17552 /* Ensure results do not depend on the host qsort for objects with
17553 multiple mapping symbols at the same address by sorting on type
17554 after vma. */
17555 return 1;
17556 else if (amap->type < bmap->type)
17557 return -1;
17558 else
17559 return 0;
17560 }
17561
17562 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17563
17564 static unsigned long
17565 offset_prel31 (unsigned long addr, bfd_vma offset)
17566 {
17567 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17568 }
17569
17570 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17571 relocations. */
17572
17573 static void
17574 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17575 {
17576 unsigned long first_word = bfd_get_32 (output_bfd, from);
17577 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17578
17579 /* High bit of first word is supposed to be zero. */
17580 if ((first_word & 0x80000000ul) == 0)
17581 first_word = offset_prel31 (first_word, offset);
17582
17583 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17584 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17585 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17586 second_word = offset_prel31 (second_word, offset);
17587
17588 bfd_put_32 (output_bfd, first_word, to);
17589 bfd_put_32 (output_bfd, second_word, to + 4);
17590 }
17591
17592 /* Data for make_branch_to_a8_stub(). */
17593
17594 struct a8_branch_to_stub_data
17595 {
17596 asection *writing_section;
17597 bfd_byte *contents;
17598 };
17599
17600
17601 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17602 places for a particular section. */
17603
17604 static bfd_boolean
17605 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17606 void *in_arg)
17607 {
17608 struct elf32_arm_stub_hash_entry *stub_entry;
17609 struct a8_branch_to_stub_data *data;
17610 bfd_byte *contents;
17611 unsigned long branch_insn;
17612 bfd_vma veneered_insn_loc, veneer_entry_loc;
17613 bfd_signed_vma branch_offset;
17614 bfd *abfd;
17615 unsigned int loc;
17616
17617 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17618 data = (struct a8_branch_to_stub_data *) in_arg;
17619
17620 if (stub_entry->target_section != data->writing_section
17621 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17622 return TRUE;
17623
17624 contents = data->contents;
17625
17626 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17627 generated when both source and target are in the same section. */
17628 veneered_insn_loc = stub_entry->target_section->output_section->vma
17629 + stub_entry->target_section->output_offset
17630 + stub_entry->source_value;
17631
17632 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17633 + stub_entry->stub_sec->output_offset
17634 + stub_entry->stub_offset;
17635
17636 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17637 veneered_insn_loc &= ~3u;
17638
17639 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17640
17641 abfd = stub_entry->target_section->owner;
17642 loc = stub_entry->source_value;
17643
17644 /* We attempt to avoid this condition by setting stubs_always_after_branch
17645 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17646 This check is just to be on the safe side... */
17647 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17648 {
17649 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
17650 "allocated in unsafe location"), abfd);
17651 return FALSE;
17652 }
17653
17654 switch (stub_entry->stub_type)
17655 {
17656 case arm_stub_a8_veneer_b:
17657 case arm_stub_a8_veneer_b_cond:
17658 branch_insn = 0xf0009000;
17659 goto jump24;
17660
17661 case arm_stub_a8_veneer_blx:
17662 branch_insn = 0xf000e800;
17663 goto jump24;
17664
17665 case arm_stub_a8_veneer_bl:
17666 {
17667 unsigned int i1, j1, i2, j2, s;
17668
17669 branch_insn = 0xf000d000;
17670
17671 jump24:
17672 if (branch_offset < -16777216 || branch_offset > 16777214)
17673 {
17674 /* There's not much we can do apart from complain if this
17675 happens. */
17676 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
17677 "of range (input file too large)"), abfd);
17678 return FALSE;
17679 }
17680
17681 /* i1 = not(j1 eor s), so:
17682 not i1 = j1 eor s
17683 j1 = (not i1) eor s. */
17684
17685 branch_insn |= (branch_offset >> 1) & 0x7ff;
17686 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17687 i2 = (branch_offset >> 22) & 1;
17688 i1 = (branch_offset >> 23) & 1;
17689 s = (branch_offset >> 24) & 1;
17690 j1 = (!i1) ^ s;
17691 j2 = (!i2) ^ s;
17692 branch_insn |= j2 << 11;
17693 branch_insn |= j1 << 13;
17694 branch_insn |= s << 26;
17695 }
17696 break;
17697
17698 default:
17699 BFD_FAIL ();
17700 return FALSE;
17701 }
17702
17703 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17704 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17705
17706 return TRUE;
17707 }
17708
17709 /* Beginning of stm32l4xx work-around. */
17710
17711 /* Functions encoding instructions necessary for the emission of the
17712 fix-stm32l4xx-629360.
17713 Encoding is extracted from the
17714 ARM (C) Architecture Reference Manual
17715 ARMv7-A and ARMv7-R edition
17716 ARM DDI 0406C.b (ID072512). */
17717
17718 static inline bfd_vma
17719 create_instruction_branch_absolute (int branch_offset)
17720 {
17721 /* A8.8.18 B (A8-334)
17722 B target_address (Encoding T4). */
17723 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17724 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17725 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17726
17727 int s = ((branch_offset & 0x1000000) >> 24);
17728 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17729 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17730
17731 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17732 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17733
17734 bfd_vma patched_inst = 0xf0009000
17735 | s << 26 /* S. */
17736 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17737 | j1 << 13 /* J1. */
17738 | j2 << 11 /* J2. */
17739 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17740
17741 return patched_inst;
17742 }
17743
17744 static inline bfd_vma
17745 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17746 {
17747 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17748 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17749 bfd_vma patched_inst = 0xe8900000
17750 | (/*W=*/wback << 21)
17751 | (base_reg << 16)
17752 | (reg_mask & 0x0000ffff);
17753
17754 return patched_inst;
17755 }
17756
17757 static inline bfd_vma
17758 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17759 {
17760 /* A8.8.60 LDMDB/LDMEA (A8-402)
17761 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17762 bfd_vma patched_inst = 0xe9100000
17763 | (/*W=*/wback << 21)
17764 | (base_reg << 16)
17765 | (reg_mask & 0x0000ffff);
17766
17767 return patched_inst;
17768 }
17769
17770 static inline bfd_vma
17771 create_instruction_mov (int target_reg, int source_reg)
17772 {
17773 /* A8.8.103 MOV (register) (A8-486)
17774 MOV Rd, Rm (Encoding T1). */
17775 bfd_vma patched_inst = 0x4600
17776 | (target_reg & 0x7)
17777 | ((target_reg & 0x8) >> 3) << 7
17778 | (source_reg << 3);
17779
17780 return patched_inst;
17781 }
17782
17783 static inline bfd_vma
17784 create_instruction_sub (int target_reg, int source_reg, int value)
17785 {
17786 /* A8.8.221 SUB (immediate) (A8-708)
17787 SUB Rd, Rn, #value (Encoding T3). */
17788 bfd_vma patched_inst = 0xf1a00000
17789 | (target_reg << 8)
17790 | (source_reg << 16)
17791 | (/*S=*/0 << 20)
17792 | ((value & 0x800) >> 11) << 26
17793 | ((value & 0x700) >> 8) << 12
17794 | (value & 0x0ff);
17795
17796 return patched_inst;
17797 }
17798
17799 static inline bfd_vma
17800 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17801 int first_reg)
17802 {
17803 /* A8.8.332 VLDM (A8-922)
17804 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17805 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17806 | (/*W=*/wback << 21)
17807 | (base_reg << 16)
17808 | (num_words & 0x000000ff)
17809 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17810 | (first_reg & 0x00000001) << 22;
17811
17812 return patched_inst;
17813 }
17814
17815 static inline bfd_vma
17816 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17817 int first_reg)
17818 {
17819 /* A8.8.332 VLDM (A8-922)
17820 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17821 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17822 | (base_reg << 16)
17823 | (num_words & 0x000000ff)
17824 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17825 | (first_reg & 0x00000001) << 22;
17826
17827 return patched_inst;
17828 }
17829
17830 static inline bfd_vma
17831 create_instruction_udf_w (int value)
17832 {
17833 /* A8.8.247 UDF (A8-758)
17834 Undefined (Encoding T2). */
17835 bfd_vma patched_inst = 0xf7f0a000
17836 | (value & 0x00000fff)
17837 | (value & 0x000f0000) << 16;
17838
17839 return patched_inst;
17840 }
17841
17842 static inline bfd_vma
17843 create_instruction_udf (int value)
17844 {
17845 /* A8.8.247 UDF (A8-758)
17846 Undefined (Encoding T1). */
17847 bfd_vma patched_inst = 0xde00
17848 | (value & 0xff);
17849
17850 return patched_inst;
17851 }
17852
17853 /* Functions writing an instruction in memory, returning the next
17854 memory position to write to. */
17855
17856 static inline bfd_byte *
17857 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17858 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17859 {
17860 put_thumb2_insn (htab, output_bfd, insn, pt);
17861 return pt + 4;
17862 }
17863
17864 static inline bfd_byte *
17865 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17866 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17867 {
17868 put_thumb_insn (htab, output_bfd, insn, pt);
17869 return pt + 2;
17870 }
17871
17872 /* Function filling up a region in memory with T1 and T2 UDFs taking
17873 care of alignment. */
17874
17875 static bfd_byte *
17876 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17877 bfd * output_bfd,
17878 const bfd_byte * const base_stub_contents,
17879 bfd_byte * const from_stub_contents,
17880 const bfd_byte * const end_stub_contents)
17881 {
17882 bfd_byte *current_stub_contents = from_stub_contents;
17883
17884 /* Fill the remaining of the stub with deterministic contents : UDF
17885 instructions.
17886 Check if realignment is needed on modulo 4 frontier using T1, to
17887 further use T2. */
17888 if ((current_stub_contents < end_stub_contents)
17889 && !((current_stub_contents - base_stub_contents) % 2)
17890 && ((current_stub_contents - base_stub_contents) % 4))
17891 current_stub_contents =
17892 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17893 create_instruction_udf (0));
17894
17895 for (; current_stub_contents < end_stub_contents;)
17896 current_stub_contents =
17897 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17898 create_instruction_udf_w (0));
17899
17900 return current_stub_contents;
17901 }
17902
17903 /* Functions writing the stream of instructions equivalent to the
17904 derived sequence for ldmia, ldmdb, vldm respectively. */
17905
17906 static void
17907 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17908 bfd * output_bfd,
17909 const insn32 initial_insn,
17910 const bfd_byte *const initial_insn_addr,
17911 bfd_byte *const base_stub_contents)
17912 {
17913 int wback = (initial_insn & 0x00200000) >> 21;
17914 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17915 int insn_all_registers = initial_insn & 0x0000ffff;
17916 int insn_low_registers, insn_high_registers;
17917 int usable_register_mask;
17918 int nb_registers = popcount (insn_all_registers);
17919 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17920 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17921 bfd_byte *current_stub_contents = base_stub_contents;
17922
17923 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17924
17925 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17926 smaller than 8 registers load sequences that do not cause the
17927 hardware issue. */
17928 if (nb_registers <= 8)
17929 {
17930 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17931 current_stub_contents =
17932 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17933 initial_insn);
17934
17935 /* B initial_insn_addr+4. */
17936 if (!restore_pc)
17937 current_stub_contents =
17938 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17939 create_instruction_branch_absolute
17940 (initial_insn_addr - current_stub_contents));
17941
17942 /* Fill the remaining of the stub with deterministic contents. */
17943 current_stub_contents =
17944 stm32l4xx_fill_stub_udf (htab, output_bfd,
17945 base_stub_contents, current_stub_contents,
17946 base_stub_contents +
17947 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17948
17949 return;
17950 }
17951
17952 /* - reg_list[13] == 0. */
17953 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17954
17955 /* - reg_list[14] & reg_list[15] != 1. */
17956 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17957
17958 /* - if (wback==1) reg_list[rn] == 0. */
17959 BFD_ASSERT (!wback || !restore_rn);
17960
17961 /* - nb_registers > 8. */
17962 BFD_ASSERT (popcount (insn_all_registers) > 8);
17963
17964 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17965
17966 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17967 - One with the 7 lowest registers (register mask 0x007F)
17968 This LDM will finally contain between 2 and 7 registers
17969 - One with the 7 highest registers (register mask 0xDF80)
17970 This ldm will finally contain between 2 and 7 registers. */
17971 insn_low_registers = insn_all_registers & 0x007F;
17972 insn_high_registers = insn_all_registers & 0xDF80;
17973
17974 /* A spare register may be needed during this veneer to temporarily
17975 handle the base register. This register will be restored with the
17976 last LDM operation.
17977 The usable register may be any general purpose register (that
17978 excludes PC, SP, LR : register mask is 0x1FFF). */
17979 usable_register_mask = 0x1FFF;
17980
17981 /* Generate the stub function. */
17982 if (wback)
17983 {
17984 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17985 current_stub_contents =
17986 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17987 create_instruction_ldmia
17988 (rn, /*wback=*/1, insn_low_registers));
17989
17990 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17991 current_stub_contents =
17992 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17993 create_instruction_ldmia
17994 (rn, /*wback=*/1, insn_high_registers));
17995 if (!restore_pc)
17996 {
17997 /* B initial_insn_addr+4. */
17998 current_stub_contents =
17999 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18000 create_instruction_branch_absolute
18001 (initial_insn_addr - current_stub_contents));
18002 }
18003 }
18004 else /* if (!wback). */
18005 {
18006 ri = rn;
18007
18008 /* If Rn is not part of the high-register-list, move it there. */
18009 if (!(insn_high_registers & (1 << rn)))
18010 {
18011 /* Choose a Ri in the high-register-list that will be restored. */
18012 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18013
18014 /* MOV Ri, Rn. */
18015 current_stub_contents =
18016 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18017 create_instruction_mov (ri, rn));
18018 }
18019
18020 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18021 current_stub_contents =
18022 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18023 create_instruction_ldmia
18024 (ri, /*wback=*/1, insn_low_registers));
18025
18026 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18027 current_stub_contents =
18028 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18029 create_instruction_ldmia
18030 (ri, /*wback=*/0, insn_high_registers));
18031
18032 if (!restore_pc)
18033 {
18034 /* B initial_insn_addr+4. */
18035 current_stub_contents =
18036 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18037 create_instruction_branch_absolute
18038 (initial_insn_addr - current_stub_contents));
18039 }
18040 }
18041
18042 /* Fill the remaining of the stub with deterministic contents. */
18043 current_stub_contents =
18044 stm32l4xx_fill_stub_udf (htab, output_bfd,
18045 base_stub_contents, current_stub_contents,
18046 base_stub_contents +
18047 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18048 }
18049
18050 static void
18051 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18052 bfd * output_bfd,
18053 const insn32 initial_insn,
18054 const bfd_byte *const initial_insn_addr,
18055 bfd_byte *const base_stub_contents)
18056 {
18057 int wback = (initial_insn & 0x00200000) >> 21;
18058 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18059 int insn_all_registers = initial_insn & 0x0000ffff;
18060 int insn_low_registers, insn_high_registers;
18061 int usable_register_mask;
18062 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18063 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18064 int nb_registers = popcount (insn_all_registers);
18065 bfd_byte *current_stub_contents = base_stub_contents;
18066
18067 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18068
18069 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18070 smaller than 8 registers load sequences that do not cause the
18071 hardware issue. */
18072 if (nb_registers <= 8)
18073 {
18074 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18075 current_stub_contents =
18076 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18077 initial_insn);
18078
18079 /* B initial_insn_addr+4. */
18080 current_stub_contents =
18081 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18082 create_instruction_branch_absolute
18083 (initial_insn_addr - current_stub_contents));
18084
18085 /* Fill the remaining of the stub with deterministic contents. */
18086 current_stub_contents =
18087 stm32l4xx_fill_stub_udf (htab, output_bfd,
18088 base_stub_contents, current_stub_contents,
18089 base_stub_contents +
18090 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18091
18092 return;
18093 }
18094
18095 /* - reg_list[13] == 0. */
18096 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18097
18098 /* - reg_list[14] & reg_list[15] != 1. */
18099 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18100
18101 /* - if (wback==1) reg_list[rn] == 0. */
18102 BFD_ASSERT (!wback || !restore_rn);
18103
18104 /* - nb_registers > 8. */
18105 BFD_ASSERT (popcount (insn_all_registers) > 8);
18106
18107 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18108
18109 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18110 - One with the 7 lowest registers (register mask 0x007F)
18111 This LDM will finally contain between 2 and 7 registers
18112 - One with the 7 highest registers (register mask 0xDF80)
18113 This ldm will finally contain between 2 and 7 registers. */
18114 insn_low_registers = insn_all_registers & 0x007F;
18115 insn_high_registers = insn_all_registers & 0xDF80;
18116
18117 /* A spare register may be needed during this veneer to temporarily
18118 handle the base register. This register will be restored with
18119 the last LDM operation.
18120 The usable register may be any general purpose register (that excludes
18121 PC, SP, LR : register mask is 0x1FFF). */
18122 usable_register_mask = 0x1FFF;
18123
18124 /* Generate the stub function. */
18125 if (!wback && !restore_pc && !restore_rn)
18126 {
18127 /* Choose a Ri in the low-register-list that will be restored. */
18128 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18129
18130 /* MOV Ri, Rn. */
18131 current_stub_contents =
18132 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18133 create_instruction_mov (ri, rn));
18134
18135 /* LDMDB Ri!, {R-high-register-list}. */
18136 current_stub_contents =
18137 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18138 create_instruction_ldmdb
18139 (ri, /*wback=*/1, insn_high_registers));
18140
18141 /* LDMDB Ri, {R-low-register-list}. */
18142 current_stub_contents =
18143 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18144 create_instruction_ldmdb
18145 (ri, /*wback=*/0, insn_low_registers));
18146
18147 /* B initial_insn_addr+4. */
18148 current_stub_contents =
18149 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18150 create_instruction_branch_absolute
18151 (initial_insn_addr - current_stub_contents));
18152 }
18153 else if (wback && !restore_pc && !restore_rn)
18154 {
18155 /* LDMDB Rn!, {R-high-register-list}. */
18156 current_stub_contents =
18157 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18158 create_instruction_ldmdb
18159 (rn, /*wback=*/1, insn_high_registers));
18160
18161 /* LDMDB Rn!, {R-low-register-list}. */
18162 current_stub_contents =
18163 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18164 create_instruction_ldmdb
18165 (rn, /*wback=*/1, insn_low_registers));
18166
18167 /* B initial_insn_addr+4. */
18168 current_stub_contents =
18169 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18170 create_instruction_branch_absolute
18171 (initial_insn_addr - current_stub_contents));
18172 }
18173 else if (!wback && restore_pc && !restore_rn)
18174 {
18175 /* Choose a Ri in the high-register-list that will be restored. */
18176 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18177
18178 /* SUB Ri, Rn, #(4*nb_registers). */
18179 current_stub_contents =
18180 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18181 create_instruction_sub (ri, rn, (4 * nb_registers)));
18182
18183 /* LDMIA Ri!, {R-low-register-list}. */
18184 current_stub_contents =
18185 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18186 create_instruction_ldmia
18187 (ri, /*wback=*/1, insn_low_registers));
18188
18189 /* LDMIA Ri, {R-high-register-list}. */
18190 current_stub_contents =
18191 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18192 create_instruction_ldmia
18193 (ri, /*wback=*/0, insn_high_registers));
18194 }
18195 else if (wback && restore_pc && !restore_rn)
18196 {
18197 /* Choose a Ri in the high-register-list that will be restored. */
18198 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18199
18200 /* SUB Rn, Rn, #(4*nb_registers) */
18201 current_stub_contents =
18202 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18203 create_instruction_sub (rn, rn, (4 * nb_registers)));
18204
18205 /* MOV Ri, Rn. */
18206 current_stub_contents =
18207 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18208 create_instruction_mov (ri, rn));
18209
18210 /* LDMIA Ri!, {R-low-register-list}. */
18211 current_stub_contents =
18212 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18213 create_instruction_ldmia
18214 (ri, /*wback=*/1, insn_low_registers));
18215
18216 /* LDMIA Ri, {R-high-register-list}. */
18217 current_stub_contents =
18218 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18219 create_instruction_ldmia
18220 (ri, /*wback=*/0, insn_high_registers));
18221 }
18222 else if (!wback && !restore_pc && restore_rn)
18223 {
18224 ri = rn;
18225 if (!(insn_low_registers & (1 << rn)))
18226 {
18227 /* Choose a Ri in the low-register-list that will be restored. */
18228 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18229
18230 /* MOV Ri, Rn. */
18231 current_stub_contents =
18232 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18233 create_instruction_mov (ri, rn));
18234 }
18235
18236 /* LDMDB Ri!, {R-high-register-list}. */
18237 current_stub_contents =
18238 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18239 create_instruction_ldmdb
18240 (ri, /*wback=*/1, insn_high_registers));
18241
18242 /* LDMDB Ri, {R-low-register-list}. */
18243 current_stub_contents =
18244 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18245 create_instruction_ldmdb
18246 (ri, /*wback=*/0, insn_low_registers));
18247
18248 /* B initial_insn_addr+4. */
18249 current_stub_contents =
18250 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18251 create_instruction_branch_absolute
18252 (initial_insn_addr - current_stub_contents));
18253 }
18254 else if (!wback && restore_pc && restore_rn)
18255 {
18256 ri = rn;
18257 if (!(insn_high_registers & (1 << rn)))
18258 {
18259 /* Choose a Ri in the high-register-list that will be restored. */
18260 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18261 }
18262
18263 /* SUB Ri, Rn, #(4*nb_registers). */
18264 current_stub_contents =
18265 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18266 create_instruction_sub (ri, rn, (4 * nb_registers)));
18267
18268 /* LDMIA Ri!, {R-low-register-list}. */
18269 current_stub_contents =
18270 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18271 create_instruction_ldmia
18272 (ri, /*wback=*/1, insn_low_registers));
18273
18274 /* LDMIA Ri, {R-high-register-list}. */
18275 current_stub_contents =
18276 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18277 create_instruction_ldmia
18278 (ri, /*wback=*/0, insn_high_registers));
18279 }
18280 else if (wback && restore_rn)
18281 {
18282 /* The assembler should not have accepted to encode this. */
18283 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18284 "undefined behavior.\n");
18285 }
18286
18287 /* Fill the remaining of the stub with deterministic contents. */
18288 current_stub_contents =
18289 stm32l4xx_fill_stub_udf (htab, output_bfd,
18290 base_stub_contents, current_stub_contents,
18291 base_stub_contents +
18292 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18293
18294 }
18295
18296 static void
18297 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18298 bfd * output_bfd,
18299 const insn32 initial_insn,
18300 const bfd_byte *const initial_insn_addr,
18301 bfd_byte *const base_stub_contents)
18302 {
18303 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18304 bfd_byte *current_stub_contents = base_stub_contents;
18305
18306 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18307
18308 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18309 smaller than 8 words load sequences that do not cause the
18310 hardware issue. */
18311 if (num_words <= 8)
18312 {
18313 /* Untouched instruction. */
18314 current_stub_contents =
18315 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18316 initial_insn);
18317
18318 /* B initial_insn_addr+4. */
18319 current_stub_contents =
18320 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18321 create_instruction_branch_absolute
18322 (initial_insn_addr - current_stub_contents));
18323 }
18324 else
18325 {
18326 bfd_boolean is_dp = /* DP encoding. */
18327 (initial_insn & 0xfe100f00) == 0xec100b00;
18328 bfd_boolean is_ia_nobang = /* (IA without !). */
18329 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18330 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18331 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18332 bfd_boolean is_db_bang = /* (DB with !). */
18333 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18334 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18335 /* d = UInt (Vd:D);. */
18336 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18337 | (((unsigned int)initial_insn << 9) >> 31);
18338
18339 /* Compute the number of 8-words chunks needed to split. */
18340 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18341 int chunk;
18342
18343 /* The test coverage has been done assuming the following
18344 hypothesis that exactly one of the previous is_ predicates is
18345 true. */
18346 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18347 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18348
18349 /* We treat the cutting of the words in one pass for all
18350 cases, then we emit the adjustments:
18351
18352 vldm rx, {...}
18353 -> vldm rx!, {8_words_or_less} for each needed 8_word
18354 -> sub rx, rx, #size (list)
18355
18356 vldm rx!, {...}
18357 -> vldm rx!, {8_words_or_less} for each needed 8_word
18358 This also handles vpop instruction (when rx is sp)
18359
18360 vldmd rx!, {...}
18361 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18362 for (chunk = 0; chunk < chunks; ++chunk)
18363 {
18364 bfd_vma new_insn = 0;
18365
18366 if (is_ia_nobang || is_ia_bang)
18367 {
18368 new_insn = create_instruction_vldmia
18369 (base_reg,
18370 is_dp,
18371 /*wback= . */1,
18372 chunks - (chunk + 1) ?
18373 8 : num_words - chunk * 8,
18374 first_reg + chunk * 8);
18375 }
18376 else if (is_db_bang)
18377 {
18378 new_insn = create_instruction_vldmdb
18379 (base_reg,
18380 is_dp,
18381 chunks - (chunk + 1) ?
18382 8 : num_words - chunk * 8,
18383 first_reg + chunk * 8);
18384 }
18385
18386 if (new_insn)
18387 current_stub_contents =
18388 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18389 new_insn);
18390 }
18391
18392 /* Only this case requires the base register compensation
18393 subtract. */
18394 if (is_ia_nobang)
18395 {
18396 current_stub_contents =
18397 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18398 create_instruction_sub
18399 (base_reg, base_reg, 4*num_words));
18400 }
18401
18402 /* B initial_insn_addr+4. */
18403 current_stub_contents =
18404 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18405 create_instruction_branch_absolute
18406 (initial_insn_addr - current_stub_contents));
18407 }
18408
18409 /* Fill the remaining of the stub with deterministic contents. */
18410 current_stub_contents =
18411 stm32l4xx_fill_stub_udf (htab, output_bfd,
18412 base_stub_contents, current_stub_contents,
18413 base_stub_contents +
18414 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18415 }
18416
18417 static void
18418 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18419 bfd * output_bfd,
18420 const insn32 wrong_insn,
18421 const bfd_byte *const wrong_insn_addr,
18422 bfd_byte *const stub_contents)
18423 {
18424 if (is_thumb2_ldmia (wrong_insn))
18425 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18426 wrong_insn, wrong_insn_addr,
18427 stub_contents);
18428 else if (is_thumb2_ldmdb (wrong_insn))
18429 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18430 wrong_insn, wrong_insn_addr,
18431 stub_contents);
18432 else if (is_thumb2_vldm (wrong_insn))
18433 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18434 wrong_insn, wrong_insn_addr,
18435 stub_contents);
18436 }
18437
18438 /* End of stm32l4xx work-around. */
18439
18440
18441 /* Do code byteswapping. Return FALSE afterwards so that the section is
18442 written out as normal. */
18443
18444 static bfd_boolean
18445 elf32_arm_write_section (bfd *output_bfd,
18446 struct bfd_link_info *link_info,
18447 asection *sec,
18448 bfd_byte *contents)
18449 {
18450 unsigned int mapcount, errcount;
18451 _arm_elf_section_data *arm_data;
18452 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18453 elf32_arm_section_map *map;
18454 elf32_vfp11_erratum_list *errnode;
18455 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18456 bfd_vma ptr;
18457 bfd_vma end;
18458 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18459 bfd_byte tmp;
18460 unsigned int i;
18461
18462 if (globals == NULL)
18463 return FALSE;
18464
18465 /* If this section has not been allocated an _arm_elf_section_data
18466 structure then we cannot record anything. */
18467 arm_data = get_arm_elf_section_data (sec);
18468 if (arm_data == NULL)
18469 return FALSE;
18470
18471 mapcount = arm_data->mapcount;
18472 map = arm_data->map;
18473 errcount = arm_data->erratumcount;
18474
18475 if (errcount != 0)
18476 {
18477 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18478
18479 for (errnode = arm_data->erratumlist; errnode != 0;
18480 errnode = errnode->next)
18481 {
18482 bfd_vma target = errnode->vma - offset;
18483
18484 switch (errnode->type)
18485 {
18486 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18487 {
18488 bfd_vma branch_to_veneer;
18489 /* Original condition code of instruction, plus bit mask for
18490 ARM B instruction. */
18491 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18492 | 0x0a000000;
18493
18494 /* The instruction is before the label. */
18495 target -= 4;
18496
18497 /* Above offset included in -4 below. */
18498 branch_to_veneer = errnode->u.b.veneer->vma
18499 - errnode->vma - 4;
18500
18501 if ((signed) branch_to_veneer < -(1 << 25)
18502 || (signed) branch_to_veneer >= (1 << 25))
18503 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
18504 "range"), output_bfd);
18505
18506 insn |= (branch_to_veneer >> 2) & 0xffffff;
18507 contents[endianflip ^ target] = insn & 0xff;
18508 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18509 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18510 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18511 }
18512 break;
18513
18514 case VFP11_ERRATUM_ARM_VENEER:
18515 {
18516 bfd_vma branch_from_veneer;
18517 unsigned int insn;
18518
18519 /* Take size of veneer into account. */
18520 branch_from_veneer = errnode->u.v.branch->vma
18521 - errnode->vma - 12;
18522
18523 if ((signed) branch_from_veneer < -(1 << 25)
18524 || (signed) branch_from_veneer >= (1 << 25))
18525 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
18526 "range"), output_bfd);
18527
18528 /* Original instruction. */
18529 insn = errnode->u.v.branch->u.b.vfp_insn;
18530 contents[endianflip ^ target] = insn & 0xff;
18531 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18532 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18533 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18534
18535 /* Branch back to insn after original insn. */
18536 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18537 contents[endianflip ^ (target + 4)] = insn & 0xff;
18538 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18539 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18540 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18541 }
18542 break;
18543
18544 default:
18545 abort ();
18546 }
18547 }
18548 }
18549
18550 if (arm_data->stm32l4xx_erratumcount != 0)
18551 {
18552 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18553 stm32l4xx_errnode != 0;
18554 stm32l4xx_errnode = stm32l4xx_errnode->next)
18555 {
18556 bfd_vma target = stm32l4xx_errnode->vma - offset;
18557
18558 switch (stm32l4xx_errnode->type)
18559 {
18560 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18561 {
18562 unsigned int insn;
18563 bfd_vma branch_to_veneer =
18564 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18565
18566 if ((signed) branch_to_veneer < -(1 << 24)
18567 || (signed) branch_to_veneer >= (1 << 24))
18568 {
18569 bfd_vma out_of_range =
18570 ((signed) branch_to_veneer < -(1 << 24)) ?
18571 - branch_to_veneer - (1 << 24) :
18572 ((signed) branch_to_veneer >= (1 << 24)) ?
18573 branch_to_veneer - (1 << 24) : 0;
18574
18575 (*_bfd_error_handler)
18576 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
18577 "Jump out of range by %ld bytes. "
18578 "Cannot encode branch instruction. "),
18579 output_bfd,
18580 (long) (stm32l4xx_errnode->vma - 4),
18581 out_of_range);
18582 continue;
18583 }
18584
18585 insn = create_instruction_branch_absolute
18586 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18587
18588 /* The instruction is before the label. */
18589 target -= 4;
18590
18591 put_thumb2_insn (globals, output_bfd,
18592 (bfd_vma) insn, contents + target);
18593 }
18594 break;
18595
18596 case STM32L4XX_ERRATUM_VENEER:
18597 {
18598 bfd_byte * veneer;
18599 bfd_byte * veneer_r;
18600 unsigned int insn;
18601
18602 veneer = contents + target;
18603 veneer_r = veneer
18604 + stm32l4xx_errnode->u.b.veneer->vma
18605 - stm32l4xx_errnode->vma - 4;
18606
18607 if ((signed) (veneer_r - veneer -
18608 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18609 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18610 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18611 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18612 || (signed) (veneer_r - veneer) >= (1 << 24))
18613 {
18614 (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX "
18615 "veneer."), output_bfd);
18616 continue;
18617 }
18618
18619 /* Original instruction. */
18620 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18621
18622 stm32l4xx_create_replacing_stub
18623 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18624 }
18625 break;
18626
18627 default:
18628 abort ();
18629 }
18630 }
18631 }
18632
18633 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18634 {
18635 arm_unwind_table_edit *edit_node
18636 = arm_data->u.exidx.unwind_edit_list;
18637 /* Now, sec->size is the size of the section we will write. The original
18638 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18639 markers) was sec->rawsize. (This isn't the case if we perform no
18640 edits, then rawsize will be zero and we should use size). */
18641 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18642 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18643 unsigned int in_index, out_index;
18644 bfd_vma add_to_offsets = 0;
18645
18646 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18647 {
18648 if (edit_node)
18649 {
18650 unsigned int edit_index = edit_node->index;
18651
18652 if (in_index < edit_index && in_index * 8 < input_size)
18653 {
18654 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18655 contents + in_index * 8, add_to_offsets);
18656 out_index++;
18657 in_index++;
18658 }
18659 else if (in_index == edit_index
18660 || (in_index * 8 >= input_size
18661 && edit_index == UINT_MAX))
18662 {
18663 switch (edit_node->type)
18664 {
18665 case DELETE_EXIDX_ENTRY:
18666 in_index++;
18667 add_to_offsets += 8;
18668 break;
18669
18670 case INSERT_EXIDX_CANTUNWIND_AT_END:
18671 {
18672 asection *text_sec = edit_node->linked_section;
18673 bfd_vma text_offset = text_sec->output_section->vma
18674 + text_sec->output_offset
18675 + text_sec->size;
18676 bfd_vma exidx_offset = offset + out_index * 8;
18677 unsigned long prel31_offset;
18678
18679 /* Note: this is meant to be equivalent to an
18680 R_ARM_PREL31 relocation. These synthetic
18681 EXIDX_CANTUNWIND markers are not relocated by the
18682 usual BFD method. */
18683 prel31_offset = (text_offset - exidx_offset)
18684 & 0x7ffffffful;
18685 if (bfd_link_relocatable (link_info))
18686 {
18687 /* Here relocation for new EXIDX_CANTUNWIND is
18688 created, so there is no need to
18689 adjust offset by hand. */
18690 prel31_offset = text_sec->output_offset
18691 + text_sec->size;
18692 }
18693
18694 /* First address we can't unwind. */
18695 bfd_put_32 (output_bfd, prel31_offset,
18696 &edited_contents[out_index * 8]);
18697
18698 /* Code for EXIDX_CANTUNWIND. */
18699 bfd_put_32 (output_bfd, 0x1,
18700 &edited_contents[out_index * 8 + 4]);
18701
18702 out_index++;
18703 add_to_offsets -= 8;
18704 }
18705 break;
18706 }
18707
18708 edit_node = edit_node->next;
18709 }
18710 }
18711 else
18712 {
18713 /* No more edits, copy remaining entries verbatim. */
18714 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18715 contents + in_index * 8, add_to_offsets);
18716 out_index++;
18717 in_index++;
18718 }
18719 }
18720
18721 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18722 bfd_set_section_contents (output_bfd, sec->output_section,
18723 edited_contents,
18724 (file_ptr) sec->output_offset, sec->size);
18725
18726 return TRUE;
18727 }
18728
18729 /* Fix code to point to Cortex-A8 erratum stubs. */
18730 if (globals->fix_cortex_a8)
18731 {
18732 struct a8_branch_to_stub_data data;
18733
18734 data.writing_section = sec;
18735 data.contents = contents;
18736
18737 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18738 & data);
18739 }
18740
18741 if (mapcount == 0)
18742 return FALSE;
18743
18744 if (globals->byteswap_code)
18745 {
18746 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18747
18748 ptr = map[0].vma;
18749 for (i = 0; i < mapcount; i++)
18750 {
18751 if (i == mapcount - 1)
18752 end = sec->size;
18753 else
18754 end = map[i + 1].vma;
18755
18756 switch (map[i].type)
18757 {
18758 case 'a':
18759 /* Byte swap code words. */
18760 while (ptr + 3 < end)
18761 {
18762 tmp = contents[ptr];
18763 contents[ptr] = contents[ptr + 3];
18764 contents[ptr + 3] = tmp;
18765 tmp = contents[ptr + 1];
18766 contents[ptr + 1] = contents[ptr + 2];
18767 contents[ptr + 2] = tmp;
18768 ptr += 4;
18769 }
18770 break;
18771
18772 case 't':
18773 /* Byte swap code halfwords. */
18774 while (ptr + 1 < end)
18775 {
18776 tmp = contents[ptr];
18777 contents[ptr] = contents[ptr + 1];
18778 contents[ptr + 1] = tmp;
18779 ptr += 2;
18780 }
18781 break;
18782
18783 case 'd':
18784 /* Leave data alone. */
18785 break;
18786 }
18787 ptr = end;
18788 }
18789 }
18790
18791 free (map);
18792 arm_data->mapcount = -1;
18793 arm_data->mapsize = 0;
18794 arm_data->map = NULL;
18795
18796 return FALSE;
18797 }
18798
18799 /* Mangle thumb function symbols as we read them in. */
18800
18801 static bfd_boolean
18802 elf32_arm_swap_symbol_in (bfd * abfd,
18803 const void *psrc,
18804 const void *pshn,
18805 Elf_Internal_Sym *dst)
18806 {
18807 Elf_Internal_Shdr *symtab_hdr;
18808 const char *name = NULL;
18809
18810 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18811 return FALSE;
18812 dst->st_target_internal = 0;
18813
18814 /* New EABI objects mark thumb function symbols by setting the low bit of
18815 the address. */
18816 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18817 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18818 {
18819 if (dst->st_value & 1)
18820 {
18821 dst->st_value &= ~(bfd_vma) 1;
18822 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18823 ST_BRANCH_TO_THUMB);
18824 }
18825 else
18826 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18827 }
18828 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18829 {
18830 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18831 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18832 }
18833 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18834 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18835 else
18836 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18837
18838 /* Mark CMSE special symbols. */
18839 symtab_hdr = & elf_symtab_hdr (abfd);
18840 if (symtab_hdr->sh_size)
18841 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18842 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18843 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18844
18845 return TRUE;
18846 }
18847
18848
18849 /* Mangle thumb function symbols as we write them out. */
18850
18851 static void
18852 elf32_arm_swap_symbol_out (bfd *abfd,
18853 const Elf_Internal_Sym *src,
18854 void *cdst,
18855 void *shndx)
18856 {
18857 Elf_Internal_Sym newsym;
18858
18859 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18860 of the address set, as per the new EABI. We do this unconditionally
18861 because objcopy does not set the elf header flags until after
18862 it writes out the symbol table. */
18863 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18864 {
18865 newsym = *src;
18866 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18867 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18868 if (newsym.st_shndx != SHN_UNDEF)
18869 {
18870 /* Do this only for defined symbols. At link type, the static
18871 linker will simulate the work of dynamic linker of resolving
18872 symbols and will carry over the thumbness of found symbols to
18873 the output symbol table. It's not clear how it happens, but
18874 the thumbness of undefined symbols can well be different at
18875 runtime, and writing '1' for them will be confusing for users
18876 and possibly for dynamic linker itself.
18877 */
18878 newsym.st_value |= 1;
18879 }
18880
18881 src = &newsym;
18882 }
18883 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18884 }
18885
18886 /* Add the PT_ARM_EXIDX program header. */
18887
18888 static bfd_boolean
18889 elf32_arm_modify_segment_map (bfd *abfd,
18890 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18891 {
18892 struct elf_segment_map *m;
18893 asection *sec;
18894
18895 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18896 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18897 {
18898 /* If there is already a PT_ARM_EXIDX header, then we do not
18899 want to add another one. This situation arises when running
18900 "strip"; the input binary already has the header. */
18901 m = elf_seg_map (abfd);
18902 while (m && m->p_type != PT_ARM_EXIDX)
18903 m = m->next;
18904 if (!m)
18905 {
18906 m = (struct elf_segment_map *)
18907 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18908 if (m == NULL)
18909 return FALSE;
18910 m->p_type = PT_ARM_EXIDX;
18911 m->count = 1;
18912 m->sections[0] = sec;
18913
18914 m->next = elf_seg_map (abfd);
18915 elf_seg_map (abfd) = m;
18916 }
18917 }
18918
18919 return TRUE;
18920 }
18921
18922 /* We may add a PT_ARM_EXIDX program header. */
18923
18924 static int
18925 elf32_arm_additional_program_headers (bfd *abfd,
18926 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18927 {
18928 asection *sec;
18929
18930 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18931 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18932 return 1;
18933 else
18934 return 0;
18935 }
18936
18937 /* Hook called by the linker routine which adds symbols from an object
18938 file. */
18939
18940 static bfd_boolean
18941 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18942 Elf_Internal_Sym *sym, const char **namep,
18943 flagword *flagsp, asection **secp, bfd_vma *valp)
18944 {
18945 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18946 && (abfd->flags & DYNAMIC) == 0
18947 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18948 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18949
18950 if (elf32_arm_hash_table (info) == NULL)
18951 return FALSE;
18952
18953 if (elf32_arm_hash_table (info)->vxworks_p
18954 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18955 flagsp, secp, valp))
18956 return FALSE;
18957
18958 return TRUE;
18959 }
18960
18961 /* We use this to override swap_symbol_in and swap_symbol_out. */
18962 const struct elf_size_info elf32_arm_size_info =
18963 {
18964 sizeof (Elf32_External_Ehdr),
18965 sizeof (Elf32_External_Phdr),
18966 sizeof (Elf32_External_Shdr),
18967 sizeof (Elf32_External_Rel),
18968 sizeof (Elf32_External_Rela),
18969 sizeof (Elf32_External_Sym),
18970 sizeof (Elf32_External_Dyn),
18971 sizeof (Elf_External_Note),
18972 4,
18973 1,
18974 32, 2,
18975 ELFCLASS32, EV_CURRENT,
18976 bfd_elf32_write_out_phdrs,
18977 bfd_elf32_write_shdrs_and_ehdr,
18978 bfd_elf32_checksum_contents,
18979 bfd_elf32_write_relocs,
18980 elf32_arm_swap_symbol_in,
18981 elf32_arm_swap_symbol_out,
18982 bfd_elf32_slurp_reloc_table,
18983 bfd_elf32_slurp_symbol_table,
18984 bfd_elf32_swap_dyn_in,
18985 bfd_elf32_swap_dyn_out,
18986 bfd_elf32_swap_reloc_in,
18987 bfd_elf32_swap_reloc_out,
18988 bfd_elf32_swap_reloca_in,
18989 bfd_elf32_swap_reloca_out
18990 };
18991
18992 static bfd_vma
18993 read_code32 (const bfd *abfd, const bfd_byte *addr)
18994 {
18995 /* V7 BE8 code is always little endian. */
18996 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18997 return bfd_getl32 (addr);
18998
18999 return bfd_get_32 (abfd, addr);
19000 }
19001
19002 static bfd_vma
19003 read_code16 (const bfd *abfd, const bfd_byte *addr)
19004 {
19005 /* V7 BE8 code is always little endian. */
19006 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19007 return bfd_getl16 (addr);
19008
19009 return bfd_get_16 (abfd, addr);
19010 }
19011
19012 /* Return size of plt0 entry starting at ADDR
19013 or (bfd_vma) -1 if size can not be determined. */
19014
19015 static bfd_vma
19016 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19017 {
19018 bfd_vma first_word;
19019 bfd_vma plt0_size;
19020
19021 first_word = read_code32 (abfd, addr);
19022
19023 if (first_word == elf32_arm_plt0_entry[0])
19024 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19025 else if (first_word == elf32_thumb2_plt0_entry[0])
19026 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19027 else
19028 /* We don't yet handle this PLT format. */
19029 return (bfd_vma) -1;
19030
19031 return plt0_size;
19032 }
19033
19034 /* Return size of plt entry starting at offset OFFSET
19035 of plt section located at address START
19036 or (bfd_vma) -1 if size can not be determined. */
19037
19038 static bfd_vma
19039 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19040 {
19041 bfd_vma first_insn;
19042 bfd_vma plt_size = 0;
19043 const bfd_byte *addr = start + offset;
19044
19045 /* PLT entry size if fixed on Thumb-only platforms. */
19046 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19047 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19048
19049 /* Respect Thumb stub if necessary. */
19050 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19051 {
19052 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19053 }
19054
19055 /* Strip immediate from first add. */
19056 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19057
19058 #ifdef FOUR_WORD_PLT
19059 if (first_insn == elf32_arm_plt_entry[0])
19060 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19061 #else
19062 if (first_insn == elf32_arm_plt_entry_long[0])
19063 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19064 else if (first_insn == elf32_arm_plt_entry_short[0])
19065 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19066 #endif
19067 else
19068 /* We don't yet handle this PLT format. */
19069 return (bfd_vma) -1;
19070
19071 return plt_size;
19072 }
19073
19074 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19075
19076 static long
19077 elf32_arm_get_synthetic_symtab (bfd *abfd,
19078 long symcount ATTRIBUTE_UNUSED,
19079 asymbol **syms ATTRIBUTE_UNUSED,
19080 long dynsymcount,
19081 asymbol **dynsyms,
19082 asymbol **ret)
19083 {
19084 asection *relplt;
19085 asymbol *s;
19086 arelent *p;
19087 long count, i, n;
19088 size_t size;
19089 Elf_Internal_Shdr *hdr;
19090 char *names;
19091 asection *plt;
19092 bfd_vma offset;
19093 bfd_byte *data;
19094
19095 *ret = NULL;
19096
19097 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19098 return 0;
19099
19100 if (dynsymcount <= 0)
19101 return 0;
19102
19103 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19104 if (relplt == NULL)
19105 return 0;
19106
19107 hdr = &elf_section_data (relplt)->this_hdr;
19108 if (hdr->sh_link != elf_dynsymtab (abfd)
19109 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19110 return 0;
19111
19112 plt = bfd_get_section_by_name (abfd, ".plt");
19113 if (plt == NULL)
19114 return 0;
19115
19116 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19117 return -1;
19118
19119 data = plt->contents;
19120 if (data == NULL)
19121 {
19122 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19123 return -1;
19124 bfd_cache_section_contents((asection *) plt, data);
19125 }
19126
19127 count = relplt->size / hdr->sh_entsize;
19128 size = count * sizeof (asymbol);
19129 p = relplt->relocation;
19130 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19131 {
19132 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19133 if (p->addend != 0)
19134 size += sizeof ("+0x") - 1 + 8;
19135 }
19136
19137 s = *ret = (asymbol *) bfd_malloc (size);
19138 if (s == NULL)
19139 return -1;
19140
19141 offset = elf32_arm_plt0_size (abfd, data);
19142 if (offset == (bfd_vma) -1)
19143 return -1;
19144
19145 names = (char *) (s + count);
19146 p = relplt->relocation;
19147 n = 0;
19148 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19149 {
19150 size_t len;
19151
19152 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19153 if (plt_size == (bfd_vma) -1)
19154 break;
19155
19156 *s = **p->sym_ptr_ptr;
19157 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19158 we are defining a symbol, ensure one of them is set. */
19159 if ((s->flags & BSF_LOCAL) == 0)
19160 s->flags |= BSF_GLOBAL;
19161 s->flags |= BSF_SYNTHETIC;
19162 s->section = plt;
19163 s->value = offset;
19164 s->name = names;
19165 s->udata.p = NULL;
19166 len = strlen ((*p->sym_ptr_ptr)->name);
19167 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19168 names += len;
19169 if (p->addend != 0)
19170 {
19171 char buf[30], *a;
19172
19173 memcpy (names, "+0x", sizeof ("+0x") - 1);
19174 names += sizeof ("+0x") - 1;
19175 bfd_sprintf_vma (abfd, buf, p->addend);
19176 for (a = buf; *a == '0'; ++a)
19177 ;
19178 len = strlen (a);
19179 memcpy (names, a, len);
19180 names += len;
19181 }
19182 memcpy (names, "@plt", sizeof ("@plt"));
19183 names += sizeof ("@plt");
19184 ++s, ++n;
19185 offset += plt_size;
19186 }
19187
19188 return n;
19189 }
19190
19191 static bfd_boolean
19192 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19193 {
19194 if (hdr->sh_flags & SHF_ARM_PURECODE)
19195 *flags |= SEC_ELF_PURECODE;
19196 return TRUE;
19197 }
19198
19199 static flagword
19200 elf32_arm_lookup_section_flags (char *flag_name)
19201 {
19202 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19203 return SHF_ARM_PURECODE;
19204
19205 return SEC_NO_FLAGS;
19206 }
19207
19208 static unsigned int
19209 elf32_arm_count_additional_relocs (asection *sec)
19210 {
19211 struct _arm_elf_section_data *arm_data;
19212 arm_data = get_arm_elf_section_data (sec);
19213
19214 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19215 }
19216
19217 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19218 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19219 FALSE otherwise. ISECTION is the best guess matching section from the
19220 input bfd IBFD, but it might be NULL. */
19221
19222 static bfd_boolean
19223 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19224 bfd *obfd ATTRIBUTE_UNUSED,
19225 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19226 Elf_Internal_Shdr *osection)
19227 {
19228 switch (osection->sh_type)
19229 {
19230 case SHT_ARM_EXIDX:
19231 {
19232 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19233 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19234 unsigned i = 0;
19235
19236 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19237 osection->sh_info = 0;
19238
19239 /* The sh_link field must be set to the text section associated with
19240 this index section. Unfortunately the ARM EHABI does not specify
19241 exactly how to determine this association. Our caller does try
19242 to match up OSECTION with its corresponding input section however
19243 so that is a good first guess. */
19244 if (isection != NULL
19245 && osection->bfd_section != NULL
19246 && isection->bfd_section != NULL
19247 && isection->bfd_section->output_section != NULL
19248 && isection->bfd_section->output_section == osection->bfd_section
19249 && iheaders != NULL
19250 && isection->sh_link > 0
19251 && isection->sh_link < elf_numsections (ibfd)
19252 && iheaders[isection->sh_link]->bfd_section != NULL
19253 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19254 )
19255 {
19256 for (i = elf_numsections (obfd); i-- > 0;)
19257 if (oheaders[i]->bfd_section
19258 == iheaders[isection->sh_link]->bfd_section->output_section)
19259 break;
19260 }
19261
19262 if (i == 0)
19263 {
19264 /* Failing that we have to find a matching section ourselves. If
19265 we had the output section name available we could compare that
19266 with input section names. Unfortunately we don't. So instead
19267 we use a simple heuristic and look for the nearest executable
19268 section before this one. */
19269 for (i = elf_numsections (obfd); i-- > 0;)
19270 if (oheaders[i] == osection)
19271 break;
19272 if (i == 0)
19273 break;
19274
19275 while (i-- > 0)
19276 if (oheaders[i]->sh_type == SHT_PROGBITS
19277 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19278 == (SHF_ALLOC | SHF_EXECINSTR))
19279 break;
19280 }
19281
19282 if (i)
19283 {
19284 osection->sh_link = i;
19285 /* If the text section was part of a group
19286 then the index section should be too. */
19287 if (oheaders[i]->sh_flags & SHF_GROUP)
19288 osection->sh_flags |= SHF_GROUP;
19289 return TRUE;
19290 }
19291 }
19292 break;
19293
19294 case SHT_ARM_PREEMPTMAP:
19295 osection->sh_flags = SHF_ALLOC;
19296 break;
19297
19298 case SHT_ARM_ATTRIBUTES:
19299 case SHT_ARM_DEBUGOVERLAY:
19300 case SHT_ARM_OVERLAYSECTION:
19301 default:
19302 break;
19303 }
19304
19305 return FALSE;
19306 }
19307
19308 /* Returns TRUE if NAME is an ARM mapping symbol.
19309 Traditionally the symbols $a, $d and $t have been used.
19310 The ARM ELF standard also defines $x (for A64 code). It also allows a
19311 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19312 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19313 not support them here. $t.x indicates the start of ThumbEE instructions. */
19314
19315 static bfd_boolean
19316 is_arm_mapping_symbol (const char * name)
19317 {
19318 return name != NULL /* Paranoia. */
19319 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19320 the mapping symbols could have acquired a prefix.
19321 We do not support this here, since such symbols no
19322 longer conform to the ARM ELF ABI. */
19323 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19324 && (name[2] == 0 || name[2] == '.');
19325 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19326 any characters that follow the period are legal characters for the body
19327 of a symbol's name. For now we just assume that this is the case. */
19328 }
19329
19330 /* Make sure that mapping symbols in object files are not removed via the
19331 "strip --strip-unneeded" tool. These symbols are needed in order to
19332 correctly generate interworking veneers, and for byte swapping code
19333 regions. Once an object file has been linked, it is safe to remove the
19334 symbols as they will no longer be needed. */
19335
19336 static void
19337 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19338 {
19339 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19340 && sym->section != bfd_abs_section_ptr
19341 && is_arm_mapping_symbol (sym->name))
19342 sym->flags |= BSF_KEEP;
19343 }
19344
19345 #undef elf_backend_copy_special_section_fields
19346 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19347
19348 #define ELF_ARCH bfd_arch_arm
19349 #define ELF_TARGET_ID ARM_ELF_DATA
19350 #define ELF_MACHINE_CODE EM_ARM
19351 #ifdef __QNXTARGET__
19352 #define ELF_MAXPAGESIZE 0x1000
19353 #else
19354 #define ELF_MAXPAGESIZE 0x10000
19355 #endif
19356 #define ELF_MINPAGESIZE 0x1000
19357 #define ELF_COMMONPAGESIZE 0x1000
19358
19359 #define bfd_elf32_mkobject elf32_arm_mkobject
19360
19361 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19362 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19363 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19364 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19365 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19366 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19367 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19368 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19369 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19370 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19371 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19372 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19373 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19374
19375 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19376 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19377 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19378 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19379 #define elf_backend_check_relocs elf32_arm_check_relocs
19380 #define elf_backend_update_relocs elf32_arm_update_relocs
19381 #define elf_backend_relocate_section elf32_arm_relocate_section
19382 #define elf_backend_write_section elf32_arm_write_section
19383 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19384 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19385 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19386 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19387 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19388 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19389 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19390 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19391 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19392 #define elf_backend_object_p elf32_arm_object_p
19393 #define elf_backend_fake_sections elf32_arm_fake_sections
19394 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19395 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19396 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19397 #define elf_backend_size_info elf32_arm_size_info
19398 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19399 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19400 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19401 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19402 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19403 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19404 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19405 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19406
19407 #define elf_backend_can_refcount 1
19408 #define elf_backend_can_gc_sections 1
19409 #define elf_backend_plt_readonly 1
19410 #define elf_backend_want_got_plt 1
19411 #define elf_backend_want_plt_sym 0
19412 #define elf_backend_may_use_rel_p 1
19413 #define elf_backend_may_use_rela_p 0
19414 #define elf_backend_default_use_rela_p 0
19415
19416 #define elf_backend_got_header_size 12
19417 #define elf_backend_extern_protected_data 1
19418
19419 #undef elf_backend_obj_attrs_vendor
19420 #define elf_backend_obj_attrs_vendor "aeabi"
19421 #undef elf_backend_obj_attrs_section
19422 #define elf_backend_obj_attrs_section ".ARM.attributes"
19423 #undef elf_backend_obj_attrs_arg_type
19424 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19425 #undef elf_backend_obj_attrs_section_type
19426 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19427 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19428 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19429
19430 #undef elf_backend_section_flags
19431 #define elf_backend_section_flags elf32_arm_section_flags
19432 #undef elf_backend_lookup_section_flags_hook
19433 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19434
19435 #include "elf32-target.h"
19436
19437 /* Native Client targets. */
19438
19439 #undef TARGET_LITTLE_SYM
19440 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19441 #undef TARGET_LITTLE_NAME
19442 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19443 #undef TARGET_BIG_SYM
19444 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19445 #undef TARGET_BIG_NAME
19446 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19447
19448 /* Like elf32_arm_link_hash_table_create -- but overrides
19449 appropriately for NaCl. */
19450
19451 static struct bfd_link_hash_table *
19452 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19453 {
19454 struct bfd_link_hash_table *ret;
19455
19456 ret = elf32_arm_link_hash_table_create (abfd);
19457 if (ret)
19458 {
19459 struct elf32_arm_link_hash_table *htab
19460 = (struct elf32_arm_link_hash_table *) ret;
19461
19462 htab->nacl_p = 1;
19463
19464 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19465 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19466 }
19467 return ret;
19468 }
19469
19470 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19471 really need to use elf32_arm_modify_segment_map. But we do it
19472 anyway just to reduce gratuitous differences with the stock ARM backend. */
19473
19474 static bfd_boolean
19475 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19476 {
19477 return (elf32_arm_modify_segment_map (abfd, info)
19478 && nacl_modify_segment_map (abfd, info));
19479 }
19480
19481 static void
19482 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19483 {
19484 elf32_arm_final_write_processing (abfd, linker);
19485 nacl_final_write_processing (abfd, linker);
19486 }
19487
19488 static bfd_vma
19489 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19490 const arelent *rel ATTRIBUTE_UNUSED)
19491 {
19492 return plt->vma
19493 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19494 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19495 }
19496
19497 #undef elf32_bed
19498 #define elf32_bed elf32_arm_nacl_bed
19499 #undef bfd_elf32_bfd_link_hash_table_create
19500 #define bfd_elf32_bfd_link_hash_table_create \
19501 elf32_arm_nacl_link_hash_table_create
19502 #undef elf_backend_plt_alignment
19503 #define elf_backend_plt_alignment 4
19504 #undef elf_backend_modify_segment_map
19505 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19506 #undef elf_backend_modify_program_headers
19507 #define elf_backend_modify_program_headers nacl_modify_program_headers
19508 #undef elf_backend_final_write_processing
19509 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19510 #undef bfd_elf32_get_synthetic_symtab
19511 #undef elf_backend_plt_sym_val
19512 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19513 #undef elf_backend_copy_special_section_fields
19514
19515 #undef ELF_MINPAGESIZE
19516 #undef ELF_COMMONPAGESIZE
19517
19518
19519 #include "elf32-target.h"
19520
19521 /* Reset to defaults. */
19522 #undef elf_backend_plt_alignment
19523 #undef elf_backend_modify_segment_map
19524 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19525 #undef elf_backend_modify_program_headers
19526 #undef elf_backend_final_write_processing
19527 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19528 #undef ELF_MINPAGESIZE
19529 #define ELF_MINPAGESIZE 0x1000
19530 #undef ELF_COMMONPAGESIZE
19531 #define ELF_COMMONPAGESIZE 0x1000
19532
19533
19534 /* VxWorks Targets. */
19535
19536 #undef TARGET_LITTLE_SYM
19537 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19538 #undef TARGET_LITTLE_NAME
19539 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19540 #undef TARGET_BIG_SYM
19541 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19542 #undef TARGET_BIG_NAME
19543 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19544
19545 /* Like elf32_arm_link_hash_table_create -- but overrides
19546 appropriately for VxWorks. */
19547
19548 static struct bfd_link_hash_table *
19549 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19550 {
19551 struct bfd_link_hash_table *ret;
19552
19553 ret = elf32_arm_link_hash_table_create (abfd);
19554 if (ret)
19555 {
19556 struct elf32_arm_link_hash_table *htab
19557 = (struct elf32_arm_link_hash_table *) ret;
19558 htab->use_rel = 0;
19559 htab->vxworks_p = 1;
19560 }
19561 return ret;
19562 }
19563
19564 static void
19565 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19566 {
19567 elf32_arm_final_write_processing (abfd, linker);
19568 elf_vxworks_final_write_processing (abfd, linker);
19569 }
19570
19571 #undef elf32_bed
19572 #define elf32_bed elf32_arm_vxworks_bed
19573
19574 #undef bfd_elf32_bfd_link_hash_table_create
19575 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19576 #undef elf_backend_final_write_processing
19577 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19578 #undef elf_backend_emit_relocs
19579 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19580
19581 #undef elf_backend_may_use_rel_p
19582 #define elf_backend_may_use_rel_p 0
19583 #undef elf_backend_may_use_rela_p
19584 #define elf_backend_may_use_rela_p 1
19585 #undef elf_backend_default_use_rela_p
19586 #define elf_backend_default_use_rela_p 1
19587 #undef elf_backend_want_plt_sym
19588 #define elf_backend_want_plt_sym 1
19589 #undef ELF_MAXPAGESIZE
19590 #define ELF_MAXPAGESIZE 0x1000
19591
19592 #include "elf32-target.h"
19593
19594
19595 /* Merge backend specific data from an object file to the output
19596 object file when linking. */
19597
19598 static bfd_boolean
19599 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
19600 {
19601 flagword out_flags;
19602 flagword in_flags;
19603 bfd_boolean flags_compatible = TRUE;
19604 asection *sec;
19605
19606 /* Check if we have the same endianness. */
19607 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
19608 return FALSE;
19609
19610 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19611 return TRUE;
19612
19613 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
19614 return FALSE;
19615
19616 /* The input BFD must have had its flags initialised. */
19617 /* The following seems bogus to me -- The flags are initialized in
19618 the assembler but I don't think an elf_flags_init field is
19619 written into the object. */
19620 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19621
19622 in_flags = elf_elfheader (ibfd)->e_flags;
19623 out_flags = elf_elfheader (obfd)->e_flags;
19624
19625 /* In theory there is no reason why we couldn't handle this. However
19626 in practice it isn't even close to working and there is no real
19627 reason to want it. */
19628 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19629 && !(ibfd->flags & DYNAMIC)
19630 && (in_flags & EF_ARM_BE8))
19631 {
19632 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19633 ibfd);
19634 return FALSE;
19635 }
19636
19637 if (!elf_flags_init (obfd))
19638 {
19639 /* If the input is the default architecture and had the default
19640 flags then do not bother setting the flags for the output
19641 architecture, instead allow future merges to do this. If no
19642 future merges ever set these flags then they will retain their
19643 uninitialised values, which surprise surprise, correspond
19644 to the default values. */
19645 if (bfd_get_arch_info (ibfd)->the_default
19646 && elf_elfheader (ibfd)->e_flags == 0)
19647 return TRUE;
19648
19649 elf_flags_init (obfd) = TRUE;
19650 elf_elfheader (obfd)->e_flags = in_flags;
19651
19652 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19653 && bfd_get_arch_info (obfd)->the_default)
19654 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19655
19656 return TRUE;
19657 }
19658
19659 /* Determine what should happen if the input ARM architecture
19660 does not match the output ARM architecture. */
19661 if (! bfd_arm_merge_machines (ibfd, obfd))
19662 return FALSE;
19663
19664 /* Identical flags must be compatible. */
19665 if (in_flags == out_flags)
19666 return TRUE;
19667
19668 /* Check to see if the input BFD actually contains any sections. If
19669 not, its flags may not have been initialised either, but it
19670 cannot actually cause any incompatiblity. Do not short-circuit
19671 dynamic objects; their section list may be emptied by
19672 elf_link_add_object_symbols.
19673
19674 Also check to see if there are no code sections in the input.
19675 In this case there is no need to check for code specific flags.
19676 XXX - do we need to worry about floating-point format compatability
19677 in data sections ? */
19678 if (!(ibfd->flags & DYNAMIC))
19679 {
19680 bfd_boolean null_input_bfd = TRUE;
19681 bfd_boolean only_data_sections = TRUE;
19682
19683 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19684 {
19685 /* Ignore synthetic glue sections. */
19686 if (strcmp (sec->name, ".glue_7")
19687 && strcmp (sec->name, ".glue_7t"))
19688 {
19689 if ((bfd_get_section_flags (ibfd, sec)
19690 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19691 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19692 only_data_sections = FALSE;
19693
19694 null_input_bfd = FALSE;
19695 break;
19696 }
19697 }
19698
19699 if (null_input_bfd || only_data_sections)
19700 return TRUE;
19701 }
19702
19703 /* Complain about various flag mismatches. */
19704 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19705 EF_ARM_EABI_VERSION (out_flags)))
19706 {
19707 _bfd_error_handler
19708 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19709 ibfd, obfd,
19710 (in_flags & EF_ARM_EABIMASK) >> 24,
19711 (out_flags & EF_ARM_EABIMASK) >> 24);
19712 return FALSE;
19713 }
19714
19715 /* Not sure what needs to be checked for EABI versions >= 1. */
19716 /* VxWorks libraries do not use these flags. */
19717 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19718 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19719 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19720 {
19721 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19722 {
19723 _bfd_error_handler
19724 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19725 ibfd, obfd,
19726 in_flags & EF_ARM_APCS_26 ? 26 : 32,
19727 out_flags & EF_ARM_APCS_26 ? 26 : 32);
19728 flags_compatible = FALSE;
19729 }
19730
19731 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19732 {
19733 if (in_flags & EF_ARM_APCS_FLOAT)
19734 _bfd_error_handler
19735 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19736 ibfd, obfd);
19737 else
19738 _bfd_error_handler
19739 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19740 ibfd, obfd);
19741
19742 flags_compatible = FALSE;
19743 }
19744
19745 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19746 {
19747 if (in_flags & EF_ARM_VFP_FLOAT)
19748 _bfd_error_handler
19749 (_("error: %B uses VFP instructions, whereas %B does not"),
19750 ibfd, obfd);
19751 else
19752 _bfd_error_handler
19753 (_("error: %B uses FPA instructions, whereas %B does not"),
19754 ibfd, obfd);
19755
19756 flags_compatible = FALSE;
19757 }
19758
19759 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19760 {
19761 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19762 _bfd_error_handler
19763 (_("error: %B uses Maverick instructions, whereas %B does not"),
19764 ibfd, obfd);
19765 else
19766 _bfd_error_handler
19767 (_("error: %B does not use Maverick instructions, whereas %B does"),
19768 ibfd, obfd);
19769
19770 flags_compatible = FALSE;
19771 }
19772
19773 #ifdef EF_ARM_SOFT_FLOAT
19774 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19775 {
19776 /* We can allow interworking between code that is VFP format
19777 layout, and uses either soft float or integer regs for
19778 passing floating point arguments and results. We already
19779 know that the APCS_FLOAT flags match; similarly for VFP
19780 flags. */
19781 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19782 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19783 {
19784 if (in_flags & EF_ARM_SOFT_FLOAT)
19785 _bfd_error_handler
19786 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19787 ibfd, obfd);
19788 else
19789 _bfd_error_handler
19790 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19791 ibfd, obfd);
19792
19793 flags_compatible = FALSE;
19794 }
19795 }
19796 #endif
19797
19798 /* Interworking mismatch is only a warning. */
19799 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19800 {
19801 if (in_flags & EF_ARM_INTERWORK)
19802 {
19803 _bfd_error_handler
19804 (_("Warning: %B supports interworking, whereas %B does not"),
19805 ibfd, obfd);
19806 }
19807 else
19808 {
19809 _bfd_error_handler
19810 (_("Warning: %B does not support interworking, whereas %B does"),
19811 ibfd, obfd);
19812 }
19813 }
19814 }
19815
19816 return flags_compatible;
19817 }
19818
19819
19820 /* Symbian OS Targets. */
19821
19822 #undef TARGET_LITTLE_SYM
19823 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19824 #undef TARGET_LITTLE_NAME
19825 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19826 #undef TARGET_BIG_SYM
19827 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19828 #undef TARGET_BIG_NAME
19829 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19830
19831 /* Like elf32_arm_link_hash_table_create -- but overrides
19832 appropriately for Symbian OS. */
19833
19834 static struct bfd_link_hash_table *
19835 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19836 {
19837 struct bfd_link_hash_table *ret;
19838
19839 ret = elf32_arm_link_hash_table_create (abfd);
19840 if (ret)
19841 {
19842 struct elf32_arm_link_hash_table *htab
19843 = (struct elf32_arm_link_hash_table *)ret;
19844 /* There is no PLT header for Symbian OS. */
19845 htab->plt_header_size = 0;
19846 /* The PLT entries are each one instruction and one word. */
19847 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19848 htab->symbian_p = 1;
19849 /* Symbian uses armv5t or above, so use_blx is always true. */
19850 htab->use_blx = 1;
19851 htab->root.is_relocatable_executable = 1;
19852 }
19853 return ret;
19854 }
19855
19856 static const struct bfd_elf_special_section
19857 elf32_arm_symbian_special_sections[] =
19858 {
19859 /* In a BPABI executable, the dynamic linking sections do not go in
19860 the loadable read-only segment. The post-linker may wish to
19861 refer to these sections, but they are not part of the final
19862 program image. */
19863 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19864 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19865 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19866 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19867 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19868 /* These sections do not need to be writable as the SymbianOS
19869 postlinker will arrange things so that no dynamic relocation is
19870 required. */
19871 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19872 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19873 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19874 { NULL, 0, 0, 0, 0 }
19875 };
19876
19877 static void
19878 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19879 struct bfd_link_info *link_info)
19880 {
19881 /* BPABI objects are never loaded directly by an OS kernel; they are
19882 processed by a postlinker first, into an OS-specific format. If
19883 the D_PAGED bit is set on the file, BFD will align segments on
19884 page boundaries, so that an OS can directly map the file. With
19885 BPABI objects, that just results in wasted space. In addition,
19886 because we clear the D_PAGED bit, map_sections_to_segments will
19887 recognize that the program headers should not be mapped into any
19888 loadable segment. */
19889 abfd->flags &= ~D_PAGED;
19890 elf32_arm_begin_write_processing (abfd, link_info);
19891 }
19892
19893 static bfd_boolean
19894 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19895 struct bfd_link_info *info)
19896 {
19897 struct elf_segment_map *m;
19898 asection *dynsec;
19899
19900 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19901 segment. However, because the .dynamic section is not marked
19902 with SEC_LOAD, the generic ELF code will not create such a
19903 segment. */
19904 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19905 if (dynsec)
19906 {
19907 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19908 if (m->p_type == PT_DYNAMIC)
19909 break;
19910
19911 if (m == NULL)
19912 {
19913 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19914 m->next = elf_seg_map (abfd);
19915 elf_seg_map (abfd) = m;
19916 }
19917 }
19918
19919 /* Also call the generic arm routine. */
19920 return elf32_arm_modify_segment_map (abfd, info);
19921 }
19922
19923 /* Return address for Ith PLT stub in section PLT, for relocation REL
19924 or (bfd_vma) -1 if it should not be included. */
19925
19926 static bfd_vma
19927 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19928 const arelent *rel ATTRIBUTE_UNUSED)
19929 {
19930 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19931 }
19932
19933 #undef elf32_bed
19934 #define elf32_bed elf32_arm_symbian_bed
19935
19936 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19937 will process them and then discard them. */
19938 #undef ELF_DYNAMIC_SEC_FLAGS
19939 #define ELF_DYNAMIC_SEC_FLAGS \
19940 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19941
19942 #undef elf_backend_emit_relocs
19943
19944 #undef bfd_elf32_bfd_link_hash_table_create
19945 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19946 #undef elf_backend_special_sections
19947 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19948 #undef elf_backend_begin_write_processing
19949 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19950 #undef elf_backend_final_write_processing
19951 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19952
19953 #undef elf_backend_modify_segment_map
19954 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19955
19956 /* There is no .got section for BPABI objects, and hence no header. */
19957 #undef elf_backend_got_header_size
19958 #define elf_backend_got_header_size 0
19959
19960 /* Similarly, there is no .got.plt section. */
19961 #undef elf_backend_want_got_plt
19962 #define elf_backend_want_got_plt 0
19963
19964 #undef elf_backend_plt_sym_val
19965 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19966
19967 #undef elf_backend_may_use_rel_p
19968 #define elf_backend_may_use_rel_p 1
19969 #undef elf_backend_may_use_rela_p
19970 #define elf_backend_may_use_rela_p 0
19971 #undef elf_backend_default_use_rela_p
19972 #define elf_backend_default_use_rela_p 0
19973 #undef elf_backend_want_plt_sym
19974 #define elf_backend_want_plt_sym 0
19975 #undef ELF_MAXPAGESIZE
19976 #define ELF_MAXPAGESIZE 0x8000
19977
19978 #include "elf32-target.h"
GDB Binutils - Deliverables
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