projects / deliverable / binutils-gdb.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
bfd_error_handler bfd_vma and bfd_size_type args
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2017 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1764 };
1765
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1768 {
1769 HOWTO (R_ARM_RREL32, /* type */
1770 0, /* rightshift */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1772 0, /* bitsize */
1773 FALSE, /* pc_relative */
1774 0, /* bitpos */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1779 0, /* src_mask */
1780 0, /* dst_mask */
1781 FALSE), /* pcrel_offset */
1782
1783 HOWTO (R_ARM_RABS32, /* type */
1784 0, /* rightshift */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1786 0, /* bitsize */
1787 FALSE, /* pc_relative */
1788 0, /* bitpos */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1793 0, /* src_mask */
1794 0, /* dst_mask */
1795 FALSE), /* pcrel_offset */
1796
1797 HOWTO (R_ARM_RPC24, /* type */
1798 0, /* rightshift */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1800 0, /* bitsize */
1801 FALSE, /* pc_relative */
1802 0, /* bitpos */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1807 0, /* src_mask */
1808 0, /* dst_mask */
1809 FALSE), /* pcrel_offset */
1810
1811 HOWTO (R_ARM_RBASE, /* type */
1812 0, /* rightshift */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1814 0, /* bitsize */
1815 FALSE, /* pc_relative */
1816 0, /* bitpos */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1821 0, /* src_mask */
1822 0, /* dst_mask */
1823 FALSE) /* pcrel_offset */
1824 };
1825
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1828 {
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1831
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1834
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1838
1839 return NULL;
1840 }
1841
1842 static void
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1845 {
1846 unsigned int r_type;
1847
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1850 }
1851
1852 struct elf32_arm_reloc_map
1853 {
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1856 };
1857
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1860 {
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1951 };
1952
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1956 {
1957 unsigned int i;
1958
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1962
1963 return NULL;
1964 }
1965
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1968 const char *r_name)
1969 {
1970 unsigned int i;
1971
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1976
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1981
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1986
1987 return NULL;
1988 }
1989
1990 /* Support for core dump NOTE sections. */
1991
1992 static bfd_boolean
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1994 {
1995 int offset;
1996 size_t size;
1997
1998 switch (note->descsz)
1999 {
2000 default:
2001 return FALSE;
2002
2003 case 148: /* Linux/ARM 32-bit. */
2004 /* pr_cursig */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2006
2007 /* pr_pid */
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2009
2010 /* pr_reg */
2011 offset = 72;
2012 size = 72;
2013
2014 break;
2015 }
2016
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2020 }
2021
2022 static bfd_boolean
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2024 {
2025 switch (note->descsz)
2026 {
2027 default:
2028 return FALSE;
2029
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2037 }
2038
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2042 {
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2045
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2048 }
2049
2050 return TRUE;
2051 }
2052
2053 static char *
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2055 int note_type, ...)
2056 {
2057 switch (note_type)
2058 {
2059 default:
2060 return NULL;
2061
2062 case NT_PRPSINFO:
2063 {
2064 char data[124];
2065 va_list ap;
2066
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2071 va_end (ap);
2072
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2075 }
2076
2077 case NT_PRSTATUS:
2078 {
2079 char data[148];
2080 va_list ap;
2081 long pid;
2082 int cursig;
2083 const void *greg;
2084
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2093 va_end (ap);
2094
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2097 }
2098 }
2099 }
2100
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2105
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2109
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2112
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2114 interworkable. */
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2119
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2126
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2129
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2132
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2135
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2138
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2140
2141 #define CMSE_PREFIX "__acle_se_"
2142
2143 /* The name of the dynamic interpreter. This is put in the .interp
2144 section. */
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2146
2147 static const unsigned long tls_trampoline [] =
2148 {
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2152 };
2153
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2155 {
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 };
2166
2167 #ifdef FOUR_WORD_PLT
2168
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2172 linker first. */
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2174 {
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 };
2180
2181 /* Subsequent entries in a procedure linkage table look like
2182 this. */
2183 static const bfd_vma elf32_arm_plt_entry [] =
2184 {
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2189 };
2190
2191 #else /* not FOUR_WORD_PLT */
2192
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2196 linker first. */
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2198 {
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2204 };
2205
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2209 {
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 };
2214
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2218 {
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 };
2224
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2226
2227 #endif /* not FOUR_WORD_PLT */
2228
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2233 {
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2238 /* add lr, pc */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2241 };
2242
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2244 look like this. */
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2246 {
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2253 /* nop */
2254 };
2255
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2259 {
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 };
2265
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2268 {
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 };
2276
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2279 {
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 };
2287
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2291 {
2292 0x4778, /* bx pc */
2293 0x46c0 /* nop */
2294 };
2295
2296 /* The entries in a PLT when using a DLL-based target with multiple
2297 address spaces. */
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2299 {
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 };
2303
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2307 linker first. */
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 {
2310 /* First bundle: */
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2320 /* Third bundle: */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2324 /* .Lplt_tail: */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2331 };
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2333
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2336 {
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2341 };
2342
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2351
2352 enum stub_insn_type
2353 {
2354 THUMB16_TYPE = 1,
2355 THUMB32_TYPE,
2356 ARM_TYPE,
2357 DATA_TYPE
2358 };
2359
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371
2372 typedef struct
2373 {
2374 bfd_vma data;
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2377 int reloc_addend;
2378 } insn_sequence;
2379
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2383 {
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2386 };
2387
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2389 available. */
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2391 {
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2395 };
2396
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2399 {
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2407 };
2408
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2411 {
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2414 };
2415
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2419 {
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2423 };
2424
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2426 allowed. */
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2428 {
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2434 };
2435
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2437 available. */
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2439 {
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2444 };
2445
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2449 {
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2453 };
2454
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2458 {
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2462 };
2463
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2467 ARMv7). */
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2469 {
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2474 };
2475
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2478 {
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2483 };
2484
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2487 {
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2493 };
2494
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2496 architectures. */
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2498 {
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2506 };
2507
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2509 allowed. */
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2511 {
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2518 };
2519
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2523 {
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2527 };
2528
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2532 {
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2538 };
2539
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2542 {
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2551 };
2552
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2555 {
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2564 };
2565
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2568 {
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2571 };
2572
2573
2574 /* Cortex-A8 erratum-workaround stubs. */
2575
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2578
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2580 {
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2584 };
2585
2586 /* Stub used for b.w and bl.w instructions. */
2587
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2589 {
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2591 };
2592
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2594 {
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2596 };
2597
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2601
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2603 {
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2605 };
2606
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2610 applied.
2611
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2615
2616 const char * stubborn_problems[] = { "np" };
2617
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2619 section called:
2620
2621 .data.rel.local.stubborn_problems
2622
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2624
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2627 continue;
2628
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2631 C identifier. */
2632 #define STUB_SUFFIX ".__stub"
2633
2634 /* One entry per long/short branch stub defined above. */
2635 #define DEF_STUBS \
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2659
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2662 {
2663 arm_stub_none,
2664 DEF_STUBS
2665 max_stub_type
2666 };
2667 #undef DEF_STUB
2668
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2671
2672 typedef struct
2673 {
2674 const insn_sequence* template_sequence;
2675 int template_size;
2676 } stub_def;
2677
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2680 {
2681 {NULL, 0},
2682 DEF_STUBS
2683 };
2684
2685 struct elf32_arm_stub_hash_entry
2686 {
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2689
2690 /* The stub section. */
2691 asection *stub_sec;
2692
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2695
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2700
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2705 same section. */
2706 bfd_vma source_value;
2707
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2711
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2715 int stub_size;
2716 /* Its template. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2720
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2723
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2726
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2729 asection *id_sec;
2730
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2734 char *output_name;
2735 };
2736
2737 /* Used to build a map of a section. This is required for mixed-endian
2738 code/data. */
2739
2740 typedef struct elf32_elf_section_map
2741 {
2742 bfd_vma vma;
2743 char type;
2744 }
2745 elf32_arm_section_map;
2746
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2748
2749 typedef enum
2750 {
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2755 }
2756 elf32_vfp11_erratum_type;
2757
2758 typedef struct elf32_vfp11_erratum_list
2759 {
2760 struct elf32_vfp11_erratum_list *next;
2761 bfd_vma vma;
2762 union
2763 {
2764 struct
2765 {
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2768 } b;
2769 struct
2770 {
2771 struct elf32_vfp11_erratum_list *branch;
2772 unsigned int id;
2773 } v;
2774 } u;
2775 elf32_vfp11_erratum_type type;
2776 }
2777 elf32_vfp11_erratum_list;
2778
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2780 veneer. */
2781 typedef enum
2782 {
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2785 }
2786 elf32_stm32l4xx_erratum_type;
2787
2788 typedef struct elf32_stm32l4xx_erratum_list
2789 {
2790 struct elf32_stm32l4xx_erratum_list *next;
2791 bfd_vma vma;
2792 union
2793 {
2794 struct
2795 {
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2797 unsigned int insn;
2798 } b;
2799 struct
2800 {
2801 struct elf32_stm32l4xx_erratum_list *branch;
2802 unsigned int id;
2803 } v;
2804 } u;
2805 elf32_stm32l4xx_erratum_type type;
2806 }
2807 elf32_stm32l4xx_erratum_list;
2808
2809 typedef enum
2810 {
2811 DELETE_EXIDX_ENTRY,
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2813 }
2814 arm_unwind_edit_type;
2815
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2818 {
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2824 unsigned int index;
2825 struct arm_unwind_table_edit *next;
2826 }
2827 arm_unwind_table_edit;
2828
2829 typedef struct _arm_elf_section_data
2830 {
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2843 union
2844 {
2845 /* Unwind info attached to a text section. */
2846 struct
2847 {
2848 asection *arm_exidx_sec;
2849 } text;
2850
2851 /* Unwind info attached to an .ARM.exidx section. */
2852 struct
2853 {
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2856 } exidx;
2857 } u;
2858 }
2859 _arm_elf_section_data;
2860
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2863
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2869
2870 struct a8_erratum_fix
2871 {
2872 bfd *input_bfd;
2873 asection *section;
2874 bfd_vma offset;
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2877 char *stub_name;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2880 };
2881
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2883 erratum. */
2884
2885 struct a8_erratum_reloc
2886 {
2887 bfd_vma from;
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2894 };
2895
2896 /* The size of the thread control block. */
2897 #define TCB_SIZE 8
2898
2899 /* ARM-specific information about a PLT entry, over and above the usual
2900 gotplt_union. */
2901 struct arm_plt_info
2902 {
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2906
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2910
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2917
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2922 };
2923
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2926 {
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2930
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2934
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2937 };
2938
2939 struct elf_arm_obj_tdata
2940 {
2941 struct elf_obj_tdata root;
2942
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2945
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2948
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2951
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2954
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2957 };
2958
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2961
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2964
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2967
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2970
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2975
2976 static bfd_boolean
2977 elf32_arm_mkobject (bfd *abfd)
2978 {
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2980 ARM_ELF_DATA);
2981 }
2982
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2984
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2987 {
2988 struct elf_link_hash_entry root;
2989
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2992
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2995
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3003
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3006
3007 unsigned int unused : 23;
3008
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3012
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3016
3017 /* A pointer to the most recently used stub hash entry against this
3018 symbol. */
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3020 };
3021
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3025 (&(table)->root, \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3027 (info)))
3028
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3033
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3037
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3040 struct map_stub
3041 {
3042 /* This is the section to which stubs in the group will be
3043 attached. */
3044 asection *link_sec;
3045 /* The stub section. */
3046 asection *stub_sec;
3047 };
3048
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3051
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3054 {
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3057
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3060
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3063
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3066
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3070
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3072 veneers. */
3073 bfd_size_type vfp11_erratum_glue_size;
3074
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3076 veneers. */
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3078
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3084
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3087
3088 /* Nonzero to output a BE8 image. */
3089 int byteswap_code;
3090
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3093 int target1_is_rel;
3094
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3096 int target2_reloc;
3097
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3101 int fix_v4bx;
3102
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3104 int fix_cortex_a8;
3105
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3107 int fix_arm1176;
3108
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3110 int use_blx;
3111
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3115
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3118
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3122
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3125
3126 /* Nonzero to force PIC branch veneers. */
3127 int pic_veneer;
3128
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3131
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3134
3135 /* True if the target system is VxWorks. */
3136 int vxworks_p;
3137
3138 /* True if the target system is Symbian OS. */
3139 int symbian_p;
3140
3141 /* True if the target system is Native Client. */
3142 int nacl_p;
3143
3144 /* True if the target uses REL relocations. */
3145 int use_rel;
3146
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3149 int cmse_implib;
3150
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3153 bfd *in_implib_bfd;
3154
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3157
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3160
3161 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3162 asection *srelplt2;
3163
3164 /* The offset into splt of the PLT entry for the TLS descriptor
3165 resolver. Special values are 0, if not necessary (or not found
3166 to be necessary yet), and -1 if needed but not determined
3167 yet. */
3168 bfd_vma dt_tlsdesc_plt;
3169
3170 /* The offset into sgot of the GOT entry used by the PLT entry
3171 above. */
3172 bfd_vma dt_tlsdesc_got;
3173
3174 /* Offset in .plt section of tls_arm_trampoline. */
3175 bfd_vma tls_trampoline;
3176
3177 /* Data for R_ARM_TLS_LDM32 relocations. */
3178 union
3179 {
3180 bfd_signed_vma refcount;
3181 bfd_vma offset;
3182 } tls_ldm_got;
3183
3184 /* Small local sym cache. */
3185 struct sym_cache sym_cache;
3186
3187 /* For convenience in allocate_dynrelocs. */
3188 bfd * obfd;
3189
3190 /* The amount of space used by the reserved portion of the sgotplt
3191 section, plus whatever space is used by the jump slots. */
3192 bfd_vma sgotplt_jump_table_size;
3193
3194 /* The stub hash table. */
3195 struct bfd_hash_table stub_hash_table;
3196
3197 /* Linker stub bfd. */
3198 bfd *stub_bfd;
3199
3200 /* Linker call-backs. */
3201 asection * (*add_stub_section) (const char *, asection *, asection *,
3202 unsigned int);
3203 void (*layout_sections_again) (void);
3204
3205 /* Array to keep track of which stub sections have been created, and
3206 information on stub grouping. */
3207 struct map_stub *stub_group;
3208
3209 /* Input stub section holding secure gateway veneers. */
3210 asection *cmse_stub_sec;
3211
3212 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3213 start to be allocated. */
3214 bfd_vma new_cmse_stub_offset;
3215
3216 /* Number of elements in stub_group. */
3217 unsigned int top_id;
3218
3219 /* Assorted information used by elf32_arm_size_stubs. */
3220 unsigned int bfd_count;
3221 unsigned int top_index;
3222 asection **input_list;
3223 };
3224
3225 static inline int
3226 ctz (unsigned int mask)
3227 {
3228 #if GCC_VERSION >= 3004
3229 return __builtin_ctz (mask);
3230 #else
3231 unsigned int i;
3232
3233 for (i = 0; i < 8 * sizeof (mask); i++)
3234 {
3235 if (mask & 0x1)
3236 break;
3237 mask = (mask >> 1);
3238 }
3239 return i;
3240 #endif
3241 }
3242
3243 static inline int
3244 elf32_arm_popcount (unsigned int mask)
3245 {
3246 #if GCC_VERSION >= 3004
3247 return __builtin_popcount (mask);
3248 #else
3249 unsigned int i;
3250 int sum = 0;
3251
3252 for (i = 0; i < 8 * sizeof (mask); i++)
3253 {
3254 if (mask & 0x1)
3255 sum++;
3256 mask = (mask >> 1);
3257 }
3258 return sum;
3259 #endif
3260 }
3261
3262 /* Create an entry in an ARM ELF linker hash table. */
3263
3264 static struct bfd_hash_entry *
3265 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3266 struct bfd_hash_table * table,
3267 const char * string)
3268 {
3269 struct elf32_arm_link_hash_entry * ret =
3270 (struct elf32_arm_link_hash_entry *) entry;
3271
3272 /* Allocate the structure if it has not already been allocated by a
3273 subclass. */
3274 if (ret == NULL)
3275 ret = (struct elf32_arm_link_hash_entry *)
3276 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3277 if (ret == NULL)
3278 return (struct bfd_hash_entry *) ret;
3279
3280 /* Call the allocation method of the superclass. */
3281 ret = ((struct elf32_arm_link_hash_entry *)
3282 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3283 table, string));
3284 if (ret != NULL)
3285 {
3286 ret->dyn_relocs = NULL;
3287 ret->tls_type = GOT_UNKNOWN;
3288 ret->tlsdesc_got = (bfd_vma) -1;
3289 ret->plt.thumb_refcount = 0;
3290 ret->plt.maybe_thumb_refcount = 0;
3291 ret->plt.noncall_refcount = 0;
3292 ret->plt.got_offset = -1;
3293 ret->is_iplt = FALSE;
3294 ret->export_glue = NULL;
3295
3296 ret->stub_cache = NULL;
3297 }
3298
3299 return (struct bfd_hash_entry *) ret;
3300 }
3301
3302 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3303 symbols. */
3304
3305 static bfd_boolean
3306 elf32_arm_allocate_local_sym_info (bfd *abfd)
3307 {
3308 if (elf_local_got_refcounts (abfd) == NULL)
3309 {
3310 bfd_size_type num_syms;
3311 bfd_size_type size;
3312 char *data;
3313
3314 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3315 size = num_syms * (sizeof (bfd_signed_vma)
3316 + sizeof (struct arm_local_iplt_info *)
3317 + sizeof (bfd_vma)
3318 + sizeof (char));
3319 data = bfd_zalloc (abfd, size);
3320 if (data == NULL)
3321 return FALSE;
3322
3323 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3324 data += num_syms * sizeof (bfd_signed_vma);
3325
3326 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3327 data += num_syms * sizeof (struct arm_local_iplt_info *);
3328
3329 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3330 data += num_syms * sizeof (bfd_vma);
3331
3332 elf32_arm_local_got_tls_type (abfd) = data;
3333 }
3334 return TRUE;
3335 }
3336
3337 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3338 to input bfd ABFD. Create the information if it doesn't already exist.
3339 Return null if an allocation fails. */
3340
3341 static struct arm_local_iplt_info *
3342 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3343 {
3344 struct arm_local_iplt_info **ptr;
3345
3346 if (!elf32_arm_allocate_local_sym_info (abfd))
3347 return NULL;
3348
3349 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3350 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3351 if (*ptr == NULL)
3352 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3353 return *ptr;
3354 }
3355
3356 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3357 in ABFD's symbol table. If the symbol is global, H points to its
3358 hash table entry, otherwise H is null.
3359
3360 Return true if the symbol does have PLT information. When returning
3361 true, point *ROOT_PLT at the target-independent reference count/offset
3362 union and *ARM_PLT at the ARM-specific information. */
3363
3364 static bfd_boolean
3365 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3366 struct elf32_arm_link_hash_entry *h,
3367 unsigned long r_symndx, union gotplt_union **root_plt,
3368 struct arm_plt_info **arm_plt)
3369 {
3370 struct arm_local_iplt_info *local_iplt;
3371
3372 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3373 return FALSE;
3374
3375 if (h != NULL)
3376 {
3377 *root_plt = &h->root.plt;
3378 *arm_plt = &h->plt;
3379 return TRUE;
3380 }
3381
3382 if (elf32_arm_local_iplt (abfd) == NULL)
3383 return FALSE;
3384
3385 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3386 if (local_iplt == NULL)
3387 return FALSE;
3388
3389 *root_plt = &local_iplt->root;
3390 *arm_plt = &local_iplt->arm;
3391 return TRUE;
3392 }
3393
3394 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3395 before it. */
3396
3397 static bfd_boolean
3398 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3399 struct arm_plt_info *arm_plt)
3400 {
3401 struct elf32_arm_link_hash_table *htab;
3402
3403 htab = elf32_arm_hash_table (info);
3404 return (arm_plt->thumb_refcount != 0
3405 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3406 }
3407
3408 /* Return a pointer to the head of the dynamic reloc list that should
3409 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3410 ABFD's symbol table. Return null if an error occurs. */
3411
3412 static struct elf_dyn_relocs **
3413 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3414 Elf_Internal_Sym *isym)
3415 {
3416 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3417 {
3418 struct arm_local_iplt_info *local_iplt;
3419
3420 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3421 if (local_iplt == NULL)
3422 return NULL;
3423 return &local_iplt->dyn_relocs;
3424 }
3425 else
3426 {
3427 /* Track dynamic relocs needed for local syms too.
3428 We really need local syms available to do this
3429 easily. Oh well. */
3430 asection *s;
3431 void *vpp;
3432
3433 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3434 if (s == NULL)
3435 abort ();
3436
3437 vpp = &elf_section_data (s)->local_dynrel;
3438 return (struct elf_dyn_relocs **) vpp;
3439 }
3440 }
3441
3442 /* Initialize an entry in the stub hash table. */
3443
3444 static struct bfd_hash_entry *
3445 stub_hash_newfunc (struct bfd_hash_entry *entry,
3446 struct bfd_hash_table *table,
3447 const char *string)
3448 {
3449 /* Allocate the structure if it has not already been allocated by a
3450 subclass. */
3451 if (entry == NULL)
3452 {
3453 entry = (struct bfd_hash_entry *)
3454 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3455 if (entry == NULL)
3456 return entry;
3457 }
3458
3459 /* Call the allocation method of the superclass. */
3460 entry = bfd_hash_newfunc (entry, table, string);
3461 if (entry != NULL)
3462 {
3463 struct elf32_arm_stub_hash_entry *eh;
3464
3465 /* Initialize the local fields. */
3466 eh = (struct elf32_arm_stub_hash_entry *) entry;
3467 eh->stub_sec = NULL;
3468 eh->stub_offset = (bfd_vma) -1;
3469 eh->source_value = 0;
3470 eh->target_value = 0;
3471 eh->target_section = NULL;
3472 eh->orig_insn = 0;
3473 eh->stub_type = arm_stub_none;
3474 eh->stub_size = 0;
3475 eh->stub_template = NULL;
3476 eh->stub_template_size = -1;
3477 eh->h = NULL;
3478 eh->id_sec = NULL;
3479 eh->output_name = NULL;
3480 }
3481
3482 return entry;
3483 }
3484
3485 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3486 shortcuts to them in our hash table. */
3487
3488 static bfd_boolean
3489 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3490 {
3491 struct elf32_arm_link_hash_table *htab;
3492
3493 htab = elf32_arm_hash_table (info);
3494 if (htab == NULL)
3495 return FALSE;
3496
3497 /* BPABI objects never have a GOT, or associated sections. */
3498 if (htab->symbian_p)
3499 return TRUE;
3500
3501 if (! _bfd_elf_create_got_section (dynobj, info))
3502 return FALSE;
3503
3504 return TRUE;
3505 }
3506
3507 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3508
3509 static bfd_boolean
3510 create_ifunc_sections (struct bfd_link_info *info)
3511 {
3512 struct elf32_arm_link_hash_table *htab;
3513 const struct elf_backend_data *bed;
3514 bfd *dynobj;
3515 asection *s;
3516 flagword flags;
3517
3518 htab = elf32_arm_hash_table (info);
3519 dynobj = htab->root.dynobj;
3520 bed = get_elf_backend_data (dynobj);
3521 flags = bed->dynamic_sec_flags;
3522
3523 if (htab->root.iplt == NULL)
3524 {
3525 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3526 flags | SEC_READONLY | SEC_CODE);
3527 if (s == NULL
3528 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3529 return FALSE;
3530 htab->root.iplt = s;
3531 }
3532
3533 if (htab->root.irelplt == NULL)
3534 {
3535 s = bfd_make_section_anyway_with_flags (dynobj,
3536 RELOC_SECTION (htab, ".iplt"),
3537 flags | SEC_READONLY);
3538 if (s == NULL
3539 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3540 return FALSE;
3541 htab->root.irelplt = s;
3542 }
3543
3544 if (htab->root.igotplt == NULL)
3545 {
3546 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3547 if (s == NULL
3548 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3549 return FALSE;
3550 htab->root.igotplt = s;
3551 }
3552 return TRUE;
3553 }
3554
3555 /* Determine if we're dealing with a Thumb only architecture. */
3556
3557 static bfd_boolean
3558 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3559 {
3560 int arch;
3561 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3562 Tag_CPU_arch_profile);
3563
3564 if (profile)
3565 return profile == 'M';
3566
3567 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3568
3569 /* Force return logic to be reviewed for each new architecture. */
3570 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3571
3572 if (arch == TAG_CPU_ARCH_V6_M
3573 || arch == TAG_CPU_ARCH_V6S_M
3574 || arch == TAG_CPU_ARCH_V7E_M
3575 || arch == TAG_CPU_ARCH_V8M_BASE
3576 || arch == TAG_CPU_ARCH_V8M_MAIN)
3577 return TRUE;
3578
3579 return FALSE;
3580 }
3581
3582 /* Determine if we're dealing with a Thumb-2 object. */
3583
3584 static bfd_boolean
3585 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3586 {
3587 int arch;
3588 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3589 Tag_THUMB_ISA_use);
3590
3591 if (thumb_isa)
3592 return thumb_isa == 2;
3593
3594 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3595
3596 /* Force return logic to be reviewed for each new architecture. */
3597 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3598
3599 return (arch == TAG_CPU_ARCH_V6T2
3600 || arch == TAG_CPU_ARCH_V7
3601 || arch == TAG_CPU_ARCH_V7E_M
3602 || arch == TAG_CPU_ARCH_V8
3603 || arch == TAG_CPU_ARCH_V8R
3604 || arch == TAG_CPU_ARCH_V8M_MAIN);
3605 }
3606
3607 /* Determine whether Thumb-2 BL instruction is available. */
3608
3609 static bfd_boolean
3610 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3611 {
3612 int arch =
3613 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3614
3615 /* Force return logic to be reviewed for each new architecture. */
3616 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3617
3618 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3619 return (arch == TAG_CPU_ARCH_V6T2
3620 || arch >= TAG_CPU_ARCH_V7);
3621 }
3622
3623 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3624 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3625 hash table. */
3626
3627 static bfd_boolean
3628 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3629 {
3630 struct elf32_arm_link_hash_table *htab;
3631
3632 htab = elf32_arm_hash_table (info);
3633 if (htab == NULL)
3634 return FALSE;
3635
3636 if (!htab->root.sgot && !create_got_section (dynobj, info))
3637 return FALSE;
3638
3639 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3640 return FALSE;
3641
3642 if (htab->vxworks_p)
3643 {
3644 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3645 return FALSE;
3646
3647 if (bfd_link_pic (info))
3648 {
3649 htab->plt_header_size = 0;
3650 htab->plt_entry_size
3651 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3652 }
3653 else
3654 {
3655 htab->plt_header_size
3656 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3657 htab->plt_entry_size
3658 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3659 }
3660
3661 if (elf_elfheader (dynobj))
3662 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3663 }
3664 else
3665 {
3666 /* PR ld/16017
3667 Test for thumb only architectures. Note - we cannot just call
3668 using_thumb_only() as the attributes in the output bfd have not been
3669 initialised at this point, so instead we use the input bfd. */
3670 bfd * saved_obfd = htab->obfd;
3671
3672 htab->obfd = dynobj;
3673 if (using_thumb_only (htab))
3674 {
3675 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3676 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3677 }
3678 htab->obfd = saved_obfd;
3679 }
3680
3681 if (!htab->root.splt
3682 || !htab->root.srelplt
3683 || !htab->root.sdynbss
3684 || (!bfd_link_pic (info) && !htab->root.srelbss))
3685 abort ();
3686
3687 return TRUE;
3688 }
3689
3690 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3691
3692 static void
3693 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3694 struct elf_link_hash_entry *dir,
3695 struct elf_link_hash_entry *ind)
3696 {
3697 struct elf32_arm_link_hash_entry *edir, *eind;
3698
3699 edir = (struct elf32_arm_link_hash_entry *) dir;
3700 eind = (struct elf32_arm_link_hash_entry *) ind;
3701
3702 if (eind->dyn_relocs != NULL)
3703 {
3704 if (edir->dyn_relocs != NULL)
3705 {
3706 struct elf_dyn_relocs **pp;
3707 struct elf_dyn_relocs *p;
3708
3709 /* Add reloc counts against the indirect sym to the direct sym
3710 list. Merge any entries against the same section. */
3711 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3712 {
3713 struct elf_dyn_relocs *q;
3714
3715 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3716 if (q->sec == p->sec)
3717 {
3718 q->pc_count += p->pc_count;
3719 q->count += p->count;
3720 *pp = p->next;
3721 break;
3722 }
3723 if (q == NULL)
3724 pp = &p->next;
3725 }
3726 *pp = edir->dyn_relocs;
3727 }
3728
3729 edir->dyn_relocs = eind->dyn_relocs;
3730 eind->dyn_relocs = NULL;
3731 }
3732
3733 if (ind->root.type == bfd_link_hash_indirect)
3734 {
3735 /* Copy over PLT info. */
3736 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3737 eind->plt.thumb_refcount = 0;
3738 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3739 eind->plt.maybe_thumb_refcount = 0;
3740 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3741 eind->plt.noncall_refcount = 0;
3742
3743 /* We should only allocate a function to .iplt once the final
3744 symbol information is known. */
3745 BFD_ASSERT (!eind->is_iplt);
3746
3747 if (dir->got.refcount <= 0)
3748 {
3749 edir->tls_type = eind->tls_type;
3750 eind->tls_type = GOT_UNKNOWN;
3751 }
3752 }
3753
3754 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3755 }
3756
3757 /* Destroy an ARM elf linker hash table. */
3758
3759 static void
3760 elf32_arm_link_hash_table_free (bfd *obfd)
3761 {
3762 struct elf32_arm_link_hash_table *ret
3763 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3764
3765 bfd_hash_table_free (&ret->stub_hash_table);
3766 _bfd_elf_link_hash_table_free (obfd);
3767 }
3768
3769 /* Create an ARM elf linker hash table. */
3770
3771 static struct bfd_link_hash_table *
3772 elf32_arm_link_hash_table_create (bfd *abfd)
3773 {
3774 struct elf32_arm_link_hash_table *ret;
3775 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3776
3777 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3778 if (ret == NULL)
3779 return NULL;
3780
3781 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3782 elf32_arm_link_hash_newfunc,
3783 sizeof (struct elf32_arm_link_hash_entry),
3784 ARM_ELF_DATA))
3785 {
3786 free (ret);
3787 return NULL;
3788 }
3789
3790 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3791 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3792 #ifdef FOUR_WORD_PLT
3793 ret->plt_header_size = 16;
3794 ret->plt_entry_size = 16;
3795 #else
3796 ret->plt_header_size = 20;
3797 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3798 #endif
3799 ret->use_rel = 1;
3800 ret->obfd = abfd;
3801
3802 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3803 sizeof (struct elf32_arm_stub_hash_entry)))
3804 {
3805 _bfd_elf_link_hash_table_free (abfd);
3806 return NULL;
3807 }
3808 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3809
3810 return &ret->root.root;
3811 }
3812
3813 /* Determine what kind of NOPs are available. */
3814
3815 static bfd_boolean
3816 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3817 {
3818 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3819 Tag_CPU_arch);
3820
3821 /* Force return logic to be reviewed for each new architecture. */
3822 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3823
3824 return (arch == TAG_CPU_ARCH_V6T2
3825 || arch == TAG_CPU_ARCH_V6K
3826 || arch == TAG_CPU_ARCH_V7
3827 || arch == TAG_CPU_ARCH_V8
3828 || arch == TAG_CPU_ARCH_V8R);
3829 }
3830
3831 static bfd_boolean
3832 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3833 {
3834 switch (stub_type)
3835 {
3836 case arm_stub_long_branch_thumb_only:
3837 case arm_stub_long_branch_thumb2_only:
3838 case arm_stub_long_branch_thumb2_only_pure:
3839 case arm_stub_long_branch_v4t_thumb_arm:
3840 case arm_stub_short_branch_v4t_thumb_arm:
3841 case arm_stub_long_branch_v4t_thumb_arm_pic:
3842 case arm_stub_long_branch_v4t_thumb_tls_pic:
3843 case arm_stub_long_branch_thumb_only_pic:
3844 case arm_stub_cmse_branch_thumb_only:
3845 return TRUE;
3846 case arm_stub_none:
3847 BFD_FAIL ();
3848 return FALSE;
3849 break;
3850 default:
3851 return FALSE;
3852 }
3853 }
3854
3855 /* Determine the type of stub needed, if any, for a call. */
3856
3857 static enum elf32_arm_stub_type
3858 arm_type_of_stub (struct bfd_link_info *info,
3859 asection *input_sec,
3860 const Elf_Internal_Rela *rel,
3861 unsigned char st_type,
3862 enum arm_st_branch_type *actual_branch_type,
3863 struct elf32_arm_link_hash_entry *hash,
3864 bfd_vma destination,
3865 asection *sym_sec,
3866 bfd *input_bfd,
3867 const char *name)
3868 {
3869 bfd_vma location;
3870 bfd_signed_vma branch_offset;
3871 unsigned int r_type;
3872 struct elf32_arm_link_hash_table * globals;
3873 bfd_boolean thumb2, thumb2_bl, thumb_only;
3874 enum elf32_arm_stub_type stub_type = arm_stub_none;
3875 int use_plt = 0;
3876 enum arm_st_branch_type branch_type = *actual_branch_type;
3877 union gotplt_union *root_plt;
3878 struct arm_plt_info *arm_plt;
3879 int arch;
3880 int thumb2_movw;
3881
3882 if (branch_type == ST_BRANCH_LONG)
3883 return stub_type;
3884
3885 globals = elf32_arm_hash_table (info);
3886 if (globals == NULL)
3887 return stub_type;
3888
3889 thumb_only = using_thumb_only (globals);
3890 thumb2 = using_thumb2 (globals);
3891 thumb2_bl = using_thumb2_bl (globals);
3892
3893 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3894
3895 /* True for architectures that implement the thumb2 movw instruction. */
3896 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3897
3898 /* Determine where the call point is. */
3899 location = (input_sec->output_offset
3900 + input_sec->output_section->vma
3901 + rel->r_offset);
3902
3903 r_type = ELF32_R_TYPE (rel->r_info);
3904
3905 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3906 are considering a function call relocation. */
3907 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3908 || r_type == R_ARM_THM_JUMP19)
3909 && branch_type == ST_BRANCH_TO_ARM)
3910 branch_type = ST_BRANCH_TO_THUMB;
3911
3912 /* For TLS call relocs, it is the caller's responsibility to provide
3913 the address of the appropriate trampoline. */
3914 if (r_type != R_ARM_TLS_CALL
3915 && r_type != R_ARM_THM_TLS_CALL
3916 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3917 ELF32_R_SYM (rel->r_info), &root_plt,
3918 &arm_plt)
3919 && root_plt->offset != (bfd_vma) -1)
3920 {
3921 asection *splt;
3922
3923 if (hash == NULL || hash->is_iplt)
3924 splt = globals->root.iplt;
3925 else
3926 splt = globals->root.splt;
3927 if (splt != NULL)
3928 {
3929 use_plt = 1;
3930
3931 /* Note when dealing with PLT entries: the main PLT stub is in
3932 ARM mode, so if the branch is in Thumb mode, another
3933 Thumb->ARM stub will be inserted later just before the ARM
3934 PLT stub. If a long branch stub is needed, we'll add a
3935 Thumb->Arm one and branch directly to the ARM PLT entry.
3936 Here, we have to check if a pre-PLT Thumb->ARM stub
3937 is needed and if it will be close enough. */
3938
3939 destination = (splt->output_section->vma
3940 + splt->output_offset
3941 + root_plt->offset);
3942 st_type = STT_FUNC;
3943
3944 /* Thumb branch/call to PLT: it can become a branch to ARM
3945 or to Thumb. We must perform the same checks and
3946 corrections as in elf32_arm_final_link_relocate. */
3947 if ((r_type == R_ARM_THM_CALL)
3948 || (r_type == R_ARM_THM_JUMP24))
3949 {
3950 if (globals->use_blx
3951 && r_type == R_ARM_THM_CALL
3952 && !thumb_only)
3953 {
3954 /* If the Thumb BLX instruction is available, convert
3955 the BL to a BLX instruction to call the ARM-mode
3956 PLT entry. */
3957 branch_type = ST_BRANCH_TO_ARM;
3958 }
3959 else
3960 {
3961 if (!thumb_only)
3962 /* Target the Thumb stub before the ARM PLT entry. */
3963 destination -= PLT_THUMB_STUB_SIZE;
3964 branch_type = ST_BRANCH_TO_THUMB;
3965 }
3966 }
3967 else
3968 {
3969 branch_type = ST_BRANCH_TO_ARM;
3970 }
3971 }
3972 }
3973 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3974 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3975
3976 branch_offset = (bfd_signed_vma)(destination - location);
3977
3978 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3979 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3980 {
3981 /* Handle cases where:
3982 - this call goes too far (different Thumb/Thumb2 max
3983 distance)
3984 - it's a Thumb->Arm call and blx is not available, or it's a
3985 Thumb->Arm branch (not bl). A stub is needed in this case,
3986 but only if this call is not through a PLT entry. Indeed,
3987 PLT stubs handle mode switching already. */
3988 if ((!thumb2_bl
3989 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3990 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3991 || (thumb2_bl
3992 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3993 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3994 || (thumb2
3995 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3996 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3997 && (r_type == R_ARM_THM_JUMP19))
3998 || (branch_type == ST_BRANCH_TO_ARM
3999 && (((r_type == R_ARM_THM_CALL
4000 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4001 || (r_type == R_ARM_THM_JUMP24)
4002 || (r_type == R_ARM_THM_JUMP19))
4003 && !use_plt))
4004 {
4005 /* If we need to insert a Thumb-Thumb long branch stub to a
4006 PLT, use one that branches directly to the ARM PLT
4007 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4008 stub, undo this now. */
4009 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4010 {
4011 branch_type = ST_BRANCH_TO_ARM;
4012 branch_offset += PLT_THUMB_STUB_SIZE;
4013 }
4014
4015 if (branch_type == ST_BRANCH_TO_THUMB)
4016 {
4017 /* Thumb to thumb. */
4018 if (!thumb_only)
4019 {
4020 if (input_sec->flags & SEC_ELF_PURECODE)
4021 _bfd_error_handler
4022 (_("%B(%A): warning: long branch veneers used in"
4023 " section with SHF_ARM_PURECODE section"
4024 " attribute is only supported for M-profile"
4025 " targets that implement the movw instruction."),
4026 input_bfd, input_sec);
4027
4028 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4029 /* PIC stubs. */
4030 ? ((globals->use_blx
4031 && (r_type == R_ARM_THM_CALL))
4032 /* V5T and above. Stub starts with ARM code, so
4033 we must be able to switch mode before
4034 reaching it, which is only possible for 'bl'
4035 (ie R_ARM_THM_CALL relocation). */
4036 ? arm_stub_long_branch_any_thumb_pic
4037 /* On V4T, use Thumb code only. */
4038 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4039
4040 /* non-PIC stubs. */
4041 : ((globals->use_blx
4042 && (r_type == R_ARM_THM_CALL))
4043 /* V5T and above. */
4044 ? arm_stub_long_branch_any_any
4045 /* V4T. */
4046 : arm_stub_long_branch_v4t_thumb_thumb);
4047 }
4048 else
4049 {
4050 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4051 stub_type = arm_stub_long_branch_thumb2_only_pure;
4052 else
4053 {
4054 if (input_sec->flags & SEC_ELF_PURECODE)
4055 _bfd_error_handler
4056 (_("%B(%A): warning: long branch veneers used in"
4057 " section with SHF_ARM_PURECODE section"
4058 " attribute is only supported for M-profile"
4059 " targets that implement the movw instruction."),
4060 input_bfd, input_sec);
4061
4062 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4063 /* PIC stub. */
4064 ? arm_stub_long_branch_thumb_only_pic
4065 /* non-PIC stub. */
4066 : (thumb2 ? arm_stub_long_branch_thumb2_only
4067 : arm_stub_long_branch_thumb_only);
4068 }
4069 }
4070 }
4071 else
4072 {
4073 if (input_sec->flags & SEC_ELF_PURECODE)
4074 _bfd_error_handler
4075 (_("%B(%A): warning: long branch veneers used in"
4076 " section with SHF_ARM_PURECODE section"
4077 " attribute is only supported" " for M-profile"
4078 " targets that implement the movw instruction."),
4079 input_bfd, input_sec);
4080
4081 /* Thumb to arm. */
4082 if (sym_sec != NULL
4083 && sym_sec->owner != NULL
4084 && !INTERWORK_FLAG (sym_sec->owner))
4085 {
4086 _bfd_error_handler
4087 (_("%B(%s): warning: interworking not enabled.\n"
4088 " first occurrence: %B: Thumb call to ARM"),
4089 sym_sec->owner, name, input_bfd);
4090 }
4091
4092 stub_type =
4093 (bfd_link_pic (info) | globals->pic_veneer)
4094 /* PIC stubs. */
4095 ? (r_type == R_ARM_THM_TLS_CALL
4096 /* TLS PIC stubs. */
4097 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4098 : arm_stub_long_branch_v4t_thumb_tls_pic)
4099 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4100 /* V5T PIC and above. */
4101 ? arm_stub_long_branch_any_arm_pic
4102 /* V4T PIC stub. */
4103 : arm_stub_long_branch_v4t_thumb_arm_pic))
4104
4105 /* non-PIC stubs. */
4106 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4107 /* V5T and above. */
4108 ? arm_stub_long_branch_any_any
4109 /* V4T. */
4110 : arm_stub_long_branch_v4t_thumb_arm);
4111
4112 /* Handle v4t short branches. */
4113 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4114 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4115 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4116 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4117 }
4118 }
4119 }
4120 else if (r_type == R_ARM_CALL
4121 || r_type == R_ARM_JUMP24
4122 || r_type == R_ARM_PLT32
4123 || r_type == R_ARM_TLS_CALL)
4124 {
4125 if (input_sec->flags & SEC_ELF_PURECODE)
4126 _bfd_error_handler
4127 (_("%B(%A): warning: long branch veneers used in"
4128 " section with SHF_ARM_PURECODE section"
4129 " attribute is only supported for M-profile"
4130 " targets that implement the movw instruction."),
4131 input_bfd, input_sec);
4132 if (branch_type == ST_BRANCH_TO_THUMB)
4133 {
4134 /* Arm to thumb. */
4135
4136 if (sym_sec != NULL
4137 && sym_sec->owner != NULL
4138 && !INTERWORK_FLAG (sym_sec->owner))
4139 {
4140 _bfd_error_handler
4141 (_("%B(%s): warning: interworking not enabled.\n"
4142 " first occurrence: %B: ARM call to Thumb"),
4143 sym_sec->owner, name, input_bfd);
4144 }
4145
4146 /* We have an extra 2-bytes reach because of
4147 the mode change (bit 24 (H) of BLX encoding). */
4148 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4149 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4150 || (r_type == R_ARM_CALL && !globals->use_blx)
4151 || (r_type == R_ARM_JUMP24)
4152 || (r_type == R_ARM_PLT32))
4153 {
4154 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4155 /* PIC stubs. */
4156 ? ((globals->use_blx)
4157 /* V5T and above. */
4158 ? arm_stub_long_branch_any_thumb_pic
4159 /* V4T stub. */
4160 : arm_stub_long_branch_v4t_arm_thumb_pic)
4161
4162 /* non-PIC stubs. */
4163 : ((globals->use_blx)
4164 /* V5T and above. */
4165 ? arm_stub_long_branch_any_any
4166 /* V4T. */
4167 : arm_stub_long_branch_v4t_arm_thumb);
4168 }
4169 }
4170 else
4171 {
4172 /* Arm to arm. */
4173 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4174 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4175 {
4176 stub_type =
4177 (bfd_link_pic (info) | globals->pic_veneer)
4178 /* PIC stubs. */
4179 ? (r_type == R_ARM_TLS_CALL
4180 /* TLS PIC Stub. */
4181 ? arm_stub_long_branch_any_tls_pic
4182 : (globals->nacl_p
4183 ? arm_stub_long_branch_arm_nacl_pic
4184 : arm_stub_long_branch_any_arm_pic))
4185 /* non-PIC stubs. */
4186 : (globals->nacl_p
4187 ? arm_stub_long_branch_arm_nacl
4188 : arm_stub_long_branch_any_any);
4189 }
4190 }
4191 }
4192
4193 /* If a stub is needed, record the actual destination type. */
4194 if (stub_type != arm_stub_none)
4195 *actual_branch_type = branch_type;
4196
4197 return stub_type;
4198 }
4199
4200 /* Build a name for an entry in the stub hash table. */
4201
4202 static char *
4203 elf32_arm_stub_name (const asection *input_section,
4204 const asection *sym_sec,
4205 const struct elf32_arm_link_hash_entry *hash,
4206 const Elf_Internal_Rela *rel,
4207 enum elf32_arm_stub_type stub_type)
4208 {
4209 char *stub_name;
4210 bfd_size_type len;
4211
4212 if (hash)
4213 {
4214 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4215 stub_name = (char *) bfd_malloc (len);
4216 if (stub_name != NULL)
4217 sprintf (stub_name, "%08x_%s+%x_%d",
4218 input_section->id & 0xffffffff,
4219 hash->root.root.root.string,
4220 (int) rel->r_addend & 0xffffffff,
4221 (int) stub_type);
4222 }
4223 else
4224 {
4225 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4226 stub_name = (char *) bfd_malloc (len);
4227 if (stub_name != NULL)
4228 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4229 input_section->id & 0xffffffff,
4230 sym_sec->id & 0xffffffff,
4231 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4232 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4233 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4234 (int) rel->r_addend & 0xffffffff,
4235 (int) stub_type);
4236 }
4237
4238 return stub_name;
4239 }
4240
4241 /* Look up an entry in the stub hash. Stub entries are cached because
4242 creating the stub name takes a bit of time. */
4243
4244 static struct elf32_arm_stub_hash_entry *
4245 elf32_arm_get_stub_entry (const asection *input_section,
4246 const asection *sym_sec,
4247 struct elf_link_hash_entry *hash,
4248 const Elf_Internal_Rela *rel,
4249 struct elf32_arm_link_hash_table *htab,
4250 enum elf32_arm_stub_type stub_type)
4251 {
4252 struct elf32_arm_stub_hash_entry *stub_entry;
4253 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4254 const asection *id_sec;
4255
4256 if ((input_section->flags & SEC_CODE) == 0)
4257 return NULL;
4258
4259 /* If this input section is part of a group of sections sharing one
4260 stub section, then use the id of the first section in the group.
4261 Stub names need to include a section id, as there may well be
4262 more than one stub used to reach say, printf, and we need to
4263 distinguish between them. */
4264 BFD_ASSERT (input_section->id <= htab->top_id);
4265 id_sec = htab->stub_group[input_section->id].link_sec;
4266
4267 if (h != NULL && h->stub_cache != NULL
4268 && h->stub_cache->h == h
4269 && h->stub_cache->id_sec == id_sec
4270 && h->stub_cache->stub_type == stub_type)
4271 {
4272 stub_entry = h->stub_cache;
4273 }
4274 else
4275 {
4276 char *stub_name;
4277
4278 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4279 if (stub_name == NULL)
4280 return NULL;
4281
4282 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4283 stub_name, FALSE, FALSE);
4284 if (h != NULL)
4285 h->stub_cache = stub_entry;
4286
4287 free (stub_name);
4288 }
4289
4290 return stub_entry;
4291 }
4292
4293 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4294 section. */
4295
4296 static bfd_boolean
4297 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4298 {
4299 if (stub_type >= max_stub_type)
4300 abort (); /* Should be unreachable. */
4301
4302 switch (stub_type)
4303 {
4304 case arm_stub_cmse_branch_thumb_only:
4305 return TRUE;
4306
4307 default:
4308 return FALSE;
4309 }
4310
4311 abort (); /* Should be unreachable. */
4312 }
4313
4314 /* Required alignment (as a power of 2) for the dedicated section holding
4315 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4316 with input sections. */
4317
4318 static int
4319 arm_dedicated_stub_output_section_required_alignment
4320 (enum elf32_arm_stub_type stub_type)
4321 {
4322 if (stub_type >= max_stub_type)
4323 abort (); /* Should be unreachable. */
4324
4325 switch (stub_type)
4326 {
4327 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4328 boundary. */
4329 case arm_stub_cmse_branch_thumb_only:
4330 return 5;
4331
4332 default:
4333 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4334 return 0;
4335 }
4336
4337 abort (); /* Should be unreachable. */
4338 }
4339
4340 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4341 NULL if veneers of this type are interspersed with input sections. */
4342
4343 static const char *
4344 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4345 {
4346 if (stub_type >= max_stub_type)
4347 abort (); /* Should be unreachable. */
4348
4349 switch (stub_type)
4350 {
4351 case arm_stub_cmse_branch_thumb_only:
4352 return ".gnu.sgstubs";
4353
4354 default:
4355 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4356 return NULL;
4357 }
4358
4359 abort (); /* Should be unreachable. */
4360 }
4361
4362 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4363 returns the address of the hash table field in HTAB holding a pointer to the
4364 corresponding input section. Otherwise, returns NULL. */
4365
4366 static asection **
4367 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4368 enum elf32_arm_stub_type stub_type)
4369 {
4370 if (stub_type >= max_stub_type)
4371 abort (); /* Should be unreachable. */
4372
4373 switch (stub_type)
4374 {
4375 case arm_stub_cmse_branch_thumb_only:
4376 return &htab->cmse_stub_sec;
4377
4378 default:
4379 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4380 return NULL;
4381 }
4382
4383 abort (); /* Should be unreachable. */
4384 }
4385
4386 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4387 is the section that branch into veneer and can be NULL if stub should go in
4388 a dedicated output section. Returns a pointer to the stub section, and the
4389 section to which the stub section will be attached (in *LINK_SEC_P).
4390 LINK_SEC_P may be NULL. */
4391
4392 static asection *
4393 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4394 struct elf32_arm_link_hash_table *htab,
4395 enum elf32_arm_stub_type stub_type)
4396 {
4397 asection *link_sec, *out_sec, **stub_sec_p;
4398 const char *stub_sec_prefix;
4399 bfd_boolean dedicated_output_section =
4400 arm_dedicated_stub_output_section_required (stub_type);
4401 int align;
4402
4403 if (dedicated_output_section)
4404 {
4405 bfd *output_bfd = htab->obfd;
4406 const char *out_sec_name =
4407 arm_dedicated_stub_output_section_name (stub_type);
4408 link_sec = NULL;
4409 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4410 stub_sec_prefix = out_sec_name;
4411 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4412 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4413 if (out_sec == NULL)
4414 {
4415 _bfd_error_handler (_("No address assigned to the veneers output "
4416 "section %s"), out_sec_name);
4417 return NULL;
4418 }
4419 }
4420 else
4421 {
4422 BFD_ASSERT (section->id <= htab->top_id);
4423 link_sec = htab->stub_group[section->id].link_sec;
4424 BFD_ASSERT (link_sec != NULL);
4425 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4426 if (*stub_sec_p == NULL)
4427 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4428 stub_sec_prefix = link_sec->name;
4429 out_sec = link_sec->output_section;
4430 align = htab->nacl_p ? 4 : 3;
4431 }
4432
4433 if (*stub_sec_p == NULL)
4434 {
4435 size_t namelen;
4436 bfd_size_type len;
4437 char *s_name;
4438
4439 namelen = strlen (stub_sec_prefix);
4440 len = namelen + sizeof (STUB_SUFFIX);
4441 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4442 if (s_name == NULL)
4443 return NULL;
4444
4445 memcpy (s_name, stub_sec_prefix, namelen);
4446 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4447 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4448 align);
4449 if (*stub_sec_p == NULL)
4450 return NULL;
4451
4452 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4453 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4454 | SEC_KEEP;
4455 }
4456
4457 if (!dedicated_output_section)
4458 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4459
4460 if (link_sec_p)
4461 *link_sec_p = link_sec;
4462
4463 return *stub_sec_p;
4464 }
4465
4466 /* Add a new stub entry to the stub hash. Not all fields of the new
4467 stub entry are initialised. */
4468
4469 static struct elf32_arm_stub_hash_entry *
4470 elf32_arm_add_stub (const char *stub_name, asection *section,
4471 struct elf32_arm_link_hash_table *htab,
4472 enum elf32_arm_stub_type stub_type)
4473 {
4474 asection *link_sec;
4475 asection *stub_sec;
4476 struct elf32_arm_stub_hash_entry *stub_entry;
4477
4478 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4479 stub_type);
4480 if (stub_sec == NULL)
4481 return NULL;
4482
4483 /* Enter this entry into the linker stub hash table. */
4484 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4485 TRUE, FALSE);
4486 if (stub_entry == NULL)
4487 {
4488 if (section == NULL)
4489 section = stub_sec;
4490 _bfd_error_handler (_("%B: cannot create stub entry %s"),
4491 section->owner, stub_name);
4492 return NULL;
4493 }
4494
4495 stub_entry->stub_sec = stub_sec;
4496 stub_entry->stub_offset = (bfd_vma) -1;
4497 stub_entry->id_sec = link_sec;
4498
4499 return stub_entry;
4500 }
4501
4502 /* Store an Arm insn into an output section not processed by
4503 elf32_arm_write_section. */
4504
4505 static void
4506 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4507 bfd * output_bfd, bfd_vma val, void * ptr)
4508 {
4509 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4510 bfd_putl32 (val, ptr);
4511 else
4512 bfd_putb32 (val, ptr);
4513 }
4514
4515 /* Store a 16-bit Thumb insn into an output section not processed by
4516 elf32_arm_write_section. */
4517
4518 static void
4519 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4520 bfd * output_bfd, bfd_vma val, void * ptr)
4521 {
4522 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4523 bfd_putl16 (val, ptr);
4524 else
4525 bfd_putb16 (val, ptr);
4526 }
4527
4528 /* Store a Thumb2 insn into an output section not processed by
4529 elf32_arm_write_section. */
4530
4531 static void
4532 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4533 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4534 {
4535 /* T2 instructions are 16-bit streamed. */
4536 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4537 {
4538 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4539 bfd_putl16 ((val & 0xffff), ptr + 2);
4540 }
4541 else
4542 {
4543 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4544 bfd_putb16 ((val & 0xffff), ptr + 2);
4545 }
4546 }
4547
4548 /* If it's possible to change R_TYPE to a more efficient access
4549 model, return the new reloc type. */
4550
4551 static unsigned
4552 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4553 struct elf_link_hash_entry *h)
4554 {
4555 int is_local = (h == NULL);
4556
4557 if (bfd_link_pic (info)
4558 || (h && h->root.type == bfd_link_hash_undefweak))
4559 return r_type;
4560
4561 /* We do not support relaxations for Old TLS models. */
4562 switch (r_type)
4563 {
4564 case R_ARM_TLS_GOTDESC:
4565 case R_ARM_TLS_CALL:
4566 case R_ARM_THM_TLS_CALL:
4567 case R_ARM_TLS_DESCSEQ:
4568 case R_ARM_THM_TLS_DESCSEQ:
4569 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4570 }
4571
4572 return r_type;
4573 }
4574
4575 static bfd_reloc_status_type elf32_arm_final_link_relocate
4576 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4577 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4578 const char *, unsigned char, enum arm_st_branch_type,
4579 struct elf_link_hash_entry *, bfd_boolean *, char **);
4580
4581 static unsigned int
4582 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4583 {
4584 switch (stub_type)
4585 {
4586 case arm_stub_a8_veneer_b_cond:
4587 case arm_stub_a8_veneer_b:
4588 case arm_stub_a8_veneer_bl:
4589 return 2;
4590
4591 case arm_stub_long_branch_any_any:
4592 case arm_stub_long_branch_v4t_arm_thumb:
4593 case arm_stub_long_branch_thumb_only:
4594 case arm_stub_long_branch_thumb2_only:
4595 case arm_stub_long_branch_thumb2_only_pure:
4596 case arm_stub_long_branch_v4t_thumb_thumb:
4597 case arm_stub_long_branch_v4t_thumb_arm:
4598 case arm_stub_short_branch_v4t_thumb_arm:
4599 case arm_stub_long_branch_any_arm_pic:
4600 case arm_stub_long_branch_any_thumb_pic:
4601 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4602 case arm_stub_long_branch_v4t_arm_thumb_pic:
4603 case arm_stub_long_branch_v4t_thumb_arm_pic:
4604 case arm_stub_long_branch_thumb_only_pic:
4605 case arm_stub_long_branch_any_tls_pic:
4606 case arm_stub_long_branch_v4t_thumb_tls_pic:
4607 case arm_stub_cmse_branch_thumb_only:
4608 case arm_stub_a8_veneer_blx:
4609 return 4;
4610
4611 case arm_stub_long_branch_arm_nacl:
4612 case arm_stub_long_branch_arm_nacl_pic:
4613 return 16;
4614
4615 default:
4616 abort (); /* Should be unreachable. */
4617 }
4618 }
4619
4620 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4621 veneering (TRUE) or have their own symbol (FALSE). */
4622
4623 static bfd_boolean
4624 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4625 {
4626 if (stub_type >= max_stub_type)
4627 abort (); /* Should be unreachable. */
4628
4629 switch (stub_type)
4630 {
4631 case arm_stub_cmse_branch_thumb_only:
4632 return TRUE;
4633
4634 default:
4635 return FALSE;
4636 }
4637
4638 abort (); /* Should be unreachable. */
4639 }
4640
4641 /* Returns the padding needed for the dedicated section used stubs of type
4642 STUB_TYPE. */
4643
4644 static int
4645 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4646 {
4647 if (stub_type >= max_stub_type)
4648 abort (); /* Should be unreachable. */
4649
4650 switch (stub_type)
4651 {
4652 case arm_stub_cmse_branch_thumb_only:
4653 return 32;
4654
4655 default:
4656 return 0;
4657 }
4658
4659 abort (); /* Should be unreachable. */
4660 }
4661
4662 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4663 returns the address of the hash table field in HTAB holding the offset at
4664 which new veneers should be layed out in the stub section. */
4665
4666 static bfd_vma*
4667 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4668 enum elf32_arm_stub_type stub_type)
4669 {
4670 switch (stub_type)
4671 {
4672 case arm_stub_cmse_branch_thumb_only:
4673 return &htab->new_cmse_stub_offset;
4674
4675 default:
4676 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4677 return NULL;
4678 }
4679 }
4680
4681 static bfd_boolean
4682 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4683 void * in_arg)
4684 {
4685 #define MAXRELOCS 3
4686 bfd_boolean removed_sg_veneer;
4687 struct elf32_arm_stub_hash_entry *stub_entry;
4688 struct elf32_arm_link_hash_table *globals;
4689 struct bfd_link_info *info;
4690 asection *stub_sec;
4691 bfd *stub_bfd;
4692 bfd_byte *loc;
4693 bfd_vma sym_value;
4694 int template_size;
4695 int size;
4696 const insn_sequence *template_sequence;
4697 int i;
4698 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4699 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4700 int nrelocs = 0;
4701 int just_allocated = 0;
4702
4703 /* Massage our args to the form they really have. */
4704 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4705 info = (struct bfd_link_info *) in_arg;
4706
4707 globals = elf32_arm_hash_table (info);
4708 if (globals == NULL)
4709 return FALSE;
4710
4711 stub_sec = stub_entry->stub_sec;
4712
4713 if ((globals->fix_cortex_a8 < 0)
4714 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4715 /* We have to do less-strictly-aligned fixes last. */
4716 return TRUE;
4717
4718 /* Assign a slot at the end of section if none assigned yet. */
4719 if (stub_entry->stub_offset == (bfd_vma) -1)
4720 {
4721 stub_entry->stub_offset = stub_sec->size;
4722 just_allocated = 1;
4723 }
4724 loc = stub_sec->contents + stub_entry->stub_offset;
4725
4726 stub_bfd = stub_sec->owner;
4727
4728 /* This is the address of the stub destination. */
4729 sym_value = (stub_entry->target_value
4730 + stub_entry->target_section->output_offset
4731 + stub_entry->target_section->output_section->vma);
4732
4733 template_sequence = stub_entry->stub_template;
4734 template_size = stub_entry->stub_template_size;
4735
4736 size = 0;
4737 for (i = 0; i < template_size; i++)
4738 {
4739 switch (template_sequence[i].type)
4740 {
4741 case THUMB16_TYPE:
4742 {
4743 bfd_vma data = (bfd_vma) template_sequence[i].data;
4744 if (template_sequence[i].reloc_addend != 0)
4745 {
4746 /* We've borrowed the reloc_addend field to mean we should
4747 insert a condition code into this (Thumb-1 branch)
4748 instruction. See THUMB16_BCOND_INSN. */
4749 BFD_ASSERT ((data & 0xff00) == 0xd000);
4750 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4751 }
4752 bfd_put_16 (stub_bfd, data, loc + size);
4753 size += 2;
4754 }
4755 break;
4756
4757 case THUMB32_TYPE:
4758 bfd_put_16 (stub_bfd,
4759 (template_sequence[i].data >> 16) & 0xffff,
4760 loc + size);
4761 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4762 loc + size + 2);
4763 if (template_sequence[i].r_type != R_ARM_NONE)
4764 {
4765 stub_reloc_idx[nrelocs] = i;
4766 stub_reloc_offset[nrelocs++] = size;
4767 }
4768 size += 4;
4769 break;
4770
4771 case ARM_TYPE:
4772 bfd_put_32 (stub_bfd, template_sequence[i].data,
4773 loc + size);
4774 /* Handle cases where the target is encoded within the
4775 instruction. */
4776 if (template_sequence[i].r_type == R_ARM_JUMP24)
4777 {
4778 stub_reloc_idx[nrelocs] = i;
4779 stub_reloc_offset[nrelocs++] = size;
4780 }
4781 size += 4;
4782 break;
4783
4784 case DATA_TYPE:
4785 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4786 stub_reloc_idx[nrelocs] = i;
4787 stub_reloc_offset[nrelocs++] = size;
4788 size += 4;
4789 break;
4790
4791 default:
4792 BFD_FAIL ();
4793 return FALSE;
4794 }
4795 }
4796
4797 if (just_allocated)
4798 stub_sec->size += size;
4799
4800 /* Stub size has already been computed in arm_size_one_stub. Check
4801 consistency. */
4802 BFD_ASSERT (size == stub_entry->stub_size);
4803
4804 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4805 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4806 sym_value |= 1;
4807
4808 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4809 to relocate in each stub. */
4810 removed_sg_veneer =
4811 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4812 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4813
4814 for (i = 0; i < nrelocs; i++)
4815 {
4816 Elf_Internal_Rela rel;
4817 bfd_boolean unresolved_reloc;
4818 char *error_message;
4819 bfd_vma points_to =
4820 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4821
4822 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4823 rel.r_info = ELF32_R_INFO (0,
4824 template_sequence[stub_reloc_idx[i]].r_type);
4825 rel.r_addend = 0;
4826
4827 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4828 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4829 template should refer back to the instruction after the original
4830 branch. We use target_section as Cortex-A8 erratum workaround stubs
4831 are only generated when both source and target are in the same
4832 section. */
4833 points_to = stub_entry->target_section->output_section->vma
4834 + stub_entry->target_section->output_offset
4835 + stub_entry->source_value;
4836
4837 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4838 (template_sequence[stub_reloc_idx[i]].r_type),
4839 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4840 points_to, info, stub_entry->target_section, "", STT_FUNC,
4841 stub_entry->branch_type,
4842 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4843 &error_message);
4844 }
4845
4846 return TRUE;
4847 #undef MAXRELOCS
4848 }
4849
4850 /* Calculate the template, template size and instruction size for a stub.
4851 Return value is the instruction size. */
4852
4853 static unsigned int
4854 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4855 const insn_sequence **stub_template,
4856 int *stub_template_size)
4857 {
4858 const insn_sequence *template_sequence = NULL;
4859 int template_size = 0, i;
4860 unsigned int size;
4861
4862 template_sequence = stub_definitions[stub_type].template_sequence;
4863 if (stub_template)
4864 *stub_template = template_sequence;
4865
4866 template_size = stub_definitions[stub_type].template_size;
4867 if (stub_template_size)
4868 *stub_template_size = template_size;
4869
4870 size = 0;
4871 for (i = 0; i < template_size; i++)
4872 {
4873 switch (template_sequence[i].type)
4874 {
4875 case THUMB16_TYPE:
4876 size += 2;
4877 break;
4878
4879 case ARM_TYPE:
4880 case THUMB32_TYPE:
4881 case DATA_TYPE:
4882 size += 4;
4883 break;
4884
4885 default:
4886 BFD_FAIL ();
4887 return 0;
4888 }
4889 }
4890
4891 return size;
4892 }
4893
4894 /* As above, but don't actually build the stub. Just bump offset so
4895 we know stub section sizes. */
4896
4897 static bfd_boolean
4898 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4899 void *in_arg ATTRIBUTE_UNUSED)
4900 {
4901 struct elf32_arm_stub_hash_entry *stub_entry;
4902 const insn_sequence *template_sequence;
4903 int template_size, size;
4904
4905 /* Massage our args to the form they really have. */
4906 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4907
4908 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4909 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4910
4911 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4912 &template_size);
4913
4914 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4915 if (stub_entry->stub_template_size)
4916 {
4917 stub_entry->stub_size = size;
4918 stub_entry->stub_template = template_sequence;
4919 stub_entry->stub_template_size = template_size;
4920 }
4921
4922 /* Already accounted for. */
4923 if (stub_entry->stub_offset != (bfd_vma) -1)
4924 return TRUE;
4925
4926 size = (size + 7) & ~7;
4927 stub_entry->stub_sec->size += size;
4928
4929 return TRUE;
4930 }
4931
4932 /* External entry points for sizing and building linker stubs. */
4933
4934 /* Set up various things so that we can make a list of input sections
4935 for each output section included in the link. Returns -1 on error,
4936 0 when no stubs will be needed, and 1 on success. */
4937
4938 int
4939 elf32_arm_setup_section_lists (bfd *output_bfd,
4940 struct bfd_link_info *info)
4941 {
4942 bfd *input_bfd;
4943 unsigned int bfd_count;
4944 unsigned int top_id, top_index;
4945 asection *section;
4946 asection **input_list, **list;
4947 bfd_size_type amt;
4948 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4949
4950 if (htab == NULL)
4951 return 0;
4952 if (! is_elf_hash_table (htab))
4953 return 0;
4954
4955 /* Count the number of input BFDs and find the top input section id. */
4956 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4957 input_bfd != NULL;
4958 input_bfd = input_bfd->link.next)
4959 {
4960 bfd_count += 1;
4961 for (section = input_bfd->sections;
4962 section != NULL;
4963 section = section->next)
4964 {
4965 if (top_id < section->id)
4966 top_id = section->id;
4967 }
4968 }
4969 htab->bfd_count = bfd_count;
4970
4971 amt = sizeof (struct map_stub) * (top_id + 1);
4972 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4973 if (htab->stub_group == NULL)
4974 return -1;
4975 htab->top_id = top_id;
4976
4977 /* We can't use output_bfd->section_count here to find the top output
4978 section index as some sections may have been removed, and
4979 _bfd_strip_section_from_output doesn't renumber the indices. */
4980 for (section = output_bfd->sections, top_index = 0;
4981 section != NULL;
4982 section = section->next)
4983 {
4984 if (top_index < section->index)
4985 top_index = section->index;
4986 }
4987
4988 htab->top_index = top_index;
4989 amt = sizeof (asection *) * (top_index + 1);
4990 input_list = (asection **) bfd_malloc (amt);
4991 htab->input_list = input_list;
4992 if (input_list == NULL)
4993 return -1;
4994
4995 /* For sections we aren't interested in, mark their entries with a
4996 value we can check later. */
4997 list = input_list + top_index;
4998 do
4999 *list = bfd_abs_section_ptr;
5000 while (list-- != input_list);
5001
5002 for (section = output_bfd->sections;
5003 section != NULL;
5004 section = section->next)
5005 {
5006 if ((section->flags & SEC_CODE) != 0)
5007 input_list[section->index] = NULL;
5008 }
5009
5010 return 1;
5011 }
5012
5013 /* The linker repeatedly calls this function for each input section,
5014 in the order that input sections are linked into output sections.
5015 Build lists of input sections to determine groupings between which
5016 we may insert linker stubs. */
5017
5018 void
5019 elf32_arm_next_input_section (struct bfd_link_info *info,
5020 asection *isec)
5021 {
5022 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5023
5024 if (htab == NULL)
5025 return;
5026
5027 if (isec->output_section->index <= htab->top_index)
5028 {
5029 asection **list = htab->input_list + isec->output_section->index;
5030
5031 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5032 {
5033 /* Steal the link_sec pointer for our list. */
5034 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5035 /* This happens to make the list in reverse order,
5036 which we reverse later. */
5037 PREV_SEC (isec) = *list;
5038 *list = isec;
5039 }
5040 }
5041 }
5042
5043 /* See whether we can group stub sections together. Grouping stub
5044 sections may result in fewer stubs. More importantly, we need to
5045 put all .init* and .fini* stubs at the end of the .init or
5046 .fini output sections respectively, because glibc splits the
5047 _init and _fini functions into multiple parts. Putting a stub in
5048 the middle of a function is not a good idea. */
5049
5050 static void
5051 group_sections (struct elf32_arm_link_hash_table *htab,
5052 bfd_size_type stub_group_size,
5053 bfd_boolean stubs_always_after_branch)
5054 {
5055 asection **list = htab->input_list;
5056
5057 do
5058 {
5059 asection *tail = *list;
5060 asection *head;
5061
5062 if (tail == bfd_abs_section_ptr)
5063 continue;
5064
5065 /* Reverse the list: we must avoid placing stubs at the
5066 beginning of the section because the beginning of the text
5067 section may be required for an interrupt vector in bare metal
5068 code. */
5069 #define NEXT_SEC PREV_SEC
5070 head = NULL;
5071 while (tail != NULL)
5072 {
5073 /* Pop from tail. */
5074 asection *item = tail;
5075 tail = PREV_SEC (item);
5076
5077 /* Push on head. */
5078 NEXT_SEC (item) = head;
5079 head = item;
5080 }
5081
5082 while (head != NULL)
5083 {
5084 asection *curr;
5085 asection *next;
5086 bfd_vma stub_group_start = head->output_offset;
5087 bfd_vma end_of_next;
5088
5089 curr = head;
5090 while (NEXT_SEC (curr) != NULL)
5091 {
5092 next = NEXT_SEC (curr);
5093 end_of_next = next->output_offset + next->size;
5094 if (end_of_next - stub_group_start >= stub_group_size)
5095 /* End of NEXT is too far from start, so stop. */
5096 break;
5097 /* Add NEXT to the group. */
5098 curr = next;
5099 }
5100
5101 /* OK, the size from the start to the start of CURR is less
5102 than stub_group_size and thus can be handled by one stub
5103 section. (Or the head section is itself larger than
5104 stub_group_size, in which case we may be toast.)
5105 We should really be keeping track of the total size of
5106 stubs added here, as stubs contribute to the final output
5107 section size. */
5108 do
5109 {
5110 next = NEXT_SEC (head);
5111 /* Set up this stub group. */
5112 htab->stub_group[head->id].link_sec = curr;
5113 }
5114 while (head != curr && (head = next) != NULL);
5115
5116 /* But wait, there's more! Input sections up to stub_group_size
5117 bytes after the stub section can be handled by it too. */
5118 if (!stubs_always_after_branch)
5119 {
5120 stub_group_start = curr->output_offset + curr->size;
5121
5122 while (next != NULL)
5123 {
5124 end_of_next = next->output_offset + next->size;
5125 if (end_of_next - stub_group_start >= stub_group_size)
5126 /* End of NEXT is too far from stubs, so stop. */
5127 break;
5128 /* Add NEXT to the stub group. */
5129 head = next;
5130 next = NEXT_SEC (head);
5131 htab->stub_group[head->id].link_sec = curr;
5132 }
5133 }
5134 head = next;
5135 }
5136 }
5137 while (list++ != htab->input_list + htab->top_index);
5138
5139 free (htab->input_list);
5140 #undef PREV_SEC
5141 #undef NEXT_SEC
5142 }
5143
5144 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5145 erratum fix. */
5146
5147 static int
5148 a8_reloc_compare (const void *a, const void *b)
5149 {
5150 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5151 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5152
5153 if (ra->from < rb->from)
5154 return -1;
5155 else if (ra->from > rb->from)
5156 return 1;
5157 else
5158 return 0;
5159 }
5160
5161 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5162 const char *, char **);
5163
5164 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5165 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5166 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5167 otherwise. */
5168
5169 static bfd_boolean
5170 cortex_a8_erratum_scan (bfd *input_bfd,
5171 struct bfd_link_info *info,
5172 struct a8_erratum_fix **a8_fixes_p,
5173 unsigned int *num_a8_fixes_p,
5174 unsigned int *a8_fix_table_size_p,
5175 struct a8_erratum_reloc *a8_relocs,
5176 unsigned int num_a8_relocs,
5177 unsigned prev_num_a8_fixes,
5178 bfd_boolean *stub_changed_p)
5179 {
5180 asection *section;
5181 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5182 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5183 unsigned int num_a8_fixes = *num_a8_fixes_p;
5184 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5185
5186 if (htab == NULL)
5187 return FALSE;
5188
5189 for (section = input_bfd->sections;
5190 section != NULL;
5191 section = section->next)
5192 {
5193 bfd_byte *contents = NULL;
5194 struct _arm_elf_section_data *sec_data;
5195 unsigned int span;
5196 bfd_vma base_vma;
5197
5198 if (elf_section_type (section) != SHT_PROGBITS
5199 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5200 || (section->flags & SEC_EXCLUDE) != 0
5201 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5202 || (section->output_section == bfd_abs_section_ptr))
5203 continue;
5204
5205 base_vma = section->output_section->vma + section->output_offset;
5206
5207 if (elf_section_data (section)->this_hdr.contents != NULL)
5208 contents = elf_section_data (section)->this_hdr.contents;
5209 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5210 return TRUE;
5211
5212 sec_data = elf32_arm_section_data (section);
5213
5214 for (span = 0; span < sec_data->mapcount; span++)
5215 {
5216 unsigned int span_start = sec_data->map[span].vma;
5217 unsigned int span_end = (span == sec_data->mapcount - 1)
5218 ? section->size : sec_data->map[span + 1].vma;
5219 unsigned int i;
5220 char span_type = sec_data->map[span].type;
5221 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5222
5223 if (span_type != 't')
5224 continue;
5225
5226 /* Span is entirely within a single 4KB region: skip scanning. */
5227 if (((base_vma + span_start) & ~0xfff)
5228 == ((base_vma + span_end) & ~0xfff))
5229 continue;
5230
5231 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5232
5233 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5234 * The branch target is in the same 4KB region as the
5235 first half of the branch.
5236 * The instruction before the branch is a 32-bit
5237 length non-branch instruction. */
5238 for (i = span_start; i < span_end;)
5239 {
5240 unsigned int insn = bfd_getl16 (&contents[i]);
5241 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5242 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5243
5244 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5245 insn_32bit = TRUE;
5246
5247 if (insn_32bit)
5248 {
5249 /* Load the rest of the insn (in manual-friendly order). */
5250 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5251
5252 /* Encoding T4: B<c>.W. */
5253 is_b = (insn & 0xf800d000) == 0xf0009000;
5254 /* Encoding T1: BL<c>.W. */
5255 is_bl = (insn & 0xf800d000) == 0xf000d000;
5256 /* Encoding T2: BLX<c>.W. */
5257 is_blx = (insn & 0xf800d000) == 0xf000c000;
5258 /* Encoding T3: B<c>.W (not permitted in IT block). */
5259 is_bcc = (insn & 0xf800d000) == 0xf0008000
5260 && (insn & 0x07f00000) != 0x03800000;
5261 }
5262
5263 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5264
5265 if (((base_vma + i) & 0xfff) == 0xffe
5266 && insn_32bit
5267 && is_32bit_branch
5268 && last_was_32bit
5269 && ! last_was_branch)
5270 {
5271 bfd_signed_vma offset = 0;
5272 bfd_boolean force_target_arm = FALSE;
5273 bfd_boolean force_target_thumb = FALSE;
5274 bfd_vma target;
5275 enum elf32_arm_stub_type stub_type = arm_stub_none;
5276 struct a8_erratum_reloc key, *found;
5277 bfd_boolean use_plt = FALSE;
5278
5279 key.from = base_vma + i;
5280 found = (struct a8_erratum_reloc *)
5281 bsearch (&key, a8_relocs, num_a8_relocs,
5282 sizeof (struct a8_erratum_reloc),
5283 &a8_reloc_compare);
5284
5285 if (found)
5286 {
5287 char *error_message = NULL;
5288 struct elf_link_hash_entry *entry;
5289
5290 /* We don't care about the error returned from this
5291 function, only if there is glue or not. */
5292 entry = find_thumb_glue (info, found->sym_name,
5293 &error_message);
5294
5295 if (entry)
5296 found->non_a8_stub = TRUE;
5297
5298 /* Keep a simpler condition, for the sake of clarity. */
5299 if (htab->root.splt != NULL && found->hash != NULL
5300 && found->hash->root.plt.offset != (bfd_vma) -1)
5301 use_plt = TRUE;
5302
5303 if (found->r_type == R_ARM_THM_CALL)
5304 {
5305 if (found->branch_type == ST_BRANCH_TO_ARM
5306 || use_plt)
5307 force_target_arm = TRUE;
5308 else
5309 force_target_thumb = TRUE;
5310 }
5311 }
5312
5313 /* Check if we have an offending branch instruction. */
5314
5315 if (found && found->non_a8_stub)
5316 /* We've already made a stub for this instruction, e.g.
5317 it's a long branch or a Thumb->ARM stub. Assume that
5318 stub will suffice to work around the A8 erratum (see
5319 setting of always_after_branch above). */
5320 ;
5321 else if (is_bcc)
5322 {
5323 offset = (insn & 0x7ff) << 1;
5324 offset |= (insn & 0x3f0000) >> 4;
5325 offset |= (insn & 0x2000) ? 0x40000 : 0;
5326 offset |= (insn & 0x800) ? 0x80000 : 0;
5327 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5328 if (offset & 0x100000)
5329 offset |= ~ ((bfd_signed_vma) 0xfffff);
5330 stub_type = arm_stub_a8_veneer_b_cond;
5331 }
5332 else if (is_b || is_bl || is_blx)
5333 {
5334 int s = (insn & 0x4000000) != 0;
5335 int j1 = (insn & 0x2000) != 0;
5336 int j2 = (insn & 0x800) != 0;
5337 int i1 = !(j1 ^ s);
5338 int i2 = !(j2 ^ s);
5339
5340 offset = (insn & 0x7ff) << 1;
5341 offset |= (insn & 0x3ff0000) >> 4;
5342 offset |= i2 << 22;
5343 offset |= i1 << 23;
5344 offset |= s << 24;
5345 if (offset & 0x1000000)
5346 offset |= ~ ((bfd_signed_vma) 0xffffff);
5347
5348 if (is_blx)
5349 offset &= ~ ((bfd_signed_vma) 3);
5350
5351 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5352 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5353 }
5354
5355 if (stub_type != arm_stub_none)
5356 {
5357 bfd_vma pc_for_insn = base_vma + i + 4;
5358
5359 /* The original instruction is a BL, but the target is
5360 an ARM instruction. If we were not making a stub,
5361 the BL would have been converted to a BLX. Use the
5362 BLX stub instead in that case. */
5363 if (htab->use_blx && force_target_arm
5364 && stub_type == arm_stub_a8_veneer_bl)
5365 {
5366 stub_type = arm_stub_a8_veneer_blx;
5367 is_blx = TRUE;
5368 is_bl = FALSE;
5369 }
5370 /* Conversely, if the original instruction was
5371 BLX but the target is Thumb mode, use the BL
5372 stub. */
5373 else if (force_target_thumb
5374 && stub_type == arm_stub_a8_veneer_blx)
5375 {
5376 stub_type = arm_stub_a8_veneer_bl;
5377 is_blx = FALSE;
5378 is_bl = TRUE;
5379 }
5380
5381 if (is_blx)
5382 pc_for_insn &= ~ ((bfd_vma) 3);
5383
5384 /* If we found a relocation, use the proper destination,
5385 not the offset in the (unrelocated) instruction.
5386 Note this is always done if we switched the stub type
5387 above. */
5388 if (found)
5389 offset =
5390 (bfd_signed_vma) (found->destination - pc_for_insn);
5391
5392 /* If the stub will use a Thumb-mode branch to a
5393 PLT target, redirect it to the preceding Thumb
5394 entry point. */
5395 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5396 offset -= PLT_THUMB_STUB_SIZE;
5397
5398 target = pc_for_insn + offset;
5399
5400 /* The BLX stub is ARM-mode code. Adjust the offset to
5401 take the different PC value (+8 instead of +4) into
5402 account. */
5403 if (stub_type == arm_stub_a8_veneer_blx)
5404 offset += 4;
5405
5406 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5407 {
5408 char *stub_name = NULL;
5409
5410 if (num_a8_fixes == a8_fix_table_size)
5411 {
5412 a8_fix_table_size *= 2;
5413 a8_fixes = (struct a8_erratum_fix *)
5414 bfd_realloc (a8_fixes,
5415 sizeof (struct a8_erratum_fix)
5416 * a8_fix_table_size);
5417 }
5418
5419 if (num_a8_fixes < prev_num_a8_fixes)
5420 {
5421 /* If we're doing a subsequent scan,
5422 check if we've found the same fix as
5423 before, and try and reuse the stub
5424 name. */
5425 stub_name = a8_fixes[num_a8_fixes].stub_name;
5426 if ((a8_fixes[num_a8_fixes].section != section)
5427 || (a8_fixes[num_a8_fixes].offset != i))
5428 {
5429 free (stub_name);
5430 stub_name = NULL;
5431 *stub_changed_p = TRUE;
5432 }
5433 }
5434
5435 if (!stub_name)
5436 {
5437 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5438 if (stub_name != NULL)
5439 sprintf (stub_name, "%x:%x", section->id, i);
5440 }
5441
5442 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5443 a8_fixes[num_a8_fixes].section = section;
5444 a8_fixes[num_a8_fixes].offset = i;
5445 a8_fixes[num_a8_fixes].target_offset =
5446 target - base_vma;
5447 a8_fixes[num_a8_fixes].orig_insn = insn;
5448 a8_fixes[num_a8_fixes].stub_name = stub_name;
5449 a8_fixes[num_a8_fixes].stub_type = stub_type;
5450 a8_fixes[num_a8_fixes].branch_type =
5451 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5452
5453 num_a8_fixes++;
5454 }
5455 }
5456 }
5457
5458 i += insn_32bit ? 4 : 2;
5459 last_was_32bit = insn_32bit;
5460 last_was_branch = is_32bit_branch;
5461 }
5462 }
5463
5464 if (elf_section_data (section)->this_hdr.contents == NULL)
5465 free (contents);
5466 }
5467
5468 *a8_fixes_p = a8_fixes;
5469 *num_a8_fixes_p = num_a8_fixes;
5470 *a8_fix_table_size_p = a8_fix_table_size;
5471
5472 return FALSE;
5473 }
5474
5475 /* Create or update a stub entry depending on whether the stub can already be
5476 found in HTAB. The stub is identified by:
5477 - its type STUB_TYPE
5478 - its source branch (note that several can share the same stub) whose
5479 section and relocation (if any) are given by SECTION and IRELA
5480 respectively
5481 - its target symbol whose input section, hash, name, value and branch type
5482 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5483 respectively
5484
5485 If found, the value of the stub's target symbol is updated from SYM_VALUE
5486 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5487 TRUE and the stub entry is initialized.
5488
5489 Returns the stub that was created or updated, or NULL if an error
5490 occurred. */
5491
5492 static struct elf32_arm_stub_hash_entry *
5493 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5494 enum elf32_arm_stub_type stub_type, asection *section,
5495 Elf_Internal_Rela *irela, asection *sym_sec,
5496 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5497 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5498 bfd_boolean *new_stub)
5499 {
5500 const asection *id_sec;
5501 char *stub_name;
5502 struct elf32_arm_stub_hash_entry *stub_entry;
5503 unsigned int r_type;
5504 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5505
5506 BFD_ASSERT (stub_type != arm_stub_none);
5507 *new_stub = FALSE;
5508
5509 if (sym_claimed)
5510 stub_name = sym_name;
5511 else
5512 {
5513 BFD_ASSERT (irela);
5514 BFD_ASSERT (section);
5515 BFD_ASSERT (section->id <= htab->top_id);
5516
5517 /* Support for grouping stub sections. */
5518 id_sec = htab->stub_group[section->id].link_sec;
5519
5520 /* Get the name of this stub. */
5521 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5522 stub_type);
5523 if (!stub_name)
5524 return NULL;
5525 }
5526
5527 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5528 FALSE);
5529 /* The proper stub has already been created, just update its value. */
5530 if (stub_entry != NULL)
5531 {
5532 if (!sym_claimed)
5533 free (stub_name);
5534 stub_entry->target_value = sym_value;
5535 return stub_entry;
5536 }
5537
5538 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5539 if (stub_entry == NULL)
5540 {
5541 if (!sym_claimed)
5542 free (stub_name);
5543 return NULL;
5544 }
5545
5546 stub_entry->target_value = sym_value;
5547 stub_entry->target_section = sym_sec;
5548 stub_entry->stub_type = stub_type;
5549 stub_entry->h = hash;
5550 stub_entry->branch_type = branch_type;
5551
5552 if (sym_claimed)
5553 stub_entry->output_name = sym_name;
5554 else
5555 {
5556 if (sym_name == NULL)
5557 sym_name = "unnamed";
5558 stub_entry->output_name = (char *)
5559 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5560 + strlen (sym_name));
5561 if (stub_entry->output_name == NULL)
5562 {
5563 free (stub_name);
5564 return NULL;
5565 }
5566
5567 /* For historical reasons, use the existing names for ARM-to-Thumb and
5568 Thumb-to-ARM stubs. */
5569 r_type = ELF32_R_TYPE (irela->r_info);
5570 if ((r_type == (unsigned int) R_ARM_THM_CALL
5571 || r_type == (unsigned int) R_ARM_THM_JUMP24
5572 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5573 && branch_type == ST_BRANCH_TO_ARM)
5574 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5575 else if ((r_type == (unsigned int) R_ARM_CALL
5576 || r_type == (unsigned int) R_ARM_JUMP24)
5577 && branch_type == ST_BRANCH_TO_THUMB)
5578 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5579 else
5580 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5581 }
5582
5583 *new_stub = TRUE;
5584 return stub_entry;
5585 }
5586
5587 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5588 gateway veneer to transition from non secure to secure state and create them
5589 accordingly.
5590
5591 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5592 defines the conditions that govern Secure Gateway veneer creation for a
5593 given symbol <SYM> as follows:
5594 - it has function type
5595 - it has non local binding
5596 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5597 same type, binding and value as <SYM> (called normal symbol).
5598 An entry function can handle secure state transition itself in which case
5599 its special symbol would have a different value from the normal symbol.
5600
5601 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5602 entry mapping while HTAB gives the name to hash entry mapping.
5603 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5604 created.
5605
5606 The return value gives whether a stub failed to be allocated. */
5607
5608 static bfd_boolean
5609 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5610 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5611 int *cmse_stub_created)
5612 {
5613 const struct elf_backend_data *bed;
5614 Elf_Internal_Shdr *symtab_hdr;
5615 unsigned i, j, sym_count, ext_start;
5616 Elf_Internal_Sym *cmse_sym, *local_syms;
5617 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5618 enum arm_st_branch_type branch_type;
5619 char *sym_name, *lsym_name;
5620 bfd_vma sym_value;
5621 asection *section;
5622 struct elf32_arm_stub_hash_entry *stub_entry;
5623 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5624
5625 bed = get_elf_backend_data (input_bfd);
5626 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5627 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5628 ext_start = symtab_hdr->sh_info;
5629 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5630 && out_attr[Tag_CPU_arch_profile].i == 'M');
5631
5632 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5633 if (local_syms == NULL)
5634 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5635 symtab_hdr->sh_info, 0, NULL, NULL,
5636 NULL);
5637 if (symtab_hdr->sh_info && local_syms == NULL)
5638 return FALSE;
5639
5640 /* Scan symbols. */
5641 for (i = 0; i < sym_count; i++)
5642 {
5643 cmse_invalid = FALSE;
5644
5645 if (i < ext_start)
5646 {
5647 cmse_sym = &local_syms[i];
5648 /* Not a special symbol. */
5649 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5650 continue;
5651 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5652 symtab_hdr->sh_link,
5653 cmse_sym->st_name);
5654 /* Special symbol with local binding. */
5655 cmse_invalid = TRUE;
5656 }
5657 else
5658 {
5659 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5660 sym_name = (char *) cmse_hash->root.root.root.string;
5661
5662 /* Not a special symbol. */
5663 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5664 continue;
5665
5666 /* Special symbol has incorrect binding or type. */
5667 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5668 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5669 || cmse_hash->root.type != STT_FUNC)
5670 cmse_invalid = TRUE;
5671 }
5672
5673 if (!is_v8m)
5674 {
5675 _bfd_error_handler (_("%B: Special symbol `%s' only allowed for "
5676 "ARMv8-M architecture or later."),
5677 input_bfd, sym_name);
5678 is_v8m = TRUE; /* Avoid multiple warning. */
5679 ret = FALSE;
5680 }
5681
5682 if (cmse_invalid)
5683 {
5684 _bfd_error_handler (_("%B: invalid special symbol `%s'."),
5685 input_bfd, sym_name);
5686 _bfd_error_handler (_("It must be a global or weak function "
5687 "symbol."));
5688 ret = FALSE;
5689 if (i < ext_start)
5690 continue;
5691 }
5692
5693 sym_name += strlen (CMSE_PREFIX);
5694 hash = (struct elf32_arm_link_hash_entry *)
5695 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5696
5697 /* No associated normal symbol or it is neither global nor weak. */
5698 if (!hash
5699 || (hash->root.root.type != bfd_link_hash_defined
5700 && hash->root.root.type != bfd_link_hash_defweak)
5701 || hash->root.type != STT_FUNC)
5702 {
5703 /* Initialize here to avoid warning about use of possibly
5704 uninitialized variable. */
5705 j = 0;
5706
5707 if (!hash)
5708 {
5709 /* Searching for a normal symbol with local binding. */
5710 for (; j < ext_start; j++)
5711 {
5712 lsym_name =
5713 bfd_elf_string_from_elf_section (input_bfd,
5714 symtab_hdr->sh_link,
5715 local_syms[j].st_name);
5716 if (!strcmp (sym_name, lsym_name))
5717 break;
5718 }
5719 }
5720
5721 if (hash || j < ext_start)
5722 {
5723 _bfd_error_handler
5724 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5725 _bfd_error_handler
5726 (_("It must be a global or weak function symbol."));
5727 }
5728 else
5729 _bfd_error_handler
5730 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5731 ret = FALSE;
5732 if (!hash)
5733 continue;
5734 }
5735
5736 sym_value = hash->root.root.u.def.value;
5737 section = hash->root.root.u.def.section;
5738
5739 if (cmse_hash->root.root.u.def.section != section)
5740 {
5741 _bfd_error_handler
5742 (_("%B: `%s' and its special symbol are in different sections."),
5743 input_bfd, sym_name);
5744 ret = FALSE;
5745 }
5746 if (cmse_hash->root.root.u.def.value != sym_value)
5747 continue; /* Ignore: could be an entry function starting with SG. */
5748
5749 /* If this section is a link-once section that will be discarded, then
5750 don't create any stubs. */
5751 if (section->output_section == NULL)
5752 {
5753 _bfd_error_handler
5754 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5755 continue;
5756 }
5757
5758 if (hash->root.size == 0)
5759 {
5760 _bfd_error_handler
5761 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5762 ret = FALSE;
5763 }
5764
5765 if (!ret)
5766 continue;
5767 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5768 stub_entry
5769 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5770 NULL, NULL, section, hash, sym_name,
5771 sym_value, branch_type, &new_stub);
5772
5773 if (stub_entry == NULL)
5774 ret = FALSE;
5775 else
5776 {
5777 BFD_ASSERT (new_stub);
5778 (*cmse_stub_created)++;
5779 }
5780 }
5781
5782 if (!symtab_hdr->contents)
5783 free (local_syms);
5784 return ret;
5785 }
5786
5787 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5788 code entry function, ie can be called from non secure code without using a
5789 veneer. */
5790
5791 static bfd_boolean
5792 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5793 {
5794 bfd_byte contents[4];
5795 uint32_t first_insn;
5796 asection *section;
5797 file_ptr offset;
5798 bfd *abfd;
5799
5800 /* Defined symbol of function type. */
5801 if (hash->root.root.type != bfd_link_hash_defined
5802 && hash->root.root.type != bfd_link_hash_defweak)
5803 return FALSE;
5804 if (hash->root.type != STT_FUNC)
5805 return FALSE;
5806
5807 /* Read first instruction. */
5808 section = hash->root.root.u.def.section;
5809 abfd = section->owner;
5810 offset = hash->root.root.u.def.value - section->vma;
5811 if (!bfd_get_section_contents (abfd, section, contents, offset,
5812 sizeof (contents)))
5813 return FALSE;
5814
5815 first_insn = bfd_get_32 (abfd, contents);
5816
5817 /* Starts by SG instruction. */
5818 return first_insn == 0xe97fe97f;
5819 }
5820
5821 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5822 secure gateway veneers (ie. the veneers was not in the input import library)
5823 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5824
5825 static bfd_boolean
5826 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5827 {
5828 struct elf32_arm_stub_hash_entry *stub_entry;
5829 struct bfd_link_info *info;
5830
5831 /* Massage our args to the form they really have. */
5832 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5833 info = (struct bfd_link_info *) gen_info;
5834
5835 if (info->out_implib_bfd)
5836 return TRUE;
5837
5838 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5839 return TRUE;
5840
5841 if (stub_entry->stub_offset == (bfd_vma) -1)
5842 _bfd_error_handler (" %s", stub_entry->output_name);
5843
5844 return TRUE;
5845 }
5846
5847 /* Set offset of each secure gateway veneers so that its address remain
5848 identical to the one in the input import library referred by
5849 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5850 (present in input import library but absent from the executable being
5851 linked) or if new veneers appeared and there is no output import library
5852 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5853 number of secure gateway veneers found in the input import library.
5854
5855 The function returns whether an error occurred. If no error occurred,
5856 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5857 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5858 veneer observed set for new veneers to be layed out after. */
5859
5860 static bfd_boolean
5861 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5862 struct elf32_arm_link_hash_table *htab,
5863 int *cmse_stub_created)
5864 {
5865 long symsize;
5866 char *sym_name;
5867 flagword flags;
5868 long i, symcount;
5869 bfd *in_implib_bfd;
5870 asection *stub_out_sec;
5871 bfd_boolean ret = TRUE;
5872 Elf_Internal_Sym *intsym;
5873 const char *out_sec_name;
5874 bfd_size_type cmse_stub_size;
5875 asymbol **sympp = NULL, *sym;
5876 struct elf32_arm_link_hash_entry *hash;
5877 const insn_sequence *cmse_stub_template;
5878 struct elf32_arm_stub_hash_entry *stub_entry;
5879 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5880 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5881 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5882
5883 /* No input secure gateway import library. */
5884 if (!htab->in_implib_bfd)
5885 return TRUE;
5886
5887 in_implib_bfd = htab->in_implib_bfd;
5888 if (!htab->cmse_implib)
5889 {
5890 _bfd_error_handler (_("%B: --in-implib only supported for Secure "
5891 "Gateway import libraries."), in_implib_bfd);
5892 return FALSE;
5893 }
5894
5895 /* Get symbol table size. */
5896 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5897 if (symsize < 0)
5898 return FALSE;
5899
5900 /* Read in the input secure gateway import library's symbol table. */
5901 sympp = (asymbol **) xmalloc (symsize);
5902 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5903 if (symcount < 0)
5904 {
5905 ret = FALSE;
5906 goto free_sym_buf;
5907 }
5908
5909 htab->new_cmse_stub_offset = 0;
5910 cmse_stub_size =
5911 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5912 &cmse_stub_template,
5913 &cmse_stub_template_size);
5914 out_sec_name =
5915 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5916 stub_out_sec =
5917 bfd_get_section_by_name (htab->obfd, out_sec_name);
5918 if (stub_out_sec != NULL)
5919 cmse_stub_sec_vma = stub_out_sec->vma;
5920
5921 /* Set addresses of veneers mentionned in input secure gateway import
5922 library's symbol table. */
5923 for (i = 0; i < symcount; i++)
5924 {
5925 sym = sympp[i];
5926 flags = sym->flags;
5927 sym_name = (char *) bfd_asymbol_name (sym);
5928 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5929
5930 if (sym->section != bfd_abs_section_ptr
5931 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5932 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5933 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5934 != ST_BRANCH_TO_THUMB))
5935 {
5936 _bfd_error_handler (_("%B: invalid import library entry: `%s'."),
5937 in_implib_bfd, sym_name);
5938 _bfd_error_handler (_("Symbol should be absolute, global and "
5939 "refer to Thumb functions."));
5940 ret = FALSE;
5941 continue;
5942 }
5943
5944 veneer_value = bfd_asymbol_value (sym);
5945 stub_offset = veneer_value - cmse_stub_sec_vma;
5946 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5947 FALSE, FALSE);
5948 hash = (struct elf32_arm_link_hash_entry *)
5949 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5950
5951 /* Stub entry should have been created by cmse_scan or the symbol be of
5952 a secure function callable from non secure code. */
5953 if (!stub_entry && !hash)
5954 {
5955 bfd_boolean new_stub;
5956
5957 _bfd_error_handler
5958 (_("Entry function `%s' disappeared from secure code."), sym_name);
5959 hash = (struct elf32_arm_link_hash_entry *)
5960 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5961 stub_entry
5962 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5963 NULL, NULL, bfd_abs_section_ptr, hash,
5964 sym_name, veneer_value,
5965 ST_BRANCH_TO_THUMB, &new_stub);
5966 if (stub_entry == NULL)
5967 ret = FALSE;
5968 else
5969 {
5970 BFD_ASSERT (new_stub);
5971 new_cmse_stubs_created++;
5972 (*cmse_stub_created)++;
5973 }
5974 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5975 stub_entry->stub_offset = stub_offset;
5976 }
5977 /* Symbol found is not callable from non secure code. */
5978 else if (!stub_entry)
5979 {
5980 if (!cmse_entry_fct_p (hash))
5981 {
5982 _bfd_error_handler (_("`%s' refers to a non entry function."),
5983 sym_name);
5984 ret = FALSE;
5985 }
5986 continue;
5987 }
5988 else
5989 {
5990 /* Only stubs for SG veneers should have been created. */
5991 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5992
5993 /* Check visibility hasn't changed. */
5994 if (!!(flags & BSF_GLOBAL)
5995 != (hash->root.root.type == bfd_link_hash_defined))
5996 _bfd_error_handler
5997 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
5998 sym_name);
5999
6000 stub_entry->stub_offset = stub_offset;
6001 }
6002
6003 /* Size should match that of a SG veneer. */
6004 if (intsym->st_size != cmse_stub_size)
6005 {
6006 _bfd_error_handler (_("%B: incorrect size for symbol `%s'."),
6007 in_implib_bfd, sym_name);
6008 ret = FALSE;
6009 }
6010
6011 /* Previous veneer address is before current SG veneer section. */
6012 if (veneer_value < cmse_stub_sec_vma)
6013 {
6014 /* Avoid offset underflow. */
6015 if (stub_entry)
6016 stub_entry->stub_offset = 0;
6017 stub_offset = 0;
6018 ret = FALSE;
6019 }
6020
6021 /* Complain if stub offset not a multiple of stub size. */
6022 if (stub_offset % cmse_stub_size)
6023 {
6024 _bfd_error_handler
6025 (_("Offset of veneer for entry function `%s' not a multiple of "
6026 "its size."), sym_name);
6027 ret = FALSE;
6028 }
6029
6030 if (!ret)
6031 continue;
6032
6033 new_cmse_stubs_created--;
6034 if (veneer_value < cmse_stub_array_start)
6035 cmse_stub_array_start = veneer_value;
6036 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6037 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6038 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6039 }
6040
6041 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6042 {
6043 BFD_ASSERT (new_cmse_stubs_created > 0);
6044 _bfd_error_handler
6045 (_("new entry function(s) introduced but no output import library "
6046 "specified:"));
6047 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6048 }
6049
6050 if (cmse_stub_array_start != cmse_stub_sec_vma)
6051 {
6052 _bfd_error_handler
6053 (_("Start address of `%s' is different from previous link."),
6054 out_sec_name);
6055 ret = FALSE;
6056 }
6057
6058 free_sym_buf:
6059 free (sympp);
6060 return ret;
6061 }
6062
6063 /* Determine and set the size of the stub section for a final link.
6064
6065 The basic idea here is to examine all the relocations looking for
6066 PC-relative calls to a target that is unreachable with a "bl"
6067 instruction. */
6068
6069 bfd_boolean
6070 elf32_arm_size_stubs (bfd *output_bfd,
6071 bfd *stub_bfd,
6072 struct bfd_link_info *info,
6073 bfd_signed_vma group_size,
6074 asection * (*add_stub_section) (const char *, asection *,
6075 asection *,
6076 unsigned int),
6077 void (*layout_sections_again) (void))
6078 {
6079 bfd_boolean ret = TRUE;
6080 obj_attribute *out_attr;
6081 int cmse_stub_created = 0;
6082 bfd_size_type stub_group_size;
6083 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6084 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6085 struct a8_erratum_fix *a8_fixes = NULL;
6086 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6087 struct a8_erratum_reloc *a8_relocs = NULL;
6088 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6089
6090 if (htab == NULL)
6091 return FALSE;
6092
6093 if (htab->fix_cortex_a8)
6094 {
6095 a8_fixes = (struct a8_erratum_fix *)
6096 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6097 a8_relocs = (struct a8_erratum_reloc *)
6098 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6099 }
6100
6101 /* Propagate mach to stub bfd, because it may not have been
6102 finalized when we created stub_bfd. */
6103 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6104 bfd_get_mach (output_bfd));
6105
6106 /* Stash our params away. */
6107 htab->stub_bfd = stub_bfd;
6108 htab->add_stub_section = add_stub_section;
6109 htab->layout_sections_again = layout_sections_again;
6110 stubs_always_after_branch = group_size < 0;
6111
6112 out_attr = elf_known_obj_attributes_proc (output_bfd);
6113 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6114
6115 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6116 as the first half of a 32-bit branch straddling two 4K pages. This is a
6117 crude way of enforcing that. */
6118 if (htab->fix_cortex_a8)
6119 stubs_always_after_branch = 1;
6120
6121 if (group_size < 0)
6122 stub_group_size = -group_size;
6123 else
6124 stub_group_size = group_size;
6125
6126 if (stub_group_size == 1)
6127 {
6128 /* Default values. */
6129 /* Thumb branch range is +-4MB has to be used as the default
6130 maximum size (a given section can contain both ARM and Thumb
6131 code, so the worst case has to be taken into account).
6132
6133 This value is 24K less than that, which allows for 2025
6134 12-byte stubs. If we exceed that, then we will fail to link.
6135 The user will have to relink with an explicit group size
6136 option. */
6137 stub_group_size = 4170000;
6138 }
6139
6140 group_sections (htab, stub_group_size, stubs_always_after_branch);
6141
6142 /* If we're applying the cortex A8 fix, we need to determine the
6143 program header size now, because we cannot change it later --
6144 that could alter section placements. Notice the A8 erratum fix
6145 ends up requiring the section addresses to remain unchanged
6146 modulo the page size. That's something we cannot represent
6147 inside BFD, and we don't want to force the section alignment to
6148 be the page size. */
6149 if (htab->fix_cortex_a8)
6150 (*htab->layout_sections_again) ();
6151
6152 while (1)
6153 {
6154 bfd *input_bfd;
6155 unsigned int bfd_indx;
6156 asection *stub_sec;
6157 enum elf32_arm_stub_type stub_type;
6158 bfd_boolean stub_changed = FALSE;
6159 unsigned prev_num_a8_fixes = num_a8_fixes;
6160
6161 num_a8_fixes = 0;
6162 for (input_bfd = info->input_bfds, bfd_indx = 0;
6163 input_bfd != NULL;
6164 input_bfd = input_bfd->link.next, bfd_indx++)
6165 {
6166 Elf_Internal_Shdr *symtab_hdr;
6167 asection *section;
6168 Elf_Internal_Sym *local_syms = NULL;
6169
6170 if (!is_arm_elf (input_bfd))
6171 continue;
6172
6173 num_a8_relocs = 0;
6174
6175 /* We'll need the symbol table in a second. */
6176 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6177 if (symtab_hdr->sh_info == 0)
6178 continue;
6179
6180 /* Limit scan of symbols to object file whose profile is
6181 Microcontroller to not hinder performance in the general case. */
6182 if (m_profile && first_veneer_scan)
6183 {
6184 struct elf_link_hash_entry **sym_hashes;
6185
6186 sym_hashes = elf_sym_hashes (input_bfd);
6187 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6188 &cmse_stub_created))
6189 goto error_ret_free_local;
6190
6191 if (cmse_stub_created != 0)
6192 stub_changed = TRUE;
6193 }
6194
6195 /* Walk over each section attached to the input bfd. */
6196 for (section = input_bfd->sections;
6197 section != NULL;
6198 section = section->next)
6199 {
6200 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6201
6202 /* If there aren't any relocs, then there's nothing more
6203 to do. */
6204 if ((section->flags & SEC_RELOC) == 0
6205 || section->reloc_count == 0
6206 || (section->flags & SEC_CODE) == 0)
6207 continue;
6208
6209 /* If this section is a link-once section that will be
6210 discarded, then don't create any stubs. */
6211 if (section->output_section == NULL
6212 || section->output_section->owner != output_bfd)
6213 continue;
6214
6215 /* Get the relocs. */
6216 internal_relocs
6217 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6218 NULL, info->keep_memory);
6219 if (internal_relocs == NULL)
6220 goto error_ret_free_local;
6221
6222 /* Now examine each relocation. */
6223 irela = internal_relocs;
6224 irelaend = irela + section->reloc_count;
6225 for (; irela < irelaend; irela++)
6226 {
6227 unsigned int r_type, r_indx;
6228 asection *sym_sec;
6229 bfd_vma sym_value;
6230 bfd_vma destination;
6231 struct elf32_arm_link_hash_entry *hash;
6232 const char *sym_name;
6233 unsigned char st_type;
6234 enum arm_st_branch_type branch_type;
6235 bfd_boolean created_stub = FALSE;
6236
6237 r_type = ELF32_R_TYPE (irela->r_info);
6238 r_indx = ELF32_R_SYM (irela->r_info);
6239
6240 if (r_type >= (unsigned int) R_ARM_max)
6241 {
6242 bfd_set_error (bfd_error_bad_value);
6243 error_ret_free_internal:
6244 if (elf_section_data (section)->relocs == NULL)
6245 free (internal_relocs);
6246 /* Fall through. */
6247 error_ret_free_local:
6248 if (local_syms != NULL
6249 && (symtab_hdr->contents
6250 != (unsigned char *) local_syms))
6251 free (local_syms);
6252 return FALSE;
6253 }
6254
6255 hash = NULL;
6256 if (r_indx >= symtab_hdr->sh_info)
6257 hash = elf32_arm_hash_entry
6258 (elf_sym_hashes (input_bfd)
6259 [r_indx - symtab_hdr->sh_info]);
6260
6261 /* Only look for stubs on branch instructions, or
6262 non-relaxed TLSCALL */
6263 if ((r_type != (unsigned int) R_ARM_CALL)
6264 && (r_type != (unsigned int) R_ARM_THM_CALL)
6265 && (r_type != (unsigned int) R_ARM_JUMP24)
6266 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6267 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6268 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6269 && (r_type != (unsigned int) R_ARM_PLT32)
6270 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6271 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6272 && r_type == elf32_arm_tls_transition
6273 (info, r_type, &hash->root)
6274 && ((hash ? hash->tls_type
6275 : (elf32_arm_local_got_tls_type
6276 (input_bfd)[r_indx]))
6277 & GOT_TLS_GDESC) != 0))
6278 continue;
6279
6280 /* Now determine the call target, its name, value,
6281 section. */
6282 sym_sec = NULL;
6283 sym_value = 0;
6284 destination = 0;
6285 sym_name = NULL;
6286
6287 if (r_type == (unsigned int) R_ARM_TLS_CALL
6288 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6289 {
6290 /* A non-relaxed TLS call. The target is the
6291 plt-resident trampoline and nothing to do
6292 with the symbol. */
6293 BFD_ASSERT (htab->tls_trampoline > 0);
6294 sym_sec = htab->root.splt;
6295 sym_value = htab->tls_trampoline;
6296 hash = 0;
6297 st_type = STT_FUNC;
6298 branch_type = ST_BRANCH_TO_ARM;
6299 }
6300 else if (!hash)
6301 {
6302 /* It's a local symbol. */
6303 Elf_Internal_Sym *sym;
6304
6305 if (local_syms == NULL)
6306 {
6307 local_syms
6308 = (Elf_Internal_Sym *) symtab_hdr->contents;
6309 if (local_syms == NULL)
6310 local_syms
6311 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6312 symtab_hdr->sh_info, 0,
6313 NULL, NULL, NULL);
6314 if (local_syms == NULL)
6315 goto error_ret_free_internal;
6316 }
6317
6318 sym = local_syms + r_indx;
6319 if (sym->st_shndx == SHN_UNDEF)
6320 sym_sec = bfd_und_section_ptr;
6321 else if (sym->st_shndx == SHN_ABS)
6322 sym_sec = bfd_abs_section_ptr;
6323 else if (sym->st_shndx == SHN_COMMON)
6324 sym_sec = bfd_com_section_ptr;
6325 else
6326 sym_sec =
6327 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6328
6329 if (!sym_sec)
6330 /* This is an undefined symbol. It can never
6331 be resolved. */
6332 continue;
6333
6334 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6335 sym_value = sym->st_value;
6336 destination = (sym_value + irela->r_addend
6337 + sym_sec->output_offset
6338 + sym_sec->output_section->vma);
6339 st_type = ELF_ST_TYPE (sym->st_info);
6340 branch_type =
6341 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6342 sym_name
6343 = bfd_elf_string_from_elf_section (input_bfd,
6344 symtab_hdr->sh_link,
6345 sym->st_name);
6346 }
6347 else
6348 {
6349 /* It's an external symbol. */
6350 while (hash->root.root.type == bfd_link_hash_indirect
6351 || hash->root.root.type == bfd_link_hash_warning)
6352 hash = ((struct elf32_arm_link_hash_entry *)
6353 hash->root.root.u.i.link);
6354
6355 if (hash->root.root.type == bfd_link_hash_defined
6356 || hash->root.root.type == bfd_link_hash_defweak)
6357 {
6358 sym_sec = hash->root.root.u.def.section;
6359 sym_value = hash->root.root.u.def.value;
6360
6361 struct elf32_arm_link_hash_table *globals =
6362 elf32_arm_hash_table (info);
6363
6364 /* For a destination in a shared library,
6365 use the PLT stub as target address to
6366 decide whether a branch stub is
6367 needed. */
6368 if (globals != NULL
6369 && globals->root.splt != NULL
6370 && hash != NULL
6371 && hash->root.plt.offset != (bfd_vma) -1)
6372 {
6373 sym_sec = globals->root.splt;
6374 sym_value = hash->root.plt.offset;
6375 if (sym_sec->output_section != NULL)
6376 destination = (sym_value
6377 + sym_sec->output_offset
6378 + sym_sec->output_section->vma);
6379 }
6380 else if (sym_sec->output_section != NULL)
6381 destination = (sym_value + irela->r_addend
6382 + sym_sec->output_offset
6383 + sym_sec->output_section->vma);
6384 }
6385 else if ((hash->root.root.type == bfd_link_hash_undefined)
6386 || (hash->root.root.type == bfd_link_hash_undefweak))
6387 {
6388 /* For a shared library, use the PLT stub as
6389 target address to decide whether a long
6390 branch stub is needed.
6391 For absolute code, they cannot be handled. */
6392 struct elf32_arm_link_hash_table *globals =
6393 elf32_arm_hash_table (info);
6394
6395 if (globals != NULL
6396 && globals->root.splt != NULL
6397 && hash != NULL
6398 && hash->root.plt.offset != (bfd_vma) -1)
6399 {
6400 sym_sec = globals->root.splt;
6401 sym_value = hash->root.plt.offset;
6402 if (sym_sec->output_section != NULL)
6403 destination = (sym_value
6404 + sym_sec->output_offset
6405 + sym_sec->output_section->vma);
6406 }
6407 else
6408 continue;
6409 }
6410 else
6411 {
6412 bfd_set_error (bfd_error_bad_value);
6413 goto error_ret_free_internal;
6414 }
6415 st_type = hash->root.type;
6416 branch_type =
6417 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6418 sym_name = hash->root.root.root.string;
6419 }
6420
6421 do
6422 {
6423 bfd_boolean new_stub;
6424 struct elf32_arm_stub_hash_entry *stub_entry;
6425
6426 /* Determine what (if any) linker stub is needed. */
6427 stub_type = arm_type_of_stub (info, section, irela,
6428 st_type, &branch_type,
6429 hash, destination, sym_sec,
6430 input_bfd, sym_name);
6431 if (stub_type == arm_stub_none)
6432 break;
6433
6434 /* We've either created a stub for this reloc already,
6435 or we are about to. */
6436 stub_entry =
6437 elf32_arm_create_stub (htab, stub_type, section, irela,
6438 sym_sec, hash,
6439 (char *) sym_name, sym_value,
6440 branch_type, &new_stub);
6441
6442 created_stub = stub_entry != NULL;
6443 if (!created_stub)
6444 goto error_ret_free_internal;
6445 else if (!new_stub)
6446 break;
6447 else
6448 stub_changed = TRUE;
6449 }
6450 while (0);
6451
6452 /* Look for relocations which might trigger Cortex-A8
6453 erratum. */
6454 if (htab->fix_cortex_a8
6455 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6456 || r_type == (unsigned int) R_ARM_THM_JUMP19
6457 || r_type == (unsigned int) R_ARM_THM_CALL
6458 || r_type == (unsigned int) R_ARM_THM_XPC22))
6459 {
6460 bfd_vma from = section->output_section->vma
6461 + section->output_offset
6462 + irela->r_offset;
6463
6464 if ((from & 0xfff) == 0xffe)
6465 {
6466 /* Found a candidate. Note we haven't checked the
6467 destination is within 4K here: if we do so (and
6468 don't create an entry in a8_relocs) we can't tell
6469 that a branch should have been relocated when
6470 scanning later. */
6471 if (num_a8_relocs == a8_reloc_table_size)
6472 {
6473 a8_reloc_table_size *= 2;
6474 a8_relocs = (struct a8_erratum_reloc *)
6475 bfd_realloc (a8_relocs,
6476 sizeof (struct a8_erratum_reloc)
6477 * a8_reloc_table_size);
6478 }
6479
6480 a8_relocs[num_a8_relocs].from = from;
6481 a8_relocs[num_a8_relocs].destination = destination;
6482 a8_relocs[num_a8_relocs].r_type = r_type;
6483 a8_relocs[num_a8_relocs].branch_type = branch_type;
6484 a8_relocs[num_a8_relocs].sym_name = sym_name;
6485 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6486 a8_relocs[num_a8_relocs].hash = hash;
6487
6488 num_a8_relocs++;
6489 }
6490 }
6491 }
6492
6493 /* We're done with the internal relocs, free them. */
6494 if (elf_section_data (section)->relocs == NULL)
6495 free (internal_relocs);
6496 }
6497
6498 if (htab->fix_cortex_a8)
6499 {
6500 /* Sort relocs which might apply to Cortex-A8 erratum. */
6501 qsort (a8_relocs, num_a8_relocs,
6502 sizeof (struct a8_erratum_reloc),
6503 &a8_reloc_compare);
6504
6505 /* Scan for branches which might trigger Cortex-A8 erratum. */
6506 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6507 &num_a8_fixes, &a8_fix_table_size,
6508 a8_relocs, num_a8_relocs,
6509 prev_num_a8_fixes, &stub_changed)
6510 != 0)
6511 goto error_ret_free_local;
6512 }
6513
6514 if (local_syms != NULL
6515 && symtab_hdr->contents != (unsigned char *) local_syms)
6516 {
6517 if (!info->keep_memory)
6518 free (local_syms);
6519 else
6520 symtab_hdr->contents = (unsigned char *) local_syms;
6521 }
6522 }
6523
6524 if (first_veneer_scan
6525 && !set_cmse_veneer_addr_from_implib (info, htab,
6526 &cmse_stub_created))
6527 ret = FALSE;
6528
6529 if (prev_num_a8_fixes != num_a8_fixes)
6530 stub_changed = TRUE;
6531
6532 if (!stub_changed)
6533 break;
6534
6535 /* OK, we've added some stubs. Find out the new size of the
6536 stub sections. */
6537 for (stub_sec = htab->stub_bfd->sections;
6538 stub_sec != NULL;
6539 stub_sec = stub_sec->next)
6540 {
6541 /* Ignore non-stub sections. */
6542 if (!strstr (stub_sec->name, STUB_SUFFIX))
6543 continue;
6544
6545 stub_sec->size = 0;
6546 }
6547
6548 /* Add new SG veneers after those already in the input import
6549 library. */
6550 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6551 stub_type++)
6552 {
6553 bfd_vma *start_offset_p;
6554 asection **stub_sec_p;
6555
6556 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6557 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6558 if (start_offset_p == NULL)
6559 continue;
6560
6561 BFD_ASSERT (stub_sec_p != NULL);
6562 if (*stub_sec_p != NULL)
6563 (*stub_sec_p)->size = *start_offset_p;
6564 }
6565
6566 /* Compute stub section size, considering padding. */
6567 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6568 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6569 stub_type++)
6570 {
6571 int size, padding;
6572 asection **stub_sec_p;
6573
6574 padding = arm_dedicated_stub_section_padding (stub_type);
6575 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6576 /* Skip if no stub input section or no stub section padding
6577 required. */
6578 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6579 continue;
6580 /* Stub section padding required but no dedicated section. */
6581 BFD_ASSERT (stub_sec_p);
6582
6583 size = (*stub_sec_p)->size;
6584 size = (size + padding - 1) & ~(padding - 1);
6585 (*stub_sec_p)->size = size;
6586 }
6587
6588 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6589 if (htab->fix_cortex_a8)
6590 for (i = 0; i < num_a8_fixes; i++)
6591 {
6592 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6593 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6594
6595 if (stub_sec == NULL)
6596 return FALSE;
6597
6598 stub_sec->size
6599 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6600 NULL);
6601 }
6602
6603
6604 /* Ask the linker to do its stuff. */
6605 (*htab->layout_sections_again) ();
6606 first_veneer_scan = FALSE;
6607 }
6608
6609 /* Add stubs for Cortex-A8 erratum fixes now. */
6610 if (htab->fix_cortex_a8)
6611 {
6612 for (i = 0; i < num_a8_fixes; i++)
6613 {
6614 struct elf32_arm_stub_hash_entry *stub_entry;
6615 char *stub_name = a8_fixes[i].stub_name;
6616 asection *section = a8_fixes[i].section;
6617 unsigned int section_id = a8_fixes[i].section->id;
6618 asection *link_sec = htab->stub_group[section_id].link_sec;
6619 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6620 const insn_sequence *template_sequence;
6621 int template_size, size = 0;
6622
6623 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6624 TRUE, FALSE);
6625 if (stub_entry == NULL)
6626 {
6627 _bfd_error_handler (_("%B: cannot create stub entry %s"),
6628 section->owner, stub_name);
6629 return FALSE;
6630 }
6631
6632 stub_entry->stub_sec = stub_sec;
6633 stub_entry->stub_offset = (bfd_vma) -1;
6634 stub_entry->id_sec = link_sec;
6635 stub_entry->stub_type = a8_fixes[i].stub_type;
6636 stub_entry->source_value = a8_fixes[i].offset;
6637 stub_entry->target_section = a8_fixes[i].section;
6638 stub_entry->target_value = a8_fixes[i].target_offset;
6639 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6640 stub_entry->branch_type = a8_fixes[i].branch_type;
6641
6642 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6643 &template_sequence,
6644 &template_size);
6645
6646 stub_entry->stub_size = size;
6647 stub_entry->stub_template = template_sequence;
6648 stub_entry->stub_template_size = template_size;
6649 }
6650
6651 /* Stash the Cortex-A8 erratum fix array for use later in
6652 elf32_arm_write_section(). */
6653 htab->a8_erratum_fixes = a8_fixes;
6654 htab->num_a8_erratum_fixes = num_a8_fixes;
6655 }
6656 else
6657 {
6658 htab->a8_erratum_fixes = NULL;
6659 htab->num_a8_erratum_fixes = 0;
6660 }
6661 return ret;
6662 }
6663
6664 /* Build all the stubs associated with the current output file. The
6665 stubs are kept in a hash table attached to the main linker hash
6666 table. We also set up the .plt entries for statically linked PIC
6667 functions here. This function is called via arm_elf_finish in the
6668 linker. */
6669
6670 bfd_boolean
6671 elf32_arm_build_stubs (struct bfd_link_info *info)
6672 {
6673 asection *stub_sec;
6674 struct bfd_hash_table *table;
6675 enum elf32_arm_stub_type stub_type;
6676 struct elf32_arm_link_hash_table *htab;
6677
6678 htab = elf32_arm_hash_table (info);
6679 if (htab == NULL)
6680 return FALSE;
6681
6682 for (stub_sec = htab->stub_bfd->sections;
6683 stub_sec != NULL;
6684 stub_sec = stub_sec->next)
6685 {
6686 bfd_size_type size;
6687
6688 /* Ignore non-stub sections. */
6689 if (!strstr (stub_sec->name, STUB_SUFFIX))
6690 continue;
6691
6692 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6693 must at least be done for stub section requiring padding and for SG
6694 veneers to ensure that a non secure code branching to a removed SG
6695 veneer causes an error. */
6696 size = stub_sec->size;
6697 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6698 if (stub_sec->contents == NULL && size != 0)
6699 return FALSE;
6700
6701 stub_sec->size = 0;
6702 }
6703
6704 /* Add new SG veneers after those already in the input import library. */
6705 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6706 {
6707 bfd_vma *start_offset_p;
6708 asection **stub_sec_p;
6709
6710 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6711 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6712 if (start_offset_p == NULL)
6713 continue;
6714
6715 BFD_ASSERT (stub_sec_p != NULL);
6716 if (*stub_sec_p != NULL)
6717 (*stub_sec_p)->size = *start_offset_p;
6718 }
6719
6720 /* Build the stubs as directed by the stub hash table. */
6721 table = &htab->stub_hash_table;
6722 bfd_hash_traverse (table, arm_build_one_stub, info);
6723 if (htab->fix_cortex_a8)
6724 {
6725 /* Place the cortex a8 stubs last. */
6726 htab->fix_cortex_a8 = -1;
6727 bfd_hash_traverse (table, arm_build_one_stub, info);
6728 }
6729
6730 return TRUE;
6731 }
6732
6733 /* Locate the Thumb encoded calling stub for NAME. */
6734
6735 static struct elf_link_hash_entry *
6736 find_thumb_glue (struct bfd_link_info *link_info,
6737 const char *name,
6738 char **error_message)
6739 {
6740 char *tmp_name;
6741 struct elf_link_hash_entry *hash;
6742 struct elf32_arm_link_hash_table *hash_table;
6743
6744 /* We need a pointer to the armelf specific hash table. */
6745 hash_table = elf32_arm_hash_table (link_info);
6746 if (hash_table == NULL)
6747 return NULL;
6748
6749 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6750 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6751
6752 BFD_ASSERT (tmp_name);
6753
6754 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6755
6756 hash = elf_link_hash_lookup
6757 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6758
6759 if (hash == NULL
6760 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6761 tmp_name, name) == -1)
6762 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6763
6764 free (tmp_name);
6765
6766 return hash;
6767 }
6768
6769 /* Locate the ARM encoded calling stub for NAME. */
6770
6771 static struct elf_link_hash_entry *
6772 find_arm_glue (struct bfd_link_info *link_info,
6773 const char *name,
6774 char **error_message)
6775 {
6776 char *tmp_name;
6777 struct elf_link_hash_entry *myh;
6778 struct elf32_arm_link_hash_table *hash_table;
6779
6780 /* We need a pointer to the elfarm specific hash table. */
6781 hash_table = elf32_arm_hash_table (link_info);
6782 if (hash_table == NULL)
6783 return NULL;
6784
6785 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6786 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6787
6788 BFD_ASSERT (tmp_name);
6789
6790 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6791
6792 myh = elf_link_hash_lookup
6793 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6794
6795 if (myh == NULL
6796 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6797 tmp_name, name) == -1)
6798 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6799
6800 free (tmp_name);
6801
6802 return myh;
6803 }
6804
6805 /* ARM->Thumb glue (static images):
6806
6807 .arm
6808 __func_from_arm:
6809 ldr r12, __func_addr
6810 bx r12
6811 __func_addr:
6812 .word func @ behave as if you saw a ARM_32 reloc.
6813
6814 (v5t static images)
6815 .arm
6816 __func_from_arm:
6817 ldr pc, __func_addr
6818 __func_addr:
6819 .word func @ behave as if you saw a ARM_32 reloc.
6820
6821 (relocatable images)
6822 .arm
6823 __func_from_arm:
6824 ldr r12, __func_offset
6825 add r12, r12, pc
6826 bx r12
6827 __func_offset:
6828 .word func - . */
6829
6830 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6831 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6832 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6833 static const insn32 a2t3_func_addr_insn = 0x00000001;
6834
6835 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6836 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6837 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6838
6839 #define ARM2THUMB_PIC_GLUE_SIZE 16
6840 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6841 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6842 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6843
6844 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6845
6846 .thumb .thumb
6847 .align 2 .align 2
6848 __func_from_thumb: __func_from_thumb:
6849 bx pc push {r6, lr}
6850 nop ldr r6, __func_addr
6851 .arm mov lr, pc
6852 b func bx r6
6853 .arm
6854 ;; back_to_thumb
6855 ldmia r13! {r6, lr}
6856 bx lr
6857 __func_addr:
6858 .word func */
6859
6860 #define THUMB2ARM_GLUE_SIZE 8
6861 static const insn16 t2a1_bx_pc_insn = 0x4778;
6862 static const insn16 t2a2_noop_insn = 0x46c0;
6863 static const insn32 t2a3_b_insn = 0xea000000;
6864
6865 #define VFP11_ERRATUM_VENEER_SIZE 8
6866 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6867 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6868
6869 #define ARM_BX_VENEER_SIZE 12
6870 static const insn32 armbx1_tst_insn = 0xe3100001;
6871 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6872 static const insn32 armbx3_bx_insn = 0xe12fff10;
6873
6874 #ifndef ELFARM_NABI_C_INCLUDED
6875 static void
6876 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6877 {
6878 asection * s;
6879 bfd_byte * contents;
6880
6881 if (size == 0)
6882 {
6883 /* Do not include empty glue sections in the output. */
6884 if (abfd != NULL)
6885 {
6886 s = bfd_get_linker_section (abfd, name);
6887 if (s != NULL)
6888 s->flags |= SEC_EXCLUDE;
6889 }
6890 return;
6891 }
6892
6893 BFD_ASSERT (abfd != NULL);
6894
6895 s = bfd_get_linker_section (abfd, name);
6896 BFD_ASSERT (s != NULL);
6897
6898 contents = (bfd_byte *) bfd_alloc (abfd, size);
6899
6900 BFD_ASSERT (s->size == size);
6901 s->contents = contents;
6902 }
6903
6904 bfd_boolean
6905 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6906 {
6907 struct elf32_arm_link_hash_table * globals;
6908
6909 globals = elf32_arm_hash_table (info);
6910 BFD_ASSERT (globals != NULL);
6911
6912 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6913 globals->arm_glue_size,
6914 ARM2THUMB_GLUE_SECTION_NAME);
6915
6916 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6917 globals->thumb_glue_size,
6918 THUMB2ARM_GLUE_SECTION_NAME);
6919
6920 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6921 globals->vfp11_erratum_glue_size,
6922 VFP11_ERRATUM_VENEER_SECTION_NAME);
6923
6924 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6925 globals->stm32l4xx_erratum_glue_size,
6926 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6927
6928 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6929 globals->bx_glue_size,
6930 ARM_BX_GLUE_SECTION_NAME);
6931
6932 return TRUE;
6933 }
6934
6935 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6936 returns the symbol identifying the stub. */
6937
6938 static struct elf_link_hash_entry *
6939 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6940 struct elf_link_hash_entry * h)
6941 {
6942 const char * name = h->root.root.string;
6943 asection * s;
6944 char * tmp_name;
6945 struct elf_link_hash_entry * myh;
6946 struct bfd_link_hash_entry * bh;
6947 struct elf32_arm_link_hash_table * globals;
6948 bfd_vma val;
6949 bfd_size_type size;
6950
6951 globals = elf32_arm_hash_table (link_info);
6952 BFD_ASSERT (globals != NULL);
6953 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6954
6955 s = bfd_get_linker_section
6956 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6957
6958 BFD_ASSERT (s != NULL);
6959
6960 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6961 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6962
6963 BFD_ASSERT (tmp_name);
6964
6965 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6966
6967 myh = elf_link_hash_lookup
6968 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6969
6970 if (myh != NULL)
6971 {
6972 /* We've already seen this guy. */
6973 free (tmp_name);
6974 return myh;
6975 }
6976
6977 /* The only trick here is using hash_table->arm_glue_size as the value.
6978 Even though the section isn't allocated yet, this is where we will be
6979 putting it. The +1 on the value marks that the stub has not been
6980 output yet - not that it is a Thumb function. */
6981 bh = NULL;
6982 val = globals->arm_glue_size + 1;
6983 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6984 tmp_name, BSF_GLOBAL, s, val,
6985 NULL, TRUE, FALSE, &bh);
6986
6987 myh = (struct elf_link_hash_entry *) bh;
6988 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6989 myh->forced_local = 1;
6990
6991 free (tmp_name);
6992
6993 if (bfd_link_pic (link_info)
6994 || globals->root.is_relocatable_executable
6995 || globals->pic_veneer)
6996 size = ARM2THUMB_PIC_GLUE_SIZE;
6997 else if (globals->use_blx)
6998 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
6999 else
7000 size = ARM2THUMB_STATIC_GLUE_SIZE;
7001
7002 s->size += size;
7003 globals->arm_glue_size += size;
7004
7005 return myh;
7006 }
7007
7008 /* Allocate space for ARMv4 BX veneers. */
7009
7010 static void
7011 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7012 {
7013 asection * s;
7014 struct elf32_arm_link_hash_table *globals;
7015 char *tmp_name;
7016 struct elf_link_hash_entry *myh;
7017 struct bfd_link_hash_entry *bh;
7018 bfd_vma val;
7019
7020 /* BX PC does not need a veneer. */
7021 if (reg == 15)
7022 return;
7023
7024 globals = elf32_arm_hash_table (link_info);
7025 BFD_ASSERT (globals != NULL);
7026 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7027
7028 /* Check if this veneer has already been allocated. */
7029 if (globals->bx_glue_offset[reg])
7030 return;
7031
7032 s = bfd_get_linker_section
7033 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7034
7035 BFD_ASSERT (s != NULL);
7036
7037 /* Add symbol for veneer. */
7038 tmp_name = (char *)
7039 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7040
7041 BFD_ASSERT (tmp_name);
7042
7043 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7044
7045 myh = elf_link_hash_lookup
7046 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7047
7048 BFD_ASSERT (myh == NULL);
7049
7050 bh = NULL;
7051 val = globals->bx_glue_size;
7052 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7053 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7054 NULL, TRUE, FALSE, &bh);
7055
7056 myh = (struct elf_link_hash_entry *) bh;
7057 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7058 myh->forced_local = 1;
7059
7060 s->size += ARM_BX_VENEER_SIZE;
7061 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7062 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7063 }
7064
7065
7066 /* Add an entry to the code/data map for section SEC. */
7067
7068 static void
7069 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7070 {
7071 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7072 unsigned int newidx;
7073
7074 if (sec_data->map == NULL)
7075 {
7076 sec_data->map = (elf32_arm_section_map *)
7077 bfd_malloc (sizeof (elf32_arm_section_map));
7078 sec_data->mapcount = 0;
7079 sec_data->mapsize = 1;
7080 }
7081
7082 newidx = sec_data->mapcount++;
7083
7084 if (sec_data->mapcount > sec_data->mapsize)
7085 {
7086 sec_data->mapsize *= 2;
7087 sec_data->map = (elf32_arm_section_map *)
7088 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7089 * sizeof (elf32_arm_section_map));
7090 }
7091
7092 if (sec_data->map)
7093 {
7094 sec_data->map[newidx].vma = vma;
7095 sec_data->map[newidx].type = type;
7096 }
7097 }
7098
7099
7100 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7101 veneers are handled for now. */
7102
7103 static bfd_vma
7104 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7105 elf32_vfp11_erratum_list *branch,
7106 bfd *branch_bfd,
7107 asection *branch_sec,
7108 unsigned int offset)
7109 {
7110 asection *s;
7111 struct elf32_arm_link_hash_table *hash_table;
7112 char *tmp_name;
7113 struct elf_link_hash_entry *myh;
7114 struct bfd_link_hash_entry *bh;
7115 bfd_vma val;
7116 struct _arm_elf_section_data *sec_data;
7117 elf32_vfp11_erratum_list *newerr;
7118
7119 hash_table = elf32_arm_hash_table (link_info);
7120 BFD_ASSERT (hash_table != NULL);
7121 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7122
7123 s = bfd_get_linker_section
7124 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7125
7126 sec_data = elf32_arm_section_data (s);
7127
7128 BFD_ASSERT (s != NULL);
7129
7130 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7131 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7132
7133 BFD_ASSERT (tmp_name);
7134
7135 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7136 hash_table->num_vfp11_fixes);
7137
7138 myh = elf_link_hash_lookup
7139 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7140
7141 BFD_ASSERT (myh == NULL);
7142
7143 bh = NULL;
7144 val = hash_table->vfp11_erratum_glue_size;
7145 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7146 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7147 NULL, TRUE, FALSE, &bh);
7148
7149 myh = (struct elf_link_hash_entry *) bh;
7150 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7151 myh->forced_local = 1;
7152
7153 /* Link veneer back to calling location. */
7154 sec_data->erratumcount += 1;
7155 newerr = (elf32_vfp11_erratum_list *)
7156 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7157
7158 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7159 newerr->vma = -1;
7160 newerr->u.v.branch = branch;
7161 newerr->u.v.id = hash_table->num_vfp11_fixes;
7162 branch->u.b.veneer = newerr;
7163
7164 newerr->next = sec_data->erratumlist;
7165 sec_data->erratumlist = newerr;
7166
7167 /* A symbol for the return from the veneer. */
7168 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7169 hash_table->num_vfp11_fixes);
7170
7171 myh = elf_link_hash_lookup
7172 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7173
7174 if (myh != NULL)
7175 abort ();
7176
7177 bh = NULL;
7178 val = offset + 4;
7179 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7180 branch_sec, val, NULL, TRUE, FALSE, &bh);
7181
7182 myh = (struct elf_link_hash_entry *) bh;
7183 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7184 myh->forced_local = 1;
7185
7186 free (tmp_name);
7187
7188 /* Generate a mapping symbol for the veneer section, and explicitly add an
7189 entry for that symbol to the code/data map for the section. */
7190 if (hash_table->vfp11_erratum_glue_size == 0)
7191 {
7192 bh = NULL;
7193 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7194 ever requires this erratum fix. */
7195 _bfd_generic_link_add_one_symbol (link_info,
7196 hash_table->bfd_of_glue_owner, "$a",
7197 BSF_LOCAL, s, 0, NULL,
7198 TRUE, FALSE, &bh);
7199
7200 myh = (struct elf_link_hash_entry *) bh;
7201 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7202 myh->forced_local = 1;
7203
7204 /* The elf32_arm_init_maps function only cares about symbols from input
7205 BFDs. We must make a note of this generated mapping symbol
7206 ourselves so that code byteswapping works properly in
7207 elf32_arm_write_section. */
7208 elf32_arm_section_map_add (s, 'a', 0);
7209 }
7210
7211 s->size += VFP11_ERRATUM_VENEER_SIZE;
7212 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7213 hash_table->num_vfp11_fixes++;
7214
7215 /* The offset of the veneer. */
7216 return val;
7217 }
7218
7219 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7220 veneers need to be handled because used only in Cortex-M. */
7221
7222 static bfd_vma
7223 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7224 elf32_stm32l4xx_erratum_list *branch,
7225 bfd *branch_bfd,
7226 asection *branch_sec,
7227 unsigned int offset,
7228 bfd_size_type veneer_size)
7229 {
7230 asection *s;
7231 struct elf32_arm_link_hash_table *hash_table;
7232 char *tmp_name;
7233 struct elf_link_hash_entry *myh;
7234 struct bfd_link_hash_entry *bh;
7235 bfd_vma val;
7236 struct _arm_elf_section_data *sec_data;
7237 elf32_stm32l4xx_erratum_list *newerr;
7238
7239 hash_table = elf32_arm_hash_table (link_info);
7240 BFD_ASSERT (hash_table != NULL);
7241 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7242
7243 s = bfd_get_linker_section
7244 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7245
7246 BFD_ASSERT (s != NULL);
7247
7248 sec_data = elf32_arm_section_data (s);
7249
7250 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7251 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7252
7253 BFD_ASSERT (tmp_name);
7254
7255 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7256 hash_table->num_stm32l4xx_fixes);
7257
7258 myh = elf_link_hash_lookup
7259 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7260
7261 BFD_ASSERT (myh == NULL);
7262
7263 bh = NULL;
7264 val = hash_table->stm32l4xx_erratum_glue_size;
7265 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7266 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7267 NULL, TRUE, FALSE, &bh);
7268
7269 myh = (struct elf_link_hash_entry *) bh;
7270 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7271 myh->forced_local = 1;
7272
7273 /* Link veneer back to calling location. */
7274 sec_data->stm32l4xx_erratumcount += 1;
7275 newerr = (elf32_stm32l4xx_erratum_list *)
7276 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7277
7278 newerr->type = STM32L4XX_ERRATUM_VENEER;
7279 newerr->vma = -1;
7280 newerr->u.v.branch = branch;
7281 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7282 branch->u.b.veneer = newerr;
7283
7284 newerr->next = sec_data->stm32l4xx_erratumlist;
7285 sec_data->stm32l4xx_erratumlist = newerr;
7286
7287 /* A symbol for the return from the veneer. */
7288 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7289 hash_table->num_stm32l4xx_fixes);
7290
7291 myh = elf_link_hash_lookup
7292 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7293
7294 if (myh != NULL)
7295 abort ();
7296
7297 bh = NULL;
7298 val = offset + 4;
7299 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7300 branch_sec, val, NULL, TRUE, FALSE, &bh);
7301
7302 myh = (struct elf_link_hash_entry *) bh;
7303 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7304 myh->forced_local = 1;
7305
7306 free (tmp_name);
7307
7308 /* Generate a mapping symbol for the veneer section, and explicitly add an
7309 entry for that symbol to the code/data map for the section. */
7310 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7311 {
7312 bh = NULL;
7313 /* Creates a THUMB symbol since there is no other choice. */
7314 _bfd_generic_link_add_one_symbol (link_info,
7315 hash_table->bfd_of_glue_owner, "$t",
7316 BSF_LOCAL, s, 0, NULL,
7317 TRUE, FALSE, &bh);
7318
7319 myh = (struct elf_link_hash_entry *) bh;
7320 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7321 myh->forced_local = 1;
7322
7323 /* The elf32_arm_init_maps function only cares about symbols from input
7324 BFDs. We must make a note of this generated mapping symbol
7325 ourselves so that code byteswapping works properly in
7326 elf32_arm_write_section. */
7327 elf32_arm_section_map_add (s, 't', 0);
7328 }
7329
7330 s->size += veneer_size;
7331 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7332 hash_table->num_stm32l4xx_fixes++;
7333
7334 /* The offset of the veneer. */
7335 return val;
7336 }
7337
7338 #define ARM_GLUE_SECTION_FLAGS \
7339 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7340 | SEC_READONLY | SEC_LINKER_CREATED)
7341
7342 /* Create a fake section for use by the ARM backend of the linker. */
7343
7344 static bfd_boolean
7345 arm_make_glue_section (bfd * abfd, const char * name)
7346 {
7347 asection * sec;
7348
7349 sec = bfd_get_linker_section (abfd, name);
7350 if (sec != NULL)
7351 /* Already made. */
7352 return TRUE;
7353
7354 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7355
7356 if (sec == NULL
7357 || !bfd_set_section_alignment (abfd, sec, 2))
7358 return FALSE;
7359
7360 /* Set the gc mark to prevent the section from being removed by garbage
7361 collection, despite the fact that no relocs refer to this section. */
7362 sec->gc_mark = 1;
7363
7364 return TRUE;
7365 }
7366
7367 /* Set size of .plt entries. This function is called from the
7368 linker scripts in ld/emultempl/{armelf}.em. */
7369
7370 void
7371 bfd_elf32_arm_use_long_plt (void)
7372 {
7373 elf32_arm_use_long_plt_entry = TRUE;
7374 }
7375
7376 /* Add the glue sections to ABFD. This function is called from the
7377 linker scripts in ld/emultempl/{armelf}.em. */
7378
7379 bfd_boolean
7380 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7381 struct bfd_link_info *info)
7382 {
7383 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7384 bfd_boolean dostm32l4xx = globals
7385 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7386 bfd_boolean addglue;
7387
7388 /* If we are only performing a partial
7389 link do not bother adding the glue. */
7390 if (bfd_link_relocatable (info))
7391 return TRUE;
7392
7393 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7394 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7395 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7396 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7397
7398 if (!dostm32l4xx)
7399 return addglue;
7400
7401 return addglue
7402 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7403 }
7404
7405 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7406 ensures they are not marked for deletion by
7407 strip_excluded_output_sections () when veneers are going to be created
7408 later. Not doing so would trigger assert on empty section size in
7409 lang_size_sections_1 (). */
7410
7411 void
7412 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7413 {
7414 enum elf32_arm_stub_type stub_type;
7415
7416 /* If we are only performing a partial
7417 link do not bother adding the glue. */
7418 if (bfd_link_relocatable (info))
7419 return;
7420
7421 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7422 {
7423 asection *out_sec;
7424 const char *out_sec_name;
7425
7426 if (!arm_dedicated_stub_output_section_required (stub_type))
7427 continue;
7428
7429 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7430 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7431 if (out_sec != NULL)
7432 out_sec->flags |= SEC_KEEP;
7433 }
7434 }
7435
7436 /* Select a BFD to be used to hold the sections used by the glue code.
7437 This function is called from the linker scripts in ld/emultempl/
7438 {armelf/pe}.em. */
7439
7440 bfd_boolean
7441 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7442 {
7443 struct elf32_arm_link_hash_table *globals;
7444
7445 /* If we are only performing a partial link
7446 do not bother getting a bfd to hold the glue. */
7447 if (bfd_link_relocatable (info))
7448 return TRUE;
7449
7450 /* Make sure we don't attach the glue sections to a dynamic object. */
7451 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7452
7453 globals = elf32_arm_hash_table (info);
7454 BFD_ASSERT (globals != NULL);
7455
7456 if (globals->bfd_of_glue_owner != NULL)
7457 return TRUE;
7458
7459 /* Save the bfd for later use. */
7460 globals->bfd_of_glue_owner = abfd;
7461
7462 return TRUE;
7463 }
7464
7465 static void
7466 check_use_blx (struct elf32_arm_link_hash_table *globals)
7467 {
7468 int cpu_arch;
7469
7470 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7471 Tag_CPU_arch);
7472
7473 if (globals->fix_arm1176)
7474 {
7475 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7476 globals->use_blx = 1;
7477 }
7478 else
7479 {
7480 if (cpu_arch > TAG_CPU_ARCH_V4T)
7481 globals->use_blx = 1;
7482 }
7483 }
7484
7485 bfd_boolean
7486 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7487 struct bfd_link_info *link_info)
7488 {
7489 Elf_Internal_Shdr *symtab_hdr;
7490 Elf_Internal_Rela *internal_relocs = NULL;
7491 Elf_Internal_Rela *irel, *irelend;
7492 bfd_byte *contents = NULL;
7493
7494 asection *sec;
7495 struct elf32_arm_link_hash_table *globals;
7496
7497 /* If we are only performing a partial link do not bother
7498 to construct any glue. */
7499 if (bfd_link_relocatable (link_info))
7500 return TRUE;
7501
7502 /* Here we have a bfd that is to be included on the link. We have a
7503 hook to do reloc rummaging, before section sizes are nailed down. */
7504 globals = elf32_arm_hash_table (link_info);
7505 BFD_ASSERT (globals != NULL);
7506
7507 check_use_blx (globals);
7508
7509 if (globals->byteswap_code && !bfd_big_endian (abfd))
7510 {
7511 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7512 abfd);
7513 return FALSE;
7514 }
7515
7516 /* PR 5398: If we have not decided to include any loadable sections in
7517 the output then we will not have a glue owner bfd. This is OK, it
7518 just means that there is nothing else for us to do here. */
7519 if (globals->bfd_of_glue_owner == NULL)
7520 return TRUE;
7521
7522 /* Rummage around all the relocs and map the glue vectors. */
7523 sec = abfd->sections;
7524
7525 if (sec == NULL)
7526 return TRUE;
7527
7528 for (; sec != NULL; sec = sec->next)
7529 {
7530 if (sec->reloc_count == 0)
7531 continue;
7532
7533 if ((sec->flags & SEC_EXCLUDE) != 0)
7534 continue;
7535
7536 symtab_hdr = & elf_symtab_hdr (abfd);
7537
7538 /* Load the relocs. */
7539 internal_relocs
7540 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7541
7542 if (internal_relocs == NULL)
7543 goto error_return;
7544
7545 irelend = internal_relocs + sec->reloc_count;
7546 for (irel = internal_relocs; irel < irelend; irel++)
7547 {
7548 long r_type;
7549 unsigned long r_index;
7550
7551 struct elf_link_hash_entry *h;
7552
7553 r_type = ELF32_R_TYPE (irel->r_info);
7554 r_index = ELF32_R_SYM (irel->r_info);
7555
7556 /* These are the only relocation types we care about. */
7557 if ( r_type != R_ARM_PC24
7558 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7559 continue;
7560
7561 /* Get the section contents if we haven't done so already. */
7562 if (contents == NULL)
7563 {
7564 /* Get cached copy if it exists. */
7565 if (elf_section_data (sec)->this_hdr.contents != NULL)
7566 contents = elf_section_data (sec)->this_hdr.contents;
7567 else
7568 {
7569 /* Go get them off disk. */
7570 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7571 goto error_return;
7572 }
7573 }
7574
7575 if (r_type == R_ARM_V4BX)
7576 {
7577 int reg;
7578
7579 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7580 record_arm_bx_glue (link_info, reg);
7581 continue;
7582 }
7583
7584 /* If the relocation is not against a symbol it cannot concern us. */
7585 h = NULL;
7586
7587 /* We don't care about local symbols. */
7588 if (r_index < symtab_hdr->sh_info)
7589 continue;
7590
7591 /* This is an external symbol. */
7592 r_index -= symtab_hdr->sh_info;
7593 h = (struct elf_link_hash_entry *)
7594 elf_sym_hashes (abfd)[r_index];
7595
7596 /* If the relocation is against a static symbol it must be within
7597 the current section and so cannot be a cross ARM/Thumb relocation. */
7598 if (h == NULL)
7599 continue;
7600
7601 /* If the call will go through a PLT entry then we do not need
7602 glue. */
7603 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7604 continue;
7605
7606 switch (r_type)
7607 {
7608 case R_ARM_PC24:
7609 /* This one is a call from arm code. We need to look up
7610 the target of the call. If it is a thumb target, we
7611 insert glue. */
7612 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7613 == ST_BRANCH_TO_THUMB)
7614 record_arm_to_thumb_glue (link_info, h);
7615 break;
7616
7617 default:
7618 abort ();
7619 }
7620 }
7621
7622 if (contents != NULL
7623 && elf_section_data (sec)->this_hdr.contents != contents)
7624 free (contents);
7625 contents = NULL;
7626
7627 if (internal_relocs != NULL
7628 && elf_section_data (sec)->relocs != internal_relocs)
7629 free (internal_relocs);
7630 internal_relocs = NULL;
7631 }
7632
7633 return TRUE;
7634
7635 error_return:
7636 if (contents != NULL
7637 && elf_section_data (sec)->this_hdr.contents != contents)
7638 free (contents);
7639 if (internal_relocs != NULL
7640 && elf_section_data (sec)->relocs != internal_relocs)
7641 free (internal_relocs);
7642
7643 return FALSE;
7644 }
7645 #endif
7646
7647
7648 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7649
7650 void
7651 bfd_elf32_arm_init_maps (bfd *abfd)
7652 {
7653 Elf_Internal_Sym *isymbuf;
7654 Elf_Internal_Shdr *hdr;
7655 unsigned int i, localsyms;
7656
7657 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7658 if (! is_arm_elf (abfd))
7659 return;
7660
7661 if ((abfd->flags & DYNAMIC) != 0)
7662 return;
7663
7664 hdr = & elf_symtab_hdr (abfd);
7665 localsyms = hdr->sh_info;
7666
7667 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7668 should contain the number of local symbols, which should come before any
7669 global symbols. Mapping symbols are always local. */
7670 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7671 NULL);
7672
7673 /* No internal symbols read? Skip this BFD. */
7674 if (isymbuf == NULL)
7675 return;
7676
7677 for (i = 0; i < localsyms; i++)
7678 {
7679 Elf_Internal_Sym *isym = &isymbuf[i];
7680 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7681 const char *name;
7682
7683 if (sec != NULL
7684 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7685 {
7686 name = bfd_elf_string_from_elf_section (abfd,
7687 hdr->sh_link, isym->st_name);
7688
7689 if (bfd_is_arm_special_symbol_name (name,
7690 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7691 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7692 }
7693 }
7694 }
7695
7696
7697 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7698 say what they wanted. */
7699
7700 void
7701 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7702 {
7703 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7704 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7705
7706 if (globals == NULL)
7707 return;
7708
7709 if (globals->fix_cortex_a8 == -1)
7710 {
7711 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7712 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7713 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7714 || out_attr[Tag_CPU_arch_profile].i == 0))
7715 globals->fix_cortex_a8 = 1;
7716 else
7717 globals->fix_cortex_a8 = 0;
7718 }
7719 }
7720
7721
7722 void
7723 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7724 {
7725 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7726 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7727
7728 if (globals == NULL)
7729 return;
7730 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7731 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7732 {
7733 switch (globals->vfp11_fix)
7734 {
7735 case BFD_ARM_VFP11_FIX_DEFAULT:
7736 case BFD_ARM_VFP11_FIX_NONE:
7737 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7738 break;
7739
7740 default:
7741 /* Give a warning, but do as the user requests anyway. */
7742 _bfd_error_handler (_("%B: warning: selected VFP11 erratum "
7743 "workaround is not necessary for target architecture"), obfd);
7744 }
7745 }
7746 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7747 /* For earlier architectures, we might need the workaround, but do not
7748 enable it by default. If users is running with broken hardware, they
7749 must enable the erratum fix explicitly. */
7750 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7751 }
7752
7753 void
7754 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7755 {
7756 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7757 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7758
7759 if (globals == NULL)
7760 return;
7761
7762 /* We assume only Cortex-M4 may require the fix. */
7763 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7764 || out_attr[Tag_CPU_arch_profile].i != 'M')
7765 {
7766 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7767 /* Give a warning, but do as the user requests anyway. */
7768 _bfd_error_handler
7769 (_("%B: warning: selected STM32L4XX erratum "
7770 "workaround is not necessary for target architecture"), obfd);
7771 }
7772 }
7773
7774 enum bfd_arm_vfp11_pipe
7775 {
7776 VFP11_FMAC,
7777 VFP11_LS,
7778 VFP11_DS,
7779 VFP11_BAD
7780 };
7781
7782 /* Return a VFP register number. This is encoded as RX:X for single-precision
7783 registers, or X:RX for double-precision registers, where RX is the group of
7784 four bits in the instruction encoding and X is the single extension bit.
7785 RX and X fields are specified using their lowest (starting) bit. The return
7786 value is:
7787
7788 0...31: single-precision registers s0...s31
7789 32...63: double-precision registers d0...d31.
7790
7791 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7792 encounter VFP3 instructions, so we allow the full range for DP registers. */
7793
7794 static unsigned int
7795 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7796 unsigned int x)
7797 {
7798 if (is_double)
7799 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7800 else
7801 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7802 }
7803
7804 /* Set bits in *WMASK according to a register number REG as encoded by
7805 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7806
7807 static void
7808 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7809 {
7810 if (reg < 32)
7811 *wmask |= 1 << reg;
7812 else if (reg < 48)
7813 *wmask |= 3 << ((reg - 32) * 2);
7814 }
7815
7816 /* Return TRUE if WMASK overwrites anything in REGS. */
7817
7818 static bfd_boolean
7819 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7820 {
7821 int i;
7822
7823 for (i = 0; i < numregs; i++)
7824 {
7825 unsigned int reg = regs[i];
7826
7827 if (reg < 32 && (wmask & (1 << reg)) != 0)
7828 return TRUE;
7829
7830 reg -= 32;
7831
7832 if (reg >= 16)
7833 continue;
7834
7835 if ((wmask & (3 << (reg * 2))) != 0)
7836 return TRUE;
7837 }
7838
7839 return FALSE;
7840 }
7841
7842 /* In this function, we're interested in two things: finding input registers
7843 for VFP data-processing instructions, and finding the set of registers which
7844 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7845 hold the written set, so FLDM etc. are easy to deal with (we're only
7846 interested in 32 SP registers or 16 dp registers, due to the VFP version
7847 implemented by the chip in question). DP registers are marked by setting
7848 both SP registers in the write mask). */
7849
7850 static enum bfd_arm_vfp11_pipe
7851 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7852 int *numregs)
7853 {
7854 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7855 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7856
7857 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7858 {
7859 unsigned int pqrs;
7860 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7861 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7862
7863 pqrs = ((insn & 0x00800000) >> 20)
7864 | ((insn & 0x00300000) >> 19)
7865 | ((insn & 0x00000040) >> 6);
7866
7867 switch (pqrs)
7868 {
7869 case 0: /* fmac[sd]. */
7870 case 1: /* fnmac[sd]. */
7871 case 2: /* fmsc[sd]. */
7872 case 3: /* fnmsc[sd]. */
7873 vpipe = VFP11_FMAC;
7874 bfd_arm_vfp11_write_mask (destmask, fd);
7875 regs[0] = fd;
7876 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7877 regs[2] = fm;
7878 *numregs = 3;
7879 break;
7880
7881 case 4: /* fmul[sd]. */
7882 case 5: /* fnmul[sd]. */
7883 case 6: /* fadd[sd]. */
7884 case 7: /* fsub[sd]. */
7885 vpipe = VFP11_FMAC;
7886 goto vfp_binop;
7887
7888 case 8: /* fdiv[sd]. */
7889 vpipe = VFP11_DS;
7890 vfp_binop:
7891 bfd_arm_vfp11_write_mask (destmask, fd);
7892 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7893 regs[1] = fm;
7894 *numregs = 2;
7895 break;
7896
7897 case 15: /* extended opcode. */
7898 {
7899 unsigned int extn = ((insn >> 15) & 0x1e)
7900 | ((insn >> 7) & 1);
7901
7902 switch (extn)
7903 {
7904 case 0: /* fcpy[sd]. */
7905 case 1: /* fabs[sd]. */
7906 case 2: /* fneg[sd]. */
7907 case 8: /* fcmp[sd]. */
7908 case 9: /* fcmpe[sd]. */
7909 case 10: /* fcmpz[sd]. */
7910 case 11: /* fcmpez[sd]. */
7911 case 16: /* fuito[sd]. */
7912 case 17: /* fsito[sd]. */
7913 case 24: /* ftoui[sd]. */
7914 case 25: /* ftouiz[sd]. */
7915 case 26: /* ftosi[sd]. */
7916 case 27: /* ftosiz[sd]. */
7917 /* These instructions will not bounce due to underflow. */
7918 *numregs = 0;
7919 vpipe = VFP11_FMAC;
7920 break;
7921
7922 case 3: /* fsqrt[sd]. */
7923 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7924 registers to cause the erratum in previous instructions. */
7925 bfd_arm_vfp11_write_mask (destmask, fd);
7926 vpipe = VFP11_DS;
7927 break;
7928
7929 case 15: /* fcvt{ds,sd}. */
7930 {
7931 int rnum = 0;
7932
7933 bfd_arm_vfp11_write_mask (destmask, fd);
7934
7935 /* Only FCVTSD can underflow. */
7936 if ((insn & 0x100) != 0)
7937 regs[rnum++] = fm;
7938
7939 *numregs = rnum;
7940
7941 vpipe = VFP11_FMAC;
7942 }
7943 break;
7944
7945 default:
7946 return VFP11_BAD;
7947 }
7948 }
7949 break;
7950
7951 default:
7952 return VFP11_BAD;
7953 }
7954 }
7955 /* Two-register transfer. */
7956 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7957 {
7958 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7959
7960 if ((insn & 0x100000) == 0)
7961 {
7962 if (is_double)
7963 bfd_arm_vfp11_write_mask (destmask, fm);
7964 else
7965 {
7966 bfd_arm_vfp11_write_mask (destmask, fm);
7967 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7968 }
7969 }
7970
7971 vpipe = VFP11_LS;
7972 }
7973 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7974 {
7975 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7976 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7977
7978 switch (puw)
7979 {
7980 case 0: /* Two-reg transfer. We should catch these above. */
7981 abort ();
7982
7983 case 2: /* fldm[sdx]. */
7984 case 3:
7985 case 5:
7986 {
7987 unsigned int i, offset = insn & 0xff;
7988
7989 if (is_double)
7990 offset >>= 1;
7991
7992 for (i = fd; i < fd + offset; i++)
7993 bfd_arm_vfp11_write_mask (destmask, i);
7994 }
7995 break;
7996
7997 case 4: /* fld[sd]. */
7998 case 6:
7999 bfd_arm_vfp11_write_mask (destmask, fd);
8000 break;
8001
8002 default:
8003 return VFP11_BAD;
8004 }
8005
8006 vpipe = VFP11_LS;
8007 }
8008 /* Single-register transfer. Note L==0. */
8009 else if ((insn & 0x0f100e10) == 0x0e000a10)
8010 {
8011 unsigned int opcode = (insn >> 21) & 7;
8012 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8013
8014 switch (opcode)
8015 {
8016 case 0: /* fmsr/fmdlr. */
8017 case 1: /* fmdhr. */
8018 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8019 destination register. I don't know if this is exactly right,
8020 but it is the conservative choice. */
8021 bfd_arm_vfp11_write_mask (destmask, fn);
8022 break;
8023
8024 case 7: /* fmxr. */
8025 break;
8026 }
8027
8028 vpipe = VFP11_LS;
8029 }
8030
8031 return vpipe;
8032 }
8033
8034
8035 static int elf32_arm_compare_mapping (const void * a, const void * b);
8036
8037
8038 /* Look for potentially-troublesome code sequences which might trigger the
8039 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8040 (available from ARM) for details of the erratum. A short version is
8041 described in ld.texinfo. */
8042
8043 bfd_boolean
8044 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8045 {
8046 asection *sec;
8047 bfd_byte *contents = NULL;
8048 int state = 0;
8049 int regs[3], numregs = 0;
8050 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8051 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8052
8053 if (globals == NULL)
8054 return FALSE;
8055
8056 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8057 The states transition as follows:
8058
8059 0 -> 1 (vector) or 0 -> 2 (scalar)
8060 A VFP FMAC-pipeline instruction has been seen. Fill
8061 regs[0]..regs[numregs-1] with its input operands. Remember this
8062 instruction in 'first_fmac'.
8063
8064 1 -> 2
8065 Any instruction, except for a VFP instruction which overwrites
8066 regs[*].
8067
8068 1 -> 3 [ -> 0 ] or
8069 2 -> 3 [ -> 0 ]
8070 A VFP instruction has been seen which overwrites any of regs[*].
8071 We must make a veneer! Reset state to 0 before examining next
8072 instruction.
8073
8074 2 -> 0
8075 If we fail to match anything in state 2, reset to state 0 and reset
8076 the instruction pointer to the instruction after 'first_fmac'.
8077
8078 If the VFP11 vector mode is in use, there must be at least two unrelated
8079 instructions between anti-dependent VFP11 instructions to properly avoid
8080 triggering the erratum, hence the use of the extra state 1. */
8081
8082 /* If we are only performing a partial link do not bother
8083 to construct any glue. */
8084 if (bfd_link_relocatable (link_info))
8085 return TRUE;
8086
8087 /* Skip if this bfd does not correspond to an ELF image. */
8088 if (! is_arm_elf (abfd))
8089 return TRUE;
8090
8091 /* We should have chosen a fix type by the time we get here. */
8092 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8093
8094 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8095 return TRUE;
8096
8097 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8098 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8099 return TRUE;
8100
8101 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8102 {
8103 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8104 struct _arm_elf_section_data *sec_data;
8105
8106 /* If we don't have executable progbits, we're not interested in this
8107 section. Also skip if section is to be excluded. */
8108 if (elf_section_type (sec) != SHT_PROGBITS
8109 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8110 || (sec->flags & SEC_EXCLUDE) != 0
8111 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8112 || sec->output_section == bfd_abs_section_ptr
8113 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8114 continue;
8115
8116 sec_data = elf32_arm_section_data (sec);
8117
8118 if (sec_data->mapcount == 0)
8119 continue;
8120
8121 if (elf_section_data (sec)->this_hdr.contents != NULL)
8122 contents = elf_section_data (sec)->this_hdr.contents;
8123 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8124 goto error_return;
8125
8126 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8127 elf32_arm_compare_mapping);
8128
8129 for (span = 0; span < sec_data->mapcount; span++)
8130 {
8131 unsigned int span_start = sec_data->map[span].vma;
8132 unsigned int span_end = (span == sec_data->mapcount - 1)
8133 ? sec->size : sec_data->map[span + 1].vma;
8134 char span_type = sec_data->map[span].type;
8135
8136 /* FIXME: Only ARM mode is supported at present. We may need to
8137 support Thumb-2 mode also at some point. */
8138 if (span_type != 'a')
8139 continue;
8140
8141 for (i = span_start; i < span_end;)
8142 {
8143 unsigned int next_i = i + 4;
8144 unsigned int insn = bfd_big_endian (abfd)
8145 ? (contents[i] << 24)
8146 | (contents[i + 1] << 16)
8147 | (contents[i + 2] << 8)
8148 | contents[i + 3]
8149 : (contents[i + 3] << 24)
8150 | (contents[i + 2] << 16)
8151 | (contents[i + 1] << 8)
8152 | contents[i];
8153 unsigned int writemask = 0;
8154 enum bfd_arm_vfp11_pipe vpipe;
8155
8156 switch (state)
8157 {
8158 case 0:
8159 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8160 &numregs);
8161 /* I'm assuming the VFP11 erratum can trigger with denorm
8162 operands on either the FMAC or the DS pipeline. This might
8163 lead to slightly overenthusiastic veneer insertion. */
8164 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8165 {
8166 state = use_vector ? 1 : 2;
8167 first_fmac = i;
8168 veneer_of_insn = insn;
8169 }
8170 break;
8171
8172 case 1:
8173 {
8174 int other_regs[3], other_numregs;
8175 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8176 other_regs,
8177 &other_numregs);
8178 if (vpipe != VFP11_BAD
8179 && bfd_arm_vfp11_antidependency (writemask, regs,
8180 numregs))
8181 state = 3;
8182 else
8183 state = 2;
8184 }
8185 break;
8186
8187 case 2:
8188 {
8189 int other_regs[3], other_numregs;
8190 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8191 other_regs,
8192 &other_numregs);
8193 if (vpipe != VFP11_BAD
8194 && bfd_arm_vfp11_antidependency (writemask, regs,
8195 numregs))
8196 state = 3;
8197 else
8198 {
8199 state = 0;
8200 next_i = first_fmac + 4;
8201 }
8202 }
8203 break;
8204
8205 case 3:
8206 abort (); /* Should be unreachable. */
8207 }
8208
8209 if (state == 3)
8210 {
8211 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8212 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8213
8214 elf32_arm_section_data (sec)->erratumcount += 1;
8215
8216 newerr->u.b.vfp_insn = veneer_of_insn;
8217
8218 switch (span_type)
8219 {
8220 case 'a':
8221 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8222 break;
8223
8224 default:
8225 abort ();
8226 }
8227
8228 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8229 first_fmac);
8230
8231 newerr->vma = -1;
8232
8233 newerr->next = sec_data->erratumlist;
8234 sec_data->erratumlist = newerr;
8235
8236 state = 0;
8237 }
8238
8239 i = next_i;
8240 }
8241 }
8242
8243 if (contents != NULL
8244 && elf_section_data (sec)->this_hdr.contents != contents)
8245 free (contents);
8246 contents = NULL;
8247 }
8248
8249 return TRUE;
8250
8251 error_return:
8252 if (contents != NULL
8253 && elf_section_data (sec)->this_hdr.contents != contents)
8254 free (contents);
8255
8256 return FALSE;
8257 }
8258
8259 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8260 after sections have been laid out, using specially-named symbols. */
8261
8262 void
8263 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8264 struct bfd_link_info *link_info)
8265 {
8266 asection *sec;
8267 struct elf32_arm_link_hash_table *globals;
8268 char *tmp_name;
8269
8270 if (bfd_link_relocatable (link_info))
8271 return;
8272
8273 /* Skip if this bfd does not correspond to an ELF image. */
8274 if (! is_arm_elf (abfd))
8275 return;
8276
8277 globals = elf32_arm_hash_table (link_info);
8278 if (globals == NULL)
8279 return;
8280
8281 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8282 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8283
8284 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8285 {
8286 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8287 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8288
8289 for (; errnode != NULL; errnode = errnode->next)
8290 {
8291 struct elf_link_hash_entry *myh;
8292 bfd_vma vma;
8293
8294 switch (errnode->type)
8295 {
8296 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8297 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8298 /* Find veneer symbol. */
8299 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8300 errnode->u.b.veneer->u.v.id);
8301
8302 myh = elf_link_hash_lookup
8303 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8304
8305 if (myh == NULL)
8306 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8307 "`%s'"), abfd, tmp_name);
8308
8309 vma = myh->root.u.def.section->output_section->vma
8310 + myh->root.u.def.section->output_offset
8311 + myh->root.u.def.value;
8312
8313 errnode->u.b.veneer->vma = vma;
8314 break;
8315
8316 case VFP11_ERRATUM_ARM_VENEER:
8317 case VFP11_ERRATUM_THUMB_VENEER:
8318 /* Find return location. */
8319 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8320 errnode->u.v.id);
8321
8322 myh = elf_link_hash_lookup
8323 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8324
8325 if (myh == NULL)
8326 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8327 "`%s'"), abfd, tmp_name);
8328
8329 vma = myh->root.u.def.section->output_section->vma
8330 + myh->root.u.def.section->output_offset
8331 + myh->root.u.def.value;
8332
8333 errnode->u.v.branch->vma = vma;
8334 break;
8335
8336 default:
8337 abort ();
8338 }
8339 }
8340 }
8341
8342 free (tmp_name);
8343 }
8344
8345 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8346 return locations after sections have been laid out, using
8347 specially-named symbols. */
8348
8349 void
8350 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8351 struct bfd_link_info *link_info)
8352 {
8353 asection *sec;
8354 struct elf32_arm_link_hash_table *globals;
8355 char *tmp_name;
8356
8357 if (bfd_link_relocatable (link_info))
8358 return;
8359
8360 /* Skip if this bfd does not correspond to an ELF image. */
8361 if (! is_arm_elf (abfd))
8362 return;
8363
8364 globals = elf32_arm_hash_table (link_info);
8365 if (globals == NULL)
8366 return;
8367
8368 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8369 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8370
8371 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8372 {
8373 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8374 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8375
8376 for (; errnode != NULL; errnode = errnode->next)
8377 {
8378 struct elf_link_hash_entry *myh;
8379 bfd_vma vma;
8380
8381 switch (errnode->type)
8382 {
8383 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8384 /* Find veneer symbol. */
8385 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8386 errnode->u.b.veneer->u.v.id);
8387
8388 myh = elf_link_hash_lookup
8389 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8390
8391 if (myh == NULL)
8392 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8393 "`%s'"), abfd, tmp_name);
8394
8395 vma = myh->root.u.def.section->output_section->vma
8396 + myh->root.u.def.section->output_offset
8397 + myh->root.u.def.value;
8398
8399 errnode->u.b.veneer->vma = vma;
8400 break;
8401
8402 case STM32L4XX_ERRATUM_VENEER:
8403 /* Find return location. */
8404 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8405 errnode->u.v.id);
8406
8407 myh = elf_link_hash_lookup
8408 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8409
8410 if (myh == NULL)
8411 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8412 "`%s'"), abfd, tmp_name);
8413
8414 vma = myh->root.u.def.section->output_section->vma
8415 + myh->root.u.def.section->output_offset
8416 + myh->root.u.def.value;
8417
8418 errnode->u.v.branch->vma = vma;
8419 break;
8420
8421 default:
8422 abort ();
8423 }
8424 }
8425 }
8426
8427 free (tmp_name);
8428 }
8429
8430 static inline bfd_boolean
8431 is_thumb2_ldmia (const insn32 insn)
8432 {
8433 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8434 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8435 return (insn & 0xffd02000) == 0xe8900000;
8436 }
8437
8438 static inline bfd_boolean
8439 is_thumb2_ldmdb (const insn32 insn)
8440 {
8441 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8442 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8443 return (insn & 0xffd02000) == 0xe9100000;
8444 }
8445
8446 static inline bfd_boolean
8447 is_thumb2_vldm (const insn32 insn)
8448 {
8449 /* A6.5 Extension register load or store instruction
8450 A7.7.229
8451 We look for SP 32-bit and DP 64-bit registers.
8452 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8453 <list> is consecutive 64-bit registers
8454 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8455 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8456 <list> is consecutive 32-bit registers
8457 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8458 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8459 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8460 return
8461 (((insn & 0xfe100f00) == 0xec100b00) ||
8462 ((insn & 0xfe100f00) == 0xec100a00))
8463 && /* (IA without !). */
8464 (((((insn << 7) >> 28) & 0xd) == 0x4)
8465 /* (IA with !), includes VPOP (when reg number is SP). */
8466 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8467 /* (DB with !). */
8468 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8469 }
8470
8471 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8472 VLDM opcode and:
8473 - computes the number and the mode of memory accesses
8474 - decides if the replacement should be done:
8475 . replaces only if > 8-word accesses
8476 . or (testing purposes only) replaces all accesses. */
8477
8478 static bfd_boolean
8479 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8480 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8481 {
8482 int nb_words = 0;
8483
8484 /* The field encoding the register list is the same for both LDMIA
8485 and LDMDB encodings. */
8486 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8487 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8488 else if (is_thumb2_vldm (insn))
8489 nb_words = (insn & 0xff);
8490
8491 /* DEFAULT mode accounts for the real bug condition situation,
8492 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8493 return
8494 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8495 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8496 }
8497
8498 /* Look for potentially-troublesome code sequences which might trigger
8499 the STM STM32L4XX erratum. */
8500
8501 bfd_boolean
8502 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8503 struct bfd_link_info *link_info)
8504 {
8505 asection *sec;
8506 bfd_byte *contents = NULL;
8507 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8508
8509 if (globals == NULL)
8510 return FALSE;
8511
8512 /* If we are only performing a partial link do not bother
8513 to construct any glue. */
8514 if (bfd_link_relocatable (link_info))
8515 return TRUE;
8516
8517 /* Skip if this bfd does not correspond to an ELF image. */
8518 if (! is_arm_elf (abfd))
8519 return TRUE;
8520
8521 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8522 return TRUE;
8523
8524 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8525 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8526 return TRUE;
8527
8528 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8529 {
8530 unsigned int i, span;
8531 struct _arm_elf_section_data *sec_data;
8532
8533 /* If we don't have executable progbits, we're not interested in this
8534 section. Also skip if section is to be excluded. */
8535 if (elf_section_type (sec) != SHT_PROGBITS
8536 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8537 || (sec->flags & SEC_EXCLUDE) != 0
8538 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8539 || sec->output_section == bfd_abs_section_ptr
8540 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8541 continue;
8542
8543 sec_data = elf32_arm_section_data (sec);
8544
8545 if (sec_data->mapcount == 0)
8546 continue;
8547
8548 if (elf_section_data (sec)->this_hdr.contents != NULL)
8549 contents = elf_section_data (sec)->this_hdr.contents;
8550 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8551 goto error_return;
8552
8553 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8554 elf32_arm_compare_mapping);
8555
8556 for (span = 0; span < sec_data->mapcount; span++)
8557 {
8558 unsigned int span_start = sec_data->map[span].vma;
8559 unsigned int span_end = (span == sec_data->mapcount - 1)
8560 ? sec->size : sec_data->map[span + 1].vma;
8561 char span_type = sec_data->map[span].type;
8562 int itblock_current_pos = 0;
8563
8564 /* Only Thumb2 mode need be supported with this CM4 specific
8565 code, we should not encounter any arm mode eg span_type
8566 != 'a'. */
8567 if (span_type != 't')
8568 continue;
8569
8570 for (i = span_start; i < span_end;)
8571 {
8572 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8573 bfd_boolean insn_32bit = FALSE;
8574 bfd_boolean is_ldm = FALSE;
8575 bfd_boolean is_vldm = FALSE;
8576 bfd_boolean is_not_last_in_it_block = FALSE;
8577
8578 /* The first 16-bits of all 32-bit thumb2 instructions start
8579 with opcode[15..13]=0b111 and the encoded op1 can be anything
8580 except opcode[12..11]!=0b00.
8581 See 32-bit Thumb instruction encoding. */
8582 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8583 insn_32bit = TRUE;
8584
8585 /* Compute the predicate that tells if the instruction
8586 is concerned by the IT block
8587 - Creates an error if there is a ldm that is not
8588 last in the IT block thus cannot be replaced
8589 - Otherwise we can create a branch at the end of the
8590 IT block, it will be controlled naturally by IT
8591 with the proper pseudo-predicate
8592 - So the only interesting predicate is the one that
8593 tells that we are not on the last item of an IT
8594 block. */
8595 if (itblock_current_pos != 0)
8596 is_not_last_in_it_block = !!--itblock_current_pos;
8597
8598 if (insn_32bit)
8599 {
8600 /* Load the rest of the insn (in manual-friendly order). */
8601 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8602 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8603 is_vldm = is_thumb2_vldm (insn);
8604
8605 /* Veneers are created for (v)ldm depending on
8606 option flags and memory accesses conditions; but
8607 if the instruction is not the last instruction of
8608 an IT block, we cannot create a jump there, so we
8609 bail out. */
8610 if ((is_ldm || is_vldm)
8611 && stm32l4xx_need_create_replacing_stub
8612 (insn, globals->stm32l4xx_fix))
8613 {
8614 if (is_not_last_in_it_block)
8615 {
8616 _bfd_error_handler
8617 /* xgettext:c-format */
8618 (_("%B(%A+%#x): error: multiple load detected"
8619 " in non-last IT block instruction :"
8620 " STM32L4XX veneer cannot be generated.\n"
8621 "Use gcc option -mrestrict-it to generate"
8622 " only one instruction per IT block.\n"),
8623 abfd, sec, i);
8624 }
8625 else
8626 {
8627 elf32_stm32l4xx_erratum_list *newerr =
8628 (elf32_stm32l4xx_erratum_list *)
8629 bfd_zmalloc
8630 (sizeof (elf32_stm32l4xx_erratum_list));
8631
8632 elf32_arm_section_data (sec)
8633 ->stm32l4xx_erratumcount += 1;
8634 newerr->u.b.insn = insn;
8635 /* We create only thumb branches. */
8636 newerr->type =
8637 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8638 record_stm32l4xx_erratum_veneer
8639 (link_info, newerr, abfd, sec,
8640 i,
8641 is_ldm ?
8642 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8643 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8644 newerr->vma = -1;
8645 newerr->next = sec_data->stm32l4xx_erratumlist;
8646 sec_data->stm32l4xx_erratumlist = newerr;
8647 }
8648 }
8649 }
8650 else
8651 {
8652 /* A7.7.37 IT p208
8653 IT blocks are only encoded in T1
8654 Encoding T1: IT{x{y{z}}} <firstcond>
8655 1 0 1 1 - 1 1 1 1 - firstcond - mask
8656 if mask = '0000' then see 'related encodings'
8657 We don't deal with UNPREDICTABLE, just ignore these.
8658 There can be no nested IT blocks so an IT block
8659 is naturally a new one for which it is worth
8660 computing its size. */
8661 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8662 && ((insn & 0x000f) != 0x0000);
8663 /* If we have a new IT block we compute its size. */
8664 if (is_newitblock)
8665 {
8666 /* Compute the number of instructions controlled
8667 by the IT block, it will be used to decide
8668 whether we are inside an IT block or not. */
8669 unsigned int mask = insn & 0x000f;
8670 itblock_current_pos = 4 - ctz (mask);
8671 }
8672 }
8673
8674 i += insn_32bit ? 4 : 2;
8675 }
8676 }
8677
8678 if (contents != NULL
8679 && elf_section_data (sec)->this_hdr.contents != contents)
8680 free (contents);
8681 contents = NULL;
8682 }
8683
8684 return TRUE;
8685
8686 error_return:
8687 if (contents != NULL
8688 && elf_section_data (sec)->this_hdr.contents != contents)
8689 free (contents);
8690
8691 return FALSE;
8692 }
8693
8694 /* Set target relocation values needed during linking. */
8695
8696 void
8697 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8698 struct bfd_link_info *link_info,
8699 struct elf32_arm_params *params)
8700 {
8701 struct elf32_arm_link_hash_table *globals;
8702
8703 globals = elf32_arm_hash_table (link_info);
8704 if (globals == NULL)
8705 return;
8706
8707 globals->target1_is_rel = params->target1_is_rel;
8708 if (strcmp (params->target2_type, "rel") == 0)
8709 globals->target2_reloc = R_ARM_REL32;
8710 else if (strcmp (params->target2_type, "abs") == 0)
8711 globals->target2_reloc = R_ARM_ABS32;
8712 else if (strcmp (params->target2_type, "got-rel") == 0)
8713 globals->target2_reloc = R_ARM_GOT_PREL;
8714 else
8715 {
8716 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8717 params->target2_type);
8718 }
8719 globals->fix_v4bx = params->fix_v4bx;
8720 globals->use_blx |= params->use_blx;
8721 globals->vfp11_fix = params->vfp11_denorm_fix;
8722 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8723 globals->pic_veneer = params->pic_veneer;
8724 globals->fix_cortex_a8 = params->fix_cortex_a8;
8725 globals->fix_arm1176 = params->fix_arm1176;
8726 globals->cmse_implib = params->cmse_implib;
8727 globals->in_implib_bfd = params->in_implib_bfd;
8728
8729 BFD_ASSERT (is_arm_elf (output_bfd));
8730 elf_arm_tdata (output_bfd)->no_enum_size_warning
8731 = params->no_enum_size_warning;
8732 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8733 = params->no_wchar_size_warning;
8734 }
8735
8736 /* Replace the target offset of a Thumb bl or b.w instruction. */
8737
8738 static void
8739 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8740 {
8741 bfd_vma upper;
8742 bfd_vma lower;
8743 int reloc_sign;
8744
8745 BFD_ASSERT ((offset & 1) == 0);
8746
8747 upper = bfd_get_16 (abfd, insn);
8748 lower = bfd_get_16 (abfd, insn + 2);
8749 reloc_sign = (offset < 0) ? 1 : 0;
8750 upper = (upper & ~(bfd_vma) 0x7ff)
8751 | ((offset >> 12) & 0x3ff)
8752 | (reloc_sign << 10);
8753 lower = (lower & ~(bfd_vma) 0x2fff)
8754 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8755 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8756 | ((offset >> 1) & 0x7ff);
8757 bfd_put_16 (abfd, upper, insn);
8758 bfd_put_16 (abfd, lower, insn + 2);
8759 }
8760
8761 /* Thumb code calling an ARM function. */
8762
8763 static int
8764 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8765 const char * name,
8766 bfd * input_bfd,
8767 bfd * output_bfd,
8768 asection * input_section,
8769 bfd_byte * hit_data,
8770 asection * sym_sec,
8771 bfd_vma offset,
8772 bfd_signed_vma addend,
8773 bfd_vma val,
8774 char **error_message)
8775 {
8776 asection * s = 0;
8777 bfd_vma my_offset;
8778 long int ret_offset;
8779 struct elf_link_hash_entry * myh;
8780 struct elf32_arm_link_hash_table * globals;
8781
8782 myh = find_thumb_glue (info, name, error_message);
8783 if (myh == NULL)
8784 return FALSE;
8785
8786 globals = elf32_arm_hash_table (info);
8787 BFD_ASSERT (globals != NULL);
8788 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8789
8790 my_offset = myh->root.u.def.value;
8791
8792 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8793 THUMB2ARM_GLUE_SECTION_NAME);
8794
8795 BFD_ASSERT (s != NULL);
8796 BFD_ASSERT (s->contents != NULL);
8797 BFD_ASSERT (s->output_section != NULL);
8798
8799 if ((my_offset & 0x01) == 0x01)
8800 {
8801 if (sym_sec != NULL
8802 && sym_sec->owner != NULL
8803 && !INTERWORK_FLAG (sym_sec->owner))
8804 {
8805 _bfd_error_handler
8806 (_("%B(%s): warning: interworking not enabled.\n"
8807 " first occurrence: %B: Thumb call to ARM"),
8808 sym_sec->owner, name, input_bfd);
8809
8810 return FALSE;
8811 }
8812
8813 --my_offset;
8814 myh->root.u.def.value = my_offset;
8815
8816 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8817 s->contents + my_offset);
8818
8819 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8820 s->contents + my_offset + 2);
8821
8822 ret_offset =
8823 /* Address of destination of the stub. */
8824 ((bfd_signed_vma) val)
8825 - ((bfd_signed_vma)
8826 /* Offset from the start of the current section
8827 to the start of the stubs. */
8828 (s->output_offset
8829 /* Offset of the start of this stub from the start of the stubs. */
8830 + my_offset
8831 /* Address of the start of the current section. */
8832 + s->output_section->vma)
8833 /* The branch instruction is 4 bytes into the stub. */
8834 + 4
8835 /* ARM branches work from the pc of the instruction + 8. */
8836 + 8);
8837
8838 put_arm_insn (globals, output_bfd,
8839 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8840 s->contents + my_offset + 4);
8841 }
8842
8843 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8844
8845 /* Now go back and fix up the original BL insn to point to here. */
8846 ret_offset =
8847 /* Address of where the stub is located. */
8848 (s->output_section->vma + s->output_offset + my_offset)
8849 /* Address of where the BL is located. */
8850 - (input_section->output_section->vma + input_section->output_offset
8851 + offset)
8852 /* Addend in the relocation. */
8853 - addend
8854 /* Biassing for PC-relative addressing. */
8855 - 8;
8856
8857 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8858
8859 return TRUE;
8860 }
8861
8862 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8863
8864 static struct elf_link_hash_entry *
8865 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8866 const char * name,
8867 bfd * input_bfd,
8868 bfd * output_bfd,
8869 asection * sym_sec,
8870 bfd_vma val,
8871 asection * s,
8872 char ** error_message)
8873 {
8874 bfd_vma my_offset;
8875 long int ret_offset;
8876 struct elf_link_hash_entry * myh;
8877 struct elf32_arm_link_hash_table * globals;
8878
8879 myh = find_arm_glue (info, name, error_message);
8880 if (myh == NULL)
8881 return NULL;
8882
8883 globals = elf32_arm_hash_table (info);
8884 BFD_ASSERT (globals != NULL);
8885 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8886
8887 my_offset = myh->root.u.def.value;
8888
8889 if ((my_offset & 0x01) == 0x01)
8890 {
8891 if (sym_sec != NULL
8892 && sym_sec->owner != NULL
8893 && !INTERWORK_FLAG (sym_sec->owner))
8894 {
8895 _bfd_error_handler
8896 (_("%B(%s): warning: interworking not enabled.\n"
8897 " first occurrence: %B: arm call to thumb"),
8898 sym_sec->owner, name, input_bfd);
8899 }
8900
8901 --my_offset;
8902 myh->root.u.def.value = my_offset;
8903
8904 if (bfd_link_pic (info)
8905 || globals->root.is_relocatable_executable
8906 || globals->pic_veneer)
8907 {
8908 /* For relocatable objects we can't use absolute addresses,
8909 so construct the address from a relative offset. */
8910 /* TODO: If the offset is small it's probably worth
8911 constructing the address with adds. */
8912 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8913 s->contents + my_offset);
8914 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8915 s->contents + my_offset + 4);
8916 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8917 s->contents + my_offset + 8);
8918 /* Adjust the offset by 4 for the position of the add,
8919 and 8 for the pipeline offset. */
8920 ret_offset = (val - (s->output_offset
8921 + s->output_section->vma
8922 + my_offset + 12))
8923 | 1;
8924 bfd_put_32 (output_bfd, ret_offset,
8925 s->contents + my_offset + 12);
8926 }
8927 else if (globals->use_blx)
8928 {
8929 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8930 s->contents + my_offset);
8931
8932 /* It's a thumb address. Add the low order bit. */
8933 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8934 s->contents + my_offset + 4);
8935 }
8936 else
8937 {
8938 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8939 s->contents + my_offset);
8940
8941 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8942 s->contents + my_offset + 4);
8943
8944 /* It's a thumb address. Add the low order bit. */
8945 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8946 s->contents + my_offset + 8);
8947
8948 my_offset += 12;
8949 }
8950 }
8951
8952 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8953
8954 return myh;
8955 }
8956
8957 /* Arm code calling a Thumb function. */
8958
8959 static int
8960 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8961 const char * name,
8962 bfd * input_bfd,
8963 bfd * output_bfd,
8964 asection * input_section,
8965 bfd_byte * hit_data,
8966 asection * sym_sec,
8967 bfd_vma offset,
8968 bfd_signed_vma addend,
8969 bfd_vma val,
8970 char **error_message)
8971 {
8972 unsigned long int tmp;
8973 bfd_vma my_offset;
8974 asection * s;
8975 long int ret_offset;
8976 struct elf_link_hash_entry * myh;
8977 struct elf32_arm_link_hash_table * globals;
8978
8979 globals = elf32_arm_hash_table (info);
8980 BFD_ASSERT (globals != NULL);
8981 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8982
8983 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8984 ARM2THUMB_GLUE_SECTION_NAME);
8985 BFD_ASSERT (s != NULL);
8986 BFD_ASSERT (s->contents != NULL);
8987 BFD_ASSERT (s->output_section != NULL);
8988
8989 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
8990 sym_sec, val, s, error_message);
8991 if (!myh)
8992 return FALSE;
8993
8994 my_offset = myh->root.u.def.value;
8995 tmp = bfd_get_32 (input_bfd, hit_data);
8996 tmp = tmp & 0xFF000000;
8997
8998 /* Somehow these are both 4 too far, so subtract 8. */
8999 ret_offset = (s->output_offset
9000 + my_offset
9001 + s->output_section->vma
9002 - (input_section->output_offset
9003 + input_section->output_section->vma
9004 + offset + addend)
9005 - 8);
9006
9007 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9008
9009 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9010
9011 return TRUE;
9012 }
9013
9014 /* Populate Arm stub for an exported Thumb function. */
9015
9016 static bfd_boolean
9017 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9018 {
9019 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9020 asection * s;
9021 struct elf_link_hash_entry * myh;
9022 struct elf32_arm_link_hash_entry *eh;
9023 struct elf32_arm_link_hash_table * globals;
9024 asection *sec;
9025 bfd_vma val;
9026 char *error_message;
9027
9028 eh = elf32_arm_hash_entry (h);
9029 /* Allocate stubs for exported Thumb functions on v4t. */
9030 if (eh->export_glue == NULL)
9031 return TRUE;
9032
9033 globals = elf32_arm_hash_table (info);
9034 BFD_ASSERT (globals != NULL);
9035 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9036
9037 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9038 ARM2THUMB_GLUE_SECTION_NAME);
9039 BFD_ASSERT (s != NULL);
9040 BFD_ASSERT (s->contents != NULL);
9041 BFD_ASSERT (s->output_section != NULL);
9042
9043 sec = eh->export_glue->root.u.def.section;
9044
9045 BFD_ASSERT (sec->output_section != NULL);
9046
9047 val = eh->export_glue->root.u.def.value + sec->output_offset
9048 + sec->output_section->vma;
9049
9050 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9051 h->root.u.def.section->owner,
9052 globals->obfd, sec, val, s,
9053 &error_message);
9054 BFD_ASSERT (myh);
9055 return TRUE;
9056 }
9057
9058 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9059
9060 static bfd_vma
9061 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9062 {
9063 bfd_byte *p;
9064 bfd_vma glue_addr;
9065 asection *s;
9066 struct elf32_arm_link_hash_table *globals;
9067
9068 globals = elf32_arm_hash_table (info);
9069 BFD_ASSERT (globals != NULL);
9070 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9071
9072 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9073 ARM_BX_GLUE_SECTION_NAME);
9074 BFD_ASSERT (s != NULL);
9075 BFD_ASSERT (s->contents != NULL);
9076 BFD_ASSERT (s->output_section != NULL);
9077
9078 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9079
9080 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9081
9082 if ((globals->bx_glue_offset[reg] & 1) == 0)
9083 {
9084 p = s->contents + glue_addr;
9085 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9086 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9087 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9088 globals->bx_glue_offset[reg] |= 1;
9089 }
9090
9091 return glue_addr + s->output_section->vma + s->output_offset;
9092 }
9093
9094 /* Generate Arm stubs for exported Thumb symbols. */
9095 static void
9096 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9097 struct bfd_link_info *link_info)
9098 {
9099 struct elf32_arm_link_hash_table * globals;
9100
9101 if (link_info == NULL)
9102 /* Ignore this if we are not called by the ELF backend linker. */
9103 return;
9104
9105 globals = elf32_arm_hash_table (link_info);
9106 if (globals == NULL)
9107 return;
9108
9109 /* If blx is available then exported Thumb symbols are OK and there is
9110 nothing to do. */
9111 if (globals->use_blx)
9112 return;
9113
9114 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9115 link_info);
9116 }
9117
9118 /* Reserve space for COUNT dynamic relocations in relocation selection
9119 SRELOC. */
9120
9121 static void
9122 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9123 bfd_size_type count)
9124 {
9125 struct elf32_arm_link_hash_table *htab;
9126
9127 htab = elf32_arm_hash_table (info);
9128 BFD_ASSERT (htab->root.dynamic_sections_created);
9129 if (sreloc == NULL)
9130 abort ();
9131 sreloc->size += RELOC_SIZE (htab) * count;
9132 }
9133
9134 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9135 dynamic, the relocations should go in SRELOC, otherwise they should
9136 go in the special .rel.iplt section. */
9137
9138 static void
9139 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9140 bfd_size_type count)
9141 {
9142 struct elf32_arm_link_hash_table *htab;
9143
9144 htab = elf32_arm_hash_table (info);
9145 if (!htab->root.dynamic_sections_created)
9146 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9147 else
9148 {
9149 BFD_ASSERT (sreloc != NULL);
9150 sreloc->size += RELOC_SIZE (htab) * count;
9151 }
9152 }
9153
9154 /* Add relocation REL to the end of relocation section SRELOC. */
9155
9156 static void
9157 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9158 asection *sreloc, Elf_Internal_Rela *rel)
9159 {
9160 bfd_byte *loc;
9161 struct elf32_arm_link_hash_table *htab;
9162
9163 htab = elf32_arm_hash_table (info);
9164 if (!htab->root.dynamic_sections_created
9165 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9166 sreloc = htab->root.irelplt;
9167 if (sreloc == NULL)
9168 abort ();
9169 loc = sreloc->contents;
9170 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9171 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9172 abort ();
9173 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9174 }
9175
9176 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9177 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9178 to .plt. */
9179
9180 static void
9181 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9182 bfd_boolean is_iplt_entry,
9183 union gotplt_union *root_plt,
9184 struct arm_plt_info *arm_plt)
9185 {
9186 struct elf32_arm_link_hash_table *htab;
9187 asection *splt;
9188 asection *sgotplt;
9189
9190 htab = elf32_arm_hash_table (info);
9191
9192 if (is_iplt_entry)
9193 {
9194 splt = htab->root.iplt;
9195 sgotplt = htab->root.igotplt;
9196
9197 /* NaCl uses a special first entry in .iplt too. */
9198 if (htab->nacl_p && splt->size == 0)
9199 splt->size += htab->plt_header_size;
9200
9201 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9202 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9203 }
9204 else
9205 {
9206 splt = htab->root.splt;
9207 sgotplt = htab->root.sgotplt;
9208
9209 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9210 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9211
9212 /* If this is the first .plt entry, make room for the special
9213 first entry. */
9214 if (splt->size == 0)
9215 splt->size += htab->plt_header_size;
9216
9217 htab->next_tls_desc_index++;
9218 }
9219
9220 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9221 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9222 splt->size += PLT_THUMB_STUB_SIZE;
9223 root_plt->offset = splt->size;
9224 splt->size += htab->plt_entry_size;
9225
9226 if (!htab->symbian_p)
9227 {
9228 /* We also need to make an entry in the .got.plt section, which
9229 will be placed in the .got section by the linker script. */
9230 if (is_iplt_entry)
9231 arm_plt->got_offset = sgotplt->size;
9232 else
9233 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9234 sgotplt->size += 4;
9235 }
9236 }
9237
9238 static bfd_vma
9239 arm_movw_immediate (bfd_vma value)
9240 {
9241 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9242 }
9243
9244 static bfd_vma
9245 arm_movt_immediate (bfd_vma value)
9246 {
9247 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9248 }
9249
9250 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9251 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9252 Otherwise, DYNINDX is the index of the symbol in the dynamic
9253 symbol table and SYM_VALUE is undefined.
9254
9255 ROOT_PLT points to the offset of the PLT entry from the start of its
9256 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9257 bookkeeping information.
9258
9259 Returns FALSE if there was a problem. */
9260
9261 static bfd_boolean
9262 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9263 union gotplt_union *root_plt,
9264 struct arm_plt_info *arm_plt,
9265 int dynindx, bfd_vma sym_value)
9266 {
9267 struct elf32_arm_link_hash_table *htab;
9268 asection *sgot;
9269 asection *splt;
9270 asection *srel;
9271 bfd_byte *loc;
9272 bfd_vma plt_index;
9273 Elf_Internal_Rela rel;
9274 bfd_vma plt_header_size;
9275 bfd_vma got_header_size;
9276
9277 htab = elf32_arm_hash_table (info);
9278
9279 /* Pick the appropriate sections and sizes. */
9280 if (dynindx == -1)
9281 {
9282 splt = htab->root.iplt;
9283 sgot = htab->root.igotplt;
9284 srel = htab->root.irelplt;
9285
9286 /* There are no reserved entries in .igot.plt, and no special
9287 first entry in .iplt. */
9288 got_header_size = 0;
9289 plt_header_size = 0;
9290 }
9291 else
9292 {
9293 splt = htab->root.splt;
9294 sgot = htab->root.sgotplt;
9295 srel = htab->root.srelplt;
9296
9297 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9298 plt_header_size = htab->plt_header_size;
9299 }
9300 BFD_ASSERT (splt != NULL && srel != NULL);
9301
9302 /* Fill in the entry in the procedure linkage table. */
9303 if (htab->symbian_p)
9304 {
9305 BFD_ASSERT (dynindx >= 0);
9306 put_arm_insn (htab, output_bfd,
9307 elf32_arm_symbian_plt_entry[0],
9308 splt->contents + root_plt->offset);
9309 bfd_put_32 (output_bfd,
9310 elf32_arm_symbian_plt_entry[1],
9311 splt->contents + root_plt->offset + 4);
9312
9313 /* Fill in the entry in the .rel.plt section. */
9314 rel.r_offset = (splt->output_section->vma
9315 + splt->output_offset
9316 + root_plt->offset + 4);
9317 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9318
9319 /* Get the index in the procedure linkage table which
9320 corresponds to this symbol. This is the index of this symbol
9321 in all the symbols for which we are making plt entries. The
9322 first entry in the procedure linkage table is reserved. */
9323 plt_index = ((root_plt->offset - plt_header_size)
9324 / htab->plt_entry_size);
9325 }
9326 else
9327 {
9328 bfd_vma got_offset, got_address, plt_address;
9329 bfd_vma got_displacement, initial_got_entry;
9330 bfd_byte * ptr;
9331
9332 BFD_ASSERT (sgot != NULL);
9333
9334 /* Get the offset into the .(i)got.plt table of the entry that
9335 corresponds to this function. */
9336 got_offset = (arm_plt->got_offset & -2);
9337
9338 /* Get the index in the procedure linkage table which
9339 corresponds to this symbol. This is the index of this symbol
9340 in all the symbols for which we are making plt entries.
9341 After the reserved .got.plt entries, all symbols appear in
9342 the same order as in .plt. */
9343 plt_index = (got_offset - got_header_size) / 4;
9344
9345 /* Calculate the address of the GOT entry. */
9346 got_address = (sgot->output_section->vma
9347 + sgot->output_offset
9348 + got_offset);
9349
9350 /* ...and the address of the PLT entry. */
9351 plt_address = (splt->output_section->vma
9352 + splt->output_offset
9353 + root_plt->offset);
9354
9355 ptr = splt->contents + root_plt->offset;
9356 if (htab->vxworks_p && bfd_link_pic (info))
9357 {
9358 unsigned int i;
9359 bfd_vma val;
9360
9361 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9362 {
9363 val = elf32_arm_vxworks_shared_plt_entry[i];
9364 if (i == 2)
9365 val |= got_address - sgot->output_section->vma;
9366 if (i == 5)
9367 val |= plt_index * RELOC_SIZE (htab);
9368 if (i == 2 || i == 5)
9369 bfd_put_32 (output_bfd, val, ptr);
9370 else
9371 put_arm_insn (htab, output_bfd, val, ptr);
9372 }
9373 }
9374 else if (htab->vxworks_p)
9375 {
9376 unsigned int i;
9377 bfd_vma val;
9378
9379 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9380 {
9381 val = elf32_arm_vxworks_exec_plt_entry[i];
9382 if (i == 2)
9383 val |= got_address;
9384 if (i == 4)
9385 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9386 if (i == 5)
9387 val |= plt_index * RELOC_SIZE (htab);
9388 if (i == 2 || i == 5)
9389 bfd_put_32 (output_bfd, val, ptr);
9390 else
9391 put_arm_insn (htab, output_bfd, val, ptr);
9392 }
9393
9394 loc = (htab->srelplt2->contents
9395 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9396
9397 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9398 referencing the GOT for this PLT entry. */
9399 rel.r_offset = plt_address + 8;
9400 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9401 rel.r_addend = got_offset;
9402 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9403 loc += RELOC_SIZE (htab);
9404
9405 /* Create the R_ARM_ABS32 relocation referencing the
9406 beginning of the PLT for this GOT entry. */
9407 rel.r_offset = got_address;
9408 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9409 rel.r_addend = 0;
9410 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9411 }
9412 else if (htab->nacl_p)
9413 {
9414 /* Calculate the displacement between the PLT slot and the
9415 common tail that's part of the special initial PLT slot. */
9416 int32_t tail_displacement
9417 = ((splt->output_section->vma + splt->output_offset
9418 + ARM_NACL_PLT_TAIL_OFFSET)
9419 - (plt_address + htab->plt_entry_size + 4));
9420 BFD_ASSERT ((tail_displacement & 3) == 0);
9421 tail_displacement >>= 2;
9422
9423 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9424 || (-tail_displacement & 0xff000000) == 0);
9425
9426 /* Calculate the displacement between the PLT slot and the entry
9427 in the GOT. The offset accounts for the value produced by
9428 adding to pc in the penultimate instruction of the PLT stub. */
9429 got_displacement = (got_address
9430 - (plt_address + htab->plt_entry_size));
9431
9432 /* NaCl does not support interworking at all. */
9433 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9434
9435 put_arm_insn (htab, output_bfd,
9436 elf32_arm_nacl_plt_entry[0]
9437 | arm_movw_immediate (got_displacement),
9438 ptr + 0);
9439 put_arm_insn (htab, output_bfd,
9440 elf32_arm_nacl_plt_entry[1]
9441 | arm_movt_immediate (got_displacement),
9442 ptr + 4);
9443 put_arm_insn (htab, output_bfd,
9444 elf32_arm_nacl_plt_entry[2],
9445 ptr + 8);
9446 put_arm_insn (htab, output_bfd,
9447 elf32_arm_nacl_plt_entry[3]
9448 | (tail_displacement & 0x00ffffff),
9449 ptr + 12);
9450 }
9451 else if (using_thumb_only (htab))
9452 {
9453 /* PR ld/16017: Generate thumb only PLT entries. */
9454 if (!using_thumb2 (htab))
9455 {
9456 /* FIXME: We ought to be able to generate thumb-1 PLT
9457 instructions... */
9458 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9459 output_bfd);
9460 return FALSE;
9461 }
9462
9463 /* Calculate the displacement between the PLT slot and the entry in
9464 the GOT. The 12-byte offset accounts for the value produced by
9465 adding to pc in the 3rd instruction of the PLT stub. */
9466 got_displacement = got_address - (plt_address + 12);
9467
9468 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9469 instead of 'put_thumb_insn'. */
9470 put_arm_insn (htab, output_bfd,
9471 elf32_thumb2_plt_entry[0]
9472 | ((got_displacement & 0x000000ff) << 16)
9473 | ((got_displacement & 0x00000700) << 20)
9474 | ((got_displacement & 0x00000800) >> 1)
9475 | ((got_displacement & 0x0000f000) >> 12),
9476 ptr + 0);
9477 put_arm_insn (htab, output_bfd,
9478 elf32_thumb2_plt_entry[1]
9479 | ((got_displacement & 0x00ff0000) )
9480 | ((got_displacement & 0x07000000) << 4)
9481 | ((got_displacement & 0x08000000) >> 17)
9482 | ((got_displacement & 0xf0000000) >> 28),
9483 ptr + 4);
9484 put_arm_insn (htab, output_bfd,
9485 elf32_thumb2_plt_entry[2],
9486 ptr + 8);
9487 put_arm_insn (htab, output_bfd,
9488 elf32_thumb2_plt_entry[3],
9489 ptr + 12);
9490 }
9491 else
9492 {
9493 /* Calculate the displacement between the PLT slot and the
9494 entry in the GOT. The eight-byte offset accounts for the
9495 value produced by adding to pc in the first instruction
9496 of the PLT stub. */
9497 got_displacement = got_address - (plt_address + 8);
9498
9499 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9500 {
9501 put_thumb_insn (htab, output_bfd,
9502 elf32_arm_plt_thumb_stub[0], ptr - 4);
9503 put_thumb_insn (htab, output_bfd,
9504 elf32_arm_plt_thumb_stub[1], ptr - 2);
9505 }
9506
9507 if (!elf32_arm_use_long_plt_entry)
9508 {
9509 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9510
9511 put_arm_insn (htab, output_bfd,
9512 elf32_arm_plt_entry_short[0]
9513 | ((got_displacement & 0x0ff00000) >> 20),
9514 ptr + 0);
9515 put_arm_insn (htab, output_bfd,
9516 elf32_arm_plt_entry_short[1]
9517 | ((got_displacement & 0x000ff000) >> 12),
9518 ptr+ 4);
9519 put_arm_insn (htab, output_bfd,
9520 elf32_arm_plt_entry_short[2]
9521 | (got_displacement & 0x00000fff),
9522 ptr + 8);
9523 #ifdef FOUR_WORD_PLT
9524 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9525 #endif
9526 }
9527 else
9528 {
9529 put_arm_insn (htab, output_bfd,
9530 elf32_arm_plt_entry_long[0]
9531 | ((got_displacement & 0xf0000000) >> 28),
9532 ptr + 0);
9533 put_arm_insn (htab, output_bfd,
9534 elf32_arm_plt_entry_long[1]
9535 | ((got_displacement & 0x0ff00000) >> 20),
9536 ptr + 4);
9537 put_arm_insn (htab, output_bfd,
9538 elf32_arm_plt_entry_long[2]
9539 | ((got_displacement & 0x000ff000) >> 12),
9540 ptr+ 8);
9541 put_arm_insn (htab, output_bfd,
9542 elf32_arm_plt_entry_long[3]
9543 | (got_displacement & 0x00000fff),
9544 ptr + 12);
9545 }
9546 }
9547
9548 /* Fill in the entry in the .rel(a).(i)plt section. */
9549 rel.r_offset = got_address;
9550 rel.r_addend = 0;
9551 if (dynindx == -1)
9552 {
9553 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9554 The dynamic linker or static executable then calls SYM_VALUE
9555 to determine the correct run-time value of the .igot.plt entry. */
9556 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9557 initial_got_entry = sym_value;
9558 }
9559 else
9560 {
9561 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9562 initial_got_entry = (splt->output_section->vma
9563 + splt->output_offset);
9564 }
9565
9566 /* Fill in the entry in the global offset table. */
9567 bfd_put_32 (output_bfd, initial_got_entry,
9568 sgot->contents + got_offset);
9569 }
9570
9571 if (dynindx == -1)
9572 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9573 else
9574 {
9575 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9576 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9577 }
9578
9579 return TRUE;
9580 }
9581
9582 /* Some relocations map to different relocations depending on the
9583 target. Return the real relocation. */
9584
9585 static int
9586 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9587 int r_type)
9588 {
9589 switch (r_type)
9590 {
9591 case R_ARM_TARGET1:
9592 if (globals->target1_is_rel)
9593 return R_ARM_REL32;
9594 else
9595 return R_ARM_ABS32;
9596
9597 case R_ARM_TARGET2:
9598 return globals->target2_reloc;
9599
9600 default:
9601 return r_type;
9602 }
9603 }
9604
9605 /* Return the base VMA address which should be subtracted from real addresses
9606 when resolving @dtpoff relocation.
9607 This is PT_TLS segment p_vaddr. */
9608
9609 static bfd_vma
9610 dtpoff_base (struct bfd_link_info *info)
9611 {
9612 /* If tls_sec is NULL, we should have signalled an error already. */
9613 if (elf_hash_table (info)->tls_sec == NULL)
9614 return 0;
9615 return elf_hash_table (info)->tls_sec->vma;
9616 }
9617
9618 /* Return the relocation value for @tpoff relocation
9619 if STT_TLS virtual address is ADDRESS. */
9620
9621 static bfd_vma
9622 tpoff (struct bfd_link_info *info, bfd_vma address)
9623 {
9624 struct elf_link_hash_table *htab = elf_hash_table (info);
9625 bfd_vma base;
9626
9627 /* If tls_sec is NULL, we should have signalled an error already. */
9628 if (htab->tls_sec == NULL)
9629 return 0;
9630 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9631 return address - htab->tls_sec->vma + base;
9632 }
9633
9634 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9635 VALUE is the relocation value. */
9636
9637 static bfd_reloc_status_type
9638 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9639 {
9640 if (value > 0xfff)
9641 return bfd_reloc_overflow;
9642
9643 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9644 bfd_put_32 (abfd, value, data);
9645 return bfd_reloc_ok;
9646 }
9647
9648 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9649 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9650 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9651
9652 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9653 is to then call final_link_relocate. Return other values in the
9654 case of error.
9655
9656 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9657 the pre-relaxed code. It would be nice if the relocs were updated
9658 to match the optimization. */
9659
9660 static bfd_reloc_status_type
9661 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9662 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9663 Elf_Internal_Rela *rel, unsigned long is_local)
9664 {
9665 unsigned long insn;
9666
9667 switch (ELF32_R_TYPE (rel->r_info))
9668 {
9669 default:
9670 return bfd_reloc_notsupported;
9671
9672 case R_ARM_TLS_GOTDESC:
9673 if (is_local)
9674 insn = 0;
9675 else
9676 {
9677 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9678 if (insn & 1)
9679 insn -= 5; /* THUMB */
9680 else
9681 insn -= 8; /* ARM */
9682 }
9683 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9684 return bfd_reloc_continue;
9685
9686 case R_ARM_THM_TLS_DESCSEQ:
9687 /* Thumb insn. */
9688 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9689 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9690 {
9691 if (is_local)
9692 /* nop */
9693 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9694 }
9695 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9696 {
9697 if (is_local)
9698 /* nop */
9699 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9700 else
9701 /* ldr rx,[ry] */
9702 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9703 }
9704 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9705 {
9706 if (is_local)
9707 /* nop */
9708 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9709 else
9710 /* mov r0, rx */
9711 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9712 contents + rel->r_offset);
9713 }
9714 else
9715 {
9716 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9717 /* It's a 32 bit instruction, fetch the rest of it for
9718 error generation. */
9719 insn = (insn << 16)
9720 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9721 _bfd_error_handler
9722 /* xgettext:c-format */
9723 (_("%B(%A+%#Lx): unexpected Thumb instruction '%#lx' in TLS trampoline"),
9724 input_bfd, input_sec, rel->r_offset, insn);
9725 return bfd_reloc_notsupported;
9726 }
9727 break;
9728
9729 case R_ARM_TLS_DESCSEQ:
9730 /* arm insn. */
9731 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9732 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9733 {
9734 if (is_local)
9735 /* mov rx, ry */
9736 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9737 contents + rel->r_offset);
9738 }
9739 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9740 {
9741 if (is_local)
9742 /* nop */
9743 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9744 else
9745 /* ldr rx,[ry] */
9746 bfd_put_32 (input_bfd, insn & 0xfffff000,
9747 contents + rel->r_offset);
9748 }
9749 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9750 {
9751 if (is_local)
9752 /* nop */
9753 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9754 else
9755 /* mov r0, rx */
9756 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9757 contents + rel->r_offset);
9758 }
9759 else
9760 {
9761 _bfd_error_handler
9762 /* xgettext:c-format */
9763 (_("%B(%A+%#Lx): unexpected ARM instruction '%#lx' in TLS trampoline"),
9764 input_bfd, input_sec, rel->r_offset, insn);
9765 return bfd_reloc_notsupported;
9766 }
9767 break;
9768
9769 case R_ARM_TLS_CALL:
9770 /* GD->IE relaxation, turn the instruction into 'nop' or
9771 'ldr r0, [pc,r0]' */
9772 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9773 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9774 break;
9775
9776 case R_ARM_THM_TLS_CALL:
9777 /* GD->IE relaxation. */
9778 if (!is_local)
9779 /* add r0,pc; ldr r0, [r0] */
9780 insn = 0x44786800;
9781 else if (using_thumb2 (globals))
9782 /* nop.w */
9783 insn = 0xf3af8000;
9784 else
9785 /* nop; nop */
9786 insn = 0xbf00bf00;
9787
9788 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9789 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9790 break;
9791 }
9792 return bfd_reloc_ok;
9793 }
9794
9795 /* For a given value of n, calculate the value of G_n as required to
9796 deal with group relocations. We return it in the form of an
9797 encoded constant-and-rotation, together with the final residual. If n is
9798 specified as less than zero, then final_residual is filled with the
9799 input value and no further action is performed. */
9800
9801 static bfd_vma
9802 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9803 {
9804 int current_n;
9805 bfd_vma g_n;
9806 bfd_vma encoded_g_n = 0;
9807 bfd_vma residual = value; /* Also known as Y_n. */
9808
9809 for (current_n = 0; current_n <= n; current_n++)
9810 {
9811 int shift;
9812
9813 /* Calculate which part of the value to mask. */
9814 if (residual == 0)
9815 shift = 0;
9816 else
9817 {
9818 int msb;
9819
9820 /* Determine the most significant bit in the residual and
9821 align the resulting value to a 2-bit boundary. */
9822 for (msb = 30; msb >= 0; msb -= 2)
9823 if (residual & (3 << msb))
9824 break;
9825
9826 /* The desired shift is now (msb - 6), or zero, whichever
9827 is the greater. */
9828 shift = msb - 6;
9829 if (shift < 0)
9830 shift = 0;
9831 }
9832
9833 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9834 g_n = residual & (0xff << shift);
9835 encoded_g_n = (g_n >> shift)
9836 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9837
9838 /* Calculate the residual for the next time around. */
9839 residual &= ~g_n;
9840 }
9841
9842 *final_residual = residual;
9843
9844 return encoded_g_n;
9845 }
9846
9847 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9848 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9849
9850 static int
9851 identify_add_or_sub (bfd_vma insn)
9852 {
9853 int opcode = insn & 0x1e00000;
9854
9855 if (opcode == 1 << 23) /* ADD */
9856 return 1;
9857
9858 if (opcode == 1 << 22) /* SUB */
9859 return -1;
9860
9861 return 0;
9862 }
9863
9864 /* Perform a relocation as part of a final link. */
9865
9866 static bfd_reloc_status_type
9867 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9868 bfd * input_bfd,
9869 bfd * output_bfd,
9870 asection * input_section,
9871 bfd_byte * contents,
9872 Elf_Internal_Rela * rel,
9873 bfd_vma value,
9874 struct bfd_link_info * info,
9875 asection * sym_sec,
9876 const char * sym_name,
9877 unsigned char st_type,
9878 enum arm_st_branch_type branch_type,
9879 struct elf_link_hash_entry * h,
9880 bfd_boolean * unresolved_reloc_p,
9881 char ** error_message)
9882 {
9883 unsigned long r_type = howto->type;
9884 unsigned long r_symndx;
9885 bfd_byte * hit_data = contents + rel->r_offset;
9886 bfd_vma * local_got_offsets;
9887 bfd_vma * local_tlsdesc_gotents;
9888 asection * sgot;
9889 asection * splt;
9890 asection * sreloc = NULL;
9891 asection * srelgot;
9892 bfd_vma addend;
9893 bfd_signed_vma signed_addend;
9894 unsigned char dynreloc_st_type;
9895 bfd_vma dynreloc_value;
9896 struct elf32_arm_link_hash_table * globals;
9897 struct elf32_arm_link_hash_entry *eh;
9898 union gotplt_union *root_plt;
9899 struct arm_plt_info *arm_plt;
9900 bfd_vma plt_offset;
9901 bfd_vma gotplt_offset;
9902 bfd_boolean has_iplt_entry;
9903
9904 globals = elf32_arm_hash_table (info);
9905 if (globals == NULL)
9906 return bfd_reloc_notsupported;
9907
9908 BFD_ASSERT (is_arm_elf (input_bfd));
9909
9910 /* Some relocation types map to different relocations depending on the
9911 target. We pick the right one here. */
9912 r_type = arm_real_reloc_type (globals, r_type);
9913
9914 /* It is possible to have linker relaxations on some TLS access
9915 models. Update our information here. */
9916 r_type = elf32_arm_tls_transition (info, r_type, h);
9917
9918 if (r_type != howto->type)
9919 howto = elf32_arm_howto_from_type (r_type);
9920
9921 eh = (struct elf32_arm_link_hash_entry *) h;
9922 sgot = globals->root.sgot;
9923 local_got_offsets = elf_local_got_offsets (input_bfd);
9924 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9925
9926 if (globals->root.dynamic_sections_created)
9927 srelgot = globals->root.srelgot;
9928 else
9929 srelgot = NULL;
9930
9931 r_symndx = ELF32_R_SYM (rel->r_info);
9932
9933 if (globals->use_rel)
9934 {
9935 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9936
9937 if (addend & ((howto->src_mask + 1) >> 1))
9938 {
9939 signed_addend = -1;
9940 signed_addend &= ~ howto->src_mask;
9941 signed_addend |= addend;
9942 }
9943 else
9944 signed_addend = addend;
9945 }
9946 else
9947 addend = signed_addend = rel->r_addend;
9948
9949 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9950 are resolving a function call relocation. */
9951 if (using_thumb_only (globals)
9952 && (r_type == R_ARM_THM_CALL
9953 || r_type == R_ARM_THM_JUMP24)
9954 && branch_type == ST_BRANCH_TO_ARM)
9955 branch_type = ST_BRANCH_TO_THUMB;
9956
9957 /* Record the symbol information that should be used in dynamic
9958 relocations. */
9959 dynreloc_st_type = st_type;
9960 dynreloc_value = value;
9961 if (branch_type == ST_BRANCH_TO_THUMB)
9962 dynreloc_value |= 1;
9963
9964 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9965 VALUE appropriately for relocations that we resolve at link time. */
9966 has_iplt_entry = FALSE;
9967 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9968 &arm_plt)
9969 && root_plt->offset != (bfd_vma) -1)
9970 {
9971 plt_offset = root_plt->offset;
9972 gotplt_offset = arm_plt->got_offset;
9973
9974 if (h == NULL || eh->is_iplt)
9975 {
9976 has_iplt_entry = TRUE;
9977 splt = globals->root.iplt;
9978
9979 /* Populate .iplt entries here, because not all of them will
9980 be seen by finish_dynamic_symbol. The lower bit is set if
9981 we have already populated the entry. */
9982 if (plt_offset & 1)
9983 plt_offset--;
9984 else
9985 {
9986 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9987 -1, dynreloc_value))
9988 root_plt->offset |= 1;
9989 else
9990 return bfd_reloc_notsupported;
9991 }
9992
9993 /* Static relocations always resolve to the .iplt entry. */
9994 st_type = STT_FUNC;
9995 value = (splt->output_section->vma
9996 + splt->output_offset
9997 + plt_offset);
9998 branch_type = ST_BRANCH_TO_ARM;
9999
10000 /* If there are non-call relocations that resolve to the .iplt
10001 entry, then all dynamic ones must too. */
10002 if (arm_plt->noncall_refcount != 0)
10003 {
10004 dynreloc_st_type = st_type;
10005 dynreloc_value = value;
10006 }
10007 }
10008 else
10009 /* We populate the .plt entry in finish_dynamic_symbol. */
10010 splt = globals->root.splt;
10011 }
10012 else
10013 {
10014 splt = NULL;
10015 plt_offset = (bfd_vma) -1;
10016 gotplt_offset = (bfd_vma) -1;
10017 }
10018
10019 switch (r_type)
10020 {
10021 case R_ARM_NONE:
10022 /* We don't need to find a value for this symbol. It's just a
10023 marker. */
10024 *unresolved_reloc_p = FALSE;
10025 return bfd_reloc_ok;
10026
10027 case R_ARM_ABS12:
10028 if (!globals->vxworks_p)
10029 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10030 /* Fall through. */
10031
10032 case R_ARM_PC24:
10033 case R_ARM_ABS32:
10034 case R_ARM_ABS32_NOI:
10035 case R_ARM_REL32:
10036 case R_ARM_REL32_NOI:
10037 case R_ARM_CALL:
10038 case R_ARM_JUMP24:
10039 case R_ARM_XPC25:
10040 case R_ARM_PREL31:
10041 case R_ARM_PLT32:
10042 /* Handle relocations which should use the PLT entry. ABS32/REL32
10043 will use the symbol's value, which may point to a PLT entry, but we
10044 don't need to handle that here. If we created a PLT entry, all
10045 branches in this object should go to it, except if the PLT is too
10046 far away, in which case a long branch stub should be inserted. */
10047 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10048 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10049 && r_type != R_ARM_CALL
10050 && r_type != R_ARM_JUMP24
10051 && r_type != R_ARM_PLT32)
10052 && plt_offset != (bfd_vma) -1)
10053 {
10054 /* If we've created a .plt section, and assigned a PLT entry
10055 to this function, it must either be a STT_GNU_IFUNC reference
10056 or not be known to bind locally. In other cases, we should
10057 have cleared the PLT entry by now. */
10058 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10059
10060 value = (splt->output_section->vma
10061 + splt->output_offset
10062 + plt_offset);
10063 *unresolved_reloc_p = FALSE;
10064 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10065 contents, rel->r_offset, value,
10066 rel->r_addend);
10067 }
10068
10069 /* When generating a shared object or relocatable executable, these
10070 relocations are copied into the output file to be resolved at
10071 run time. */
10072 if ((bfd_link_pic (info)
10073 || globals->root.is_relocatable_executable)
10074 && (input_section->flags & SEC_ALLOC)
10075 && !(globals->vxworks_p
10076 && strcmp (input_section->output_section->name,
10077 ".tls_vars") == 0)
10078 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10079 || !SYMBOL_CALLS_LOCAL (info, h))
10080 && !(input_bfd == globals->stub_bfd
10081 && strstr (input_section->name, STUB_SUFFIX))
10082 && (h == NULL
10083 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10084 || h->root.type != bfd_link_hash_undefweak)
10085 && r_type != R_ARM_PC24
10086 && r_type != R_ARM_CALL
10087 && r_type != R_ARM_JUMP24
10088 && r_type != R_ARM_PREL31
10089 && r_type != R_ARM_PLT32)
10090 {
10091 Elf_Internal_Rela outrel;
10092 bfd_boolean skip, relocate;
10093
10094 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10095 && !h->def_regular)
10096 {
10097 char *v = _("shared object");
10098
10099 if (bfd_link_executable (info))
10100 v = _("PIE executable");
10101
10102 _bfd_error_handler
10103 (_("%B: relocation %s against external or undefined symbol `%s'"
10104 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10105 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10106 return bfd_reloc_notsupported;
10107 }
10108
10109 *unresolved_reloc_p = FALSE;
10110
10111 if (sreloc == NULL && globals->root.dynamic_sections_created)
10112 {
10113 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10114 ! globals->use_rel);
10115
10116 if (sreloc == NULL)
10117 return bfd_reloc_notsupported;
10118 }
10119
10120 skip = FALSE;
10121 relocate = FALSE;
10122
10123 outrel.r_addend = addend;
10124 outrel.r_offset =
10125 _bfd_elf_section_offset (output_bfd, info, input_section,
10126 rel->r_offset);
10127 if (outrel.r_offset == (bfd_vma) -1)
10128 skip = TRUE;
10129 else if (outrel.r_offset == (bfd_vma) -2)
10130 skip = TRUE, relocate = TRUE;
10131 outrel.r_offset += (input_section->output_section->vma
10132 + input_section->output_offset);
10133
10134 if (skip)
10135 memset (&outrel, 0, sizeof outrel);
10136 else if (h != NULL
10137 && h->dynindx != -1
10138 && (!bfd_link_pic (info)
10139 || !(bfd_link_pie (info)
10140 || SYMBOLIC_BIND (info, h))
10141 || !h->def_regular))
10142 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10143 else
10144 {
10145 int symbol;
10146
10147 /* This symbol is local, or marked to become local. */
10148 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10149 if (globals->symbian_p)
10150 {
10151 asection *osec;
10152
10153 /* On Symbian OS, the data segment and text segement
10154 can be relocated independently. Therefore, we
10155 must indicate the segment to which this
10156 relocation is relative. The BPABI allows us to
10157 use any symbol in the right segment; we just use
10158 the section symbol as it is convenient. (We
10159 cannot use the symbol given by "h" directly as it
10160 will not appear in the dynamic symbol table.)
10161
10162 Note that the dynamic linker ignores the section
10163 symbol value, so we don't subtract osec->vma
10164 from the emitted reloc addend. */
10165 if (sym_sec)
10166 osec = sym_sec->output_section;
10167 else
10168 osec = input_section->output_section;
10169 symbol = elf_section_data (osec)->dynindx;
10170 if (symbol == 0)
10171 {
10172 struct elf_link_hash_table *htab = elf_hash_table (info);
10173
10174 if ((osec->flags & SEC_READONLY) == 0
10175 && htab->data_index_section != NULL)
10176 osec = htab->data_index_section;
10177 else
10178 osec = htab->text_index_section;
10179 symbol = elf_section_data (osec)->dynindx;
10180 }
10181 BFD_ASSERT (symbol != 0);
10182 }
10183 else
10184 /* On SVR4-ish systems, the dynamic loader cannot
10185 relocate the text and data segments independently,
10186 so the symbol does not matter. */
10187 symbol = 0;
10188 if (dynreloc_st_type == STT_GNU_IFUNC)
10189 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10190 to the .iplt entry. Instead, every non-call reference
10191 must use an R_ARM_IRELATIVE relocation to obtain the
10192 correct run-time address. */
10193 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10194 else
10195 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10196 if (globals->use_rel)
10197 relocate = TRUE;
10198 else
10199 outrel.r_addend += dynreloc_value;
10200 }
10201
10202 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10203
10204 /* If this reloc is against an external symbol, we do not want to
10205 fiddle with the addend. Otherwise, we need to include the symbol
10206 value so that it becomes an addend for the dynamic reloc. */
10207 if (! relocate)
10208 return bfd_reloc_ok;
10209
10210 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10211 contents, rel->r_offset,
10212 dynreloc_value, (bfd_vma) 0);
10213 }
10214 else switch (r_type)
10215 {
10216 case R_ARM_ABS12:
10217 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10218
10219 case R_ARM_XPC25: /* Arm BLX instruction. */
10220 case R_ARM_CALL:
10221 case R_ARM_JUMP24:
10222 case R_ARM_PC24: /* Arm B/BL instruction. */
10223 case R_ARM_PLT32:
10224 {
10225 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10226
10227 if (r_type == R_ARM_XPC25)
10228 {
10229 /* Check for Arm calling Arm function. */
10230 /* FIXME: Should we translate the instruction into a BL
10231 instruction instead ? */
10232 if (branch_type != ST_BRANCH_TO_THUMB)
10233 _bfd_error_handler
10234 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10235 input_bfd,
10236 h ? h->root.root.string : "(local)");
10237 }
10238 else if (r_type == R_ARM_PC24)
10239 {
10240 /* Check for Arm calling Thumb function. */
10241 if (branch_type == ST_BRANCH_TO_THUMB)
10242 {
10243 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10244 output_bfd, input_section,
10245 hit_data, sym_sec, rel->r_offset,
10246 signed_addend, value,
10247 error_message))
10248 return bfd_reloc_ok;
10249 else
10250 return bfd_reloc_dangerous;
10251 }
10252 }
10253
10254 /* Check if a stub has to be inserted because the
10255 destination is too far or we are changing mode. */
10256 if ( r_type == R_ARM_CALL
10257 || r_type == R_ARM_JUMP24
10258 || r_type == R_ARM_PLT32)
10259 {
10260 enum elf32_arm_stub_type stub_type = arm_stub_none;
10261 struct elf32_arm_link_hash_entry *hash;
10262
10263 hash = (struct elf32_arm_link_hash_entry *) h;
10264 stub_type = arm_type_of_stub (info, input_section, rel,
10265 st_type, &branch_type,
10266 hash, value, sym_sec,
10267 input_bfd, sym_name);
10268
10269 if (stub_type != arm_stub_none)
10270 {
10271 /* The target is out of reach, so redirect the
10272 branch to the local stub for this function. */
10273 stub_entry = elf32_arm_get_stub_entry (input_section,
10274 sym_sec, h,
10275 rel, globals,
10276 stub_type);
10277 {
10278 if (stub_entry != NULL)
10279 value = (stub_entry->stub_offset
10280 + stub_entry->stub_sec->output_offset
10281 + stub_entry->stub_sec->output_section->vma);
10282
10283 if (plt_offset != (bfd_vma) -1)
10284 *unresolved_reloc_p = FALSE;
10285 }
10286 }
10287 else
10288 {
10289 /* If the call goes through a PLT entry, make sure to
10290 check distance to the right destination address. */
10291 if (plt_offset != (bfd_vma) -1)
10292 {
10293 value = (splt->output_section->vma
10294 + splt->output_offset
10295 + plt_offset);
10296 *unresolved_reloc_p = FALSE;
10297 /* The PLT entry is in ARM mode, regardless of the
10298 target function. */
10299 branch_type = ST_BRANCH_TO_ARM;
10300 }
10301 }
10302 }
10303
10304 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10305 where:
10306 S is the address of the symbol in the relocation.
10307 P is address of the instruction being relocated.
10308 A is the addend (extracted from the instruction) in bytes.
10309
10310 S is held in 'value'.
10311 P is the base address of the section containing the
10312 instruction plus the offset of the reloc into that
10313 section, ie:
10314 (input_section->output_section->vma +
10315 input_section->output_offset +
10316 rel->r_offset).
10317 A is the addend, converted into bytes, ie:
10318 (signed_addend * 4)
10319
10320 Note: None of these operations have knowledge of the pipeline
10321 size of the processor, thus it is up to the assembler to
10322 encode this information into the addend. */
10323 value -= (input_section->output_section->vma
10324 + input_section->output_offset);
10325 value -= rel->r_offset;
10326 if (globals->use_rel)
10327 value += (signed_addend << howto->size);
10328 else
10329 /* RELA addends do not have to be adjusted by howto->size. */
10330 value += signed_addend;
10331
10332 signed_addend = value;
10333 signed_addend >>= howto->rightshift;
10334
10335 /* A branch to an undefined weak symbol is turned into a jump to
10336 the next instruction unless a PLT entry will be created.
10337 Do the same for local undefined symbols (but not for STN_UNDEF).
10338 The jump to the next instruction is optimized as a NOP depending
10339 on the architecture. */
10340 if (h ? (h->root.type == bfd_link_hash_undefweak
10341 && plt_offset == (bfd_vma) -1)
10342 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10343 {
10344 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10345
10346 if (arch_has_arm_nop (globals))
10347 value |= 0x0320f000;
10348 else
10349 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10350 }
10351 else
10352 {
10353 /* Perform a signed range check. */
10354 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10355 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10356 return bfd_reloc_overflow;
10357
10358 addend = (value & 2);
10359
10360 value = (signed_addend & howto->dst_mask)
10361 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10362
10363 if (r_type == R_ARM_CALL)
10364 {
10365 /* Set the H bit in the BLX instruction. */
10366 if (branch_type == ST_BRANCH_TO_THUMB)
10367 {
10368 if (addend)
10369 value |= (1 << 24);
10370 else
10371 value &= ~(bfd_vma)(1 << 24);
10372 }
10373
10374 /* Select the correct instruction (BL or BLX). */
10375 /* Only if we are not handling a BL to a stub. In this
10376 case, mode switching is performed by the stub. */
10377 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10378 value |= (1 << 28);
10379 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10380 {
10381 value &= ~(bfd_vma)(1 << 28);
10382 value |= (1 << 24);
10383 }
10384 }
10385 }
10386 }
10387 break;
10388
10389 case R_ARM_ABS32:
10390 value += addend;
10391 if (branch_type == ST_BRANCH_TO_THUMB)
10392 value |= 1;
10393 break;
10394
10395 case R_ARM_ABS32_NOI:
10396 value += addend;
10397 break;
10398
10399 case R_ARM_REL32:
10400 value += addend;
10401 if (branch_type == ST_BRANCH_TO_THUMB)
10402 value |= 1;
10403 value -= (input_section->output_section->vma
10404 + input_section->output_offset + rel->r_offset);
10405 break;
10406
10407 case R_ARM_REL32_NOI:
10408 value += addend;
10409 value -= (input_section->output_section->vma
10410 + input_section->output_offset + rel->r_offset);
10411 break;
10412
10413 case R_ARM_PREL31:
10414 value -= (input_section->output_section->vma
10415 + input_section->output_offset + rel->r_offset);
10416 value += signed_addend;
10417 if (! h || h->root.type != bfd_link_hash_undefweak)
10418 {
10419 /* Check for overflow. */
10420 if ((value ^ (value >> 1)) & (1 << 30))
10421 return bfd_reloc_overflow;
10422 }
10423 value &= 0x7fffffff;
10424 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10425 if (branch_type == ST_BRANCH_TO_THUMB)
10426 value |= 1;
10427 break;
10428 }
10429
10430 bfd_put_32 (input_bfd, value, hit_data);
10431 return bfd_reloc_ok;
10432
10433 case R_ARM_ABS8:
10434 /* PR 16202: Refectch the addend using the correct size. */
10435 if (globals->use_rel)
10436 addend = bfd_get_8 (input_bfd, hit_data);
10437 value += addend;
10438
10439 /* There is no way to tell whether the user intended to use a signed or
10440 unsigned addend. When checking for overflow we accept either,
10441 as specified by the AAELF. */
10442 if ((long) value > 0xff || (long) value < -0x80)
10443 return bfd_reloc_overflow;
10444
10445 bfd_put_8 (input_bfd, value, hit_data);
10446 return bfd_reloc_ok;
10447
10448 case R_ARM_ABS16:
10449 /* PR 16202: Refectch the addend using the correct size. */
10450 if (globals->use_rel)
10451 addend = bfd_get_16 (input_bfd, hit_data);
10452 value += addend;
10453
10454 /* See comment for R_ARM_ABS8. */
10455 if ((long) value > 0xffff || (long) value < -0x8000)
10456 return bfd_reloc_overflow;
10457
10458 bfd_put_16 (input_bfd, value, hit_data);
10459 return bfd_reloc_ok;
10460
10461 case R_ARM_THM_ABS5:
10462 /* Support ldr and str instructions for the thumb. */
10463 if (globals->use_rel)
10464 {
10465 /* Need to refetch addend. */
10466 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10467 /* ??? Need to determine shift amount from operand size. */
10468 addend >>= howto->rightshift;
10469 }
10470 value += addend;
10471
10472 /* ??? Isn't value unsigned? */
10473 if ((long) value > 0x1f || (long) value < -0x10)
10474 return bfd_reloc_overflow;
10475
10476 /* ??? Value needs to be properly shifted into place first. */
10477 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10478 bfd_put_16 (input_bfd, value, hit_data);
10479 return bfd_reloc_ok;
10480
10481 case R_ARM_THM_ALU_PREL_11_0:
10482 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10483 {
10484 bfd_vma insn;
10485 bfd_signed_vma relocation;
10486
10487 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10488 | bfd_get_16 (input_bfd, hit_data + 2);
10489
10490 if (globals->use_rel)
10491 {
10492 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10493 | ((insn & (1 << 26)) >> 15);
10494 if (insn & 0xf00000)
10495 signed_addend = -signed_addend;
10496 }
10497
10498 relocation = value + signed_addend;
10499 relocation -= Pa (input_section->output_section->vma
10500 + input_section->output_offset
10501 + rel->r_offset);
10502
10503 /* PR 21523: Use an absolute value. The user of this reloc will
10504 have already selected an ADD or SUB insn appropriately. */
10505 value = labs (relocation);
10506
10507 if (value >= 0x1000)
10508 return bfd_reloc_overflow;
10509
10510 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10511 if (branch_type == ST_BRANCH_TO_THUMB)
10512 value |= 1;
10513
10514 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10515 | ((value & 0x700) << 4)
10516 | ((value & 0x800) << 15);
10517 if (relocation < 0)
10518 insn |= 0xa00000;
10519
10520 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10521 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10522
10523 return bfd_reloc_ok;
10524 }
10525
10526 case R_ARM_THM_PC8:
10527 /* PR 10073: This reloc is not generated by the GNU toolchain,
10528 but it is supported for compatibility with third party libraries
10529 generated by other compilers, specifically the ARM/IAR. */
10530 {
10531 bfd_vma insn;
10532 bfd_signed_vma relocation;
10533
10534 insn = bfd_get_16 (input_bfd, hit_data);
10535
10536 if (globals->use_rel)
10537 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10538
10539 relocation = value + addend;
10540 relocation -= Pa (input_section->output_section->vma
10541 + input_section->output_offset
10542 + rel->r_offset);
10543
10544 value = relocation;
10545
10546 /* We do not check for overflow of this reloc. Although strictly
10547 speaking this is incorrect, it appears to be necessary in order
10548 to work with IAR generated relocs. Since GCC and GAS do not
10549 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10550 a problem for them. */
10551 value &= 0x3fc;
10552
10553 insn = (insn & 0xff00) | (value >> 2);
10554
10555 bfd_put_16 (input_bfd, insn, hit_data);
10556
10557 return bfd_reloc_ok;
10558 }
10559
10560 case R_ARM_THM_PC12:
10561 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10562 {
10563 bfd_vma insn;
10564 bfd_signed_vma relocation;
10565
10566 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10567 | bfd_get_16 (input_bfd, hit_data + 2);
10568
10569 if (globals->use_rel)
10570 {
10571 signed_addend = insn & 0xfff;
10572 if (!(insn & (1 << 23)))
10573 signed_addend = -signed_addend;
10574 }
10575
10576 relocation = value + signed_addend;
10577 relocation -= Pa (input_section->output_section->vma
10578 + input_section->output_offset
10579 + rel->r_offset);
10580
10581 value = relocation;
10582
10583 if (value >= 0x1000)
10584 return bfd_reloc_overflow;
10585
10586 insn = (insn & 0xff7ff000) | value;
10587 if (relocation >= 0)
10588 insn |= (1 << 23);
10589
10590 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10591 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10592
10593 return bfd_reloc_ok;
10594 }
10595
10596 case R_ARM_THM_XPC22:
10597 case R_ARM_THM_CALL:
10598 case R_ARM_THM_JUMP24:
10599 /* Thumb BL (branch long instruction). */
10600 {
10601 bfd_vma relocation;
10602 bfd_vma reloc_sign;
10603 bfd_boolean overflow = FALSE;
10604 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10605 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10606 bfd_signed_vma reloc_signed_max;
10607 bfd_signed_vma reloc_signed_min;
10608 bfd_vma check;
10609 bfd_signed_vma signed_check;
10610 int bitsize;
10611 const int thumb2 = using_thumb2 (globals);
10612 const int thumb2_bl = using_thumb2_bl (globals);
10613
10614 /* A branch to an undefined weak symbol is turned into a jump to
10615 the next instruction unless a PLT entry will be created.
10616 The jump to the next instruction is optimized as a NOP.W for
10617 Thumb-2 enabled architectures. */
10618 if (h && h->root.type == bfd_link_hash_undefweak
10619 && plt_offset == (bfd_vma) -1)
10620 {
10621 if (thumb2)
10622 {
10623 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10624 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10625 }
10626 else
10627 {
10628 bfd_put_16 (input_bfd, 0xe000, hit_data);
10629 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10630 }
10631 return bfd_reloc_ok;
10632 }
10633
10634 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10635 with Thumb-1) involving the J1 and J2 bits. */
10636 if (globals->use_rel)
10637 {
10638 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10639 bfd_vma upper = upper_insn & 0x3ff;
10640 bfd_vma lower = lower_insn & 0x7ff;
10641 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10642 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10643 bfd_vma i1 = j1 ^ s ? 0 : 1;
10644 bfd_vma i2 = j2 ^ s ? 0 : 1;
10645
10646 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10647 /* Sign extend. */
10648 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10649
10650 signed_addend = addend;
10651 }
10652
10653 if (r_type == R_ARM_THM_XPC22)
10654 {
10655 /* Check for Thumb to Thumb call. */
10656 /* FIXME: Should we translate the instruction into a BL
10657 instruction instead ? */
10658 if (branch_type == ST_BRANCH_TO_THUMB)
10659 _bfd_error_handler
10660 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10661 input_bfd,
10662 h ? h->root.root.string : "(local)");
10663 }
10664 else
10665 {
10666 /* If it is not a call to Thumb, assume call to Arm.
10667 If it is a call relative to a section name, then it is not a
10668 function call at all, but rather a long jump. Calls through
10669 the PLT do not require stubs. */
10670 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10671 {
10672 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10673 {
10674 /* Convert BL to BLX. */
10675 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10676 }
10677 else if (( r_type != R_ARM_THM_CALL)
10678 && (r_type != R_ARM_THM_JUMP24))
10679 {
10680 if (elf32_thumb_to_arm_stub
10681 (info, sym_name, input_bfd, output_bfd, input_section,
10682 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10683 error_message))
10684 return bfd_reloc_ok;
10685 else
10686 return bfd_reloc_dangerous;
10687 }
10688 }
10689 else if (branch_type == ST_BRANCH_TO_THUMB
10690 && globals->use_blx
10691 && r_type == R_ARM_THM_CALL)
10692 {
10693 /* Make sure this is a BL. */
10694 lower_insn |= 0x1800;
10695 }
10696 }
10697
10698 enum elf32_arm_stub_type stub_type = arm_stub_none;
10699 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10700 {
10701 /* Check if a stub has to be inserted because the destination
10702 is too far. */
10703 struct elf32_arm_stub_hash_entry *stub_entry;
10704 struct elf32_arm_link_hash_entry *hash;
10705
10706 hash = (struct elf32_arm_link_hash_entry *) h;
10707
10708 stub_type = arm_type_of_stub (info, input_section, rel,
10709 st_type, &branch_type,
10710 hash, value, sym_sec,
10711 input_bfd, sym_name);
10712
10713 if (stub_type != arm_stub_none)
10714 {
10715 /* The target is out of reach or we are changing modes, so
10716 redirect the branch to the local stub for this
10717 function. */
10718 stub_entry = elf32_arm_get_stub_entry (input_section,
10719 sym_sec, h,
10720 rel, globals,
10721 stub_type);
10722 if (stub_entry != NULL)
10723 {
10724 value = (stub_entry->stub_offset
10725 + stub_entry->stub_sec->output_offset
10726 + stub_entry->stub_sec->output_section->vma);
10727
10728 if (plt_offset != (bfd_vma) -1)
10729 *unresolved_reloc_p = FALSE;
10730 }
10731
10732 /* If this call becomes a call to Arm, force BLX. */
10733 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10734 {
10735 if ((stub_entry
10736 && !arm_stub_is_thumb (stub_entry->stub_type))
10737 || branch_type != ST_BRANCH_TO_THUMB)
10738 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10739 }
10740 }
10741 }
10742
10743 /* Handle calls via the PLT. */
10744 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10745 {
10746 value = (splt->output_section->vma
10747 + splt->output_offset
10748 + plt_offset);
10749
10750 if (globals->use_blx
10751 && r_type == R_ARM_THM_CALL
10752 && ! using_thumb_only (globals))
10753 {
10754 /* If the Thumb BLX instruction is available, convert
10755 the BL to a BLX instruction to call the ARM-mode
10756 PLT entry. */
10757 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10758 branch_type = ST_BRANCH_TO_ARM;
10759 }
10760 else
10761 {
10762 if (! using_thumb_only (globals))
10763 /* Target the Thumb stub before the ARM PLT entry. */
10764 value -= PLT_THUMB_STUB_SIZE;
10765 branch_type = ST_BRANCH_TO_THUMB;
10766 }
10767 *unresolved_reloc_p = FALSE;
10768 }
10769
10770 relocation = value + signed_addend;
10771
10772 relocation -= (input_section->output_section->vma
10773 + input_section->output_offset
10774 + rel->r_offset);
10775
10776 check = relocation >> howto->rightshift;
10777
10778 /* If this is a signed value, the rightshift just dropped
10779 leading 1 bits (assuming twos complement). */
10780 if ((bfd_signed_vma) relocation >= 0)
10781 signed_check = check;
10782 else
10783 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10784
10785 /* Calculate the permissable maximum and minimum values for
10786 this relocation according to whether we're relocating for
10787 Thumb-2 or not. */
10788 bitsize = howto->bitsize;
10789 if (!thumb2_bl)
10790 bitsize -= 2;
10791 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10792 reloc_signed_min = ~reloc_signed_max;
10793
10794 /* Assumes two's complement. */
10795 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10796 overflow = TRUE;
10797
10798 if ((lower_insn & 0x5000) == 0x4000)
10799 /* For a BLX instruction, make sure that the relocation is rounded up
10800 to a word boundary. This follows the semantics of the instruction
10801 which specifies that bit 1 of the target address will come from bit
10802 1 of the base address. */
10803 relocation = (relocation + 2) & ~ 3;
10804
10805 /* Put RELOCATION back into the insn. Assumes two's complement.
10806 We use the Thumb-2 encoding, which is safe even if dealing with
10807 a Thumb-1 instruction by virtue of our overflow check above. */
10808 reloc_sign = (signed_check < 0) ? 1 : 0;
10809 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10810 | ((relocation >> 12) & 0x3ff)
10811 | (reloc_sign << 10);
10812 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10813 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10814 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10815 | ((relocation >> 1) & 0x7ff);
10816
10817 /* Put the relocated value back in the object file: */
10818 bfd_put_16 (input_bfd, upper_insn, hit_data);
10819 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10820
10821 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10822 }
10823 break;
10824
10825 case R_ARM_THM_JUMP19:
10826 /* Thumb32 conditional branch instruction. */
10827 {
10828 bfd_vma relocation;
10829 bfd_boolean overflow = FALSE;
10830 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10831 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10832 bfd_signed_vma reloc_signed_max = 0xffffe;
10833 bfd_signed_vma reloc_signed_min = -0x100000;
10834 bfd_signed_vma signed_check;
10835 enum elf32_arm_stub_type stub_type = arm_stub_none;
10836 struct elf32_arm_stub_hash_entry *stub_entry;
10837 struct elf32_arm_link_hash_entry *hash;
10838
10839 /* Need to refetch the addend, reconstruct the top three bits,
10840 and squish the two 11 bit pieces together. */
10841 if (globals->use_rel)
10842 {
10843 bfd_vma S = (upper_insn & 0x0400) >> 10;
10844 bfd_vma upper = (upper_insn & 0x003f);
10845 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10846 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10847 bfd_vma lower = (lower_insn & 0x07ff);
10848
10849 upper |= J1 << 6;
10850 upper |= J2 << 7;
10851 upper |= (!S) << 8;
10852 upper -= 0x0100; /* Sign extend. */
10853
10854 addend = (upper << 12) | (lower << 1);
10855 signed_addend = addend;
10856 }
10857
10858 /* Handle calls via the PLT. */
10859 if (plt_offset != (bfd_vma) -1)
10860 {
10861 value = (splt->output_section->vma
10862 + splt->output_offset
10863 + plt_offset);
10864 /* Target the Thumb stub before the ARM PLT entry. */
10865 value -= PLT_THUMB_STUB_SIZE;
10866 *unresolved_reloc_p = FALSE;
10867 }
10868
10869 hash = (struct elf32_arm_link_hash_entry *)h;
10870
10871 stub_type = arm_type_of_stub (info, input_section, rel,
10872 st_type, &branch_type,
10873 hash, value, sym_sec,
10874 input_bfd, sym_name);
10875 if (stub_type != arm_stub_none)
10876 {
10877 stub_entry = elf32_arm_get_stub_entry (input_section,
10878 sym_sec, h,
10879 rel, globals,
10880 stub_type);
10881 if (stub_entry != NULL)
10882 {
10883 value = (stub_entry->stub_offset
10884 + stub_entry->stub_sec->output_offset
10885 + stub_entry->stub_sec->output_section->vma);
10886 }
10887 }
10888
10889 relocation = value + signed_addend;
10890 relocation -= (input_section->output_section->vma
10891 + input_section->output_offset
10892 + rel->r_offset);
10893 signed_check = (bfd_signed_vma) relocation;
10894
10895 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10896 overflow = TRUE;
10897
10898 /* Put RELOCATION back into the insn. */
10899 {
10900 bfd_vma S = (relocation & 0x00100000) >> 20;
10901 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10902 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10903 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10904 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10905
10906 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10907 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10908 }
10909
10910 /* Put the relocated value back in the object file: */
10911 bfd_put_16 (input_bfd, upper_insn, hit_data);
10912 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10913
10914 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10915 }
10916
10917 case R_ARM_THM_JUMP11:
10918 case R_ARM_THM_JUMP8:
10919 case R_ARM_THM_JUMP6:
10920 /* Thumb B (branch) instruction). */
10921 {
10922 bfd_signed_vma relocation;
10923 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10924 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10925 bfd_signed_vma signed_check;
10926
10927 /* CZB cannot jump backward. */
10928 if (r_type == R_ARM_THM_JUMP6)
10929 reloc_signed_min = 0;
10930
10931 if (globals->use_rel)
10932 {
10933 /* Need to refetch addend. */
10934 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10935 if (addend & ((howto->src_mask + 1) >> 1))
10936 {
10937 signed_addend = -1;
10938 signed_addend &= ~ howto->src_mask;
10939 signed_addend |= addend;
10940 }
10941 else
10942 signed_addend = addend;
10943 /* The value in the insn has been right shifted. We need to
10944 undo this, so that we can perform the address calculation
10945 in terms of bytes. */
10946 signed_addend <<= howto->rightshift;
10947 }
10948 relocation = value + signed_addend;
10949
10950 relocation -= (input_section->output_section->vma
10951 + input_section->output_offset
10952 + rel->r_offset);
10953
10954 relocation >>= howto->rightshift;
10955 signed_check = relocation;
10956
10957 if (r_type == R_ARM_THM_JUMP6)
10958 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10959 else
10960 relocation &= howto->dst_mask;
10961 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10962
10963 bfd_put_16 (input_bfd, relocation, hit_data);
10964
10965 /* Assumes two's complement. */
10966 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10967 return bfd_reloc_overflow;
10968
10969 return bfd_reloc_ok;
10970 }
10971
10972 case R_ARM_ALU_PCREL7_0:
10973 case R_ARM_ALU_PCREL15_8:
10974 case R_ARM_ALU_PCREL23_15:
10975 {
10976 bfd_vma insn;
10977 bfd_vma relocation;
10978
10979 insn = bfd_get_32 (input_bfd, hit_data);
10980 if (globals->use_rel)
10981 {
10982 /* Extract the addend. */
10983 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10984 signed_addend = addend;
10985 }
10986 relocation = value + signed_addend;
10987
10988 relocation -= (input_section->output_section->vma
10989 + input_section->output_offset
10990 + rel->r_offset);
10991 insn = (insn & ~0xfff)
10992 | ((howto->bitpos << 7) & 0xf00)
10993 | ((relocation >> howto->bitpos) & 0xff);
10994 bfd_put_32 (input_bfd, value, hit_data);
10995 }
10996 return bfd_reloc_ok;
10997
10998 case R_ARM_GNU_VTINHERIT:
10999 case R_ARM_GNU_VTENTRY:
11000 return bfd_reloc_ok;
11001
11002 case R_ARM_GOTOFF32:
11003 /* Relocation is relative to the start of the
11004 global offset table. */
11005
11006 BFD_ASSERT (sgot != NULL);
11007 if (sgot == NULL)
11008 return bfd_reloc_notsupported;
11009
11010 /* If we are addressing a Thumb function, we need to adjust the
11011 address by one, so that attempts to call the function pointer will
11012 correctly interpret it as Thumb code. */
11013 if (branch_type == ST_BRANCH_TO_THUMB)
11014 value += 1;
11015
11016 /* Note that sgot->output_offset is not involved in this
11017 calculation. We always want the start of .got. If we
11018 define _GLOBAL_OFFSET_TABLE in a different way, as is
11019 permitted by the ABI, we might have to change this
11020 calculation. */
11021 value -= sgot->output_section->vma;
11022 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11023 contents, rel->r_offset, value,
11024 rel->r_addend);
11025
11026 case R_ARM_GOTPC:
11027 /* Use global offset table as symbol value. */
11028 BFD_ASSERT (sgot != NULL);
11029
11030 if (sgot == NULL)
11031 return bfd_reloc_notsupported;
11032
11033 *unresolved_reloc_p = FALSE;
11034 value = sgot->output_section->vma;
11035 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11036 contents, rel->r_offset, value,
11037 rel->r_addend);
11038
11039 case R_ARM_GOT32:
11040 case R_ARM_GOT_PREL:
11041 /* Relocation is to the entry for this symbol in the
11042 global offset table. */
11043 if (sgot == NULL)
11044 return bfd_reloc_notsupported;
11045
11046 if (dynreloc_st_type == STT_GNU_IFUNC
11047 && plt_offset != (bfd_vma) -1
11048 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11049 {
11050 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11051 symbol, and the relocation resolves directly to the runtime
11052 target rather than to the .iplt entry. This means that any
11053 .got entry would be the same value as the .igot.plt entry,
11054 so there's no point creating both. */
11055 sgot = globals->root.igotplt;
11056 value = sgot->output_offset + gotplt_offset;
11057 }
11058 else if (h != NULL)
11059 {
11060 bfd_vma off;
11061
11062 off = h->got.offset;
11063 BFD_ASSERT (off != (bfd_vma) -1);
11064 if ((off & 1) != 0)
11065 {
11066 /* We have already processsed one GOT relocation against
11067 this symbol. */
11068 off &= ~1;
11069 if (globals->root.dynamic_sections_created
11070 && !SYMBOL_REFERENCES_LOCAL (info, h))
11071 *unresolved_reloc_p = FALSE;
11072 }
11073 else
11074 {
11075 Elf_Internal_Rela outrel;
11076
11077 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11078 {
11079 /* If the symbol doesn't resolve locally in a static
11080 object, we have an undefined reference. If the
11081 symbol doesn't resolve locally in a dynamic object,
11082 it should be resolved by the dynamic linker. */
11083 if (globals->root.dynamic_sections_created)
11084 {
11085 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11086 *unresolved_reloc_p = FALSE;
11087 }
11088 else
11089 outrel.r_info = 0;
11090 outrel.r_addend = 0;
11091 }
11092 else
11093 {
11094 if (dynreloc_st_type == STT_GNU_IFUNC)
11095 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11096 else if (bfd_link_pic (info)
11097 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11098 || h->root.type != bfd_link_hash_undefweak))
11099 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11100 else
11101 outrel.r_info = 0;
11102 outrel.r_addend = dynreloc_value;
11103 }
11104
11105 /* The GOT entry is initialized to zero by default.
11106 See if we should install a different value. */
11107 if (outrel.r_addend != 0
11108 && (outrel.r_info == 0 || globals->use_rel))
11109 {
11110 bfd_put_32 (output_bfd, outrel.r_addend,
11111 sgot->contents + off);
11112 outrel.r_addend = 0;
11113 }
11114
11115 if (outrel.r_info != 0)
11116 {
11117 outrel.r_offset = (sgot->output_section->vma
11118 + sgot->output_offset
11119 + off);
11120 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11121 }
11122 h->got.offset |= 1;
11123 }
11124 value = sgot->output_offset + off;
11125 }
11126 else
11127 {
11128 bfd_vma off;
11129
11130 BFD_ASSERT (local_got_offsets != NULL
11131 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11132
11133 off = local_got_offsets[r_symndx];
11134
11135 /* The offset must always be a multiple of 4. We use the
11136 least significant bit to record whether we have already
11137 generated the necessary reloc. */
11138 if ((off & 1) != 0)
11139 off &= ~1;
11140 else
11141 {
11142 if (globals->use_rel)
11143 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11144
11145 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11146 {
11147 Elf_Internal_Rela outrel;
11148
11149 outrel.r_addend = addend + dynreloc_value;
11150 outrel.r_offset = (sgot->output_section->vma
11151 + sgot->output_offset
11152 + off);
11153 if (dynreloc_st_type == STT_GNU_IFUNC)
11154 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11155 else
11156 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11157 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11158 }
11159
11160 local_got_offsets[r_symndx] |= 1;
11161 }
11162
11163 value = sgot->output_offset + off;
11164 }
11165 if (r_type != R_ARM_GOT32)
11166 value += sgot->output_section->vma;
11167
11168 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11169 contents, rel->r_offset, value,
11170 rel->r_addend);
11171
11172 case R_ARM_TLS_LDO32:
11173 value = value - dtpoff_base (info);
11174
11175 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11176 contents, rel->r_offset, value,
11177 rel->r_addend);
11178
11179 case R_ARM_TLS_LDM32:
11180 {
11181 bfd_vma off;
11182
11183 if (sgot == NULL)
11184 abort ();
11185
11186 off = globals->tls_ldm_got.offset;
11187
11188 if ((off & 1) != 0)
11189 off &= ~1;
11190 else
11191 {
11192 /* If we don't know the module number, create a relocation
11193 for it. */
11194 if (bfd_link_pic (info))
11195 {
11196 Elf_Internal_Rela outrel;
11197
11198 if (srelgot == NULL)
11199 abort ();
11200
11201 outrel.r_addend = 0;
11202 outrel.r_offset = (sgot->output_section->vma
11203 + sgot->output_offset + off);
11204 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11205
11206 if (globals->use_rel)
11207 bfd_put_32 (output_bfd, outrel.r_addend,
11208 sgot->contents + off);
11209
11210 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11211 }
11212 else
11213 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11214
11215 globals->tls_ldm_got.offset |= 1;
11216 }
11217
11218 value = sgot->output_section->vma + sgot->output_offset + off
11219 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11220
11221 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11222 contents, rel->r_offset, value,
11223 rel->r_addend);
11224 }
11225
11226 case R_ARM_TLS_CALL:
11227 case R_ARM_THM_TLS_CALL:
11228 case R_ARM_TLS_GD32:
11229 case R_ARM_TLS_IE32:
11230 case R_ARM_TLS_GOTDESC:
11231 case R_ARM_TLS_DESCSEQ:
11232 case R_ARM_THM_TLS_DESCSEQ:
11233 {
11234 bfd_vma off, offplt;
11235 int indx = 0;
11236 char tls_type;
11237
11238 BFD_ASSERT (sgot != NULL);
11239
11240 if (h != NULL)
11241 {
11242 bfd_boolean dyn;
11243 dyn = globals->root.dynamic_sections_created;
11244 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11245 bfd_link_pic (info),
11246 h)
11247 && (!bfd_link_pic (info)
11248 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11249 {
11250 *unresolved_reloc_p = FALSE;
11251 indx = h->dynindx;
11252 }
11253 off = h->got.offset;
11254 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11255 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11256 }
11257 else
11258 {
11259 BFD_ASSERT (local_got_offsets != NULL);
11260 off = local_got_offsets[r_symndx];
11261 offplt = local_tlsdesc_gotents[r_symndx];
11262 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11263 }
11264
11265 /* Linker relaxations happens from one of the
11266 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11267 if (ELF32_R_TYPE(rel->r_info) != r_type)
11268 tls_type = GOT_TLS_IE;
11269
11270 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11271
11272 if ((off & 1) != 0)
11273 off &= ~1;
11274 else
11275 {
11276 bfd_boolean need_relocs = FALSE;
11277 Elf_Internal_Rela outrel;
11278 int cur_off = off;
11279
11280 /* The GOT entries have not been initialized yet. Do it
11281 now, and emit any relocations. If both an IE GOT and a
11282 GD GOT are necessary, we emit the GD first. */
11283
11284 if ((bfd_link_pic (info) || indx != 0)
11285 && (h == NULL
11286 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11287 || h->root.type != bfd_link_hash_undefweak))
11288 {
11289 need_relocs = TRUE;
11290 BFD_ASSERT (srelgot != NULL);
11291 }
11292
11293 if (tls_type & GOT_TLS_GDESC)
11294 {
11295 bfd_byte *loc;
11296
11297 /* We should have relaxed, unless this is an undefined
11298 weak symbol. */
11299 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11300 || bfd_link_pic (info));
11301 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11302 <= globals->root.sgotplt->size);
11303
11304 outrel.r_addend = 0;
11305 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11306 + globals->root.sgotplt->output_offset
11307 + offplt
11308 + globals->sgotplt_jump_table_size);
11309
11310 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11311 sreloc = globals->root.srelplt;
11312 loc = sreloc->contents;
11313 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11314 BFD_ASSERT (loc + RELOC_SIZE (globals)
11315 <= sreloc->contents + sreloc->size);
11316
11317 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11318
11319 /* For globals, the first word in the relocation gets
11320 the relocation index and the top bit set, or zero,
11321 if we're binding now. For locals, it gets the
11322 symbol's offset in the tls section. */
11323 bfd_put_32 (output_bfd,
11324 !h ? value - elf_hash_table (info)->tls_sec->vma
11325 : info->flags & DF_BIND_NOW ? 0
11326 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11327 globals->root.sgotplt->contents + offplt
11328 + globals->sgotplt_jump_table_size);
11329
11330 /* Second word in the relocation is always zero. */
11331 bfd_put_32 (output_bfd, 0,
11332 globals->root.sgotplt->contents + offplt
11333 + globals->sgotplt_jump_table_size + 4);
11334 }
11335 if (tls_type & GOT_TLS_GD)
11336 {
11337 if (need_relocs)
11338 {
11339 outrel.r_addend = 0;
11340 outrel.r_offset = (sgot->output_section->vma
11341 + sgot->output_offset
11342 + cur_off);
11343 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11344
11345 if (globals->use_rel)
11346 bfd_put_32 (output_bfd, outrel.r_addend,
11347 sgot->contents + cur_off);
11348
11349 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11350
11351 if (indx == 0)
11352 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11353 sgot->contents + cur_off + 4);
11354 else
11355 {
11356 outrel.r_addend = 0;
11357 outrel.r_info = ELF32_R_INFO (indx,
11358 R_ARM_TLS_DTPOFF32);
11359 outrel.r_offset += 4;
11360
11361 if (globals->use_rel)
11362 bfd_put_32 (output_bfd, outrel.r_addend,
11363 sgot->contents + cur_off + 4);
11364
11365 elf32_arm_add_dynreloc (output_bfd, info,
11366 srelgot, &outrel);
11367 }
11368 }
11369 else
11370 {
11371 /* If we are not emitting relocations for a
11372 general dynamic reference, then we must be in a
11373 static link or an executable link with the
11374 symbol binding locally. Mark it as belonging
11375 to module 1, the executable. */
11376 bfd_put_32 (output_bfd, 1,
11377 sgot->contents + cur_off);
11378 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11379 sgot->contents + cur_off + 4);
11380 }
11381
11382 cur_off += 8;
11383 }
11384
11385 if (tls_type & GOT_TLS_IE)
11386 {
11387 if (need_relocs)
11388 {
11389 if (indx == 0)
11390 outrel.r_addend = value - dtpoff_base (info);
11391 else
11392 outrel.r_addend = 0;
11393 outrel.r_offset = (sgot->output_section->vma
11394 + sgot->output_offset
11395 + cur_off);
11396 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11397
11398 if (globals->use_rel)
11399 bfd_put_32 (output_bfd, outrel.r_addend,
11400 sgot->contents + cur_off);
11401
11402 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11403 }
11404 else
11405 bfd_put_32 (output_bfd, tpoff (info, value),
11406 sgot->contents + cur_off);
11407 cur_off += 4;
11408 }
11409
11410 if (h != NULL)
11411 h->got.offset |= 1;
11412 else
11413 local_got_offsets[r_symndx] |= 1;
11414 }
11415
11416 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11417 off += 8;
11418 else if (tls_type & GOT_TLS_GDESC)
11419 off = offplt;
11420
11421 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11422 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11423 {
11424 bfd_signed_vma offset;
11425 /* TLS stubs are arm mode. The original symbol is a
11426 data object, so branch_type is bogus. */
11427 branch_type = ST_BRANCH_TO_ARM;
11428 enum elf32_arm_stub_type stub_type
11429 = arm_type_of_stub (info, input_section, rel,
11430 st_type, &branch_type,
11431 (struct elf32_arm_link_hash_entry *)h,
11432 globals->tls_trampoline, globals->root.splt,
11433 input_bfd, sym_name);
11434
11435 if (stub_type != arm_stub_none)
11436 {
11437 struct elf32_arm_stub_hash_entry *stub_entry
11438 = elf32_arm_get_stub_entry
11439 (input_section, globals->root.splt, 0, rel,
11440 globals, stub_type);
11441 offset = (stub_entry->stub_offset
11442 + stub_entry->stub_sec->output_offset
11443 + stub_entry->stub_sec->output_section->vma);
11444 }
11445 else
11446 offset = (globals->root.splt->output_section->vma
11447 + globals->root.splt->output_offset
11448 + globals->tls_trampoline);
11449
11450 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11451 {
11452 unsigned long inst;
11453
11454 offset -= (input_section->output_section->vma
11455 + input_section->output_offset
11456 + rel->r_offset + 8);
11457
11458 inst = offset >> 2;
11459 inst &= 0x00ffffff;
11460 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11461 }
11462 else
11463 {
11464 /* Thumb blx encodes the offset in a complicated
11465 fashion. */
11466 unsigned upper_insn, lower_insn;
11467 unsigned neg;
11468
11469 offset -= (input_section->output_section->vma
11470 + input_section->output_offset
11471 + rel->r_offset + 4);
11472
11473 if (stub_type != arm_stub_none
11474 && arm_stub_is_thumb (stub_type))
11475 {
11476 lower_insn = 0xd000;
11477 }
11478 else
11479 {
11480 lower_insn = 0xc000;
11481 /* Round up the offset to a word boundary. */
11482 offset = (offset + 2) & ~2;
11483 }
11484
11485 neg = offset < 0;
11486 upper_insn = (0xf000
11487 | ((offset >> 12) & 0x3ff)
11488 | (neg << 10));
11489 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11490 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11491 | ((offset >> 1) & 0x7ff);
11492 bfd_put_16 (input_bfd, upper_insn, hit_data);
11493 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11494 return bfd_reloc_ok;
11495 }
11496 }
11497 /* These relocations needs special care, as besides the fact
11498 they point somewhere in .gotplt, the addend must be
11499 adjusted accordingly depending on the type of instruction
11500 we refer to. */
11501 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11502 {
11503 unsigned long data, insn;
11504 unsigned thumb;
11505
11506 data = bfd_get_32 (input_bfd, hit_data);
11507 thumb = data & 1;
11508 data &= ~1u;
11509
11510 if (thumb)
11511 {
11512 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11513 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11514 insn = (insn << 16)
11515 | bfd_get_16 (input_bfd,
11516 contents + rel->r_offset - data + 2);
11517 if ((insn & 0xf800c000) == 0xf000c000)
11518 /* bl/blx */
11519 value = -6;
11520 else if ((insn & 0xffffff00) == 0x4400)
11521 /* add */
11522 value = -5;
11523 else
11524 {
11525 _bfd_error_handler
11526 /* xgettext:c-format */
11527 (_("%B(%A+%#Lx): unexpected Thumb instruction '%#lx' referenced by TLS_GOTDESC"),
11528 input_bfd, input_section, rel->r_offset, insn);
11529 return bfd_reloc_notsupported;
11530 }
11531 }
11532 else
11533 {
11534 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11535
11536 switch (insn >> 24)
11537 {
11538 case 0xeb: /* bl */
11539 case 0xfa: /* blx */
11540 value = -4;
11541 break;
11542
11543 case 0xe0: /* add */
11544 value = -8;
11545 break;
11546
11547 default:
11548 _bfd_error_handler
11549 /* xgettext:c-format */
11550 (_("%B(%A+%#Lx): unexpected ARM instruction '%#lx' referenced by TLS_GOTDESC"),
11551 input_bfd, input_section, rel->r_offset, insn);
11552 return bfd_reloc_notsupported;
11553 }
11554 }
11555
11556 value += ((globals->root.sgotplt->output_section->vma
11557 + globals->root.sgotplt->output_offset + off)
11558 - (input_section->output_section->vma
11559 + input_section->output_offset
11560 + rel->r_offset)
11561 + globals->sgotplt_jump_table_size);
11562 }
11563 else
11564 value = ((globals->root.sgot->output_section->vma
11565 + globals->root.sgot->output_offset + off)
11566 - (input_section->output_section->vma
11567 + input_section->output_offset + rel->r_offset));
11568
11569 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11570 contents, rel->r_offset, value,
11571 rel->r_addend);
11572 }
11573
11574 case R_ARM_TLS_LE32:
11575 if (bfd_link_dll (info))
11576 {
11577 _bfd_error_handler
11578 /* xgettext:c-format */
11579 (_("%B(%A+%#Lx): %s relocation not permitted in shared object"),
11580 input_bfd, input_section, rel->r_offset, howto->name);
11581 return bfd_reloc_notsupported;
11582 }
11583 else
11584 value = tpoff (info, value);
11585
11586 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11587 contents, rel->r_offset, value,
11588 rel->r_addend);
11589
11590 case R_ARM_V4BX:
11591 if (globals->fix_v4bx)
11592 {
11593 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11594
11595 /* Ensure that we have a BX instruction. */
11596 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11597
11598 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11599 {
11600 /* Branch to veneer. */
11601 bfd_vma glue_addr;
11602 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11603 glue_addr -= input_section->output_section->vma
11604 + input_section->output_offset
11605 + rel->r_offset + 8;
11606 insn = (insn & 0xf0000000) | 0x0a000000
11607 | ((glue_addr >> 2) & 0x00ffffff);
11608 }
11609 else
11610 {
11611 /* Preserve Rm (lowest four bits) and the condition code
11612 (highest four bits). Other bits encode MOV PC,Rm. */
11613 insn = (insn & 0xf000000f) | 0x01a0f000;
11614 }
11615
11616 bfd_put_32 (input_bfd, insn, hit_data);
11617 }
11618 return bfd_reloc_ok;
11619
11620 case R_ARM_MOVW_ABS_NC:
11621 case R_ARM_MOVT_ABS:
11622 case R_ARM_MOVW_PREL_NC:
11623 case R_ARM_MOVT_PREL:
11624 /* Until we properly support segment-base-relative addressing then
11625 we assume the segment base to be zero, as for the group relocations.
11626 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11627 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11628 case R_ARM_MOVW_BREL_NC:
11629 case R_ARM_MOVW_BREL:
11630 case R_ARM_MOVT_BREL:
11631 {
11632 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11633
11634 if (globals->use_rel)
11635 {
11636 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11637 signed_addend = (addend ^ 0x8000) - 0x8000;
11638 }
11639
11640 value += signed_addend;
11641
11642 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11643 value -= (input_section->output_section->vma
11644 + input_section->output_offset + rel->r_offset);
11645
11646 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11647 return bfd_reloc_overflow;
11648
11649 if (branch_type == ST_BRANCH_TO_THUMB)
11650 value |= 1;
11651
11652 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11653 || r_type == R_ARM_MOVT_BREL)
11654 value >>= 16;
11655
11656 insn &= 0xfff0f000;
11657 insn |= value & 0xfff;
11658 insn |= (value & 0xf000) << 4;
11659 bfd_put_32 (input_bfd, insn, hit_data);
11660 }
11661 return bfd_reloc_ok;
11662
11663 case R_ARM_THM_MOVW_ABS_NC:
11664 case R_ARM_THM_MOVT_ABS:
11665 case R_ARM_THM_MOVW_PREL_NC:
11666 case R_ARM_THM_MOVT_PREL:
11667 /* Until we properly support segment-base-relative addressing then
11668 we assume the segment base to be zero, as for the above relocations.
11669 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11670 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11671 as R_ARM_THM_MOVT_ABS. */
11672 case R_ARM_THM_MOVW_BREL_NC:
11673 case R_ARM_THM_MOVW_BREL:
11674 case R_ARM_THM_MOVT_BREL:
11675 {
11676 bfd_vma insn;
11677
11678 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11679 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11680
11681 if (globals->use_rel)
11682 {
11683 addend = ((insn >> 4) & 0xf000)
11684 | ((insn >> 15) & 0x0800)
11685 | ((insn >> 4) & 0x0700)
11686 | (insn & 0x00ff);
11687 signed_addend = (addend ^ 0x8000) - 0x8000;
11688 }
11689
11690 value += signed_addend;
11691
11692 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11693 value -= (input_section->output_section->vma
11694 + input_section->output_offset + rel->r_offset);
11695
11696 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11697 return bfd_reloc_overflow;
11698
11699 if (branch_type == ST_BRANCH_TO_THUMB)
11700 value |= 1;
11701
11702 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11703 || r_type == R_ARM_THM_MOVT_BREL)
11704 value >>= 16;
11705
11706 insn &= 0xfbf08f00;
11707 insn |= (value & 0xf000) << 4;
11708 insn |= (value & 0x0800) << 15;
11709 insn |= (value & 0x0700) << 4;
11710 insn |= (value & 0x00ff);
11711
11712 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11713 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11714 }
11715 return bfd_reloc_ok;
11716
11717 case R_ARM_ALU_PC_G0_NC:
11718 case R_ARM_ALU_PC_G1_NC:
11719 case R_ARM_ALU_PC_G0:
11720 case R_ARM_ALU_PC_G1:
11721 case R_ARM_ALU_PC_G2:
11722 case R_ARM_ALU_SB_G0_NC:
11723 case R_ARM_ALU_SB_G1_NC:
11724 case R_ARM_ALU_SB_G0:
11725 case R_ARM_ALU_SB_G1:
11726 case R_ARM_ALU_SB_G2:
11727 {
11728 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11729 bfd_vma pc = input_section->output_section->vma
11730 + input_section->output_offset + rel->r_offset;
11731 /* sb is the origin of the *segment* containing the symbol. */
11732 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11733 bfd_vma residual;
11734 bfd_vma g_n;
11735 bfd_signed_vma signed_value;
11736 int group = 0;
11737
11738 /* Determine which group of bits to select. */
11739 switch (r_type)
11740 {
11741 case R_ARM_ALU_PC_G0_NC:
11742 case R_ARM_ALU_PC_G0:
11743 case R_ARM_ALU_SB_G0_NC:
11744 case R_ARM_ALU_SB_G0:
11745 group = 0;
11746 break;
11747
11748 case R_ARM_ALU_PC_G1_NC:
11749 case R_ARM_ALU_PC_G1:
11750 case R_ARM_ALU_SB_G1_NC:
11751 case R_ARM_ALU_SB_G1:
11752 group = 1;
11753 break;
11754
11755 case R_ARM_ALU_PC_G2:
11756 case R_ARM_ALU_SB_G2:
11757 group = 2;
11758 break;
11759
11760 default:
11761 abort ();
11762 }
11763
11764 /* If REL, extract the addend from the insn. If RELA, it will
11765 have already been fetched for us. */
11766 if (globals->use_rel)
11767 {
11768 int negative;
11769 bfd_vma constant = insn & 0xff;
11770 bfd_vma rotation = (insn & 0xf00) >> 8;
11771
11772 if (rotation == 0)
11773 signed_addend = constant;
11774 else
11775 {
11776 /* Compensate for the fact that in the instruction, the
11777 rotation is stored in multiples of 2 bits. */
11778 rotation *= 2;
11779
11780 /* Rotate "constant" right by "rotation" bits. */
11781 signed_addend = (constant >> rotation) |
11782 (constant << (8 * sizeof (bfd_vma) - rotation));
11783 }
11784
11785 /* Determine if the instruction is an ADD or a SUB.
11786 (For REL, this determines the sign of the addend.) */
11787 negative = identify_add_or_sub (insn);
11788 if (negative == 0)
11789 {
11790 _bfd_error_handler
11791 /* xgettext:c-format */
11792 (_("%B(%A+%#Lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11793 input_bfd, input_section, rel->r_offset);
11794 return bfd_reloc_overflow;
11795 }
11796
11797 signed_addend *= negative;
11798 }
11799
11800 /* Compute the value (X) to go in the place. */
11801 if (r_type == R_ARM_ALU_PC_G0_NC
11802 || r_type == R_ARM_ALU_PC_G1_NC
11803 || r_type == R_ARM_ALU_PC_G0
11804 || r_type == R_ARM_ALU_PC_G1
11805 || r_type == R_ARM_ALU_PC_G2)
11806 /* PC relative. */
11807 signed_value = value - pc + signed_addend;
11808 else
11809 /* Section base relative. */
11810 signed_value = value - sb + signed_addend;
11811
11812 /* If the target symbol is a Thumb function, then set the
11813 Thumb bit in the address. */
11814 if (branch_type == ST_BRANCH_TO_THUMB)
11815 signed_value |= 1;
11816
11817 /* Calculate the value of the relevant G_n, in encoded
11818 constant-with-rotation format. */
11819 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11820 group, &residual);
11821
11822 /* Check for overflow if required. */
11823 if ((r_type == R_ARM_ALU_PC_G0
11824 || r_type == R_ARM_ALU_PC_G1
11825 || r_type == R_ARM_ALU_PC_G2
11826 || r_type == R_ARM_ALU_SB_G0
11827 || r_type == R_ARM_ALU_SB_G1
11828 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11829 {
11830 _bfd_error_handler
11831 /* xgettext:c-format */
11832 (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
11833 input_bfd, input_section, rel->r_offset,
11834 signed_value < 0 ? -signed_value : signed_value, howto->name);
11835 return bfd_reloc_overflow;
11836 }
11837
11838 /* Mask out the value and the ADD/SUB part of the opcode; take care
11839 not to destroy the S bit. */
11840 insn &= 0xff1ff000;
11841
11842 /* Set the opcode according to whether the value to go in the
11843 place is negative. */
11844 if (signed_value < 0)
11845 insn |= 1 << 22;
11846 else
11847 insn |= 1 << 23;
11848
11849 /* Encode the offset. */
11850 insn |= g_n;
11851
11852 bfd_put_32 (input_bfd, insn, hit_data);
11853 }
11854 return bfd_reloc_ok;
11855
11856 case R_ARM_LDR_PC_G0:
11857 case R_ARM_LDR_PC_G1:
11858 case R_ARM_LDR_PC_G2:
11859 case R_ARM_LDR_SB_G0:
11860 case R_ARM_LDR_SB_G1:
11861 case R_ARM_LDR_SB_G2:
11862 {
11863 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11864 bfd_vma pc = input_section->output_section->vma
11865 + input_section->output_offset + rel->r_offset;
11866 /* sb is the origin of the *segment* containing the symbol. */
11867 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11868 bfd_vma residual;
11869 bfd_signed_vma signed_value;
11870 int group = 0;
11871
11872 /* Determine which groups of bits to calculate. */
11873 switch (r_type)
11874 {
11875 case R_ARM_LDR_PC_G0:
11876 case R_ARM_LDR_SB_G0:
11877 group = 0;
11878 break;
11879
11880 case R_ARM_LDR_PC_G1:
11881 case R_ARM_LDR_SB_G1:
11882 group = 1;
11883 break;
11884
11885 case R_ARM_LDR_PC_G2:
11886 case R_ARM_LDR_SB_G2:
11887 group = 2;
11888 break;
11889
11890 default:
11891 abort ();
11892 }
11893
11894 /* If REL, extract the addend from the insn. If RELA, it will
11895 have already been fetched for us. */
11896 if (globals->use_rel)
11897 {
11898 int negative = (insn & (1 << 23)) ? 1 : -1;
11899 signed_addend = negative * (insn & 0xfff);
11900 }
11901
11902 /* Compute the value (X) to go in the place. */
11903 if (r_type == R_ARM_LDR_PC_G0
11904 || r_type == R_ARM_LDR_PC_G1
11905 || r_type == R_ARM_LDR_PC_G2)
11906 /* PC relative. */
11907 signed_value = value - pc + signed_addend;
11908 else
11909 /* Section base relative. */
11910 signed_value = value - sb + signed_addend;
11911
11912 /* Calculate the value of the relevant G_{n-1} to obtain
11913 the residual at that stage. */
11914 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11915 group - 1, &residual);
11916
11917 /* Check for overflow. */
11918 if (residual >= 0x1000)
11919 {
11920 _bfd_error_handler
11921 /* xgettext:c-format */
11922 (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
11923 input_bfd, input_section, rel->r_offset,
11924 signed_value < 0 ? -signed_value : signed_value, howto->name);
11925 return bfd_reloc_overflow;
11926 }
11927
11928 /* Mask out the value and U bit. */
11929 insn &= 0xff7ff000;
11930
11931 /* Set the U bit if the value to go in the place is non-negative. */
11932 if (signed_value >= 0)
11933 insn |= 1 << 23;
11934
11935 /* Encode the offset. */
11936 insn |= residual;
11937
11938 bfd_put_32 (input_bfd, insn, hit_data);
11939 }
11940 return bfd_reloc_ok;
11941
11942 case R_ARM_LDRS_PC_G0:
11943 case R_ARM_LDRS_PC_G1:
11944 case R_ARM_LDRS_PC_G2:
11945 case R_ARM_LDRS_SB_G0:
11946 case R_ARM_LDRS_SB_G1:
11947 case R_ARM_LDRS_SB_G2:
11948 {
11949 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11950 bfd_vma pc = input_section->output_section->vma
11951 + input_section->output_offset + rel->r_offset;
11952 /* sb is the origin of the *segment* containing the symbol. */
11953 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11954 bfd_vma residual;
11955 bfd_signed_vma signed_value;
11956 int group = 0;
11957
11958 /* Determine which groups of bits to calculate. */
11959 switch (r_type)
11960 {
11961 case R_ARM_LDRS_PC_G0:
11962 case R_ARM_LDRS_SB_G0:
11963 group = 0;
11964 break;
11965
11966 case R_ARM_LDRS_PC_G1:
11967 case R_ARM_LDRS_SB_G1:
11968 group = 1;
11969 break;
11970
11971 case R_ARM_LDRS_PC_G2:
11972 case R_ARM_LDRS_SB_G2:
11973 group = 2;
11974 break;
11975
11976 default:
11977 abort ();
11978 }
11979
11980 /* If REL, extract the addend from the insn. If RELA, it will
11981 have already been fetched for us. */
11982 if (globals->use_rel)
11983 {
11984 int negative = (insn & (1 << 23)) ? 1 : -1;
11985 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11986 }
11987
11988 /* Compute the value (X) to go in the place. */
11989 if (r_type == R_ARM_LDRS_PC_G0
11990 || r_type == R_ARM_LDRS_PC_G1
11991 || r_type == R_ARM_LDRS_PC_G2)
11992 /* PC relative. */
11993 signed_value = value - pc + signed_addend;
11994 else
11995 /* Section base relative. */
11996 signed_value = value - sb + signed_addend;
11997
11998 /* Calculate the value of the relevant G_{n-1} to obtain
11999 the residual at that stage. */
12000 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12001 group - 1, &residual);
12002
12003 /* Check for overflow. */
12004 if (residual >= 0x100)
12005 {
12006 _bfd_error_handler
12007 /* xgettext:c-format */
12008 (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
12009 input_bfd, input_section, rel->r_offset,
12010 signed_value < 0 ? -signed_value : signed_value, howto->name);
12011 return bfd_reloc_overflow;
12012 }
12013
12014 /* Mask out the value and U bit. */
12015 insn &= 0xff7ff0f0;
12016
12017 /* Set the U bit if the value to go in the place is non-negative. */
12018 if (signed_value >= 0)
12019 insn |= 1 << 23;
12020
12021 /* Encode the offset. */
12022 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12023
12024 bfd_put_32 (input_bfd, insn, hit_data);
12025 }
12026 return bfd_reloc_ok;
12027
12028 case R_ARM_LDC_PC_G0:
12029 case R_ARM_LDC_PC_G1:
12030 case R_ARM_LDC_PC_G2:
12031 case R_ARM_LDC_SB_G0:
12032 case R_ARM_LDC_SB_G1:
12033 case R_ARM_LDC_SB_G2:
12034 {
12035 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12036 bfd_vma pc = input_section->output_section->vma
12037 + input_section->output_offset + rel->r_offset;
12038 /* sb is the origin of the *segment* containing the symbol. */
12039 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12040 bfd_vma residual;
12041 bfd_signed_vma signed_value;
12042 int group = 0;
12043
12044 /* Determine which groups of bits to calculate. */
12045 switch (r_type)
12046 {
12047 case R_ARM_LDC_PC_G0:
12048 case R_ARM_LDC_SB_G0:
12049 group = 0;
12050 break;
12051
12052 case R_ARM_LDC_PC_G1:
12053 case R_ARM_LDC_SB_G1:
12054 group = 1;
12055 break;
12056
12057 case R_ARM_LDC_PC_G2:
12058 case R_ARM_LDC_SB_G2:
12059 group = 2;
12060 break;
12061
12062 default:
12063 abort ();
12064 }
12065
12066 /* If REL, extract the addend from the insn. If RELA, it will
12067 have already been fetched for us. */
12068 if (globals->use_rel)
12069 {
12070 int negative = (insn & (1 << 23)) ? 1 : -1;
12071 signed_addend = negative * ((insn & 0xff) << 2);
12072 }
12073
12074 /* Compute the value (X) to go in the place. */
12075 if (r_type == R_ARM_LDC_PC_G0
12076 || r_type == R_ARM_LDC_PC_G1
12077 || r_type == R_ARM_LDC_PC_G2)
12078 /* PC relative. */
12079 signed_value = value - pc + signed_addend;
12080 else
12081 /* Section base relative. */
12082 signed_value = value - sb + signed_addend;
12083
12084 /* Calculate the value of the relevant G_{n-1} to obtain
12085 the residual at that stage. */
12086 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12087 group - 1, &residual);
12088
12089 /* Check for overflow. (The absolute value to go in the place must be
12090 divisible by four and, after having been divided by four, must
12091 fit in eight bits.) */
12092 if ((residual & 0x3) != 0 || residual >= 0x400)
12093 {
12094 _bfd_error_handler
12095 /* xgettext:c-format */
12096 (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
12097 input_bfd, input_section, rel->r_offset,
12098 signed_value < 0 ? -signed_value : signed_value, howto->name);
12099 return bfd_reloc_overflow;
12100 }
12101
12102 /* Mask out the value and U bit. */
12103 insn &= 0xff7fff00;
12104
12105 /* Set the U bit if the value to go in the place is non-negative. */
12106 if (signed_value >= 0)
12107 insn |= 1 << 23;
12108
12109 /* Encode the offset. */
12110 insn |= residual >> 2;
12111
12112 bfd_put_32 (input_bfd, insn, hit_data);
12113 }
12114 return bfd_reloc_ok;
12115
12116 case R_ARM_THM_ALU_ABS_G0_NC:
12117 case R_ARM_THM_ALU_ABS_G1_NC:
12118 case R_ARM_THM_ALU_ABS_G2_NC:
12119 case R_ARM_THM_ALU_ABS_G3_NC:
12120 {
12121 const int shift_array[4] = {0, 8, 16, 24};
12122 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12123 bfd_vma addr = value;
12124 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12125
12126 /* Compute address. */
12127 if (globals->use_rel)
12128 signed_addend = insn & 0xff;
12129 addr += signed_addend;
12130 if (branch_type == ST_BRANCH_TO_THUMB)
12131 addr |= 1;
12132 /* Clean imm8 insn. */
12133 insn &= 0xff00;
12134 /* And update with correct part of address. */
12135 insn |= (addr >> shift) & 0xff;
12136 /* Update insn. */
12137 bfd_put_16 (input_bfd, insn, hit_data);
12138 }
12139
12140 *unresolved_reloc_p = FALSE;
12141 return bfd_reloc_ok;
12142
12143 default:
12144 return bfd_reloc_notsupported;
12145 }
12146 }
12147
12148 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12149 static void
12150 arm_add_to_rel (bfd * abfd,
12151 bfd_byte * address,
12152 reloc_howto_type * howto,
12153 bfd_signed_vma increment)
12154 {
12155 bfd_signed_vma addend;
12156
12157 if (howto->type == R_ARM_THM_CALL
12158 || howto->type == R_ARM_THM_JUMP24)
12159 {
12160 int upper_insn, lower_insn;
12161 int upper, lower;
12162
12163 upper_insn = bfd_get_16 (abfd, address);
12164 lower_insn = bfd_get_16 (abfd, address + 2);
12165 upper = upper_insn & 0x7ff;
12166 lower = lower_insn & 0x7ff;
12167
12168 addend = (upper << 12) | (lower << 1);
12169 addend += increment;
12170 addend >>= 1;
12171
12172 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12173 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12174
12175 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12176 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12177 }
12178 else
12179 {
12180 bfd_vma contents;
12181
12182 contents = bfd_get_32 (abfd, address);
12183
12184 /* Get the (signed) value from the instruction. */
12185 addend = contents & howto->src_mask;
12186 if (addend & ((howto->src_mask + 1) >> 1))
12187 {
12188 bfd_signed_vma mask;
12189
12190 mask = -1;
12191 mask &= ~ howto->src_mask;
12192 addend |= mask;
12193 }
12194
12195 /* Add in the increment, (which is a byte value). */
12196 switch (howto->type)
12197 {
12198 default:
12199 addend += increment;
12200 break;
12201
12202 case R_ARM_PC24:
12203 case R_ARM_PLT32:
12204 case R_ARM_CALL:
12205 case R_ARM_JUMP24:
12206 addend <<= howto->size;
12207 addend += increment;
12208
12209 /* Should we check for overflow here ? */
12210
12211 /* Drop any undesired bits. */
12212 addend >>= howto->rightshift;
12213 break;
12214 }
12215
12216 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12217
12218 bfd_put_32 (abfd, contents, address);
12219 }
12220 }
12221
12222 #define IS_ARM_TLS_RELOC(R_TYPE) \
12223 ((R_TYPE) == R_ARM_TLS_GD32 \
12224 || (R_TYPE) == R_ARM_TLS_LDO32 \
12225 || (R_TYPE) == R_ARM_TLS_LDM32 \
12226 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12227 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12228 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12229 || (R_TYPE) == R_ARM_TLS_LE32 \
12230 || (R_TYPE) == R_ARM_TLS_IE32 \
12231 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12232
12233 /* Specific set of relocations for the gnu tls dialect. */
12234 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12235 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12236 || (R_TYPE) == R_ARM_TLS_CALL \
12237 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12238 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12239 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12240
12241 /* Relocate an ARM ELF section. */
12242
12243 static bfd_boolean
12244 elf32_arm_relocate_section (bfd * output_bfd,
12245 struct bfd_link_info * info,
12246 bfd * input_bfd,
12247 asection * input_section,
12248 bfd_byte * contents,
12249 Elf_Internal_Rela * relocs,
12250 Elf_Internal_Sym * local_syms,
12251 asection ** local_sections)
12252 {
12253 Elf_Internal_Shdr *symtab_hdr;
12254 struct elf_link_hash_entry **sym_hashes;
12255 Elf_Internal_Rela *rel;
12256 Elf_Internal_Rela *relend;
12257 const char *name;
12258 struct elf32_arm_link_hash_table * globals;
12259
12260 globals = elf32_arm_hash_table (info);
12261 if (globals == NULL)
12262 return FALSE;
12263
12264 symtab_hdr = & elf_symtab_hdr (input_bfd);
12265 sym_hashes = elf_sym_hashes (input_bfd);
12266
12267 rel = relocs;
12268 relend = relocs + input_section->reloc_count;
12269 for (; rel < relend; rel++)
12270 {
12271 int r_type;
12272 reloc_howto_type * howto;
12273 unsigned long r_symndx;
12274 Elf_Internal_Sym * sym;
12275 asection * sec;
12276 struct elf_link_hash_entry * h;
12277 bfd_vma relocation;
12278 bfd_reloc_status_type r;
12279 arelent bfd_reloc;
12280 char sym_type;
12281 bfd_boolean unresolved_reloc = FALSE;
12282 char *error_message = NULL;
12283
12284 r_symndx = ELF32_R_SYM (rel->r_info);
12285 r_type = ELF32_R_TYPE (rel->r_info);
12286 r_type = arm_real_reloc_type (globals, r_type);
12287
12288 if ( r_type == R_ARM_GNU_VTENTRY
12289 || r_type == R_ARM_GNU_VTINHERIT)
12290 continue;
12291
12292 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12293 howto = bfd_reloc.howto;
12294
12295 h = NULL;
12296 sym = NULL;
12297 sec = NULL;
12298
12299 if (r_symndx < symtab_hdr->sh_info)
12300 {
12301 sym = local_syms + r_symndx;
12302 sym_type = ELF32_ST_TYPE (sym->st_info);
12303 sec = local_sections[r_symndx];
12304
12305 /* An object file might have a reference to a local
12306 undefined symbol. This is a daft object file, but we
12307 should at least do something about it. V4BX & NONE
12308 relocations do not use the symbol and are explicitly
12309 allowed to use the undefined symbol, so allow those.
12310 Likewise for relocations against STN_UNDEF. */
12311 if (r_type != R_ARM_V4BX
12312 && r_type != R_ARM_NONE
12313 && r_symndx != STN_UNDEF
12314 && bfd_is_und_section (sec)
12315 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12316 (*info->callbacks->undefined_symbol)
12317 (info, bfd_elf_string_from_elf_section
12318 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12319 input_bfd, input_section,
12320 rel->r_offset, TRUE);
12321
12322 if (globals->use_rel)
12323 {
12324 relocation = (sec->output_section->vma
12325 + sec->output_offset
12326 + sym->st_value);
12327 if (!bfd_link_relocatable (info)
12328 && (sec->flags & SEC_MERGE)
12329 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12330 {
12331 asection *msec;
12332 bfd_vma addend, value;
12333
12334 switch (r_type)
12335 {
12336 case R_ARM_MOVW_ABS_NC:
12337 case R_ARM_MOVT_ABS:
12338 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12339 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12340 addend = (addend ^ 0x8000) - 0x8000;
12341 break;
12342
12343 case R_ARM_THM_MOVW_ABS_NC:
12344 case R_ARM_THM_MOVT_ABS:
12345 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12346 << 16;
12347 value |= bfd_get_16 (input_bfd,
12348 contents + rel->r_offset + 2);
12349 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12350 | ((value & 0x04000000) >> 15);
12351 addend = (addend ^ 0x8000) - 0x8000;
12352 break;
12353
12354 default:
12355 if (howto->rightshift
12356 || (howto->src_mask & (howto->src_mask + 1)))
12357 {
12358 _bfd_error_handler
12359 /* xgettext:c-format */
12360 (_("%B(%A+%#Lx): %s relocation against SEC_MERGE section"),
12361 input_bfd, input_section,
12362 rel->r_offset, howto->name);
12363 return FALSE;
12364 }
12365
12366 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12367
12368 /* Get the (signed) value from the instruction. */
12369 addend = value & howto->src_mask;
12370 if (addend & ((howto->src_mask + 1) >> 1))
12371 {
12372 bfd_signed_vma mask;
12373
12374 mask = -1;
12375 mask &= ~ howto->src_mask;
12376 addend |= mask;
12377 }
12378 break;
12379 }
12380
12381 msec = sec;
12382 addend =
12383 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12384 - relocation;
12385 addend += msec->output_section->vma + msec->output_offset;
12386
12387 /* Cases here must match those in the preceding
12388 switch statement. */
12389 switch (r_type)
12390 {
12391 case R_ARM_MOVW_ABS_NC:
12392 case R_ARM_MOVT_ABS:
12393 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12394 | (addend & 0xfff);
12395 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12396 break;
12397
12398 case R_ARM_THM_MOVW_ABS_NC:
12399 case R_ARM_THM_MOVT_ABS:
12400 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12401 | (addend & 0xff) | ((addend & 0x0800) << 15);
12402 bfd_put_16 (input_bfd, value >> 16,
12403 contents + rel->r_offset);
12404 bfd_put_16 (input_bfd, value,
12405 contents + rel->r_offset + 2);
12406 break;
12407
12408 default:
12409 value = (value & ~ howto->dst_mask)
12410 | (addend & howto->dst_mask);
12411 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12412 break;
12413 }
12414 }
12415 }
12416 else
12417 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12418 }
12419 else
12420 {
12421 bfd_boolean warned, ignored;
12422
12423 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12424 r_symndx, symtab_hdr, sym_hashes,
12425 h, sec, relocation,
12426 unresolved_reloc, warned, ignored);
12427
12428 sym_type = h->type;
12429 }
12430
12431 if (sec != NULL && discarded_section (sec))
12432 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12433 rel, 1, relend, howto, 0, contents);
12434
12435 if (bfd_link_relocatable (info))
12436 {
12437 /* This is a relocatable link. We don't have to change
12438 anything, unless the reloc is against a section symbol,
12439 in which case we have to adjust according to where the
12440 section symbol winds up in the output section. */
12441 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12442 {
12443 if (globals->use_rel)
12444 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12445 howto, (bfd_signed_vma) sec->output_offset);
12446 else
12447 rel->r_addend += sec->output_offset;
12448 }
12449 continue;
12450 }
12451
12452 if (h != NULL)
12453 name = h->root.root.string;
12454 else
12455 {
12456 name = (bfd_elf_string_from_elf_section
12457 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12458 if (name == NULL || *name == '\0')
12459 name = bfd_section_name (input_bfd, sec);
12460 }
12461
12462 if (r_symndx != STN_UNDEF
12463 && r_type != R_ARM_NONE
12464 && (h == NULL
12465 || h->root.type == bfd_link_hash_defined
12466 || h->root.type == bfd_link_hash_defweak)
12467 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12468 {
12469 _bfd_error_handler
12470 ((sym_type == STT_TLS
12471 /* xgettext:c-format */
12472 ? _("%B(%A+%#Lx): %s used with TLS symbol %s")
12473 /* xgettext:c-format */
12474 : _("%B(%A+%#Lx): %s used with non-TLS symbol %s")),
12475 input_bfd,
12476 input_section,
12477 rel->r_offset,
12478 howto->name,
12479 name);
12480 }
12481
12482 /* We call elf32_arm_final_link_relocate unless we're completely
12483 done, i.e., the relaxation produced the final output we want,
12484 and we won't let anybody mess with it. Also, we have to do
12485 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12486 both in relaxed and non-relaxed cases. */
12487 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12488 || (IS_ARM_TLS_GNU_RELOC (r_type)
12489 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12490 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12491 & GOT_TLS_GDESC)))
12492 {
12493 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12494 contents, rel, h == NULL);
12495 /* This may have been marked unresolved because it came from
12496 a shared library. But we've just dealt with that. */
12497 unresolved_reloc = 0;
12498 }
12499 else
12500 r = bfd_reloc_continue;
12501
12502 if (r == bfd_reloc_continue)
12503 {
12504 unsigned char branch_type =
12505 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12506 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12507
12508 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12509 input_section, contents, rel,
12510 relocation, info, sec, name,
12511 sym_type, branch_type, h,
12512 &unresolved_reloc,
12513 &error_message);
12514 }
12515
12516 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12517 because such sections are not SEC_ALLOC and thus ld.so will
12518 not process them. */
12519 if (unresolved_reloc
12520 && !((input_section->flags & SEC_DEBUGGING) != 0
12521 && h->def_dynamic)
12522 && _bfd_elf_section_offset (output_bfd, info, input_section,
12523 rel->r_offset) != (bfd_vma) -1)
12524 {
12525 _bfd_error_handler
12526 /* xgettext:c-format */
12527 (_("%B(%A+%#Lx): unresolvable %s relocation against symbol `%s'"),
12528 input_bfd,
12529 input_section,
12530 rel->r_offset,
12531 howto->name,
12532 h->root.root.string);
12533 return FALSE;
12534 }
12535
12536 if (r != bfd_reloc_ok)
12537 {
12538 switch (r)
12539 {
12540 case bfd_reloc_overflow:
12541 /* If the overflowing reloc was to an undefined symbol,
12542 we have already printed one error message and there
12543 is no point complaining again. */
12544 if (!h || h->root.type != bfd_link_hash_undefined)
12545 (*info->callbacks->reloc_overflow)
12546 (info, (h ? &h->root : NULL), name, howto->name,
12547 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12548 break;
12549
12550 case bfd_reloc_undefined:
12551 (*info->callbacks->undefined_symbol)
12552 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12553 break;
12554
12555 case bfd_reloc_outofrange:
12556 error_message = _("out of range");
12557 goto common_error;
12558
12559 case bfd_reloc_notsupported:
12560 error_message = _("unsupported relocation");
12561 goto common_error;
12562
12563 case bfd_reloc_dangerous:
12564 /* error_message should already be set. */
12565 goto common_error;
12566
12567 default:
12568 error_message = _("unknown error");
12569 /* Fall through. */
12570
12571 common_error:
12572 BFD_ASSERT (error_message != NULL);
12573 (*info->callbacks->reloc_dangerous)
12574 (info, error_message, input_bfd, input_section, rel->r_offset);
12575 break;
12576 }
12577 }
12578 }
12579
12580 return TRUE;
12581 }
12582
12583 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12584 adds the edit to the start of the list. (The list must be built in order of
12585 ascending TINDEX: the function's callers are primarily responsible for
12586 maintaining that condition). */
12587
12588 static void
12589 add_unwind_table_edit (arm_unwind_table_edit **head,
12590 arm_unwind_table_edit **tail,
12591 arm_unwind_edit_type type,
12592 asection *linked_section,
12593 unsigned int tindex)
12594 {
12595 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12596 xmalloc (sizeof (arm_unwind_table_edit));
12597
12598 new_edit->type = type;
12599 new_edit->linked_section = linked_section;
12600 new_edit->index = tindex;
12601
12602 if (tindex > 0)
12603 {
12604 new_edit->next = NULL;
12605
12606 if (*tail)
12607 (*tail)->next = new_edit;
12608
12609 (*tail) = new_edit;
12610
12611 if (!*head)
12612 (*head) = new_edit;
12613 }
12614 else
12615 {
12616 new_edit->next = *head;
12617
12618 if (!*tail)
12619 *tail = new_edit;
12620
12621 *head = new_edit;
12622 }
12623 }
12624
12625 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12626
12627 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12628 static void
12629 adjust_exidx_size(asection *exidx_sec, int adjust)
12630 {
12631 asection *out_sec;
12632
12633 if (!exidx_sec->rawsize)
12634 exidx_sec->rawsize = exidx_sec->size;
12635
12636 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12637 out_sec = exidx_sec->output_section;
12638 /* Adjust size of output section. */
12639 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12640 }
12641
12642 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12643 static void
12644 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12645 {
12646 struct _arm_elf_section_data *exidx_arm_data;
12647
12648 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12649 add_unwind_table_edit (
12650 &exidx_arm_data->u.exidx.unwind_edit_list,
12651 &exidx_arm_data->u.exidx.unwind_edit_tail,
12652 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12653
12654 exidx_arm_data->additional_reloc_count++;
12655
12656 adjust_exidx_size(exidx_sec, 8);
12657 }
12658
12659 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12660 made to those tables, such that:
12661
12662 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12663 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12664 codes which have been inlined into the index).
12665
12666 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12667
12668 The edits are applied when the tables are written
12669 (in elf32_arm_write_section). */
12670
12671 bfd_boolean
12672 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12673 unsigned int num_text_sections,
12674 struct bfd_link_info *info,
12675 bfd_boolean merge_exidx_entries)
12676 {
12677 bfd *inp;
12678 unsigned int last_second_word = 0, i;
12679 asection *last_exidx_sec = NULL;
12680 asection *last_text_sec = NULL;
12681 int last_unwind_type = -1;
12682
12683 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12684 text sections. */
12685 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12686 {
12687 asection *sec;
12688
12689 for (sec = inp->sections; sec != NULL; sec = sec->next)
12690 {
12691 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12692 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12693
12694 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12695 continue;
12696
12697 if (elf_sec->linked_to)
12698 {
12699 Elf_Internal_Shdr *linked_hdr
12700 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12701 struct _arm_elf_section_data *linked_sec_arm_data
12702 = get_arm_elf_section_data (linked_hdr->bfd_section);
12703
12704 if (linked_sec_arm_data == NULL)
12705 continue;
12706
12707 /* Link this .ARM.exidx section back from the text section it
12708 describes. */
12709 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12710 }
12711 }
12712 }
12713
12714 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12715 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12716 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12717
12718 for (i = 0; i < num_text_sections; i++)
12719 {
12720 asection *sec = text_section_order[i];
12721 asection *exidx_sec;
12722 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12723 struct _arm_elf_section_data *exidx_arm_data;
12724 bfd_byte *contents = NULL;
12725 int deleted_exidx_bytes = 0;
12726 bfd_vma j;
12727 arm_unwind_table_edit *unwind_edit_head = NULL;
12728 arm_unwind_table_edit *unwind_edit_tail = NULL;
12729 Elf_Internal_Shdr *hdr;
12730 bfd *ibfd;
12731
12732 if (arm_data == NULL)
12733 continue;
12734
12735 exidx_sec = arm_data->u.text.arm_exidx_sec;
12736 if (exidx_sec == NULL)
12737 {
12738 /* Section has no unwind data. */
12739 if (last_unwind_type == 0 || !last_exidx_sec)
12740 continue;
12741
12742 /* Ignore zero sized sections. */
12743 if (sec->size == 0)
12744 continue;
12745
12746 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12747 last_unwind_type = 0;
12748 continue;
12749 }
12750
12751 /* Skip /DISCARD/ sections. */
12752 if (bfd_is_abs_section (exidx_sec->output_section))
12753 continue;
12754
12755 hdr = &elf_section_data (exidx_sec)->this_hdr;
12756 if (hdr->sh_type != SHT_ARM_EXIDX)
12757 continue;
12758
12759 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12760 if (exidx_arm_data == NULL)
12761 continue;
12762
12763 ibfd = exidx_sec->owner;
12764
12765 if (hdr->contents != NULL)
12766 contents = hdr->contents;
12767 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12768 /* An error? */
12769 continue;
12770
12771 if (last_unwind_type > 0)
12772 {
12773 unsigned int first_word = bfd_get_32 (ibfd, contents);
12774 /* Add cantunwind if first unwind item does not match section
12775 start. */
12776 if (first_word != sec->vma)
12777 {
12778 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12779 last_unwind_type = 0;
12780 }
12781 }
12782
12783 for (j = 0; j < hdr->sh_size; j += 8)
12784 {
12785 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12786 int unwind_type;
12787 int elide = 0;
12788
12789 /* An EXIDX_CANTUNWIND entry. */
12790 if (second_word == 1)
12791 {
12792 if (last_unwind_type == 0)
12793 elide = 1;
12794 unwind_type = 0;
12795 }
12796 /* Inlined unwinding data. Merge if equal to previous. */
12797 else if ((second_word & 0x80000000) != 0)
12798 {
12799 if (merge_exidx_entries
12800 && last_second_word == second_word && last_unwind_type == 1)
12801 elide = 1;
12802 unwind_type = 1;
12803 last_second_word = second_word;
12804 }
12805 /* Normal table entry. In theory we could merge these too,
12806 but duplicate entries are likely to be much less common. */
12807 else
12808 unwind_type = 2;
12809
12810 if (elide && !bfd_link_relocatable (info))
12811 {
12812 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12813 DELETE_EXIDX_ENTRY, NULL, j / 8);
12814
12815 deleted_exidx_bytes += 8;
12816 }
12817
12818 last_unwind_type = unwind_type;
12819 }
12820
12821 /* Free contents if we allocated it ourselves. */
12822 if (contents != hdr->contents)
12823 free (contents);
12824
12825 /* Record edits to be applied later (in elf32_arm_write_section). */
12826 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12827 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12828
12829 if (deleted_exidx_bytes > 0)
12830 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12831
12832 last_exidx_sec = exidx_sec;
12833 last_text_sec = sec;
12834 }
12835
12836 /* Add terminating CANTUNWIND entry. */
12837 if (!bfd_link_relocatable (info) && last_exidx_sec
12838 && last_unwind_type != 0)
12839 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12840
12841 return TRUE;
12842 }
12843
12844 static bfd_boolean
12845 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12846 bfd *ibfd, const char *name)
12847 {
12848 asection *sec, *osec;
12849
12850 sec = bfd_get_linker_section (ibfd, name);
12851 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12852 return TRUE;
12853
12854 osec = sec->output_section;
12855 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12856 return TRUE;
12857
12858 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12859 sec->output_offset, sec->size))
12860 return FALSE;
12861
12862 return TRUE;
12863 }
12864
12865 static bfd_boolean
12866 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12867 {
12868 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12869 asection *sec, *osec;
12870
12871 if (globals == NULL)
12872 return FALSE;
12873
12874 /* Invoke the regular ELF backend linker to do all the work. */
12875 if (!bfd_elf_final_link (abfd, info))
12876 return FALSE;
12877
12878 /* Process stub sections (eg BE8 encoding, ...). */
12879 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12880 unsigned int i;
12881 for (i=0; i<htab->top_id; i++)
12882 {
12883 sec = htab->stub_group[i].stub_sec;
12884 /* Only process it once, in its link_sec slot. */
12885 if (sec && i == htab->stub_group[i].link_sec->id)
12886 {
12887 osec = sec->output_section;
12888 elf32_arm_write_section (abfd, info, sec, sec->contents);
12889 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12890 sec->output_offset, sec->size))
12891 return FALSE;
12892 }
12893 }
12894
12895 /* Write out any glue sections now that we have created all the
12896 stubs. */
12897 if (globals->bfd_of_glue_owner != NULL)
12898 {
12899 if (! elf32_arm_output_glue_section (info, abfd,
12900 globals->bfd_of_glue_owner,
12901 ARM2THUMB_GLUE_SECTION_NAME))
12902 return FALSE;
12903
12904 if (! elf32_arm_output_glue_section (info, abfd,
12905 globals->bfd_of_glue_owner,
12906 THUMB2ARM_GLUE_SECTION_NAME))
12907 return FALSE;
12908
12909 if (! elf32_arm_output_glue_section (info, abfd,
12910 globals->bfd_of_glue_owner,
12911 VFP11_ERRATUM_VENEER_SECTION_NAME))
12912 return FALSE;
12913
12914 if (! elf32_arm_output_glue_section (info, abfd,
12915 globals->bfd_of_glue_owner,
12916 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12917 return FALSE;
12918
12919 if (! elf32_arm_output_glue_section (info, abfd,
12920 globals->bfd_of_glue_owner,
12921 ARM_BX_GLUE_SECTION_NAME))
12922 return FALSE;
12923 }
12924
12925 return TRUE;
12926 }
12927
12928 /* Return a best guess for the machine number based on the attributes. */
12929
12930 static unsigned int
12931 bfd_arm_get_mach_from_attributes (bfd * abfd)
12932 {
12933 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12934
12935 switch (arch)
12936 {
12937 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12938 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12939 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12940
12941 case TAG_CPU_ARCH_V5TE:
12942 {
12943 char * name;
12944
12945 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12946 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12947
12948 if (name)
12949 {
12950 if (strcmp (name, "IWMMXT2") == 0)
12951 return bfd_mach_arm_iWMMXt2;
12952
12953 if (strcmp (name, "IWMMXT") == 0)
12954 return bfd_mach_arm_iWMMXt;
12955
12956 if (strcmp (name, "XSCALE") == 0)
12957 {
12958 int wmmx;
12959
12960 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12961 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12962 switch (wmmx)
12963 {
12964 case 1: return bfd_mach_arm_iWMMXt;
12965 case 2: return bfd_mach_arm_iWMMXt2;
12966 default: return bfd_mach_arm_XScale;
12967 }
12968 }
12969 }
12970
12971 return bfd_mach_arm_5TE;
12972 }
12973
12974 default:
12975 return bfd_mach_arm_unknown;
12976 }
12977 }
12978
12979 /* Set the right machine number. */
12980
12981 static bfd_boolean
12982 elf32_arm_object_p (bfd *abfd)
12983 {
12984 unsigned int mach;
12985
12986 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12987
12988 if (mach == bfd_mach_arm_unknown)
12989 {
12990 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
12991 mach = bfd_mach_arm_ep9312;
12992 else
12993 mach = bfd_arm_get_mach_from_attributes (abfd);
12994 }
12995
12996 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
12997 return TRUE;
12998 }
12999
13000 /* Function to keep ARM specific flags in the ELF header. */
13001
13002 static bfd_boolean
13003 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13004 {
13005 if (elf_flags_init (abfd)
13006 && elf_elfheader (abfd)->e_flags != flags)
13007 {
13008 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13009 {
13010 if (flags & EF_ARM_INTERWORK)
13011 _bfd_error_handler
13012 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
13013 abfd);
13014 else
13015 _bfd_error_handler
13016 (_("Warning: Clearing the interworking flag of %B due to outside request"),
13017 abfd);
13018 }
13019 }
13020 else
13021 {
13022 elf_elfheader (abfd)->e_flags = flags;
13023 elf_flags_init (abfd) = TRUE;
13024 }
13025
13026 return TRUE;
13027 }
13028
13029 /* Copy backend specific data from one object module to another. */
13030
13031 static bfd_boolean
13032 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13033 {
13034 flagword in_flags;
13035 flagword out_flags;
13036
13037 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13038 return TRUE;
13039
13040 in_flags = elf_elfheader (ibfd)->e_flags;
13041 out_flags = elf_elfheader (obfd)->e_flags;
13042
13043 if (elf_flags_init (obfd)
13044 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13045 && in_flags != out_flags)
13046 {
13047 /* Cannot mix APCS26 and APCS32 code. */
13048 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13049 return FALSE;
13050
13051 /* Cannot mix float APCS and non-float APCS code. */
13052 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13053 return FALSE;
13054
13055 /* If the src and dest have different interworking flags
13056 then turn off the interworking bit. */
13057 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13058 {
13059 if (out_flags & EF_ARM_INTERWORK)
13060 _bfd_error_handler
13061 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13062 obfd, ibfd);
13063
13064 in_flags &= ~EF_ARM_INTERWORK;
13065 }
13066
13067 /* Likewise for PIC, though don't warn for this case. */
13068 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13069 in_flags &= ~EF_ARM_PIC;
13070 }
13071
13072 elf_elfheader (obfd)->e_flags = in_flags;
13073 elf_flags_init (obfd) = TRUE;
13074
13075 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13076 }
13077
13078 /* Values for Tag_ABI_PCS_R9_use. */
13079 enum
13080 {
13081 AEABI_R9_V6,
13082 AEABI_R9_SB,
13083 AEABI_R9_TLS,
13084 AEABI_R9_unused
13085 };
13086
13087 /* Values for Tag_ABI_PCS_RW_data. */
13088 enum
13089 {
13090 AEABI_PCS_RW_data_absolute,
13091 AEABI_PCS_RW_data_PCrel,
13092 AEABI_PCS_RW_data_SBrel,
13093 AEABI_PCS_RW_data_unused
13094 };
13095
13096 /* Values for Tag_ABI_enum_size. */
13097 enum
13098 {
13099 AEABI_enum_unused,
13100 AEABI_enum_short,
13101 AEABI_enum_wide,
13102 AEABI_enum_forced_wide
13103 };
13104
13105 /* Determine whether an object attribute tag takes an integer, a
13106 string or both. */
13107
13108 static int
13109 elf32_arm_obj_attrs_arg_type (int tag)
13110 {
13111 if (tag == Tag_compatibility)
13112 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13113 else if (tag == Tag_nodefaults)
13114 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13115 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13116 return ATTR_TYPE_FLAG_STR_VAL;
13117 else if (tag < 32)
13118 return ATTR_TYPE_FLAG_INT_VAL;
13119 else
13120 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13121 }
13122
13123 /* The ABI defines that Tag_conformance should be emitted first, and that
13124 Tag_nodefaults should be second (if either is defined). This sets those
13125 two positions, and bumps up the position of all the remaining tags to
13126 compensate. */
13127 static int
13128 elf32_arm_obj_attrs_order (int num)
13129 {
13130 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13131 return Tag_conformance;
13132 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13133 return Tag_nodefaults;
13134 if ((num - 2) < Tag_nodefaults)
13135 return num - 2;
13136 if ((num - 1) < Tag_conformance)
13137 return num - 1;
13138 return num;
13139 }
13140
13141 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13142 static bfd_boolean
13143 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13144 {
13145 if ((tag & 127) < 64)
13146 {
13147 _bfd_error_handler
13148 (_("%B: Unknown mandatory EABI object attribute %d"),
13149 abfd, tag);
13150 bfd_set_error (bfd_error_bad_value);
13151 return FALSE;
13152 }
13153 else
13154 {
13155 _bfd_error_handler
13156 (_("Warning: %B: Unknown EABI object attribute %d"),
13157 abfd, tag);
13158 return TRUE;
13159 }
13160 }
13161
13162 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13163 Returns -1 if no architecture could be read. */
13164
13165 static int
13166 get_secondary_compatible_arch (bfd *abfd)
13167 {
13168 obj_attribute *attr =
13169 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13170
13171 /* Note: the tag and its argument below are uleb128 values, though
13172 currently-defined values fit in one byte for each. */
13173 if (attr->s
13174 && attr->s[0] == Tag_CPU_arch
13175 && (attr->s[1] & 128) != 128
13176 && attr->s[2] == 0)
13177 return attr->s[1];
13178
13179 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13180 return -1;
13181 }
13182
13183 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13184 The tag is removed if ARCH is -1. */
13185
13186 static void
13187 set_secondary_compatible_arch (bfd *abfd, int arch)
13188 {
13189 obj_attribute *attr =
13190 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13191
13192 if (arch == -1)
13193 {
13194 attr->s = NULL;
13195 return;
13196 }
13197
13198 /* Note: the tag and its argument below are uleb128 values, though
13199 currently-defined values fit in one byte for each. */
13200 if (!attr->s)
13201 attr->s = (char *) bfd_alloc (abfd, 3);
13202 attr->s[0] = Tag_CPU_arch;
13203 attr->s[1] = arch;
13204 attr->s[2] = '\0';
13205 }
13206
13207 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13208 into account. */
13209
13210 static int
13211 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13212 int newtag, int secondary_compat)
13213 {
13214 #define T(X) TAG_CPU_ARCH_##X
13215 int tagl, tagh, result;
13216 const int v6t2[] =
13217 {
13218 T(V6T2), /* PRE_V4. */
13219 T(V6T2), /* V4. */
13220 T(V6T2), /* V4T. */
13221 T(V6T2), /* V5T. */
13222 T(V6T2), /* V5TE. */
13223 T(V6T2), /* V5TEJ. */
13224 T(V6T2), /* V6. */
13225 T(V7), /* V6KZ. */
13226 T(V6T2) /* V6T2. */
13227 };
13228 const int v6k[] =
13229 {
13230 T(V6K), /* PRE_V4. */
13231 T(V6K), /* V4. */
13232 T(V6K), /* V4T. */
13233 T(V6K), /* V5T. */
13234 T(V6K), /* V5TE. */
13235 T(V6K), /* V5TEJ. */
13236 T(V6K), /* V6. */
13237 T(V6KZ), /* V6KZ. */
13238 T(V7), /* V6T2. */
13239 T(V6K) /* V6K. */
13240 };
13241 const int v7[] =
13242 {
13243 T(V7), /* PRE_V4. */
13244 T(V7), /* V4. */
13245 T(V7), /* V4T. */
13246 T(V7), /* V5T. */
13247 T(V7), /* V5TE. */
13248 T(V7), /* V5TEJ. */
13249 T(V7), /* V6. */
13250 T(V7), /* V6KZ. */
13251 T(V7), /* V6T2. */
13252 T(V7), /* V6K. */
13253 T(V7) /* V7. */
13254 };
13255 const int v6_m[] =
13256 {
13257 -1, /* PRE_V4. */
13258 -1, /* V4. */
13259 T(V6K), /* V4T. */
13260 T(V6K), /* V5T. */
13261 T(V6K), /* V5TE. */
13262 T(V6K), /* V5TEJ. */
13263 T(V6K), /* V6. */
13264 T(V6KZ), /* V6KZ. */
13265 T(V7), /* V6T2. */
13266 T(V6K), /* V6K. */
13267 T(V7), /* V7. */
13268 T(V6_M) /* V6_M. */
13269 };
13270 const int v6s_m[] =
13271 {
13272 -1, /* PRE_V4. */
13273 -1, /* V4. */
13274 T(V6K), /* V4T. */
13275 T(V6K), /* V5T. */
13276 T(V6K), /* V5TE. */
13277 T(V6K), /* V5TEJ. */
13278 T(V6K), /* V6. */
13279 T(V6KZ), /* V6KZ. */
13280 T(V7), /* V6T2. */
13281 T(V6K), /* V6K. */
13282 T(V7), /* V7. */
13283 T(V6S_M), /* V6_M. */
13284 T(V6S_M) /* V6S_M. */
13285 };
13286 const int v7e_m[] =
13287 {
13288 -1, /* PRE_V4. */
13289 -1, /* V4. */
13290 T(V7E_M), /* V4T. */
13291 T(V7E_M), /* V5T. */
13292 T(V7E_M), /* V5TE. */
13293 T(V7E_M), /* V5TEJ. */
13294 T(V7E_M), /* V6. */
13295 T(V7E_M), /* V6KZ. */
13296 T(V7E_M), /* V6T2. */
13297 T(V7E_M), /* V6K. */
13298 T(V7E_M), /* V7. */
13299 T(V7E_M), /* V6_M. */
13300 T(V7E_M), /* V6S_M. */
13301 T(V7E_M) /* V7E_M. */
13302 };
13303 const int v8[] =
13304 {
13305 T(V8), /* PRE_V4. */
13306 T(V8), /* V4. */
13307 T(V8), /* V4T. */
13308 T(V8), /* V5T. */
13309 T(V8), /* V5TE. */
13310 T(V8), /* V5TEJ. */
13311 T(V8), /* V6. */
13312 T(V8), /* V6KZ. */
13313 T(V8), /* V6T2. */
13314 T(V8), /* V6K. */
13315 T(V8), /* V7. */
13316 T(V8), /* V6_M. */
13317 T(V8), /* V6S_M. */
13318 T(V8), /* V7E_M. */
13319 T(V8) /* V8. */
13320 };
13321 const int v8r[] =
13322 {
13323 T(V8R), /* PRE_V4. */
13324 T(V8R), /* V4. */
13325 T(V8R), /* V4T. */
13326 T(V8R), /* V5T. */
13327 T(V8R), /* V5TE. */
13328 T(V8R), /* V5TEJ. */
13329 T(V8R), /* V6. */
13330 T(V8R), /* V6KZ. */
13331 T(V8R), /* V6T2. */
13332 T(V8R), /* V6K. */
13333 T(V8R), /* V7. */
13334 T(V8R), /* V6_M. */
13335 T(V8R), /* V6S_M. */
13336 T(V8R), /* V7E_M. */
13337 T(V8), /* V8. */
13338 T(V8R), /* V8R. */
13339 };
13340 const int v8m_baseline[] =
13341 {
13342 -1, /* PRE_V4. */
13343 -1, /* V4. */
13344 -1, /* V4T. */
13345 -1, /* V5T. */
13346 -1, /* V5TE. */
13347 -1, /* V5TEJ. */
13348 -1, /* V6. */
13349 -1, /* V6KZ. */
13350 -1, /* V6T2. */
13351 -1, /* V6K. */
13352 -1, /* V7. */
13353 T(V8M_BASE), /* V6_M. */
13354 T(V8M_BASE), /* V6S_M. */
13355 -1, /* V7E_M. */
13356 -1, /* V8. */
13357 -1, /* V8R. */
13358 T(V8M_BASE) /* V8-M BASELINE. */
13359 };
13360 const int v8m_mainline[] =
13361 {
13362 -1, /* PRE_V4. */
13363 -1, /* V4. */
13364 -1, /* V4T. */
13365 -1, /* V5T. */
13366 -1, /* V5TE. */
13367 -1, /* V5TEJ. */
13368 -1, /* V6. */
13369 -1, /* V6KZ. */
13370 -1, /* V6T2. */
13371 -1, /* V6K. */
13372 T(V8M_MAIN), /* V7. */
13373 T(V8M_MAIN), /* V6_M. */
13374 T(V8M_MAIN), /* V6S_M. */
13375 T(V8M_MAIN), /* V7E_M. */
13376 -1, /* V8. */
13377 -1, /* V8R. */
13378 T(V8M_MAIN), /* V8-M BASELINE. */
13379 T(V8M_MAIN) /* V8-M MAINLINE. */
13380 };
13381 const int v4t_plus_v6_m[] =
13382 {
13383 -1, /* PRE_V4. */
13384 -1, /* V4. */
13385 T(V4T), /* V4T. */
13386 T(V5T), /* V5T. */
13387 T(V5TE), /* V5TE. */
13388 T(V5TEJ), /* V5TEJ. */
13389 T(V6), /* V6. */
13390 T(V6KZ), /* V6KZ. */
13391 T(V6T2), /* V6T2. */
13392 T(V6K), /* V6K. */
13393 T(V7), /* V7. */
13394 T(V6_M), /* V6_M. */
13395 T(V6S_M), /* V6S_M. */
13396 T(V7E_M), /* V7E_M. */
13397 T(V8), /* V8. */
13398 -1, /* V8R. */
13399 T(V8M_BASE), /* V8-M BASELINE. */
13400 T(V8M_MAIN), /* V8-M MAINLINE. */
13401 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13402 };
13403 const int *comb[] =
13404 {
13405 v6t2,
13406 v6k,
13407 v7,
13408 v6_m,
13409 v6s_m,
13410 v7e_m,
13411 v8,
13412 v8r,
13413 v8m_baseline,
13414 v8m_mainline,
13415 /* Pseudo-architecture. */
13416 v4t_plus_v6_m
13417 };
13418
13419 /* Check we've not got a higher architecture than we know about. */
13420
13421 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13422 {
13423 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13424 return -1;
13425 }
13426
13427 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13428
13429 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13430 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13431 oldtag = T(V4T_PLUS_V6_M);
13432
13433 /* And override the new tag if we have a Tag_also_compatible_with on the
13434 input. */
13435
13436 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13437 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13438 newtag = T(V4T_PLUS_V6_M);
13439
13440 tagl = (oldtag < newtag) ? oldtag : newtag;
13441 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13442
13443 /* Architectures before V6KZ add features monotonically. */
13444 if (tagh <= TAG_CPU_ARCH_V6KZ)
13445 return result;
13446
13447 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13448
13449 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13450 as the canonical version. */
13451 if (result == T(V4T_PLUS_V6_M))
13452 {
13453 result = T(V4T);
13454 *secondary_compat_out = T(V6_M);
13455 }
13456 else
13457 *secondary_compat_out = -1;
13458
13459 if (result == -1)
13460 {
13461 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13462 ibfd, oldtag, newtag);
13463 return -1;
13464 }
13465
13466 return result;
13467 #undef T
13468 }
13469
13470 /* Query attributes object to see if integer divide instructions may be
13471 present in an object. */
13472 static bfd_boolean
13473 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13474 {
13475 int arch = attr[Tag_CPU_arch].i;
13476 int profile = attr[Tag_CPU_arch_profile].i;
13477
13478 switch (attr[Tag_DIV_use].i)
13479 {
13480 case 0:
13481 /* Integer divide allowed if instruction contained in archetecture. */
13482 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13483 return TRUE;
13484 else if (arch >= TAG_CPU_ARCH_V7E_M)
13485 return TRUE;
13486 else
13487 return FALSE;
13488
13489 case 1:
13490 /* Integer divide explicitly prohibited. */
13491 return FALSE;
13492
13493 default:
13494 /* Unrecognised case - treat as allowing divide everywhere. */
13495 case 2:
13496 /* Integer divide allowed in ARM state. */
13497 return TRUE;
13498 }
13499 }
13500
13501 /* Query attributes object to see if integer divide instructions are
13502 forbidden to be in the object. This is not the inverse of
13503 elf32_arm_attributes_accept_div. */
13504 static bfd_boolean
13505 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13506 {
13507 return attr[Tag_DIV_use].i == 1;
13508 }
13509
13510 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13511 are conflicting attributes. */
13512
13513 static bfd_boolean
13514 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
13515 {
13516 bfd *obfd = info->output_bfd;
13517 obj_attribute *in_attr;
13518 obj_attribute *out_attr;
13519 /* Some tags have 0 = don't care, 1 = strong requirement,
13520 2 = weak requirement. */
13521 static const int order_021[3] = {0, 2, 1};
13522 int i;
13523 bfd_boolean result = TRUE;
13524 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13525
13526 /* Skip the linker stubs file. This preserves previous behavior
13527 of accepting unknown attributes in the first input file - but
13528 is that a bug? */
13529 if (ibfd->flags & BFD_LINKER_CREATED)
13530 return TRUE;
13531
13532 /* Skip any input that hasn't attribute section.
13533 This enables to link object files without attribute section with
13534 any others. */
13535 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13536 return TRUE;
13537
13538 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13539 {
13540 /* This is the first object. Copy the attributes. */
13541 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13542
13543 out_attr = elf_known_obj_attributes_proc (obfd);
13544
13545 /* Use the Tag_null value to indicate the attributes have been
13546 initialized. */
13547 out_attr[0].i = 1;
13548
13549 /* We do not output objects with Tag_MPextension_use_legacy - we move
13550 the attribute's value to Tag_MPextension_use. */
13551 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13552 {
13553 if (out_attr[Tag_MPextension_use].i != 0
13554 && out_attr[Tag_MPextension_use_legacy].i
13555 != out_attr[Tag_MPextension_use].i)
13556 {
13557 _bfd_error_handler
13558 (_("Error: %B has both the current and legacy "
13559 "Tag_MPextension_use attributes"), ibfd);
13560 result = FALSE;
13561 }
13562
13563 out_attr[Tag_MPextension_use] =
13564 out_attr[Tag_MPextension_use_legacy];
13565 out_attr[Tag_MPextension_use_legacy].type = 0;
13566 out_attr[Tag_MPextension_use_legacy].i = 0;
13567 }
13568
13569 return result;
13570 }
13571
13572 in_attr = elf_known_obj_attributes_proc (ibfd);
13573 out_attr = elf_known_obj_attributes_proc (obfd);
13574 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13575 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13576 {
13577 /* Ignore mismatches if the object doesn't use floating point or is
13578 floating point ABI independent. */
13579 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13580 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13581 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13582 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13583 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13584 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13585 {
13586 _bfd_error_handler
13587 (_("error: %B uses VFP register arguments, %B does not"),
13588 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13589 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13590 result = FALSE;
13591 }
13592 }
13593
13594 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13595 {
13596 /* Merge this attribute with existing attributes. */
13597 switch (i)
13598 {
13599 case Tag_CPU_raw_name:
13600 case Tag_CPU_name:
13601 /* These are merged after Tag_CPU_arch. */
13602 break;
13603
13604 case Tag_ABI_optimization_goals:
13605 case Tag_ABI_FP_optimization_goals:
13606 /* Use the first value seen. */
13607 break;
13608
13609 case Tag_CPU_arch:
13610 {
13611 int secondary_compat = -1, secondary_compat_out = -1;
13612 unsigned int saved_out_attr = out_attr[i].i;
13613 int arch_attr;
13614 static const char *name_table[] =
13615 {
13616 /* These aren't real CPU names, but we can't guess
13617 that from the architecture version alone. */
13618 "Pre v4",
13619 "ARM v4",
13620 "ARM v4T",
13621 "ARM v5T",
13622 "ARM v5TE",
13623 "ARM v5TEJ",
13624 "ARM v6",
13625 "ARM v6KZ",
13626 "ARM v6T2",
13627 "ARM v6K",
13628 "ARM v7",
13629 "ARM v6-M",
13630 "ARM v6S-M",
13631 "ARM v8",
13632 "",
13633 "ARM v8-M.baseline",
13634 "ARM v8-M.mainline",
13635 };
13636
13637 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13638 secondary_compat = get_secondary_compatible_arch (ibfd);
13639 secondary_compat_out = get_secondary_compatible_arch (obfd);
13640 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13641 &secondary_compat_out,
13642 in_attr[i].i,
13643 secondary_compat);
13644
13645 /* Return with error if failed to merge. */
13646 if (arch_attr == -1)
13647 return FALSE;
13648
13649 out_attr[i].i = arch_attr;
13650
13651 set_secondary_compatible_arch (obfd, secondary_compat_out);
13652
13653 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13654 if (out_attr[i].i == saved_out_attr)
13655 ; /* Leave the names alone. */
13656 else if (out_attr[i].i == in_attr[i].i)
13657 {
13658 /* The output architecture has been changed to match the
13659 input architecture. Use the input names. */
13660 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13661 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13662 : NULL;
13663 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13664 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13665 : NULL;
13666 }
13667 else
13668 {
13669 out_attr[Tag_CPU_name].s = NULL;
13670 out_attr[Tag_CPU_raw_name].s = NULL;
13671 }
13672
13673 /* If we still don't have a value for Tag_CPU_name,
13674 make one up now. Tag_CPU_raw_name remains blank. */
13675 if (out_attr[Tag_CPU_name].s == NULL
13676 && out_attr[i].i < ARRAY_SIZE (name_table))
13677 out_attr[Tag_CPU_name].s =
13678 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13679 }
13680 break;
13681
13682 case Tag_ARM_ISA_use:
13683 case Tag_THUMB_ISA_use:
13684 case Tag_WMMX_arch:
13685 case Tag_Advanced_SIMD_arch:
13686 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13687 case Tag_ABI_FP_rounding:
13688 case Tag_ABI_FP_exceptions:
13689 case Tag_ABI_FP_user_exceptions:
13690 case Tag_ABI_FP_number_model:
13691 case Tag_FP_HP_extension:
13692 case Tag_CPU_unaligned_access:
13693 case Tag_T2EE_use:
13694 case Tag_MPextension_use:
13695 /* Use the largest value specified. */
13696 if (in_attr[i].i > out_attr[i].i)
13697 out_attr[i].i = in_attr[i].i;
13698 break;
13699
13700 case Tag_ABI_align_preserved:
13701 case Tag_ABI_PCS_RO_data:
13702 /* Use the smallest value specified. */
13703 if (in_attr[i].i < out_attr[i].i)
13704 out_attr[i].i = in_attr[i].i;
13705 break;
13706
13707 case Tag_ABI_align_needed:
13708 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13709 && (in_attr[Tag_ABI_align_preserved].i == 0
13710 || out_attr[Tag_ABI_align_preserved].i == 0))
13711 {
13712 /* This error message should be enabled once all non-conformant
13713 binaries in the toolchain have had the attributes set
13714 properly.
13715 _bfd_error_handler
13716 (_("error: %B: 8-byte data alignment conflicts with %B"),
13717 obfd, ibfd);
13718 result = FALSE; */
13719 }
13720 /* Fall through. */
13721 case Tag_ABI_FP_denormal:
13722 case Tag_ABI_PCS_GOT_use:
13723 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13724 value if greater than 2 (for future-proofing). */
13725 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13726 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13727 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13728 out_attr[i].i = in_attr[i].i;
13729 break;
13730
13731 case Tag_Virtualization_use:
13732 /* The virtualization tag effectively stores two bits of
13733 information: the intended use of TrustZone (in bit 0), and the
13734 intended use of Virtualization (in bit 1). */
13735 if (out_attr[i].i == 0)
13736 out_attr[i].i = in_attr[i].i;
13737 else if (in_attr[i].i != 0
13738 && in_attr[i].i != out_attr[i].i)
13739 {
13740 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13741 out_attr[i].i = 3;
13742 else
13743 {
13744 _bfd_error_handler
13745 (_("error: %B: unable to merge virtualization attributes "
13746 "with %B"),
13747 obfd, ibfd);
13748 result = FALSE;
13749 }
13750 }
13751 break;
13752
13753 case Tag_CPU_arch_profile:
13754 if (out_attr[i].i != in_attr[i].i)
13755 {
13756 /* 0 will merge with anything.
13757 'A' and 'S' merge to 'A'.
13758 'R' and 'S' merge to 'R'.
13759 'M' and 'A|R|S' is an error. */
13760 if (out_attr[i].i == 0
13761 || (out_attr[i].i == 'S'
13762 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13763 out_attr[i].i = in_attr[i].i;
13764 else if (in_attr[i].i == 0
13765 || (in_attr[i].i == 'S'
13766 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13767 ; /* Do nothing. */
13768 else
13769 {
13770 _bfd_error_handler
13771 (_("error: %B: Conflicting architecture profiles %c/%c"),
13772 ibfd,
13773 in_attr[i].i ? in_attr[i].i : '0',
13774 out_attr[i].i ? out_attr[i].i : '0');
13775 result = FALSE;
13776 }
13777 }
13778 break;
13779
13780 case Tag_DSP_extension:
13781 /* No need to change output value if any of:
13782 - pre (<=) ARMv5T input architecture (do not have DSP)
13783 - M input profile not ARMv7E-M and do not have DSP. */
13784 if (in_attr[Tag_CPU_arch].i <= 3
13785 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13786 && in_attr[Tag_CPU_arch].i != 13
13787 && in_attr[i].i == 0))
13788 ; /* Do nothing. */
13789 /* Output value should be 0 if DSP part of architecture, ie.
13790 - post (>=) ARMv5te architecture output
13791 - A, R or S profile output or ARMv7E-M output architecture. */
13792 else if (out_attr[Tag_CPU_arch].i >= 4
13793 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13794 || out_attr[Tag_CPU_arch_profile].i == 'R'
13795 || out_attr[Tag_CPU_arch_profile].i == 'S'
13796 || out_attr[Tag_CPU_arch].i == 13))
13797 out_attr[i].i = 0;
13798 /* Otherwise, DSP instructions are added and not part of output
13799 architecture. */
13800 else
13801 out_attr[i].i = 1;
13802 break;
13803
13804 case Tag_FP_arch:
13805 {
13806 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13807 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13808 when it's 0. It might mean absence of FP hardware if
13809 Tag_FP_arch is zero. */
13810
13811 #define VFP_VERSION_COUNT 9
13812 static const struct
13813 {
13814 int ver;
13815 int regs;
13816 } vfp_versions[VFP_VERSION_COUNT] =
13817 {
13818 {0, 0},
13819 {1, 16},
13820 {2, 16},
13821 {3, 32},
13822 {3, 16},
13823 {4, 32},
13824 {4, 16},
13825 {8, 32},
13826 {8, 16}
13827 };
13828 int ver;
13829 int regs;
13830 int newval;
13831
13832 /* If the output has no requirement about FP hardware,
13833 follow the requirement of the input. */
13834 if (out_attr[i].i == 0)
13835 {
13836 /* This assert is still reasonable, we shouldn't
13837 produce the suspicious build attribute
13838 combination (See below for in_attr). */
13839 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13840 out_attr[i].i = in_attr[i].i;
13841 out_attr[Tag_ABI_HardFP_use].i
13842 = in_attr[Tag_ABI_HardFP_use].i;
13843 break;
13844 }
13845 /* If the input has no requirement about FP hardware, do
13846 nothing. */
13847 else if (in_attr[i].i == 0)
13848 {
13849 /* We used to assert that Tag_ABI_HardFP_use was
13850 zero here, but we should never assert when
13851 consuming an object file that has suspicious
13852 build attributes. The single precision variant
13853 of 'no FP architecture' is still 'no FP
13854 architecture', so we just ignore the tag in this
13855 case. */
13856 break;
13857 }
13858
13859 /* Both the input and the output have nonzero Tag_FP_arch.
13860 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13861
13862 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13863 do nothing. */
13864 if (in_attr[Tag_ABI_HardFP_use].i == 0
13865 && out_attr[Tag_ABI_HardFP_use].i == 0)
13866 ;
13867 /* If the input and the output have different Tag_ABI_HardFP_use,
13868 the combination of them is 0 (implied by Tag_FP_arch). */
13869 else if (in_attr[Tag_ABI_HardFP_use].i
13870 != out_attr[Tag_ABI_HardFP_use].i)
13871 out_attr[Tag_ABI_HardFP_use].i = 0;
13872
13873 /* Now we can handle Tag_FP_arch. */
13874
13875 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13876 pick the biggest. */
13877 if (in_attr[i].i >= VFP_VERSION_COUNT
13878 && in_attr[i].i > out_attr[i].i)
13879 {
13880 out_attr[i] = in_attr[i];
13881 break;
13882 }
13883 /* The output uses the superset of input features
13884 (ISA version) and registers. */
13885 ver = vfp_versions[in_attr[i].i].ver;
13886 if (ver < vfp_versions[out_attr[i].i].ver)
13887 ver = vfp_versions[out_attr[i].i].ver;
13888 regs = vfp_versions[in_attr[i].i].regs;
13889 if (regs < vfp_versions[out_attr[i].i].regs)
13890 regs = vfp_versions[out_attr[i].i].regs;
13891 /* This assumes all possible supersets are also a valid
13892 options. */
13893 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13894 {
13895 if (regs == vfp_versions[newval].regs
13896 && ver == vfp_versions[newval].ver)
13897 break;
13898 }
13899 out_attr[i].i = newval;
13900 }
13901 break;
13902 case Tag_PCS_config:
13903 if (out_attr[i].i == 0)
13904 out_attr[i].i = in_attr[i].i;
13905 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13906 {
13907 /* It's sometimes ok to mix different configs, so this is only
13908 a warning. */
13909 _bfd_error_handler
13910 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13911 }
13912 break;
13913 case Tag_ABI_PCS_R9_use:
13914 if (in_attr[i].i != out_attr[i].i
13915 && out_attr[i].i != AEABI_R9_unused
13916 && in_attr[i].i != AEABI_R9_unused)
13917 {
13918 _bfd_error_handler
13919 (_("error: %B: Conflicting use of R9"), ibfd);
13920 result = FALSE;
13921 }
13922 if (out_attr[i].i == AEABI_R9_unused)
13923 out_attr[i].i = in_attr[i].i;
13924 break;
13925 case Tag_ABI_PCS_RW_data:
13926 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13927 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13928 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13929 {
13930 _bfd_error_handler
13931 (_("error: %B: SB relative addressing conflicts with use of R9"),
13932 ibfd);
13933 result = FALSE;
13934 }
13935 /* Use the smallest value specified. */
13936 if (in_attr[i].i < out_attr[i].i)
13937 out_attr[i].i = in_attr[i].i;
13938 break;
13939 case Tag_ABI_PCS_wchar_t:
13940 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13941 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13942 {
13943 _bfd_error_handler
13944 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13945 ibfd, in_attr[i].i, out_attr[i].i);
13946 }
13947 else if (in_attr[i].i && !out_attr[i].i)
13948 out_attr[i].i = in_attr[i].i;
13949 break;
13950 case Tag_ABI_enum_size:
13951 if (in_attr[i].i != AEABI_enum_unused)
13952 {
13953 if (out_attr[i].i == AEABI_enum_unused
13954 || out_attr[i].i == AEABI_enum_forced_wide)
13955 {
13956 /* The existing object is compatible with anything.
13957 Use whatever requirements the new object has. */
13958 out_attr[i].i = in_attr[i].i;
13959 }
13960 else if (in_attr[i].i != AEABI_enum_forced_wide
13961 && out_attr[i].i != in_attr[i].i
13962 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13963 {
13964 static const char *aeabi_enum_names[] =
13965 { "", "variable-size", "32-bit", "" };
13966 const char *in_name =
13967 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13968 ? aeabi_enum_names[in_attr[i].i]
13969 : "<unknown>";
13970 const char *out_name =
13971 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13972 ? aeabi_enum_names[out_attr[i].i]
13973 : "<unknown>";
13974 _bfd_error_handler
13975 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13976 ibfd, in_name, out_name);
13977 }
13978 }
13979 break;
13980 case Tag_ABI_VFP_args:
13981 /* Aready done. */
13982 break;
13983 case Tag_ABI_WMMX_args:
13984 if (in_attr[i].i != out_attr[i].i)
13985 {
13986 _bfd_error_handler
13987 (_("error: %B uses iWMMXt register arguments, %B does not"),
13988 ibfd, obfd);
13989 result = FALSE;
13990 }
13991 break;
13992 case Tag_compatibility:
13993 /* Merged in target-independent code. */
13994 break;
13995 case Tag_ABI_HardFP_use:
13996 /* This is handled along with Tag_FP_arch. */
13997 break;
13998 case Tag_ABI_FP_16bit_format:
13999 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14000 {
14001 if (in_attr[i].i != out_attr[i].i)
14002 {
14003 _bfd_error_handler
14004 (_("error: fp16 format mismatch between %B and %B"),
14005 ibfd, obfd);
14006 result = FALSE;
14007 }
14008 }
14009 if (in_attr[i].i != 0)
14010 out_attr[i].i = in_attr[i].i;
14011 break;
14012
14013 case Tag_DIV_use:
14014 /* A value of zero on input means that the divide instruction may
14015 be used if available in the base architecture as specified via
14016 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14017 the user did not want divide instructions. A value of 2
14018 explicitly means that divide instructions were allowed in ARM
14019 and Thumb state. */
14020 if (in_attr[i].i == out_attr[i].i)
14021 /* Do nothing. */ ;
14022 else if (elf32_arm_attributes_forbid_div (in_attr)
14023 && !elf32_arm_attributes_accept_div (out_attr))
14024 out_attr[i].i = 1;
14025 else if (elf32_arm_attributes_forbid_div (out_attr)
14026 && elf32_arm_attributes_accept_div (in_attr))
14027 out_attr[i].i = in_attr[i].i;
14028 else if (in_attr[i].i == 2)
14029 out_attr[i].i = in_attr[i].i;
14030 break;
14031
14032 case Tag_MPextension_use_legacy:
14033 /* We don't output objects with Tag_MPextension_use_legacy - we
14034 move the value to Tag_MPextension_use. */
14035 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14036 {
14037 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14038 {
14039 _bfd_error_handler
14040 (_("%B has has both the current and legacy "
14041 "Tag_MPextension_use attributes"),
14042 ibfd);
14043 result = FALSE;
14044 }
14045 }
14046
14047 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14048 out_attr[Tag_MPextension_use] = in_attr[i];
14049
14050 break;
14051
14052 case Tag_nodefaults:
14053 /* This tag is set if it exists, but the value is unused (and is
14054 typically zero). We don't actually need to do anything here -
14055 the merge happens automatically when the type flags are merged
14056 below. */
14057 break;
14058 case Tag_also_compatible_with:
14059 /* Already done in Tag_CPU_arch. */
14060 break;
14061 case Tag_conformance:
14062 /* Keep the attribute if it matches. Throw it away otherwise.
14063 No attribute means no claim to conform. */
14064 if (!in_attr[i].s || !out_attr[i].s
14065 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14066 out_attr[i].s = NULL;
14067 break;
14068
14069 default:
14070 result
14071 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14072 }
14073
14074 /* If out_attr was copied from in_attr then it won't have a type yet. */
14075 if (in_attr[i].type && !out_attr[i].type)
14076 out_attr[i].type = in_attr[i].type;
14077 }
14078
14079 /* Merge Tag_compatibility attributes and any common GNU ones. */
14080 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14081 return FALSE;
14082
14083 /* Check for any attributes not known on ARM. */
14084 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14085
14086 return result;
14087 }
14088
14089
14090 /* Return TRUE if the two EABI versions are incompatible. */
14091
14092 static bfd_boolean
14093 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14094 {
14095 /* v4 and v5 are the same spec before and after it was released,
14096 so allow mixing them. */
14097 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14098 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14099 return TRUE;
14100
14101 return (iver == over);
14102 }
14103
14104 /* Merge backend specific data from an object file to the output
14105 object file when linking. */
14106
14107 static bfd_boolean
14108 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14109
14110 /* Display the flags field. */
14111
14112 static bfd_boolean
14113 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14114 {
14115 FILE * file = (FILE *) ptr;
14116 unsigned long flags;
14117
14118 BFD_ASSERT (abfd != NULL && ptr != NULL);
14119
14120 /* Print normal ELF private data. */
14121 _bfd_elf_print_private_bfd_data (abfd, ptr);
14122
14123 flags = elf_elfheader (abfd)->e_flags;
14124 /* Ignore init flag - it may not be set, despite the flags field
14125 containing valid data. */
14126
14127 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14128
14129 switch (EF_ARM_EABI_VERSION (flags))
14130 {
14131 case EF_ARM_EABI_UNKNOWN:
14132 /* The following flag bits are GNU extensions and not part of the
14133 official ARM ELF extended ABI. Hence they are only decoded if
14134 the EABI version is not set. */
14135 if (flags & EF_ARM_INTERWORK)
14136 fprintf (file, _(" [interworking enabled]"));
14137
14138 if (flags & EF_ARM_APCS_26)
14139 fprintf (file, " [APCS-26]");
14140 else
14141 fprintf (file, " [APCS-32]");
14142
14143 if (flags & EF_ARM_VFP_FLOAT)
14144 fprintf (file, _(" [VFP float format]"));
14145 else if (flags & EF_ARM_MAVERICK_FLOAT)
14146 fprintf (file, _(" [Maverick float format]"));
14147 else
14148 fprintf (file, _(" [FPA float format]"));
14149
14150 if (flags & EF_ARM_APCS_FLOAT)
14151 fprintf (file, _(" [floats passed in float registers]"));
14152
14153 if (flags & EF_ARM_PIC)
14154 fprintf (file, _(" [position independent]"));
14155
14156 if (flags & EF_ARM_NEW_ABI)
14157 fprintf (file, _(" [new ABI]"));
14158
14159 if (flags & EF_ARM_OLD_ABI)
14160 fprintf (file, _(" [old ABI]"));
14161
14162 if (flags & EF_ARM_SOFT_FLOAT)
14163 fprintf (file, _(" [software FP]"));
14164
14165 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14166 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14167 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14168 | EF_ARM_MAVERICK_FLOAT);
14169 break;
14170
14171 case EF_ARM_EABI_VER1:
14172 fprintf (file, _(" [Version1 EABI]"));
14173
14174 if (flags & EF_ARM_SYMSARESORTED)
14175 fprintf (file, _(" [sorted symbol table]"));
14176 else
14177 fprintf (file, _(" [unsorted symbol table]"));
14178
14179 flags &= ~ EF_ARM_SYMSARESORTED;
14180 break;
14181
14182 case EF_ARM_EABI_VER2:
14183 fprintf (file, _(" [Version2 EABI]"));
14184
14185 if (flags & EF_ARM_SYMSARESORTED)
14186 fprintf (file, _(" [sorted symbol table]"));
14187 else
14188 fprintf (file, _(" [unsorted symbol table]"));
14189
14190 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14191 fprintf (file, _(" [dynamic symbols use segment index]"));
14192
14193 if (flags & EF_ARM_MAPSYMSFIRST)
14194 fprintf (file, _(" [mapping symbols precede others]"));
14195
14196 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14197 | EF_ARM_MAPSYMSFIRST);
14198 break;
14199
14200 case EF_ARM_EABI_VER3:
14201 fprintf (file, _(" [Version3 EABI]"));
14202 break;
14203
14204 case EF_ARM_EABI_VER4:
14205 fprintf (file, _(" [Version4 EABI]"));
14206 goto eabi;
14207
14208 case EF_ARM_EABI_VER5:
14209 fprintf (file, _(" [Version5 EABI]"));
14210
14211 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14212 fprintf (file, _(" [soft-float ABI]"));
14213
14214 if (flags & EF_ARM_ABI_FLOAT_HARD)
14215 fprintf (file, _(" [hard-float ABI]"));
14216
14217 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14218
14219 eabi:
14220 if (flags & EF_ARM_BE8)
14221 fprintf (file, _(" [BE8]"));
14222
14223 if (flags & EF_ARM_LE8)
14224 fprintf (file, _(" [LE8]"));
14225
14226 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14227 break;
14228
14229 default:
14230 fprintf (file, _(" <EABI version unrecognised>"));
14231 break;
14232 }
14233
14234 flags &= ~ EF_ARM_EABIMASK;
14235
14236 if (flags & EF_ARM_RELEXEC)
14237 fprintf (file, _(" [relocatable executable]"));
14238
14239 flags &= ~EF_ARM_RELEXEC;
14240
14241 if (flags)
14242 fprintf (file, _("<Unrecognised flag bits set>"));
14243
14244 fputc ('\n', file);
14245
14246 return TRUE;
14247 }
14248
14249 static int
14250 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14251 {
14252 switch (ELF_ST_TYPE (elf_sym->st_info))
14253 {
14254 case STT_ARM_TFUNC:
14255 return ELF_ST_TYPE (elf_sym->st_info);
14256
14257 case STT_ARM_16BIT:
14258 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14259 This allows us to distinguish between data used by Thumb instructions
14260 and non-data (which is probably code) inside Thumb regions of an
14261 executable. */
14262 if (type != STT_OBJECT && type != STT_TLS)
14263 return ELF_ST_TYPE (elf_sym->st_info);
14264 break;
14265
14266 default:
14267 break;
14268 }
14269
14270 return type;
14271 }
14272
14273 static asection *
14274 elf32_arm_gc_mark_hook (asection *sec,
14275 struct bfd_link_info *info,
14276 Elf_Internal_Rela *rel,
14277 struct elf_link_hash_entry *h,
14278 Elf_Internal_Sym *sym)
14279 {
14280 if (h != NULL)
14281 switch (ELF32_R_TYPE (rel->r_info))
14282 {
14283 case R_ARM_GNU_VTINHERIT:
14284 case R_ARM_GNU_VTENTRY:
14285 return NULL;
14286 }
14287
14288 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14289 }
14290
14291 /* Update the got entry reference counts for the section being removed. */
14292
14293 static bfd_boolean
14294 elf32_arm_gc_sweep_hook (bfd * abfd,
14295 struct bfd_link_info * info,
14296 asection * sec,
14297 const Elf_Internal_Rela * relocs)
14298 {
14299 Elf_Internal_Shdr *symtab_hdr;
14300 struct elf_link_hash_entry **sym_hashes;
14301 bfd_signed_vma *local_got_refcounts;
14302 const Elf_Internal_Rela *rel, *relend;
14303 struct elf32_arm_link_hash_table * globals;
14304
14305 if (bfd_link_relocatable (info))
14306 return TRUE;
14307
14308 globals = elf32_arm_hash_table (info);
14309 if (globals == NULL)
14310 return FALSE;
14311
14312 elf_section_data (sec)->local_dynrel = NULL;
14313
14314 symtab_hdr = & elf_symtab_hdr (abfd);
14315 sym_hashes = elf_sym_hashes (abfd);
14316 local_got_refcounts = elf_local_got_refcounts (abfd);
14317
14318 check_use_blx (globals);
14319
14320 relend = relocs + sec->reloc_count;
14321 for (rel = relocs; rel < relend; rel++)
14322 {
14323 unsigned long r_symndx;
14324 struct elf_link_hash_entry *h = NULL;
14325 struct elf32_arm_link_hash_entry *eh;
14326 int r_type;
14327 bfd_boolean call_reloc_p;
14328 bfd_boolean may_become_dynamic_p;
14329 bfd_boolean may_need_local_target_p;
14330 union gotplt_union *root_plt;
14331 struct arm_plt_info *arm_plt;
14332
14333 r_symndx = ELF32_R_SYM (rel->r_info);
14334 if (r_symndx >= symtab_hdr->sh_info)
14335 {
14336 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14337 while (h->root.type == bfd_link_hash_indirect
14338 || h->root.type == bfd_link_hash_warning)
14339 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14340 }
14341 eh = (struct elf32_arm_link_hash_entry *) h;
14342
14343 call_reloc_p = FALSE;
14344 may_become_dynamic_p = FALSE;
14345 may_need_local_target_p = FALSE;
14346
14347 r_type = ELF32_R_TYPE (rel->r_info);
14348 r_type = arm_real_reloc_type (globals, r_type);
14349 switch (r_type)
14350 {
14351 case R_ARM_GOT32:
14352 case R_ARM_GOT_PREL:
14353 case R_ARM_TLS_GD32:
14354 case R_ARM_TLS_IE32:
14355 if (h != NULL)
14356 {
14357 if (h->got.refcount > 0)
14358 h->got.refcount -= 1;
14359 }
14360 else if (local_got_refcounts != NULL)
14361 {
14362 if (local_got_refcounts[r_symndx] > 0)
14363 local_got_refcounts[r_symndx] -= 1;
14364 }
14365 break;
14366
14367 case R_ARM_TLS_LDM32:
14368 globals->tls_ldm_got.refcount -= 1;
14369 break;
14370
14371 case R_ARM_PC24:
14372 case R_ARM_PLT32:
14373 case R_ARM_CALL:
14374 case R_ARM_JUMP24:
14375 case R_ARM_PREL31:
14376 case R_ARM_THM_CALL:
14377 case R_ARM_THM_JUMP24:
14378 case R_ARM_THM_JUMP19:
14379 call_reloc_p = TRUE;
14380 may_need_local_target_p = TRUE;
14381 break;
14382
14383 case R_ARM_ABS12:
14384 if (!globals->vxworks_p)
14385 {
14386 may_need_local_target_p = TRUE;
14387 break;
14388 }
14389 /* Fall through. */
14390 case R_ARM_ABS32:
14391 case R_ARM_ABS32_NOI:
14392 case R_ARM_REL32:
14393 case R_ARM_REL32_NOI:
14394 case R_ARM_MOVW_ABS_NC:
14395 case R_ARM_MOVT_ABS:
14396 case R_ARM_MOVW_PREL_NC:
14397 case R_ARM_MOVT_PREL:
14398 case R_ARM_THM_MOVW_ABS_NC:
14399 case R_ARM_THM_MOVT_ABS:
14400 case R_ARM_THM_MOVW_PREL_NC:
14401 case R_ARM_THM_MOVT_PREL:
14402 /* Should the interworking branches be here also? */
14403 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14404 && (sec->flags & SEC_ALLOC) != 0)
14405 {
14406 if (h == NULL
14407 && elf32_arm_howto_from_type (r_type)->pc_relative)
14408 {
14409 call_reloc_p = TRUE;
14410 may_need_local_target_p = TRUE;
14411 }
14412 else
14413 may_become_dynamic_p = TRUE;
14414 }
14415 else
14416 may_need_local_target_p = TRUE;
14417 break;
14418
14419 default:
14420 break;
14421 }
14422
14423 if (may_need_local_target_p
14424 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14425 &arm_plt))
14426 {
14427 /* If PLT refcount book-keeping is wrong and too low, we'll
14428 see a zero value (going to -1) for the root PLT reference
14429 count. */
14430 if (root_plt->refcount >= 0)
14431 {
14432 BFD_ASSERT (root_plt->refcount != 0);
14433 root_plt->refcount -= 1;
14434 }
14435 else
14436 /* A value of -1 means the symbol has become local, forced
14437 or seeing a hidden definition. Any other negative value
14438 is an error. */
14439 BFD_ASSERT (root_plt->refcount == -1);
14440
14441 if (!call_reloc_p)
14442 arm_plt->noncall_refcount--;
14443
14444 if (r_type == R_ARM_THM_CALL)
14445 arm_plt->maybe_thumb_refcount--;
14446
14447 if (r_type == R_ARM_THM_JUMP24
14448 || r_type == R_ARM_THM_JUMP19)
14449 arm_plt->thumb_refcount--;
14450 }
14451
14452 if (may_become_dynamic_p)
14453 {
14454 struct elf_dyn_relocs **pp;
14455 struct elf_dyn_relocs *p;
14456
14457 if (h != NULL)
14458 pp = &(eh->dyn_relocs);
14459 else
14460 {
14461 Elf_Internal_Sym *isym;
14462
14463 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14464 abfd, r_symndx);
14465 if (isym == NULL)
14466 return FALSE;
14467 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14468 if (pp == NULL)
14469 return FALSE;
14470 }
14471 for (; (p = *pp) != NULL; pp = &p->next)
14472 if (p->sec == sec)
14473 {
14474 /* Everything must go for SEC. */
14475 *pp = p->next;
14476 break;
14477 }
14478 }
14479 }
14480
14481 return TRUE;
14482 }
14483
14484 /* Look through the relocs for a section during the first phase. */
14485
14486 static bfd_boolean
14487 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14488 asection *sec, const Elf_Internal_Rela *relocs)
14489 {
14490 Elf_Internal_Shdr *symtab_hdr;
14491 struct elf_link_hash_entry **sym_hashes;
14492 const Elf_Internal_Rela *rel;
14493 const Elf_Internal_Rela *rel_end;
14494 bfd *dynobj;
14495 asection *sreloc;
14496 struct elf32_arm_link_hash_table *htab;
14497 bfd_boolean call_reloc_p;
14498 bfd_boolean may_become_dynamic_p;
14499 bfd_boolean may_need_local_target_p;
14500 unsigned long nsyms;
14501
14502 if (bfd_link_relocatable (info))
14503 return TRUE;
14504
14505 BFD_ASSERT (is_arm_elf (abfd));
14506
14507 htab = elf32_arm_hash_table (info);
14508 if (htab == NULL)
14509 return FALSE;
14510
14511 sreloc = NULL;
14512
14513 /* Create dynamic sections for relocatable executables so that we can
14514 copy relocations. */
14515 if (htab->root.is_relocatable_executable
14516 && ! htab->root.dynamic_sections_created)
14517 {
14518 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14519 return FALSE;
14520 }
14521
14522 if (htab->root.dynobj == NULL)
14523 htab->root.dynobj = abfd;
14524 if (!create_ifunc_sections (info))
14525 return FALSE;
14526
14527 dynobj = htab->root.dynobj;
14528
14529 symtab_hdr = & elf_symtab_hdr (abfd);
14530 sym_hashes = elf_sym_hashes (abfd);
14531 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14532
14533 rel_end = relocs + sec->reloc_count;
14534 for (rel = relocs; rel < rel_end; rel++)
14535 {
14536 Elf_Internal_Sym *isym;
14537 struct elf_link_hash_entry *h;
14538 struct elf32_arm_link_hash_entry *eh;
14539 unsigned int r_symndx;
14540 int r_type;
14541
14542 r_symndx = ELF32_R_SYM (rel->r_info);
14543 r_type = ELF32_R_TYPE (rel->r_info);
14544 r_type = arm_real_reloc_type (htab, r_type);
14545
14546 if (r_symndx >= nsyms
14547 /* PR 9934: It is possible to have relocations that do not
14548 refer to symbols, thus it is also possible to have an
14549 object file containing relocations but no symbol table. */
14550 && (r_symndx > STN_UNDEF || nsyms > 0))
14551 {
14552 _bfd_error_handler (_("%B: bad symbol index: %d"), abfd,
14553 r_symndx);
14554 return FALSE;
14555 }
14556
14557 h = NULL;
14558 isym = NULL;
14559 if (nsyms > 0)
14560 {
14561 if (r_symndx < symtab_hdr->sh_info)
14562 {
14563 /* A local symbol. */
14564 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14565 abfd, r_symndx);
14566 if (isym == NULL)
14567 return FALSE;
14568 }
14569 else
14570 {
14571 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14572 while (h->root.type == bfd_link_hash_indirect
14573 || h->root.type == bfd_link_hash_warning)
14574 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14575
14576 /* PR15323, ref flags aren't set for references in the
14577 same object. */
14578 h->root.non_ir_ref_regular = 1;
14579 }
14580 }
14581
14582 eh = (struct elf32_arm_link_hash_entry *) h;
14583
14584 call_reloc_p = FALSE;
14585 may_become_dynamic_p = FALSE;
14586 may_need_local_target_p = FALSE;
14587
14588 /* Could be done earlier, if h were already available. */
14589 r_type = elf32_arm_tls_transition (info, r_type, h);
14590 switch (r_type)
14591 {
14592 case R_ARM_GOT32:
14593 case R_ARM_GOT_PREL:
14594 case R_ARM_TLS_GD32:
14595 case R_ARM_TLS_IE32:
14596 case R_ARM_TLS_GOTDESC:
14597 case R_ARM_TLS_DESCSEQ:
14598 case R_ARM_THM_TLS_DESCSEQ:
14599 case R_ARM_TLS_CALL:
14600 case R_ARM_THM_TLS_CALL:
14601 /* This symbol requires a global offset table entry. */
14602 {
14603 int tls_type, old_tls_type;
14604
14605 switch (r_type)
14606 {
14607 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14608
14609 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14610
14611 case R_ARM_TLS_GOTDESC:
14612 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14613 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14614 tls_type = GOT_TLS_GDESC; break;
14615
14616 default: tls_type = GOT_NORMAL; break;
14617 }
14618
14619 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14620 info->flags |= DF_STATIC_TLS;
14621
14622 if (h != NULL)
14623 {
14624 h->got.refcount++;
14625 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14626 }
14627 else
14628 {
14629 /* This is a global offset table entry for a local symbol. */
14630 if (!elf32_arm_allocate_local_sym_info (abfd))
14631 return FALSE;
14632 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14633 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14634 }
14635
14636 /* If a variable is accessed with both tls methods, two
14637 slots may be created. */
14638 if (GOT_TLS_GD_ANY_P (old_tls_type)
14639 && GOT_TLS_GD_ANY_P (tls_type))
14640 tls_type |= old_tls_type;
14641
14642 /* We will already have issued an error message if there
14643 is a TLS/non-TLS mismatch, based on the symbol
14644 type. So just combine any TLS types needed. */
14645 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14646 && tls_type != GOT_NORMAL)
14647 tls_type |= old_tls_type;
14648
14649 /* If the symbol is accessed in both IE and GDESC
14650 method, we're able to relax. Turn off the GDESC flag,
14651 without messing up with any other kind of tls types
14652 that may be involved. */
14653 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14654 tls_type &= ~GOT_TLS_GDESC;
14655
14656 if (old_tls_type != tls_type)
14657 {
14658 if (h != NULL)
14659 elf32_arm_hash_entry (h)->tls_type = tls_type;
14660 else
14661 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14662 }
14663 }
14664 /* Fall through. */
14665
14666 case R_ARM_TLS_LDM32:
14667 if (r_type == R_ARM_TLS_LDM32)
14668 htab->tls_ldm_got.refcount++;
14669 /* Fall through. */
14670
14671 case R_ARM_GOTOFF32:
14672 case R_ARM_GOTPC:
14673 if (htab->root.sgot == NULL
14674 && !create_got_section (htab->root.dynobj, info))
14675 return FALSE;
14676 break;
14677
14678 case R_ARM_PC24:
14679 case R_ARM_PLT32:
14680 case R_ARM_CALL:
14681 case R_ARM_JUMP24:
14682 case R_ARM_PREL31:
14683 case R_ARM_THM_CALL:
14684 case R_ARM_THM_JUMP24:
14685 case R_ARM_THM_JUMP19:
14686 call_reloc_p = TRUE;
14687 may_need_local_target_p = TRUE;
14688 break;
14689
14690 case R_ARM_ABS12:
14691 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14692 ldr __GOTT_INDEX__ offsets. */
14693 if (!htab->vxworks_p)
14694 {
14695 may_need_local_target_p = TRUE;
14696 break;
14697 }
14698 else goto jump_over;
14699
14700 /* Fall through. */
14701
14702 case R_ARM_MOVW_ABS_NC:
14703 case R_ARM_MOVT_ABS:
14704 case R_ARM_THM_MOVW_ABS_NC:
14705 case R_ARM_THM_MOVT_ABS:
14706 if (bfd_link_pic (info))
14707 {
14708 _bfd_error_handler
14709 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14710 abfd, elf32_arm_howto_table_1[r_type].name,
14711 (h) ? h->root.root.string : "a local symbol");
14712 bfd_set_error (bfd_error_bad_value);
14713 return FALSE;
14714 }
14715
14716 /* Fall through. */
14717 case R_ARM_ABS32:
14718 case R_ARM_ABS32_NOI:
14719 jump_over:
14720 if (h != NULL && bfd_link_executable (info))
14721 {
14722 h->pointer_equality_needed = 1;
14723 }
14724 /* Fall through. */
14725 case R_ARM_REL32:
14726 case R_ARM_REL32_NOI:
14727 case R_ARM_MOVW_PREL_NC:
14728 case R_ARM_MOVT_PREL:
14729 case R_ARM_THM_MOVW_PREL_NC:
14730 case R_ARM_THM_MOVT_PREL:
14731
14732 /* Should the interworking branches be listed here? */
14733 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14734 && (sec->flags & SEC_ALLOC) != 0)
14735 {
14736 if (h == NULL
14737 && elf32_arm_howto_from_type (r_type)->pc_relative)
14738 {
14739 /* In shared libraries and relocatable executables,
14740 we treat local relative references as calls;
14741 see the related SYMBOL_CALLS_LOCAL code in
14742 allocate_dynrelocs. */
14743 call_reloc_p = TRUE;
14744 may_need_local_target_p = TRUE;
14745 }
14746 else
14747 /* We are creating a shared library or relocatable
14748 executable, and this is a reloc against a global symbol,
14749 or a non-PC-relative reloc against a local symbol.
14750 We may need to copy the reloc into the output. */
14751 may_become_dynamic_p = TRUE;
14752 }
14753 else
14754 may_need_local_target_p = TRUE;
14755 break;
14756
14757 /* This relocation describes the C++ object vtable hierarchy.
14758 Reconstruct it for later use during GC. */
14759 case R_ARM_GNU_VTINHERIT:
14760 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14761 return FALSE;
14762 break;
14763
14764 /* This relocation describes which C++ vtable entries are actually
14765 used. Record for later use during GC. */
14766 case R_ARM_GNU_VTENTRY:
14767 BFD_ASSERT (h != NULL);
14768 if (h != NULL
14769 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14770 return FALSE;
14771 break;
14772 }
14773
14774 if (h != NULL)
14775 {
14776 if (call_reloc_p)
14777 /* We may need a .plt entry if the function this reloc
14778 refers to is in a different object, regardless of the
14779 symbol's type. We can't tell for sure yet, because
14780 something later might force the symbol local. */
14781 h->needs_plt = 1;
14782 else if (may_need_local_target_p)
14783 /* If this reloc is in a read-only section, we might
14784 need a copy reloc. We can't check reliably at this
14785 stage whether the section is read-only, as input
14786 sections have not yet been mapped to output sections.
14787 Tentatively set the flag for now, and correct in
14788 adjust_dynamic_symbol. */
14789 h->non_got_ref = 1;
14790 }
14791
14792 if (may_need_local_target_p
14793 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14794 {
14795 union gotplt_union *root_plt;
14796 struct arm_plt_info *arm_plt;
14797 struct arm_local_iplt_info *local_iplt;
14798
14799 if (h != NULL)
14800 {
14801 root_plt = &h->plt;
14802 arm_plt = &eh->plt;
14803 }
14804 else
14805 {
14806 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14807 if (local_iplt == NULL)
14808 return FALSE;
14809 root_plt = &local_iplt->root;
14810 arm_plt = &local_iplt->arm;
14811 }
14812
14813 /* If the symbol is a function that doesn't bind locally,
14814 this relocation will need a PLT entry. */
14815 if (root_plt->refcount != -1)
14816 root_plt->refcount += 1;
14817
14818 if (!call_reloc_p)
14819 arm_plt->noncall_refcount++;
14820
14821 /* It's too early to use htab->use_blx here, so we have to
14822 record possible blx references separately from
14823 relocs that definitely need a thumb stub. */
14824
14825 if (r_type == R_ARM_THM_CALL)
14826 arm_plt->maybe_thumb_refcount += 1;
14827
14828 if (r_type == R_ARM_THM_JUMP24
14829 || r_type == R_ARM_THM_JUMP19)
14830 arm_plt->thumb_refcount += 1;
14831 }
14832
14833 if (may_become_dynamic_p)
14834 {
14835 struct elf_dyn_relocs *p, **head;
14836
14837 /* Create a reloc section in dynobj. */
14838 if (sreloc == NULL)
14839 {
14840 sreloc = _bfd_elf_make_dynamic_reloc_section
14841 (sec, dynobj, 2, abfd, ! htab->use_rel);
14842
14843 if (sreloc == NULL)
14844 return FALSE;
14845
14846 /* BPABI objects never have dynamic relocations mapped. */
14847 if (htab->symbian_p)
14848 {
14849 flagword flags;
14850
14851 flags = bfd_get_section_flags (dynobj, sreloc);
14852 flags &= ~(SEC_LOAD | SEC_ALLOC);
14853 bfd_set_section_flags (dynobj, sreloc, flags);
14854 }
14855 }
14856
14857 /* If this is a global symbol, count the number of
14858 relocations we need for this symbol. */
14859 if (h != NULL)
14860 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14861 else
14862 {
14863 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14864 if (head == NULL)
14865 return FALSE;
14866 }
14867
14868 p = *head;
14869 if (p == NULL || p->sec != sec)
14870 {
14871 bfd_size_type amt = sizeof *p;
14872
14873 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14874 if (p == NULL)
14875 return FALSE;
14876 p->next = *head;
14877 *head = p;
14878 p->sec = sec;
14879 p->count = 0;
14880 p->pc_count = 0;
14881 }
14882
14883 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14884 p->pc_count += 1;
14885 p->count += 1;
14886 }
14887 }
14888
14889 return TRUE;
14890 }
14891
14892 static void
14893 elf32_arm_update_relocs (asection *o,
14894 struct bfd_elf_section_reloc_data *reldata)
14895 {
14896 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14897 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14898 const struct elf_backend_data *bed;
14899 _arm_elf_section_data *eado;
14900 struct bfd_link_order *p;
14901 bfd_byte *erela_head, *erela;
14902 Elf_Internal_Rela *irela_head, *irela;
14903 Elf_Internal_Shdr *rel_hdr;
14904 bfd *abfd;
14905 unsigned int count;
14906
14907 eado = get_arm_elf_section_data (o);
14908
14909 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14910 return;
14911
14912 abfd = o->owner;
14913 bed = get_elf_backend_data (abfd);
14914 rel_hdr = reldata->hdr;
14915
14916 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14917 {
14918 swap_in = bed->s->swap_reloc_in;
14919 swap_out = bed->s->swap_reloc_out;
14920 }
14921 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14922 {
14923 swap_in = bed->s->swap_reloca_in;
14924 swap_out = bed->s->swap_reloca_out;
14925 }
14926 else
14927 abort ();
14928
14929 erela_head = rel_hdr->contents;
14930 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14931 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14932
14933 erela = erela_head;
14934 irela = irela_head;
14935 count = 0;
14936
14937 for (p = o->map_head.link_order; p; p = p->next)
14938 {
14939 if (p->type == bfd_section_reloc_link_order
14940 || p->type == bfd_symbol_reloc_link_order)
14941 {
14942 (*swap_in) (abfd, erela, irela);
14943 erela += rel_hdr->sh_entsize;
14944 irela++;
14945 count++;
14946 }
14947 else if (p->type == bfd_indirect_link_order)
14948 {
14949 struct bfd_elf_section_reloc_data *input_reldata;
14950 arm_unwind_table_edit *edit_list, *edit_tail;
14951 _arm_elf_section_data *eadi;
14952 bfd_size_type j;
14953 bfd_vma offset;
14954 asection *i;
14955
14956 i = p->u.indirect.section;
14957
14958 eadi = get_arm_elf_section_data (i);
14959 edit_list = eadi->u.exidx.unwind_edit_list;
14960 edit_tail = eadi->u.exidx.unwind_edit_tail;
14961 offset = o->vma + i->output_offset;
14962
14963 if (eadi->elf.rel.hdr &&
14964 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14965 input_reldata = &eadi->elf.rel;
14966 else if (eadi->elf.rela.hdr &&
14967 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14968 input_reldata = &eadi->elf.rela;
14969 else
14970 abort ();
14971
14972 if (edit_list)
14973 {
14974 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14975 {
14976 arm_unwind_table_edit *edit_node, *edit_next;
14977 bfd_vma bias;
14978 bfd_vma reloc_index;
14979
14980 (*swap_in) (abfd, erela, irela);
14981 reloc_index = (irela->r_offset - offset) / 8;
14982
14983 bias = 0;
14984 edit_node = edit_list;
14985 for (edit_next = edit_list;
14986 edit_next && edit_next->index <= reloc_index;
14987 edit_next = edit_node->next)
14988 {
14989 bias++;
14990 edit_node = edit_next;
14991 }
14992
14993 if (edit_node->type != DELETE_EXIDX_ENTRY
14994 || edit_node->index != reloc_index)
14995 {
14996 irela->r_offset -= bias * 8;
14997 irela++;
14998 count++;
14999 }
15000
15001 erela += rel_hdr->sh_entsize;
15002 }
15003
15004 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15005 {
15006 /* New relocation entity. */
15007 asection *text_sec = edit_tail->linked_section;
15008 asection *text_out = text_sec->output_section;
15009 bfd_vma exidx_offset = offset + i->size - 8;
15010
15011 irela->r_addend = 0;
15012 irela->r_offset = exidx_offset;
15013 irela->r_info = ELF32_R_INFO
15014 (text_out->target_index, R_ARM_PREL31);
15015 irela++;
15016 count++;
15017 }
15018 }
15019 else
15020 {
15021 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15022 {
15023 (*swap_in) (abfd, erela, irela);
15024 erela += rel_hdr->sh_entsize;
15025 irela++;
15026 }
15027
15028 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15029 }
15030 }
15031 }
15032
15033 reldata->count = count;
15034 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15035
15036 erela = erela_head;
15037 irela = irela_head;
15038 while (count > 0)
15039 {
15040 (*swap_out) (abfd, irela, erela);
15041 erela += rel_hdr->sh_entsize;
15042 irela++;
15043 count--;
15044 }
15045
15046 free (irela_head);
15047
15048 /* Hashes are no longer valid. */
15049 free (reldata->hashes);
15050 reldata->hashes = NULL;
15051 }
15052
15053 /* Unwinding tables are not referenced directly. This pass marks them as
15054 required if the corresponding code section is marked. Similarly, ARMv8-M
15055 secure entry functions can only be referenced by SG veneers which are
15056 created after the GC process. They need to be marked in case they reside in
15057 their own section (as would be the case if code was compiled with
15058 -ffunction-sections). */
15059
15060 static bfd_boolean
15061 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15062 elf_gc_mark_hook_fn gc_mark_hook)
15063 {
15064 bfd *sub;
15065 Elf_Internal_Shdr **elf_shdrp;
15066 asection *cmse_sec;
15067 obj_attribute *out_attr;
15068 Elf_Internal_Shdr *symtab_hdr;
15069 unsigned i, sym_count, ext_start;
15070 const struct elf_backend_data *bed;
15071 struct elf_link_hash_entry **sym_hashes;
15072 struct elf32_arm_link_hash_entry *cmse_hash;
15073 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15074
15075 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15076
15077 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15078 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15079 && out_attr[Tag_CPU_arch_profile].i == 'M';
15080
15081 /* Marking EH data may cause additional code sections to be marked,
15082 requiring multiple passes. */
15083 again = TRUE;
15084 while (again)
15085 {
15086 again = FALSE;
15087 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15088 {
15089 asection *o;
15090
15091 if (! is_arm_elf (sub))
15092 continue;
15093
15094 elf_shdrp = elf_elfsections (sub);
15095 for (o = sub->sections; o != NULL; o = o->next)
15096 {
15097 Elf_Internal_Shdr *hdr;
15098
15099 hdr = &elf_section_data (o)->this_hdr;
15100 if (hdr->sh_type == SHT_ARM_EXIDX
15101 && hdr->sh_link
15102 && hdr->sh_link < elf_numsections (sub)
15103 && !o->gc_mark
15104 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15105 {
15106 again = TRUE;
15107 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15108 return FALSE;
15109 }
15110 }
15111
15112 /* Mark section holding ARMv8-M secure entry functions. We mark all
15113 of them so no need for a second browsing. */
15114 if (is_v8m && first_bfd_browse)
15115 {
15116 sym_hashes = elf_sym_hashes (sub);
15117 bed = get_elf_backend_data (sub);
15118 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15119 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15120 ext_start = symtab_hdr->sh_info;
15121
15122 /* Scan symbols. */
15123 for (i = ext_start; i < sym_count; i++)
15124 {
15125 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15126
15127 /* Assume it is a special symbol. If not, cmse_scan will
15128 warn about it and user can do something about it. */
15129 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15130 {
15131 cmse_sec = cmse_hash->root.root.u.def.section;
15132 if (!cmse_sec->gc_mark
15133 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15134 return FALSE;
15135 }
15136 }
15137 }
15138 }
15139 first_bfd_browse = FALSE;
15140 }
15141
15142 return TRUE;
15143 }
15144
15145 /* Treat mapping symbols as special target symbols. */
15146
15147 static bfd_boolean
15148 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15149 {
15150 return bfd_is_arm_special_symbol_name (sym->name,
15151 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15152 }
15153
15154 /* This is a copy of elf_find_function() from elf.c except that
15155 ARM mapping symbols are ignored when looking for function names
15156 and STT_ARM_TFUNC is considered to a function type. */
15157
15158 static bfd_boolean
15159 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15160 asymbol ** symbols,
15161 asection * section,
15162 bfd_vma offset,
15163 const char ** filename_ptr,
15164 const char ** functionname_ptr)
15165 {
15166 const char * filename = NULL;
15167 asymbol * func = NULL;
15168 bfd_vma low_func = 0;
15169 asymbol ** p;
15170
15171 for (p = symbols; *p != NULL; p++)
15172 {
15173 elf_symbol_type *q;
15174
15175 q = (elf_symbol_type *) *p;
15176
15177 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15178 {
15179 default:
15180 break;
15181 case STT_FILE:
15182 filename = bfd_asymbol_name (&q->symbol);
15183 break;
15184 case STT_FUNC:
15185 case STT_ARM_TFUNC:
15186 case STT_NOTYPE:
15187 /* Skip mapping symbols. */
15188 if ((q->symbol.flags & BSF_LOCAL)
15189 && bfd_is_arm_special_symbol_name (q->symbol.name,
15190 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15191 continue;
15192 /* Fall through. */
15193 if (bfd_get_section (&q->symbol) == section
15194 && q->symbol.value >= low_func
15195 && q->symbol.value <= offset)
15196 {
15197 func = (asymbol *) q;
15198 low_func = q->symbol.value;
15199 }
15200 break;
15201 }
15202 }
15203
15204 if (func == NULL)
15205 return FALSE;
15206
15207 if (filename_ptr)
15208 *filename_ptr = filename;
15209 if (functionname_ptr)
15210 *functionname_ptr = bfd_asymbol_name (func);
15211
15212 return TRUE;
15213 }
15214
15215
15216 /* Find the nearest line to a particular section and offset, for error
15217 reporting. This code is a duplicate of the code in elf.c, except
15218 that it uses arm_elf_find_function. */
15219
15220 static bfd_boolean
15221 elf32_arm_find_nearest_line (bfd * abfd,
15222 asymbol ** symbols,
15223 asection * section,
15224 bfd_vma offset,
15225 const char ** filename_ptr,
15226 const char ** functionname_ptr,
15227 unsigned int * line_ptr,
15228 unsigned int * discriminator_ptr)
15229 {
15230 bfd_boolean found = FALSE;
15231
15232 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15233 filename_ptr, functionname_ptr,
15234 line_ptr, discriminator_ptr,
15235 dwarf_debug_sections, 0,
15236 & elf_tdata (abfd)->dwarf2_find_line_info))
15237 {
15238 if (!*functionname_ptr)
15239 arm_elf_find_function (abfd, symbols, section, offset,
15240 *filename_ptr ? NULL : filename_ptr,
15241 functionname_ptr);
15242
15243 return TRUE;
15244 }
15245
15246 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15247 uses DWARF1. */
15248
15249 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15250 & found, filename_ptr,
15251 functionname_ptr, line_ptr,
15252 & elf_tdata (abfd)->line_info))
15253 return FALSE;
15254
15255 if (found && (*functionname_ptr || *line_ptr))
15256 return TRUE;
15257
15258 if (symbols == NULL)
15259 return FALSE;
15260
15261 if (! arm_elf_find_function (abfd, symbols, section, offset,
15262 filename_ptr, functionname_ptr))
15263 return FALSE;
15264
15265 *line_ptr = 0;
15266 return TRUE;
15267 }
15268
15269 static bfd_boolean
15270 elf32_arm_find_inliner_info (bfd * abfd,
15271 const char ** filename_ptr,
15272 const char ** functionname_ptr,
15273 unsigned int * line_ptr)
15274 {
15275 bfd_boolean found;
15276 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15277 functionname_ptr, line_ptr,
15278 & elf_tdata (abfd)->dwarf2_find_line_info);
15279 return found;
15280 }
15281
15282 /* Adjust a symbol defined by a dynamic object and referenced by a
15283 regular object. The current definition is in some section of the
15284 dynamic object, but we're not including those sections. We have to
15285 change the definition to something the rest of the link can
15286 understand. */
15287
15288 static bfd_boolean
15289 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15290 struct elf_link_hash_entry * h)
15291 {
15292 bfd * dynobj;
15293 asection *s, *srel;
15294 struct elf32_arm_link_hash_entry * eh;
15295 struct elf32_arm_link_hash_table *globals;
15296
15297 globals = elf32_arm_hash_table (info);
15298 if (globals == NULL)
15299 return FALSE;
15300
15301 dynobj = elf_hash_table (info)->dynobj;
15302
15303 /* Make sure we know what is going on here. */
15304 BFD_ASSERT (dynobj != NULL
15305 && (h->needs_plt
15306 || h->type == STT_GNU_IFUNC
15307 || h->u.weakdef != NULL
15308 || (h->def_dynamic
15309 && h->ref_regular
15310 && !h->def_regular)));
15311
15312 eh = (struct elf32_arm_link_hash_entry *) h;
15313
15314 /* If this is a function, put it in the procedure linkage table. We
15315 will fill in the contents of the procedure linkage table later,
15316 when we know the address of the .got section. */
15317 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15318 {
15319 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15320 symbol binds locally. */
15321 if (h->plt.refcount <= 0
15322 || (h->type != STT_GNU_IFUNC
15323 && (SYMBOL_CALLS_LOCAL (info, h)
15324 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15325 && h->root.type == bfd_link_hash_undefweak))))
15326 {
15327 /* This case can occur if we saw a PLT32 reloc in an input
15328 file, but the symbol was never referred to by a dynamic
15329 object, or if all references were garbage collected. In
15330 such a case, we don't actually need to build a procedure
15331 linkage table, and we can just do a PC24 reloc instead. */
15332 h->plt.offset = (bfd_vma) -1;
15333 eh->plt.thumb_refcount = 0;
15334 eh->plt.maybe_thumb_refcount = 0;
15335 eh->plt.noncall_refcount = 0;
15336 h->needs_plt = 0;
15337 }
15338
15339 return TRUE;
15340 }
15341 else
15342 {
15343 /* It's possible that we incorrectly decided a .plt reloc was
15344 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15345 in check_relocs. We can't decide accurately between function
15346 and non-function syms in check-relocs; Objects loaded later in
15347 the link may change h->type. So fix it now. */
15348 h->plt.offset = (bfd_vma) -1;
15349 eh->plt.thumb_refcount = 0;
15350 eh->plt.maybe_thumb_refcount = 0;
15351 eh->plt.noncall_refcount = 0;
15352 }
15353
15354 /* If this is a weak symbol, and there is a real definition, the
15355 processor independent code will have arranged for us to see the
15356 real definition first, and we can just use the same value. */
15357 if (h->u.weakdef != NULL)
15358 {
15359 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15360 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15361 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15362 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15363 return TRUE;
15364 }
15365
15366 /* If there are no non-GOT references, we do not need a copy
15367 relocation. */
15368 if (!h->non_got_ref)
15369 return TRUE;
15370
15371 /* This is a reference to a symbol defined by a dynamic object which
15372 is not a function. */
15373
15374 /* If we are creating a shared library, we must presume that the
15375 only references to the symbol are via the global offset table.
15376 For such cases we need not do anything here; the relocations will
15377 be handled correctly by relocate_section. Relocatable executables
15378 can reference data in shared objects directly, so we don't need to
15379 do anything here. */
15380 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15381 return TRUE;
15382
15383 /* We must allocate the symbol in our .dynbss section, which will
15384 become part of the .bss section of the executable. There will be
15385 an entry for this symbol in the .dynsym section. The dynamic
15386 object will contain position independent code, so all references
15387 from the dynamic object to this symbol will go through the global
15388 offset table. The dynamic linker will use the .dynsym entry to
15389 determine the address it must put in the global offset table, so
15390 both the dynamic object and the regular object will refer to the
15391 same memory location for the variable. */
15392 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15393 linker to copy the initial value out of the dynamic object and into
15394 the runtime process image. We need to remember the offset into the
15395 .rel(a).bss section we are going to use. */
15396 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
15397 {
15398 s = globals->root.sdynrelro;
15399 srel = globals->root.sreldynrelro;
15400 }
15401 else
15402 {
15403 s = globals->root.sdynbss;
15404 srel = globals->root.srelbss;
15405 }
15406 if (info->nocopyreloc == 0
15407 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15408 && h->size != 0)
15409 {
15410 elf32_arm_allocate_dynrelocs (info, srel, 1);
15411 h->needs_copy = 1;
15412 }
15413
15414 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15415 }
15416
15417 /* Allocate space in .plt, .got and associated reloc sections for
15418 dynamic relocs. */
15419
15420 static bfd_boolean
15421 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15422 {
15423 struct bfd_link_info *info;
15424 struct elf32_arm_link_hash_table *htab;
15425 struct elf32_arm_link_hash_entry *eh;
15426 struct elf_dyn_relocs *p;
15427
15428 if (h->root.type == bfd_link_hash_indirect)
15429 return TRUE;
15430
15431 eh = (struct elf32_arm_link_hash_entry *) h;
15432
15433 info = (struct bfd_link_info *) inf;
15434 htab = elf32_arm_hash_table (info);
15435 if (htab == NULL)
15436 return FALSE;
15437
15438 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15439 && h->plt.refcount > 0)
15440 {
15441 /* Make sure this symbol is output as a dynamic symbol.
15442 Undefined weak syms won't yet be marked as dynamic. */
15443 if (h->dynindx == -1
15444 && !h->forced_local)
15445 {
15446 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15447 return FALSE;
15448 }
15449
15450 /* If the call in the PLT entry binds locally, the associated
15451 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15452 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15453 than the .plt section. */
15454 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15455 {
15456 eh->is_iplt = 1;
15457 if (eh->plt.noncall_refcount == 0
15458 && SYMBOL_REFERENCES_LOCAL (info, h))
15459 /* All non-call references can be resolved directly.
15460 This means that they can (and in some cases, must)
15461 resolve directly to the run-time target, rather than
15462 to the PLT. That in turns means that any .got entry
15463 would be equal to the .igot.plt entry, so there's
15464 no point having both. */
15465 h->got.refcount = 0;
15466 }
15467
15468 if (bfd_link_pic (info)
15469 || eh->is_iplt
15470 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15471 {
15472 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15473
15474 /* If this symbol is not defined in a regular file, and we are
15475 not generating a shared library, then set the symbol to this
15476 location in the .plt. This is required to make function
15477 pointers compare as equal between the normal executable and
15478 the shared library. */
15479 if (! bfd_link_pic (info)
15480 && !h->def_regular)
15481 {
15482 h->root.u.def.section = htab->root.splt;
15483 h->root.u.def.value = h->plt.offset;
15484
15485 /* Make sure the function is not marked as Thumb, in case
15486 it is the target of an ABS32 relocation, which will
15487 point to the PLT entry. */
15488 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15489 }
15490
15491 /* VxWorks executables have a second set of relocations for
15492 each PLT entry. They go in a separate relocation section,
15493 which is processed by the kernel loader. */
15494 if (htab->vxworks_p && !bfd_link_pic (info))
15495 {
15496 /* There is a relocation for the initial PLT entry:
15497 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15498 if (h->plt.offset == htab->plt_header_size)
15499 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15500
15501 /* There are two extra relocations for each subsequent
15502 PLT entry: an R_ARM_32 relocation for the GOT entry,
15503 and an R_ARM_32 relocation for the PLT entry. */
15504 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15505 }
15506 }
15507 else
15508 {
15509 h->plt.offset = (bfd_vma) -1;
15510 h->needs_plt = 0;
15511 }
15512 }
15513 else
15514 {
15515 h->plt.offset = (bfd_vma) -1;
15516 h->needs_plt = 0;
15517 }
15518
15519 eh = (struct elf32_arm_link_hash_entry *) h;
15520 eh->tlsdesc_got = (bfd_vma) -1;
15521
15522 if (h->got.refcount > 0)
15523 {
15524 asection *s;
15525 bfd_boolean dyn;
15526 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15527 int indx;
15528
15529 /* Make sure this symbol is output as a dynamic symbol.
15530 Undefined weak syms won't yet be marked as dynamic. */
15531 if (h->dynindx == -1
15532 && !h->forced_local)
15533 {
15534 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15535 return FALSE;
15536 }
15537
15538 if (!htab->symbian_p)
15539 {
15540 s = htab->root.sgot;
15541 h->got.offset = s->size;
15542
15543 if (tls_type == GOT_UNKNOWN)
15544 abort ();
15545
15546 if (tls_type == GOT_NORMAL)
15547 /* Non-TLS symbols need one GOT slot. */
15548 s->size += 4;
15549 else
15550 {
15551 if (tls_type & GOT_TLS_GDESC)
15552 {
15553 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15554 eh->tlsdesc_got
15555 = (htab->root.sgotplt->size
15556 - elf32_arm_compute_jump_table_size (htab));
15557 htab->root.sgotplt->size += 8;
15558 h->got.offset = (bfd_vma) -2;
15559 /* plt.got_offset needs to know there's a TLS_DESC
15560 reloc in the middle of .got.plt. */
15561 htab->num_tls_desc++;
15562 }
15563
15564 if (tls_type & GOT_TLS_GD)
15565 {
15566 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15567 the symbol is both GD and GDESC, got.offset may
15568 have been overwritten. */
15569 h->got.offset = s->size;
15570 s->size += 8;
15571 }
15572
15573 if (tls_type & GOT_TLS_IE)
15574 /* R_ARM_TLS_IE32 needs one GOT slot. */
15575 s->size += 4;
15576 }
15577
15578 dyn = htab->root.dynamic_sections_created;
15579
15580 indx = 0;
15581 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15582 bfd_link_pic (info),
15583 h)
15584 && (!bfd_link_pic (info)
15585 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15586 indx = h->dynindx;
15587
15588 if (tls_type != GOT_NORMAL
15589 && (bfd_link_pic (info) || indx != 0)
15590 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15591 || h->root.type != bfd_link_hash_undefweak))
15592 {
15593 if (tls_type & GOT_TLS_IE)
15594 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15595
15596 if (tls_type & GOT_TLS_GD)
15597 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15598
15599 if (tls_type & GOT_TLS_GDESC)
15600 {
15601 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15602 /* GDESC needs a trampoline to jump to. */
15603 htab->tls_trampoline = -1;
15604 }
15605
15606 /* Only GD needs it. GDESC just emits one relocation per
15607 2 entries. */
15608 if ((tls_type & GOT_TLS_GD) && indx != 0)
15609 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15610 }
15611 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15612 {
15613 if (htab->root.dynamic_sections_created)
15614 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15615 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15616 }
15617 else if (h->type == STT_GNU_IFUNC
15618 && eh->plt.noncall_refcount == 0)
15619 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15620 they all resolve dynamically instead. Reserve room for the
15621 GOT entry's R_ARM_IRELATIVE relocation. */
15622 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15623 else if (bfd_link_pic (info)
15624 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15625 || h->root.type != bfd_link_hash_undefweak))
15626 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15627 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15628 }
15629 }
15630 else
15631 h->got.offset = (bfd_vma) -1;
15632
15633 /* Allocate stubs for exported Thumb functions on v4t. */
15634 if (!htab->use_blx && h->dynindx != -1
15635 && h->def_regular
15636 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15637 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15638 {
15639 struct elf_link_hash_entry * th;
15640 struct bfd_link_hash_entry * bh;
15641 struct elf_link_hash_entry * myh;
15642 char name[1024];
15643 asection *s;
15644 bh = NULL;
15645 /* Create a new symbol to regist the real location of the function. */
15646 s = h->root.u.def.section;
15647 sprintf (name, "__real_%s", h->root.root.string);
15648 _bfd_generic_link_add_one_symbol (info, s->owner,
15649 name, BSF_GLOBAL, s,
15650 h->root.u.def.value,
15651 NULL, TRUE, FALSE, &bh);
15652
15653 myh = (struct elf_link_hash_entry *) bh;
15654 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15655 myh->forced_local = 1;
15656 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15657 eh->export_glue = myh;
15658 th = record_arm_to_thumb_glue (info, h);
15659 /* Point the symbol at the stub. */
15660 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15661 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15662 h->root.u.def.section = th->root.u.def.section;
15663 h->root.u.def.value = th->root.u.def.value & ~1;
15664 }
15665
15666 if (eh->dyn_relocs == NULL)
15667 return TRUE;
15668
15669 /* In the shared -Bsymbolic case, discard space allocated for
15670 dynamic pc-relative relocs against symbols which turn out to be
15671 defined in regular objects. For the normal shared case, discard
15672 space for pc-relative relocs that have become local due to symbol
15673 visibility changes. */
15674
15675 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15676 {
15677 /* Relocs that use pc_count are PC-relative forms, which will appear
15678 on something like ".long foo - ." or "movw REG, foo - .". We want
15679 calls to protected symbols to resolve directly to the function
15680 rather than going via the plt. If people want function pointer
15681 comparisons to work as expected then they should avoid writing
15682 assembly like ".long foo - .". */
15683 if (SYMBOL_CALLS_LOCAL (info, h))
15684 {
15685 struct elf_dyn_relocs **pp;
15686
15687 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15688 {
15689 p->count -= p->pc_count;
15690 p->pc_count = 0;
15691 if (p->count == 0)
15692 *pp = p->next;
15693 else
15694 pp = &p->next;
15695 }
15696 }
15697
15698 if (htab->vxworks_p)
15699 {
15700 struct elf_dyn_relocs **pp;
15701
15702 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15703 {
15704 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15705 *pp = p->next;
15706 else
15707 pp = &p->next;
15708 }
15709 }
15710
15711 /* Also discard relocs on undefined weak syms with non-default
15712 visibility. */
15713 if (eh->dyn_relocs != NULL
15714 && h->root.type == bfd_link_hash_undefweak)
15715 {
15716 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15717 eh->dyn_relocs = NULL;
15718
15719 /* Make sure undefined weak symbols are output as a dynamic
15720 symbol in PIEs. */
15721 else if (h->dynindx == -1
15722 && !h->forced_local)
15723 {
15724 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15725 return FALSE;
15726 }
15727 }
15728
15729 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15730 && h->root.type == bfd_link_hash_new)
15731 {
15732 /* Output absolute symbols so that we can create relocations
15733 against them. For normal symbols we output a relocation
15734 against the section that contains them. */
15735 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15736 return FALSE;
15737 }
15738
15739 }
15740 else
15741 {
15742 /* For the non-shared case, discard space for relocs against
15743 symbols which turn out to need copy relocs or are not
15744 dynamic. */
15745
15746 if (!h->non_got_ref
15747 && ((h->def_dynamic
15748 && !h->def_regular)
15749 || (htab->root.dynamic_sections_created
15750 && (h->root.type == bfd_link_hash_undefweak
15751 || h->root.type == bfd_link_hash_undefined))))
15752 {
15753 /* Make sure this symbol is output as a dynamic symbol.
15754 Undefined weak syms won't yet be marked as dynamic. */
15755 if (h->dynindx == -1
15756 && !h->forced_local)
15757 {
15758 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15759 return FALSE;
15760 }
15761
15762 /* If that succeeded, we know we'll be keeping all the
15763 relocs. */
15764 if (h->dynindx != -1)
15765 goto keep;
15766 }
15767
15768 eh->dyn_relocs = NULL;
15769
15770 keep: ;
15771 }
15772
15773 /* Finally, allocate space. */
15774 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15775 {
15776 asection *sreloc = elf_section_data (p->sec)->sreloc;
15777 if (h->type == STT_GNU_IFUNC
15778 && eh->plt.noncall_refcount == 0
15779 && SYMBOL_REFERENCES_LOCAL (info, h))
15780 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15781 else
15782 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15783 }
15784
15785 return TRUE;
15786 }
15787
15788 /* Find any dynamic relocs that apply to read-only sections. */
15789
15790 static bfd_boolean
15791 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15792 {
15793 struct elf32_arm_link_hash_entry * eh;
15794 struct elf_dyn_relocs * p;
15795
15796 eh = (struct elf32_arm_link_hash_entry *) h;
15797 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15798 {
15799 asection *s = p->sec;
15800
15801 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15802 {
15803 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15804
15805 info->flags |= DF_TEXTREL;
15806
15807 /* Not an error, just cut short the traversal. */
15808 return FALSE;
15809 }
15810 }
15811 return TRUE;
15812 }
15813
15814 void
15815 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15816 int byteswap_code)
15817 {
15818 struct elf32_arm_link_hash_table *globals;
15819
15820 globals = elf32_arm_hash_table (info);
15821 if (globals == NULL)
15822 return;
15823
15824 globals->byteswap_code = byteswap_code;
15825 }
15826
15827 /* Set the sizes of the dynamic sections. */
15828
15829 static bfd_boolean
15830 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15831 struct bfd_link_info * info)
15832 {
15833 bfd * dynobj;
15834 asection * s;
15835 bfd_boolean plt;
15836 bfd_boolean relocs;
15837 bfd *ibfd;
15838 struct elf32_arm_link_hash_table *htab;
15839
15840 htab = elf32_arm_hash_table (info);
15841 if (htab == NULL)
15842 return FALSE;
15843
15844 dynobj = elf_hash_table (info)->dynobj;
15845 BFD_ASSERT (dynobj != NULL);
15846 check_use_blx (htab);
15847
15848 if (elf_hash_table (info)->dynamic_sections_created)
15849 {
15850 /* Set the contents of the .interp section to the interpreter. */
15851 if (bfd_link_executable (info) && !info->nointerp)
15852 {
15853 s = bfd_get_linker_section (dynobj, ".interp");
15854 BFD_ASSERT (s != NULL);
15855 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15856 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15857 }
15858 }
15859
15860 /* Set up .got offsets for local syms, and space for local dynamic
15861 relocs. */
15862 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15863 {
15864 bfd_signed_vma *local_got;
15865 bfd_signed_vma *end_local_got;
15866 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15867 char *local_tls_type;
15868 bfd_vma *local_tlsdesc_gotent;
15869 bfd_size_type locsymcount;
15870 Elf_Internal_Shdr *symtab_hdr;
15871 asection *srel;
15872 bfd_boolean is_vxworks = htab->vxworks_p;
15873 unsigned int symndx;
15874
15875 if (! is_arm_elf (ibfd))
15876 continue;
15877
15878 for (s = ibfd->sections; s != NULL; s = s->next)
15879 {
15880 struct elf_dyn_relocs *p;
15881
15882 for (p = (struct elf_dyn_relocs *)
15883 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15884 {
15885 if (!bfd_is_abs_section (p->sec)
15886 && bfd_is_abs_section (p->sec->output_section))
15887 {
15888 /* Input section has been discarded, either because
15889 it is a copy of a linkonce section or due to
15890 linker script /DISCARD/, so we'll be discarding
15891 the relocs too. */
15892 }
15893 else if (is_vxworks
15894 && strcmp (p->sec->output_section->name,
15895 ".tls_vars") == 0)
15896 {
15897 /* Relocations in vxworks .tls_vars sections are
15898 handled specially by the loader. */
15899 }
15900 else if (p->count != 0)
15901 {
15902 srel = elf_section_data (p->sec)->sreloc;
15903 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15904 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15905 info->flags |= DF_TEXTREL;
15906 }
15907 }
15908 }
15909
15910 local_got = elf_local_got_refcounts (ibfd);
15911 if (!local_got)
15912 continue;
15913
15914 symtab_hdr = & elf_symtab_hdr (ibfd);
15915 locsymcount = symtab_hdr->sh_info;
15916 end_local_got = local_got + locsymcount;
15917 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15918 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15919 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15920 symndx = 0;
15921 s = htab->root.sgot;
15922 srel = htab->root.srelgot;
15923 for (; local_got < end_local_got;
15924 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15925 ++local_tlsdesc_gotent, ++symndx)
15926 {
15927 *local_tlsdesc_gotent = (bfd_vma) -1;
15928 local_iplt = *local_iplt_ptr;
15929 if (local_iplt != NULL)
15930 {
15931 struct elf_dyn_relocs *p;
15932
15933 if (local_iplt->root.refcount > 0)
15934 {
15935 elf32_arm_allocate_plt_entry (info, TRUE,
15936 &local_iplt->root,
15937 &local_iplt->arm);
15938 if (local_iplt->arm.noncall_refcount == 0)
15939 /* All references to the PLT are calls, so all
15940 non-call references can resolve directly to the
15941 run-time target. This means that the .got entry
15942 would be the same as the .igot.plt entry, so there's
15943 no point creating both. */
15944 *local_got = 0;
15945 }
15946 else
15947 {
15948 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15949 local_iplt->root.offset = (bfd_vma) -1;
15950 }
15951
15952 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15953 {
15954 asection *psrel;
15955
15956 psrel = elf_section_data (p->sec)->sreloc;
15957 if (local_iplt->arm.noncall_refcount == 0)
15958 elf32_arm_allocate_irelocs (info, psrel, p->count);
15959 else
15960 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15961 }
15962 }
15963 if (*local_got > 0)
15964 {
15965 Elf_Internal_Sym *isym;
15966
15967 *local_got = s->size;
15968 if (*local_tls_type & GOT_TLS_GD)
15969 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15970 s->size += 8;
15971 if (*local_tls_type & GOT_TLS_GDESC)
15972 {
15973 *local_tlsdesc_gotent = htab->root.sgotplt->size
15974 - elf32_arm_compute_jump_table_size (htab);
15975 htab->root.sgotplt->size += 8;
15976 *local_got = (bfd_vma) -2;
15977 /* plt.got_offset needs to know there's a TLS_DESC
15978 reloc in the middle of .got.plt. */
15979 htab->num_tls_desc++;
15980 }
15981 if (*local_tls_type & GOT_TLS_IE)
15982 s->size += 4;
15983
15984 if (*local_tls_type & GOT_NORMAL)
15985 {
15986 /* If the symbol is both GD and GDESC, *local_got
15987 may have been overwritten. */
15988 *local_got = s->size;
15989 s->size += 4;
15990 }
15991
15992 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15993 if (isym == NULL)
15994 return FALSE;
15995
15996 /* If all references to an STT_GNU_IFUNC PLT are calls,
15997 then all non-call references, including this GOT entry,
15998 resolve directly to the run-time target. */
15999 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16000 && (local_iplt == NULL
16001 || local_iplt->arm.noncall_refcount == 0))
16002 elf32_arm_allocate_irelocs (info, srel, 1);
16003 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
16004 {
16005 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
16006 || *local_tls_type & GOT_TLS_GD)
16007 elf32_arm_allocate_dynrelocs (info, srel, 1);
16008
16009 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
16010 {
16011 elf32_arm_allocate_dynrelocs (info,
16012 htab->root.srelplt, 1);
16013 htab->tls_trampoline = -1;
16014 }
16015 }
16016 }
16017 else
16018 *local_got = (bfd_vma) -1;
16019 }
16020 }
16021
16022 if (htab->tls_ldm_got.refcount > 0)
16023 {
16024 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16025 for R_ARM_TLS_LDM32 relocations. */
16026 htab->tls_ldm_got.offset = htab->root.sgot->size;
16027 htab->root.sgot->size += 8;
16028 if (bfd_link_pic (info))
16029 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16030 }
16031 else
16032 htab->tls_ldm_got.offset = -1;
16033
16034 /* Allocate global sym .plt and .got entries, and space for global
16035 sym dynamic relocs. */
16036 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16037
16038 /* Here we rummage through the found bfds to collect glue information. */
16039 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16040 {
16041 if (! is_arm_elf (ibfd))
16042 continue;
16043
16044 /* Initialise mapping tables for code/data. */
16045 bfd_elf32_arm_init_maps (ibfd);
16046
16047 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16048 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16049 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16050 _bfd_error_handler (_("Errors encountered processing file %B"), ibfd);
16051 }
16052
16053 /* Allocate space for the glue sections now that we've sized them. */
16054 bfd_elf32_arm_allocate_interworking_sections (info);
16055
16056 /* For every jump slot reserved in the sgotplt, reloc_count is
16057 incremented. However, when we reserve space for TLS descriptors,
16058 it's not incremented, so in order to compute the space reserved
16059 for them, it suffices to multiply the reloc count by the jump
16060 slot size. */
16061 if (htab->root.srelplt)
16062 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16063
16064 if (htab->tls_trampoline)
16065 {
16066 if (htab->root.splt->size == 0)
16067 htab->root.splt->size += htab->plt_header_size;
16068
16069 htab->tls_trampoline = htab->root.splt->size;
16070 htab->root.splt->size += htab->plt_entry_size;
16071
16072 /* If we're not using lazy TLS relocations, don't generate the
16073 PLT and GOT entries they require. */
16074 if (!(info->flags & DF_BIND_NOW))
16075 {
16076 htab->dt_tlsdesc_got = htab->root.sgot->size;
16077 htab->root.sgot->size += 4;
16078
16079 htab->dt_tlsdesc_plt = htab->root.splt->size;
16080 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16081 }
16082 }
16083
16084 /* The check_relocs and adjust_dynamic_symbol entry points have
16085 determined the sizes of the various dynamic sections. Allocate
16086 memory for them. */
16087 plt = FALSE;
16088 relocs = FALSE;
16089 for (s = dynobj->sections; s != NULL; s = s->next)
16090 {
16091 const char * name;
16092
16093 if ((s->flags & SEC_LINKER_CREATED) == 0)
16094 continue;
16095
16096 /* It's OK to base decisions on the section name, because none
16097 of the dynobj section names depend upon the input files. */
16098 name = bfd_get_section_name (dynobj, s);
16099
16100 if (s == htab->root.splt)
16101 {
16102 /* Remember whether there is a PLT. */
16103 plt = s->size != 0;
16104 }
16105 else if (CONST_STRNEQ (name, ".rel"))
16106 {
16107 if (s->size != 0)
16108 {
16109 /* Remember whether there are any reloc sections other
16110 than .rel(a).plt and .rela.plt.unloaded. */
16111 if (s != htab->root.srelplt && s != htab->srelplt2)
16112 relocs = TRUE;
16113
16114 /* We use the reloc_count field as a counter if we need
16115 to copy relocs into the output file. */
16116 s->reloc_count = 0;
16117 }
16118 }
16119 else if (s != htab->root.sgot
16120 && s != htab->root.sgotplt
16121 && s != htab->root.iplt
16122 && s != htab->root.igotplt
16123 && s != htab->root.sdynbss
16124 && s != htab->root.sdynrelro)
16125 {
16126 /* It's not one of our sections, so don't allocate space. */
16127 continue;
16128 }
16129
16130 if (s->size == 0)
16131 {
16132 /* If we don't need this section, strip it from the
16133 output file. This is mostly to handle .rel(a).bss and
16134 .rel(a).plt. We must create both sections in
16135 create_dynamic_sections, because they must be created
16136 before the linker maps input sections to output
16137 sections. The linker does that before
16138 adjust_dynamic_symbol is called, and it is that
16139 function which decides whether anything needs to go
16140 into these sections. */
16141 s->flags |= SEC_EXCLUDE;
16142 continue;
16143 }
16144
16145 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16146 continue;
16147
16148 /* Allocate memory for the section contents. */
16149 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16150 if (s->contents == NULL)
16151 return FALSE;
16152 }
16153
16154 if (elf_hash_table (info)->dynamic_sections_created)
16155 {
16156 /* Add some entries to the .dynamic section. We fill in the
16157 values later, in elf32_arm_finish_dynamic_sections, but we
16158 must add the entries now so that we get the correct size for
16159 the .dynamic section. The DT_DEBUG entry is filled in by the
16160 dynamic linker and used by the debugger. */
16161 #define add_dynamic_entry(TAG, VAL) \
16162 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16163
16164 if (bfd_link_executable (info))
16165 {
16166 if (!add_dynamic_entry (DT_DEBUG, 0))
16167 return FALSE;
16168 }
16169
16170 if (plt)
16171 {
16172 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16173 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16174 || !add_dynamic_entry (DT_PLTREL,
16175 htab->use_rel ? DT_REL : DT_RELA)
16176 || !add_dynamic_entry (DT_JMPREL, 0))
16177 return FALSE;
16178
16179 if (htab->dt_tlsdesc_plt
16180 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16181 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16182 return FALSE;
16183 }
16184
16185 if (relocs)
16186 {
16187 if (htab->use_rel)
16188 {
16189 if (!add_dynamic_entry (DT_REL, 0)
16190 || !add_dynamic_entry (DT_RELSZ, 0)
16191 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16192 return FALSE;
16193 }
16194 else
16195 {
16196 if (!add_dynamic_entry (DT_RELA, 0)
16197 || !add_dynamic_entry (DT_RELASZ, 0)
16198 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16199 return FALSE;
16200 }
16201 }
16202
16203 /* If any dynamic relocs apply to a read-only section,
16204 then we need a DT_TEXTREL entry. */
16205 if ((info->flags & DF_TEXTREL) == 0)
16206 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
16207 info);
16208
16209 if ((info->flags & DF_TEXTREL) != 0)
16210 {
16211 if (!add_dynamic_entry (DT_TEXTREL, 0))
16212 return FALSE;
16213 }
16214 if (htab->vxworks_p
16215 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16216 return FALSE;
16217 }
16218 #undef add_dynamic_entry
16219
16220 return TRUE;
16221 }
16222
16223 /* Size sections even though they're not dynamic. We use it to setup
16224 _TLS_MODULE_BASE_, if needed. */
16225
16226 static bfd_boolean
16227 elf32_arm_always_size_sections (bfd *output_bfd,
16228 struct bfd_link_info *info)
16229 {
16230 asection *tls_sec;
16231
16232 if (bfd_link_relocatable (info))
16233 return TRUE;
16234
16235 tls_sec = elf_hash_table (info)->tls_sec;
16236
16237 if (tls_sec)
16238 {
16239 struct elf_link_hash_entry *tlsbase;
16240
16241 tlsbase = elf_link_hash_lookup
16242 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16243
16244 if (tlsbase)
16245 {
16246 struct bfd_link_hash_entry *bh = NULL;
16247 const struct elf_backend_data *bed
16248 = get_elf_backend_data (output_bfd);
16249
16250 if (!(_bfd_generic_link_add_one_symbol
16251 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16252 tls_sec, 0, NULL, FALSE,
16253 bed->collect, &bh)))
16254 return FALSE;
16255
16256 tlsbase->type = STT_TLS;
16257 tlsbase = (struct elf_link_hash_entry *)bh;
16258 tlsbase->def_regular = 1;
16259 tlsbase->other = STV_HIDDEN;
16260 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16261 }
16262 }
16263 return TRUE;
16264 }
16265
16266 /* Finish up dynamic symbol handling. We set the contents of various
16267 dynamic sections here. */
16268
16269 static bfd_boolean
16270 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16271 struct bfd_link_info * info,
16272 struct elf_link_hash_entry * h,
16273 Elf_Internal_Sym * sym)
16274 {
16275 struct elf32_arm_link_hash_table *htab;
16276 struct elf32_arm_link_hash_entry *eh;
16277
16278 htab = elf32_arm_hash_table (info);
16279 if (htab == NULL)
16280 return FALSE;
16281
16282 eh = (struct elf32_arm_link_hash_entry *) h;
16283
16284 if (h->plt.offset != (bfd_vma) -1)
16285 {
16286 if (!eh->is_iplt)
16287 {
16288 BFD_ASSERT (h->dynindx != -1);
16289 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16290 h->dynindx, 0))
16291 return FALSE;
16292 }
16293
16294 if (!h->def_regular)
16295 {
16296 /* Mark the symbol as undefined, rather than as defined in
16297 the .plt section. */
16298 sym->st_shndx = SHN_UNDEF;
16299 /* If the symbol is weak we need to clear the value.
16300 Otherwise, the PLT entry would provide a definition for
16301 the symbol even if the symbol wasn't defined anywhere,
16302 and so the symbol would never be NULL. Leave the value if
16303 there were any relocations where pointer equality matters
16304 (this is a clue for the dynamic linker, to make function
16305 pointer comparisons work between an application and shared
16306 library). */
16307 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16308 sym->st_value = 0;
16309 }
16310 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16311 {
16312 /* At least one non-call relocation references this .iplt entry,
16313 so the .iplt entry is the function's canonical address. */
16314 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16315 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16316 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16317 (output_bfd, htab->root.iplt->output_section));
16318 sym->st_value = (h->plt.offset
16319 + htab->root.iplt->output_section->vma
16320 + htab->root.iplt->output_offset);
16321 }
16322 }
16323
16324 if (h->needs_copy)
16325 {
16326 asection * s;
16327 Elf_Internal_Rela rel;
16328
16329 /* This symbol needs a copy reloc. Set it up. */
16330 BFD_ASSERT (h->dynindx != -1
16331 && (h->root.type == bfd_link_hash_defined
16332 || h->root.type == bfd_link_hash_defweak));
16333
16334 rel.r_addend = 0;
16335 rel.r_offset = (h->root.u.def.value
16336 + h->root.u.def.section->output_section->vma
16337 + h->root.u.def.section->output_offset);
16338 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16339 if (h->root.u.def.section == htab->root.sdynrelro)
16340 s = htab->root.sreldynrelro;
16341 else
16342 s = htab->root.srelbss;
16343 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16344 }
16345
16346 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16347 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16348 to the ".got" section. */
16349 if (h == htab->root.hdynamic
16350 || (!htab->vxworks_p && h == htab->root.hgot))
16351 sym->st_shndx = SHN_ABS;
16352
16353 return TRUE;
16354 }
16355
16356 static void
16357 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16358 void *contents,
16359 const unsigned long *template, unsigned count)
16360 {
16361 unsigned ix;
16362
16363 for (ix = 0; ix != count; ix++)
16364 {
16365 unsigned long insn = template[ix];
16366
16367 /* Emit mov pc,rx if bx is not permitted. */
16368 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16369 insn = (insn & 0xf000000f) | 0x01a0f000;
16370 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16371 }
16372 }
16373
16374 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16375 other variants, NaCl needs this entry in a static executable's
16376 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16377 zero. For .iplt really only the last bundle is useful, and .iplt
16378 could have a shorter first entry, with each individual PLT entry's
16379 relative branch calculated differently so it targets the last
16380 bundle instead of the instruction before it (labelled .Lplt_tail
16381 above). But it's simpler to keep the size and layout of PLT0
16382 consistent with the dynamic case, at the cost of some dead code at
16383 the start of .iplt and the one dead store to the stack at the start
16384 of .Lplt_tail. */
16385 static void
16386 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16387 asection *plt, bfd_vma got_displacement)
16388 {
16389 unsigned int i;
16390
16391 put_arm_insn (htab, output_bfd,
16392 elf32_arm_nacl_plt0_entry[0]
16393 | arm_movw_immediate (got_displacement),
16394 plt->contents + 0);
16395 put_arm_insn (htab, output_bfd,
16396 elf32_arm_nacl_plt0_entry[1]
16397 | arm_movt_immediate (got_displacement),
16398 plt->contents + 4);
16399
16400 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16401 put_arm_insn (htab, output_bfd,
16402 elf32_arm_nacl_plt0_entry[i],
16403 plt->contents + (i * 4));
16404 }
16405
16406 /* Finish up the dynamic sections. */
16407
16408 static bfd_boolean
16409 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16410 {
16411 bfd * dynobj;
16412 asection * sgot;
16413 asection * sdyn;
16414 struct elf32_arm_link_hash_table *htab;
16415
16416 htab = elf32_arm_hash_table (info);
16417 if (htab == NULL)
16418 return FALSE;
16419
16420 dynobj = elf_hash_table (info)->dynobj;
16421
16422 sgot = htab->root.sgotplt;
16423 /* A broken linker script might have discarded the dynamic sections.
16424 Catch this here so that we do not seg-fault later on. */
16425 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16426 return FALSE;
16427 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16428
16429 if (elf_hash_table (info)->dynamic_sections_created)
16430 {
16431 asection *splt;
16432 Elf32_External_Dyn *dyncon, *dynconend;
16433
16434 splt = htab->root.splt;
16435 BFD_ASSERT (splt != NULL && sdyn != NULL);
16436 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16437
16438 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16439 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16440
16441 for (; dyncon < dynconend; dyncon++)
16442 {
16443 Elf_Internal_Dyn dyn;
16444 const char * name;
16445 asection * s;
16446
16447 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16448
16449 switch (dyn.d_tag)
16450 {
16451 unsigned int type;
16452
16453 default:
16454 if (htab->vxworks_p
16455 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16456 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16457 break;
16458
16459 case DT_HASH:
16460 name = ".hash";
16461 goto get_vma_if_bpabi;
16462 case DT_STRTAB:
16463 name = ".dynstr";
16464 goto get_vma_if_bpabi;
16465 case DT_SYMTAB:
16466 name = ".dynsym";
16467 goto get_vma_if_bpabi;
16468 case DT_VERSYM:
16469 name = ".gnu.version";
16470 goto get_vma_if_bpabi;
16471 case DT_VERDEF:
16472 name = ".gnu.version_d";
16473 goto get_vma_if_bpabi;
16474 case DT_VERNEED:
16475 name = ".gnu.version_r";
16476 goto get_vma_if_bpabi;
16477
16478 case DT_PLTGOT:
16479 name = htab->symbian_p ? ".got" : ".got.plt";
16480 goto get_vma;
16481 case DT_JMPREL:
16482 name = RELOC_SECTION (htab, ".plt");
16483 get_vma:
16484 s = bfd_get_linker_section (dynobj, name);
16485 if (s == NULL)
16486 {
16487 _bfd_error_handler
16488 (_("could not find section %s"), name);
16489 bfd_set_error (bfd_error_invalid_operation);
16490 return FALSE;
16491 }
16492 if (!htab->symbian_p)
16493 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16494 else
16495 /* In the BPABI, tags in the PT_DYNAMIC section point
16496 at the file offset, not the memory address, for the
16497 convenience of the post linker. */
16498 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16499 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16500 break;
16501
16502 get_vma_if_bpabi:
16503 if (htab->symbian_p)
16504 goto get_vma;
16505 break;
16506
16507 case DT_PLTRELSZ:
16508 s = htab->root.srelplt;
16509 BFD_ASSERT (s != NULL);
16510 dyn.d_un.d_val = s->size;
16511 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16512 break;
16513
16514 case DT_RELSZ:
16515 case DT_RELASZ:
16516 case DT_REL:
16517 case DT_RELA:
16518 /* In the BPABI, the DT_REL tag must point at the file
16519 offset, not the VMA, of the first relocation
16520 section. So, we use code similar to that in
16521 elflink.c, but do not check for SHF_ALLOC on the
16522 relocation section, since relocation sections are
16523 never allocated under the BPABI. PLT relocs are also
16524 included. */
16525 if (htab->symbian_p)
16526 {
16527 unsigned int i;
16528 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16529 ? SHT_REL : SHT_RELA);
16530 dyn.d_un.d_val = 0;
16531 for (i = 1; i < elf_numsections (output_bfd); i++)
16532 {
16533 Elf_Internal_Shdr *hdr
16534 = elf_elfsections (output_bfd)[i];
16535 if (hdr->sh_type == type)
16536 {
16537 if (dyn.d_tag == DT_RELSZ
16538 || dyn.d_tag == DT_RELASZ)
16539 dyn.d_un.d_val += hdr->sh_size;
16540 else if ((ufile_ptr) hdr->sh_offset
16541 <= dyn.d_un.d_val - 1)
16542 dyn.d_un.d_val = hdr->sh_offset;
16543 }
16544 }
16545 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16546 }
16547 break;
16548
16549 case DT_TLSDESC_PLT:
16550 s = htab->root.splt;
16551 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16552 + htab->dt_tlsdesc_plt);
16553 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16554 break;
16555
16556 case DT_TLSDESC_GOT:
16557 s = htab->root.sgot;
16558 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16559 + htab->dt_tlsdesc_got);
16560 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16561 break;
16562
16563 /* Set the bottom bit of DT_INIT/FINI if the
16564 corresponding function is Thumb. */
16565 case DT_INIT:
16566 name = info->init_function;
16567 goto get_sym;
16568 case DT_FINI:
16569 name = info->fini_function;
16570 get_sym:
16571 /* If it wasn't set by elf_bfd_final_link
16572 then there is nothing to adjust. */
16573 if (dyn.d_un.d_val != 0)
16574 {
16575 struct elf_link_hash_entry * eh;
16576
16577 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16578 FALSE, FALSE, TRUE);
16579 if (eh != NULL
16580 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16581 == ST_BRANCH_TO_THUMB)
16582 {
16583 dyn.d_un.d_val |= 1;
16584 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16585 }
16586 }
16587 break;
16588 }
16589 }
16590
16591 /* Fill in the first entry in the procedure linkage table. */
16592 if (splt->size > 0 && htab->plt_header_size)
16593 {
16594 const bfd_vma *plt0_entry;
16595 bfd_vma got_address, plt_address, got_displacement;
16596
16597 /* Calculate the addresses of the GOT and PLT. */
16598 got_address = sgot->output_section->vma + sgot->output_offset;
16599 plt_address = splt->output_section->vma + splt->output_offset;
16600
16601 if (htab->vxworks_p)
16602 {
16603 /* The VxWorks GOT is relocated by the dynamic linker.
16604 Therefore, we must emit relocations rather than simply
16605 computing the values now. */
16606 Elf_Internal_Rela rel;
16607
16608 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16609 put_arm_insn (htab, output_bfd, plt0_entry[0],
16610 splt->contents + 0);
16611 put_arm_insn (htab, output_bfd, plt0_entry[1],
16612 splt->contents + 4);
16613 put_arm_insn (htab, output_bfd, plt0_entry[2],
16614 splt->contents + 8);
16615 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16616
16617 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16618 rel.r_offset = plt_address + 12;
16619 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16620 rel.r_addend = 0;
16621 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16622 htab->srelplt2->contents);
16623 }
16624 else if (htab->nacl_p)
16625 arm_nacl_put_plt0 (htab, output_bfd, splt,
16626 got_address + 8 - (plt_address + 16));
16627 else if (using_thumb_only (htab))
16628 {
16629 got_displacement = got_address - (plt_address + 12);
16630
16631 plt0_entry = elf32_thumb2_plt0_entry;
16632 put_arm_insn (htab, output_bfd, plt0_entry[0],
16633 splt->contents + 0);
16634 put_arm_insn (htab, output_bfd, plt0_entry[1],
16635 splt->contents + 4);
16636 put_arm_insn (htab, output_bfd, plt0_entry[2],
16637 splt->contents + 8);
16638
16639 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16640 }
16641 else
16642 {
16643 got_displacement = got_address - (plt_address + 16);
16644
16645 plt0_entry = elf32_arm_plt0_entry;
16646 put_arm_insn (htab, output_bfd, plt0_entry[0],
16647 splt->contents + 0);
16648 put_arm_insn (htab, output_bfd, plt0_entry[1],
16649 splt->contents + 4);
16650 put_arm_insn (htab, output_bfd, plt0_entry[2],
16651 splt->contents + 8);
16652 put_arm_insn (htab, output_bfd, plt0_entry[3],
16653 splt->contents + 12);
16654
16655 #ifdef FOUR_WORD_PLT
16656 /* The displacement value goes in the otherwise-unused
16657 last word of the second entry. */
16658 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16659 #else
16660 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16661 #endif
16662 }
16663 }
16664
16665 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16666 really seem like the right value. */
16667 if (splt->output_section->owner == output_bfd)
16668 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16669
16670 if (htab->dt_tlsdesc_plt)
16671 {
16672 bfd_vma got_address
16673 = sgot->output_section->vma + sgot->output_offset;
16674 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16675 + htab->root.sgot->output_offset);
16676 bfd_vma plt_address
16677 = splt->output_section->vma + splt->output_offset;
16678
16679 arm_put_trampoline (htab, output_bfd,
16680 splt->contents + htab->dt_tlsdesc_plt,
16681 dl_tlsdesc_lazy_trampoline, 6);
16682
16683 bfd_put_32 (output_bfd,
16684 gotplt_address + htab->dt_tlsdesc_got
16685 - (plt_address + htab->dt_tlsdesc_plt)
16686 - dl_tlsdesc_lazy_trampoline[6],
16687 splt->contents + htab->dt_tlsdesc_plt + 24);
16688 bfd_put_32 (output_bfd,
16689 got_address - (plt_address + htab->dt_tlsdesc_plt)
16690 - dl_tlsdesc_lazy_trampoline[7],
16691 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16692 }
16693
16694 if (htab->tls_trampoline)
16695 {
16696 arm_put_trampoline (htab, output_bfd,
16697 splt->contents + htab->tls_trampoline,
16698 tls_trampoline, 3);
16699 #ifdef FOUR_WORD_PLT
16700 bfd_put_32 (output_bfd, 0x00000000,
16701 splt->contents + htab->tls_trampoline + 12);
16702 #endif
16703 }
16704
16705 if (htab->vxworks_p
16706 && !bfd_link_pic (info)
16707 && htab->root.splt->size > 0)
16708 {
16709 /* Correct the .rel(a).plt.unloaded relocations. They will have
16710 incorrect symbol indexes. */
16711 int num_plts;
16712 unsigned char *p;
16713
16714 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16715 / htab->plt_entry_size);
16716 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16717
16718 for (; num_plts; num_plts--)
16719 {
16720 Elf_Internal_Rela rel;
16721
16722 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16723 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16724 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16725 p += RELOC_SIZE (htab);
16726
16727 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16728 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16729 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16730 p += RELOC_SIZE (htab);
16731 }
16732 }
16733 }
16734
16735 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16736 /* NaCl uses a special first entry in .iplt too. */
16737 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16738
16739 /* Fill in the first three entries in the global offset table. */
16740 if (sgot)
16741 {
16742 if (sgot->size > 0)
16743 {
16744 if (sdyn == NULL)
16745 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16746 else
16747 bfd_put_32 (output_bfd,
16748 sdyn->output_section->vma + sdyn->output_offset,
16749 sgot->contents);
16750 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16751 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16752 }
16753
16754 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16755 }
16756
16757 return TRUE;
16758 }
16759
16760 static void
16761 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16762 {
16763 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16764 struct elf32_arm_link_hash_table *globals;
16765 struct elf_segment_map *m;
16766
16767 i_ehdrp = elf_elfheader (abfd);
16768
16769 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16770 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16771 else
16772 _bfd_elf_post_process_headers (abfd, link_info);
16773 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16774
16775 if (link_info)
16776 {
16777 globals = elf32_arm_hash_table (link_info);
16778 if (globals != NULL && globals->byteswap_code)
16779 i_ehdrp->e_flags |= EF_ARM_BE8;
16780 }
16781
16782 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16783 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16784 {
16785 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16786 if (abi == AEABI_VFP_args_vfp)
16787 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16788 else
16789 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16790 }
16791
16792 /* Scan segment to set p_flags attribute if it contains only sections with
16793 SHF_ARM_PURECODE flag. */
16794 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16795 {
16796 unsigned int j;
16797
16798 if (m->count == 0)
16799 continue;
16800 for (j = 0; j < m->count; j++)
16801 {
16802 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16803 break;
16804 }
16805 if (j == m->count)
16806 {
16807 m->p_flags = PF_X;
16808 m->p_flags_valid = 1;
16809 }
16810 }
16811 }
16812
16813 static enum elf_reloc_type_class
16814 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16815 const asection *rel_sec ATTRIBUTE_UNUSED,
16816 const Elf_Internal_Rela *rela)
16817 {
16818 switch ((int) ELF32_R_TYPE (rela->r_info))
16819 {
16820 case R_ARM_RELATIVE:
16821 return reloc_class_relative;
16822 case R_ARM_JUMP_SLOT:
16823 return reloc_class_plt;
16824 case R_ARM_COPY:
16825 return reloc_class_copy;
16826 case R_ARM_IRELATIVE:
16827 return reloc_class_ifunc;
16828 default:
16829 return reloc_class_normal;
16830 }
16831 }
16832
16833 static void
16834 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16835 {
16836 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16837 }
16838
16839 /* Return TRUE if this is an unwinding table entry. */
16840
16841 static bfd_boolean
16842 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16843 {
16844 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16845 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16846 }
16847
16848
16849 /* Set the type and flags for an ARM section. We do this by
16850 the section name, which is a hack, but ought to work. */
16851
16852 static bfd_boolean
16853 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16854 {
16855 const char * name;
16856
16857 name = bfd_get_section_name (abfd, sec);
16858
16859 if (is_arm_elf_unwind_section_name (abfd, name))
16860 {
16861 hdr->sh_type = SHT_ARM_EXIDX;
16862 hdr->sh_flags |= SHF_LINK_ORDER;
16863 }
16864
16865 if (sec->flags & SEC_ELF_PURECODE)
16866 hdr->sh_flags |= SHF_ARM_PURECODE;
16867
16868 return TRUE;
16869 }
16870
16871 /* Handle an ARM specific section when reading an object file. This is
16872 called when bfd_section_from_shdr finds a section with an unknown
16873 type. */
16874
16875 static bfd_boolean
16876 elf32_arm_section_from_shdr (bfd *abfd,
16877 Elf_Internal_Shdr * hdr,
16878 const char *name,
16879 int shindex)
16880 {
16881 /* There ought to be a place to keep ELF backend specific flags, but
16882 at the moment there isn't one. We just keep track of the
16883 sections by their name, instead. Fortunately, the ABI gives
16884 names for all the ARM specific sections, so we will probably get
16885 away with this. */
16886 switch (hdr->sh_type)
16887 {
16888 case SHT_ARM_EXIDX:
16889 case SHT_ARM_PREEMPTMAP:
16890 case SHT_ARM_ATTRIBUTES:
16891 break;
16892
16893 default:
16894 return FALSE;
16895 }
16896
16897 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16898 return FALSE;
16899
16900 return TRUE;
16901 }
16902
16903 static _arm_elf_section_data *
16904 get_arm_elf_section_data (asection * sec)
16905 {
16906 if (sec && sec->owner && is_arm_elf (sec->owner))
16907 return elf32_arm_section_data (sec);
16908 else
16909 return NULL;
16910 }
16911
16912 typedef struct
16913 {
16914 void *flaginfo;
16915 struct bfd_link_info *info;
16916 asection *sec;
16917 int sec_shndx;
16918 int (*func) (void *, const char *, Elf_Internal_Sym *,
16919 asection *, struct elf_link_hash_entry *);
16920 } output_arch_syminfo;
16921
16922 enum map_symbol_type
16923 {
16924 ARM_MAP_ARM,
16925 ARM_MAP_THUMB,
16926 ARM_MAP_DATA
16927 };
16928
16929
16930 /* Output a single mapping symbol. */
16931
16932 static bfd_boolean
16933 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16934 enum map_symbol_type type,
16935 bfd_vma offset)
16936 {
16937 static const char *names[3] = {"$a", "$t", "$d"};
16938 Elf_Internal_Sym sym;
16939
16940 sym.st_value = osi->sec->output_section->vma
16941 + osi->sec->output_offset
16942 + offset;
16943 sym.st_size = 0;
16944 sym.st_other = 0;
16945 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16946 sym.st_shndx = osi->sec_shndx;
16947 sym.st_target_internal = 0;
16948 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16949 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16950 }
16951
16952 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16953 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16954
16955 static bfd_boolean
16956 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16957 bfd_boolean is_iplt_entry_p,
16958 union gotplt_union *root_plt,
16959 struct arm_plt_info *arm_plt)
16960 {
16961 struct elf32_arm_link_hash_table *htab;
16962 bfd_vma addr, plt_header_size;
16963
16964 if (root_plt->offset == (bfd_vma) -1)
16965 return TRUE;
16966
16967 htab = elf32_arm_hash_table (osi->info);
16968 if (htab == NULL)
16969 return FALSE;
16970
16971 if (is_iplt_entry_p)
16972 {
16973 osi->sec = htab->root.iplt;
16974 plt_header_size = 0;
16975 }
16976 else
16977 {
16978 osi->sec = htab->root.splt;
16979 plt_header_size = htab->plt_header_size;
16980 }
16981 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16982 (osi->info->output_bfd, osi->sec->output_section));
16983
16984 addr = root_plt->offset & -2;
16985 if (htab->symbian_p)
16986 {
16987 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16988 return FALSE;
16989 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16990 return FALSE;
16991 }
16992 else if (htab->vxworks_p)
16993 {
16994 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16995 return FALSE;
16996 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16997 return FALSE;
16998 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16999 return FALSE;
17000 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17001 return FALSE;
17002 }
17003 else if (htab->nacl_p)
17004 {
17005 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17006 return FALSE;
17007 }
17008 else if (using_thumb_only (htab))
17009 {
17010 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17011 return FALSE;
17012 }
17013 else
17014 {
17015 bfd_boolean thumb_stub_p;
17016
17017 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17018 if (thumb_stub_p)
17019 {
17020 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17021 return FALSE;
17022 }
17023 #ifdef FOUR_WORD_PLT
17024 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17025 return FALSE;
17026 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17027 return FALSE;
17028 #else
17029 /* A three-word PLT with no Thumb thunk contains only Arm code,
17030 so only need to output a mapping symbol for the first PLT entry and
17031 entries with thumb thunks. */
17032 if (thumb_stub_p || addr == plt_header_size)
17033 {
17034 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17035 return FALSE;
17036 }
17037 #endif
17038 }
17039
17040 return TRUE;
17041 }
17042
17043 /* Output mapping symbols for PLT entries associated with H. */
17044
17045 static bfd_boolean
17046 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17047 {
17048 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17049 struct elf32_arm_link_hash_entry *eh;
17050
17051 if (h->root.type == bfd_link_hash_indirect)
17052 return TRUE;
17053
17054 if (h->root.type == bfd_link_hash_warning)
17055 /* When warning symbols are created, they **replace** the "real"
17056 entry in the hash table, thus we never get to see the real
17057 symbol in a hash traversal. So look at it now. */
17058 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17059
17060 eh = (struct elf32_arm_link_hash_entry *) h;
17061 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17062 &h->plt, &eh->plt);
17063 }
17064
17065 /* Bind a veneered symbol to its veneer identified by its hash entry
17066 STUB_ENTRY. The veneered location thus loose its symbol. */
17067
17068 static void
17069 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17070 {
17071 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17072
17073 BFD_ASSERT (hash);
17074 hash->root.root.u.def.section = stub_entry->stub_sec;
17075 hash->root.root.u.def.value = stub_entry->stub_offset;
17076 hash->root.size = stub_entry->stub_size;
17077 }
17078
17079 /* Output a single local symbol for a generated stub. */
17080
17081 static bfd_boolean
17082 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17083 bfd_vma offset, bfd_vma size)
17084 {
17085 Elf_Internal_Sym sym;
17086
17087 sym.st_value = osi->sec->output_section->vma
17088 + osi->sec->output_offset
17089 + offset;
17090 sym.st_size = size;
17091 sym.st_other = 0;
17092 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17093 sym.st_shndx = osi->sec_shndx;
17094 sym.st_target_internal = 0;
17095 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17096 }
17097
17098 static bfd_boolean
17099 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17100 void * in_arg)
17101 {
17102 struct elf32_arm_stub_hash_entry *stub_entry;
17103 asection *stub_sec;
17104 bfd_vma addr;
17105 char *stub_name;
17106 output_arch_syminfo *osi;
17107 const insn_sequence *template_sequence;
17108 enum stub_insn_type prev_type;
17109 int size;
17110 int i;
17111 enum map_symbol_type sym_type;
17112
17113 /* Massage our args to the form they really have. */
17114 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17115 osi = (output_arch_syminfo *) in_arg;
17116
17117 stub_sec = stub_entry->stub_sec;
17118
17119 /* Ensure this stub is attached to the current section being
17120 processed. */
17121 if (stub_sec != osi->sec)
17122 return TRUE;
17123
17124 addr = (bfd_vma) stub_entry->stub_offset;
17125 template_sequence = stub_entry->stub_template;
17126
17127 if (arm_stub_sym_claimed (stub_entry->stub_type))
17128 arm_stub_claim_sym (stub_entry);
17129 else
17130 {
17131 stub_name = stub_entry->output_name;
17132 switch (template_sequence[0].type)
17133 {
17134 case ARM_TYPE:
17135 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17136 stub_entry->stub_size))
17137 return FALSE;
17138 break;
17139 case THUMB16_TYPE:
17140 case THUMB32_TYPE:
17141 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17142 stub_entry->stub_size))
17143 return FALSE;
17144 break;
17145 default:
17146 BFD_FAIL ();
17147 return 0;
17148 }
17149 }
17150
17151 prev_type = DATA_TYPE;
17152 size = 0;
17153 for (i = 0; i < stub_entry->stub_template_size; i++)
17154 {
17155 switch (template_sequence[i].type)
17156 {
17157 case ARM_TYPE:
17158 sym_type = ARM_MAP_ARM;
17159 break;
17160
17161 case THUMB16_TYPE:
17162 case THUMB32_TYPE:
17163 sym_type = ARM_MAP_THUMB;
17164 break;
17165
17166 case DATA_TYPE:
17167 sym_type = ARM_MAP_DATA;
17168 break;
17169
17170 default:
17171 BFD_FAIL ();
17172 return FALSE;
17173 }
17174
17175 if (template_sequence[i].type != prev_type)
17176 {
17177 prev_type = template_sequence[i].type;
17178 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17179 return FALSE;
17180 }
17181
17182 switch (template_sequence[i].type)
17183 {
17184 case ARM_TYPE:
17185 case THUMB32_TYPE:
17186 size += 4;
17187 break;
17188
17189 case THUMB16_TYPE:
17190 size += 2;
17191 break;
17192
17193 case DATA_TYPE:
17194 size += 4;
17195 break;
17196
17197 default:
17198 BFD_FAIL ();
17199 return FALSE;
17200 }
17201 }
17202
17203 return TRUE;
17204 }
17205
17206 /* Output mapping symbols for linker generated sections,
17207 and for those data-only sections that do not have a
17208 $d. */
17209
17210 static bfd_boolean
17211 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17212 struct bfd_link_info *info,
17213 void *flaginfo,
17214 int (*func) (void *, const char *,
17215 Elf_Internal_Sym *,
17216 asection *,
17217 struct elf_link_hash_entry *))
17218 {
17219 output_arch_syminfo osi;
17220 struct elf32_arm_link_hash_table *htab;
17221 bfd_vma offset;
17222 bfd_size_type size;
17223 bfd *input_bfd;
17224
17225 htab = elf32_arm_hash_table (info);
17226 if (htab == NULL)
17227 return FALSE;
17228
17229 check_use_blx (htab);
17230
17231 osi.flaginfo = flaginfo;
17232 osi.info = info;
17233 osi.func = func;
17234
17235 /* Add a $d mapping symbol to data-only sections that
17236 don't have any mapping symbol. This may result in (harmless) redundant
17237 mapping symbols. */
17238 for (input_bfd = info->input_bfds;
17239 input_bfd != NULL;
17240 input_bfd = input_bfd->link.next)
17241 {
17242 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17243 for (osi.sec = input_bfd->sections;
17244 osi.sec != NULL;
17245 osi.sec = osi.sec->next)
17246 {
17247 if (osi.sec->output_section != NULL
17248 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17249 != 0)
17250 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17251 == SEC_HAS_CONTENTS
17252 && get_arm_elf_section_data (osi.sec) != NULL
17253 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17254 && osi.sec->size > 0
17255 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17256 {
17257 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17258 (output_bfd, osi.sec->output_section);
17259 if (osi.sec_shndx != (int)SHN_BAD)
17260 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17261 }
17262 }
17263 }
17264
17265 /* ARM->Thumb glue. */
17266 if (htab->arm_glue_size > 0)
17267 {
17268 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17269 ARM2THUMB_GLUE_SECTION_NAME);
17270
17271 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17272 (output_bfd, osi.sec->output_section);
17273 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17274 || htab->pic_veneer)
17275 size = ARM2THUMB_PIC_GLUE_SIZE;
17276 else if (htab->use_blx)
17277 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17278 else
17279 size = ARM2THUMB_STATIC_GLUE_SIZE;
17280
17281 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17282 {
17283 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17284 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17285 }
17286 }
17287
17288 /* Thumb->ARM glue. */
17289 if (htab->thumb_glue_size > 0)
17290 {
17291 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17292 THUMB2ARM_GLUE_SECTION_NAME);
17293
17294 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17295 (output_bfd, osi.sec->output_section);
17296 size = THUMB2ARM_GLUE_SIZE;
17297
17298 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17299 {
17300 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17301 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17302 }
17303 }
17304
17305 /* ARMv4 BX veneers. */
17306 if (htab->bx_glue_size > 0)
17307 {
17308 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17309 ARM_BX_GLUE_SECTION_NAME);
17310
17311 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17312 (output_bfd, osi.sec->output_section);
17313
17314 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17315 }
17316
17317 /* Long calls stubs. */
17318 if (htab->stub_bfd && htab->stub_bfd->sections)
17319 {
17320 asection* stub_sec;
17321
17322 for (stub_sec = htab->stub_bfd->sections;
17323 stub_sec != NULL;
17324 stub_sec = stub_sec->next)
17325 {
17326 /* Ignore non-stub sections. */
17327 if (!strstr (stub_sec->name, STUB_SUFFIX))
17328 continue;
17329
17330 osi.sec = stub_sec;
17331
17332 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17333 (output_bfd, osi.sec->output_section);
17334
17335 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17336 }
17337 }
17338
17339 /* Finally, output mapping symbols for the PLT. */
17340 if (htab->root.splt && htab->root.splt->size > 0)
17341 {
17342 osi.sec = htab->root.splt;
17343 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17344 (output_bfd, osi.sec->output_section));
17345
17346 /* Output mapping symbols for the plt header. SymbianOS does not have a
17347 plt header. */
17348 if (htab->vxworks_p)
17349 {
17350 /* VxWorks shared libraries have no PLT header. */
17351 if (!bfd_link_pic (info))
17352 {
17353 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17354 return FALSE;
17355 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17356 return FALSE;
17357 }
17358 }
17359 else if (htab->nacl_p)
17360 {
17361 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17362 return FALSE;
17363 }
17364 else if (using_thumb_only (htab))
17365 {
17366 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17367 return FALSE;
17368 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17369 return FALSE;
17370 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17371 return FALSE;
17372 }
17373 else if (!htab->symbian_p)
17374 {
17375 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17376 return FALSE;
17377 #ifndef FOUR_WORD_PLT
17378 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17379 return FALSE;
17380 #endif
17381 }
17382 }
17383 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17384 {
17385 /* NaCl uses a special first entry in .iplt too. */
17386 osi.sec = htab->root.iplt;
17387 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17388 (output_bfd, osi.sec->output_section));
17389 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17390 return FALSE;
17391 }
17392 if ((htab->root.splt && htab->root.splt->size > 0)
17393 || (htab->root.iplt && htab->root.iplt->size > 0))
17394 {
17395 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17396 for (input_bfd = info->input_bfds;
17397 input_bfd != NULL;
17398 input_bfd = input_bfd->link.next)
17399 {
17400 struct arm_local_iplt_info **local_iplt;
17401 unsigned int i, num_syms;
17402
17403 local_iplt = elf32_arm_local_iplt (input_bfd);
17404 if (local_iplt != NULL)
17405 {
17406 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17407 for (i = 0; i < num_syms; i++)
17408 if (local_iplt[i] != NULL
17409 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17410 &local_iplt[i]->root,
17411 &local_iplt[i]->arm))
17412 return FALSE;
17413 }
17414 }
17415 }
17416 if (htab->dt_tlsdesc_plt != 0)
17417 {
17418 /* Mapping symbols for the lazy tls trampoline. */
17419 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17420 return FALSE;
17421
17422 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17423 htab->dt_tlsdesc_plt + 24))
17424 return FALSE;
17425 }
17426 if (htab->tls_trampoline != 0)
17427 {
17428 /* Mapping symbols for the tls trampoline. */
17429 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17430 return FALSE;
17431 #ifdef FOUR_WORD_PLT
17432 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17433 htab->tls_trampoline + 12))
17434 return FALSE;
17435 #endif
17436 }
17437
17438 return TRUE;
17439 }
17440
17441 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17442 the import library. All SYMCOUNT symbols of ABFD can be examined
17443 from their pointers in SYMS. Pointers of symbols to keep should be
17444 stored continuously at the beginning of that array.
17445
17446 Returns the number of symbols to keep. */
17447
17448 static unsigned int
17449 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17450 struct bfd_link_info *info,
17451 asymbol **syms, long symcount)
17452 {
17453 size_t maxnamelen;
17454 char *cmse_name;
17455 long src_count, dst_count = 0;
17456 struct elf32_arm_link_hash_table *htab;
17457
17458 htab = elf32_arm_hash_table (info);
17459 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17460 symcount = 0;
17461
17462 maxnamelen = 128;
17463 cmse_name = (char *) bfd_malloc (maxnamelen);
17464 for (src_count = 0; src_count < symcount; src_count++)
17465 {
17466 struct elf32_arm_link_hash_entry *cmse_hash;
17467 asymbol *sym;
17468 flagword flags;
17469 char *name;
17470 size_t namelen;
17471
17472 sym = syms[src_count];
17473 flags = sym->flags;
17474 name = (char *) bfd_asymbol_name (sym);
17475
17476 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17477 continue;
17478 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17479 continue;
17480
17481 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17482 if (namelen > maxnamelen)
17483 {
17484 cmse_name = (char *)
17485 bfd_realloc (cmse_name, namelen);
17486 maxnamelen = namelen;
17487 }
17488 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17489 cmse_hash = (struct elf32_arm_link_hash_entry *)
17490 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17491
17492 if (!cmse_hash
17493 || (cmse_hash->root.root.type != bfd_link_hash_defined
17494 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17495 || cmse_hash->root.type != STT_FUNC)
17496 continue;
17497
17498 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17499 continue;
17500
17501 syms[dst_count++] = sym;
17502 }
17503 free (cmse_name);
17504
17505 syms[dst_count] = NULL;
17506
17507 return dst_count;
17508 }
17509
17510 /* Filter symbols of ABFD to include in the import library. All
17511 SYMCOUNT symbols of ABFD can be examined from their pointers in
17512 SYMS. Pointers of symbols to keep should be stored continuously at
17513 the beginning of that array.
17514
17515 Returns the number of symbols to keep. */
17516
17517 static unsigned int
17518 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17519 struct bfd_link_info *info,
17520 asymbol **syms, long symcount)
17521 {
17522 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17523
17524 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
17525 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
17526 library to be a relocatable object file. */
17527 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
17528 if (globals->cmse_implib)
17529 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17530 else
17531 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17532 }
17533
17534 /* Allocate target specific section data. */
17535
17536 static bfd_boolean
17537 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17538 {
17539 if (!sec->used_by_bfd)
17540 {
17541 _arm_elf_section_data *sdata;
17542 bfd_size_type amt = sizeof (*sdata);
17543
17544 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17545 if (sdata == NULL)
17546 return FALSE;
17547 sec->used_by_bfd = sdata;
17548 }
17549
17550 return _bfd_elf_new_section_hook (abfd, sec);
17551 }
17552
17553
17554 /* Used to order a list of mapping symbols by address. */
17555
17556 static int
17557 elf32_arm_compare_mapping (const void * a, const void * b)
17558 {
17559 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17560 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17561
17562 if (amap->vma > bmap->vma)
17563 return 1;
17564 else if (amap->vma < bmap->vma)
17565 return -1;
17566 else if (amap->type > bmap->type)
17567 /* Ensure results do not depend on the host qsort for objects with
17568 multiple mapping symbols at the same address by sorting on type
17569 after vma. */
17570 return 1;
17571 else if (amap->type < bmap->type)
17572 return -1;
17573 else
17574 return 0;
17575 }
17576
17577 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17578
17579 static unsigned long
17580 offset_prel31 (unsigned long addr, bfd_vma offset)
17581 {
17582 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17583 }
17584
17585 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17586 relocations. */
17587
17588 static void
17589 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17590 {
17591 unsigned long first_word = bfd_get_32 (output_bfd, from);
17592 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17593
17594 /* High bit of first word is supposed to be zero. */
17595 if ((first_word & 0x80000000ul) == 0)
17596 first_word = offset_prel31 (first_word, offset);
17597
17598 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17599 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17600 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17601 second_word = offset_prel31 (second_word, offset);
17602
17603 bfd_put_32 (output_bfd, first_word, to);
17604 bfd_put_32 (output_bfd, second_word, to + 4);
17605 }
17606
17607 /* Data for make_branch_to_a8_stub(). */
17608
17609 struct a8_branch_to_stub_data
17610 {
17611 asection *writing_section;
17612 bfd_byte *contents;
17613 };
17614
17615
17616 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17617 places for a particular section. */
17618
17619 static bfd_boolean
17620 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17621 void *in_arg)
17622 {
17623 struct elf32_arm_stub_hash_entry *stub_entry;
17624 struct a8_branch_to_stub_data *data;
17625 bfd_byte *contents;
17626 unsigned long branch_insn;
17627 bfd_vma veneered_insn_loc, veneer_entry_loc;
17628 bfd_signed_vma branch_offset;
17629 bfd *abfd;
17630 unsigned int loc;
17631
17632 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17633 data = (struct a8_branch_to_stub_data *) in_arg;
17634
17635 if (stub_entry->target_section != data->writing_section
17636 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17637 return TRUE;
17638
17639 contents = data->contents;
17640
17641 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17642 generated when both source and target are in the same section. */
17643 veneered_insn_loc = stub_entry->target_section->output_section->vma
17644 + stub_entry->target_section->output_offset
17645 + stub_entry->source_value;
17646
17647 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17648 + stub_entry->stub_sec->output_offset
17649 + stub_entry->stub_offset;
17650
17651 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17652 veneered_insn_loc &= ~3u;
17653
17654 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17655
17656 abfd = stub_entry->target_section->owner;
17657 loc = stub_entry->source_value;
17658
17659 /* We attempt to avoid this condition by setting stubs_always_after_branch
17660 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17661 This check is just to be on the safe side... */
17662 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17663 {
17664 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub is "
17665 "allocated in unsafe location"), abfd);
17666 return FALSE;
17667 }
17668
17669 switch (stub_entry->stub_type)
17670 {
17671 case arm_stub_a8_veneer_b:
17672 case arm_stub_a8_veneer_b_cond:
17673 branch_insn = 0xf0009000;
17674 goto jump24;
17675
17676 case arm_stub_a8_veneer_blx:
17677 branch_insn = 0xf000e800;
17678 goto jump24;
17679
17680 case arm_stub_a8_veneer_bl:
17681 {
17682 unsigned int i1, j1, i2, j2, s;
17683
17684 branch_insn = 0xf000d000;
17685
17686 jump24:
17687 if (branch_offset < -16777216 || branch_offset > 16777214)
17688 {
17689 /* There's not much we can do apart from complain if this
17690 happens. */
17691 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub out "
17692 "of range (input file too large)"), abfd);
17693 return FALSE;
17694 }
17695
17696 /* i1 = not(j1 eor s), so:
17697 not i1 = j1 eor s
17698 j1 = (not i1) eor s. */
17699
17700 branch_insn |= (branch_offset >> 1) & 0x7ff;
17701 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17702 i2 = (branch_offset >> 22) & 1;
17703 i1 = (branch_offset >> 23) & 1;
17704 s = (branch_offset >> 24) & 1;
17705 j1 = (!i1) ^ s;
17706 j2 = (!i2) ^ s;
17707 branch_insn |= j2 << 11;
17708 branch_insn |= j1 << 13;
17709 branch_insn |= s << 26;
17710 }
17711 break;
17712
17713 default:
17714 BFD_FAIL ();
17715 return FALSE;
17716 }
17717
17718 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17719 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17720
17721 return TRUE;
17722 }
17723
17724 /* Beginning of stm32l4xx work-around. */
17725
17726 /* Functions encoding instructions necessary for the emission of the
17727 fix-stm32l4xx-629360.
17728 Encoding is extracted from the
17729 ARM (C) Architecture Reference Manual
17730 ARMv7-A and ARMv7-R edition
17731 ARM DDI 0406C.b (ID072512). */
17732
17733 static inline bfd_vma
17734 create_instruction_branch_absolute (int branch_offset)
17735 {
17736 /* A8.8.18 B (A8-334)
17737 B target_address (Encoding T4). */
17738 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17739 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17740 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17741
17742 int s = ((branch_offset & 0x1000000) >> 24);
17743 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17744 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17745
17746 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17747 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17748
17749 bfd_vma patched_inst = 0xf0009000
17750 | s << 26 /* S. */
17751 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17752 | j1 << 13 /* J1. */
17753 | j2 << 11 /* J2. */
17754 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17755
17756 return patched_inst;
17757 }
17758
17759 static inline bfd_vma
17760 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17761 {
17762 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17763 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17764 bfd_vma patched_inst = 0xe8900000
17765 | (/*W=*/wback << 21)
17766 | (base_reg << 16)
17767 | (reg_mask & 0x0000ffff);
17768
17769 return patched_inst;
17770 }
17771
17772 static inline bfd_vma
17773 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17774 {
17775 /* A8.8.60 LDMDB/LDMEA (A8-402)
17776 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17777 bfd_vma patched_inst = 0xe9100000
17778 | (/*W=*/wback << 21)
17779 | (base_reg << 16)
17780 | (reg_mask & 0x0000ffff);
17781
17782 return patched_inst;
17783 }
17784
17785 static inline bfd_vma
17786 create_instruction_mov (int target_reg, int source_reg)
17787 {
17788 /* A8.8.103 MOV (register) (A8-486)
17789 MOV Rd, Rm (Encoding T1). */
17790 bfd_vma patched_inst = 0x4600
17791 | (target_reg & 0x7)
17792 | ((target_reg & 0x8) >> 3) << 7
17793 | (source_reg << 3);
17794
17795 return patched_inst;
17796 }
17797
17798 static inline bfd_vma
17799 create_instruction_sub (int target_reg, int source_reg, int value)
17800 {
17801 /* A8.8.221 SUB (immediate) (A8-708)
17802 SUB Rd, Rn, #value (Encoding T3). */
17803 bfd_vma patched_inst = 0xf1a00000
17804 | (target_reg << 8)
17805 | (source_reg << 16)
17806 | (/*S=*/0 << 20)
17807 | ((value & 0x800) >> 11) << 26
17808 | ((value & 0x700) >> 8) << 12
17809 | (value & 0x0ff);
17810
17811 return patched_inst;
17812 }
17813
17814 static inline bfd_vma
17815 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17816 int first_reg)
17817 {
17818 /* A8.8.332 VLDM (A8-922)
17819 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17820 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17821 | (/*W=*/wback << 21)
17822 | (base_reg << 16)
17823 | (num_words & 0x000000ff)
17824 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17825 | (first_reg & 0x00000001) << 22;
17826
17827 return patched_inst;
17828 }
17829
17830 static inline bfd_vma
17831 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17832 int first_reg)
17833 {
17834 /* A8.8.332 VLDM (A8-922)
17835 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17836 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17837 | (base_reg << 16)
17838 | (num_words & 0x000000ff)
17839 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17840 | (first_reg & 0x00000001) << 22;
17841
17842 return patched_inst;
17843 }
17844
17845 static inline bfd_vma
17846 create_instruction_udf_w (int value)
17847 {
17848 /* A8.8.247 UDF (A8-758)
17849 Undefined (Encoding T2). */
17850 bfd_vma patched_inst = 0xf7f0a000
17851 | (value & 0x00000fff)
17852 | (value & 0x000f0000) << 16;
17853
17854 return patched_inst;
17855 }
17856
17857 static inline bfd_vma
17858 create_instruction_udf (int value)
17859 {
17860 /* A8.8.247 UDF (A8-758)
17861 Undefined (Encoding T1). */
17862 bfd_vma patched_inst = 0xde00
17863 | (value & 0xff);
17864
17865 return patched_inst;
17866 }
17867
17868 /* Functions writing an instruction in memory, returning the next
17869 memory position to write to. */
17870
17871 static inline bfd_byte *
17872 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17873 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17874 {
17875 put_thumb2_insn (htab, output_bfd, insn, pt);
17876 return pt + 4;
17877 }
17878
17879 static inline bfd_byte *
17880 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17881 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17882 {
17883 put_thumb_insn (htab, output_bfd, insn, pt);
17884 return pt + 2;
17885 }
17886
17887 /* Function filling up a region in memory with T1 and T2 UDFs taking
17888 care of alignment. */
17889
17890 static bfd_byte *
17891 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17892 bfd * output_bfd,
17893 const bfd_byte * const base_stub_contents,
17894 bfd_byte * const from_stub_contents,
17895 const bfd_byte * const end_stub_contents)
17896 {
17897 bfd_byte *current_stub_contents = from_stub_contents;
17898
17899 /* Fill the remaining of the stub with deterministic contents : UDF
17900 instructions.
17901 Check if realignment is needed on modulo 4 frontier using T1, to
17902 further use T2. */
17903 if ((current_stub_contents < end_stub_contents)
17904 && !((current_stub_contents - base_stub_contents) % 2)
17905 && ((current_stub_contents - base_stub_contents) % 4))
17906 current_stub_contents =
17907 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17908 create_instruction_udf (0));
17909
17910 for (; current_stub_contents < end_stub_contents;)
17911 current_stub_contents =
17912 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17913 create_instruction_udf_w (0));
17914
17915 return current_stub_contents;
17916 }
17917
17918 /* Functions writing the stream of instructions equivalent to the
17919 derived sequence for ldmia, ldmdb, vldm respectively. */
17920
17921 static void
17922 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17923 bfd * output_bfd,
17924 const insn32 initial_insn,
17925 const bfd_byte *const initial_insn_addr,
17926 bfd_byte *const base_stub_contents)
17927 {
17928 int wback = (initial_insn & 0x00200000) >> 21;
17929 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17930 int insn_all_registers = initial_insn & 0x0000ffff;
17931 int insn_low_registers, insn_high_registers;
17932 int usable_register_mask;
17933 int nb_registers = elf32_arm_popcount (insn_all_registers);
17934 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17935 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17936 bfd_byte *current_stub_contents = base_stub_contents;
17937
17938 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17939
17940 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17941 smaller than 8 registers load sequences that do not cause the
17942 hardware issue. */
17943 if (nb_registers <= 8)
17944 {
17945 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17946 current_stub_contents =
17947 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17948 initial_insn);
17949
17950 /* B initial_insn_addr+4. */
17951 if (!restore_pc)
17952 current_stub_contents =
17953 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17954 create_instruction_branch_absolute
17955 (initial_insn_addr - current_stub_contents));
17956
17957 /* Fill the remaining of the stub with deterministic contents. */
17958 current_stub_contents =
17959 stm32l4xx_fill_stub_udf (htab, output_bfd,
17960 base_stub_contents, current_stub_contents,
17961 base_stub_contents +
17962 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17963
17964 return;
17965 }
17966
17967 /* - reg_list[13] == 0. */
17968 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17969
17970 /* - reg_list[14] & reg_list[15] != 1. */
17971 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17972
17973 /* - if (wback==1) reg_list[rn] == 0. */
17974 BFD_ASSERT (!wback || !restore_rn);
17975
17976 /* - nb_registers > 8. */
17977 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
17978
17979 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17980
17981 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17982 - One with the 7 lowest registers (register mask 0x007F)
17983 This LDM will finally contain between 2 and 7 registers
17984 - One with the 7 highest registers (register mask 0xDF80)
17985 This ldm will finally contain between 2 and 7 registers. */
17986 insn_low_registers = insn_all_registers & 0x007F;
17987 insn_high_registers = insn_all_registers & 0xDF80;
17988
17989 /* A spare register may be needed during this veneer to temporarily
17990 handle the base register. This register will be restored with the
17991 last LDM operation.
17992 The usable register may be any general purpose register (that
17993 excludes PC, SP, LR : register mask is 0x1FFF). */
17994 usable_register_mask = 0x1FFF;
17995
17996 /* Generate the stub function. */
17997 if (wback)
17998 {
17999 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18000 current_stub_contents =
18001 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18002 create_instruction_ldmia
18003 (rn, /*wback=*/1, insn_low_registers));
18004
18005 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18006 current_stub_contents =
18007 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18008 create_instruction_ldmia
18009 (rn, /*wback=*/1, insn_high_registers));
18010 if (!restore_pc)
18011 {
18012 /* B initial_insn_addr+4. */
18013 current_stub_contents =
18014 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18015 create_instruction_branch_absolute
18016 (initial_insn_addr - current_stub_contents));
18017 }
18018 }
18019 else /* if (!wback). */
18020 {
18021 ri = rn;
18022
18023 /* If Rn is not part of the high-register-list, move it there. */
18024 if (!(insn_high_registers & (1 << rn)))
18025 {
18026 /* Choose a Ri in the high-register-list that will be restored. */
18027 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18028
18029 /* MOV Ri, Rn. */
18030 current_stub_contents =
18031 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18032 create_instruction_mov (ri, rn));
18033 }
18034
18035 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18036 current_stub_contents =
18037 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18038 create_instruction_ldmia
18039 (ri, /*wback=*/1, insn_low_registers));
18040
18041 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18042 current_stub_contents =
18043 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18044 create_instruction_ldmia
18045 (ri, /*wback=*/0, insn_high_registers));
18046
18047 if (!restore_pc)
18048 {
18049 /* B initial_insn_addr+4. */
18050 current_stub_contents =
18051 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18052 create_instruction_branch_absolute
18053 (initial_insn_addr - current_stub_contents));
18054 }
18055 }
18056
18057 /* Fill the remaining of the stub with deterministic contents. */
18058 current_stub_contents =
18059 stm32l4xx_fill_stub_udf (htab, output_bfd,
18060 base_stub_contents, current_stub_contents,
18061 base_stub_contents +
18062 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18063 }
18064
18065 static void
18066 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18067 bfd * output_bfd,
18068 const insn32 initial_insn,
18069 const bfd_byte *const initial_insn_addr,
18070 bfd_byte *const base_stub_contents)
18071 {
18072 int wback = (initial_insn & 0x00200000) >> 21;
18073 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18074 int insn_all_registers = initial_insn & 0x0000ffff;
18075 int insn_low_registers, insn_high_registers;
18076 int usable_register_mask;
18077 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18078 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18079 int nb_registers = elf32_arm_popcount (insn_all_registers);
18080 bfd_byte *current_stub_contents = base_stub_contents;
18081
18082 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18083
18084 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18085 smaller than 8 registers load sequences that do not cause the
18086 hardware issue. */
18087 if (nb_registers <= 8)
18088 {
18089 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18090 current_stub_contents =
18091 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18092 initial_insn);
18093
18094 /* B initial_insn_addr+4. */
18095 current_stub_contents =
18096 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18097 create_instruction_branch_absolute
18098 (initial_insn_addr - current_stub_contents));
18099
18100 /* Fill the remaining of the stub with deterministic contents. */
18101 current_stub_contents =
18102 stm32l4xx_fill_stub_udf (htab, output_bfd,
18103 base_stub_contents, current_stub_contents,
18104 base_stub_contents +
18105 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18106
18107 return;
18108 }
18109
18110 /* - reg_list[13] == 0. */
18111 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18112
18113 /* - reg_list[14] & reg_list[15] != 1. */
18114 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18115
18116 /* - if (wback==1) reg_list[rn] == 0. */
18117 BFD_ASSERT (!wback || !restore_rn);
18118
18119 /* - nb_registers > 8. */
18120 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18121
18122 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18123
18124 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18125 - One with the 7 lowest registers (register mask 0x007F)
18126 This LDM will finally contain between 2 and 7 registers
18127 - One with the 7 highest registers (register mask 0xDF80)
18128 This ldm will finally contain between 2 and 7 registers. */
18129 insn_low_registers = insn_all_registers & 0x007F;
18130 insn_high_registers = insn_all_registers & 0xDF80;
18131
18132 /* A spare register may be needed during this veneer to temporarily
18133 handle the base register. This register will be restored with
18134 the last LDM operation.
18135 The usable register may be any general purpose register (that excludes
18136 PC, SP, LR : register mask is 0x1FFF). */
18137 usable_register_mask = 0x1FFF;
18138
18139 /* Generate the stub function. */
18140 if (!wback && !restore_pc && !restore_rn)
18141 {
18142 /* Choose a Ri in the low-register-list that will be restored. */
18143 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18144
18145 /* MOV Ri, Rn. */
18146 current_stub_contents =
18147 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18148 create_instruction_mov (ri, rn));
18149
18150 /* LDMDB Ri!, {R-high-register-list}. */
18151 current_stub_contents =
18152 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18153 create_instruction_ldmdb
18154 (ri, /*wback=*/1, insn_high_registers));
18155
18156 /* LDMDB Ri, {R-low-register-list}. */
18157 current_stub_contents =
18158 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18159 create_instruction_ldmdb
18160 (ri, /*wback=*/0, insn_low_registers));
18161
18162 /* B initial_insn_addr+4. */
18163 current_stub_contents =
18164 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18165 create_instruction_branch_absolute
18166 (initial_insn_addr - current_stub_contents));
18167 }
18168 else if (wback && !restore_pc && !restore_rn)
18169 {
18170 /* LDMDB Rn!, {R-high-register-list}. */
18171 current_stub_contents =
18172 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18173 create_instruction_ldmdb
18174 (rn, /*wback=*/1, insn_high_registers));
18175
18176 /* LDMDB Rn!, {R-low-register-list}. */
18177 current_stub_contents =
18178 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18179 create_instruction_ldmdb
18180 (rn, /*wback=*/1, insn_low_registers));
18181
18182 /* B initial_insn_addr+4. */
18183 current_stub_contents =
18184 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18185 create_instruction_branch_absolute
18186 (initial_insn_addr - current_stub_contents));
18187 }
18188 else if (!wback && restore_pc && !restore_rn)
18189 {
18190 /* Choose a Ri in the high-register-list that will be restored. */
18191 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18192
18193 /* SUB Ri, Rn, #(4*nb_registers). */
18194 current_stub_contents =
18195 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18196 create_instruction_sub (ri, rn, (4 * nb_registers)));
18197
18198 /* LDMIA Ri!, {R-low-register-list}. */
18199 current_stub_contents =
18200 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18201 create_instruction_ldmia
18202 (ri, /*wback=*/1, insn_low_registers));
18203
18204 /* LDMIA Ri, {R-high-register-list}. */
18205 current_stub_contents =
18206 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18207 create_instruction_ldmia
18208 (ri, /*wback=*/0, insn_high_registers));
18209 }
18210 else if (wback && restore_pc && !restore_rn)
18211 {
18212 /* Choose a Ri in the high-register-list that will be restored. */
18213 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18214
18215 /* SUB Rn, Rn, #(4*nb_registers) */
18216 current_stub_contents =
18217 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18218 create_instruction_sub (rn, rn, (4 * nb_registers)));
18219
18220 /* MOV Ri, Rn. */
18221 current_stub_contents =
18222 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18223 create_instruction_mov (ri, rn));
18224
18225 /* LDMIA Ri!, {R-low-register-list}. */
18226 current_stub_contents =
18227 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18228 create_instruction_ldmia
18229 (ri, /*wback=*/1, insn_low_registers));
18230
18231 /* LDMIA Ri, {R-high-register-list}. */
18232 current_stub_contents =
18233 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18234 create_instruction_ldmia
18235 (ri, /*wback=*/0, insn_high_registers));
18236 }
18237 else if (!wback && !restore_pc && restore_rn)
18238 {
18239 ri = rn;
18240 if (!(insn_low_registers & (1 << rn)))
18241 {
18242 /* Choose a Ri in the low-register-list that will be restored. */
18243 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18244
18245 /* MOV Ri, Rn. */
18246 current_stub_contents =
18247 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18248 create_instruction_mov (ri, rn));
18249 }
18250
18251 /* LDMDB Ri!, {R-high-register-list}. */
18252 current_stub_contents =
18253 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18254 create_instruction_ldmdb
18255 (ri, /*wback=*/1, insn_high_registers));
18256
18257 /* LDMDB Ri, {R-low-register-list}. */
18258 current_stub_contents =
18259 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18260 create_instruction_ldmdb
18261 (ri, /*wback=*/0, insn_low_registers));
18262
18263 /* B initial_insn_addr+4. */
18264 current_stub_contents =
18265 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18266 create_instruction_branch_absolute
18267 (initial_insn_addr - current_stub_contents));
18268 }
18269 else if (!wback && restore_pc && restore_rn)
18270 {
18271 ri = rn;
18272 if (!(insn_high_registers & (1 << rn)))
18273 {
18274 /* Choose a Ri in the high-register-list that will be restored. */
18275 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18276 }
18277
18278 /* SUB Ri, Rn, #(4*nb_registers). */
18279 current_stub_contents =
18280 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18281 create_instruction_sub (ri, rn, (4 * nb_registers)));
18282
18283 /* LDMIA Ri!, {R-low-register-list}. */
18284 current_stub_contents =
18285 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18286 create_instruction_ldmia
18287 (ri, /*wback=*/1, insn_low_registers));
18288
18289 /* LDMIA Ri, {R-high-register-list}. */
18290 current_stub_contents =
18291 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18292 create_instruction_ldmia
18293 (ri, /*wback=*/0, insn_high_registers));
18294 }
18295 else if (wback && restore_rn)
18296 {
18297 /* The assembler should not have accepted to encode this. */
18298 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18299 "undefined behavior.\n");
18300 }
18301
18302 /* Fill the remaining of the stub with deterministic contents. */
18303 current_stub_contents =
18304 stm32l4xx_fill_stub_udf (htab, output_bfd,
18305 base_stub_contents, current_stub_contents,
18306 base_stub_contents +
18307 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18308
18309 }
18310
18311 static void
18312 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18313 bfd * output_bfd,
18314 const insn32 initial_insn,
18315 const bfd_byte *const initial_insn_addr,
18316 bfd_byte *const base_stub_contents)
18317 {
18318 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18319 bfd_byte *current_stub_contents = base_stub_contents;
18320
18321 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18322
18323 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18324 smaller than 8 words load sequences that do not cause the
18325 hardware issue. */
18326 if (num_words <= 8)
18327 {
18328 /* Untouched instruction. */
18329 current_stub_contents =
18330 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18331 initial_insn);
18332
18333 /* B initial_insn_addr+4. */
18334 current_stub_contents =
18335 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18336 create_instruction_branch_absolute
18337 (initial_insn_addr - current_stub_contents));
18338 }
18339 else
18340 {
18341 bfd_boolean is_dp = /* DP encoding. */
18342 (initial_insn & 0xfe100f00) == 0xec100b00;
18343 bfd_boolean is_ia_nobang = /* (IA without !). */
18344 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18345 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18346 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18347 bfd_boolean is_db_bang = /* (DB with !). */
18348 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18349 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18350 /* d = UInt (Vd:D);. */
18351 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18352 | (((unsigned int)initial_insn << 9) >> 31);
18353
18354 /* Compute the number of 8-words chunks needed to split. */
18355 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18356 int chunk;
18357
18358 /* The test coverage has been done assuming the following
18359 hypothesis that exactly one of the previous is_ predicates is
18360 true. */
18361 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18362 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18363
18364 /* We treat the cutting of the words in one pass for all
18365 cases, then we emit the adjustments:
18366
18367 vldm rx, {...}
18368 -> vldm rx!, {8_words_or_less} for each needed 8_word
18369 -> sub rx, rx, #size (list)
18370
18371 vldm rx!, {...}
18372 -> vldm rx!, {8_words_or_less} for each needed 8_word
18373 This also handles vpop instruction (when rx is sp)
18374
18375 vldmd rx!, {...}
18376 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18377 for (chunk = 0; chunk < chunks; ++chunk)
18378 {
18379 bfd_vma new_insn = 0;
18380
18381 if (is_ia_nobang || is_ia_bang)
18382 {
18383 new_insn = create_instruction_vldmia
18384 (base_reg,
18385 is_dp,
18386 /*wback= . */1,
18387 chunks - (chunk + 1) ?
18388 8 : num_words - chunk * 8,
18389 first_reg + chunk * 8);
18390 }
18391 else if (is_db_bang)
18392 {
18393 new_insn = create_instruction_vldmdb
18394 (base_reg,
18395 is_dp,
18396 chunks - (chunk + 1) ?
18397 8 : num_words - chunk * 8,
18398 first_reg + chunk * 8);
18399 }
18400
18401 if (new_insn)
18402 current_stub_contents =
18403 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18404 new_insn);
18405 }
18406
18407 /* Only this case requires the base register compensation
18408 subtract. */
18409 if (is_ia_nobang)
18410 {
18411 current_stub_contents =
18412 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18413 create_instruction_sub
18414 (base_reg, base_reg, 4*num_words));
18415 }
18416
18417 /* B initial_insn_addr+4. */
18418 current_stub_contents =
18419 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18420 create_instruction_branch_absolute
18421 (initial_insn_addr - current_stub_contents));
18422 }
18423
18424 /* Fill the remaining of the stub with deterministic contents. */
18425 current_stub_contents =
18426 stm32l4xx_fill_stub_udf (htab, output_bfd,
18427 base_stub_contents, current_stub_contents,
18428 base_stub_contents +
18429 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18430 }
18431
18432 static void
18433 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18434 bfd * output_bfd,
18435 const insn32 wrong_insn,
18436 const bfd_byte *const wrong_insn_addr,
18437 bfd_byte *const stub_contents)
18438 {
18439 if (is_thumb2_ldmia (wrong_insn))
18440 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18441 wrong_insn, wrong_insn_addr,
18442 stub_contents);
18443 else if (is_thumb2_ldmdb (wrong_insn))
18444 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18445 wrong_insn, wrong_insn_addr,
18446 stub_contents);
18447 else if (is_thumb2_vldm (wrong_insn))
18448 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18449 wrong_insn, wrong_insn_addr,
18450 stub_contents);
18451 }
18452
18453 /* End of stm32l4xx work-around. */
18454
18455
18456 /* Do code byteswapping. Return FALSE afterwards so that the section is
18457 written out as normal. */
18458
18459 static bfd_boolean
18460 elf32_arm_write_section (bfd *output_bfd,
18461 struct bfd_link_info *link_info,
18462 asection *sec,
18463 bfd_byte *contents)
18464 {
18465 unsigned int mapcount, errcount;
18466 _arm_elf_section_data *arm_data;
18467 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18468 elf32_arm_section_map *map;
18469 elf32_vfp11_erratum_list *errnode;
18470 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18471 bfd_vma ptr;
18472 bfd_vma end;
18473 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18474 bfd_byte tmp;
18475 unsigned int i;
18476
18477 if (globals == NULL)
18478 return FALSE;
18479
18480 /* If this section has not been allocated an _arm_elf_section_data
18481 structure then we cannot record anything. */
18482 arm_data = get_arm_elf_section_data (sec);
18483 if (arm_data == NULL)
18484 return FALSE;
18485
18486 mapcount = arm_data->mapcount;
18487 map = arm_data->map;
18488 errcount = arm_data->erratumcount;
18489
18490 if (errcount != 0)
18491 {
18492 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18493
18494 for (errnode = arm_data->erratumlist; errnode != 0;
18495 errnode = errnode->next)
18496 {
18497 bfd_vma target = errnode->vma - offset;
18498
18499 switch (errnode->type)
18500 {
18501 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18502 {
18503 bfd_vma branch_to_veneer;
18504 /* Original condition code of instruction, plus bit mask for
18505 ARM B instruction. */
18506 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18507 | 0x0a000000;
18508
18509 /* The instruction is before the label. */
18510 target -= 4;
18511
18512 /* Above offset included in -4 below. */
18513 branch_to_veneer = errnode->u.b.veneer->vma
18514 - errnode->vma - 4;
18515
18516 if ((signed) branch_to_veneer < -(1 << 25)
18517 || (signed) branch_to_veneer >= (1 << 25))
18518 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18519 "range"), output_bfd);
18520
18521 insn |= (branch_to_veneer >> 2) & 0xffffff;
18522 contents[endianflip ^ target] = insn & 0xff;
18523 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18524 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18525 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18526 }
18527 break;
18528
18529 case VFP11_ERRATUM_ARM_VENEER:
18530 {
18531 bfd_vma branch_from_veneer;
18532 unsigned int insn;
18533
18534 /* Take size of veneer into account. */
18535 branch_from_veneer = errnode->u.v.branch->vma
18536 - errnode->vma - 12;
18537
18538 if ((signed) branch_from_veneer < -(1 << 25)
18539 || (signed) branch_from_veneer >= (1 << 25))
18540 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18541 "range"), output_bfd);
18542
18543 /* Original instruction. */
18544 insn = errnode->u.v.branch->u.b.vfp_insn;
18545 contents[endianflip ^ target] = insn & 0xff;
18546 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18547 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18548 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18549
18550 /* Branch back to insn after original insn. */
18551 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18552 contents[endianflip ^ (target + 4)] = insn & 0xff;
18553 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18554 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18555 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18556 }
18557 break;
18558
18559 default:
18560 abort ();
18561 }
18562 }
18563 }
18564
18565 if (arm_data->stm32l4xx_erratumcount != 0)
18566 {
18567 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18568 stm32l4xx_errnode != 0;
18569 stm32l4xx_errnode = stm32l4xx_errnode->next)
18570 {
18571 bfd_vma target = stm32l4xx_errnode->vma - offset;
18572
18573 switch (stm32l4xx_errnode->type)
18574 {
18575 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18576 {
18577 unsigned int insn;
18578 bfd_vma branch_to_veneer =
18579 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18580
18581 if ((signed) branch_to_veneer < -(1 << 24)
18582 || (signed) branch_to_veneer >= (1 << 24))
18583 {
18584 bfd_vma out_of_range =
18585 ((signed) branch_to_veneer < -(1 << 24)) ?
18586 - branch_to_veneer - (1 << 24) :
18587 ((signed) branch_to_veneer >= (1 << 24)) ?
18588 branch_to_veneer - (1 << 24) : 0;
18589
18590 _bfd_error_handler
18591 (_("%B(%#Lx): error: Cannot create STM32L4XX veneer. "
18592 "Jump out of range by %Ld bytes. "
18593 "Cannot encode branch instruction. "),
18594 output_bfd,
18595 stm32l4xx_errnode->vma - 4,
18596 out_of_range);
18597 continue;
18598 }
18599
18600 insn = create_instruction_branch_absolute
18601 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18602
18603 /* The instruction is before the label. */
18604 target -= 4;
18605
18606 put_thumb2_insn (globals, output_bfd,
18607 (bfd_vma) insn, contents + target);
18608 }
18609 break;
18610
18611 case STM32L4XX_ERRATUM_VENEER:
18612 {
18613 bfd_byte * veneer;
18614 bfd_byte * veneer_r;
18615 unsigned int insn;
18616
18617 veneer = contents + target;
18618 veneer_r = veneer
18619 + stm32l4xx_errnode->u.b.veneer->vma
18620 - stm32l4xx_errnode->vma - 4;
18621
18622 if ((signed) (veneer_r - veneer -
18623 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18624 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18625 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18626 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18627 || (signed) (veneer_r - veneer) >= (1 << 24))
18628 {
18629 _bfd_error_handler (_("%B: error: Cannot create STM32L4XX "
18630 "veneer."), output_bfd);
18631 continue;
18632 }
18633
18634 /* Original instruction. */
18635 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18636
18637 stm32l4xx_create_replacing_stub
18638 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18639 }
18640 break;
18641
18642 default:
18643 abort ();
18644 }
18645 }
18646 }
18647
18648 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18649 {
18650 arm_unwind_table_edit *edit_node
18651 = arm_data->u.exidx.unwind_edit_list;
18652 /* Now, sec->size is the size of the section we will write. The original
18653 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18654 markers) was sec->rawsize. (This isn't the case if we perform no
18655 edits, then rawsize will be zero and we should use size). */
18656 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18657 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18658 unsigned int in_index, out_index;
18659 bfd_vma add_to_offsets = 0;
18660
18661 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18662 {
18663 if (edit_node)
18664 {
18665 unsigned int edit_index = edit_node->index;
18666
18667 if (in_index < edit_index && in_index * 8 < input_size)
18668 {
18669 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18670 contents + in_index * 8, add_to_offsets);
18671 out_index++;
18672 in_index++;
18673 }
18674 else if (in_index == edit_index
18675 || (in_index * 8 >= input_size
18676 && edit_index == UINT_MAX))
18677 {
18678 switch (edit_node->type)
18679 {
18680 case DELETE_EXIDX_ENTRY:
18681 in_index++;
18682 add_to_offsets += 8;
18683 break;
18684
18685 case INSERT_EXIDX_CANTUNWIND_AT_END:
18686 {
18687 asection *text_sec = edit_node->linked_section;
18688 bfd_vma text_offset = text_sec->output_section->vma
18689 + text_sec->output_offset
18690 + text_sec->size;
18691 bfd_vma exidx_offset = offset + out_index * 8;
18692 unsigned long prel31_offset;
18693
18694 /* Note: this is meant to be equivalent to an
18695 R_ARM_PREL31 relocation. These synthetic
18696 EXIDX_CANTUNWIND markers are not relocated by the
18697 usual BFD method. */
18698 prel31_offset = (text_offset - exidx_offset)
18699 & 0x7ffffffful;
18700 if (bfd_link_relocatable (link_info))
18701 {
18702 /* Here relocation for new EXIDX_CANTUNWIND is
18703 created, so there is no need to
18704 adjust offset by hand. */
18705 prel31_offset = text_sec->output_offset
18706 + text_sec->size;
18707 }
18708
18709 /* First address we can't unwind. */
18710 bfd_put_32 (output_bfd, prel31_offset,
18711 &edited_contents[out_index * 8]);
18712
18713 /* Code for EXIDX_CANTUNWIND. */
18714 bfd_put_32 (output_bfd, 0x1,
18715 &edited_contents[out_index * 8 + 4]);
18716
18717 out_index++;
18718 add_to_offsets -= 8;
18719 }
18720 break;
18721 }
18722
18723 edit_node = edit_node->next;
18724 }
18725 }
18726 else
18727 {
18728 /* No more edits, copy remaining entries verbatim. */
18729 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18730 contents + in_index * 8, add_to_offsets);
18731 out_index++;
18732 in_index++;
18733 }
18734 }
18735
18736 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18737 bfd_set_section_contents (output_bfd, sec->output_section,
18738 edited_contents,
18739 (file_ptr) sec->output_offset, sec->size);
18740
18741 return TRUE;
18742 }
18743
18744 /* Fix code to point to Cortex-A8 erratum stubs. */
18745 if (globals->fix_cortex_a8)
18746 {
18747 struct a8_branch_to_stub_data data;
18748
18749 data.writing_section = sec;
18750 data.contents = contents;
18751
18752 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18753 & data);
18754 }
18755
18756 if (mapcount == 0)
18757 return FALSE;
18758
18759 if (globals->byteswap_code)
18760 {
18761 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18762
18763 ptr = map[0].vma;
18764 for (i = 0; i < mapcount; i++)
18765 {
18766 if (i == mapcount - 1)
18767 end = sec->size;
18768 else
18769 end = map[i + 1].vma;
18770
18771 switch (map[i].type)
18772 {
18773 case 'a':
18774 /* Byte swap code words. */
18775 while (ptr + 3 < end)
18776 {
18777 tmp = contents[ptr];
18778 contents[ptr] = contents[ptr + 3];
18779 contents[ptr + 3] = tmp;
18780 tmp = contents[ptr + 1];
18781 contents[ptr + 1] = contents[ptr + 2];
18782 contents[ptr + 2] = tmp;
18783 ptr += 4;
18784 }
18785 break;
18786
18787 case 't':
18788 /* Byte swap code halfwords. */
18789 while (ptr + 1 < end)
18790 {
18791 tmp = contents[ptr];
18792 contents[ptr] = contents[ptr + 1];
18793 contents[ptr + 1] = tmp;
18794 ptr += 2;
18795 }
18796 break;
18797
18798 case 'd':
18799 /* Leave data alone. */
18800 break;
18801 }
18802 ptr = end;
18803 }
18804 }
18805
18806 free (map);
18807 arm_data->mapcount = -1;
18808 arm_data->mapsize = 0;
18809 arm_data->map = NULL;
18810
18811 return FALSE;
18812 }
18813
18814 /* Mangle thumb function symbols as we read them in. */
18815
18816 static bfd_boolean
18817 elf32_arm_swap_symbol_in (bfd * abfd,
18818 const void *psrc,
18819 const void *pshn,
18820 Elf_Internal_Sym *dst)
18821 {
18822 Elf_Internal_Shdr *symtab_hdr;
18823 const char *name = NULL;
18824
18825 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18826 return FALSE;
18827 dst->st_target_internal = 0;
18828
18829 /* New EABI objects mark thumb function symbols by setting the low bit of
18830 the address. */
18831 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18832 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18833 {
18834 if (dst->st_value & 1)
18835 {
18836 dst->st_value &= ~(bfd_vma) 1;
18837 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18838 ST_BRANCH_TO_THUMB);
18839 }
18840 else
18841 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18842 }
18843 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18844 {
18845 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18846 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18847 }
18848 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18849 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18850 else
18851 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18852
18853 /* Mark CMSE special symbols. */
18854 symtab_hdr = & elf_symtab_hdr (abfd);
18855 if (symtab_hdr->sh_size)
18856 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18857 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18858 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18859
18860 return TRUE;
18861 }
18862
18863
18864 /* Mangle thumb function symbols as we write them out. */
18865
18866 static void
18867 elf32_arm_swap_symbol_out (bfd *abfd,
18868 const Elf_Internal_Sym *src,
18869 void *cdst,
18870 void *shndx)
18871 {
18872 Elf_Internal_Sym newsym;
18873
18874 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18875 of the address set, as per the new EABI. We do this unconditionally
18876 because objcopy does not set the elf header flags until after
18877 it writes out the symbol table. */
18878 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18879 {
18880 newsym = *src;
18881 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18882 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18883 if (newsym.st_shndx != SHN_UNDEF)
18884 {
18885 /* Do this only for defined symbols. At link type, the static
18886 linker will simulate the work of dynamic linker of resolving
18887 symbols and will carry over the thumbness of found symbols to
18888 the output symbol table. It's not clear how it happens, but
18889 the thumbness of undefined symbols can well be different at
18890 runtime, and writing '1' for them will be confusing for users
18891 and possibly for dynamic linker itself.
18892 */
18893 newsym.st_value |= 1;
18894 }
18895
18896 src = &newsym;
18897 }
18898 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18899 }
18900
18901 /* Add the PT_ARM_EXIDX program header. */
18902
18903 static bfd_boolean
18904 elf32_arm_modify_segment_map (bfd *abfd,
18905 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18906 {
18907 struct elf_segment_map *m;
18908 asection *sec;
18909
18910 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18911 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18912 {
18913 /* If there is already a PT_ARM_EXIDX header, then we do not
18914 want to add another one. This situation arises when running
18915 "strip"; the input binary already has the header. */
18916 m = elf_seg_map (abfd);
18917 while (m && m->p_type != PT_ARM_EXIDX)
18918 m = m->next;
18919 if (!m)
18920 {
18921 m = (struct elf_segment_map *)
18922 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18923 if (m == NULL)
18924 return FALSE;
18925 m->p_type = PT_ARM_EXIDX;
18926 m->count = 1;
18927 m->sections[0] = sec;
18928
18929 m->next = elf_seg_map (abfd);
18930 elf_seg_map (abfd) = m;
18931 }
18932 }
18933
18934 return TRUE;
18935 }
18936
18937 /* We may add a PT_ARM_EXIDX program header. */
18938
18939 static int
18940 elf32_arm_additional_program_headers (bfd *abfd,
18941 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18942 {
18943 asection *sec;
18944
18945 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18946 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18947 return 1;
18948 else
18949 return 0;
18950 }
18951
18952 /* Hook called by the linker routine which adds symbols from an object
18953 file. */
18954
18955 static bfd_boolean
18956 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18957 Elf_Internal_Sym *sym, const char **namep,
18958 flagword *flagsp, asection **secp, bfd_vma *valp)
18959 {
18960 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18961 && (abfd->flags & DYNAMIC) == 0
18962 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18963 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18964
18965 if (elf32_arm_hash_table (info) == NULL)
18966 return FALSE;
18967
18968 if (elf32_arm_hash_table (info)->vxworks_p
18969 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18970 flagsp, secp, valp))
18971 return FALSE;
18972
18973 return TRUE;
18974 }
18975
18976 /* We use this to override swap_symbol_in and swap_symbol_out. */
18977 const struct elf_size_info elf32_arm_size_info =
18978 {
18979 sizeof (Elf32_External_Ehdr),
18980 sizeof (Elf32_External_Phdr),
18981 sizeof (Elf32_External_Shdr),
18982 sizeof (Elf32_External_Rel),
18983 sizeof (Elf32_External_Rela),
18984 sizeof (Elf32_External_Sym),
18985 sizeof (Elf32_External_Dyn),
18986 sizeof (Elf_External_Note),
18987 4,
18988 1,
18989 32, 2,
18990 ELFCLASS32, EV_CURRENT,
18991 bfd_elf32_write_out_phdrs,
18992 bfd_elf32_write_shdrs_and_ehdr,
18993 bfd_elf32_checksum_contents,
18994 bfd_elf32_write_relocs,
18995 elf32_arm_swap_symbol_in,
18996 elf32_arm_swap_symbol_out,
18997 bfd_elf32_slurp_reloc_table,
18998 bfd_elf32_slurp_symbol_table,
18999 bfd_elf32_swap_dyn_in,
19000 bfd_elf32_swap_dyn_out,
19001 bfd_elf32_swap_reloc_in,
19002 bfd_elf32_swap_reloc_out,
19003 bfd_elf32_swap_reloca_in,
19004 bfd_elf32_swap_reloca_out
19005 };
19006
19007 static bfd_vma
19008 read_code32 (const bfd *abfd, const bfd_byte *addr)
19009 {
19010 /* V7 BE8 code is always little endian. */
19011 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19012 return bfd_getl32 (addr);
19013
19014 return bfd_get_32 (abfd, addr);
19015 }
19016
19017 static bfd_vma
19018 read_code16 (const bfd *abfd, const bfd_byte *addr)
19019 {
19020 /* V7 BE8 code is always little endian. */
19021 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19022 return bfd_getl16 (addr);
19023
19024 return bfd_get_16 (abfd, addr);
19025 }
19026
19027 /* Return size of plt0 entry starting at ADDR
19028 or (bfd_vma) -1 if size can not be determined. */
19029
19030 static bfd_vma
19031 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19032 {
19033 bfd_vma first_word;
19034 bfd_vma plt0_size;
19035
19036 first_word = read_code32 (abfd, addr);
19037
19038 if (first_word == elf32_arm_plt0_entry[0])
19039 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19040 else if (first_word == elf32_thumb2_plt0_entry[0])
19041 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19042 else
19043 /* We don't yet handle this PLT format. */
19044 return (bfd_vma) -1;
19045
19046 return plt0_size;
19047 }
19048
19049 /* Return size of plt entry starting at offset OFFSET
19050 of plt section located at address START
19051 or (bfd_vma) -1 if size can not be determined. */
19052
19053 static bfd_vma
19054 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19055 {
19056 bfd_vma first_insn;
19057 bfd_vma plt_size = 0;
19058 const bfd_byte *addr = start + offset;
19059
19060 /* PLT entry size if fixed on Thumb-only platforms. */
19061 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19062 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19063
19064 /* Respect Thumb stub if necessary. */
19065 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19066 {
19067 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19068 }
19069
19070 /* Strip immediate from first add. */
19071 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19072
19073 #ifdef FOUR_WORD_PLT
19074 if (first_insn == elf32_arm_plt_entry[0])
19075 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19076 #else
19077 if (first_insn == elf32_arm_plt_entry_long[0])
19078 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19079 else if (first_insn == elf32_arm_plt_entry_short[0])
19080 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19081 #endif
19082 else
19083 /* We don't yet handle this PLT format. */
19084 return (bfd_vma) -1;
19085
19086 return plt_size;
19087 }
19088
19089 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19090
19091 static long
19092 elf32_arm_get_synthetic_symtab (bfd *abfd,
19093 long symcount ATTRIBUTE_UNUSED,
19094 asymbol **syms ATTRIBUTE_UNUSED,
19095 long dynsymcount,
19096 asymbol **dynsyms,
19097 asymbol **ret)
19098 {
19099 asection *relplt;
19100 asymbol *s;
19101 arelent *p;
19102 long count, i, n;
19103 size_t size;
19104 Elf_Internal_Shdr *hdr;
19105 char *names;
19106 asection *plt;
19107 bfd_vma offset;
19108 bfd_byte *data;
19109
19110 *ret = NULL;
19111
19112 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19113 return 0;
19114
19115 if (dynsymcount <= 0)
19116 return 0;
19117
19118 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19119 if (relplt == NULL)
19120 return 0;
19121
19122 hdr = &elf_section_data (relplt)->this_hdr;
19123 if (hdr->sh_link != elf_dynsymtab (abfd)
19124 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19125 return 0;
19126
19127 plt = bfd_get_section_by_name (abfd, ".plt");
19128 if (plt == NULL)
19129 return 0;
19130
19131 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19132 return -1;
19133
19134 data = plt->contents;
19135 if (data == NULL)
19136 {
19137 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19138 return -1;
19139 bfd_cache_section_contents((asection *) plt, data);
19140 }
19141
19142 count = relplt->size / hdr->sh_entsize;
19143 size = count * sizeof (asymbol);
19144 p = relplt->relocation;
19145 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19146 {
19147 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19148 if (p->addend != 0)
19149 size += sizeof ("+0x") - 1 + 8;
19150 }
19151
19152 s = *ret = (asymbol *) bfd_malloc (size);
19153 if (s == NULL)
19154 return -1;
19155
19156 offset = elf32_arm_plt0_size (abfd, data);
19157 if (offset == (bfd_vma) -1)
19158 return -1;
19159
19160 names = (char *) (s + count);
19161 p = relplt->relocation;
19162 n = 0;
19163 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19164 {
19165 size_t len;
19166
19167 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19168 if (plt_size == (bfd_vma) -1)
19169 break;
19170
19171 *s = **p->sym_ptr_ptr;
19172 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19173 we are defining a symbol, ensure one of them is set. */
19174 if ((s->flags & BSF_LOCAL) == 0)
19175 s->flags |= BSF_GLOBAL;
19176 s->flags |= BSF_SYNTHETIC;
19177 s->section = plt;
19178 s->value = offset;
19179 s->name = names;
19180 s->udata.p = NULL;
19181 len = strlen ((*p->sym_ptr_ptr)->name);
19182 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19183 names += len;
19184 if (p->addend != 0)
19185 {
19186 char buf[30], *a;
19187
19188 memcpy (names, "+0x", sizeof ("+0x") - 1);
19189 names += sizeof ("+0x") - 1;
19190 bfd_sprintf_vma (abfd, buf, p->addend);
19191 for (a = buf; *a == '0'; ++a)
19192 ;
19193 len = strlen (a);
19194 memcpy (names, a, len);
19195 names += len;
19196 }
19197 memcpy (names, "@plt", sizeof ("@plt"));
19198 names += sizeof ("@plt");
19199 ++s, ++n;
19200 offset += plt_size;
19201 }
19202
19203 return n;
19204 }
19205
19206 static bfd_boolean
19207 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19208 {
19209 if (hdr->sh_flags & SHF_ARM_PURECODE)
19210 *flags |= SEC_ELF_PURECODE;
19211 return TRUE;
19212 }
19213
19214 static flagword
19215 elf32_arm_lookup_section_flags (char *flag_name)
19216 {
19217 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19218 return SHF_ARM_PURECODE;
19219
19220 return SEC_NO_FLAGS;
19221 }
19222
19223 static unsigned int
19224 elf32_arm_count_additional_relocs (asection *sec)
19225 {
19226 struct _arm_elf_section_data *arm_data;
19227 arm_data = get_arm_elf_section_data (sec);
19228
19229 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19230 }
19231
19232 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19233 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19234 FALSE otherwise. ISECTION is the best guess matching section from the
19235 input bfd IBFD, but it might be NULL. */
19236
19237 static bfd_boolean
19238 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19239 bfd *obfd ATTRIBUTE_UNUSED,
19240 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19241 Elf_Internal_Shdr *osection)
19242 {
19243 switch (osection->sh_type)
19244 {
19245 case SHT_ARM_EXIDX:
19246 {
19247 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19248 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19249 unsigned i = 0;
19250
19251 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19252 osection->sh_info = 0;
19253
19254 /* The sh_link field must be set to the text section associated with
19255 this index section. Unfortunately the ARM EHABI does not specify
19256 exactly how to determine this association. Our caller does try
19257 to match up OSECTION with its corresponding input section however
19258 so that is a good first guess. */
19259 if (isection != NULL
19260 && osection->bfd_section != NULL
19261 && isection->bfd_section != NULL
19262 && isection->bfd_section->output_section != NULL
19263 && isection->bfd_section->output_section == osection->bfd_section
19264 && iheaders != NULL
19265 && isection->sh_link > 0
19266 && isection->sh_link < elf_numsections (ibfd)
19267 && iheaders[isection->sh_link]->bfd_section != NULL
19268 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19269 )
19270 {
19271 for (i = elf_numsections (obfd); i-- > 0;)
19272 if (oheaders[i]->bfd_section
19273 == iheaders[isection->sh_link]->bfd_section->output_section)
19274 break;
19275 }
19276
19277 if (i == 0)
19278 {
19279 /* Failing that we have to find a matching section ourselves. If
19280 we had the output section name available we could compare that
19281 with input section names. Unfortunately we don't. So instead
19282 we use a simple heuristic and look for the nearest executable
19283 section before this one. */
19284 for (i = elf_numsections (obfd); i-- > 0;)
19285 if (oheaders[i] == osection)
19286 break;
19287 if (i == 0)
19288 break;
19289
19290 while (i-- > 0)
19291 if (oheaders[i]->sh_type == SHT_PROGBITS
19292 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19293 == (SHF_ALLOC | SHF_EXECINSTR))
19294 break;
19295 }
19296
19297 if (i)
19298 {
19299 osection->sh_link = i;
19300 /* If the text section was part of a group
19301 then the index section should be too. */
19302 if (oheaders[i]->sh_flags & SHF_GROUP)
19303 osection->sh_flags |= SHF_GROUP;
19304 return TRUE;
19305 }
19306 }
19307 break;
19308
19309 case SHT_ARM_PREEMPTMAP:
19310 osection->sh_flags = SHF_ALLOC;
19311 break;
19312
19313 case SHT_ARM_ATTRIBUTES:
19314 case SHT_ARM_DEBUGOVERLAY:
19315 case SHT_ARM_OVERLAYSECTION:
19316 default:
19317 break;
19318 }
19319
19320 return FALSE;
19321 }
19322
19323 /* Returns TRUE if NAME is an ARM mapping symbol.
19324 Traditionally the symbols $a, $d and $t have been used.
19325 The ARM ELF standard also defines $x (for A64 code). It also allows a
19326 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19327 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19328 not support them here. $t.x indicates the start of ThumbEE instructions. */
19329
19330 static bfd_boolean
19331 is_arm_mapping_symbol (const char * name)
19332 {
19333 return name != NULL /* Paranoia. */
19334 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19335 the mapping symbols could have acquired a prefix.
19336 We do not support this here, since such symbols no
19337 longer conform to the ARM ELF ABI. */
19338 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19339 && (name[2] == 0 || name[2] == '.');
19340 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19341 any characters that follow the period are legal characters for the body
19342 of a symbol's name. For now we just assume that this is the case. */
19343 }
19344
19345 /* Make sure that mapping symbols in object files are not removed via the
19346 "strip --strip-unneeded" tool. These symbols are needed in order to
19347 correctly generate interworking veneers, and for byte swapping code
19348 regions. Once an object file has been linked, it is safe to remove the
19349 symbols as they will no longer be needed. */
19350
19351 static void
19352 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19353 {
19354 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19355 && sym->section != bfd_abs_section_ptr
19356 && is_arm_mapping_symbol (sym->name))
19357 sym->flags |= BSF_KEEP;
19358 }
19359
19360 #undef elf_backend_copy_special_section_fields
19361 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19362
19363 #define ELF_ARCH bfd_arch_arm
19364 #define ELF_TARGET_ID ARM_ELF_DATA
19365 #define ELF_MACHINE_CODE EM_ARM
19366 #ifdef __QNXTARGET__
19367 #define ELF_MAXPAGESIZE 0x1000
19368 #else
19369 #define ELF_MAXPAGESIZE 0x10000
19370 #endif
19371 #define ELF_MINPAGESIZE 0x1000
19372 #define ELF_COMMONPAGESIZE 0x1000
19373
19374 #define bfd_elf32_mkobject elf32_arm_mkobject
19375
19376 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19377 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19378 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19379 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19380 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19381 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19382 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19383 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19384 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19385 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19386 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19387 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19388 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19389
19390 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19391 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19392 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19393 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19394 #define elf_backend_check_relocs elf32_arm_check_relocs
19395 #define elf_backend_update_relocs elf32_arm_update_relocs
19396 #define elf_backend_relocate_section elf32_arm_relocate_section
19397 #define elf_backend_write_section elf32_arm_write_section
19398 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19399 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19400 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19401 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19402 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19403 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19404 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19405 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19406 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19407 #define elf_backend_object_p elf32_arm_object_p
19408 #define elf_backend_fake_sections elf32_arm_fake_sections
19409 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19410 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19411 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19412 #define elf_backend_size_info elf32_arm_size_info
19413 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19414 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19415 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19416 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19417 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19418 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19419 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19420 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19421
19422 #define elf_backend_can_refcount 1
19423 #define elf_backend_can_gc_sections 1
19424 #define elf_backend_plt_readonly 1
19425 #define elf_backend_want_got_plt 1
19426 #define elf_backend_want_plt_sym 0
19427 #define elf_backend_want_dynrelro 1
19428 #define elf_backend_may_use_rel_p 1
19429 #define elf_backend_may_use_rela_p 0
19430 #define elf_backend_default_use_rela_p 0
19431 #define elf_backend_dtrel_excludes_plt 1
19432
19433 #define elf_backend_got_header_size 12
19434 #define elf_backend_extern_protected_data 1
19435
19436 #undef elf_backend_obj_attrs_vendor
19437 #define elf_backend_obj_attrs_vendor "aeabi"
19438 #undef elf_backend_obj_attrs_section
19439 #define elf_backend_obj_attrs_section ".ARM.attributes"
19440 #undef elf_backend_obj_attrs_arg_type
19441 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19442 #undef elf_backend_obj_attrs_section_type
19443 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19444 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19445 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19446
19447 #undef elf_backend_section_flags
19448 #define elf_backend_section_flags elf32_arm_section_flags
19449 #undef elf_backend_lookup_section_flags_hook
19450 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19451
19452 #include "elf32-target.h"
19453
19454 /* Native Client targets. */
19455
19456 #undef TARGET_LITTLE_SYM
19457 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19458 #undef TARGET_LITTLE_NAME
19459 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19460 #undef TARGET_BIG_SYM
19461 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19462 #undef TARGET_BIG_NAME
19463 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19464
19465 /* Like elf32_arm_link_hash_table_create -- but overrides
19466 appropriately for NaCl. */
19467
19468 static struct bfd_link_hash_table *
19469 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19470 {
19471 struct bfd_link_hash_table *ret;
19472
19473 ret = elf32_arm_link_hash_table_create (abfd);
19474 if (ret)
19475 {
19476 struct elf32_arm_link_hash_table *htab
19477 = (struct elf32_arm_link_hash_table *) ret;
19478
19479 htab->nacl_p = 1;
19480
19481 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19482 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19483 }
19484 return ret;
19485 }
19486
19487 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19488 really need to use elf32_arm_modify_segment_map. But we do it
19489 anyway just to reduce gratuitous differences with the stock ARM backend. */
19490
19491 static bfd_boolean
19492 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19493 {
19494 return (elf32_arm_modify_segment_map (abfd, info)
19495 && nacl_modify_segment_map (abfd, info));
19496 }
19497
19498 static void
19499 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19500 {
19501 elf32_arm_final_write_processing (abfd, linker);
19502 nacl_final_write_processing (abfd, linker);
19503 }
19504
19505 static bfd_vma
19506 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19507 const arelent *rel ATTRIBUTE_UNUSED)
19508 {
19509 return plt->vma
19510 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19511 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19512 }
19513
19514 #undef elf32_bed
19515 #define elf32_bed elf32_arm_nacl_bed
19516 #undef bfd_elf32_bfd_link_hash_table_create
19517 #define bfd_elf32_bfd_link_hash_table_create \
19518 elf32_arm_nacl_link_hash_table_create
19519 #undef elf_backend_plt_alignment
19520 #define elf_backend_plt_alignment 4
19521 #undef elf_backend_modify_segment_map
19522 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19523 #undef elf_backend_modify_program_headers
19524 #define elf_backend_modify_program_headers nacl_modify_program_headers
19525 #undef elf_backend_final_write_processing
19526 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19527 #undef bfd_elf32_get_synthetic_symtab
19528 #undef elf_backend_plt_sym_val
19529 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19530 #undef elf_backend_copy_special_section_fields
19531
19532 #undef ELF_MINPAGESIZE
19533 #undef ELF_COMMONPAGESIZE
19534
19535
19536 #include "elf32-target.h"
19537
19538 /* Reset to defaults. */
19539 #undef elf_backend_plt_alignment
19540 #undef elf_backend_modify_segment_map
19541 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19542 #undef elf_backend_modify_program_headers
19543 #undef elf_backend_final_write_processing
19544 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19545 #undef ELF_MINPAGESIZE
19546 #define ELF_MINPAGESIZE 0x1000
19547 #undef ELF_COMMONPAGESIZE
19548 #define ELF_COMMONPAGESIZE 0x1000
19549
19550
19551 /* VxWorks Targets. */
19552
19553 #undef TARGET_LITTLE_SYM
19554 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19555 #undef TARGET_LITTLE_NAME
19556 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19557 #undef TARGET_BIG_SYM
19558 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19559 #undef TARGET_BIG_NAME
19560 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19561
19562 /* Like elf32_arm_link_hash_table_create -- but overrides
19563 appropriately for VxWorks. */
19564
19565 static struct bfd_link_hash_table *
19566 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19567 {
19568 struct bfd_link_hash_table *ret;
19569
19570 ret = elf32_arm_link_hash_table_create (abfd);
19571 if (ret)
19572 {
19573 struct elf32_arm_link_hash_table *htab
19574 = (struct elf32_arm_link_hash_table *) ret;
19575 htab->use_rel = 0;
19576 htab->vxworks_p = 1;
19577 }
19578 return ret;
19579 }
19580
19581 static void
19582 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19583 {
19584 elf32_arm_final_write_processing (abfd, linker);
19585 elf_vxworks_final_write_processing (abfd, linker);
19586 }
19587
19588 #undef elf32_bed
19589 #define elf32_bed elf32_arm_vxworks_bed
19590
19591 #undef bfd_elf32_bfd_link_hash_table_create
19592 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19593 #undef elf_backend_final_write_processing
19594 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19595 #undef elf_backend_emit_relocs
19596 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19597
19598 #undef elf_backend_may_use_rel_p
19599 #define elf_backend_may_use_rel_p 0
19600 #undef elf_backend_may_use_rela_p
19601 #define elf_backend_may_use_rela_p 1
19602 #undef elf_backend_default_use_rela_p
19603 #define elf_backend_default_use_rela_p 1
19604 #undef elf_backend_want_plt_sym
19605 #define elf_backend_want_plt_sym 1
19606 #undef ELF_MAXPAGESIZE
19607 #define ELF_MAXPAGESIZE 0x1000
19608
19609 #include "elf32-target.h"
19610
19611
19612 /* Merge backend specific data from an object file to the output
19613 object file when linking. */
19614
19615 static bfd_boolean
19616 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
19617 {
19618 bfd *obfd = info->output_bfd;
19619 flagword out_flags;
19620 flagword in_flags;
19621 bfd_boolean flags_compatible = TRUE;
19622 asection *sec;
19623
19624 /* Check if we have the same endianness. */
19625 if (! _bfd_generic_verify_endian_match (ibfd, info))
19626 return FALSE;
19627
19628 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19629 return TRUE;
19630
19631 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
19632 return FALSE;
19633
19634 /* The input BFD must have had its flags initialised. */
19635 /* The following seems bogus to me -- The flags are initialized in
19636 the assembler but I don't think an elf_flags_init field is
19637 written into the object. */
19638 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19639
19640 in_flags = elf_elfheader (ibfd)->e_flags;
19641 out_flags = elf_elfheader (obfd)->e_flags;
19642
19643 /* In theory there is no reason why we couldn't handle this. However
19644 in practice it isn't even close to working and there is no real
19645 reason to want it. */
19646 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19647 && !(ibfd->flags & DYNAMIC)
19648 && (in_flags & EF_ARM_BE8))
19649 {
19650 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19651 ibfd);
19652 return FALSE;
19653 }
19654
19655 if (!elf_flags_init (obfd))
19656 {
19657 /* If the input is the default architecture and had the default
19658 flags then do not bother setting the flags for the output
19659 architecture, instead allow future merges to do this. If no
19660 future merges ever set these flags then they will retain their
19661 uninitialised values, which surprise surprise, correspond
19662 to the default values. */
19663 if (bfd_get_arch_info (ibfd)->the_default
19664 && elf_elfheader (ibfd)->e_flags == 0)
19665 return TRUE;
19666
19667 elf_flags_init (obfd) = TRUE;
19668 elf_elfheader (obfd)->e_flags = in_flags;
19669
19670 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19671 && bfd_get_arch_info (obfd)->the_default)
19672 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19673
19674 return TRUE;
19675 }
19676
19677 /* Determine what should happen if the input ARM architecture
19678 does not match the output ARM architecture. */
19679 if (! bfd_arm_merge_machines (ibfd, obfd))
19680 return FALSE;
19681
19682 /* Identical flags must be compatible. */
19683 if (in_flags == out_flags)
19684 return TRUE;
19685
19686 /* Check to see if the input BFD actually contains any sections. If
19687 not, its flags may not have been initialised either, but it
19688 cannot actually cause any incompatiblity. Do not short-circuit
19689 dynamic objects; their section list may be emptied by
19690 elf_link_add_object_symbols.
19691
19692 Also check to see if there are no code sections in the input.
19693 In this case there is no need to check for code specific flags.
19694 XXX - do we need to worry about floating-point format compatability
19695 in data sections ? */
19696 if (!(ibfd->flags & DYNAMIC))
19697 {
19698 bfd_boolean null_input_bfd = TRUE;
19699 bfd_boolean only_data_sections = TRUE;
19700
19701 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19702 {
19703 /* Ignore synthetic glue sections. */
19704 if (strcmp (sec->name, ".glue_7")
19705 && strcmp (sec->name, ".glue_7t"))
19706 {
19707 if ((bfd_get_section_flags (ibfd, sec)
19708 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19709 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19710 only_data_sections = FALSE;
19711
19712 null_input_bfd = FALSE;
19713 break;
19714 }
19715 }
19716
19717 if (null_input_bfd || only_data_sections)
19718 return TRUE;
19719 }
19720
19721 /* Complain about various flag mismatches. */
19722 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19723 EF_ARM_EABI_VERSION (out_flags)))
19724 {
19725 _bfd_error_handler
19726 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19727 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
19728 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
19729 return FALSE;
19730 }
19731
19732 /* Not sure what needs to be checked for EABI versions >= 1. */
19733 /* VxWorks libraries do not use these flags. */
19734 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19735 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19736 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19737 {
19738 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19739 {
19740 _bfd_error_handler
19741 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19742 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
19743 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
19744 flags_compatible = FALSE;
19745 }
19746
19747 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19748 {
19749 if (in_flags & EF_ARM_APCS_FLOAT)
19750 _bfd_error_handler
19751 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19752 ibfd, obfd);
19753 else
19754 _bfd_error_handler
19755 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19756 ibfd, obfd);
19757
19758 flags_compatible = FALSE;
19759 }
19760
19761 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19762 {
19763 if (in_flags & EF_ARM_VFP_FLOAT)
19764 _bfd_error_handler
19765 (_("error: %B uses VFP instructions, whereas %B does not"),
19766 ibfd, obfd);
19767 else
19768 _bfd_error_handler
19769 (_("error: %B uses FPA instructions, whereas %B does not"),
19770 ibfd, obfd);
19771
19772 flags_compatible = FALSE;
19773 }
19774
19775 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19776 {
19777 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19778 _bfd_error_handler
19779 (_("error: %B uses Maverick instructions, whereas %B does not"),
19780 ibfd, obfd);
19781 else
19782 _bfd_error_handler
19783 (_("error: %B does not use Maverick instructions, whereas %B does"),
19784 ibfd, obfd);
19785
19786 flags_compatible = FALSE;
19787 }
19788
19789 #ifdef EF_ARM_SOFT_FLOAT
19790 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19791 {
19792 /* We can allow interworking between code that is VFP format
19793 layout, and uses either soft float or integer regs for
19794 passing floating point arguments and results. We already
19795 know that the APCS_FLOAT flags match; similarly for VFP
19796 flags. */
19797 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19798 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19799 {
19800 if (in_flags & EF_ARM_SOFT_FLOAT)
19801 _bfd_error_handler
19802 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19803 ibfd, obfd);
19804 else
19805 _bfd_error_handler
19806 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19807 ibfd, obfd);
19808
19809 flags_compatible = FALSE;
19810 }
19811 }
19812 #endif
19813
19814 /* Interworking mismatch is only a warning. */
19815 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19816 {
19817 if (in_flags & EF_ARM_INTERWORK)
19818 {
19819 _bfd_error_handler
19820 (_("Warning: %B supports interworking, whereas %B does not"),
19821 ibfd, obfd);
19822 }
19823 else
19824 {
19825 _bfd_error_handler
19826 (_("Warning: %B does not support interworking, whereas %B does"),
19827 ibfd, obfd);
19828 }
19829 }
19830 }
19831
19832 return flags_compatible;
19833 }
19834
19835
19836 /* Symbian OS Targets. */
19837
19838 #undef TARGET_LITTLE_SYM
19839 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19840 #undef TARGET_LITTLE_NAME
19841 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19842 #undef TARGET_BIG_SYM
19843 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19844 #undef TARGET_BIG_NAME
19845 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19846
19847 /* Like elf32_arm_link_hash_table_create -- but overrides
19848 appropriately for Symbian OS. */
19849
19850 static struct bfd_link_hash_table *
19851 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19852 {
19853 struct bfd_link_hash_table *ret;
19854
19855 ret = elf32_arm_link_hash_table_create (abfd);
19856 if (ret)
19857 {
19858 struct elf32_arm_link_hash_table *htab
19859 = (struct elf32_arm_link_hash_table *)ret;
19860 /* There is no PLT header for Symbian OS. */
19861 htab->plt_header_size = 0;
19862 /* The PLT entries are each one instruction and one word. */
19863 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19864 htab->symbian_p = 1;
19865 /* Symbian uses armv5t or above, so use_blx is always true. */
19866 htab->use_blx = 1;
19867 htab->root.is_relocatable_executable = 1;
19868 }
19869 return ret;
19870 }
19871
19872 static const struct bfd_elf_special_section
19873 elf32_arm_symbian_special_sections[] =
19874 {
19875 /* In a BPABI executable, the dynamic linking sections do not go in
19876 the loadable read-only segment. The post-linker may wish to
19877 refer to these sections, but they are not part of the final
19878 program image. */
19879 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19880 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19881 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19882 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19883 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19884 /* These sections do not need to be writable as the SymbianOS
19885 postlinker will arrange things so that no dynamic relocation is
19886 required. */
19887 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19888 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19889 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19890 { NULL, 0, 0, 0, 0 }
19891 };
19892
19893 static void
19894 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19895 struct bfd_link_info *link_info)
19896 {
19897 /* BPABI objects are never loaded directly by an OS kernel; they are
19898 processed by a postlinker first, into an OS-specific format. If
19899 the D_PAGED bit is set on the file, BFD will align segments on
19900 page boundaries, so that an OS can directly map the file. With
19901 BPABI objects, that just results in wasted space. In addition,
19902 because we clear the D_PAGED bit, map_sections_to_segments will
19903 recognize that the program headers should not be mapped into any
19904 loadable segment. */
19905 abfd->flags &= ~D_PAGED;
19906 elf32_arm_begin_write_processing (abfd, link_info);
19907 }
19908
19909 static bfd_boolean
19910 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19911 struct bfd_link_info *info)
19912 {
19913 struct elf_segment_map *m;
19914 asection *dynsec;
19915
19916 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19917 segment. However, because the .dynamic section is not marked
19918 with SEC_LOAD, the generic ELF code will not create such a
19919 segment. */
19920 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19921 if (dynsec)
19922 {
19923 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19924 if (m->p_type == PT_DYNAMIC)
19925 break;
19926
19927 if (m == NULL)
19928 {
19929 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19930 m->next = elf_seg_map (abfd);
19931 elf_seg_map (abfd) = m;
19932 }
19933 }
19934
19935 /* Also call the generic arm routine. */
19936 return elf32_arm_modify_segment_map (abfd, info);
19937 }
19938
19939 /* Return address for Ith PLT stub in section PLT, for relocation REL
19940 or (bfd_vma) -1 if it should not be included. */
19941
19942 static bfd_vma
19943 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19944 const arelent *rel ATTRIBUTE_UNUSED)
19945 {
19946 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19947 }
19948
19949 #undef elf32_bed
19950 #define elf32_bed elf32_arm_symbian_bed
19951
19952 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19953 will process them and then discard them. */
19954 #undef ELF_DYNAMIC_SEC_FLAGS
19955 #define ELF_DYNAMIC_SEC_FLAGS \
19956 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19957
19958 #undef elf_backend_emit_relocs
19959
19960 #undef bfd_elf32_bfd_link_hash_table_create
19961 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19962 #undef elf_backend_special_sections
19963 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19964 #undef elf_backend_begin_write_processing
19965 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19966 #undef elf_backend_final_write_processing
19967 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19968
19969 #undef elf_backend_modify_segment_map
19970 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19971
19972 /* There is no .got section for BPABI objects, and hence no header. */
19973 #undef elf_backend_got_header_size
19974 #define elf_backend_got_header_size 0
19975
19976 /* Similarly, there is no .got.plt section. */
19977 #undef elf_backend_want_got_plt
19978 #define elf_backend_want_got_plt 0
19979
19980 #undef elf_backend_plt_sym_val
19981 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19982
19983 #undef elf_backend_may_use_rel_p
19984 #define elf_backend_may_use_rel_p 1
19985 #undef elf_backend_may_use_rela_p
19986 #define elf_backend_may_use_rela_p 0
19987 #undef elf_backend_default_use_rela_p
19988 #define elf_backend_default_use_rela_p 0
19989 #undef elf_backend_want_plt_sym
19990 #define elf_backend_want_plt_sym 0
19991 #undef elf_backend_dtrel_excludes_plt
19992 #define elf_backend_dtrel_excludes_plt 0
19993 #undef ELF_MAXPAGESIZE
19994 #define ELF_MAXPAGESIZE 0x8000
19995
19996 #include "elf32-target.h"
GDB Binutils - Deliverables
This page took 0.408188 seconds and 5 git commands to generate.