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[ARM] FDPIC: Make _GLOBAL_OFFSET_TABLE_ a relative symbol
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2018 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto NULL
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[8] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE), /* pcrel_offset */
1764 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1765 0, /* rightshift */
1766 2, /* size (0 = byte, 1 = short, 2 = long) */
1767 32, /* bitsize */
1768 FALSE, /* pc_relative */
1769 0, /* bitpos */
1770 complain_overflow_bitfield,/* complain_on_overflow */
1771 bfd_elf_generic_reloc, /* special_function */
1772 "R_ARM_GOTFUNCDESC", /* name */
1773 FALSE, /* partial_inplace */
1774 0, /* src_mask */
1775 0xffffffff, /* dst_mask */
1776 FALSE), /* pcrel_offset */
1777 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1778 0, /* rightshift */
1779 2, /* size (0 = byte, 1 = short, 2 = long) */
1780 32, /* bitsize */
1781 FALSE, /* pc_relative */
1782 0, /* bitpos */
1783 complain_overflow_bitfield,/* complain_on_overflow */
1784 bfd_elf_generic_reloc, /* special_function */
1785 "R_ARM_GOTOFFFUNCDESC",/* name */
1786 FALSE, /* partial_inplace */
1787 0, /* src_mask */
1788 0xffffffff, /* dst_mask */
1789 FALSE), /* pcrel_offset */
1790 HOWTO (R_ARM_FUNCDESC, /* type */
1791 0, /* rightshift */
1792 2, /* size (0 = byte, 1 = short, 2 = long) */
1793 32, /* bitsize */
1794 FALSE, /* pc_relative */
1795 0, /* bitpos */
1796 complain_overflow_bitfield,/* complain_on_overflow */
1797 bfd_elf_generic_reloc, /* special_function */
1798 "R_ARM_FUNCDESC", /* name */
1799 FALSE, /* partial_inplace */
1800 0, /* src_mask */
1801 0xffffffff, /* dst_mask */
1802 FALSE), /* pcrel_offset */
1803 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1804 0, /* rightshift */
1805 2, /* size (0 = byte, 1 = short, 2 = long) */
1806 64, /* bitsize */
1807 FALSE, /* pc_relative */
1808 0, /* bitpos */
1809 complain_overflow_bitfield,/* complain_on_overflow */
1810 bfd_elf_generic_reloc, /* special_function */
1811 "R_ARM_FUNCDESC_VALUE",/* name */
1812 FALSE, /* partial_inplace */
1813 0, /* src_mask */
1814 0xffffffff, /* dst_mask */
1815 FALSE), /* pcrel_offset */
1816 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1817 0, /* rightshift */
1818 2, /* size (0 = byte, 1 = short, 2 = long) */
1819 32, /* bitsize */
1820 FALSE, /* pc_relative */
1821 0, /* bitpos */
1822 complain_overflow_bitfield,/* complain_on_overflow */
1823 bfd_elf_generic_reloc, /* special_function */
1824 "R_ARM_TLS_GD32_FDPIC",/* name */
1825 FALSE, /* partial_inplace */
1826 0, /* src_mask */
1827 0xffffffff, /* dst_mask */
1828 FALSE), /* pcrel_offset */
1829 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1830 0, /* rightshift */
1831 2, /* size (0 = byte, 1 = short, 2 = long) */
1832 32, /* bitsize */
1833 FALSE, /* pc_relative */
1834 0, /* bitpos */
1835 complain_overflow_bitfield,/* complain_on_overflow */
1836 bfd_elf_generic_reloc, /* special_function */
1837 "R_ARM_TLS_LDM32_FDPIC",/* name */
1838 FALSE, /* partial_inplace */
1839 0, /* src_mask */
1840 0xffffffff, /* dst_mask */
1841 FALSE), /* pcrel_offset */
1842 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1843 0, /* rightshift */
1844 2, /* size (0 = byte, 1 = short, 2 = long) */
1845 32, /* bitsize */
1846 FALSE, /* pc_relative */
1847 0, /* bitpos */
1848 complain_overflow_bitfield,/* complain_on_overflow */
1849 bfd_elf_generic_reloc, /* special_function */
1850 "R_ARM_TLS_IE32_FDPIC",/* name */
1851 FALSE, /* partial_inplace */
1852 0, /* src_mask */
1853 0xffffffff, /* dst_mask */
1854 FALSE), /* pcrel_offset */
1855 };
1856
1857 /* 249-255 extended, currently unused, relocations: */
1858 static reloc_howto_type elf32_arm_howto_table_3[4] =
1859 {
1860 HOWTO (R_ARM_RREL32, /* type */
1861 0, /* rightshift */
1862 0, /* size (0 = byte, 1 = short, 2 = long) */
1863 0, /* bitsize */
1864 FALSE, /* pc_relative */
1865 0, /* bitpos */
1866 complain_overflow_dont,/* complain_on_overflow */
1867 bfd_elf_generic_reloc, /* special_function */
1868 "R_ARM_RREL32", /* name */
1869 FALSE, /* partial_inplace */
1870 0, /* src_mask */
1871 0, /* dst_mask */
1872 FALSE), /* pcrel_offset */
1873
1874 HOWTO (R_ARM_RABS32, /* type */
1875 0, /* rightshift */
1876 0, /* size (0 = byte, 1 = short, 2 = long) */
1877 0, /* bitsize */
1878 FALSE, /* pc_relative */
1879 0, /* bitpos */
1880 complain_overflow_dont,/* complain_on_overflow */
1881 bfd_elf_generic_reloc, /* special_function */
1882 "R_ARM_RABS32", /* name */
1883 FALSE, /* partial_inplace */
1884 0, /* src_mask */
1885 0, /* dst_mask */
1886 FALSE), /* pcrel_offset */
1887
1888 HOWTO (R_ARM_RPC24, /* type */
1889 0, /* rightshift */
1890 0, /* size (0 = byte, 1 = short, 2 = long) */
1891 0, /* bitsize */
1892 FALSE, /* pc_relative */
1893 0, /* bitpos */
1894 complain_overflow_dont,/* complain_on_overflow */
1895 bfd_elf_generic_reloc, /* special_function */
1896 "R_ARM_RPC24", /* name */
1897 FALSE, /* partial_inplace */
1898 0, /* src_mask */
1899 0, /* dst_mask */
1900 FALSE), /* pcrel_offset */
1901
1902 HOWTO (R_ARM_RBASE, /* type */
1903 0, /* rightshift */
1904 0, /* size (0 = byte, 1 = short, 2 = long) */
1905 0, /* bitsize */
1906 FALSE, /* pc_relative */
1907 0, /* bitpos */
1908 complain_overflow_dont,/* complain_on_overflow */
1909 bfd_elf_generic_reloc, /* special_function */
1910 "R_ARM_RBASE", /* name */
1911 FALSE, /* partial_inplace */
1912 0, /* src_mask */
1913 0, /* dst_mask */
1914 FALSE) /* pcrel_offset */
1915 };
1916
1917 static reloc_howto_type *
1918 elf32_arm_howto_from_type (unsigned int r_type)
1919 {
1920 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1921 return &elf32_arm_howto_table_1[r_type];
1922
1923 if (r_type >= R_ARM_IRELATIVE
1924 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1925 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1926
1927 if (r_type >= R_ARM_RREL32
1928 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1929 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1930
1931 return NULL;
1932 }
1933
1934 static bfd_boolean
1935 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1936 Elf_Internal_Rela * elf_reloc)
1937 {
1938 unsigned int r_type;
1939
1940 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1941 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1942 {
1943 /* xgettext:c-format */
1944 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1945 abfd, r_type);
1946 bfd_set_error (bfd_error_bad_value);
1947 return FALSE;
1948 }
1949 return TRUE;
1950 }
1951
1952 struct elf32_arm_reloc_map
1953 {
1954 bfd_reloc_code_real_type bfd_reloc_val;
1955 unsigned char elf_reloc_val;
1956 };
1957
1958 /* All entries in this list must also be present in elf32_arm_howto_table. */
1959 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1960 {
1961 {BFD_RELOC_NONE, R_ARM_NONE},
1962 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1963 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1964 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1965 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1966 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1967 {BFD_RELOC_32, R_ARM_ABS32},
1968 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1969 {BFD_RELOC_8, R_ARM_ABS8},
1970 {BFD_RELOC_16, R_ARM_ABS16},
1971 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1972 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1973 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1974 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1975 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1976 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1977 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1978 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1979 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1980 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1981 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1982 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1983 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1984 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1985 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1986 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1987 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1988 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1989 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1990 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1991 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1992 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1993 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1994 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1995 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1996 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1997 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1998 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1999 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2000 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2001 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2002 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2003 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2004 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2005 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2006 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2007 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2008 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2009 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2010 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2011 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2012 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2013 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2014 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2015 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2016 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2017 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2018 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2019 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2020 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2021 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2022 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2023 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2024 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2025 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2026 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2027 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2028 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2029 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2030 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2031 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2032 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2033 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2034 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2035 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2036 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2037 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2038 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2039 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2040 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2041 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2042 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2043 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2044 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2045 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2046 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2047 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2048 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2049 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2050 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2051 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2052 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2053 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2054 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2055 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2056 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2057 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
2058 };
2059
2060 static reloc_howto_type *
2061 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2062 bfd_reloc_code_real_type code)
2063 {
2064 unsigned int i;
2065
2066 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2067 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2068 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2069
2070 return NULL;
2071 }
2072
2073 static reloc_howto_type *
2074 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2075 const char *r_name)
2076 {
2077 unsigned int i;
2078
2079 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2080 if (elf32_arm_howto_table_1[i].name != NULL
2081 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2082 return &elf32_arm_howto_table_1[i];
2083
2084 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2085 if (elf32_arm_howto_table_2[i].name != NULL
2086 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2087 return &elf32_arm_howto_table_2[i];
2088
2089 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2090 if (elf32_arm_howto_table_3[i].name != NULL
2091 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2092 return &elf32_arm_howto_table_3[i];
2093
2094 return NULL;
2095 }
2096
2097 /* Support for core dump NOTE sections. */
2098
2099 static bfd_boolean
2100 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2101 {
2102 int offset;
2103 size_t size;
2104
2105 switch (note->descsz)
2106 {
2107 default:
2108 return FALSE;
2109
2110 case 148: /* Linux/ARM 32-bit. */
2111 /* pr_cursig */
2112 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2113
2114 /* pr_pid */
2115 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2116
2117 /* pr_reg */
2118 offset = 72;
2119 size = 72;
2120
2121 break;
2122 }
2123
2124 /* Make a ".reg/999" section. */
2125 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2126 size, note->descpos + offset);
2127 }
2128
2129 static bfd_boolean
2130 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2131 {
2132 switch (note->descsz)
2133 {
2134 default:
2135 return FALSE;
2136
2137 case 124: /* Linux/ARM elf_prpsinfo. */
2138 elf_tdata (abfd)->core->pid
2139 = bfd_get_32 (abfd, note->descdata + 12);
2140 elf_tdata (abfd)->core->program
2141 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2142 elf_tdata (abfd)->core->command
2143 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2144 }
2145
2146 /* Note that for some reason, a spurious space is tacked
2147 onto the end of the args in some (at least one anyway)
2148 implementations, so strip it off if it exists. */
2149 {
2150 char *command = elf_tdata (abfd)->core->command;
2151 int n = strlen (command);
2152
2153 if (0 < n && command[n - 1] == ' ')
2154 command[n - 1] = '\0';
2155 }
2156
2157 return TRUE;
2158 }
2159
2160 static char *
2161 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2162 int note_type, ...)
2163 {
2164 switch (note_type)
2165 {
2166 default:
2167 return NULL;
2168
2169 case NT_PRPSINFO:
2170 {
2171 char data[124];
2172 va_list ap;
2173
2174 va_start (ap, note_type);
2175 memset (data, 0, sizeof (data));
2176 strncpy (data + 28, va_arg (ap, const char *), 16);
2177 strncpy (data + 44, va_arg (ap, const char *), 80);
2178 va_end (ap);
2179
2180 return elfcore_write_note (abfd, buf, bufsiz,
2181 "CORE", note_type, data, sizeof (data));
2182 }
2183
2184 case NT_PRSTATUS:
2185 {
2186 char data[148];
2187 va_list ap;
2188 long pid;
2189 int cursig;
2190 const void *greg;
2191
2192 va_start (ap, note_type);
2193 memset (data, 0, sizeof (data));
2194 pid = va_arg (ap, long);
2195 bfd_put_32 (abfd, pid, data + 24);
2196 cursig = va_arg (ap, int);
2197 bfd_put_16 (abfd, cursig, data + 12);
2198 greg = va_arg (ap, const void *);
2199 memcpy (data + 72, greg, 72);
2200 va_end (ap);
2201
2202 return elfcore_write_note (abfd, buf, bufsiz,
2203 "CORE", note_type, data, sizeof (data));
2204 }
2205 }
2206 }
2207
2208 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2209 #define TARGET_LITTLE_NAME "elf32-littlearm"
2210 #define TARGET_BIG_SYM arm_elf32_be_vec
2211 #define TARGET_BIG_NAME "elf32-bigarm"
2212
2213 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2214 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2215 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2216
2217 typedef unsigned long int insn32;
2218 typedef unsigned short int insn16;
2219
2220 /* In lieu of proper flags, assume all EABIv4 or later objects are
2221 interworkable. */
2222 #define INTERWORK_FLAG(abfd) \
2223 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2224 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2225 || ((abfd)->flags & BFD_LINKER_CREATED))
2226
2227 /* The linker script knows the section names for placement.
2228 The entry_names are used to do simple name mangling on the stubs.
2229 Given a function name, and its type, the stub can be found. The
2230 name can be changed. The only requirement is the %s be present. */
2231 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2232 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2233
2234 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2235 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2236
2237 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2238 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2239
2240 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2241 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2242
2243 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2244 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2245
2246 #define STUB_ENTRY_NAME "__%s_veneer"
2247
2248 #define CMSE_PREFIX "__acle_se_"
2249
2250 /* The name of the dynamic interpreter. This is put in the .interp
2251 section. */
2252 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2253
2254 /* FDPIC default stack size. */
2255 #define DEFAULT_STACK_SIZE 0x8000
2256
2257 static const unsigned long tls_trampoline [] =
2258 {
2259 0xe08e0000, /* add r0, lr, r0 */
2260 0xe5901004, /* ldr r1, [r0,#4] */
2261 0xe12fff11, /* bx r1 */
2262 };
2263
2264 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2265 {
2266 0xe52d2004, /* push {r2} */
2267 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2268 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2269 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2270 0xe081100f, /* 2: add r1, pc */
2271 0xe12fff12, /* bx r2 */
2272 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2273 + dl_tlsdesc_lazy_resolver(GOT) */
2274 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2275 };
2276
2277 /* ARM FDPIC PLT entry. */
2278 /* The last 5 words contain PLT lazy fragment code and data. */
2279 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2280 {
2281 0xe59fc008, /* ldr r12, .L1 */
2282 0xe08cc009, /* add r12, r12, r9 */
2283 0xe59c9004, /* ldr r9, [r12, #4] */
2284 0xe59cf000, /* ldr pc, [r12] */
2285 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2286 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2287 0xe51fc00c, /* ldr r12, [pc, #-12] */
2288 0xe92d1000, /* push {r12} */
2289 0xe599c004, /* ldr r12, [r9, #4] */
2290 0xe599f000, /* ldr pc, [r9] */
2291 };
2292
2293 #ifdef FOUR_WORD_PLT
2294
2295 /* The first entry in a procedure linkage table looks like
2296 this. It is set up so that any shared library function that is
2297 called before the relocation has been set up calls the dynamic
2298 linker first. */
2299 static const bfd_vma elf32_arm_plt0_entry [] =
2300 {
2301 0xe52de004, /* str lr, [sp, #-4]! */
2302 0xe59fe010, /* ldr lr, [pc, #16] */
2303 0xe08fe00e, /* add lr, pc, lr */
2304 0xe5bef008, /* ldr pc, [lr, #8]! */
2305 };
2306
2307 /* Subsequent entries in a procedure linkage table look like
2308 this. */
2309 static const bfd_vma elf32_arm_plt_entry [] =
2310 {
2311 0xe28fc600, /* add ip, pc, #NN */
2312 0xe28cca00, /* add ip, ip, #NN */
2313 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2314 0x00000000, /* unused */
2315 };
2316
2317 #else /* not FOUR_WORD_PLT */
2318
2319 /* The first entry in a procedure linkage table looks like
2320 this. It is set up so that any shared library function that is
2321 called before the relocation has been set up calls the dynamic
2322 linker first. */
2323 static const bfd_vma elf32_arm_plt0_entry [] =
2324 {
2325 0xe52de004, /* str lr, [sp, #-4]! */
2326 0xe59fe004, /* ldr lr, [pc, #4] */
2327 0xe08fe00e, /* add lr, pc, lr */
2328 0xe5bef008, /* ldr pc, [lr, #8]! */
2329 0x00000000, /* &GOT[0] - . */
2330 };
2331
2332 /* By default subsequent entries in a procedure linkage table look like
2333 this. Offsets that don't fit into 28 bits will cause link error. */
2334 static const bfd_vma elf32_arm_plt_entry_short [] =
2335 {
2336 0xe28fc600, /* add ip, pc, #0xNN00000 */
2337 0xe28cca00, /* add ip, ip, #0xNN000 */
2338 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2339 };
2340
2341 /* When explicitly asked, we'll use this "long" entry format
2342 which can cope with arbitrary displacements. */
2343 static const bfd_vma elf32_arm_plt_entry_long [] =
2344 {
2345 0xe28fc200, /* add ip, pc, #0xN0000000 */
2346 0xe28cc600, /* add ip, ip, #0xNN00000 */
2347 0xe28cca00, /* add ip, ip, #0xNN000 */
2348 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2349 };
2350
2351 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2352
2353 #endif /* not FOUR_WORD_PLT */
2354
2355 /* The first entry in a procedure linkage table looks like this.
2356 It is set up so that any shared library function that is called before the
2357 relocation has been set up calls the dynamic linker first. */
2358 static const bfd_vma elf32_thumb2_plt0_entry [] =
2359 {
2360 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2361 an instruction maybe encoded to one or two array elements. */
2362 0xf8dfb500, /* push {lr} */
2363 0x44fee008, /* ldr.w lr, [pc, #8] */
2364 /* add lr, pc */
2365 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2366 0x00000000, /* &GOT[0] - . */
2367 };
2368
2369 /* Subsequent entries in a procedure linkage table for thumb only target
2370 look like this. */
2371 static const bfd_vma elf32_thumb2_plt_entry [] =
2372 {
2373 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2374 an instruction maybe encoded to one or two array elements. */
2375 0x0c00f240, /* movw ip, #0xNNNN */
2376 0x0c00f2c0, /* movt ip, #0xNNNN */
2377 0xf8dc44fc, /* add ip, pc */
2378 0xbf00f000 /* ldr.w pc, [ip] */
2379 /* nop */
2380 };
2381
2382 /* The format of the first entry in the procedure linkage table
2383 for a VxWorks executable. */
2384 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2385 {
2386 0xe52dc008, /* str ip,[sp,#-8]! */
2387 0xe59fc000, /* ldr ip,[pc] */
2388 0xe59cf008, /* ldr pc,[ip,#8] */
2389 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2390 };
2391
2392 /* The format of subsequent entries in a VxWorks executable. */
2393 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2394 {
2395 0xe59fc000, /* ldr ip,[pc] */
2396 0xe59cf000, /* ldr pc,[ip] */
2397 0x00000000, /* .long @got */
2398 0xe59fc000, /* ldr ip,[pc] */
2399 0xea000000, /* b _PLT */
2400 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2401 };
2402
2403 /* The format of entries in a VxWorks shared library. */
2404 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2405 {
2406 0xe59fc000, /* ldr ip,[pc] */
2407 0xe79cf009, /* ldr pc,[ip,r9] */
2408 0x00000000, /* .long @got */
2409 0xe59fc000, /* ldr ip,[pc] */
2410 0xe599f008, /* ldr pc,[r9,#8] */
2411 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2412 };
2413
2414 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2415 #define PLT_THUMB_STUB_SIZE 4
2416 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2417 {
2418 0x4778, /* bx pc */
2419 0x46c0 /* nop */
2420 };
2421
2422 /* The entries in a PLT when using a DLL-based target with multiple
2423 address spaces. */
2424 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2425 {
2426 0xe51ff004, /* ldr pc, [pc, #-4] */
2427 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2428 };
2429
2430 /* The first entry in a procedure linkage table looks like
2431 this. It is set up so that any shared library function that is
2432 called before the relocation has been set up calls the dynamic
2433 linker first. */
2434 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2435 {
2436 /* First bundle: */
2437 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2438 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2439 0xe08cc00f, /* add ip, ip, pc */
2440 0xe52dc008, /* str ip, [sp, #-8]! */
2441 /* Second bundle: */
2442 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2443 0xe59cc000, /* ldr ip, [ip] */
2444 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2445 0xe12fff1c, /* bx ip */
2446 /* Third bundle: */
2447 0xe320f000, /* nop */
2448 0xe320f000, /* nop */
2449 0xe320f000, /* nop */
2450 /* .Lplt_tail: */
2451 0xe50dc004, /* str ip, [sp, #-4] */
2452 /* Fourth bundle: */
2453 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2454 0xe59cc000, /* ldr ip, [ip] */
2455 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2456 0xe12fff1c, /* bx ip */
2457 };
2458 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2459
2460 /* Subsequent entries in a procedure linkage table look like this. */
2461 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2462 {
2463 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2464 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2465 0xe08cc00f, /* add ip, ip, pc */
2466 0xea000000, /* b .Lplt_tail */
2467 };
2468
2469 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2470 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2471 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2472 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2473 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2474 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2475 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2476 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2477
2478 enum stub_insn_type
2479 {
2480 THUMB16_TYPE = 1,
2481 THUMB32_TYPE,
2482 ARM_TYPE,
2483 DATA_TYPE
2484 };
2485
2486 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2487 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2488 is inserted in arm_build_one_stub(). */
2489 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2490 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2491 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2492 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2493 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2494 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2495 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2496 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2497
2498 typedef struct
2499 {
2500 bfd_vma data;
2501 enum stub_insn_type type;
2502 unsigned int r_type;
2503 int reloc_addend;
2504 } insn_sequence;
2505
2506 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2507 to reach the stub if necessary. */
2508 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2509 {
2510 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2511 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2512 };
2513
2514 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2515 available. */
2516 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2517 {
2518 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2519 ARM_INSN (0xe12fff1c), /* bx ip */
2520 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2521 };
2522
2523 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2524 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2525 {
2526 THUMB16_INSN (0xb401), /* push {r0} */
2527 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2528 THUMB16_INSN (0x4684), /* mov ip, r0 */
2529 THUMB16_INSN (0xbc01), /* pop {r0} */
2530 THUMB16_INSN (0x4760), /* bx ip */
2531 THUMB16_INSN (0xbf00), /* nop */
2532 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2533 };
2534
2535 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2536 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2537 {
2538 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2539 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2540 };
2541
2542 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2543 M-profile architectures. */
2544 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2545 {
2546 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2547 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2548 THUMB16_INSN (0x4760), /* bx ip */
2549 };
2550
2551 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2552 allowed. */
2553 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2554 {
2555 THUMB16_INSN (0x4778), /* bx pc */
2556 THUMB16_INSN (0x46c0), /* nop */
2557 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2558 ARM_INSN (0xe12fff1c), /* bx ip */
2559 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2560 };
2561
2562 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2563 available. */
2564 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2565 {
2566 THUMB16_INSN (0x4778), /* bx pc */
2567 THUMB16_INSN (0x46c0), /* nop */
2568 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2569 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2570 };
2571
2572 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2573 one, when the destination is close enough. */
2574 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2575 {
2576 THUMB16_INSN (0x4778), /* bx pc */
2577 THUMB16_INSN (0x46c0), /* nop */
2578 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2579 };
2580
2581 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2582 blx to reach the stub if necessary. */
2583 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2584 {
2585 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2586 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2587 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2588 };
2589
2590 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2591 blx to reach the stub if necessary. We can not add into pc;
2592 it is not guaranteed to mode switch (different in ARMv6 and
2593 ARMv7). */
2594 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2595 {
2596 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2597 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2598 ARM_INSN (0xe12fff1c), /* bx ip */
2599 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2600 };
2601
2602 /* V4T ARM -> ARM long branch stub, PIC. */
2603 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2604 {
2605 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2606 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2607 ARM_INSN (0xe12fff1c), /* bx ip */
2608 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2609 };
2610
2611 /* V4T Thumb -> ARM long branch stub, PIC. */
2612 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2613 {
2614 THUMB16_INSN (0x4778), /* bx pc */
2615 THUMB16_INSN (0x46c0), /* nop */
2616 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2617 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2618 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2619 };
2620
2621 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2622 architectures. */
2623 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2624 {
2625 THUMB16_INSN (0xb401), /* push {r0} */
2626 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2627 THUMB16_INSN (0x46fc), /* mov ip, pc */
2628 THUMB16_INSN (0x4484), /* add ip, r0 */
2629 THUMB16_INSN (0xbc01), /* pop {r0} */
2630 THUMB16_INSN (0x4760), /* bx ip */
2631 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2632 };
2633
2634 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2635 allowed. */
2636 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2637 {
2638 THUMB16_INSN (0x4778), /* bx pc */
2639 THUMB16_INSN (0x46c0), /* nop */
2640 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2641 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2642 ARM_INSN (0xe12fff1c), /* bx ip */
2643 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2644 };
2645
2646 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2647 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2648 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2649 {
2650 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2651 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2652 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2653 };
2654
2655 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2656 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2657 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2658 {
2659 THUMB16_INSN (0x4778), /* bx pc */
2660 THUMB16_INSN (0x46c0), /* nop */
2661 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2662 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2663 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2664 };
2665
2666 /* NaCl ARM -> ARM long branch stub. */
2667 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2668 {
2669 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2670 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2671 ARM_INSN (0xe12fff1c), /* bx ip */
2672 ARM_INSN (0xe320f000), /* nop */
2673 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2674 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2675 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2676 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2677 };
2678
2679 /* NaCl ARM -> ARM long branch stub, PIC. */
2680 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2681 {
2682 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2683 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2684 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2685 ARM_INSN (0xe12fff1c), /* bx ip */
2686 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2687 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2688 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2689 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2690 };
2691
2692 /* Stub used for transition to secure state (aka SG veneer). */
2693 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2694 {
2695 THUMB32_INSN (0xe97fe97f), /* sg. */
2696 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2697 };
2698
2699
2700 /* Cortex-A8 erratum-workaround stubs. */
2701
2702 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2703 can't use a conditional branch to reach this stub). */
2704
2705 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2706 {
2707 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2708 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2709 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2710 };
2711
2712 /* Stub used for b.w and bl.w instructions. */
2713
2714 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2715 {
2716 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2717 };
2718
2719 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2720 {
2721 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2722 };
2723
2724 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2725 instruction (which switches to ARM mode) to point to this stub. Jump to the
2726 real destination using an ARM-mode branch. */
2727
2728 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2729 {
2730 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2731 };
2732
2733 /* For each section group there can be a specially created linker section
2734 to hold the stubs for that group. The name of the stub section is based
2735 upon the name of another section within that group with the suffix below
2736 applied.
2737
2738 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2739 create what appeared to be a linker stub section when it actually
2740 contained user code/data. For example, consider this fragment:
2741
2742 const char * stubborn_problems[] = { "np" };
2743
2744 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2745 section called:
2746
2747 .data.rel.local.stubborn_problems
2748
2749 This then causes problems in arm32_arm_build_stubs() as it triggers:
2750
2751 // Ignore non-stub sections.
2752 if (!strstr (stub_sec->name, STUB_SUFFIX))
2753 continue;
2754
2755 And so the section would be ignored instead of being processed. Hence
2756 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2757 C identifier. */
2758 #define STUB_SUFFIX ".__stub"
2759
2760 /* One entry per long/short branch stub defined above. */
2761 #define DEF_STUBS \
2762 DEF_STUB(long_branch_any_any) \
2763 DEF_STUB(long_branch_v4t_arm_thumb) \
2764 DEF_STUB(long_branch_thumb_only) \
2765 DEF_STUB(long_branch_v4t_thumb_thumb) \
2766 DEF_STUB(long_branch_v4t_thumb_arm) \
2767 DEF_STUB(short_branch_v4t_thumb_arm) \
2768 DEF_STUB(long_branch_any_arm_pic) \
2769 DEF_STUB(long_branch_any_thumb_pic) \
2770 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2771 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2772 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2773 DEF_STUB(long_branch_thumb_only_pic) \
2774 DEF_STUB(long_branch_any_tls_pic) \
2775 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2776 DEF_STUB(long_branch_arm_nacl) \
2777 DEF_STUB(long_branch_arm_nacl_pic) \
2778 DEF_STUB(cmse_branch_thumb_only) \
2779 DEF_STUB(a8_veneer_b_cond) \
2780 DEF_STUB(a8_veneer_b) \
2781 DEF_STUB(a8_veneer_bl) \
2782 DEF_STUB(a8_veneer_blx) \
2783 DEF_STUB(long_branch_thumb2_only) \
2784 DEF_STUB(long_branch_thumb2_only_pure)
2785
2786 #define DEF_STUB(x) arm_stub_##x,
2787 enum elf32_arm_stub_type
2788 {
2789 arm_stub_none,
2790 DEF_STUBS
2791 max_stub_type
2792 };
2793 #undef DEF_STUB
2794
2795 /* Note the first a8_veneer type. */
2796 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2797
2798 typedef struct
2799 {
2800 const insn_sequence* template_sequence;
2801 int template_size;
2802 } stub_def;
2803
2804 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2805 static const stub_def stub_definitions[] =
2806 {
2807 {NULL, 0},
2808 DEF_STUBS
2809 };
2810
2811 struct elf32_arm_stub_hash_entry
2812 {
2813 /* Base hash table entry structure. */
2814 struct bfd_hash_entry root;
2815
2816 /* The stub section. */
2817 asection *stub_sec;
2818
2819 /* Offset within stub_sec of the beginning of this stub. */
2820 bfd_vma stub_offset;
2821
2822 /* Given the symbol's value and its section we can determine its final
2823 value when building the stubs (so the stub knows where to jump). */
2824 bfd_vma target_value;
2825 asection *target_section;
2826
2827 /* Same as above but for the source of the branch to the stub. Used for
2828 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2829 such, source section does not need to be recorded since Cortex-A8 erratum
2830 workaround stubs are only generated when both source and target are in the
2831 same section. */
2832 bfd_vma source_value;
2833
2834 /* The instruction which caused this stub to be generated (only valid for
2835 Cortex-A8 erratum workaround stubs at present). */
2836 unsigned long orig_insn;
2837
2838 /* The stub type. */
2839 enum elf32_arm_stub_type stub_type;
2840 /* Its encoding size in bytes. */
2841 int stub_size;
2842 /* Its template. */
2843 const insn_sequence *stub_template;
2844 /* The size of the template (number of entries). */
2845 int stub_template_size;
2846
2847 /* The symbol table entry, if any, that this was derived from. */
2848 struct elf32_arm_link_hash_entry *h;
2849
2850 /* Type of branch. */
2851 enum arm_st_branch_type branch_type;
2852
2853 /* Where this stub is being called from, or, in the case of combined
2854 stub sections, the first input section in the group. */
2855 asection *id_sec;
2856
2857 /* The name for the local symbol at the start of this stub. The
2858 stub name in the hash table has to be unique; this does not, so
2859 it can be friendlier. */
2860 char *output_name;
2861 };
2862
2863 /* Used to build a map of a section. This is required for mixed-endian
2864 code/data. */
2865
2866 typedef struct elf32_elf_section_map
2867 {
2868 bfd_vma vma;
2869 char type;
2870 }
2871 elf32_arm_section_map;
2872
2873 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2874
2875 typedef enum
2876 {
2877 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2878 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2879 VFP11_ERRATUM_ARM_VENEER,
2880 VFP11_ERRATUM_THUMB_VENEER
2881 }
2882 elf32_vfp11_erratum_type;
2883
2884 typedef struct elf32_vfp11_erratum_list
2885 {
2886 struct elf32_vfp11_erratum_list *next;
2887 bfd_vma vma;
2888 union
2889 {
2890 struct
2891 {
2892 struct elf32_vfp11_erratum_list *veneer;
2893 unsigned int vfp_insn;
2894 } b;
2895 struct
2896 {
2897 struct elf32_vfp11_erratum_list *branch;
2898 unsigned int id;
2899 } v;
2900 } u;
2901 elf32_vfp11_erratum_type type;
2902 }
2903 elf32_vfp11_erratum_list;
2904
2905 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2906 veneer. */
2907 typedef enum
2908 {
2909 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2910 STM32L4XX_ERRATUM_VENEER
2911 }
2912 elf32_stm32l4xx_erratum_type;
2913
2914 typedef struct elf32_stm32l4xx_erratum_list
2915 {
2916 struct elf32_stm32l4xx_erratum_list *next;
2917 bfd_vma vma;
2918 union
2919 {
2920 struct
2921 {
2922 struct elf32_stm32l4xx_erratum_list *veneer;
2923 unsigned int insn;
2924 } b;
2925 struct
2926 {
2927 struct elf32_stm32l4xx_erratum_list *branch;
2928 unsigned int id;
2929 } v;
2930 } u;
2931 elf32_stm32l4xx_erratum_type type;
2932 }
2933 elf32_stm32l4xx_erratum_list;
2934
2935 typedef enum
2936 {
2937 DELETE_EXIDX_ENTRY,
2938 INSERT_EXIDX_CANTUNWIND_AT_END
2939 }
2940 arm_unwind_edit_type;
2941
2942 /* A (sorted) list of edits to apply to an unwind table. */
2943 typedef struct arm_unwind_table_edit
2944 {
2945 arm_unwind_edit_type type;
2946 /* Note: we sometimes want to insert an unwind entry corresponding to a
2947 section different from the one we're currently writing out, so record the
2948 (text) section this edit relates to here. */
2949 asection *linked_section;
2950 unsigned int index;
2951 struct arm_unwind_table_edit *next;
2952 }
2953 arm_unwind_table_edit;
2954
2955 typedef struct _arm_elf_section_data
2956 {
2957 /* Information about mapping symbols. */
2958 struct bfd_elf_section_data elf;
2959 unsigned int mapcount;
2960 unsigned int mapsize;
2961 elf32_arm_section_map *map;
2962 /* Information about CPU errata. */
2963 unsigned int erratumcount;
2964 elf32_vfp11_erratum_list *erratumlist;
2965 unsigned int stm32l4xx_erratumcount;
2966 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2967 unsigned int additional_reloc_count;
2968 /* Information about unwind tables. */
2969 union
2970 {
2971 /* Unwind info attached to a text section. */
2972 struct
2973 {
2974 asection *arm_exidx_sec;
2975 } text;
2976
2977 /* Unwind info attached to an .ARM.exidx section. */
2978 struct
2979 {
2980 arm_unwind_table_edit *unwind_edit_list;
2981 arm_unwind_table_edit *unwind_edit_tail;
2982 } exidx;
2983 } u;
2984 }
2985 _arm_elf_section_data;
2986
2987 #define elf32_arm_section_data(sec) \
2988 ((_arm_elf_section_data *) elf_section_data (sec))
2989
2990 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2991 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2992 so may be created multiple times: we use an array of these entries whilst
2993 relaxing which we can refresh easily, then create stubs for each potentially
2994 erratum-triggering instruction once we've settled on a solution. */
2995
2996 struct a8_erratum_fix
2997 {
2998 bfd *input_bfd;
2999 asection *section;
3000 bfd_vma offset;
3001 bfd_vma target_offset;
3002 unsigned long orig_insn;
3003 char *stub_name;
3004 enum elf32_arm_stub_type stub_type;
3005 enum arm_st_branch_type branch_type;
3006 };
3007
3008 /* A table of relocs applied to branches which might trigger Cortex-A8
3009 erratum. */
3010
3011 struct a8_erratum_reloc
3012 {
3013 bfd_vma from;
3014 bfd_vma destination;
3015 struct elf32_arm_link_hash_entry *hash;
3016 const char *sym_name;
3017 unsigned int r_type;
3018 enum arm_st_branch_type branch_type;
3019 bfd_boolean non_a8_stub;
3020 };
3021
3022 /* The size of the thread control block. */
3023 #define TCB_SIZE 8
3024
3025 /* ARM-specific information about a PLT entry, over and above the usual
3026 gotplt_union. */
3027 struct arm_plt_info
3028 {
3029 /* We reference count Thumb references to a PLT entry separately,
3030 so that we can emit the Thumb trampoline only if needed. */
3031 bfd_signed_vma thumb_refcount;
3032
3033 /* Some references from Thumb code may be eliminated by BL->BLX
3034 conversion, so record them separately. */
3035 bfd_signed_vma maybe_thumb_refcount;
3036
3037 /* How many of the recorded PLT accesses were from non-call relocations.
3038 This information is useful when deciding whether anything takes the
3039 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3040 non-call references to the function should resolve directly to the
3041 real runtime target. */
3042 unsigned int noncall_refcount;
3043
3044 /* Since PLT entries have variable size if the Thumb prologue is
3045 used, we need to record the index into .got.plt instead of
3046 recomputing it from the PLT offset. */
3047 bfd_signed_vma got_offset;
3048 };
3049
3050 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3051 struct arm_local_iplt_info
3052 {
3053 /* The information that is usually found in the generic ELF part of
3054 the hash table entry. */
3055 union gotplt_union root;
3056
3057 /* The information that is usually found in the ARM-specific part of
3058 the hash table entry. */
3059 struct arm_plt_info arm;
3060
3061 /* A list of all potential dynamic relocations against this symbol. */
3062 struct elf_dyn_relocs *dyn_relocs;
3063 };
3064
3065 /* Structure to handle FDPIC support for local functions. */
3066 struct fdpic_local {
3067 unsigned int funcdesc_cnt;
3068 unsigned int gotofffuncdesc_cnt;
3069 int funcdesc_offset;
3070 };
3071
3072 struct elf_arm_obj_tdata
3073 {
3074 struct elf_obj_tdata root;
3075
3076 /* tls_type for each local got entry. */
3077 char *local_got_tls_type;
3078
3079 /* GOTPLT entries for TLS descriptors. */
3080 bfd_vma *local_tlsdesc_gotent;
3081
3082 /* Information for local symbols that need entries in .iplt. */
3083 struct arm_local_iplt_info **local_iplt;
3084
3085 /* Zero to warn when linking objects with incompatible enum sizes. */
3086 int no_enum_size_warning;
3087
3088 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3089 int no_wchar_size_warning;
3090
3091 /* Maintains FDPIC counters and funcdesc info. */
3092 struct fdpic_local *local_fdpic_cnts;
3093 };
3094
3095 #define elf_arm_tdata(bfd) \
3096 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3097
3098 #define elf32_arm_local_got_tls_type(bfd) \
3099 (elf_arm_tdata (bfd)->local_got_tls_type)
3100
3101 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3102 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3103
3104 #define elf32_arm_local_iplt(bfd) \
3105 (elf_arm_tdata (bfd)->local_iplt)
3106
3107 #define elf32_arm_local_fdpic_cnts(bfd) \
3108 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3109
3110 #define is_arm_elf(bfd) \
3111 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3112 && elf_tdata (bfd) != NULL \
3113 && elf_object_id (bfd) == ARM_ELF_DATA)
3114
3115 static bfd_boolean
3116 elf32_arm_mkobject (bfd *abfd)
3117 {
3118 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3119 ARM_ELF_DATA);
3120 }
3121
3122 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3123
3124 /* Structure to handle FDPIC support for extern functions. */
3125 struct fdpic_global {
3126 unsigned int gotofffuncdesc_cnt;
3127 unsigned int gotfuncdesc_cnt;
3128 unsigned int funcdesc_cnt;
3129 int funcdesc_offset;
3130 int gotfuncdesc_offset;
3131 };
3132
3133 /* Arm ELF linker hash entry. */
3134 struct elf32_arm_link_hash_entry
3135 {
3136 struct elf_link_hash_entry root;
3137
3138 /* Track dynamic relocs copied for this symbol. */
3139 struct elf_dyn_relocs *dyn_relocs;
3140
3141 /* ARM-specific PLT information. */
3142 struct arm_plt_info plt;
3143
3144 #define GOT_UNKNOWN 0
3145 #define GOT_NORMAL 1
3146 #define GOT_TLS_GD 2
3147 #define GOT_TLS_IE 4
3148 #define GOT_TLS_GDESC 8
3149 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3150 unsigned int tls_type : 8;
3151
3152 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3153 unsigned int is_iplt : 1;
3154
3155 unsigned int unused : 23;
3156
3157 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3158 starting at the end of the jump table. */
3159 bfd_vma tlsdesc_got;
3160
3161 /* The symbol marking the real symbol location for exported thumb
3162 symbols with Arm stubs. */
3163 struct elf_link_hash_entry *export_glue;
3164
3165 /* A pointer to the most recently used stub hash entry against this
3166 symbol. */
3167 struct elf32_arm_stub_hash_entry *stub_cache;
3168
3169 /* Counter for FDPIC relocations against this symbol. */
3170 struct fdpic_global fdpic_cnts;
3171 };
3172
3173 /* Traverse an arm ELF linker hash table. */
3174 #define elf32_arm_link_hash_traverse(table, func, info) \
3175 (elf_link_hash_traverse \
3176 (&(table)->root, \
3177 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3178 (info)))
3179
3180 /* Get the ARM elf linker hash table from a link_info structure. */
3181 #define elf32_arm_hash_table(info) \
3182 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3183 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3184
3185 #define arm_stub_hash_lookup(table, string, create, copy) \
3186 ((struct elf32_arm_stub_hash_entry *) \
3187 bfd_hash_lookup ((table), (string), (create), (copy)))
3188
3189 /* Array to keep track of which stub sections have been created, and
3190 information on stub grouping. */
3191 struct map_stub
3192 {
3193 /* This is the section to which stubs in the group will be
3194 attached. */
3195 asection *link_sec;
3196 /* The stub section. */
3197 asection *stub_sec;
3198 };
3199
3200 #define elf32_arm_compute_jump_table_size(htab) \
3201 ((htab)->next_tls_desc_index * 4)
3202
3203 /* ARM ELF linker hash table. */
3204 struct elf32_arm_link_hash_table
3205 {
3206 /* The main hash table. */
3207 struct elf_link_hash_table root;
3208
3209 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3210 bfd_size_type thumb_glue_size;
3211
3212 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3213 bfd_size_type arm_glue_size;
3214
3215 /* The size in bytes of section containing the ARMv4 BX veneers. */
3216 bfd_size_type bx_glue_size;
3217
3218 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3219 veneer has been populated. */
3220 bfd_vma bx_glue_offset[15];
3221
3222 /* The size in bytes of the section containing glue for VFP11 erratum
3223 veneers. */
3224 bfd_size_type vfp11_erratum_glue_size;
3225
3226 /* The size in bytes of the section containing glue for STM32L4XX erratum
3227 veneers. */
3228 bfd_size_type stm32l4xx_erratum_glue_size;
3229
3230 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3231 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3232 elf32_arm_write_section(). */
3233 struct a8_erratum_fix *a8_erratum_fixes;
3234 unsigned int num_a8_erratum_fixes;
3235
3236 /* An arbitrary input BFD chosen to hold the glue sections. */
3237 bfd * bfd_of_glue_owner;
3238
3239 /* Nonzero to output a BE8 image. */
3240 int byteswap_code;
3241
3242 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3243 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3244 int target1_is_rel;
3245
3246 /* The relocation to use for R_ARM_TARGET2 relocations. */
3247 int target2_reloc;
3248
3249 /* 0 = Ignore R_ARM_V4BX.
3250 1 = Convert BX to MOV PC.
3251 2 = Generate v4 interworing stubs. */
3252 int fix_v4bx;
3253
3254 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3255 int fix_cortex_a8;
3256
3257 /* Whether we should fix the ARM1176 BLX immediate issue. */
3258 int fix_arm1176;
3259
3260 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3261 int use_blx;
3262
3263 /* What sort of code sequences we should look for which may trigger the
3264 VFP11 denorm erratum. */
3265 bfd_arm_vfp11_fix vfp11_fix;
3266
3267 /* Global counter for the number of fixes we have emitted. */
3268 int num_vfp11_fixes;
3269
3270 /* What sort of code sequences we should look for which may trigger the
3271 STM32L4XX erratum. */
3272 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3273
3274 /* Global counter for the number of fixes we have emitted. */
3275 int num_stm32l4xx_fixes;
3276
3277 /* Nonzero to force PIC branch veneers. */
3278 int pic_veneer;
3279
3280 /* The number of bytes in the initial entry in the PLT. */
3281 bfd_size_type plt_header_size;
3282
3283 /* The number of bytes in the subsequent PLT etries. */
3284 bfd_size_type plt_entry_size;
3285
3286 /* True if the target system is VxWorks. */
3287 int vxworks_p;
3288
3289 /* True if the target system is Symbian OS. */
3290 int symbian_p;
3291
3292 /* True if the target system is Native Client. */
3293 int nacl_p;
3294
3295 /* True if the target uses REL relocations. */
3296 bfd_boolean use_rel;
3297
3298 /* Nonzero if import library must be a secure gateway import library
3299 as per ARMv8-M Security Extensions. */
3300 int cmse_implib;
3301
3302 /* The import library whose symbols' address must remain stable in
3303 the import library generated. */
3304 bfd *in_implib_bfd;
3305
3306 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3307 bfd_vma next_tls_desc_index;
3308
3309 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3310 bfd_vma num_tls_desc;
3311
3312 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3313 asection *srelplt2;
3314
3315 /* The offset into splt of the PLT entry for the TLS descriptor
3316 resolver. Special values are 0, if not necessary (or not found
3317 to be necessary yet), and -1 if needed but not determined
3318 yet. */
3319 bfd_vma dt_tlsdesc_plt;
3320
3321 /* The offset into sgot of the GOT entry used by the PLT entry
3322 above. */
3323 bfd_vma dt_tlsdesc_got;
3324
3325 /* Offset in .plt section of tls_arm_trampoline. */
3326 bfd_vma tls_trampoline;
3327
3328 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3329 union
3330 {
3331 bfd_signed_vma refcount;
3332 bfd_vma offset;
3333 } tls_ldm_got;
3334
3335 /* Small local sym cache. */
3336 struct sym_cache sym_cache;
3337
3338 /* For convenience in allocate_dynrelocs. */
3339 bfd * obfd;
3340
3341 /* The amount of space used by the reserved portion of the sgotplt
3342 section, plus whatever space is used by the jump slots. */
3343 bfd_vma sgotplt_jump_table_size;
3344
3345 /* The stub hash table. */
3346 struct bfd_hash_table stub_hash_table;
3347
3348 /* Linker stub bfd. */
3349 bfd *stub_bfd;
3350
3351 /* Linker call-backs. */
3352 asection * (*add_stub_section) (const char *, asection *, asection *,
3353 unsigned int);
3354 void (*layout_sections_again) (void);
3355
3356 /* Array to keep track of which stub sections have been created, and
3357 information on stub grouping. */
3358 struct map_stub *stub_group;
3359
3360 /* Input stub section holding secure gateway veneers. */
3361 asection *cmse_stub_sec;
3362
3363 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3364 start to be allocated. */
3365 bfd_vma new_cmse_stub_offset;
3366
3367 /* Number of elements in stub_group. */
3368 unsigned int top_id;
3369
3370 /* Assorted information used by elf32_arm_size_stubs. */
3371 unsigned int bfd_count;
3372 unsigned int top_index;
3373 asection **input_list;
3374
3375 /* True if the target system uses FDPIC. */
3376 int fdpic_p;
3377
3378 /* Fixup section. Used for FDPIC. */
3379 asection *srofixup;
3380 };
3381
3382 /* Add an FDPIC read-only fixup. */
3383 static void
3384 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3385 {
3386 bfd_vma fixup_offset;
3387
3388 fixup_offset = srofixup->reloc_count++ * 4;
3389 BFD_ASSERT (fixup_offset < srofixup->size);
3390 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3391 }
3392
3393 static inline int
3394 ctz (unsigned int mask)
3395 {
3396 #if GCC_VERSION >= 3004
3397 return __builtin_ctz (mask);
3398 #else
3399 unsigned int i;
3400
3401 for (i = 0; i < 8 * sizeof (mask); i++)
3402 {
3403 if (mask & 0x1)
3404 break;
3405 mask = (mask >> 1);
3406 }
3407 return i;
3408 #endif
3409 }
3410
3411 static inline int
3412 elf32_arm_popcount (unsigned int mask)
3413 {
3414 #if GCC_VERSION >= 3004
3415 return __builtin_popcount (mask);
3416 #else
3417 unsigned int i;
3418 int sum = 0;
3419
3420 for (i = 0; i < 8 * sizeof (mask); i++)
3421 {
3422 if (mask & 0x1)
3423 sum++;
3424 mask = (mask >> 1);
3425 }
3426 return sum;
3427 #endif
3428 }
3429
3430 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3431 asection *sreloc, Elf_Internal_Rela *rel);
3432
3433 static void
3434 arm_elf_fill_funcdesc(bfd *output_bfd,
3435 struct bfd_link_info *info,
3436 int *funcdesc_offset,
3437 int dynindx,
3438 int offset,
3439 bfd_vma addr,
3440 bfd_vma dynreloc_value,
3441 bfd_vma seg)
3442 {
3443 if ((*funcdesc_offset & 1) == 0)
3444 {
3445 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3446 asection *sgot = globals->root.sgot;
3447
3448 if (bfd_link_pic(info))
3449 {
3450 asection *srelgot = globals->root.srelgot;
3451 Elf_Internal_Rela outrel;
3452
3453 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3454 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3455 outrel.r_addend = 0;
3456
3457 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3458 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3459 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3460 }
3461 else
3462 {
3463 struct elf_link_hash_entry *hgot = globals->root.hgot;
3464 bfd_vma got_value = hgot->root.u.def.value
3465 + hgot->root.u.def.section->output_section->vma
3466 + hgot->root.u.def.section->output_offset;
3467
3468 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3469 sgot->output_section->vma + sgot->output_offset
3470 + offset);
3471 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3472 sgot->output_section->vma + sgot->output_offset
3473 + offset + 4);
3474 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3475 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3476 }
3477 *funcdesc_offset |= 1;
3478 }
3479 }
3480
3481 /* Create an entry in an ARM ELF linker hash table. */
3482
3483 static struct bfd_hash_entry *
3484 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3485 struct bfd_hash_table * table,
3486 const char * string)
3487 {
3488 struct elf32_arm_link_hash_entry * ret =
3489 (struct elf32_arm_link_hash_entry *) entry;
3490
3491 /* Allocate the structure if it has not already been allocated by a
3492 subclass. */
3493 if (ret == NULL)
3494 ret = (struct elf32_arm_link_hash_entry *)
3495 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3496 if (ret == NULL)
3497 return (struct bfd_hash_entry *) ret;
3498
3499 /* Call the allocation method of the superclass. */
3500 ret = ((struct elf32_arm_link_hash_entry *)
3501 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3502 table, string));
3503 if (ret != NULL)
3504 {
3505 ret->dyn_relocs = NULL;
3506 ret->tls_type = GOT_UNKNOWN;
3507 ret->tlsdesc_got = (bfd_vma) -1;
3508 ret->plt.thumb_refcount = 0;
3509 ret->plt.maybe_thumb_refcount = 0;
3510 ret->plt.noncall_refcount = 0;
3511 ret->plt.got_offset = -1;
3512 ret->is_iplt = FALSE;
3513 ret->export_glue = NULL;
3514
3515 ret->stub_cache = NULL;
3516
3517 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3518 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3519 ret->fdpic_cnts.funcdesc_cnt = 0;
3520 ret->fdpic_cnts.funcdesc_offset = -1;
3521 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3522 }
3523
3524 return (struct bfd_hash_entry *) ret;
3525 }
3526
3527 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3528 symbols. */
3529
3530 static bfd_boolean
3531 elf32_arm_allocate_local_sym_info (bfd *abfd)
3532 {
3533 if (elf_local_got_refcounts (abfd) == NULL)
3534 {
3535 bfd_size_type num_syms;
3536 bfd_size_type size;
3537 char *data;
3538
3539 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3540 size = num_syms * (sizeof (bfd_signed_vma)
3541 + sizeof (struct arm_local_iplt_info *)
3542 + sizeof (bfd_vma)
3543 + sizeof (char)
3544 + sizeof (struct fdpic_local));
3545 data = bfd_zalloc (abfd, size);
3546 if (data == NULL)
3547 return FALSE;
3548
3549 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3550 data += num_syms * sizeof (struct fdpic_local);
3551
3552 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3553 data += num_syms * sizeof (bfd_signed_vma);
3554
3555 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3556 data += num_syms * sizeof (struct arm_local_iplt_info *);
3557
3558 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3559 data += num_syms * sizeof (bfd_vma);
3560
3561 elf32_arm_local_got_tls_type (abfd) = data;
3562 }
3563 return TRUE;
3564 }
3565
3566 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3567 to input bfd ABFD. Create the information if it doesn't already exist.
3568 Return null if an allocation fails. */
3569
3570 static struct arm_local_iplt_info *
3571 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3572 {
3573 struct arm_local_iplt_info **ptr;
3574
3575 if (!elf32_arm_allocate_local_sym_info (abfd))
3576 return NULL;
3577
3578 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3579 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3580 if (*ptr == NULL)
3581 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3582 return *ptr;
3583 }
3584
3585 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3586 in ABFD's symbol table. If the symbol is global, H points to its
3587 hash table entry, otherwise H is null.
3588
3589 Return true if the symbol does have PLT information. When returning
3590 true, point *ROOT_PLT at the target-independent reference count/offset
3591 union and *ARM_PLT at the ARM-specific information. */
3592
3593 static bfd_boolean
3594 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3595 struct elf32_arm_link_hash_entry *h,
3596 unsigned long r_symndx, union gotplt_union **root_plt,
3597 struct arm_plt_info **arm_plt)
3598 {
3599 struct arm_local_iplt_info *local_iplt;
3600
3601 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3602 return FALSE;
3603
3604 if (h != NULL)
3605 {
3606 *root_plt = &h->root.plt;
3607 *arm_plt = &h->plt;
3608 return TRUE;
3609 }
3610
3611 if (elf32_arm_local_iplt (abfd) == NULL)
3612 return FALSE;
3613
3614 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3615 if (local_iplt == NULL)
3616 return FALSE;
3617
3618 *root_plt = &local_iplt->root;
3619 *arm_plt = &local_iplt->arm;
3620 return TRUE;
3621 }
3622
3623 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3624 before it. */
3625
3626 static bfd_boolean
3627 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3628 struct arm_plt_info *arm_plt)
3629 {
3630 struct elf32_arm_link_hash_table *htab;
3631
3632 htab = elf32_arm_hash_table (info);
3633 return (arm_plt->thumb_refcount != 0
3634 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3635 }
3636
3637 /* Return a pointer to the head of the dynamic reloc list that should
3638 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3639 ABFD's symbol table. Return null if an error occurs. */
3640
3641 static struct elf_dyn_relocs **
3642 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3643 Elf_Internal_Sym *isym)
3644 {
3645 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3646 {
3647 struct arm_local_iplt_info *local_iplt;
3648
3649 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3650 if (local_iplt == NULL)
3651 return NULL;
3652 return &local_iplt->dyn_relocs;
3653 }
3654 else
3655 {
3656 /* Track dynamic relocs needed for local syms too.
3657 We really need local syms available to do this
3658 easily. Oh well. */
3659 asection *s;
3660 void *vpp;
3661
3662 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3663 if (s == NULL)
3664 abort ();
3665
3666 vpp = &elf_section_data (s)->local_dynrel;
3667 return (struct elf_dyn_relocs **) vpp;
3668 }
3669 }
3670
3671 /* Initialize an entry in the stub hash table. */
3672
3673 static struct bfd_hash_entry *
3674 stub_hash_newfunc (struct bfd_hash_entry *entry,
3675 struct bfd_hash_table *table,
3676 const char *string)
3677 {
3678 /* Allocate the structure if it has not already been allocated by a
3679 subclass. */
3680 if (entry == NULL)
3681 {
3682 entry = (struct bfd_hash_entry *)
3683 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3684 if (entry == NULL)
3685 return entry;
3686 }
3687
3688 /* Call the allocation method of the superclass. */
3689 entry = bfd_hash_newfunc (entry, table, string);
3690 if (entry != NULL)
3691 {
3692 struct elf32_arm_stub_hash_entry *eh;
3693
3694 /* Initialize the local fields. */
3695 eh = (struct elf32_arm_stub_hash_entry *) entry;
3696 eh->stub_sec = NULL;
3697 eh->stub_offset = (bfd_vma) -1;
3698 eh->source_value = 0;
3699 eh->target_value = 0;
3700 eh->target_section = NULL;
3701 eh->orig_insn = 0;
3702 eh->stub_type = arm_stub_none;
3703 eh->stub_size = 0;
3704 eh->stub_template = NULL;
3705 eh->stub_template_size = -1;
3706 eh->h = NULL;
3707 eh->id_sec = NULL;
3708 eh->output_name = NULL;
3709 }
3710
3711 return entry;
3712 }
3713
3714 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3715 shortcuts to them in our hash table. */
3716
3717 static bfd_boolean
3718 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3719 {
3720 struct elf32_arm_link_hash_table *htab;
3721
3722 htab = elf32_arm_hash_table (info);
3723 if (htab == NULL)
3724 return FALSE;
3725
3726 /* BPABI objects never have a GOT, or associated sections. */
3727 if (htab->symbian_p)
3728 return TRUE;
3729
3730 if (! _bfd_elf_create_got_section (dynobj, info))
3731 return FALSE;
3732
3733 /* Also create .rofixup. */
3734 if (htab->fdpic_p)
3735 {
3736 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3737 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3738 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3739 if (htab->srofixup == NULL || ! bfd_set_section_alignment (dynobj, htab->srofixup, 2))
3740 return FALSE;
3741 }
3742
3743 return TRUE;
3744 }
3745
3746 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3747
3748 static bfd_boolean
3749 create_ifunc_sections (struct bfd_link_info *info)
3750 {
3751 struct elf32_arm_link_hash_table *htab;
3752 const struct elf_backend_data *bed;
3753 bfd *dynobj;
3754 asection *s;
3755 flagword flags;
3756
3757 htab = elf32_arm_hash_table (info);
3758 dynobj = htab->root.dynobj;
3759 bed = get_elf_backend_data (dynobj);
3760 flags = bed->dynamic_sec_flags;
3761
3762 if (htab->root.iplt == NULL)
3763 {
3764 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3765 flags | SEC_READONLY | SEC_CODE);
3766 if (s == NULL
3767 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3768 return FALSE;
3769 htab->root.iplt = s;
3770 }
3771
3772 if (htab->root.irelplt == NULL)
3773 {
3774 s = bfd_make_section_anyway_with_flags (dynobj,
3775 RELOC_SECTION (htab, ".iplt"),
3776 flags | SEC_READONLY);
3777 if (s == NULL
3778 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3779 return FALSE;
3780 htab->root.irelplt = s;
3781 }
3782
3783 if (htab->root.igotplt == NULL)
3784 {
3785 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3786 if (s == NULL
3787 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3788 return FALSE;
3789 htab->root.igotplt = s;
3790 }
3791 return TRUE;
3792 }
3793
3794 /* Determine if we're dealing with a Thumb only architecture. */
3795
3796 static bfd_boolean
3797 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3798 {
3799 int arch;
3800 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3801 Tag_CPU_arch_profile);
3802
3803 if (profile)
3804 return profile == 'M';
3805
3806 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3807
3808 /* Force return logic to be reviewed for each new architecture. */
3809 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3810
3811 if (arch == TAG_CPU_ARCH_V6_M
3812 || arch == TAG_CPU_ARCH_V6S_M
3813 || arch == TAG_CPU_ARCH_V7E_M
3814 || arch == TAG_CPU_ARCH_V8M_BASE
3815 || arch == TAG_CPU_ARCH_V8M_MAIN)
3816 return TRUE;
3817
3818 return FALSE;
3819 }
3820
3821 /* Determine if we're dealing with a Thumb-2 object. */
3822
3823 static bfd_boolean
3824 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3825 {
3826 int arch;
3827 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3828 Tag_THUMB_ISA_use);
3829
3830 if (thumb_isa)
3831 return thumb_isa == 2;
3832
3833 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3834
3835 /* Force return logic to be reviewed for each new architecture. */
3836 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3837
3838 return (arch == TAG_CPU_ARCH_V6T2
3839 || arch == TAG_CPU_ARCH_V7
3840 || arch == TAG_CPU_ARCH_V7E_M
3841 || arch == TAG_CPU_ARCH_V8
3842 || arch == TAG_CPU_ARCH_V8R
3843 || arch == TAG_CPU_ARCH_V8M_MAIN);
3844 }
3845
3846 /* Determine whether Thumb-2 BL instruction is available. */
3847
3848 static bfd_boolean
3849 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3850 {
3851 int arch =
3852 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3853
3854 /* Force return logic to be reviewed for each new architecture. */
3855 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3856
3857 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3858 return (arch == TAG_CPU_ARCH_V6T2
3859 || arch >= TAG_CPU_ARCH_V7);
3860 }
3861
3862 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3863 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3864 hash table. */
3865
3866 static bfd_boolean
3867 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3868 {
3869 struct elf32_arm_link_hash_table *htab;
3870
3871 htab = elf32_arm_hash_table (info);
3872 if (htab == NULL)
3873 return FALSE;
3874
3875 if (!htab->root.sgot && !create_got_section (dynobj, info))
3876 return FALSE;
3877
3878 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3879 return FALSE;
3880
3881 if (htab->vxworks_p)
3882 {
3883 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3884 return FALSE;
3885
3886 if (bfd_link_pic (info))
3887 {
3888 htab->plt_header_size = 0;
3889 htab->plt_entry_size
3890 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3891 }
3892 else
3893 {
3894 htab->plt_header_size
3895 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3896 htab->plt_entry_size
3897 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3898 }
3899
3900 if (elf_elfheader (dynobj))
3901 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3902 }
3903 else
3904 {
3905 /* PR ld/16017
3906 Test for thumb only architectures. Note - we cannot just call
3907 using_thumb_only() as the attributes in the output bfd have not been
3908 initialised at this point, so instead we use the input bfd. */
3909 bfd * saved_obfd = htab->obfd;
3910
3911 htab->obfd = dynobj;
3912 if (using_thumb_only (htab))
3913 {
3914 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3915 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3916 }
3917 htab->obfd = saved_obfd;
3918 }
3919
3920 if (htab->fdpic_p) {
3921 htab->plt_header_size = 0;
3922 if (info->flags & DF_BIND_NOW)
3923 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
3924 else
3925 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
3926 }
3927
3928 if (!htab->root.splt
3929 || !htab->root.srelplt
3930 || !htab->root.sdynbss
3931 || (!bfd_link_pic (info) && !htab->root.srelbss))
3932 abort ();
3933
3934 return TRUE;
3935 }
3936
3937 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3938
3939 static void
3940 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3941 struct elf_link_hash_entry *dir,
3942 struct elf_link_hash_entry *ind)
3943 {
3944 struct elf32_arm_link_hash_entry *edir, *eind;
3945
3946 edir = (struct elf32_arm_link_hash_entry *) dir;
3947 eind = (struct elf32_arm_link_hash_entry *) ind;
3948
3949 if (eind->dyn_relocs != NULL)
3950 {
3951 if (edir->dyn_relocs != NULL)
3952 {
3953 struct elf_dyn_relocs **pp;
3954 struct elf_dyn_relocs *p;
3955
3956 /* Add reloc counts against the indirect sym to the direct sym
3957 list. Merge any entries against the same section. */
3958 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3959 {
3960 struct elf_dyn_relocs *q;
3961
3962 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3963 if (q->sec == p->sec)
3964 {
3965 q->pc_count += p->pc_count;
3966 q->count += p->count;
3967 *pp = p->next;
3968 break;
3969 }
3970 if (q == NULL)
3971 pp = &p->next;
3972 }
3973 *pp = edir->dyn_relocs;
3974 }
3975
3976 edir->dyn_relocs = eind->dyn_relocs;
3977 eind->dyn_relocs = NULL;
3978 }
3979
3980 if (ind->root.type == bfd_link_hash_indirect)
3981 {
3982 /* Copy over PLT info. */
3983 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3984 eind->plt.thumb_refcount = 0;
3985 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3986 eind->plt.maybe_thumb_refcount = 0;
3987 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3988 eind->plt.noncall_refcount = 0;
3989
3990 /* Copy FDPIC counters. */
3991 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
3992 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
3993 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
3994
3995 /* We should only allocate a function to .iplt once the final
3996 symbol information is known. */
3997 BFD_ASSERT (!eind->is_iplt);
3998
3999 if (dir->got.refcount <= 0)
4000 {
4001 edir->tls_type = eind->tls_type;
4002 eind->tls_type = GOT_UNKNOWN;
4003 }
4004 }
4005
4006 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4007 }
4008
4009 /* Destroy an ARM elf linker hash table. */
4010
4011 static void
4012 elf32_arm_link_hash_table_free (bfd *obfd)
4013 {
4014 struct elf32_arm_link_hash_table *ret
4015 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4016
4017 bfd_hash_table_free (&ret->stub_hash_table);
4018 _bfd_elf_link_hash_table_free (obfd);
4019 }
4020
4021 /* Create an ARM elf linker hash table. */
4022
4023 static struct bfd_link_hash_table *
4024 elf32_arm_link_hash_table_create (bfd *abfd)
4025 {
4026 struct elf32_arm_link_hash_table *ret;
4027 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
4028
4029 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4030 if (ret == NULL)
4031 return NULL;
4032
4033 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4034 elf32_arm_link_hash_newfunc,
4035 sizeof (struct elf32_arm_link_hash_entry),
4036 ARM_ELF_DATA))
4037 {
4038 free (ret);
4039 return NULL;
4040 }
4041
4042 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4043 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4044 #ifdef FOUR_WORD_PLT
4045 ret->plt_header_size = 16;
4046 ret->plt_entry_size = 16;
4047 #else
4048 ret->plt_header_size = 20;
4049 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4050 #endif
4051 ret->use_rel = TRUE;
4052 ret->obfd = abfd;
4053 ret->fdpic_p = 0;
4054
4055 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4056 sizeof (struct elf32_arm_stub_hash_entry)))
4057 {
4058 _bfd_elf_link_hash_table_free (abfd);
4059 return NULL;
4060 }
4061 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4062
4063 return &ret->root.root;
4064 }
4065
4066 /* Determine what kind of NOPs are available. */
4067
4068 static bfd_boolean
4069 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4070 {
4071 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4072 Tag_CPU_arch);
4073
4074 /* Force return logic to be reviewed for each new architecture. */
4075 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
4076
4077 return (arch == TAG_CPU_ARCH_V6T2
4078 || arch == TAG_CPU_ARCH_V6K
4079 || arch == TAG_CPU_ARCH_V7
4080 || arch == TAG_CPU_ARCH_V8
4081 || arch == TAG_CPU_ARCH_V8R);
4082 }
4083
4084 static bfd_boolean
4085 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4086 {
4087 switch (stub_type)
4088 {
4089 case arm_stub_long_branch_thumb_only:
4090 case arm_stub_long_branch_thumb2_only:
4091 case arm_stub_long_branch_thumb2_only_pure:
4092 case arm_stub_long_branch_v4t_thumb_arm:
4093 case arm_stub_short_branch_v4t_thumb_arm:
4094 case arm_stub_long_branch_v4t_thumb_arm_pic:
4095 case arm_stub_long_branch_v4t_thumb_tls_pic:
4096 case arm_stub_long_branch_thumb_only_pic:
4097 case arm_stub_cmse_branch_thumb_only:
4098 return TRUE;
4099 case arm_stub_none:
4100 BFD_FAIL ();
4101 return FALSE;
4102 break;
4103 default:
4104 return FALSE;
4105 }
4106 }
4107
4108 /* Determine the type of stub needed, if any, for a call. */
4109
4110 static enum elf32_arm_stub_type
4111 arm_type_of_stub (struct bfd_link_info *info,
4112 asection *input_sec,
4113 const Elf_Internal_Rela *rel,
4114 unsigned char st_type,
4115 enum arm_st_branch_type *actual_branch_type,
4116 struct elf32_arm_link_hash_entry *hash,
4117 bfd_vma destination,
4118 asection *sym_sec,
4119 bfd *input_bfd,
4120 const char *name)
4121 {
4122 bfd_vma location;
4123 bfd_signed_vma branch_offset;
4124 unsigned int r_type;
4125 struct elf32_arm_link_hash_table * globals;
4126 bfd_boolean thumb2, thumb2_bl, thumb_only;
4127 enum elf32_arm_stub_type stub_type = arm_stub_none;
4128 int use_plt = 0;
4129 enum arm_st_branch_type branch_type = *actual_branch_type;
4130 union gotplt_union *root_plt;
4131 struct arm_plt_info *arm_plt;
4132 int arch;
4133 int thumb2_movw;
4134
4135 if (branch_type == ST_BRANCH_LONG)
4136 return stub_type;
4137
4138 globals = elf32_arm_hash_table (info);
4139 if (globals == NULL)
4140 return stub_type;
4141
4142 thumb_only = using_thumb_only (globals);
4143 thumb2 = using_thumb2 (globals);
4144 thumb2_bl = using_thumb2_bl (globals);
4145
4146 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4147
4148 /* True for architectures that implement the thumb2 movw instruction. */
4149 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4150
4151 /* Determine where the call point is. */
4152 location = (input_sec->output_offset
4153 + input_sec->output_section->vma
4154 + rel->r_offset);
4155
4156 r_type = ELF32_R_TYPE (rel->r_info);
4157
4158 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4159 are considering a function call relocation. */
4160 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4161 || r_type == R_ARM_THM_JUMP19)
4162 && branch_type == ST_BRANCH_TO_ARM)
4163 branch_type = ST_BRANCH_TO_THUMB;
4164
4165 /* For TLS call relocs, it is the caller's responsibility to provide
4166 the address of the appropriate trampoline. */
4167 if (r_type != R_ARM_TLS_CALL
4168 && r_type != R_ARM_THM_TLS_CALL
4169 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4170 ELF32_R_SYM (rel->r_info), &root_plt,
4171 &arm_plt)
4172 && root_plt->offset != (bfd_vma) -1)
4173 {
4174 asection *splt;
4175
4176 if (hash == NULL || hash->is_iplt)
4177 splt = globals->root.iplt;
4178 else
4179 splt = globals->root.splt;
4180 if (splt != NULL)
4181 {
4182 use_plt = 1;
4183
4184 /* Note when dealing with PLT entries: the main PLT stub is in
4185 ARM mode, so if the branch is in Thumb mode, another
4186 Thumb->ARM stub will be inserted later just before the ARM
4187 PLT stub. If a long branch stub is needed, we'll add a
4188 Thumb->Arm one and branch directly to the ARM PLT entry.
4189 Here, we have to check if a pre-PLT Thumb->ARM stub
4190 is needed and if it will be close enough. */
4191
4192 destination = (splt->output_section->vma
4193 + splt->output_offset
4194 + root_plt->offset);
4195 st_type = STT_FUNC;
4196
4197 /* Thumb branch/call to PLT: it can become a branch to ARM
4198 or to Thumb. We must perform the same checks and
4199 corrections as in elf32_arm_final_link_relocate. */
4200 if ((r_type == R_ARM_THM_CALL)
4201 || (r_type == R_ARM_THM_JUMP24))
4202 {
4203 if (globals->use_blx
4204 && r_type == R_ARM_THM_CALL
4205 && !thumb_only)
4206 {
4207 /* If the Thumb BLX instruction is available, convert
4208 the BL to a BLX instruction to call the ARM-mode
4209 PLT entry. */
4210 branch_type = ST_BRANCH_TO_ARM;
4211 }
4212 else
4213 {
4214 if (!thumb_only)
4215 /* Target the Thumb stub before the ARM PLT entry. */
4216 destination -= PLT_THUMB_STUB_SIZE;
4217 branch_type = ST_BRANCH_TO_THUMB;
4218 }
4219 }
4220 else
4221 {
4222 branch_type = ST_BRANCH_TO_ARM;
4223 }
4224 }
4225 }
4226 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4227 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4228
4229 branch_offset = (bfd_signed_vma)(destination - location);
4230
4231 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4232 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4233 {
4234 /* Handle cases where:
4235 - this call goes too far (different Thumb/Thumb2 max
4236 distance)
4237 - it's a Thumb->Arm call and blx is not available, or it's a
4238 Thumb->Arm branch (not bl). A stub is needed in this case,
4239 but only if this call is not through a PLT entry. Indeed,
4240 PLT stubs handle mode switching already. */
4241 if ((!thumb2_bl
4242 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4243 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4244 || (thumb2_bl
4245 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4246 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4247 || (thumb2
4248 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4249 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4250 && (r_type == R_ARM_THM_JUMP19))
4251 || (branch_type == ST_BRANCH_TO_ARM
4252 && (((r_type == R_ARM_THM_CALL
4253 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4254 || (r_type == R_ARM_THM_JUMP24)
4255 || (r_type == R_ARM_THM_JUMP19))
4256 && !use_plt))
4257 {
4258 /* If we need to insert a Thumb-Thumb long branch stub to a
4259 PLT, use one that branches directly to the ARM PLT
4260 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4261 stub, undo this now. */
4262 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4263 {
4264 branch_type = ST_BRANCH_TO_ARM;
4265 branch_offset += PLT_THUMB_STUB_SIZE;
4266 }
4267
4268 if (branch_type == ST_BRANCH_TO_THUMB)
4269 {
4270 /* Thumb to thumb. */
4271 if (!thumb_only)
4272 {
4273 if (input_sec->flags & SEC_ELF_PURECODE)
4274 _bfd_error_handler
4275 (_("%pB(%pA): warning: long branch veneers used in"
4276 " section with SHF_ARM_PURECODE section"
4277 " attribute is only supported for M-profile"
4278 " targets that implement the movw instruction"),
4279 input_bfd, input_sec);
4280
4281 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4282 /* PIC stubs. */
4283 ? ((globals->use_blx
4284 && (r_type == R_ARM_THM_CALL))
4285 /* V5T and above. Stub starts with ARM code, so
4286 we must be able to switch mode before
4287 reaching it, which is only possible for 'bl'
4288 (ie R_ARM_THM_CALL relocation). */
4289 ? arm_stub_long_branch_any_thumb_pic
4290 /* On V4T, use Thumb code only. */
4291 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4292
4293 /* non-PIC stubs. */
4294 : ((globals->use_blx
4295 && (r_type == R_ARM_THM_CALL))
4296 /* V5T and above. */
4297 ? arm_stub_long_branch_any_any
4298 /* V4T. */
4299 : arm_stub_long_branch_v4t_thumb_thumb);
4300 }
4301 else
4302 {
4303 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4304 stub_type = arm_stub_long_branch_thumb2_only_pure;
4305 else
4306 {
4307 if (input_sec->flags & SEC_ELF_PURECODE)
4308 _bfd_error_handler
4309 (_("%pB(%pA): warning: long branch veneers used in"
4310 " section with SHF_ARM_PURECODE section"
4311 " attribute is only supported for M-profile"
4312 " targets that implement the movw instruction"),
4313 input_bfd, input_sec);
4314
4315 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4316 /* PIC stub. */
4317 ? arm_stub_long_branch_thumb_only_pic
4318 /* non-PIC stub. */
4319 : (thumb2 ? arm_stub_long_branch_thumb2_only
4320 : arm_stub_long_branch_thumb_only);
4321 }
4322 }
4323 }
4324 else
4325 {
4326 if (input_sec->flags & SEC_ELF_PURECODE)
4327 _bfd_error_handler
4328 (_("%pB(%pA): warning: long branch veneers used in"
4329 " section with SHF_ARM_PURECODE section"
4330 " attribute is only supported" " for M-profile"
4331 " targets that implement the movw instruction"),
4332 input_bfd, input_sec);
4333
4334 /* Thumb to arm. */
4335 if (sym_sec != NULL
4336 && sym_sec->owner != NULL
4337 && !INTERWORK_FLAG (sym_sec->owner))
4338 {
4339 _bfd_error_handler
4340 (_("%pB(%s): warning: interworking not enabled;"
4341 " first occurrence: %pB: %s call to %s"),
4342 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4343 }
4344
4345 stub_type =
4346 (bfd_link_pic (info) | globals->pic_veneer)
4347 /* PIC stubs. */
4348 ? (r_type == R_ARM_THM_TLS_CALL
4349 /* TLS PIC stubs. */
4350 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4351 : arm_stub_long_branch_v4t_thumb_tls_pic)
4352 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4353 /* V5T PIC and above. */
4354 ? arm_stub_long_branch_any_arm_pic
4355 /* V4T PIC stub. */
4356 : arm_stub_long_branch_v4t_thumb_arm_pic))
4357
4358 /* non-PIC stubs. */
4359 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4360 /* V5T and above. */
4361 ? arm_stub_long_branch_any_any
4362 /* V4T. */
4363 : arm_stub_long_branch_v4t_thumb_arm);
4364
4365 /* Handle v4t short branches. */
4366 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4367 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4368 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4369 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4370 }
4371 }
4372 }
4373 else if (r_type == R_ARM_CALL
4374 || r_type == R_ARM_JUMP24
4375 || r_type == R_ARM_PLT32
4376 || r_type == R_ARM_TLS_CALL)
4377 {
4378 if (input_sec->flags & SEC_ELF_PURECODE)
4379 _bfd_error_handler
4380 (_("%pB(%pA): warning: long branch veneers used in"
4381 " section with SHF_ARM_PURECODE section"
4382 " attribute is only supported for M-profile"
4383 " targets that implement the movw instruction"),
4384 input_bfd, input_sec);
4385 if (branch_type == ST_BRANCH_TO_THUMB)
4386 {
4387 /* Arm to thumb. */
4388
4389 if (sym_sec != NULL
4390 && sym_sec->owner != NULL
4391 && !INTERWORK_FLAG (sym_sec->owner))
4392 {
4393 _bfd_error_handler
4394 (_("%pB(%s): warning: interworking not enabled;"
4395 " first occurrence: %pB: %s call to %s"),
4396 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4397 }
4398
4399 /* We have an extra 2-bytes reach because of
4400 the mode change (bit 24 (H) of BLX encoding). */
4401 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4402 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4403 || (r_type == R_ARM_CALL && !globals->use_blx)
4404 || (r_type == R_ARM_JUMP24)
4405 || (r_type == R_ARM_PLT32))
4406 {
4407 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4408 /* PIC stubs. */
4409 ? ((globals->use_blx)
4410 /* V5T and above. */
4411 ? arm_stub_long_branch_any_thumb_pic
4412 /* V4T stub. */
4413 : arm_stub_long_branch_v4t_arm_thumb_pic)
4414
4415 /* non-PIC stubs. */
4416 : ((globals->use_blx)
4417 /* V5T and above. */
4418 ? arm_stub_long_branch_any_any
4419 /* V4T. */
4420 : arm_stub_long_branch_v4t_arm_thumb);
4421 }
4422 }
4423 else
4424 {
4425 /* Arm to arm. */
4426 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4427 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4428 {
4429 stub_type =
4430 (bfd_link_pic (info) | globals->pic_veneer)
4431 /* PIC stubs. */
4432 ? (r_type == R_ARM_TLS_CALL
4433 /* TLS PIC Stub. */
4434 ? arm_stub_long_branch_any_tls_pic
4435 : (globals->nacl_p
4436 ? arm_stub_long_branch_arm_nacl_pic
4437 : arm_stub_long_branch_any_arm_pic))
4438 /* non-PIC stubs. */
4439 : (globals->nacl_p
4440 ? arm_stub_long_branch_arm_nacl
4441 : arm_stub_long_branch_any_any);
4442 }
4443 }
4444 }
4445
4446 /* If a stub is needed, record the actual destination type. */
4447 if (stub_type != arm_stub_none)
4448 *actual_branch_type = branch_type;
4449
4450 return stub_type;
4451 }
4452
4453 /* Build a name for an entry in the stub hash table. */
4454
4455 static char *
4456 elf32_arm_stub_name (const asection *input_section,
4457 const asection *sym_sec,
4458 const struct elf32_arm_link_hash_entry *hash,
4459 const Elf_Internal_Rela *rel,
4460 enum elf32_arm_stub_type stub_type)
4461 {
4462 char *stub_name;
4463 bfd_size_type len;
4464
4465 if (hash)
4466 {
4467 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4468 stub_name = (char *) bfd_malloc (len);
4469 if (stub_name != NULL)
4470 sprintf (stub_name, "%08x_%s+%x_%d",
4471 input_section->id & 0xffffffff,
4472 hash->root.root.root.string,
4473 (int) rel->r_addend & 0xffffffff,
4474 (int) stub_type);
4475 }
4476 else
4477 {
4478 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4479 stub_name = (char *) bfd_malloc (len);
4480 if (stub_name != NULL)
4481 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4482 input_section->id & 0xffffffff,
4483 sym_sec->id & 0xffffffff,
4484 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4485 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4486 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4487 (int) rel->r_addend & 0xffffffff,
4488 (int) stub_type);
4489 }
4490
4491 return stub_name;
4492 }
4493
4494 /* Look up an entry in the stub hash. Stub entries are cached because
4495 creating the stub name takes a bit of time. */
4496
4497 static struct elf32_arm_stub_hash_entry *
4498 elf32_arm_get_stub_entry (const asection *input_section,
4499 const asection *sym_sec,
4500 struct elf_link_hash_entry *hash,
4501 const Elf_Internal_Rela *rel,
4502 struct elf32_arm_link_hash_table *htab,
4503 enum elf32_arm_stub_type stub_type)
4504 {
4505 struct elf32_arm_stub_hash_entry *stub_entry;
4506 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4507 const asection *id_sec;
4508
4509 if ((input_section->flags & SEC_CODE) == 0)
4510 return NULL;
4511
4512 /* If this input section is part of a group of sections sharing one
4513 stub section, then use the id of the first section in the group.
4514 Stub names need to include a section id, as there may well be
4515 more than one stub used to reach say, printf, and we need to
4516 distinguish between them. */
4517 BFD_ASSERT (input_section->id <= htab->top_id);
4518 id_sec = htab->stub_group[input_section->id].link_sec;
4519
4520 if (h != NULL && h->stub_cache != NULL
4521 && h->stub_cache->h == h
4522 && h->stub_cache->id_sec == id_sec
4523 && h->stub_cache->stub_type == stub_type)
4524 {
4525 stub_entry = h->stub_cache;
4526 }
4527 else
4528 {
4529 char *stub_name;
4530
4531 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4532 if (stub_name == NULL)
4533 return NULL;
4534
4535 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4536 stub_name, FALSE, FALSE);
4537 if (h != NULL)
4538 h->stub_cache = stub_entry;
4539
4540 free (stub_name);
4541 }
4542
4543 return stub_entry;
4544 }
4545
4546 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4547 section. */
4548
4549 static bfd_boolean
4550 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4551 {
4552 if (stub_type >= max_stub_type)
4553 abort (); /* Should be unreachable. */
4554
4555 switch (stub_type)
4556 {
4557 case arm_stub_cmse_branch_thumb_only:
4558 return TRUE;
4559
4560 default:
4561 return FALSE;
4562 }
4563
4564 abort (); /* Should be unreachable. */
4565 }
4566
4567 /* Required alignment (as a power of 2) for the dedicated section holding
4568 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4569 with input sections. */
4570
4571 static int
4572 arm_dedicated_stub_output_section_required_alignment
4573 (enum elf32_arm_stub_type stub_type)
4574 {
4575 if (stub_type >= max_stub_type)
4576 abort (); /* Should be unreachable. */
4577
4578 switch (stub_type)
4579 {
4580 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4581 boundary. */
4582 case arm_stub_cmse_branch_thumb_only:
4583 return 5;
4584
4585 default:
4586 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4587 return 0;
4588 }
4589
4590 abort (); /* Should be unreachable. */
4591 }
4592
4593 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4594 NULL if veneers of this type are interspersed with input sections. */
4595
4596 static const char *
4597 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4598 {
4599 if (stub_type >= max_stub_type)
4600 abort (); /* Should be unreachable. */
4601
4602 switch (stub_type)
4603 {
4604 case arm_stub_cmse_branch_thumb_only:
4605 return ".gnu.sgstubs";
4606
4607 default:
4608 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4609 return NULL;
4610 }
4611
4612 abort (); /* Should be unreachable. */
4613 }
4614
4615 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4616 returns the address of the hash table field in HTAB holding a pointer to the
4617 corresponding input section. Otherwise, returns NULL. */
4618
4619 static asection **
4620 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4621 enum elf32_arm_stub_type stub_type)
4622 {
4623 if (stub_type >= max_stub_type)
4624 abort (); /* Should be unreachable. */
4625
4626 switch (stub_type)
4627 {
4628 case arm_stub_cmse_branch_thumb_only:
4629 return &htab->cmse_stub_sec;
4630
4631 default:
4632 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4633 return NULL;
4634 }
4635
4636 abort (); /* Should be unreachable. */
4637 }
4638
4639 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4640 is the section that branch into veneer and can be NULL if stub should go in
4641 a dedicated output section. Returns a pointer to the stub section, and the
4642 section to which the stub section will be attached (in *LINK_SEC_P).
4643 LINK_SEC_P may be NULL. */
4644
4645 static asection *
4646 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4647 struct elf32_arm_link_hash_table *htab,
4648 enum elf32_arm_stub_type stub_type)
4649 {
4650 asection *link_sec, *out_sec, **stub_sec_p;
4651 const char *stub_sec_prefix;
4652 bfd_boolean dedicated_output_section =
4653 arm_dedicated_stub_output_section_required (stub_type);
4654 int align;
4655
4656 if (dedicated_output_section)
4657 {
4658 bfd *output_bfd = htab->obfd;
4659 const char *out_sec_name =
4660 arm_dedicated_stub_output_section_name (stub_type);
4661 link_sec = NULL;
4662 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4663 stub_sec_prefix = out_sec_name;
4664 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4665 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4666 if (out_sec == NULL)
4667 {
4668 _bfd_error_handler (_("no address assigned to the veneers output "
4669 "section %s"), out_sec_name);
4670 return NULL;
4671 }
4672 }
4673 else
4674 {
4675 BFD_ASSERT (section->id <= htab->top_id);
4676 link_sec = htab->stub_group[section->id].link_sec;
4677 BFD_ASSERT (link_sec != NULL);
4678 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4679 if (*stub_sec_p == NULL)
4680 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4681 stub_sec_prefix = link_sec->name;
4682 out_sec = link_sec->output_section;
4683 align = htab->nacl_p ? 4 : 3;
4684 }
4685
4686 if (*stub_sec_p == NULL)
4687 {
4688 size_t namelen;
4689 bfd_size_type len;
4690 char *s_name;
4691
4692 namelen = strlen (stub_sec_prefix);
4693 len = namelen + sizeof (STUB_SUFFIX);
4694 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4695 if (s_name == NULL)
4696 return NULL;
4697
4698 memcpy (s_name, stub_sec_prefix, namelen);
4699 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4700 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4701 align);
4702 if (*stub_sec_p == NULL)
4703 return NULL;
4704
4705 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4706 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4707 | SEC_KEEP;
4708 }
4709
4710 if (!dedicated_output_section)
4711 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4712
4713 if (link_sec_p)
4714 *link_sec_p = link_sec;
4715
4716 return *stub_sec_p;
4717 }
4718
4719 /* Add a new stub entry to the stub hash. Not all fields of the new
4720 stub entry are initialised. */
4721
4722 static struct elf32_arm_stub_hash_entry *
4723 elf32_arm_add_stub (const char *stub_name, asection *section,
4724 struct elf32_arm_link_hash_table *htab,
4725 enum elf32_arm_stub_type stub_type)
4726 {
4727 asection *link_sec;
4728 asection *stub_sec;
4729 struct elf32_arm_stub_hash_entry *stub_entry;
4730
4731 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4732 stub_type);
4733 if (stub_sec == NULL)
4734 return NULL;
4735
4736 /* Enter this entry into the linker stub hash table. */
4737 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4738 TRUE, FALSE);
4739 if (stub_entry == NULL)
4740 {
4741 if (section == NULL)
4742 section = stub_sec;
4743 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4744 section->owner, stub_name);
4745 return NULL;
4746 }
4747
4748 stub_entry->stub_sec = stub_sec;
4749 stub_entry->stub_offset = (bfd_vma) -1;
4750 stub_entry->id_sec = link_sec;
4751
4752 return stub_entry;
4753 }
4754
4755 /* Store an Arm insn into an output section not processed by
4756 elf32_arm_write_section. */
4757
4758 static void
4759 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4760 bfd * output_bfd, bfd_vma val, void * ptr)
4761 {
4762 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4763 bfd_putl32 (val, ptr);
4764 else
4765 bfd_putb32 (val, ptr);
4766 }
4767
4768 /* Store a 16-bit Thumb insn into an output section not processed by
4769 elf32_arm_write_section. */
4770
4771 static void
4772 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4773 bfd * output_bfd, bfd_vma val, void * ptr)
4774 {
4775 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4776 bfd_putl16 (val, ptr);
4777 else
4778 bfd_putb16 (val, ptr);
4779 }
4780
4781 /* Store a Thumb2 insn into an output section not processed by
4782 elf32_arm_write_section. */
4783
4784 static void
4785 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4786 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4787 {
4788 /* T2 instructions are 16-bit streamed. */
4789 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4790 {
4791 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4792 bfd_putl16 ((val & 0xffff), ptr + 2);
4793 }
4794 else
4795 {
4796 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4797 bfd_putb16 ((val & 0xffff), ptr + 2);
4798 }
4799 }
4800
4801 /* If it's possible to change R_TYPE to a more efficient access
4802 model, return the new reloc type. */
4803
4804 static unsigned
4805 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4806 struct elf_link_hash_entry *h)
4807 {
4808 int is_local = (h == NULL);
4809
4810 if (bfd_link_pic (info)
4811 || (h && h->root.type == bfd_link_hash_undefweak))
4812 return r_type;
4813
4814 /* We do not support relaxations for Old TLS models. */
4815 switch (r_type)
4816 {
4817 case R_ARM_TLS_GOTDESC:
4818 case R_ARM_TLS_CALL:
4819 case R_ARM_THM_TLS_CALL:
4820 case R_ARM_TLS_DESCSEQ:
4821 case R_ARM_THM_TLS_DESCSEQ:
4822 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4823 }
4824
4825 return r_type;
4826 }
4827
4828 static bfd_reloc_status_type elf32_arm_final_link_relocate
4829 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4830 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4831 const char *, unsigned char, enum arm_st_branch_type,
4832 struct elf_link_hash_entry *, bfd_boolean *, char **);
4833
4834 static unsigned int
4835 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4836 {
4837 switch (stub_type)
4838 {
4839 case arm_stub_a8_veneer_b_cond:
4840 case arm_stub_a8_veneer_b:
4841 case arm_stub_a8_veneer_bl:
4842 return 2;
4843
4844 case arm_stub_long_branch_any_any:
4845 case arm_stub_long_branch_v4t_arm_thumb:
4846 case arm_stub_long_branch_thumb_only:
4847 case arm_stub_long_branch_thumb2_only:
4848 case arm_stub_long_branch_thumb2_only_pure:
4849 case arm_stub_long_branch_v4t_thumb_thumb:
4850 case arm_stub_long_branch_v4t_thumb_arm:
4851 case arm_stub_short_branch_v4t_thumb_arm:
4852 case arm_stub_long_branch_any_arm_pic:
4853 case arm_stub_long_branch_any_thumb_pic:
4854 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4855 case arm_stub_long_branch_v4t_arm_thumb_pic:
4856 case arm_stub_long_branch_v4t_thumb_arm_pic:
4857 case arm_stub_long_branch_thumb_only_pic:
4858 case arm_stub_long_branch_any_tls_pic:
4859 case arm_stub_long_branch_v4t_thumb_tls_pic:
4860 case arm_stub_cmse_branch_thumb_only:
4861 case arm_stub_a8_veneer_blx:
4862 return 4;
4863
4864 case arm_stub_long_branch_arm_nacl:
4865 case arm_stub_long_branch_arm_nacl_pic:
4866 return 16;
4867
4868 default:
4869 abort (); /* Should be unreachable. */
4870 }
4871 }
4872
4873 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4874 veneering (TRUE) or have their own symbol (FALSE). */
4875
4876 static bfd_boolean
4877 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4878 {
4879 if (stub_type >= max_stub_type)
4880 abort (); /* Should be unreachable. */
4881
4882 switch (stub_type)
4883 {
4884 case arm_stub_cmse_branch_thumb_only:
4885 return TRUE;
4886
4887 default:
4888 return FALSE;
4889 }
4890
4891 abort (); /* Should be unreachable. */
4892 }
4893
4894 /* Returns the padding needed for the dedicated section used stubs of type
4895 STUB_TYPE. */
4896
4897 static int
4898 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4899 {
4900 if (stub_type >= max_stub_type)
4901 abort (); /* Should be unreachable. */
4902
4903 switch (stub_type)
4904 {
4905 case arm_stub_cmse_branch_thumb_only:
4906 return 32;
4907
4908 default:
4909 return 0;
4910 }
4911
4912 abort (); /* Should be unreachable. */
4913 }
4914
4915 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4916 returns the address of the hash table field in HTAB holding the offset at
4917 which new veneers should be layed out in the stub section. */
4918
4919 static bfd_vma*
4920 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4921 enum elf32_arm_stub_type stub_type)
4922 {
4923 switch (stub_type)
4924 {
4925 case arm_stub_cmse_branch_thumb_only:
4926 return &htab->new_cmse_stub_offset;
4927
4928 default:
4929 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4930 return NULL;
4931 }
4932 }
4933
4934 static bfd_boolean
4935 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4936 void * in_arg)
4937 {
4938 #define MAXRELOCS 3
4939 bfd_boolean removed_sg_veneer;
4940 struct elf32_arm_stub_hash_entry *stub_entry;
4941 struct elf32_arm_link_hash_table *globals;
4942 struct bfd_link_info *info;
4943 asection *stub_sec;
4944 bfd *stub_bfd;
4945 bfd_byte *loc;
4946 bfd_vma sym_value;
4947 int template_size;
4948 int size;
4949 const insn_sequence *template_sequence;
4950 int i;
4951 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4952 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4953 int nrelocs = 0;
4954 int just_allocated = 0;
4955
4956 /* Massage our args to the form they really have. */
4957 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4958 info = (struct bfd_link_info *) in_arg;
4959
4960 globals = elf32_arm_hash_table (info);
4961 if (globals == NULL)
4962 return FALSE;
4963
4964 stub_sec = stub_entry->stub_sec;
4965
4966 if ((globals->fix_cortex_a8 < 0)
4967 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4968 /* We have to do less-strictly-aligned fixes last. */
4969 return TRUE;
4970
4971 /* Assign a slot at the end of section if none assigned yet. */
4972 if (stub_entry->stub_offset == (bfd_vma) -1)
4973 {
4974 stub_entry->stub_offset = stub_sec->size;
4975 just_allocated = 1;
4976 }
4977 loc = stub_sec->contents + stub_entry->stub_offset;
4978
4979 stub_bfd = stub_sec->owner;
4980
4981 /* This is the address of the stub destination. */
4982 sym_value = (stub_entry->target_value
4983 + stub_entry->target_section->output_offset
4984 + stub_entry->target_section->output_section->vma);
4985
4986 template_sequence = stub_entry->stub_template;
4987 template_size = stub_entry->stub_template_size;
4988
4989 size = 0;
4990 for (i = 0; i < template_size; i++)
4991 {
4992 switch (template_sequence[i].type)
4993 {
4994 case THUMB16_TYPE:
4995 {
4996 bfd_vma data = (bfd_vma) template_sequence[i].data;
4997 if (template_sequence[i].reloc_addend != 0)
4998 {
4999 /* We've borrowed the reloc_addend field to mean we should
5000 insert a condition code into this (Thumb-1 branch)
5001 instruction. See THUMB16_BCOND_INSN. */
5002 BFD_ASSERT ((data & 0xff00) == 0xd000);
5003 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5004 }
5005 bfd_put_16 (stub_bfd, data, loc + size);
5006 size += 2;
5007 }
5008 break;
5009
5010 case THUMB32_TYPE:
5011 bfd_put_16 (stub_bfd,
5012 (template_sequence[i].data >> 16) & 0xffff,
5013 loc + size);
5014 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5015 loc + size + 2);
5016 if (template_sequence[i].r_type != R_ARM_NONE)
5017 {
5018 stub_reloc_idx[nrelocs] = i;
5019 stub_reloc_offset[nrelocs++] = size;
5020 }
5021 size += 4;
5022 break;
5023
5024 case ARM_TYPE:
5025 bfd_put_32 (stub_bfd, template_sequence[i].data,
5026 loc + size);
5027 /* Handle cases where the target is encoded within the
5028 instruction. */
5029 if (template_sequence[i].r_type == R_ARM_JUMP24)
5030 {
5031 stub_reloc_idx[nrelocs] = i;
5032 stub_reloc_offset[nrelocs++] = size;
5033 }
5034 size += 4;
5035 break;
5036
5037 case DATA_TYPE:
5038 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5039 stub_reloc_idx[nrelocs] = i;
5040 stub_reloc_offset[nrelocs++] = size;
5041 size += 4;
5042 break;
5043
5044 default:
5045 BFD_FAIL ();
5046 return FALSE;
5047 }
5048 }
5049
5050 if (just_allocated)
5051 stub_sec->size += size;
5052
5053 /* Stub size has already been computed in arm_size_one_stub. Check
5054 consistency. */
5055 BFD_ASSERT (size == stub_entry->stub_size);
5056
5057 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5058 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5059 sym_value |= 1;
5060
5061 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5062 to relocate in each stub. */
5063 removed_sg_veneer =
5064 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5065 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5066
5067 for (i = 0; i < nrelocs; i++)
5068 {
5069 Elf_Internal_Rela rel;
5070 bfd_boolean unresolved_reloc;
5071 char *error_message;
5072 bfd_vma points_to =
5073 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5074
5075 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5076 rel.r_info = ELF32_R_INFO (0,
5077 template_sequence[stub_reloc_idx[i]].r_type);
5078 rel.r_addend = 0;
5079
5080 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5081 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5082 template should refer back to the instruction after the original
5083 branch. We use target_section as Cortex-A8 erratum workaround stubs
5084 are only generated when both source and target are in the same
5085 section. */
5086 points_to = stub_entry->target_section->output_section->vma
5087 + stub_entry->target_section->output_offset
5088 + stub_entry->source_value;
5089
5090 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5091 (template_sequence[stub_reloc_idx[i]].r_type),
5092 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5093 points_to, info, stub_entry->target_section, "", STT_FUNC,
5094 stub_entry->branch_type,
5095 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5096 &error_message);
5097 }
5098
5099 return TRUE;
5100 #undef MAXRELOCS
5101 }
5102
5103 /* Calculate the template, template size and instruction size for a stub.
5104 Return value is the instruction size. */
5105
5106 static unsigned int
5107 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5108 const insn_sequence **stub_template,
5109 int *stub_template_size)
5110 {
5111 const insn_sequence *template_sequence = NULL;
5112 int template_size = 0, i;
5113 unsigned int size;
5114
5115 template_sequence = stub_definitions[stub_type].template_sequence;
5116 if (stub_template)
5117 *stub_template = template_sequence;
5118
5119 template_size = stub_definitions[stub_type].template_size;
5120 if (stub_template_size)
5121 *stub_template_size = template_size;
5122
5123 size = 0;
5124 for (i = 0; i < template_size; i++)
5125 {
5126 switch (template_sequence[i].type)
5127 {
5128 case THUMB16_TYPE:
5129 size += 2;
5130 break;
5131
5132 case ARM_TYPE:
5133 case THUMB32_TYPE:
5134 case DATA_TYPE:
5135 size += 4;
5136 break;
5137
5138 default:
5139 BFD_FAIL ();
5140 return 0;
5141 }
5142 }
5143
5144 return size;
5145 }
5146
5147 /* As above, but don't actually build the stub. Just bump offset so
5148 we know stub section sizes. */
5149
5150 static bfd_boolean
5151 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5152 void *in_arg ATTRIBUTE_UNUSED)
5153 {
5154 struct elf32_arm_stub_hash_entry *stub_entry;
5155 const insn_sequence *template_sequence;
5156 int template_size, size;
5157
5158 /* Massage our args to the form they really have. */
5159 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5160
5161 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5162 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5163
5164 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5165 &template_size);
5166
5167 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5168 if (stub_entry->stub_template_size)
5169 {
5170 stub_entry->stub_size = size;
5171 stub_entry->stub_template = template_sequence;
5172 stub_entry->stub_template_size = template_size;
5173 }
5174
5175 /* Already accounted for. */
5176 if (stub_entry->stub_offset != (bfd_vma) -1)
5177 return TRUE;
5178
5179 size = (size + 7) & ~7;
5180 stub_entry->stub_sec->size += size;
5181
5182 return TRUE;
5183 }
5184
5185 /* External entry points for sizing and building linker stubs. */
5186
5187 /* Set up various things so that we can make a list of input sections
5188 for each output section included in the link. Returns -1 on error,
5189 0 when no stubs will be needed, and 1 on success. */
5190
5191 int
5192 elf32_arm_setup_section_lists (bfd *output_bfd,
5193 struct bfd_link_info *info)
5194 {
5195 bfd *input_bfd;
5196 unsigned int bfd_count;
5197 unsigned int top_id, top_index;
5198 asection *section;
5199 asection **input_list, **list;
5200 bfd_size_type amt;
5201 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5202
5203 if (htab == NULL)
5204 return 0;
5205 if (! is_elf_hash_table (htab))
5206 return 0;
5207
5208 /* Count the number of input BFDs and find the top input section id. */
5209 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5210 input_bfd != NULL;
5211 input_bfd = input_bfd->link.next)
5212 {
5213 bfd_count += 1;
5214 for (section = input_bfd->sections;
5215 section != NULL;
5216 section = section->next)
5217 {
5218 if (top_id < section->id)
5219 top_id = section->id;
5220 }
5221 }
5222 htab->bfd_count = bfd_count;
5223
5224 amt = sizeof (struct map_stub) * (top_id + 1);
5225 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5226 if (htab->stub_group == NULL)
5227 return -1;
5228 htab->top_id = top_id;
5229
5230 /* We can't use output_bfd->section_count here to find the top output
5231 section index as some sections may have been removed, and
5232 _bfd_strip_section_from_output doesn't renumber the indices. */
5233 for (section = output_bfd->sections, top_index = 0;
5234 section != NULL;
5235 section = section->next)
5236 {
5237 if (top_index < section->index)
5238 top_index = section->index;
5239 }
5240
5241 htab->top_index = top_index;
5242 amt = sizeof (asection *) * (top_index + 1);
5243 input_list = (asection **) bfd_malloc (amt);
5244 htab->input_list = input_list;
5245 if (input_list == NULL)
5246 return -1;
5247
5248 /* For sections we aren't interested in, mark their entries with a
5249 value we can check later. */
5250 list = input_list + top_index;
5251 do
5252 *list = bfd_abs_section_ptr;
5253 while (list-- != input_list);
5254
5255 for (section = output_bfd->sections;
5256 section != NULL;
5257 section = section->next)
5258 {
5259 if ((section->flags & SEC_CODE) != 0)
5260 input_list[section->index] = NULL;
5261 }
5262
5263 return 1;
5264 }
5265
5266 /* The linker repeatedly calls this function for each input section,
5267 in the order that input sections are linked into output sections.
5268 Build lists of input sections to determine groupings between which
5269 we may insert linker stubs. */
5270
5271 void
5272 elf32_arm_next_input_section (struct bfd_link_info *info,
5273 asection *isec)
5274 {
5275 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5276
5277 if (htab == NULL)
5278 return;
5279
5280 if (isec->output_section->index <= htab->top_index)
5281 {
5282 asection **list = htab->input_list + isec->output_section->index;
5283
5284 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5285 {
5286 /* Steal the link_sec pointer for our list. */
5287 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5288 /* This happens to make the list in reverse order,
5289 which we reverse later. */
5290 PREV_SEC (isec) = *list;
5291 *list = isec;
5292 }
5293 }
5294 }
5295
5296 /* See whether we can group stub sections together. Grouping stub
5297 sections may result in fewer stubs. More importantly, we need to
5298 put all .init* and .fini* stubs at the end of the .init or
5299 .fini output sections respectively, because glibc splits the
5300 _init and _fini functions into multiple parts. Putting a stub in
5301 the middle of a function is not a good idea. */
5302
5303 static void
5304 group_sections (struct elf32_arm_link_hash_table *htab,
5305 bfd_size_type stub_group_size,
5306 bfd_boolean stubs_always_after_branch)
5307 {
5308 asection **list = htab->input_list;
5309
5310 do
5311 {
5312 asection *tail = *list;
5313 asection *head;
5314
5315 if (tail == bfd_abs_section_ptr)
5316 continue;
5317
5318 /* Reverse the list: we must avoid placing stubs at the
5319 beginning of the section because the beginning of the text
5320 section may be required for an interrupt vector in bare metal
5321 code. */
5322 #define NEXT_SEC PREV_SEC
5323 head = NULL;
5324 while (tail != NULL)
5325 {
5326 /* Pop from tail. */
5327 asection *item = tail;
5328 tail = PREV_SEC (item);
5329
5330 /* Push on head. */
5331 NEXT_SEC (item) = head;
5332 head = item;
5333 }
5334
5335 while (head != NULL)
5336 {
5337 asection *curr;
5338 asection *next;
5339 bfd_vma stub_group_start = head->output_offset;
5340 bfd_vma end_of_next;
5341
5342 curr = head;
5343 while (NEXT_SEC (curr) != NULL)
5344 {
5345 next = NEXT_SEC (curr);
5346 end_of_next = next->output_offset + next->size;
5347 if (end_of_next - stub_group_start >= stub_group_size)
5348 /* End of NEXT is too far from start, so stop. */
5349 break;
5350 /* Add NEXT to the group. */
5351 curr = next;
5352 }
5353
5354 /* OK, the size from the start to the start of CURR is less
5355 than stub_group_size and thus can be handled by one stub
5356 section. (Or the head section is itself larger than
5357 stub_group_size, in which case we may be toast.)
5358 We should really be keeping track of the total size of
5359 stubs added here, as stubs contribute to the final output
5360 section size. */
5361 do
5362 {
5363 next = NEXT_SEC (head);
5364 /* Set up this stub group. */
5365 htab->stub_group[head->id].link_sec = curr;
5366 }
5367 while (head != curr && (head = next) != NULL);
5368
5369 /* But wait, there's more! Input sections up to stub_group_size
5370 bytes after the stub section can be handled by it too. */
5371 if (!stubs_always_after_branch)
5372 {
5373 stub_group_start = curr->output_offset + curr->size;
5374
5375 while (next != NULL)
5376 {
5377 end_of_next = next->output_offset + next->size;
5378 if (end_of_next - stub_group_start >= stub_group_size)
5379 /* End of NEXT is too far from stubs, so stop. */
5380 break;
5381 /* Add NEXT to the stub group. */
5382 head = next;
5383 next = NEXT_SEC (head);
5384 htab->stub_group[head->id].link_sec = curr;
5385 }
5386 }
5387 head = next;
5388 }
5389 }
5390 while (list++ != htab->input_list + htab->top_index);
5391
5392 free (htab->input_list);
5393 #undef PREV_SEC
5394 #undef NEXT_SEC
5395 }
5396
5397 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5398 erratum fix. */
5399
5400 static int
5401 a8_reloc_compare (const void *a, const void *b)
5402 {
5403 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5404 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5405
5406 if (ra->from < rb->from)
5407 return -1;
5408 else if (ra->from > rb->from)
5409 return 1;
5410 else
5411 return 0;
5412 }
5413
5414 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5415 const char *, char **);
5416
5417 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5418 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5419 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5420 otherwise. */
5421
5422 static bfd_boolean
5423 cortex_a8_erratum_scan (bfd *input_bfd,
5424 struct bfd_link_info *info,
5425 struct a8_erratum_fix **a8_fixes_p,
5426 unsigned int *num_a8_fixes_p,
5427 unsigned int *a8_fix_table_size_p,
5428 struct a8_erratum_reloc *a8_relocs,
5429 unsigned int num_a8_relocs,
5430 unsigned prev_num_a8_fixes,
5431 bfd_boolean *stub_changed_p)
5432 {
5433 asection *section;
5434 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5435 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5436 unsigned int num_a8_fixes = *num_a8_fixes_p;
5437 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5438
5439 if (htab == NULL)
5440 return FALSE;
5441
5442 for (section = input_bfd->sections;
5443 section != NULL;
5444 section = section->next)
5445 {
5446 bfd_byte *contents = NULL;
5447 struct _arm_elf_section_data *sec_data;
5448 unsigned int span;
5449 bfd_vma base_vma;
5450
5451 if (elf_section_type (section) != SHT_PROGBITS
5452 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5453 || (section->flags & SEC_EXCLUDE) != 0
5454 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5455 || (section->output_section == bfd_abs_section_ptr))
5456 continue;
5457
5458 base_vma = section->output_section->vma + section->output_offset;
5459
5460 if (elf_section_data (section)->this_hdr.contents != NULL)
5461 contents = elf_section_data (section)->this_hdr.contents;
5462 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5463 return TRUE;
5464
5465 sec_data = elf32_arm_section_data (section);
5466
5467 for (span = 0; span < sec_data->mapcount; span++)
5468 {
5469 unsigned int span_start = sec_data->map[span].vma;
5470 unsigned int span_end = (span == sec_data->mapcount - 1)
5471 ? section->size : sec_data->map[span + 1].vma;
5472 unsigned int i;
5473 char span_type = sec_data->map[span].type;
5474 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5475
5476 if (span_type != 't')
5477 continue;
5478
5479 /* Span is entirely within a single 4KB region: skip scanning. */
5480 if (((base_vma + span_start) & ~0xfff)
5481 == ((base_vma + span_end) & ~0xfff))
5482 continue;
5483
5484 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5485
5486 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5487 * The branch target is in the same 4KB region as the
5488 first half of the branch.
5489 * The instruction before the branch is a 32-bit
5490 length non-branch instruction. */
5491 for (i = span_start; i < span_end;)
5492 {
5493 unsigned int insn = bfd_getl16 (&contents[i]);
5494 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5495 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5496
5497 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5498 insn_32bit = TRUE;
5499
5500 if (insn_32bit)
5501 {
5502 /* Load the rest of the insn (in manual-friendly order). */
5503 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5504
5505 /* Encoding T4: B<c>.W. */
5506 is_b = (insn & 0xf800d000) == 0xf0009000;
5507 /* Encoding T1: BL<c>.W. */
5508 is_bl = (insn & 0xf800d000) == 0xf000d000;
5509 /* Encoding T2: BLX<c>.W. */
5510 is_blx = (insn & 0xf800d000) == 0xf000c000;
5511 /* Encoding T3: B<c>.W (not permitted in IT block). */
5512 is_bcc = (insn & 0xf800d000) == 0xf0008000
5513 && (insn & 0x07f00000) != 0x03800000;
5514 }
5515
5516 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5517
5518 if (((base_vma + i) & 0xfff) == 0xffe
5519 && insn_32bit
5520 && is_32bit_branch
5521 && last_was_32bit
5522 && ! last_was_branch)
5523 {
5524 bfd_signed_vma offset = 0;
5525 bfd_boolean force_target_arm = FALSE;
5526 bfd_boolean force_target_thumb = FALSE;
5527 bfd_vma target;
5528 enum elf32_arm_stub_type stub_type = arm_stub_none;
5529 struct a8_erratum_reloc key, *found;
5530 bfd_boolean use_plt = FALSE;
5531
5532 key.from = base_vma + i;
5533 found = (struct a8_erratum_reloc *)
5534 bsearch (&key, a8_relocs, num_a8_relocs,
5535 sizeof (struct a8_erratum_reloc),
5536 &a8_reloc_compare);
5537
5538 if (found)
5539 {
5540 char *error_message = NULL;
5541 struct elf_link_hash_entry *entry;
5542
5543 /* We don't care about the error returned from this
5544 function, only if there is glue or not. */
5545 entry = find_thumb_glue (info, found->sym_name,
5546 &error_message);
5547
5548 if (entry)
5549 found->non_a8_stub = TRUE;
5550
5551 /* Keep a simpler condition, for the sake of clarity. */
5552 if (htab->root.splt != NULL && found->hash != NULL
5553 && found->hash->root.plt.offset != (bfd_vma) -1)
5554 use_plt = TRUE;
5555
5556 if (found->r_type == R_ARM_THM_CALL)
5557 {
5558 if (found->branch_type == ST_BRANCH_TO_ARM
5559 || use_plt)
5560 force_target_arm = TRUE;
5561 else
5562 force_target_thumb = TRUE;
5563 }
5564 }
5565
5566 /* Check if we have an offending branch instruction. */
5567
5568 if (found && found->non_a8_stub)
5569 /* We've already made a stub for this instruction, e.g.
5570 it's a long branch or a Thumb->ARM stub. Assume that
5571 stub will suffice to work around the A8 erratum (see
5572 setting of always_after_branch above). */
5573 ;
5574 else if (is_bcc)
5575 {
5576 offset = (insn & 0x7ff) << 1;
5577 offset |= (insn & 0x3f0000) >> 4;
5578 offset |= (insn & 0x2000) ? 0x40000 : 0;
5579 offset |= (insn & 0x800) ? 0x80000 : 0;
5580 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5581 if (offset & 0x100000)
5582 offset |= ~ ((bfd_signed_vma) 0xfffff);
5583 stub_type = arm_stub_a8_veneer_b_cond;
5584 }
5585 else if (is_b || is_bl || is_blx)
5586 {
5587 int s = (insn & 0x4000000) != 0;
5588 int j1 = (insn & 0x2000) != 0;
5589 int j2 = (insn & 0x800) != 0;
5590 int i1 = !(j1 ^ s);
5591 int i2 = !(j2 ^ s);
5592
5593 offset = (insn & 0x7ff) << 1;
5594 offset |= (insn & 0x3ff0000) >> 4;
5595 offset |= i2 << 22;
5596 offset |= i1 << 23;
5597 offset |= s << 24;
5598 if (offset & 0x1000000)
5599 offset |= ~ ((bfd_signed_vma) 0xffffff);
5600
5601 if (is_blx)
5602 offset &= ~ ((bfd_signed_vma) 3);
5603
5604 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5605 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5606 }
5607
5608 if (stub_type != arm_stub_none)
5609 {
5610 bfd_vma pc_for_insn = base_vma + i + 4;
5611
5612 /* The original instruction is a BL, but the target is
5613 an ARM instruction. If we were not making a stub,
5614 the BL would have been converted to a BLX. Use the
5615 BLX stub instead in that case. */
5616 if (htab->use_blx && force_target_arm
5617 && stub_type == arm_stub_a8_veneer_bl)
5618 {
5619 stub_type = arm_stub_a8_veneer_blx;
5620 is_blx = TRUE;
5621 is_bl = FALSE;
5622 }
5623 /* Conversely, if the original instruction was
5624 BLX but the target is Thumb mode, use the BL
5625 stub. */
5626 else if (force_target_thumb
5627 && stub_type == arm_stub_a8_veneer_blx)
5628 {
5629 stub_type = arm_stub_a8_veneer_bl;
5630 is_blx = FALSE;
5631 is_bl = TRUE;
5632 }
5633
5634 if (is_blx)
5635 pc_for_insn &= ~ ((bfd_vma) 3);
5636
5637 /* If we found a relocation, use the proper destination,
5638 not the offset in the (unrelocated) instruction.
5639 Note this is always done if we switched the stub type
5640 above. */
5641 if (found)
5642 offset =
5643 (bfd_signed_vma) (found->destination - pc_for_insn);
5644
5645 /* If the stub will use a Thumb-mode branch to a
5646 PLT target, redirect it to the preceding Thumb
5647 entry point. */
5648 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5649 offset -= PLT_THUMB_STUB_SIZE;
5650
5651 target = pc_for_insn + offset;
5652
5653 /* The BLX stub is ARM-mode code. Adjust the offset to
5654 take the different PC value (+8 instead of +4) into
5655 account. */
5656 if (stub_type == arm_stub_a8_veneer_blx)
5657 offset += 4;
5658
5659 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5660 {
5661 char *stub_name = NULL;
5662
5663 if (num_a8_fixes == a8_fix_table_size)
5664 {
5665 a8_fix_table_size *= 2;
5666 a8_fixes = (struct a8_erratum_fix *)
5667 bfd_realloc (a8_fixes,
5668 sizeof (struct a8_erratum_fix)
5669 * a8_fix_table_size);
5670 }
5671
5672 if (num_a8_fixes < prev_num_a8_fixes)
5673 {
5674 /* If we're doing a subsequent scan,
5675 check if we've found the same fix as
5676 before, and try and reuse the stub
5677 name. */
5678 stub_name = a8_fixes[num_a8_fixes].stub_name;
5679 if ((a8_fixes[num_a8_fixes].section != section)
5680 || (a8_fixes[num_a8_fixes].offset != i))
5681 {
5682 free (stub_name);
5683 stub_name = NULL;
5684 *stub_changed_p = TRUE;
5685 }
5686 }
5687
5688 if (!stub_name)
5689 {
5690 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5691 if (stub_name != NULL)
5692 sprintf (stub_name, "%x:%x", section->id, i);
5693 }
5694
5695 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5696 a8_fixes[num_a8_fixes].section = section;
5697 a8_fixes[num_a8_fixes].offset = i;
5698 a8_fixes[num_a8_fixes].target_offset =
5699 target - base_vma;
5700 a8_fixes[num_a8_fixes].orig_insn = insn;
5701 a8_fixes[num_a8_fixes].stub_name = stub_name;
5702 a8_fixes[num_a8_fixes].stub_type = stub_type;
5703 a8_fixes[num_a8_fixes].branch_type =
5704 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5705
5706 num_a8_fixes++;
5707 }
5708 }
5709 }
5710
5711 i += insn_32bit ? 4 : 2;
5712 last_was_32bit = insn_32bit;
5713 last_was_branch = is_32bit_branch;
5714 }
5715 }
5716
5717 if (elf_section_data (section)->this_hdr.contents == NULL)
5718 free (contents);
5719 }
5720
5721 *a8_fixes_p = a8_fixes;
5722 *num_a8_fixes_p = num_a8_fixes;
5723 *a8_fix_table_size_p = a8_fix_table_size;
5724
5725 return FALSE;
5726 }
5727
5728 /* Create or update a stub entry depending on whether the stub can already be
5729 found in HTAB. The stub is identified by:
5730 - its type STUB_TYPE
5731 - its source branch (note that several can share the same stub) whose
5732 section and relocation (if any) are given by SECTION and IRELA
5733 respectively
5734 - its target symbol whose input section, hash, name, value and branch type
5735 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5736 respectively
5737
5738 If found, the value of the stub's target symbol is updated from SYM_VALUE
5739 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5740 TRUE and the stub entry is initialized.
5741
5742 Returns the stub that was created or updated, or NULL if an error
5743 occurred. */
5744
5745 static struct elf32_arm_stub_hash_entry *
5746 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5747 enum elf32_arm_stub_type stub_type, asection *section,
5748 Elf_Internal_Rela *irela, asection *sym_sec,
5749 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5750 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5751 bfd_boolean *new_stub)
5752 {
5753 const asection *id_sec;
5754 char *stub_name;
5755 struct elf32_arm_stub_hash_entry *stub_entry;
5756 unsigned int r_type;
5757 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5758
5759 BFD_ASSERT (stub_type != arm_stub_none);
5760 *new_stub = FALSE;
5761
5762 if (sym_claimed)
5763 stub_name = sym_name;
5764 else
5765 {
5766 BFD_ASSERT (irela);
5767 BFD_ASSERT (section);
5768 BFD_ASSERT (section->id <= htab->top_id);
5769
5770 /* Support for grouping stub sections. */
5771 id_sec = htab->stub_group[section->id].link_sec;
5772
5773 /* Get the name of this stub. */
5774 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5775 stub_type);
5776 if (!stub_name)
5777 return NULL;
5778 }
5779
5780 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5781 FALSE);
5782 /* The proper stub has already been created, just update its value. */
5783 if (stub_entry != NULL)
5784 {
5785 if (!sym_claimed)
5786 free (stub_name);
5787 stub_entry->target_value = sym_value;
5788 return stub_entry;
5789 }
5790
5791 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5792 if (stub_entry == NULL)
5793 {
5794 if (!sym_claimed)
5795 free (stub_name);
5796 return NULL;
5797 }
5798
5799 stub_entry->target_value = sym_value;
5800 stub_entry->target_section = sym_sec;
5801 stub_entry->stub_type = stub_type;
5802 stub_entry->h = hash;
5803 stub_entry->branch_type = branch_type;
5804
5805 if (sym_claimed)
5806 stub_entry->output_name = sym_name;
5807 else
5808 {
5809 if (sym_name == NULL)
5810 sym_name = "unnamed";
5811 stub_entry->output_name = (char *)
5812 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5813 + strlen (sym_name));
5814 if (stub_entry->output_name == NULL)
5815 {
5816 free (stub_name);
5817 return NULL;
5818 }
5819
5820 /* For historical reasons, use the existing names for ARM-to-Thumb and
5821 Thumb-to-ARM stubs. */
5822 r_type = ELF32_R_TYPE (irela->r_info);
5823 if ((r_type == (unsigned int) R_ARM_THM_CALL
5824 || r_type == (unsigned int) R_ARM_THM_JUMP24
5825 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5826 && branch_type == ST_BRANCH_TO_ARM)
5827 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5828 else if ((r_type == (unsigned int) R_ARM_CALL
5829 || r_type == (unsigned int) R_ARM_JUMP24)
5830 && branch_type == ST_BRANCH_TO_THUMB)
5831 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5832 else
5833 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5834 }
5835
5836 *new_stub = TRUE;
5837 return stub_entry;
5838 }
5839
5840 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5841 gateway veneer to transition from non secure to secure state and create them
5842 accordingly.
5843
5844 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5845 defines the conditions that govern Secure Gateway veneer creation for a
5846 given symbol <SYM> as follows:
5847 - it has function type
5848 - it has non local binding
5849 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5850 same type, binding and value as <SYM> (called normal symbol).
5851 An entry function can handle secure state transition itself in which case
5852 its special symbol would have a different value from the normal symbol.
5853
5854 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5855 entry mapping while HTAB gives the name to hash entry mapping.
5856 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5857 created.
5858
5859 The return value gives whether a stub failed to be allocated. */
5860
5861 static bfd_boolean
5862 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5863 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5864 int *cmse_stub_created)
5865 {
5866 const struct elf_backend_data *bed;
5867 Elf_Internal_Shdr *symtab_hdr;
5868 unsigned i, j, sym_count, ext_start;
5869 Elf_Internal_Sym *cmse_sym, *local_syms;
5870 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5871 enum arm_st_branch_type branch_type;
5872 char *sym_name, *lsym_name;
5873 bfd_vma sym_value;
5874 asection *section;
5875 struct elf32_arm_stub_hash_entry *stub_entry;
5876 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5877
5878 bed = get_elf_backend_data (input_bfd);
5879 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5880 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5881 ext_start = symtab_hdr->sh_info;
5882 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5883 && out_attr[Tag_CPU_arch_profile].i == 'M');
5884
5885 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5886 if (local_syms == NULL)
5887 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5888 symtab_hdr->sh_info, 0, NULL, NULL,
5889 NULL);
5890 if (symtab_hdr->sh_info && local_syms == NULL)
5891 return FALSE;
5892
5893 /* Scan symbols. */
5894 for (i = 0; i < sym_count; i++)
5895 {
5896 cmse_invalid = FALSE;
5897
5898 if (i < ext_start)
5899 {
5900 cmse_sym = &local_syms[i];
5901 /* Not a special symbol. */
5902 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5903 continue;
5904 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5905 symtab_hdr->sh_link,
5906 cmse_sym->st_name);
5907 /* Special symbol with local binding. */
5908 cmse_invalid = TRUE;
5909 }
5910 else
5911 {
5912 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5913 sym_name = (char *) cmse_hash->root.root.root.string;
5914
5915 /* Not a special symbol. */
5916 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5917 continue;
5918
5919 /* Special symbol has incorrect binding or type. */
5920 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5921 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5922 || cmse_hash->root.type != STT_FUNC)
5923 cmse_invalid = TRUE;
5924 }
5925
5926 if (!is_v8m)
5927 {
5928 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5929 "ARMv8-M architecture or later"),
5930 input_bfd, sym_name);
5931 is_v8m = TRUE; /* Avoid multiple warning. */
5932 ret = FALSE;
5933 }
5934
5935 if (cmse_invalid)
5936 {
5937 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5938 " a global or weak function symbol"),
5939 input_bfd, sym_name);
5940 ret = FALSE;
5941 if (i < ext_start)
5942 continue;
5943 }
5944
5945 sym_name += strlen (CMSE_PREFIX);
5946 hash = (struct elf32_arm_link_hash_entry *)
5947 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5948
5949 /* No associated normal symbol or it is neither global nor weak. */
5950 if (!hash
5951 || (hash->root.root.type != bfd_link_hash_defined
5952 && hash->root.root.type != bfd_link_hash_defweak)
5953 || hash->root.type != STT_FUNC)
5954 {
5955 /* Initialize here to avoid warning about use of possibly
5956 uninitialized variable. */
5957 j = 0;
5958
5959 if (!hash)
5960 {
5961 /* Searching for a normal symbol with local binding. */
5962 for (; j < ext_start; j++)
5963 {
5964 lsym_name =
5965 bfd_elf_string_from_elf_section (input_bfd,
5966 symtab_hdr->sh_link,
5967 local_syms[j].st_name);
5968 if (!strcmp (sym_name, lsym_name))
5969 break;
5970 }
5971 }
5972
5973 if (hash || j < ext_start)
5974 {
5975 _bfd_error_handler
5976 (_("%pB: invalid standard symbol `%s'; it must be "
5977 "a global or weak function symbol"),
5978 input_bfd, sym_name);
5979 }
5980 else
5981 _bfd_error_handler
5982 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
5983 ret = FALSE;
5984 if (!hash)
5985 continue;
5986 }
5987
5988 sym_value = hash->root.root.u.def.value;
5989 section = hash->root.root.u.def.section;
5990
5991 if (cmse_hash->root.root.u.def.section != section)
5992 {
5993 _bfd_error_handler
5994 (_("%pB: `%s' and its special symbol are in different sections"),
5995 input_bfd, sym_name);
5996 ret = FALSE;
5997 }
5998 if (cmse_hash->root.root.u.def.value != sym_value)
5999 continue; /* Ignore: could be an entry function starting with SG. */
6000
6001 /* If this section is a link-once section that will be discarded, then
6002 don't create any stubs. */
6003 if (section->output_section == NULL)
6004 {
6005 _bfd_error_handler
6006 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6007 continue;
6008 }
6009
6010 if (hash->root.size == 0)
6011 {
6012 _bfd_error_handler
6013 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6014 ret = FALSE;
6015 }
6016
6017 if (!ret)
6018 continue;
6019 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6020 stub_entry
6021 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6022 NULL, NULL, section, hash, sym_name,
6023 sym_value, branch_type, &new_stub);
6024
6025 if (stub_entry == NULL)
6026 ret = FALSE;
6027 else
6028 {
6029 BFD_ASSERT (new_stub);
6030 (*cmse_stub_created)++;
6031 }
6032 }
6033
6034 if (!symtab_hdr->contents)
6035 free (local_syms);
6036 return ret;
6037 }
6038
6039 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6040 code entry function, ie can be called from non secure code without using a
6041 veneer. */
6042
6043 static bfd_boolean
6044 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6045 {
6046 bfd_byte contents[4];
6047 uint32_t first_insn;
6048 asection *section;
6049 file_ptr offset;
6050 bfd *abfd;
6051
6052 /* Defined symbol of function type. */
6053 if (hash->root.root.type != bfd_link_hash_defined
6054 && hash->root.root.type != bfd_link_hash_defweak)
6055 return FALSE;
6056 if (hash->root.type != STT_FUNC)
6057 return FALSE;
6058
6059 /* Read first instruction. */
6060 section = hash->root.root.u.def.section;
6061 abfd = section->owner;
6062 offset = hash->root.root.u.def.value - section->vma;
6063 if (!bfd_get_section_contents (abfd, section, contents, offset,
6064 sizeof (contents)))
6065 return FALSE;
6066
6067 first_insn = bfd_get_32 (abfd, contents);
6068
6069 /* Starts by SG instruction. */
6070 return first_insn == 0xe97fe97f;
6071 }
6072
6073 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6074 secure gateway veneers (ie. the veneers was not in the input import library)
6075 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6076
6077 static bfd_boolean
6078 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6079 {
6080 struct elf32_arm_stub_hash_entry *stub_entry;
6081 struct bfd_link_info *info;
6082
6083 /* Massage our args to the form they really have. */
6084 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6085 info = (struct bfd_link_info *) gen_info;
6086
6087 if (info->out_implib_bfd)
6088 return TRUE;
6089
6090 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6091 return TRUE;
6092
6093 if (stub_entry->stub_offset == (bfd_vma) -1)
6094 _bfd_error_handler (" %s", stub_entry->output_name);
6095
6096 return TRUE;
6097 }
6098
6099 /* Set offset of each secure gateway veneers so that its address remain
6100 identical to the one in the input import library referred by
6101 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6102 (present in input import library but absent from the executable being
6103 linked) or if new veneers appeared and there is no output import library
6104 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6105 number of secure gateway veneers found in the input import library.
6106
6107 The function returns whether an error occurred. If no error occurred,
6108 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6109 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6110 veneer observed set for new veneers to be layed out after. */
6111
6112 static bfd_boolean
6113 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6114 struct elf32_arm_link_hash_table *htab,
6115 int *cmse_stub_created)
6116 {
6117 long symsize;
6118 char *sym_name;
6119 flagword flags;
6120 long i, symcount;
6121 bfd *in_implib_bfd;
6122 asection *stub_out_sec;
6123 bfd_boolean ret = TRUE;
6124 Elf_Internal_Sym *intsym;
6125 const char *out_sec_name;
6126 bfd_size_type cmse_stub_size;
6127 asymbol **sympp = NULL, *sym;
6128 struct elf32_arm_link_hash_entry *hash;
6129 const insn_sequence *cmse_stub_template;
6130 struct elf32_arm_stub_hash_entry *stub_entry;
6131 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6132 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6133 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6134
6135 /* No input secure gateway import library. */
6136 if (!htab->in_implib_bfd)
6137 return TRUE;
6138
6139 in_implib_bfd = htab->in_implib_bfd;
6140 if (!htab->cmse_implib)
6141 {
6142 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6143 "Gateway import libraries"), in_implib_bfd);
6144 return FALSE;
6145 }
6146
6147 /* Get symbol table size. */
6148 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6149 if (symsize < 0)
6150 return FALSE;
6151
6152 /* Read in the input secure gateway import library's symbol table. */
6153 sympp = (asymbol **) xmalloc (symsize);
6154 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6155 if (symcount < 0)
6156 {
6157 ret = FALSE;
6158 goto free_sym_buf;
6159 }
6160
6161 htab->new_cmse_stub_offset = 0;
6162 cmse_stub_size =
6163 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6164 &cmse_stub_template,
6165 &cmse_stub_template_size);
6166 out_sec_name =
6167 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6168 stub_out_sec =
6169 bfd_get_section_by_name (htab->obfd, out_sec_name);
6170 if (stub_out_sec != NULL)
6171 cmse_stub_sec_vma = stub_out_sec->vma;
6172
6173 /* Set addresses of veneers mentionned in input secure gateway import
6174 library's symbol table. */
6175 for (i = 0; i < symcount; i++)
6176 {
6177 sym = sympp[i];
6178 flags = sym->flags;
6179 sym_name = (char *) bfd_asymbol_name (sym);
6180 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6181
6182 if (sym->section != bfd_abs_section_ptr
6183 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6184 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6185 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6186 != ST_BRANCH_TO_THUMB))
6187 {
6188 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6189 "symbol should be absolute, global and "
6190 "refer to Thumb functions"),
6191 in_implib_bfd, sym_name);
6192 ret = FALSE;
6193 continue;
6194 }
6195
6196 veneer_value = bfd_asymbol_value (sym);
6197 stub_offset = veneer_value - cmse_stub_sec_vma;
6198 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6199 FALSE, FALSE);
6200 hash = (struct elf32_arm_link_hash_entry *)
6201 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6202
6203 /* Stub entry should have been created by cmse_scan or the symbol be of
6204 a secure function callable from non secure code. */
6205 if (!stub_entry && !hash)
6206 {
6207 bfd_boolean new_stub;
6208
6209 _bfd_error_handler
6210 (_("entry function `%s' disappeared from secure code"), sym_name);
6211 hash = (struct elf32_arm_link_hash_entry *)
6212 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6213 stub_entry
6214 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6215 NULL, NULL, bfd_abs_section_ptr, hash,
6216 sym_name, veneer_value,
6217 ST_BRANCH_TO_THUMB, &new_stub);
6218 if (stub_entry == NULL)
6219 ret = FALSE;
6220 else
6221 {
6222 BFD_ASSERT (new_stub);
6223 new_cmse_stubs_created++;
6224 (*cmse_stub_created)++;
6225 }
6226 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6227 stub_entry->stub_offset = stub_offset;
6228 }
6229 /* Symbol found is not callable from non secure code. */
6230 else if (!stub_entry)
6231 {
6232 if (!cmse_entry_fct_p (hash))
6233 {
6234 _bfd_error_handler (_("`%s' refers to a non entry function"),
6235 sym_name);
6236 ret = FALSE;
6237 }
6238 continue;
6239 }
6240 else
6241 {
6242 /* Only stubs for SG veneers should have been created. */
6243 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6244
6245 /* Check visibility hasn't changed. */
6246 if (!!(flags & BSF_GLOBAL)
6247 != (hash->root.root.type == bfd_link_hash_defined))
6248 _bfd_error_handler
6249 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6250 sym_name);
6251
6252 stub_entry->stub_offset = stub_offset;
6253 }
6254
6255 /* Size should match that of a SG veneer. */
6256 if (intsym->st_size != cmse_stub_size)
6257 {
6258 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6259 in_implib_bfd, sym_name);
6260 ret = FALSE;
6261 }
6262
6263 /* Previous veneer address is before current SG veneer section. */
6264 if (veneer_value < cmse_stub_sec_vma)
6265 {
6266 /* Avoid offset underflow. */
6267 if (stub_entry)
6268 stub_entry->stub_offset = 0;
6269 stub_offset = 0;
6270 ret = FALSE;
6271 }
6272
6273 /* Complain if stub offset not a multiple of stub size. */
6274 if (stub_offset % cmse_stub_size)
6275 {
6276 _bfd_error_handler
6277 (_("offset of veneer for entry function `%s' not a multiple of "
6278 "its size"), sym_name);
6279 ret = FALSE;
6280 }
6281
6282 if (!ret)
6283 continue;
6284
6285 new_cmse_stubs_created--;
6286 if (veneer_value < cmse_stub_array_start)
6287 cmse_stub_array_start = veneer_value;
6288 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6289 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6290 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6291 }
6292
6293 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6294 {
6295 BFD_ASSERT (new_cmse_stubs_created > 0);
6296 _bfd_error_handler
6297 (_("new entry function(s) introduced but no output import library "
6298 "specified:"));
6299 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6300 }
6301
6302 if (cmse_stub_array_start != cmse_stub_sec_vma)
6303 {
6304 _bfd_error_handler
6305 (_("start address of `%s' is different from previous link"),
6306 out_sec_name);
6307 ret = FALSE;
6308 }
6309
6310 free_sym_buf:
6311 free (sympp);
6312 return ret;
6313 }
6314
6315 /* Determine and set the size of the stub section for a final link.
6316
6317 The basic idea here is to examine all the relocations looking for
6318 PC-relative calls to a target that is unreachable with a "bl"
6319 instruction. */
6320
6321 bfd_boolean
6322 elf32_arm_size_stubs (bfd *output_bfd,
6323 bfd *stub_bfd,
6324 struct bfd_link_info *info,
6325 bfd_signed_vma group_size,
6326 asection * (*add_stub_section) (const char *, asection *,
6327 asection *,
6328 unsigned int),
6329 void (*layout_sections_again) (void))
6330 {
6331 bfd_boolean ret = TRUE;
6332 obj_attribute *out_attr;
6333 int cmse_stub_created = 0;
6334 bfd_size_type stub_group_size;
6335 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6336 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6337 struct a8_erratum_fix *a8_fixes = NULL;
6338 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6339 struct a8_erratum_reloc *a8_relocs = NULL;
6340 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6341
6342 if (htab == NULL)
6343 return FALSE;
6344
6345 if (htab->fix_cortex_a8)
6346 {
6347 a8_fixes = (struct a8_erratum_fix *)
6348 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6349 a8_relocs = (struct a8_erratum_reloc *)
6350 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6351 }
6352
6353 /* Propagate mach to stub bfd, because it may not have been
6354 finalized when we created stub_bfd. */
6355 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6356 bfd_get_mach (output_bfd));
6357
6358 /* Stash our params away. */
6359 htab->stub_bfd = stub_bfd;
6360 htab->add_stub_section = add_stub_section;
6361 htab->layout_sections_again = layout_sections_again;
6362 stubs_always_after_branch = group_size < 0;
6363
6364 out_attr = elf_known_obj_attributes_proc (output_bfd);
6365 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6366
6367 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6368 as the first half of a 32-bit branch straddling two 4K pages. This is a
6369 crude way of enforcing that. */
6370 if (htab->fix_cortex_a8)
6371 stubs_always_after_branch = 1;
6372
6373 if (group_size < 0)
6374 stub_group_size = -group_size;
6375 else
6376 stub_group_size = group_size;
6377
6378 if (stub_group_size == 1)
6379 {
6380 /* Default values. */
6381 /* Thumb branch range is +-4MB has to be used as the default
6382 maximum size (a given section can contain both ARM and Thumb
6383 code, so the worst case has to be taken into account).
6384
6385 This value is 24K less than that, which allows for 2025
6386 12-byte stubs. If we exceed that, then we will fail to link.
6387 The user will have to relink with an explicit group size
6388 option. */
6389 stub_group_size = 4170000;
6390 }
6391
6392 group_sections (htab, stub_group_size, stubs_always_after_branch);
6393
6394 /* If we're applying the cortex A8 fix, we need to determine the
6395 program header size now, because we cannot change it later --
6396 that could alter section placements. Notice the A8 erratum fix
6397 ends up requiring the section addresses to remain unchanged
6398 modulo the page size. That's something we cannot represent
6399 inside BFD, and we don't want to force the section alignment to
6400 be the page size. */
6401 if (htab->fix_cortex_a8)
6402 (*htab->layout_sections_again) ();
6403
6404 while (1)
6405 {
6406 bfd *input_bfd;
6407 unsigned int bfd_indx;
6408 asection *stub_sec;
6409 enum elf32_arm_stub_type stub_type;
6410 bfd_boolean stub_changed = FALSE;
6411 unsigned prev_num_a8_fixes = num_a8_fixes;
6412
6413 num_a8_fixes = 0;
6414 for (input_bfd = info->input_bfds, bfd_indx = 0;
6415 input_bfd != NULL;
6416 input_bfd = input_bfd->link.next, bfd_indx++)
6417 {
6418 Elf_Internal_Shdr *symtab_hdr;
6419 asection *section;
6420 Elf_Internal_Sym *local_syms = NULL;
6421
6422 if (!is_arm_elf (input_bfd))
6423 continue;
6424
6425 num_a8_relocs = 0;
6426
6427 /* We'll need the symbol table in a second. */
6428 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6429 if (symtab_hdr->sh_info == 0)
6430 continue;
6431
6432 /* Limit scan of symbols to object file whose profile is
6433 Microcontroller to not hinder performance in the general case. */
6434 if (m_profile && first_veneer_scan)
6435 {
6436 struct elf_link_hash_entry **sym_hashes;
6437
6438 sym_hashes = elf_sym_hashes (input_bfd);
6439 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6440 &cmse_stub_created))
6441 goto error_ret_free_local;
6442
6443 if (cmse_stub_created != 0)
6444 stub_changed = TRUE;
6445 }
6446
6447 /* Walk over each section attached to the input bfd. */
6448 for (section = input_bfd->sections;
6449 section != NULL;
6450 section = section->next)
6451 {
6452 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6453
6454 /* If there aren't any relocs, then there's nothing more
6455 to do. */
6456 if ((section->flags & SEC_RELOC) == 0
6457 || section->reloc_count == 0
6458 || (section->flags & SEC_CODE) == 0)
6459 continue;
6460
6461 /* If this section is a link-once section that will be
6462 discarded, then don't create any stubs. */
6463 if (section->output_section == NULL
6464 || section->output_section->owner != output_bfd)
6465 continue;
6466
6467 /* Get the relocs. */
6468 internal_relocs
6469 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6470 NULL, info->keep_memory);
6471 if (internal_relocs == NULL)
6472 goto error_ret_free_local;
6473
6474 /* Now examine each relocation. */
6475 irela = internal_relocs;
6476 irelaend = irela + section->reloc_count;
6477 for (; irela < irelaend; irela++)
6478 {
6479 unsigned int r_type, r_indx;
6480 asection *sym_sec;
6481 bfd_vma sym_value;
6482 bfd_vma destination;
6483 struct elf32_arm_link_hash_entry *hash;
6484 const char *sym_name;
6485 unsigned char st_type;
6486 enum arm_st_branch_type branch_type;
6487 bfd_boolean created_stub = FALSE;
6488
6489 r_type = ELF32_R_TYPE (irela->r_info);
6490 r_indx = ELF32_R_SYM (irela->r_info);
6491
6492 if (r_type >= (unsigned int) R_ARM_max)
6493 {
6494 bfd_set_error (bfd_error_bad_value);
6495 error_ret_free_internal:
6496 if (elf_section_data (section)->relocs == NULL)
6497 free (internal_relocs);
6498 /* Fall through. */
6499 error_ret_free_local:
6500 if (local_syms != NULL
6501 && (symtab_hdr->contents
6502 != (unsigned char *) local_syms))
6503 free (local_syms);
6504 return FALSE;
6505 }
6506
6507 hash = NULL;
6508 if (r_indx >= symtab_hdr->sh_info)
6509 hash = elf32_arm_hash_entry
6510 (elf_sym_hashes (input_bfd)
6511 [r_indx - symtab_hdr->sh_info]);
6512
6513 /* Only look for stubs on branch instructions, or
6514 non-relaxed TLSCALL */
6515 if ((r_type != (unsigned int) R_ARM_CALL)
6516 && (r_type != (unsigned int) R_ARM_THM_CALL)
6517 && (r_type != (unsigned int) R_ARM_JUMP24)
6518 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6519 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6520 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6521 && (r_type != (unsigned int) R_ARM_PLT32)
6522 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6523 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6524 && r_type == elf32_arm_tls_transition
6525 (info, r_type, &hash->root)
6526 && ((hash ? hash->tls_type
6527 : (elf32_arm_local_got_tls_type
6528 (input_bfd)[r_indx]))
6529 & GOT_TLS_GDESC) != 0))
6530 continue;
6531
6532 /* Now determine the call target, its name, value,
6533 section. */
6534 sym_sec = NULL;
6535 sym_value = 0;
6536 destination = 0;
6537 sym_name = NULL;
6538
6539 if (r_type == (unsigned int) R_ARM_TLS_CALL
6540 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6541 {
6542 /* A non-relaxed TLS call. The target is the
6543 plt-resident trampoline and nothing to do
6544 with the symbol. */
6545 BFD_ASSERT (htab->tls_trampoline > 0);
6546 sym_sec = htab->root.splt;
6547 sym_value = htab->tls_trampoline;
6548 hash = 0;
6549 st_type = STT_FUNC;
6550 branch_type = ST_BRANCH_TO_ARM;
6551 }
6552 else if (!hash)
6553 {
6554 /* It's a local symbol. */
6555 Elf_Internal_Sym *sym;
6556
6557 if (local_syms == NULL)
6558 {
6559 local_syms
6560 = (Elf_Internal_Sym *) symtab_hdr->contents;
6561 if (local_syms == NULL)
6562 local_syms
6563 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6564 symtab_hdr->sh_info, 0,
6565 NULL, NULL, NULL);
6566 if (local_syms == NULL)
6567 goto error_ret_free_internal;
6568 }
6569
6570 sym = local_syms + r_indx;
6571 if (sym->st_shndx == SHN_UNDEF)
6572 sym_sec = bfd_und_section_ptr;
6573 else if (sym->st_shndx == SHN_ABS)
6574 sym_sec = bfd_abs_section_ptr;
6575 else if (sym->st_shndx == SHN_COMMON)
6576 sym_sec = bfd_com_section_ptr;
6577 else
6578 sym_sec =
6579 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6580
6581 if (!sym_sec)
6582 /* This is an undefined symbol. It can never
6583 be resolved. */
6584 continue;
6585
6586 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6587 sym_value = sym->st_value;
6588 destination = (sym_value + irela->r_addend
6589 + sym_sec->output_offset
6590 + sym_sec->output_section->vma);
6591 st_type = ELF_ST_TYPE (sym->st_info);
6592 branch_type =
6593 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6594 sym_name
6595 = bfd_elf_string_from_elf_section (input_bfd,
6596 symtab_hdr->sh_link,
6597 sym->st_name);
6598 }
6599 else
6600 {
6601 /* It's an external symbol. */
6602 while (hash->root.root.type == bfd_link_hash_indirect
6603 || hash->root.root.type == bfd_link_hash_warning)
6604 hash = ((struct elf32_arm_link_hash_entry *)
6605 hash->root.root.u.i.link);
6606
6607 if (hash->root.root.type == bfd_link_hash_defined
6608 || hash->root.root.type == bfd_link_hash_defweak)
6609 {
6610 sym_sec = hash->root.root.u.def.section;
6611 sym_value = hash->root.root.u.def.value;
6612
6613 struct elf32_arm_link_hash_table *globals =
6614 elf32_arm_hash_table (info);
6615
6616 /* For a destination in a shared library,
6617 use the PLT stub as target address to
6618 decide whether a branch stub is
6619 needed. */
6620 if (globals != NULL
6621 && globals->root.splt != NULL
6622 && hash != NULL
6623 && hash->root.plt.offset != (bfd_vma) -1)
6624 {
6625 sym_sec = globals->root.splt;
6626 sym_value = hash->root.plt.offset;
6627 if (sym_sec->output_section != NULL)
6628 destination = (sym_value
6629 + sym_sec->output_offset
6630 + sym_sec->output_section->vma);
6631 }
6632 else if (sym_sec->output_section != NULL)
6633 destination = (sym_value + irela->r_addend
6634 + sym_sec->output_offset
6635 + sym_sec->output_section->vma);
6636 }
6637 else if ((hash->root.root.type == bfd_link_hash_undefined)
6638 || (hash->root.root.type == bfd_link_hash_undefweak))
6639 {
6640 /* For a shared library, use the PLT stub as
6641 target address to decide whether a long
6642 branch stub is needed.
6643 For absolute code, they cannot be handled. */
6644 struct elf32_arm_link_hash_table *globals =
6645 elf32_arm_hash_table (info);
6646
6647 if (globals != NULL
6648 && globals->root.splt != NULL
6649 && hash != NULL
6650 && hash->root.plt.offset != (bfd_vma) -1)
6651 {
6652 sym_sec = globals->root.splt;
6653 sym_value = hash->root.plt.offset;
6654 if (sym_sec->output_section != NULL)
6655 destination = (sym_value
6656 + sym_sec->output_offset
6657 + sym_sec->output_section->vma);
6658 }
6659 else
6660 continue;
6661 }
6662 else
6663 {
6664 bfd_set_error (bfd_error_bad_value);
6665 goto error_ret_free_internal;
6666 }
6667 st_type = hash->root.type;
6668 branch_type =
6669 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6670 sym_name = hash->root.root.root.string;
6671 }
6672
6673 do
6674 {
6675 bfd_boolean new_stub;
6676 struct elf32_arm_stub_hash_entry *stub_entry;
6677
6678 /* Determine what (if any) linker stub is needed. */
6679 stub_type = arm_type_of_stub (info, section, irela,
6680 st_type, &branch_type,
6681 hash, destination, sym_sec,
6682 input_bfd, sym_name);
6683 if (stub_type == arm_stub_none)
6684 break;
6685
6686 /* We've either created a stub for this reloc already,
6687 or we are about to. */
6688 stub_entry =
6689 elf32_arm_create_stub (htab, stub_type, section, irela,
6690 sym_sec, hash,
6691 (char *) sym_name, sym_value,
6692 branch_type, &new_stub);
6693
6694 created_stub = stub_entry != NULL;
6695 if (!created_stub)
6696 goto error_ret_free_internal;
6697 else if (!new_stub)
6698 break;
6699 else
6700 stub_changed = TRUE;
6701 }
6702 while (0);
6703
6704 /* Look for relocations which might trigger Cortex-A8
6705 erratum. */
6706 if (htab->fix_cortex_a8
6707 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6708 || r_type == (unsigned int) R_ARM_THM_JUMP19
6709 || r_type == (unsigned int) R_ARM_THM_CALL
6710 || r_type == (unsigned int) R_ARM_THM_XPC22))
6711 {
6712 bfd_vma from = section->output_section->vma
6713 + section->output_offset
6714 + irela->r_offset;
6715
6716 if ((from & 0xfff) == 0xffe)
6717 {
6718 /* Found a candidate. Note we haven't checked the
6719 destination is within 4K here: if we do so (and
6720 don't create an entry in a8_relocs) we can't tell
6721 that a branch should have been relocated when
6722 scanning later. */
6723 if (num_a8_relocs == a8_reloc_table_size)
6724 {
6725 a8_reloc_table_size *= 2;
6726 a8_relocs = (struct a8_erratum_reloc *)
6727 bfd_realloc (a8_relocs,
6728 sizeof (struct a8_erratum_reloc)
6729 * a8_reloc_table_size);
6730 }
6731
6732 a8_relocs[num_a8_relocs].from = from;
6733 a8_relocs[num_a8_relocs].destination = destination;
6734 a8_relocs[num_a8_relocs].r_type = r_type;
6735 a8_relocs[num_a8_relocs].branch_type = branch_type;
6736 a8_relocs[num_a8_relocs].sym_name = sym_name;
6737 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6738 a8_relocs[num_a8_relocs].hash = hash;
6739
6740 num_a8_relocs++;
6741 }
6742 }
6743 }
6744
6745 /* We're done with the internal relocs, free them. */
6746 if (elf_section_data (section)->relocs == NULL)
6747 free (internal_relocs);
6748 }
6749
6750 if (htab->fix_cortex_a8)
6751 {
6752 /* Sort relocs which might apply to Cortex-A8 erratum. */
6753 qsort (a8_relocs, num_a8_relocs,
6754 sizeof (struct a8_erratum_reloc),
6755 &a8_reloc_compare);
6756
6757 /* Scan for branches which might trigger Cortex-A8 erratum. */
6758 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6759 &num_a8_fixes, &a8_fix_table_size,
6760 a8_relocs, num_a8_relocs,
6761 prev_num_a8_fixes, &stub_changed)
6762 != 0)
6763 goto error_ret_free_local;
6764 }
6765
6766 if (local_syms != NULL
6767 && symtab_hdr->contents != (unsigned char *) local_syms)
6768 {
6769 if (!info->keep_memory)
6770 free (local_syms);
6771 else
6772 symtab_hdr->contents = (unsigned char *) local_syms;
6773 }
6774 }
6775
6776 if (first_veneer_scan
6777 && !set_cmse_veneer_addr_from_implib (info, htab,
6778 &cmse_stub_created))
6779 ret = FALSE;
6780
6781 if (prev_num_a8_fixes != num_a8_fixes)
6782 stub_changed = TRUE;
6783
6784 if (!stub_changed)
6785 break;
6786
6787 /* OK, we've added some stubs. Find out the new size of the
6788 stub sections. */
6789 for (stub_sec = htab->stub_bfd->sections;
6790 stub_sec != NULL;
6791 stub_sec = stub_sec->next)
6792 {
6793 /* Ignore non-stub sections. */
6794 if (!strstr (stub_sec->name, STUB_SUFFIX))
6795 continue;
6796
6797 stub_sec->size = 0;
6798 }
6799
6800 /* Add new SG veneers after those already in the input import
6801 library. */
6802 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6803 stub_type++)
6804 {
6805 bfd_vma *start_offset_p;
6806 asection **stub_sec_p;
6807
6808 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6809 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6810 if (start_offset_p == NULL)
6811 continue;
6812
6813 BFD_ASSERT (stub_sec_p != NULL);
6814 if (*stub_sec_p != NULL)
6815 (*stub_sec_p)->size = *start_offset_p;
6816 }
6817
6818 /* Compute stub section size, considering padding. */
6819 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6820 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6821 stub_type++)
6822 {
6823 int size, padding;
6824 asection **stub_sec_p;
6825
6826 padding = arm_dedicated_stub_section_padding (stub_type);
6827 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6828 /* Skip if no stub input section or no stub section padding
6829 required. */
6830 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6831 continue;
6832 /* Stub section padding required but no dedicated section. */
6833 BFD_ASSERT (stub_sec_p);
6834
6835 size = (*stub_sec_p)->size;
6836 size = (size + padding - 1) & ~(padding - 1);
6837 (*stub_sec_p)->size = size;
6838 }
6839
6840 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6841 if (htab->fix_cortex_a8)
6842 for (i = 0; i < num_a8_fixes; i++)
6843 {
6844 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6845 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6846
6847 if (stub_sec == NULL)
6848 return FALSE;
6849
6850 stub_sec->size
6851 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6852 NULL);
6853 }
6854
6855
6856 /* Ask the linker to do its stuff. */
6857 (*htab->layout_sections_again) ();
6858 first_veneer_scan = FALSE;
6859 }
6860
6861 /* Add stubs for Cortex-A8 erratum fixes now. */
6862 if (htab->fix_cortex_a8)
6863 {
6864 for (i = 0; i < num_a8_fixes; i++)
6865 {
6866 struct elf32_arm_stub_hash_entry *stub_entry;
6867 char *stub_name = a8_fixes[i].stub_name;
6868 asection *section = a8_fixes[i].section;
6869 unsigned int section_id = a8_fixes[i].section->id;
6870 asection *link_sec = htab->stub_group[section_id].link_sec;
6871 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6872 const insn_sequence *template_sequence;
6873 int template_size, size = 0;
6874
6875 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6876 TRUE, FALSE);
6877 if (stub_entry == NULL)
6878 {
6879 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6880 section->owner, stub_name);
6881 return FALSE;
6882 }
6883
6884 stub_entry->stub_sec = stub_sec;
6885 stub_entry->stub_offset = (bfd_vma) -1;
6886 stub_entry->id_sec = link_sec;
6887 stub_entry->stub_type = a8_fixes[i].stub_type;
6888 stub_entry->source_value = a8_fixes[i].offset;
6889 stub_entry->target_section = a8_fixes[i].section;
6890 stub_entry->target_value = a8_fixes[i].target_offset;
6891 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6892 stub_entry->branch_type = a8_fixes[i].branch_type;
6893
6894 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6895 &template_sequence,
6896 &template_size);
6897
6898 stub_entry->stub_size = size;
6899 stub_entry->stub_template = template_sequence;
6900 stub_entry->stub_template_size = template_size;
6901 }
6902
6903 /* Stash the Cortex-A8 erratum fix array for use later in
6904 elf32_arm_write_section(). */
6905 htab->a8_erratum_fixes = a8_fixes;
6906 htab->num_a8_erratum_fixes = num_a8_fixes;
6907 }
6908 else
6909 {
6910 htab->a8_erratum_fixes = NULL;
6911 htab->num_a8_erratum_fixes = 0;
6912 }
6913 return ret;
6914 }
6915
6916 /* Build all the stubs associated with the current output file. The
6917 stubs are kept in a hash table attached to the main linker hash
6918 table. We also set up the .plt entries for statically linked PIC
6919 functions here. This function is called via arm_elf_finish in the
6920 linker. */
6921
6922 bfd_boolean
6923 elf32_arm_build_stubs (struct bfd_link_info *info)
6924 {
6925 asection *stub_sec;
6926 struct bfd_hash_table *table;
6927 enum elf32_arm_stub_type stub_type;
6928 struct elf32_arm_link_hash_table *htab;
6929
6930 htab = elf32_arm_hash_table (info);
6931 if (htab == NULL)
6932 return FALSE;
6933
6934 for (stub_sec = htab->stub_bfd->sections;
6935 stub_sec != NULL;
6936 stub_sec = stub_sec->next)
6937 {
6938 bfd_size_type size;
6939
6940 /* Ignore non-stub sections. */
6941 if (!strstr (stub_sec->name, STUB_SUFFIX))
6942 continue;
6943
6944 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6945 must at least be done for stub section requiring padding and for SG
6946 veneers to ensure that a non secure code branching to a removed SG
6947 veneer causes an error. */
6948 size = stub_sec->size;
6949 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6950 if (stub_sec->contents == NULL && size != 0)
6951 return FALSE;
6952
6953 stub_sec->size = 0;
6954 }
6955
6956 /* Add new SG veneers after those already in the input import library. */
6957 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6958 {
6959 bfd_vma *start_offset_p;
6960 asection **stub_sec_p;
6961
6962 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6963 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6964 if (start_offset_p == NULL)
6965 continue;
6966
6967 BFD_ASSERT (stub_sec_p != NULL);
6968 if (*stub_sec_p != NULL)
6969 (*stub_sec_p)->size = *start_offset_p;
6970 }
6971
6972 /* Build the stubs as directed by the stub hash table. */
6973 table = &htab->stub_hash_table;
6974 bfd_hash_traverse (table, arm_build_one_stub, info);
6975 if (htab->fix_cortex_a8)
6976 {
6977 /* Place the cortex a8 stubs last. */
6978 htab->fix_cortex_a8 = -1;
6979 bfd_hash_traverse (table, arm_build_one_stub, info);
6980 }
6981
6982 return TRUE;
6983 }
6984
6985 /* Locate the Thumb encoded calling stub for NAME. */
6986
6987 static struct elf_link_hash_entry *
6988 find_thumb_glue (struct bfd_link_info *link_info,
6989 const char *name,
6990 char **error_message)
6991 {
6992 char *tmp_name;
6993 struct elf_link_hash_entry *hash;
6994 struct elf32_arm_link_hash_table *hash_table;
6995
6996 /* We need a pointer to the armelf specific hash table. */
6997 hash_table = elf32_arm_hash_table (link_info);
6998 if (hash_table == NULL)
6999 return NULL;
7000
7001 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7002 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7003
7004 BFD_ASSERT (tmp_name);
7005
7006 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7007
7008 hash = elf_link_hash_lookup
7009 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7010
7011 if (hash == NULL
7012 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7013 "Thumb", tmp_name, name) == -1)
7014 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7015
7016 free (tmp_name);
7017
7018 return hash;
7019 }
7020
7021 /* Locate the ARM encoded calling stub for NAME. */
7022
7023 static struct elf_link_hash_entry *
7024 find_arm_glue (struct bfd_link_info *link_info,
7025 const char *name,
7026 char **error_message)
7027 {
7028 char *tmp_name;
7029 struct elf_link_hash_entry *myh;
7030 struct elf32_arm_link_hash_table *hash_table;
7031
7032 /* We need a pointer to the elfarm specific hash table. */
7033 hash_table = elf32_arm_hash_table (link_info);
7034 if (hash_table == NULL)
7035 return NULL;
7036
7037 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7038 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7039
7040 BFD_ASSERT (tmp_name);
7041
7042 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7043
7044 myh = elf_link_hash_lookup
7045 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7046
7047 if (myh == NULL
7048 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7049 "ARM", tmp_name, name) == -1)
7050 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7051
7052 free (tmp_name);
7053
7054 return myh;
7055 }
7056
7057 /* ARM->Thumb glue (static images):
7058
7059 .arm
7060 __func_from_arm:
7061 ldr r12, __func_addr
7062 bx r12
7063 __func_addr:
7064 .word func @ behave as if you saw a ARM_32 reloc.
7065
7066 (v5t static images)
7067 .arm
7068 __func_from_arm:
7069 ldr pc, __func_addr
7070 __func_addr:
7071 .word func @ behave as if you saw a ARM_32 reloc.
7072
7073 (relocatable images)
7074 .arm
7075 __func_from_arm:
7076 ldr r12, __func_offset
7077 add r12, r12, pc
7078 bx r12
7079 __func_offset:
7080 .word func - . */
7081
7082 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7083 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7084 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7085 static const insn32 a2t3_func_addr_insn = 0x00000001;
7086
7087 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7088 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7089 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7090
7091 #define ARM2THUMB_PIC_GLUE_SIZE 16
7092 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7093 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7094 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7095
7096 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7097
7098 .thumb .thumb
7099 .align 2 .align 2
7100 __func_from_thumb: __func_from_thumb:
7101 bx pc push {r6, lr}
7102 nop ldr r6, __func_addr
7103 .arm mov lr, pc
7104 b func bx r6
7105 .arm
7106 ;; back_to_thumb
7107 ldmia r13! {r6, lr}
7108 bx lr
7109 __func_addr:
7110 .word func */
7111
7112 #define THUMB2ARM_GLUE_SIZE 8
7113 static const insn16 t2a1_bx_pc_insn = 0x4778;
7114 static const insn16 t2a2_noop_insn = 0x46c0;
7115 static const insn32 t2a3_b_insn = 0xea000000;
7116
7117 #define VFP11_ERRATUM_VENEER_SIZE 8
7118 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7119 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7120
7121 #define ARM_BX_VENEER_SIZE 12
7122 static const insn32 armbx1_tst_insn = 0xe3100001;
7123 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7124 static const insn32 armbx3_bx_insn = 0xe12fff10;
7125
7126 #ifndef ELFARM_NABI_C_INCLUDED
7127 static void
7128 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7129 {
7130 asection * s;
7131 bfd_byte * contents;
7132
7133 if (size == 0)
7134 {
7135 /* Do not include empty glue sections in the output. */
7136 if (abfd != NULL)
7137 {
7138 s = bfd_get_linker_section (abfd, name);
7139 if (s != NULL)
7140 s->flags |= SEC_EXCLUDE;
7141 }
7142 return;
7143 }
7144
7145 BFD_ASSERT (abfd != NULL);
7146
7147 s = bfd_get_linker_section (abfd, name);
7148 BFD_ASSERT (s != NULL);
7149
7150 contents = (bfd_byte *) bfd_alloc (abfd, size);
7151
7152 BFD_ASSERT (s->size == size);
7153 s->contents = contents;
7154 }
7155
7156 bfd_boolean
7157 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7158 {
7159 struct elf32_arm_link_hash_table * globals;
7160
7161 globals = elf32_arm_hash_table (info);
7162 BFD_ASSERT (globals != NULL);
7163
7164 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7165 globals->arm_glue_size,
7166 ARM2THUMB_GLUE_SECTION_NAME);
7167
7168 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7169 globals->thumb_glue_size,
7170 THUMB2ARM_GLUE_SECTION_NAME);
7171
7172 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7173 globals->vfp11_erratum_glue_size,
7174 VFP11_ERRATUM_VENEER_SECTION_NAME);
7175
7176 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7177 globals->stm32l4xx_erratum_glue_size,
7178 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7179
7180 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7181 globals->bx_glue_size,
7182 ARM_BX_GLUE_SECTION_NAME);
7183
7184 return TRUE;
7185 }
7186
7187 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7188 returns the symbol identifying the stub. */
7189
7190 static struct elf_link_hash_entry *
7191 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7192 struct elf_link_hash_entry * h)
7193 {
7194 const char * name = h->root.root.string;
7195 asection * s;
7196 char * tmp_name;
7197 struct elf_link_hash_entry * myh;
7198 struct bfd_link_hash_entry * bh;
7199 struct elf32_arm_link_hash_table * globals;
7200 bfd_vma val;
7201 bfd_size_type size;
7202
7203 globals = elf32_arm_hash_table (link_info);
7204 BFD_ASSERT (globals != NULL);
7205 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7206
7207 s = bfd_get_linker_section
7208 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7209
7210 BFD_ASSERT (s != NULL);
7211
7212 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7213 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7214
7215 BFD_ASSERT (tmp_name);
7216
7217 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7218
7219 myh = elf_link_hash_lookup
7220 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7221
7222 if (myh != NULL)
7223 {
7224 /* We've already seen this guy. */
7225 free (tmp_name);
7226 return myh;
7227 }
7228
7229 /* The only trick here is using hash_table->arm_glue_size as the value.
7230 Even though the section isn't allocated yet, this is where we will be
7231 putting it. The +1 on the value marks that the stub has not been
7232 output yet - not that it is a Thumb function. */
7233 bh = NULL;
7234 val = globals->arm_glue_size + 1;
7235 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7236 tmp_name, BSF_GLOBAL, s, val,
7237 NULL, TRUE, FALSE, &bh);
7238
7239 myh = (struct elf_link_hash_entry *) bh;
7240 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7241 myh->forced_local = 1;
7242
7243 free (tmp_name);
7244
7245 if (bfd_link_pic (link_info)
7246 || globals->root.is_relocatable_executable
7247 || globals->pic_veneer)
7248 size = ARM2THUMB_PIC_GLUE_SIZE;
7249 else if (globals->use_blx)
7250 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7251 else
7252 size = ARM2THUMB_STATIC_GLUE_SIZE;
7253
7254 s->size += size;
7255 globals->arm_glue_size += size;
7256
7257 return myh;
7258 }
7259
7260 /* Allocate space for ARMv4 BX veneers. */
7261
7262 static void
7263 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7264 {
7265 asection * s;
7266 struct elf32_arm_link_hash_table *globals;
7267 char *tmp_name;
7268 struct elf_link_hash_entry *myh;
7269 struct bfd_link_hash_entry *bh;
7270 bfd_vma val;
7271
7272 /* BX PC does not need a veneer. */
7273 if (reg == 15)
7274 return;
7275
7276 globals = elf32_arm_hash_table (link_info);
7277 BFD_ASSERT (globals != NULL);
7278 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7279
7280 /* Check if this veneer has already been allocated. */
7281 if (globals->bx_glue_offset[reg])
7282 return;
7283
7284 s = bfd_get_linker_section
7285 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7286
7287 BFD_ASSERT (s != NULL);
7288
7289 /* Add symbol for veneer. */
7290 tmp_name = (char *)
7291 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7292
7293 BFD_ASSERT (tmp_name);
7294
7295 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7296
7297 myh = elf_link_hash_lookup
7298 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7299
7300 BFD_ASSERT (myh == NULL);
7301
7302 bh = NULL;
7303 val = globals->bx_glue_size;
7304 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7305 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7306 NULL, TRUE, FALSE, &bh);
7307
7308 myh = (struct elf_link_hash_entry *) bh;
7309 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7310 myh->forced_local = 1;
7311
7312 s->size += ARM_BX_VENEER_SIZE;
7313 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7314 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7315 }
7316
7317
7318 /* Add an entry to the code/data map for section SEC. */
7319
7320 static void
7321 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7322 {
7323 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7324 unsigned int newidx;
7325
7326 if (sec_data->map == NULL)
7327 {
7328 sec_data->map = (elf32_arm_section_map *)
7329 bfd_malloc (sizeof (elf32_arm_section_map));
7330 sec_data->mapcount = 0;
7331 sec_data->mapsize = 1;
7332 }
7333
7334 newidx = sec_data->mapcount++;
7335
7336 if (sec_data->mapcount > sec_data->mapsize)
7337 {
7338 sec_data->mapsize *= 2;
7339 sec_data->map = (elf32_arm_section_map *)
7340 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7341 * sizeof (elf32_arm_section_map));
7342 }
7343
7344 if (sec_data->map)
7345 {
7346 sec_data->map[newidx].vma = vma;
7347 sec_data->map[newidx].type = type;
7348 }
7349 }
7350
7351
7352 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7353 veneers are handled for now. */
7354
7355 static bfd_vma
7356 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7357 elf32_vfp11_erratum_list *branch,
7358 bfd *branch_bfd,
7359 asection *branch_sec,
7360 unsigned int offset)
7361 {
7362 asection *s;
7363 struct elf32_arm_link_hash_table *hash_table;
7364 char *tmp_name;
7365 struct elf_link_hash_entry *myh;
7366 struct bfd_link_hash_entry *bh;
7367 bfd_vma val;
7368 struct _arm_elf_section_data *sec_data;
7369 elf32_vfp11_erratum_list *newerr;
7370
7371 hash_table = elf32_arm_hash_table (link_info);
7372 BFD_ASSERT (hash_table != NULL);
7373 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7374
7375 s = bfd_get_linker_section
7376 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7377
7378 sec_data = elf32_arm_section_data (s);
7379
7380 BFD_ASSERT (s != NULL);
7381
7382 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7383 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7384
7385 BFD_ASSERT (tmp_name);
7386
7387 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7388 hash_table->num_vfp11_fixes);
7389
7390 myh = elf_link_hash_lookup
7391 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7392
7393 BFD_ASSERT (myh == NULL);
7394
7395 bh = NULL;
7396 val = hash_table->vfp11_erratum_glue_size;
7397 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7398 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7399 NULL, TRUE, FALSE, &bh);
7400
7401 myh = (struct elf_link_hash_entry *) bh;
7402 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7403 myh->forced_local = 1;
7404
7405 /* Link veneer back to calling location. */
7406 sec_data->erratumcount += 1;
7407 newerr = (elf32_vfp11_erratum_list *)
7408 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7409
7410 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7411 newerr->vma = -1;
7412 newerr->u.v.branch = branch;
7413 newerr->u.v.id = hash_table->num_vfp11_fixes;
7414 branch->u.b.veneer = newerr;
7415
7416 newerr->next = sec_data->erratumlist;
7417 sec_data->erratumlist = newerr;
7418
7419 /* A symbol for the return from the veneer. */
7420 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7421 hash_table->num_vfp11_fixes);
7422
7423 myh = elf_link_hash_lookup
7424 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7425
7426 if (myh != NULL)
7427 abort ();
7428
7429 bh = NULL;
7430 val = offset + 4;
7431 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7432 branch_sec, val, NULL, TRUE, FALSE, &bh);
7433
7434 myh = (struct elf_link_hash_entry *) bh;
7435 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7436 myh->forced_local = 1;
7437
7438 free (tmp_name);
7439
7440 /* Generate a mapping symbol for the veneer section, and explicitly add an
7441 entry for that symbol to the code/data map for the section. */
7442 if (hash_table->vfp11_erratum_glue_size == 0)
7443 {
7444 bh = NULL;
7445 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7446 ever requires this erratum fix. */
7447 _bfd_generic_link_add_one_symbol (link_info,
7448 hash_table->bfd_of_glue_owner, "$a",
7449 BSF_LOCAL, s, 0, NULL,
7450 TRUE, FALSE, &bh);
7451
7452 myh = (struct elf_link_hash_entry *) bh;
7453 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7454 myh->forced_local = 1;
7455
7456 /* The elf32_arm_init_maps function only cares about symbols from input
7457 BFDs. We must make a note of this generated mapping symbol
7458 ourselves so that code byteswapping works properly in
7459 elf32_arm_write_section. */
7460 elf32_arm_section_map_add (s, 'a', 0);
7461 }
7462
7463 s->size += VFP11_ERRATUM_VENEER_SIZE;
7464 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7465 hash_table->num_vfp11_fixes++;
7466
7467 /* The offset of the veneer. */
7468 return val;
7469 }
7470
7471 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7472 veneers need to be handled because used only in Cortex-M. */
7473
7474 static bfd_vma
7475 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7476 elf32_stm32l4xx_erratum_list *branch,
7477 bfd *branch_bfd,
7478 asection *branch_sec,
7479 unsigned int offset,
7480 bfd_size_type veneer_size)
7481 {
7482 asection *s;
7483 struct elf32_arm_link_hash_table *hash_table;
7484 char *tmp_name;
7485 struct elf_link_hash_entry *myh;
7486 struct bfd_link_hash_entry *bh;
7487 bfd_vma val;
7488 struct _arm_elf_section_data *sec_data;
7489 elf32_stm32l4xx_erratum_list *newerr;
7490
7491 hash_table = elf32_arm_hash_table (link_info);
7492 BFD_ASSERT (hash_table != NULL);
7493 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7494
7495 s = bfd_get_linker_section
7496 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7497
7498 BFD_ASSERT (s != NULL);
7499
7500 sec_data = elf32_arm_section_data (s);
7501
7502 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7503 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7504
7505 BFD_ASSERT (tmp_name);
7506
7507 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7508 hash_table->num_stm32l4xx_fixes);
7509
7510 myh = elf_link_hash_lookup
7511 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7512
7513 BFD_ASSERT (myh == NULL);
7514
7515 bh = NULL;
7516 val = hash_table->stm32l4xx_erratum_glue_size;
7517 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7518 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7519 NULL, TRUE, FALSE, &bh);
7520
7521 myh = (struct elf_link_hash_entry *) bh;
7522 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7523 myh->forced_local = 1;
7524
7525 /* Link veneer back to calling location. */
7526 sec_data->stm32l4xx_erratumcount += 1;
7527 newerr = (elf32_stm32l4xx_erratum_list *)
7528 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7529
7530 newerr->type = STM32L4XX_ERRATUM_VENEER;
7531 newerr->vma = -1;
7532 newerr->u.v.branch = branch;
7533 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7534 branch->u.b.veneer = newerr;
7535
7536 newerr->next = sec_data->stm32l4xx_erratumlist;
7537 sec_data->stm32l4xx_erratumlist = newerr;
7538
7539 /* A symbol for the return from the veneer. */
7540 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7541 hash_table->num_stm32l4xx_fixes);
7542
7543 myh = elf_link_hash_lookup
7544 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7545
7546 if (myh != NULL)
7547 abort ();
7548
7549 bh = NULL;
7550 val = offset + 4;
7551 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7552 branch_sec, val, NULL, TRUE, FALSE, &bh);
7553
7554 myh = (struct elf_link_hash_entry *) bh;
7555 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7556 myh->forced_local = 1;
7557
7558 free (tmp_name);
7559
7560 /* Generate a mapping symbol for the veneer section, and explicitly add an
7561 entry for that symbol to the code/data map for the section. */
7562 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7563 {
7564 bh = NULL;
7565 /* Creates a THUMB symbol since there is no other choice. */
7566 _bfd_generic_link_add_one_symbol (link_info,
7567 hash_table->bfd_of_glue_owner, "$t",
7568 BSF_LOCAL, s, 0, NULL,
7569 TRUE, FALSE, &bh);
7570
7571 myh = (struct elf_link_hash_entry *) bh;
7572 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7573 myh->forced_local = 1;
7574
7575 /* The elf32_arm_init_maps function only cares about symbols from input
7576 BFDs. We must make a note of this generated mapping symbol
7577 ourselves so that code byteswapping works properly in
7578 elf32_arm_write_section. */
7579 elf32_arm_section_map_add (s, 't', 0);
7580 }
7581
7582 s->size += veneer_size;
7583 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7584 hash_table->num_stm32l4xx_fixes++;
7585
7586 /* The offset of the veneer. */
7587 return val;
7588 }
7589
7590 #define ARM_GLUE_SECTION_FLAGS \
7591 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7592 | SEC_READONLY | SEC_LINKER_CREATED)
7593
7594 /* Create a fake section for use by the ARM backend of the linker. */
7595
7596 static bfd_boolean
7597 arm_make_glue_section (bfd * abfd, const char * name)
7598 {
7599 asection * sec;
7600
7601 sec = bfd_get_linker_section (abfd, name);
7602 if (sec != NULL)
7603 /* Already made. */
7604 return TRUE;
7605
7606 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7607
7608 if (sec == NULL
7609 || !bfd_set_section_alignment (abfd, sec, 2))
7610 return FALSE;
7611
7612 /* Set the gc mark to prevent the section from being removed by garbage
7613 collection, despite the fact that no relocs refer to this section. */
7614 sec->gc_mark = 1;
7615
7616 return TRUE;
7617 }
7618
7619 /* Set size of .plt entries. This function is called from the
7620 linker scripts in ld/emultempl/{armelf}.em. */
7621
7622 void
7623 bfd_elf32_arm_use_long_plt (void)
7624 {
7625 elf32_arm_use_long_plt_entry = TRUE;
7626 }
7627
7628 /* Add the glue sections to ABFD. This function is called from the
7629 linker scripts in ld/emultempl/{armelf}.em. */
7630
7631 bfd_boolean
7632 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7633 struct bfd_link_info *info)
7634 {
7635 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7636 bfd_boolean dostm32l4xx = globals
7637 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7638 bfd_boolean addglue;
7639
7640 /* If we are only performing a partial
7641 link do not bother adding the glue. */
7642 if (bfd_link_relocatable (info))
7643 return TRUE;
7644
7645 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7646 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7647 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7648 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7649
7650 if (!dostm32l4xx)
7651 return addglue;
7652
7653 return addglue
7654 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7655 }
7656
7657 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7658 ensures they are not marked for deletion by
7659 strip_excluded_output_sections () when veneers are going to be created
7660 later. Not doing so would trigger assert on empty section size in
7661 lang_size_sections_1 (). */
7662
7663 void
7664 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7665 {
7666 enum elf32_arm_stub_type stub_type;
7667
7668 /* If we are only performing a partial
7669 link do not bother adding the glue. */
7670 if (bfd_link_relocatable (info))
7671 return;
7672
7673 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7674 {
7675 asection *out_sec;
7676 const char *out_sec_name;
7677
7678 if (!arm_dedicated_stub_output_section_required (stub_type))
7679 continue;
7680
7681 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7682 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7683 if (out_sec != NULL)
7684 out_sec->flags |= SEC_KEEP;
7685 }
7686 }
7687
7688 /* Select a BFD to be used to hold the sections used by the glue code.
7689 This function is called from the linker scripts in ld/emultempl/
7690 {armelf/pe}.em. */
7691
7692 bfd_boolean
7693 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7694 {
7695 struct elf32_arm_link_hash_table *globals;
7696
7697 /* If we are only performing a partial link
7698 do not bother getting a bfd to hold the glue. */
7699 if (bfd_link_relocatable (info))
7700 return TRUE;
7701
7702 /* Make sure we don't attach the glue sections to a dynamic object. */
7703 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7704
7705 globals = elf32_arm_hash_table (info);
7706 BFD_ASSERT (globals != NULL);
7707
7708 if (globals->bfd_of_glue_owner != NULL)
7709 return TRUE;
7710
7711 /* Save the bfd for later use. */
7712 globals->bfd_of_glue_owner = abfd;
7713
7714 return TRUE;
7715 }
7716
7717 static void
7718 check_use_blx (struct elf32_arm_link_hash_table *globals)
7719 {
7720 int cpu_arch;
7721
7722 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7723 Tag_CPU_arch);
7724
7725 if (globals->fix_arm1176)
7726 {
7727 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7728 globals->use_blx = 1;
7729 }
7730 else
7731 {
7732 if (cpu_arch > TAG_CPU_ARCH_V4T)
7733 globals->use_blx = 1;
7734 }
7735 }
7736
7737 bfd_boolean
7738 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7739 struct bfd_link_info *link_info)
7740 {
7741 Elf_Internal_Shdr *symtab_hdr;
7742 Elf_Internal_Rela *internal_relocs = NULL;
7743 Elf_Internal_Rela *irel, *irelend;
7744 bfd_byte *contents = NULL;
7745
7746 asection *sec;
7747 struct elf32_arm_link_hash_table *globals;
7748
7749 /* If we are only performing a partial link do not bother
7750 to construct any glue. */
7751 if (bfd_link_relocatable (link_info))
7752 return TRUE;
7753
7754 /* Here we have a bfd that is to be included on the link. We have a
7755 hook to do reloc rummaging, before section sizes are nailed down. */
7756 globals = elf32_arm_hash_table (link_info);
7757 BFD_ASSERT (globals != NULL);
7758
7759 check_use_blx (globals);
7760
7761 if (globals->byteswap_code && !bfd_big_endian (abfd))
7762 {
7763 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7764 abfd);
7765 return FALSE;
7766 }
7767
7768 /* PR 5398: If we have not decided to include any loadable sections in
7769 the output then we will not have a glue owner bfd. This is OK, it
7770 just means that there is nothing else for us to do here. */
7771 if (globals->bfd_of_glue_owner == NULL)
7772 return TRUE;
7773
7774 /* Rummage around all the relocs and map the glue vectors. */
7775 sec = abfd->sections;
7776
7777 if (sec == NULL)
7778 return TRUE;
7779
7780 for (; sec != NULL; sec = sec->next)
7781 {
7782 if (sec->reloc_count == 0)
7783 continue;
7784
7785 if ((sec->flags & SEC_EXCLUDE) != 0)
7786 continue;
7787
7788 symtab_hdr = & elf_symtab_hdr (abfd);
7789
7790 /* Load the relocs. */
7791 internal_relocs
7792 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7793
7794 if (internal_relocs == NULL)
7795 goto error_return;
7796
7797 irelend = internal_relocs + sec->reloc_count;
7798 for (irel = internal_relocs; irel < irelend; irel++)
7799 {
7800 long r_type;
7801 unsigned long r_index;
7802
7803 struct elf_link_hash_entry *h;
7804
7805 r_type = ELF32_R_TYPE (irel->r_info);
7806 r_index = ELF32_R_SYM (irel->r_info);
7807
7808 /* These are the only relocation types we care about. */
7809 if ( r_type != R_ARM_PC24
7810 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7811 continue;
7812
7813 /* Get the section contents if we haven't done so already. */
7814 if (contents == NULL)
7815 {
7816 /* Get cached copy if it exists. */
7817 if (elf_section_data (sec)->this_hdr.contents != NULL)
7818 contents = elf_section_data (sec)->this_hdr.contents;
7819 else
7820 {
7821 /* Go get them off disk. */
7822 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7823 goto error_return;
7824 }
7825 }
7826
7827 if (r_type == R_ARM_V4BX)
7828 {
7829 int reg;
7830
7831 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7832 record_arm_bx_glue (link_info, reg);
7833 continue;
7834 }
7835
7836 /* If the relocation is not against a symbol it cannot concern us. */
7837 h = NULL;
7838
7839 /* We don't care about local symbols. */
7840 if (r_index < symtab_hdr->sh_info)
7841 continue;
7842
7843 /* This is an external symbol. */
7844 r_index -= symtab_hdr->sh_info;
7845 h = (struct elf_link_hash_entry *)
7846 elf_sym_hashes (abfd)[r_index];
7847
7848 /* If the relocation is against a static symbol it must be within
7849 the current section and so cannot be a cross ARM/Thumb relocation. */
7850 if (h == NULL)
7851 continue;
7852
7853 /* If the call will go through a PLT entry then we do not need
7854 glue. */
7855 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7856 continue;
7857
7858 switch (r_type)
7859 {
7860 case R_ARM_PC24:
7861 /* This one is a call from arm code. We need to look up
7862 the target of the call. If it is a thumb target, we
7863 insert glue. */
7864 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7865 == ST_BRANCH_TO_THUMB)
7866 record_arm_to_thumb_glue (link_info, h);
7867 break;
7868
7869 default:
7870 abort ();
7871 }
7872 }
7873
7874 if (contents != NULL
7875 && elf_section_data (sec)->this_hdr.contents != contents)
7876 free (contents);
7877 contents = NULL;
7878
7879 if (internal_relocs != NULL
7880 && elf_section_data (sec)->relocs != internal_relocs)
7881 free (internal_relocs);
7882 internal_relocs = NULL;
7883 }
7884
7885 return TRUE;
7886
7887 error_return:
7888 if (contents != NULL
7889 && elf_section_data (sec)->this_hdr.contents != contents)
7890 free (contents);
7891 if (internal_relocs != NULL
7892 && elf_section_data (sec)->relocs != internal_relocs)
7893 free (internal_relocs);
7894
7895 return FALSE;
7896 }
7897 #endif
7898
7899
7900 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7901
7902 void
7903 bfd_elf32_arm_init_maps (bfd *abfd)
7904 {
7905 Elf_Internal_Sym *isymbuf;
7906 Elf_Internal_Shdr *hdr;
7907 unsigned int i, localsyms;
7908
7909 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7910 if (! is_arm_elf (abfd))
7911 return;
7912
7913 if ((abfd->flags & DYNAMIC) != 0)
7914 return;
7915
7916 hdr = & elf_symtab_hdr (abfd);
7917 localsyms = hdr->sh_info;
7918
7919 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7920 should contain the number of local symbols, which should come before any
7921 global symbols. Mapping symbols are always local. */
7922 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7923 NULL);
7924
7925 /* No internal symbols read? Skip this BFD. */
7926 if (isymbuf == NULL)
7927 return;
7928
7929 for (i = 0; i < localsyms; i++)
7930 {
7931 Elf_Internal_Sym *isym = &isymbuf[i];
7932 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7933 const char *name;
7934
7935 if (sec != NULL
7936 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7937 {
7938 name = bfd_elf_string_from_elf_section (abfd,
7939 hdr->sh_link, isym->st_name);
7940
7941 if (bfd_is_arm_special_symbol_name (name,
7942 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7943 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7944 }
7945 }
7946 }
7947
7948
7949 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7950 say what they wanted. */
7951
7952 void
7953 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7954 {
7955 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7956 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7957
7958 if (globals == NULL)
7959 return;
7960
7961 if (globals->fix_cortex_a8 == -1)
7962 {
7963 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7964 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7965 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7966 || out_attr[Tag_CPU_arch_profile].i == 0))
7967 globals->fix_cortex_a8 = 1;
7968 else
7969 globals->fix_cortex_a8 = 0;
7970 }
7971 }
7972
7973
7974 void
7975 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7976 {
7977 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7978 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7979
7980 if (globals == NULL)
7981 return;
7982 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7983 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7984 {
7985 switch (globals->vfp11_fix)
7986 {
7987 case BFD_ARM_VFP11_FIX_DEFAULT:
7988 case BFD_ARM_VFP11_FIX_NONE:
7989 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7990 break;
7991
7992 default:
7993 /* Give a warning, but do as the user requests anyway. */
7994 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
7995 "workaround is not necessary for target architecture"), obfd);
7996 }
7997 }
7998 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7999 /* For earlier architectures, we might need the workaround, but do not
8000 enable it by default. If users is running with broken hardware, they
8001 must enable the erratum fix explicitly. */
8002 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8003 }
8004
8005 void
8006 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8007 {
8008 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8009 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8010
8011 if (globals == NULL)
8012 return;
8013
8014 /* We assume only Cortex-M4 may require the fix. */
8015 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8016 || out_attr[Tag_CPU_arch_profile].i != 'M')
8017 {
8018 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8019 /* Give a warning, but do as the user requests anyway. */
8020 _bfd_error_handler
8021 (_("%pB: warning: selected STM32L4XX erratum "
8022 "workaround is not necessary for target architecture"), obfd);
8023 }
8024 }
8025
8026 enum bfd_arm_vfp11_pipe
8027 {
8028 VFP11_FMAC,
8029 VFP11_LS,
8030 VFP11_DS,
8031 VFP11_BAD
8032 };
8033
8034 /* Return a VFP register number. This is encoded as RX:X for single-precision
8035 registers, or X:RX for double-precision registers, where RX is the group of
8036 four bits in the instruction encoding and X is the single extension bit.
8037 RX and X fields are specified using their lowest (starting) bit. The return
8038 value is:
8039
8040 0...31: single-precision registers s0...s31
8041 32...63: double-precision registers d0...d31.
8042
8043 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8044 encounter VFP3 instructions, so we allow the full range for DP registers. */
8045
8046 static unsigned int
8047 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
8048 unsigned int x)
8049 {
8050 if (is_double)
8051 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8052 else
8053 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8054 }
8055
8056 /* Set bits in *WMASK according to a register number REG as encoded by
8057 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8058
8059 static void
8060 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8061 {
8062 if (reg < 32)
8063 *wmask |= 1 << reg;
8064 else if (reg < 48)
8065 *wmask |= 3 << ((reg - 32) * 2);
8066 }
8067
8068 /* Return TRUE if WMASK overwrites anything in REGS. */
8069
8070 static bfd_boolean
8071 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8072 {
8073 int i;
8074
8075 for (i = 0; i < numregs; i++)
8076 {
8077 unsigned int reg = regs[i];
8078
8079 if (reg < 32 && (wmask & (1 << reg)) != 0)
8080 return TRUE;
8081
8082 reg -= 32;
8083
8084 if (reg >= 16)
8085 continue;
8086
8087 if ((wmask & (3 << (reg * 2))) != 0)
8088 return TRUE;
8089 }
8090
8091 return FALSE;
8092 }
8093
8094 /* In this function, we're interested in two things: finding input registers
8095 for VFP data-processing instructions, and finding the set of registers which
8096 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8097 hold the written set, so FLDM etc. are easy to deal with (we're only
8098 interested in 32 SP registers or 16 dp registers, due to the VFP version
8099 implemented by the chip in question). DP registers are marked by setting
8100 both SP registers in the write mask). */
8101
8102 static enum bfd_arm_vfp11_pipe
8103 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8104 int *numregs)
8105 {
8106 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8107 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8108
8109 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8110 {
8111 unsigned int pqrs;
8112 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8113 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8114
8115 pqrs = ((insn & 0x00800000) >> 20)
8116 | ((insn & 0x00300000) >> 19)
8117 | ((insn & 0x00000040) >> 6);
8118
8119 switch (pqrs)
8120 {
8121 case 0: /* fmac[sd]. */
8122 case 1: /* fnmac[sd]. */
8123 case 2: /* fmsc[sd]. */
8124 case 3: /* fnmsc[sd]. */
8125 vpipe = VFP11_FMAC;
8126 bfd_arm_vfp11_write_mask (destmask, fd);
8127 regs[0] = fd;
8128 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8129 regs[2] = fm;
8130 *numregs = 3;
8131 break;
8132
8133 case 4: /* fmul[sd]. */
8134 case 5: /* fnmul[sd]. */
8135 case 6: /* fadd[sd]. */
8136 case 7: /* fsub[sd]. */
8137 vpipe = VFP11_FMAC;
8138 goto vfp_binop;
8139
8140 case 8: /* fdiv[sd]. */
8141 vpipe = VFP11_DS;
8142 vfp_binop:
8143 bfd_arm_vfp11_write_mask (destmask, fd);
8144 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8145 regs[1] = fm;
8146 *numregs = 2;
8147 break;
8148
8149 case 15: /* extended opcode. */
8150 {
8151 unsigned int extn = ((insn >> 15) & 0x1e)
8152 | ((insn >> 7) & 1);
8153
8154 switch (extn)
8155 {
8156 case 0: /* fcpy[sd]. */
8157 case 1: /* fabs[sd]. */
8158 case 2: /* fneg[sd]. */
8159 case 8: /* fcmp[sd]. */
8160 case 9: /* fcmpe[sd]. */
8161 case 10: /* fcmpz[sd]. */
8162 case 11: /* fcmpez[sd]. */
8163 case 16: /* fuito[sd]. */
8164 case 17: /* fsito[sd]. */
8165 case 24: /* ftoui[sd]. */
8166 case 25: /* ftouiz[sd]. */
8167 case 26: /* ftosi[sd]. */
8168 case 27: /* ftosiz[sd]. */
8169 /* These instructions will not bounce due to underflow. */
8170 *numregs = 0;
8171 vpipe = VFP11_FMAC;
8172 break;
8173
8174 case 3: /* fsqrt[sd]. */
8175 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8176 registers to cause the erratum in previous instructions. */
8177 bfd_arm_vfp11_write_mask (destmask, fd);
8178 vpipe = VFP11_DS;
8179 break;
8180
8181 case 15: /* fcvt{ds,sd}. */
8182 {
8183 int rnum = 0;
8184
8185 bfd_arm_vfp11_write_mask (destmask, fd);
8186
8187 /* Only FCVTSD can underflow. */
8188 if ((insn & 0x100) != 0)
8189 regs[rnum++] = fm;
8190
8191 *numregs = rnum;
8192
8193 vpipe = VFP11_FMAC;
8194 }
8195 break;
8196
8197 default:
8198 return VFP11_BAD;
8199 }
8200 }
8201 break;
8202
8203 default:
8204 return VFP11_BAD;
8205 }
8206 }
8207 /* Two-register transfer. */
8208 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8209 {
8210 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8211
8212 if ((insn & 0x100000) == 0)
8213 {
8214 if (is_double)
8215 bfd_arm_vfp11_write_mask (destmask, fm);
8216 else
8217 {
8218 bfd_arm_vfp11_write_mask (destmask, fm);
8219 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8220 }
8221 }
8222
8223 vpipe = VFP11_LS;
8224 }
8225 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8226 {
8227 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8228 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8229
8230 switch (puw)
8231 {
8232 case 0: /* Two-reg transfer. We should catch these above. */
8233 abort ();
8234
8235 case 2: /* fldm[sdx]. */
8236 case 3:
8237 case 5:
8238 {
8239 unsigned int i, offset = insn & 0xff;
8240
8241 if (is_double)
8242 offset >>= 1;
8243
8244 for (i = fd; i < fd + offset; i++)
8245 bfd_arm_vfp11_write_mask (destmask, i);
8246 }
8247 break;
8248
8249 case 4: /* fld[sd]. */
8250 case 6:
8251 bfd_arm_vfp11_write_mask (destmask, fd);
8252 break;
8253
8254 default:
8255 return VFP11_BAD;
8256 }
8257
8258 vpipe = VFP11_LS;
8259 }
8260 /* Single-register transfer. Note L==0. */
8261 else if ((insn & 0x0f100e10) == 0x0e000a10)
8262 {
8263 unsigned int opcode = (insn >> 21) & 7;
8264 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8265
8266 switch (opcode)
8267 {
8268 case 0: /* fmsr/fmdlr. */
8269 case 1: /* fmdhr. */
8270 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8271 destination register. I don't know if this is exactly right,
8272 but it is the conservative choice. */
8273 bfd_arm_vfp11_write_mask (destmask, fn);
8274 break;
8275
8276 case 7: /* fmxr. */
8277 break;
8278 }
8279
8280 vpipe = VFP11_LS;
8281 }
8282
8283 return vpipe;
8284 }
8285
8286
8287 static int elf32_arm_compare_mapping (const void * a, const void * b);
8288
8289
8290 /* Look for potentially-troublesome code sequences which might trigger the
8291 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8292 (available from ARM) for details of the erratum. A short version is
8293 described in ld.texinfo. */
8294
8295 bfd_boolean
8296 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8297 {
8298 asection *sec;
8299 bfd_byte *contents = NULL;
8300 int state = 0;
8301 int regs[3], numregs = 0;
8302 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8303 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8304
8305 if (globals == NULL)
8306 return FALSE;
8307
8308 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8309 The states transition as follows:
8310
8311 0 -> 1 (vector) or 0 -> 2 (scalar)
8312 A VFP FMAC-pipeline instruction has been seen. Fill
8313 regs[0]..regs[numregs-1] with its input operands. Remember this
8314 instruction in 'first_fmac'.
8315
8316 1 -> 2
8317 Any instruction, except for a VFP instruction which overwrites
8318 regs[*].
8319
8320 1 -> 3 [ -> 0 ] or
8321 2 -> 3 [ -> 0 ]
8322 A VFP instruction has been seen which overwrites any of regs[*].
8323 We must make a veneer! Reset state to 0 before examining next
8324 instruction.
8325
8326 2 -> 0
8327 If we fail to match anything in state 2, reset to state 0 and reset
8328 the instruction pointer to the instruction after 'first_fmac'.
8329
8330 If the VFP11 vector mode is in use, there must be at least two unrelated
8331 instructions between anti-dependent VFP11 instructions to properly avoid
8332 triggering the erratum, hence the use of the extra state 1. */
8333
8334 /* If we are only performing a partial link do not bother
8335 to construct any glue. */
8336 if (bfd_link_relocatable (link_info))
8337 return TRUE;
8338
8339 /* Skip if this bfd does not correspond to an ELF image. */
8340 if (! is_arm_elf (abfd))
8341 return TRUE;
8342
8343 /* We should have chosen a fix type by the time we get here. */
8344 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8345
8346 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8347 return TRUE;
8348
8349 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8350 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8351 return TRUE;
8352
8353 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8354 {
8355 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8356 struct _arm_elf_section_data *sec_data;
8357
8358 /* If we don't have executable progbits, we're not interested in this
8359 section. Also skip if section is to be excluded. */
8360 if (elf_section_type (sec) != SHT_PROGBITS
8361 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8362 || (sec->flags & SEC_EXCLUDE) != 0
8363 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8364 || sec->output_section == bfd_abs_section_ptr
8365 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8366 continue;
8367
8368 sec_data = elf32_arm_section_data (sec);
8369
8370 if (sec_data->mapcount == 0)
8371 continue;
8372
8373 if (elf_section_data (sec)->this_hdr.contents != NULL)
8374 contents = elf_section_data (sec)->this_hdr.contents;
8375 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8376 goto error_return;
8377
8378 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8379 elf32_arm_compare_mapping);
8380
8381 for (span = 0; span < sec_data->mapcount; span++)
8382 {
8383 unsigned int span_start = sec_data->map[span].vma;
8384 unsigned int span_end = (span == sec_data->mapcount - 1)
8385 ? sec->size : sec_data->map[span + 1].vma;
8386 char span_type = sec_data->map[span].type;
8387
8388 /* FIXME: Only ARM mode is supported at present. We may need to
8389 support Thumb-2 mode also at some point. */
8390 if (span_type != 'a')
8391 continue;
8392
8393 for (i = span_start; i < span_end;)
8394 {
8395 unsigned int next_i = i + 4;
8396 unsigned int insn = bfd_big_endian (abfd)
8397 ? (contents[i] << 24)
8398 | (contents[i + 1] << 16)
8399 | (contents[i + 2] << 8)
8400 | contents[i + 3]
8401 : (contents[i + 3] << 24)
8402 | (contents[i + 2] << 16)
8403 | (contents[i + 1] << 8)
8404 | contents[i];
8405 unsigned int writemask = 0;
8406 enum bfd_arm_vfp11_pipe vpipe;
8407
8408 switch (state)
8409 {
8410 case 0:
8411 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8412 &numregs);
8413 /* I'm assuming the VFP11 erratum can trigger with denorm
8414 operands on either the FMAC or the DS pipeline. This might
8415 lead to slightly overenthusiastic veneer insertion. */
8416 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8417 {
8418 state = use_vector ? 1 : 2;
8419 first_fmac = i;
8420 veneer_of_insn = insn;
8421 }
8422 break;
8423
8424 case 1:
8425 {
8426 int other_regs[3], other_numregs;
8427 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8428 other_regs,
8429 &other_numregs);
8430 if (vpipe != VFP11_BAD
8431 && bfd_arm_vfp11_antidependency (writemask, regs,
8432 numregs))
8433 state = 3;
8434 else
8435 state = 2;
8436 }
8437 break;
8438
8439 case 2:
8440 {
8441 int other_regs[3], other_numregs;
8442 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8443 other_regs,
8444 &other_numregs);
8445 if (vpipe != VFP11_BAD
8446 && bfd_arm_vfp11_antidependency (writemask, regs,
8447 numregs))
8448 state = 3;
8449 else
8450 {
8451 state = 0;
8452 next_i = first_fmac + 4;
8453 }
8454 }
8455 break;
8456
8457 case 3:
8458 abort (); /* Should be unreachable. */
8459 }
8460
8461 if (state == 3)
8462 {
8463 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8464 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8465
8466 elf32_arm_section_data (sec)->erratumcount += 1;
8467
8468 newerr->u.b.vfp_insn = veneer_of_insn;
8469
8470 switch (span_type)
8471 {
8472 case 'a':
8473 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8474 break;
8475
8476 default:
8477 abort ();
8478 }
8479
8480 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8481 first_fmac);
8482
8483 newerr->vma = -1;
8484
8485 newerr->next = sec_data->erratumlist;
8486 sec_data->erratumlist = newerr;
8487
8488 state = 0;
8489 }
8490
8491 i = next_i;
8492 }
8493 }
8494
8495 if (contents != NULL
8496 && elf_section_data (sec)->this_hdr.contents != contents)
8497 free (contents);
8498 contents = NULL;
8499 }
8500
8501 return TRUE;
8502
8503 error_return:
8504 if (contents != NULL
8505 && elf_section_data (sec)->this_hdr.contents != contents)
8506 free (contents);
8507
8508 return FALSE;
8509 }
8510
8511 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8512 after sections have been laid out, using specially-named symbols. */
8513
8514 void
8515 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8516 struct bfd_link_info *link_info)
8517 {
8518 asection *sec;
8519 struct elf32_arm_link_hash_table *globals;
8520 char *tmp_name;
8521
8522 if (bfd_link_relocatable (link_info))
8523 return;
8524
8525 /* Skip if this bfd does not correspond to an ELF image. */
8526 if (! is_arm_elf (abfd))
8527 return;
8528
8529 globals = elf32_arm_hash_table (link_info);
8530 if (globals == NULL)
8531 return;
8532
8533 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8534 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8535
8536 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8537 {
8538 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8539 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8540
8541 for (; errnode != NULL; errnode = errnode->next)
8542 {
8543 struct elf_link_hash_entry *myh;
8544 bfd_vma vma;
8545
8546 switch (errnode->type)
8547 {
8548 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8549 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8550 /* Find veneer symbol. */
8551 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8552 errnode->u.b.veneer->u.v.id);
8553
8554 myh = elf_link_hash_lookup
8555 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8556
8557 if (myh == NULL)
8558 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8559 abfd, "VFP11", tmp_name);
8560
8561 vma = myh->root.u.def.section->output_section->vma
8562 + myh->root.u.def.section->output_offset
8563 + myh->root.u.def.value;
8564
8565 errnode->u.b.veneer->vma = vma;
8566 break;
8567
8568 case VFP11_ERRATUM_ARM_VENEER:
8569 case VFP11_ERRATUM_THUMB_VENEER:
8570 /* Find return location. */
8571 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8572 errnode->u.v.id);
8573
8574 myh = elf_link_hash_lookup
8575 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8576
8577 if (myh == NULL)
8578 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8579 abfd, "VFP11", tmp_name);
8580
8581 vma = myh->root.u.def.section->output_section->vma
8582 + myh->root.u.def.section->output_offset
8583 + myh->root.u.def.value;
8584
8585 errnode->u.v.branch->vma = vma;
8586 break;
8587
8588 default:
8589 abort ();
8590 }
8591 }
8592 }
8593
8594 free (tmp_name);
8595 }
8596
8597 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8598 return locations after sections have been laid out, using
8599 specially-named symbols. */
8600
8601 void
8602 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8603 struct bfd_link_info *link_info)
8604 {
8605 asection *sec;
8606 struct elf32_arm_link_hash_table *globals;
8607 char *tmp_name;
8608
8609 if (bfd_link_relocatable (link_info))
8610 return;
8611
8612 /* Skip if this bfd does not correspond to an ELF image. */
8613 if (! is_arm_elf (abfd))
8614 return;
8615
8616 globals = elf32_arm_hash_table (link_info);
8617 if (globals == NULL)
8618 return;
8619
8620 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8621 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8622
8623 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8624 {
8625 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8626 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8627
8628 for (; errnode != NULL; errnode = errnode->next)
8629 {
8630 struct elf_link_hash_entry *myh;
8631 bfd_vma vma;
8632
8633 switch (errnode->type)
8634 {
8635 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8636 /* Find veneer symbol. */
8637 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8638 errnode->u.b.veneer->u.v.id);
8639
8640 myh = elf_link_hash_lookup
8641 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8642
8643 if (myh == NULL)
8644 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8645 abfd, "STM32L4XX", tmp_name);
8646
8647 vma = myh->root.u.def.section->output_section->vma
8648 + myh->root.u.def.section->output_offset
8649 + myh->root.u.def.value;
8650
8651 errnode->u.b.veneer->vma = vma;
8652 break;
8653
8654 case STM32L4XX_ERRATUM_VENEER:
8655 /* Find return location. */
8656 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8657 errnode->u.v.id);
8658
8659 myh = elf_link_hash_lookup
8660 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8661
8662 if (myh == NULL)
8663 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8664 abfd, "STM32L4XX", tmp_name);
8665
8666 vma = myh->root.u.def.section->output_section->vma
8667 + myh->root.u.def.section->output_offset
8668 + myh->root.u.def.value;
8669
8670 errnode->u.v.branch->vma = vma;
8671 break;
8672
8673 default:
8674 abort ();
8675 }
8676 }
8677 }
8678
8679 free (tmp_name);
8680 }
8681
8682 static inline bfd_boolean
8683 is_thumb2_ldmia (const insn32 insn)
8684 {
8685 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8686 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8687 return (insn & 0xffd02000) == 0xe8900000;
8688 }
8689
8690 static inline bfd_boolean
8691 is_thumb2_ldmdb (const insn32 insn)
8692 {
8693 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8694 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8695 return (insn & 0xffd02000) == 0xe9100000;
8696 }
8697
8698 static inline bfd_boolean
8699 is_thumb2_vldm (const insn32 insn)
8700 {
8701 /* A6.5 Extension register load or store instruction
8702 A7.7.229
8703 We look for SP 32-bit and DP 64-bit registers.
8704 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8705 <list> is consecutive 64-bit registers
8706 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8707 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8708 <list> is consecutive 32-bit registers
8709 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8710 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8711 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8712 return
8713 (((insn & 0xfe100f00) == 0xec100b00) ||
8714 ((insn & 0xfe100f00) == 0xec100a00))
8715 && /* (IA without !). */
8716 (((((insn << 7) >> 28) & 0xd) == 0x4)
8717 /* (IA with !), includes VPOP (when reg number is SP). */
8718 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8719 /* (DB with !). */
8720 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8721 }
8722
8723 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8724 VLDM opcode and:
8725 - computes the number and the mode of memory accesses
8726 - decides if the replacement should be done:
8727 . replaces only if > 8-word accesses
8728 . or (testing purposes only) replaces all accesses. */
8729
8730 static bfd_boolean
8731 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8732 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8733 {
8734 int nb_words = 0;
8735
8736 /* The field encoding the register list is the same for both LDMIA
8737 and LDMDB encodings. */
8738 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8739 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8740 else if (is_thumb2_vldm (insn))
8741 nb_words = (insn & 0xff);
8742
8743 /* DEFAULT mode accounts for the real bug condition situation,
8744 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8745 return
8746 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8747 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8748 }
8749
8750 /* Look for potentially-troublesome code sequences which might trigger
8751 the STM STM32L4XX erratum. */
8752
8753 bfd_boolean
8754 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8755 struct bfd_link_info *link_info)
8756 {
8757 asection *sec;
8758 bfd_byte *contents = NULL;
8759 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8760
8761 if (globals == NULL)
8762 return FALSE;
8763
8764 /* If we are only performing a partial link do not bother
8765 to construct any glue. */
8766 if (bfd_link_relocatable (link_info))
8767 return TRUE;
8768
8769 /* Skip if this bfd does not correspond to an ELF image. */
8770 if (! is_arm_elf (abfd))
8771 return TRUE;
8772
8773 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8774 return TRUE;
8775
8776 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8777 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8778 return TRUE;
8779
8780 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8781 {
8782 unsigned int i, span;
8783 struct _arm_elf_section_data *sec_data;
8784
8785 /* If we don't have executable progbits, we're not interested in this
8786 section. Also skip if section is to be excluded. */
8787 if (elf_section_type (sec) != SHT_PROGBITS
8788 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8789 || (sec->flags & SEC_EXCLUDE) != 0
8790 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8791 || sec->output_section == bfd_abs_section_ptr
8792 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8793 continue;
8794
8795 sec_data = elf32_arm_section_data (sec);
8796
8797 if (sec_data->mapcount == 0)
8798 continue;
8799
8800 if (elf_section_data (sec)->this_hdr.contents != NULL)
8801 contents = elf_section_data (sec)->this_hdr.contents;
8802 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8803 goto error_return;
8804
8805 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8806 elf32_arm_compare_mapping);
8807
8808 for (span = 0; span < sec_data->mapcount; span++)
8809 {
8810 unsigned int span_start = sec_data->map[span].vma;
8811 unsigned int span_end = (span == sec_data->mapcount - 1)
8812 ? sec->size : sec_data->map[span + 1].vma;
8813 char span_type = sec_data->map[span].type;
8814 int itblock_current_pos = 0;
8815
8816 /* Only Thumb2 mode need be supported with this CM4 specific
8817 code, we should not encounter any arm mode eg span_type
8818 != 'a'. */
8819 if (span_type != 't')
8820 continue;
8821
8822 for (i = span_start; i < span_end;)
8823 {
8824 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8825 bfd_boolean insn_32bit = FALSE;
8826 bfd_boolean is_ldm = FALSE;
8827 bfd_boolean is_vldm = FALSE;
8828 bfd_boolean is_not_last_in_it_block = FALSE;
8829
8830 /* The first 16-bits of all 32-bit thumb2 instructions start
8831 with opcode[15..13]=0b111 and the encoded op1 can be anything
8832 except opcode[12..11]!=0b00.
8833 See 32-bit Thumb instruction encoding. */
8834 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8835 insn_32bit = TRUE;
8836
8837 /* Compute the predicate that tells if the instruction
8838 is concerned by the IT block
8839 - Creates an error if there is a ldm that is not
8840 last in the IT block thus cannot be replaced
8841 - Otherwise we can create a branch at the end of the
8842 IT block, it will be controlled naturally by IT
8843 with the proper pseudo-predicate
8844 - So the only interesting predicate is the one that
8845 tells that we are not on the last item of an IT
8846 block. */
8847 if (itblock_current_pos != 0)
8848 is_not_last_in_it_block = !!--itblock_current_pos;
8849
8850 if (insn_32bit)
8851 {
8852 /* Load the rest of the insn (in manual-friendly order). */
8853 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8854 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8855 is_vldm = is_thumb2_vldm (insn);
8856
8857 /* Veneers are created for (v)ldm depending on
8858 option flags and memory accesses conditions; but
8859 if the instruction is not the last instruction of
8860 an IT block, we cannot create a jump there, so we
8861 bail out. */
8862 if ((is_ldm || is_vldm)
8863 && stm32l4xx_need_create_replacing_stub
8864 (insn, globals->stm32l4xx_fix))
8865 {
8866 if (is_not_last_in_it_block)
8867 {
8868 _bfd_error_handler
8869 /* xgettext:c-format */
8870 (_("%pB(%pA+%#x): error: multiple load detected"
8871 " in non-last IT block instruction:"
8872 " STM32L4XX veneer cannot be generated; "
8873 "use gcc option -mrestrict-it to generate"
8874 " only one instruction per IT block"),
8875 abfd, sec, i);
8876 }
8877 else
8878 {
8879 elf32_stm32l4xx_erratum_list *newerr =
8880 (elf32_stm32l4xx_erratum_list *)
8881 bfd_zmalloc
8882 (sizeof (elf32_stm32l4xx_erratum_list));
8883
8884 elf32_arm_section_data (sec)
8885 ->stm32l4xx_erratumcount += 1;
8886 newerr->u.b.insn = insn;
8887 /* We create only thumb branches. */
8888 newerr->type =
8889 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8890 record_stm32l4xx_erratum_veneer
8891 (link_info, newerr, abfd, sec,
8892 i,
8893 is_ldm ?
8894 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8895 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8896 newerr->vma = -1;
8897 newerr->next = sec_data->stm32l4xx_erratumlist;
8898 sec_data->stm32l4xx_erratumlist = newerr;
8899 }
8900 }
8901 }
8902 else
8903 {
8904 /* A7.7.37 IT p208
8905 IT blocks are only encoded in T1
8906 Encoding T1: IT{x{y{z}}} <firstcond>
8907 1 0 1 1 - 1 1 1 1 - firstcond - mask
8908 if mask = '0000' then see 'related encodings'
8909 We don't deal with UNPREDICTABLE, just ignore these.
8910 There can be no nested IT blocks so an IT block
8911 is naturally a new one for which it is worth
8912 computing its size. */
8913 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8914 && ((insn & 0x000f) != 0x0000);
8915 /* If we have a new IT block we compute its size. */
8916 if (is_newitblock)
8917 {
8918 /* Compute the number of instructions controlled
8919 by the IT block, it will be used to decide
8920 whether we are inside an IT block or not. */
8921 unsigned int mask = insn & 0x000f;
8922 itblock_current_pos = 4 - ctz (mask);
8923 }
8924 }
8925
8926 i += insn_32bit ? 4 : 2;
8927 }
8928 }
8929
8930 if (contents != NULL
8931 && elf_section_data (sec)->this_hdr.contents != contents)
8932 free (contents);
8933 contents = NULL;
8934 }
8935
8936 return TRUE;
8937
8938 error_return:
8939 if (contents != NULL
8940 && elf_section_data (sec)->this_hdr.contents != contents)
8941 free (contents);
8942
8943 return FALSE;
8944 }
8945
8946 /* Set target relocation values needed during linking. */
8947
8948 void
8949 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8950 struct bfd_link_info *link_info,
8951 struct elf32_arm_params *params)
8952 {
8953 struct elf32_arm_link_hash_table *globals;
8954
8955 globals = elf32_arm_hash_table (link_info);
8956 if (globals == NULL)
8957 return;
8958
8959 globals->target1_is_rel = params->target1_is_rel;
8960 if (globals->fdpic_p)
8961 globals->target2_reloc = R_ARM_GOT32;
8962 else if (strcmp (params->target2_type, "rel") == 0)
8963 globals->target2_reloc = R_ARM_REL32;
8964 else if (strcmp (params->target2_type, "abs") == 0)
8965 globals->target2_reloc = R_ARM_ABS32;
8966 else if (strcmp (params->target2_type, "got-rel") == 0)
8967 globals->target2_reloc = R_ARM_GOT_PREL;
8968 else
8969 {
8970 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
8971 params->target2_type);
8972 }
8973 globals->fix_v4bx = params->fix_v4bx;
8974 globals->use_blx |= params->use_blx;
8975 globals->vfp11_fix = params->vfp11_denorm_fix;
8976 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8977 if (globals->fdpic_p)
8978 globals->pic_veneer = 1;
8979 else
8980 globals->pic_veneer = params->pic_veneer;
8981 globals->fix_cortex_a8 = params->fix_cortex_a8;
8982 globals->fix_arm1176 = params->fix_arm1176;
8983 globals->cmse_implib = params->cmse_implib;
8984 globals->in_implib_bfd = params->in_implib_bfd;
8985
8986 BFD_ASSERT (is_arm_elf (output_bfd));
8987 elf_arm_tdata (output_bfd)->no_enum_size_warning
8988 = params->no_enum_size_warning;
8989 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8990 = params->no_wchar_size_warning;
8991 }
8992
8993 /* Replace the target offset of a Thumb bl or b.w instruction. */
8994
8995 static void
8996 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8997 {
8998 bfd_vma upper;
8999 bfd_vma lower;
9000 int reloc_sign;
9001
9002 BFD_ASSERT ((offset & 1) == 0);
9003
9004 upper = bfd_get_16 (abfd, insn);
9005 lower = bfd_get_16 (abfd, insn + 2);
9006 reloc_sign = (offset < 0) ? 1 : 0;
9007 upper = (upper & ~(bfd_vma) 0x7ff)
9008 | ((offset >> 12) & 0x3ff)
9009 | (reloc_sign << 10);
9010 lower = (lower & ~(bfd_vma) 0x2fff)
9011 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9012 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9013 | ((offset >> 1) & 0x7ff);
9014 bfd_put_16 (abfd, upper, insn);
9015 bfd_put_16 (abfd, lower, insn + 2);
9016 }
9017
9018 /* Thumb code calling an ARM function. */
9019
9020 static int
9021 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9022 const char * name,
9023 bfd * input_bfd,
9024 bfd * output_bfd,
9025 asection * input_section,
9026 bfd_byte * hit_data,
9027 asection * sym_sec,
9028 bfd_vma offset,
9029 bfd_signed_vma addend,
9030 bfd_vma val,
9031 char **error_message)
9032 {
9033 asection * s = 0;
9034 bfd_vma my_offset;
9035 long int ret_offset;
9036 struct elf_link_hash_entry * myh;
9037 struct elf32_arm_link_hash_table * globals;
9038
9039 myh = find_thumb_glue (info, name, error_message);
9040 if (myh == NULL)
9041 return FALSE;
9042
9043 globals = elf32_arm_hash_table (info);
9044 BFD_ASSERT (globals != NULL);
9045 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9046
9047 my_offset = myh->root.u.def.value;
9048
9049 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9050 THUMB2ARM_GLUE_SECTION_NAME);
9051
9052 BFD_ASSERT (s != NULL);
9053 BFD_ASSERT (s->contents != NULL);
9054 BFD_ASSERT (s->output_section != NULL);
9055
9056 if ((my_offset & 0x01) == 0x01)
9057 {
9058 if (sym_sec != NULL
9059 && sym_sec->owner != NULL
9060 && !INTERWORK_FLAG (sym_sec->owner))
9061 {
9062 _bfd_error_handler
9063 (_("%pB(%s): warning: interworking not enabled;"
9064 " first occurrence: %pB: %s call to %s"),
9065 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9066
9067 return FALSE;
9068 }
9069
9070 --my_offset;
9071 myh->root.u.def.value = my_offset;
9072
9073 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9074 s->contents + my_offset);
9075
9076 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9077 s->contents + my_offset + 2);
9078
9079 ret_offset =
9080 /* Address of destination of the stub. */
9081 ((bfd_signed_vma) val)
9082 - ((bfd_signed_vma)
9083 /* Offset from the start of the current section
9084 to the start of the stubs. */
9085 (s->output_offset
9086 /* Offset of the start of this stub from the start of the stubs. */
9087 + my_offset
9088 /* Address of the start of the current section. */
9089 + s->output_section->vma)
9090 /* The branch instruction is 4 bytes into the stub. */
9091 + 4
9092 /* ARM branches work from the pc of the instruction + 8. */
9093 + 8);
9094
9095 put_arm_insn (globals, output_bfd,
9096 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9097 s->contents + my_offset + 4);
9098 }
9099
9100 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9101
9102 /* Now go back and fix up the original BL insn to point to here. */
9103 ret_offset =
9104 /* Address of where the stub is located. */
9105 (s->output_section->vma + s->output_offset + my_offset)
9106 /* Address of where the BL is located. */
9107 - (input_section->output_section->vma + input_section->output_offset
9108 + offset)
9109 /* Addend in the relocation. */
9110 - addend
9111 /* Biassing for PC-relative addressing. */
9112 - 8;
9113
9114 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9115
9116 return TRUE;
9117 }
9118
9119 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9120
9121 static struct elf_link_hash_entry *
9122 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9123 const char * name,
9124 bfd * input_bfd,
9125 bfd * output_bfd,
9126 asection * sym_sec,
9127 bfd_vma val,
9128 asection * s,
9129 char ** error_message)
9130 {
9131 bfd_vma my_offset;
9132 long int ret_offset;
9133 struct elf_link_hash_entry * myh;
9134 struct elf32_arm_link_hash_table * globals;
9135
9136 myh = find_arm_glue (info, name, error_message);
9137 if (myh == NULL)
9138 return NULL;
9139
9140 globals = elf32_arm_hash_table (info);
9141 BFD_ASSERT (globals != NULL);
9142 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9143
9144 my_offset = myh->root.u.def.value;
9145
9146 if ((my_offset & 0x01) == 0x01)
9147 {
9148 if (sym_sec != NULL
9149 && sym_sec->owner != NULL
9150 && !INTERWORK_FLAG (sym_sec->owner))
9151 {
9152 _bfd_error_handler
9153 (_("%pB(%s): warning: interworking not enabled;"
9154 " first occurrence: %pB: %s call to %s"),
9155 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9156 }
9157
9158 --my_offset;
9159 myh->root.u.def.value = my_offset;
9160
9161 if (bfd_link_pic (info)
9162 || globals->root.is_relocatable_executable
9163 || globals->pic_veneer)
9164 {
9165 /* For relocatable objects we can't use absolute addresses,
9166 so construct the address from a relative offset. */
9167 /* TODO: If the offset is small it's probably worth
9168 constructing the address with adds. */
9169 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9170 s->contents + my_offset);
9171 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9172 s->contents + my_offset + 4);
9173 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9174 s->contents + my_offset + 8);
9175 /* Adjust the offset by 4 for the position of the add,
9176 and 8 for the pipeline offset. */
9177 ret_offset = (val - (s->output_offset
9178 + s->output_section->vma
9179 + my_offset + 12))
9180 | 1;
9181 bfd_put_32 (output_bfd, ret_offset,
9182 s->contents + my_offset + 12);
9183 }
9184 else if (globals->use_blx)
9185 {
9186 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9187 s->contents + my_offset);
9188
9189 /* It's a thumb address. Add the low order bit. */
9190 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9191 s->contents + my_offset + 4);
9192 }
9193 else
9194 {
9195 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9196 s->contents + my_offset);
9197
9198 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9199 s->contents + my_offset + 4);
9200
9201 /* It's a thumb address. Add the low order bit. */
9202 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9203 s->contents + my_offset + 8);
9204
9205 my_offset += 12;
9206 }
9207 }
9208
9209 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9210
9211 return myh;
9212 }
9213
9214 /* Arm code calling a Thumb function. */
9215
9216 static int
9217 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9218 const char * name,
9219 bfd * input_bfd,
9220 bfd * output_bfd,
9221 asection * input_section,
9222 bfd_byte * hit_data,
9223 asection * sym_sec,
9224 bfd_vma offset,
9225 bfd_signed_vma addend,
9226 bfd_vma val,
9227 char **error_message)
9228 {
9229 unsigned long int tmp;
9230 bfd_vma my_offset;
9231 asection * s;
9232 long int ret_offset;
9233 struct elf_link_hash_entry * myh;
9234 struct elf32_arm_link_hash_table * globals;
9235
9236 globals = elf32_arm_hash_table (info);
9237 BFD_ASSERT (globals != NULL);
9238 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9239
9240 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9241 ARM2THUMB_GLUE_SECTION_NAME);
9242 BFD_ASSERT (s != NULL);
9243 BFD_ASSERT (s->contents != NULL);
9244 BFD_ASSERT (s->output_section != NULL);
9245
9246 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9247 sym_sec, val, s, error_message);
9248 if (!myh)
9249 return FALSE;
9250
9251 my_offset = myh->root.u.def.value;
9252 tmp = bfd_get_32 (input_bfd, hit_data);
9253 tmp = tmp & 0xFF000000;
9254
9255 /* Somehow these are both 4 too far, so subtract 8. */
9256 ret_offset = (s->output_offset
9257 + my_offset
9258 + s->output_section->vma
9259 - (input_section->output_offset
9260 + input_section->output_section->vma
9261 + offset + addend)
9262 - 8);
9263
9264 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9265
9266 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9267
9268 return TRUE;
9269 }
9270
9271 /* Populate Arm stub for an exported Thumb function. */
9272
9273 static bfd_boolean
9274 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9275 {
9276 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9277 asection * s;
9278 struct elf_link_hash_entry * myh;
9279 struct elf32_arm_link_hash_entry *eh;
9280 struct elf32_arm_link_hash_table * globals;
9281 asection *sec;
9282 bfd_vma val;
9283 char *error_message;
9284
9285 eh = elf32_arm_hash_entry (h);
9286 /* Allocate stubs for exported Thumb functions on v4t. */
9287 if (eh->export_glue == NULL)
9288 return TRUE;
9289
9290 globals = elf32_arm_hash_table (info);
9291 BFD_ASSERT (globals != NULL);
9292 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9293
9294 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9295 ARM2THUMB_GLUE_SECTION_NAME);
9296 BFD_ASSERT (s != NULL);
9297 BFD_ASSERT (s->contents != NULL);
9298 BFD_ASSERT (s->output_section != NULL);
9299
9300 sec = eh->export_glue->root.u.def.section;
9301
9302 BFD_ASSERT (sec->output_section != NULL);
9303
9304 val = eh->export_glue->root.u.def.value + sec->output_offset
9305 + sec->output_section->vma;
9306
9307 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9308 h->root.u.def.section->owner,
9309 globals->obfd, sec, val, s,
9310 &error_message);
9311 BFD_ASSERT (myh);
9312 return TRUE;
9313 }
9314
9315 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9316
9317 static bfd_vma
9318 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9319 {
9320 bfd_byte *p;
9321 bfd_vma glue_addr;
9322 asection *s;
9323 struct elf32_arm_link_hash_table *globals;
9324
9325 globals = elf32_arm_hash_table (info);
9326 BFD_ASSERT (globals != NULL);
9327 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9328
9329 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9330 ARM_BX_GLUE_SECTION_NAME);
9331 BFD_ASSERT (s != NULL);
9332 BFD_ASSERT (s->contents != NULL);
9333 BFD_ASSERT (s->output_section != NULL);
9334
9335 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9336
9337 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9338
9339 if ((globals->bx_glue_offset[reg] & 1) == 0)
9340 {
9341 p = s->contents + glue_addr;
9342 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9343 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9344 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9345 globals->bx_glue_offset[reg] |= 1;
9346 }
9347
9348 return glue_addr + s->output_section->vma + s->output_offset;
9349 }
9350
9351 /* Generate Arm stubs for exported Thumb symbols. */
9352 static void
9353 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9354 struct bfd_link_info *link_info)
9355 {
9356 struct elf32_arm_link_hash_table * globals;
9357
9358 if (link_info == NULL)
9359 /* Ignore this if we are not called by the ELF backend linker. */
9360 return;
9361
9362 globals = elf32_arm_hash_table (link_info);
9363 if (globals == NULL)
9364 return;
9365
9366 /* If blx is available then exported Thumb symbols are OK and there is
9367 nothing to do. */
9368 if (globals->use_blx)
9369 return;
9370
9371 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9372 link_info);
9373 }
9374
9375 /* Reserve space for COUNT dynamic relocations in relocation selection
9376 SRELOC. */
9377
9378 static void
9379 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9380 bfd_size_type count)
9381 {
9382 struct elf32_arm_link_hash_table *htab;
9383
9384 htab = elf32_arm_hash_table (info);
9385 BFD_ASSERT (htab->root.dynamic_sections_created);
9386 if (sreloc == NULL)
9387 abort ();
9388 sreloc->size += RELOC_SIZE (htab) * count;
9389 }
9390
9391 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9392 dynamic, the relocations should go in SRELOC, otherwise they should
9393 go in the special .rel.iplt section. */
9394
9395 static void
9396 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9397 bfd_size_type count)
9398 {
9399 struct elf32_arm_link_hash_table *htab;
9400
9401 htab = elf32_arm_hash_table (info);
9402 if (!htab->root.dynamic_sections_created)
9403 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9404 else
9405 {
9406 BFD_ASSERT (sreloc != NULL);
9407 sreloc->size += RELOC_SIZE (htab) * count;
9408 }
9409 }
9410
9411 /* Add relocation REL to the end of relocation section SRELOC. */
9412
9413 static void
9414 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9415 asection *sreloc, Elf_Internal_Rela *rel)
9416 {
9417 bfd_byte *loc;
9418 struct elf32_arm_link_hash_table *htab;
9419
9420 htab = elf32_arm_hash_table (info);
9421 if (!htab->root.dynamic_sections_created
9422 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9423 sreloc = htab->root.irelplt;
9424 if (sreloc == NULL)
9425 abort ();
9426 loc = sreloc->contents;
9427 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9428 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9429 abort ();
9430 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9431 }
9432
9433 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9434 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9435 to .plt. */
9436
9437 static void
9438 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9439 bfd_boolean is_iplt_entry,
9440 union gotplt_union *root_plt,
9441 struct arm_plt_info *arm_plt)
9442 {
9443 struct elf32_arm_link_hash_table *htab;
9444 asection *splt;
9445 asection *sgotplt;
9446
9447 htab = elf32_arm_hash_table (info);
9448
9449 if (is_iplt_entry)
9450 {
9451 splt = htab->root.iplt;
9452 sgotplt = htab->root.igotplt;
9453
9454 /* NaCl uses a special first entry in .iplt too. */
9455 if (htab->nacl_p && splt->size == 0)
9456 splt->size += htab->plt_header_size;
9457
9458 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9459 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9460 }
9461 else
9462 {
9463 splt = htab->root.splt;
9464 sgotplt = htab->root.sgotplt;
9465
9466 if (htab->fdpic_p)
9467 {
9468 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9469 /* For lazy binding, relocations will be put into .rel.plt, in
9470 .rel.got otherwise. */
9471 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9472 if (info->flags & DF_BIND_NOW)
9473 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9474 else
9475 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9476 }
9477 else
9478 {
9479 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9480 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9481 }
9482
9483 /* If this is the first .plt entry, make room for the special
9484 first entry. */
9485 if (splt->size == 0)
9486 splt->size += htab->plt_header_size;
9487
9488 htab->next_tls_desc_index++;
9489 }
9490
9491 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9492 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9493 splt->size += PLT_THUMB_STUB_SIZE;
9494 root_plt->offset = splt->size;
9495 splt->size += htab->plt_entry_size;
9496
9497 if (!htab->symbian_p)
9498 {
9499 /* We also need to make an entry in the .got.plt section, which
9500 will be placed in the .got section by the linker script. */
9501 if (is_iplt_entry)
9502 arm_plt->got_offset = sgotplt->size;
9503 else
9504 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9505 if (htab->fdpic_p)
9506 /* Function descriptor takes 64 bits in GOT. */
9507 sgotplt->size += 8;
9508 else
9509 sgotplt->size += 4;
9510 }
9511 }
9512
9513 static bfd_vma
9514 arm_movw_immediate (bfd_vma value)
9515 {
9516 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9517 }
9518
9519 static bfd_vma
9520 arm_movt_immediate (bfd_vma value)
9521 {
9522 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9523 }
9524
9525 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9526 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9527 Otherwise, DYNINDX is the index of the symbol in the dynamic
9528 symbol table and SYM_VALUE is undefined.
9529
9530 ROOT_PLT points to the offset of the PLT entry from the start of its
9531 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9532 bookkeeping information.
9533
9534 Returns FALSE if there was a problem. */
9535
9536 static bfd_boolean
9537 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9538 union gotplt_union *root_plt,
9539 struct arm_plt_info *arm_plt,
9540 int dynindx, bfd_vma sym_value)
9541 {
9542 struct elf32_arm_link_hash_table *htab;
9543 asection *sgot;
9544 asection *splt;
9545 asection *srel;
9546 bfd_byte *loc;
9547 bfd_vma plt_index;
9548 Elf_Internal_Rela rel;
9549 bfd_vma plt_header_size;
9550 bfd_vma got_header_size;
9551
9552 htab = elf32_arm_hash_table (info);
9553
9554 /* Pick the appropriate sections and sizes. */
9555 if (dynindx == -1)
9556 {
9557 splt = htab->root.iplt;
9558 sgot = htab->root.igotplt;
9559 srel = htab->root.irelplt;
9560
9561 /* There are no reserved entries in .igot.plt, and no special
9562 first entry in .iplt. */
9563 got_header_size = 0;
9564 plt_header_size = 0;
9565 }
9566 else
9567 {
9568 splt = htab->root.splt;
9569 sgot = htab->root.sgotplt;
9570 srel = htab->root.srelplt;
9571
9572 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9573 plt_header_size = htab->plt_header_size;
9574 }
9575 BFD_ASSERT (splt != NULL && srel != NULL);
9576
9577 /* Fill in the entry in the procedure linkage table. */
9578 if (htab->symbian_p)
9579 {
9580 BFD_ASSERT (dynindx >= 0);
9581 put_arm_insn (htab, output_bfd,
9582 elf32_arm_symbian_plt_entry[0],
9583 splt->contents + root_plt->offset);
9584 bfd_put_32 (output_bfd,
9585 elf32_arm_symbian_plt_entry[1],
9586 splt->contents + root_plt->offset + 4);
9587
9588 /* Fill in the entry in the .rel.plt section. */
9589 rel.r_offset = (splt->output_section->vma
9590 + splt->output_offset
9591 + root_plt->offset + 4);
9592 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9593
9594 /* Get the index in the procedure linkage table which
9595 corresponds to this symbol. This is the index of this symbol
9596 in all the symbols for which we are making plt entries. The
9597 first entry in the procedure linkage table is reserved. */
9598 plt_index = ((root_plt->offset - plt_header_size)
9599 / htab->plt_entry_size);
9600 }
9601 else
9602 {
9603 bfd_vma got_offset, got_address, plt_address;
9604 bfd_vma got_displacement, initial_got_entry;
9605 bfd_byte * ptr;
9606
9607 BFD_ASSERT (sgot != NULL);
9608
9609 /* Get the offset into the .(i)got.plt table of the entry that
9610 corresponds to this function. */
9611 got_offset = (arm_plt->got_offset & -2);
9612
9613 /* Get the index in the procedure linkage table which
9614 corresponds to this symbol. This is the index of this symbol
9615 in all the symbols for which we are making plt entries.
9616 After the reserved .got.plt entries, all symbols appear in
9617 the same order as in .plt. */
9618 if (htab->fdpic_p)
9619 /* Function descriptor takes 8 bytes. */
9620 plt_index = (got_offset - got_header_size) / 8;
9621 else
9622 plt_index = (got_offset - got_header_size) / 4;
9623
9624 /* Calculate the address of the GOT entry. */
9625 got_address = (sgot->output_section->vma
9626 + sgot->output_offset
9627 + got_offset);
9628
9629 /* ...and the address of the PLT entry. */
9630 plt_address = (splt->output_section->vma
9631 + splt->output_offset
9632 + root_plt->offset);
9633
9634 ptr = splt->contents + root_plt->offset;
9635 if (htab->vxworks_p && bfd_link_pic (info))
9636 {
9637 unsigned int i;
9638 bfd_vma val;
9639
9640 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9641 {
9642 val = elf32_arm_vxworks_shared_plt_entry[i];
9643 if (i == 2)
9644 val |= got_address - sgot->output_section->vma;
9645 if (i == 5)
9646 val |= plt_index * RELOC_SIZE (htab);
9647 if (i == 2 || i == 5)
9648 bfd_put_32 (output_bfd, val, ptr);
9649 else
9650 put_arm_insn (htab, output_bfd, val, ptr);
9651 }
9652 }
9653 else if (htab->vxworks_p)
9654 {
9655 unsigned int i;
9656 bfd_vma val;
9657
9658 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9659 {
9660 val = elf32_arm_vxworks_exec_plt_entry[i];
9661 if (i == 2)
9662 val |= got_address;
9663 if (i == 4)
9664 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9665 if (i == 5)
9666 val |= plt_index * RELOC_SIZE (htab);
9667 if (i == 2 || i == 5)
9668 bfd_put_32 (output_bfd, val, ptr);
9669 else
9670 put_arm_insn (htab, output_bfd, val, ptr);
9671 }
9672
9673 loc = (htab->srelplt2->contents
9674 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9675
9676 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9677 referencing the GOT for this PLT entry. */
9678 rel.r_offset = plt_address + 8;
9679 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9680 rel.r_addend = got_offset;
9681 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9682 loc += RELOC_SIZE (htab);
9683
9684 /* Create the R_ARM_ABS32 relocation referencing the
9685 beginning of the PLT for this GOT entry. */
9686 rel.r_offset = got_address;
9687 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9688 rel.r_addend = 0;
9689 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9690 }
9691 else if (htab->nacl_p)
9692 {
9693 /* Calculate the displacement between the PLT slot and the
9694 common tail that's part of the special initial PLT slot. */
9695 int32_t tail_displacement
9696 = ((splt->output_section->vma + splt->output_offset
9697 + ARM_NACL_PLT_TAIL_OFFSET)
9698 - (plt_address + htab->plt_entry_size + 4));
9699 BFD_ASSERT ((tail_displacement & 3) == 0);
9700 tail_displacement >>= 2;
9701
9702 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9703 || (-tail_displacement & 0xff000000) == 0);
9704
9705 /* Calculate the displacement between the PLT slot and the entry
9706 in the GOT. The offset accounts for the value produced by
9707 adding to pc in the penultimate instruction of the PLT stub. */
9708 got_displacement = (got_address
9709 - (plt_address + htab->plt_entry_size));
9710
9711 /* NaCl does not support interworking at all. */
9712 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9713
9714 put_arm_insn (htab, output_bfd,
9715 elf32_arm_nacl_plt_entry[0]
9716 | arm_movw_immediate (got_displacement),
9717 ptr + 0);
9718 put_arm_insn (htab, output_bfd,
9719 elf32_arm_nacl_plt_entry[1]
9720 | arm_movt_immediate (got_displacement),
9721 ptr + 4);
9722 put_arm_insn (htab, output_bfd,
9723 elf32_arm_nacl_plt_entry[2],
9724 ptr + 8);
9725 put_arm_insn (htab, output_bfd,
9726 elf32_arm_nacl_plt_entry[3]
9727 | (tail_displacement & 0x00ffffff),
9728 ptr + 12);
9729 }
9730 else if (htab->fdpic_p)
9731 {
9732 /* Fill-up Thumb stub if needed. */
9733 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9734 {
9735 put_thumb_insn (htab, output_bfd,
9736 elf32_arm_plt_thumb_stub[0], ptr - 4);
9737 put_thumb_insn (htab, output_bfd,
9738 elf32_arm_plt_thumb_stub[1], ptr - 2);
9739 }
9740 put_arm_insn(htab, output_bfd,
9741 elf32_arm_fdpic_plt_entry[0], ptr + 0);
9742 put_arm_insn(htab, output_bfd,
9743 elf32_arm_fdpic_plt_entry[1], ptr + 4);
9744 put_arm_insn(htab, output_bfd,
9745 elf32_arm_fdpic_plt_entry[2], ptr + 8);
9746 put_arm_insn(htab, output_bfd,
9747 elf32_arm_fdpic_plt_entry[3], ptr + 12);
9748 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9749
9750 if (!(info->flags & DF_BIND_NOW))
9751 {
9752 /* funcdesc_value_reloc_offset. */
9753 bfd_put_32 (output_bfd,
9754 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9755 ptr + 20);
9756 put_arm_insn(htab, output_bfd,
9757 elf32_arm_fdpic_plt_entry[6], ptr + 24);
9758 put_arm_insn(htab, output_bfd,
9759 elf32_arm_fdpic_plt_entry[7], ptr + 28);
9760 put_arm_insn(htab, output_bfd,
9761 elf32_arm_fdpic_plt_entry[8], ptr + 32);
9762 put_arm_insn(htab, output_bfd,
9763 elf32_arm_fdpic_plt_entry[9], ptr + 36);
9764 }
9765 }
9766 else if (using_thumb_only (htab))
9767 {
9768 /* PR ld/16017: Generate thumb only PLT entries. */
9769 if (!using_thumb2 (htab))
9770 {
9771 /* FIXME: We ought to be able to generate thumb-1 PLT
9772 instructions... */
9773 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9774 output_bfd);
9775 return FALSE;
9776 }
9777
9778 /* Calculate the displacement between the PLT slot and the entry in
9779 the GOT. The 12-byte offset accounts for the value produced by
9780 adding to pc in the 3rd instruction of the PLT stub. */
9781 got_displacement = got_address - (plt_address + 12);
9782
9783 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9784 instead of 'put_thumb_insn'. */
9785 put_arm_insn (htab, output_bfd,
9786 elf32_thumb2_plt_entry[0]
9787 | ((got_displacement & 0x000000ff) << 16)
9788 | ((got_displacement & 0x00000700) << 20)
9789 | ((got_displacement & 0x00000800) >> 1)
9790 | ((got_displacement & 0x0000f000) >> 12),
9791 ptr + 0);
9792 put_arm_insn (htab, output_bfd,
9793 elf32_thumb2_plt_entry[1]
9794 | ((got_displacement & 0x00ff0000) )
9795 | ((got_displacement & 0x07000000) << 4)
9796 | ((got_displacement & 0x08000000) >> 17)
9797 | ((got_displacement & 0xf0000000) >> 28),
9798 ptr + 4);
9799 put_arm_insn (htab, output_bfd,
9800 elf32_thumb2_plt_entry[2],
9801 ptr + 8);
9802 put_arm_insn (htab, output_bfd,
9803 elf32_thumb2_plt_entry[3],
9804 ptr + 12);
9805 }
9806 else
9807 {
9808 /* Calculate the displacement between the PLT slot and the
9809 entry in the GOT. The eight-byte offset accounts for the
9810 value produced by adding to pc in the first instruction
9811 of the PLT stub. */
9812 got_displacement = got_address - (plt_address + 8);
9813
9814 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9815 {
9816 put_thumb_insn (htab, output_bfd,
9817 elf32_arm_plt_thumb_stub[0], ptr - 4);
9818 put_thumb_insn (htab, output_bfd,
9819 elf32_arm_plt_thumb_stub[1], ptr - 2);
9820 }
9821
9822 if (!elf32_arm_use_long_plt_entry)
9823 {
9824 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9825
9826 put_arm_insn (htab, output_bfd,
9827 elf32_arm_plt_entry_short[0]
9828 | ((got_displacement & 0x0ff00000) >> 20),
9829 ptr + 0);
9830 put_arm_insn (htab, output_bfd,
9831 elf32_arm_plt_entry_short[1]
9832 | ((got_displacement & 0x000ff000) >> 12),
9833 ptr+ 4);
9834 put_arm_insn (htab, output_bfd,
9835 elf32_arm_plt_entry_short[2]
9836 | (got_displacement & 0x00000fff),
9837 ptr + 8);
9838 #ifdef FOUR_WORD_PLT
9839 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9840 #endif
9841 }
9842 else
9843 {
9844 put_arm_insn (htab, output_bfd,
9845 elf32_arm_plt_entry_long[0]
9846 | ((got_displacement & 0xf0000000) >> 28),
9847 ptr + 0);
9848 put_arm_insn (htab, output_bfd,
9849 elf32_arm_plt_entry_long[1]
9850 | ((got_displacement & 0x0ff00000) >> 20),
9851 ptr + 4);
9852 put_arm_insn (htab, output_bfd,
9853 elf32_arm_plt_entry_long[2]
9854 | ((got_displacement & 0x000ff000) >> 12),
9855 ptr+ 8);
9856 put_arm_insn (htab, output_bfd,
9857 elf32_arm_plt_entry_long[3]
9858 | (got_displacement & 0x00000fff),
9859 ptr + 12);
9860 }
9861 }
9862
9863 /* Fill in the entry in the .rel(a).(i)plt section. */
9864 rel.r_offset = got_address;
9865 rel.r_addend = 0;
9866 if (dynindx == -1)
9867 {
9868 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9869 The dynamic linker or static executable then calls SYM_VALUE
9870 to determine the correct run-time value of the .igot.plt entry. */
9871 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9872 initial_got_entry = sym_value;
9873 }
9874 else
9875 {
9876 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9877 used by PLT entry. */
9878 if (htab->fdpic_p)
9879 {
9880 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9881 initial_got_entry = 0;
9882 }
9883 else
9884 {
9885 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9886 initial_got_entry = (splt->output_section->vma
9887 + splt->output_offset);
9888 }
9889 }
9890
9891 /* Fill in the entry in the global offset table. */
9892 bfd_put_32 (output_bfd, initial_got_entry,
9893 sgot->contents + got_offset);
9894
9895 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9896 {
9897 /* Setup initial funcdesc value. */
9898 /* FIXME: we don't support lazy binding because there is a
9899 race condition between both words getting written and
9900 some other thread attempting to read them. The ARM
9901 architecture does not have an atomic 64 bit load/store
9902 instruction that could be used to prevent it; it is
9903 recommended that threaded FDPIC applications run with the
9904 LD_BIND_NOW environment variable set. */
9905 bfd_put_32(output_bfd, plt_address + 0x18,
9906 sgot->contents + got_offset);
9907 bfd_put_32(output_bfd, -1 /*TODO*/,
9908 sgot->contents + got_offset + 4);
9909 }
9910 }
9911
9912 if (dynindx == -1)
9913 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9914 else
9915 {
9916 if (htab->fdpic_p)
9917 {
9918 /* For FDPIC we put PLT relocationss into .rel.got when not
9919 lazy binding otherwise we put them in .rel.plt. For now,
9920 we don't support lazy binding so put it in .rel.got. */
9921 if (info->flags & DF_BIND_NOW)
9922 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
9923 else
9924 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
9925 }
9926 else
9927 {
9928 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9929 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9930 }
9931 }
9932
9933 return TRUE;
9934 }
9935
9936 /* Some relocations map to different relocations depending on the
9937 target. Return the real relocation. */
9938
9939 static int
9940 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9941 int r_type)
9942 {
9943 switch (r_type)
9944 {
9945 case R_ARM_TARGET1:
9946 if (globals->target1_is_rel)
9947 return R_ARM_REL32;
9948 else
9949 return R_ARM_ABS32;
9950
9951 case R_ARM_TARGET2:
9952 return globals->target2_reloc;
9953
9954 default:
9955 return r_type;
9956 }
9957 }
9958
9959 /* Return the base VMA address which should be subtracted from real addresses
9960 when resolving @dtpoff relocation.
9961 This is PT_TLS segment p_vaddr. */
9962
9963 static bfd_vma
9964 dtpoff_base (struct bfd_link_info *info)
9965 {
9966 /* If tls_sec is NULL, we should have signalled an error already. */
9967 if (elf_hash_table (info)->tls_sec == NULL)
9968 return 0;
9969 return elf_hash_table (info)->tls_sec->vma;
9970 }
9971
9972 /* Return the relocation value for @tpoff relocation
9973 if STT_TLS virtual address is ADDRESS. */
9974
9975 static bfd_vma
9976 tpoff (struct bfd_link_info *info, bfd_vma address)
9977 {
9978 struct elf_link_hash_table *htab = elf_hash_table (info);
9979 bfd_vma base;
9980
9981 /* If tls_sec is NULL, we should have signalled an error already. */
9982 if (htab->tls_sec == NULL)
9983 return 0;
9984 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9985 return address - htab->tls_sec->vma + base;
9986 }
9987
9988 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9989 VALUE is the relocation value. */
9990
9991 static bfd_reloc_status_type
9992 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9993 {
9994 if (value > 0xfff)
9995 return bfd_reloc_overflow;
9996
9997 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9998 bfd_put_32 (abfd, value, data);
9999 return bfd_reloc_ok;
10000 }
10001
10002 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10003 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10004 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10005
10006 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10007 is to then call final_link_relocate. Return other values in the
10008 case of error.
10009
10010 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10011 the pre-relaxed code. It would be nice if the relocs were updated
10012 to match the optimization. */
10013
10014 static bfd_reloc_status_type
10015 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10016 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10017 Elf_Internal_Rela *rel, unsigned long is_local)
10018 {
10019 unsigned long insn;
10020
10021 switch (ELF32_R_TYPE (rel->r_info))
10022 {
10023 default:
10024 return bfd_reloc_notsupported;
10025
10026 case R_ARM_TLS_GOTDESC:
10027 if (is_local)
10028 insn = 0;
10029 else
10030 {
10031 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10032 if (insn & 1)
10033 insn -= 5; /* THUMB */
10034 else
10035 insn -= 8; /* ARM */
10036 }
10037 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10038 return bfd_reloc_continue;
10039
10040 case R_ARM_THM_TLS_DESCSEQ:
10041 /* Thumb insn. */
10042 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10043 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10044 {
10045 if (is_local)
10046 /* nop */
10047 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10048 }
10049 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10050 {
10051 if (is_local)
10052 /* nop */
10053 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10054 else
10055 /* ldr rx,[ry] */
10056 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10057 }
10058 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10059 {
10060 if (is_local)
10061 /* nop */
10062 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10063 else
10064 /* mov r0, rx */
10065 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10066 contents + rel->r_offset);
10067 }
10068 else
10069 {
10070 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10071 /* It's a 32 bit instruction, fetch the rest of it for
10072 error generation. */
10073 insn = (insn << 16)
10074 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10075 _bfd_error_handler
10076 /* xgettext:c-format */
10077 (_("%pB(%pA+%#" PRIx64 "): "
10078 "unexpected %s instruction '%#lx' in TLS trampoline"),
10079 input_bfd, input_sec, (uint64_t) rel->r_offset,
10080 "Thumb", insn);
10081 return bfd_reloc_notsupported;
10082 }
10083 break;
10084
10085 case R_ARM_TLS_DESCSEQ:
10086 /* arm insn. */
10087 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10088 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10089 {
10090 if (is_local)
10091 /* mov rx, ry */
10092 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10093 contents + rel->r_offset);
10094 }
10095 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10096 {
10097 if (is_local)
10098 /* nop */
10099 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10100 else
10101 /* ldr rx,[ry] */
10102 bfd_put_32 (input_bfd, insn & 0xfffff000,
10103 contents + rel->r_offset);
10104 }
10105 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10106 {
10107 if (is_local)
10108 /* nop */
10109 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10110 else
10111 /* mov r0, rx */
10112 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10113 contents + rel->r_offset);
10114 }
10115 else
10116 {
10117 _bfd_error_handler
10118 /* xgettext:c-format */
10119 (_("%pB(%pA+%#" PRIx64 "): "
10120 "unexpected %s instruction '%#lx' in TLS trampoline"),
10121 input_bfd, input_sec, (uint64_t) rel->r_offset,
10122 "ARM", insn);
10123 return bfd_reloc_notsupported;
10124 }
10125 break;
10126
10127 case R_ARM_TLS_CALL:
10128 /* GD->IE relaxation, turn the instruction into 'nop' or
10129 'ldr r0, [pc,r0]' */
10130 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10131 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10132 break;
10133
10134 case R_ARM_THM_TLS_CALL:
10135 /* GD->IE relaxation. */
10136 if (!is_local)
10137 /* add r0,pc; ldr r0, [r0] */
10138 insn = 0x44786800;
10139 else if (using_thumb2 (globals))
10140 /* nop.w */
10141 insn = 0xf3af8000;
10142 else
10143 /* nop; nop */
10144 insn = 0xbf00bf00;
10145
10146 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10147 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10148 break;
10149 }
10150 return bfd_reloc_ok;
10151 }
10152
10153 /* For a given value of n, calculate the value of G_n as required to
10154 deal with group relocations. We return it in the form of an
10155 encoded constant-and-rotation, together with the final residual. If n is
10156 specified as less than zero, then final_residual is filled with the
10157 input value and no further action is performed. */
10158
10159 static bfd_vma
10160 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10161 {
10162 int current_n;
10163 bfd_vma g_n;
10164 bfd_vma encoded_g_n = 0;
10165 bfd_vma residual = value; /* Also known as Y_n. */
10166
10167 for (current_n = 0; current_n <= n; current_n++)
10168 {
10169 int shift;
10170
10171 /* Calculate which part of the value to mask. */
10172 if (residual == 0)
10173 shift = 0;
10174 else
10175 {
10176 int msb;
10177
10178 /* Determine the most significant bit in the residual and
10179 align the resulting value to a 2-bit boundary. */
10180 for (msb = 30; msb >= 0; msb -= 2)
10181 if (residual & (3 << msb))
10182 break;
10183
10184 /* The desired shift is now (msb - 6), or zero, whichever
10185 is the greater. */
10186 shift = msb - 6;
10187 if (shift < 0)
10188 shift = 0;
10189 }
10190
10191 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10192 g_n = residual & (0xff << shift);
10193 encoded_g_n = (g_n >> shift)
10194 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10195
10196 /* Calculate the residual for the next time around. */
10197 residual &= ~g_n;
10198 }
10199
10200 *final_residual = residual;
10201
10202 return encoded_g_n;
10203 }
10204
10205 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10206 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10207
10208 static int
10209 identify_add_or_sub (bfd_vma insn)
10210 {
10211 int opcode = insn & 0x1e00000;
10212
10213 if (opcode == 1 << 23) /* ADD */
10214 return 1;
10215
10216 if (opcode == 1 << 22) /* SUB */
10217 return -1;
10218
10219 return 0;
10220 }
10221
10222 /* Perform a relocation as part of a final link. */
10223
10224 static bfd_reloc_status_type
10225 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10226 bfd * input_bfd,
10227 bfd * output_bfd,
10228 asection * input_section,
10229 bfd_byte * contents,
10230 Elf_Internal_Rela * rel,
10231 bfd_vma value,
10232 struct bfd_link_info * info,
10233 asection * sym_sec,
10234 const char * sym_name,
10235 unsigned char st_type,
10236 enum arm_st_branch_type branch_type,
10237 struct elf_link_hash_entry * h,
10238 bfd_boolean * unresolved_reloc_p,
10239 char ** error_message)
10240 {
10241 unsigned long r_type = howto->type;
10242 unsigned long r_symndx;
10243 bfd_byte * hit_data = contents + rel->r_offset;
10244 bfd_vma * local_got_offsets;
10245 bfd_vma * local_tlsdesc_gotents;
10246 asection * sgot;
10247 asection * splt;
10248 asection * sreloc = NULL;
10249 asection * srelgot;
10250 bfd_vma addend;
10251 bfd_signed_vma signed_addend;
10252 unsigned char dynreloc_st_type;
10253 bfd_vma dynreloc_value;
10254 struct elf32_arm_link_hash_table * globals;
10255 struct elf32_arm_link_hash_entry *eh;
10256 union gotplt_union *root_plt;
10257 struct arm_plt_info *arm_plt;
10258 bfd_vma plt_offset;
10259 bfd_vma gotplt_offset;
10260 bfd_boolean has_iplt_entry;
10261 bfd_boolean resolved_to_zero;
10262
10263 globals = elf32_arm_hash_table (info);
10264 if (globals == NULL)
10265 return bfd_reloc_notsupported;
10266
10267 BFD_ASSERT (is_arm_elf (input_bfd));
10268 BFD_ASSERT (howto != NULL);
10269
10270 /* Some relocation types map to different relocations depending on the
10271 target. We pick the right one here. */
10272 r_type = arm_real_reloc_type (globals, r_type);
10273
10274 /* It is possible to have linker relaxations on some TLS access
10275 models. Update our information here. */
10276 r_type = elf32_arm_tls_transition (info, r_type, h);
10277
10278 if (r_type != howto->type)
10279 howto = elf32_arm_howto_from_type (r_type);
10280
10281 eh = (struct elf32_arm_link_hash_entry *) h;
10282 sgot = globals->root.sgot;
10283 local_got_offsets = elf_local_got_offsets (input_bfd);
10284 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10285
10286 if (globals->root.dynamic_sections_created)
10287 srelgot = globals->root.srelgot;
10288 else
10289 srelgot = NULL;
10290
10291 r_symndx = ELF32_R_SYM (rel->r_info);
10292
10293 if (globals->use_rel)
10294 {
10295 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10296
10297 if (addend & ((howto->src_mask + 1) >> 1))
10298 {
10299 signed_addend = -1;
10300 signed_addend &= ~ howto->src_mask;
10301 signed_addend |= addend;
10302 }
10303 else
10304 signed_addend = addend;
10305 }
10306 else
10307 addend = signed_addend = rel->r_addend;
10308
10309 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10310 are resolving a function call relocation. */
10311 if (using_thumb_only (globals)
10312 && (r_type == R_ARM_THM_CALL
10313 || r_type == R_ARM_THM_JUMP24)
10314 && branch_type == ST_BRANCH_TO_ARM)
10315 branch_type = ST_BRANCH_TO_THUMB;
10316
10317 /* Record the symbol information that should be used in dynamic
10318 relocations. */
10319 dynreloc_st_type = st_type;
10320 dynreloc_value = value;
10321 if (branch_type == ST_BRANCH_TO_THUMB)
10322 dynreloc_value |= 1;
10323
10324 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10325 VALUE appropriately for relocations that we resolve at link time. */
10326 has_iplt_entry = FALSE;
10327 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10328 &arm_plt)
10329 && root_plt->offset != (bfd_vma) -1)
10330 {
10331 plt_offset = root_plt->offset;
10332 gotplt_offset = arm_plt->got_offset;
10333
10334 if (h == NULL || eh->is_iplt)
10335 {
10336 has_iplt_entry = TRUE;
10337 splt = globals->root.iplt;
10338
10339 /* Populate .iplt entries here, because not all of them will
10340 be seen by finish_dynamic_symbol. The lower bit is set if
10341 we have already populated the entry. */
10342 if (plt_offset & 1)
10343 plt_offset--;
10344 else
10345 {
10346 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10347 -1, dynreloc_value))
10348 root_plt->offset |= 1;
10349 else
10350 return bfd_reloc_notsupported;
10351 }
10352
10353 /* Static relocations always resolve to the .iplt entry. */
10354 st_type = STT_FUNC;
10355 value = (splt->output_section->vma
10356 + splt->output_offset
10357 + plt_offset);
10358 branch_type = ST_BRANCH_TO_ARM;
10359
10360 /* If there are non-call relocations that resolve to the .iplt
10361 entry, then all dynamic ones must too. */
10362 if (arm_plt->noncall_refcount != 0)
10363 {
10364 dynreloc_st_type = st_type;
10365 dynreloc_value = value;
10366 }
10367 }
10368 else
10369 /* We populate the .plt entry in finish_dynamic_symbol. */
10370 splt = globals->root.splt;
10371 }
10372 else
10373 {
10374 splt = NULL;
10375 plt_offset = (bfd_vma) -1;
10376 gotplt_offset = (bfd_vma) -1;
10377 }
10378
10379 resolved_to_zero = (h != NULL
10380 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10381
10382 switch (r_type)
10383 {
10384 case R_ARM_NONE:
10385 /* We don't need to find a value for this symbol. It's just a
10386 marker. */
10387 *unresolved_reloc_p = FALSE;
10388 return bfd_reloc_ok;
10389
10390 case R_ARM_ABS12:
10391 if (!globals->vxworks_p)
10392 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10393 /* Fall through. */
10394
10395 case R_ARM_PC24:
10396 case R_ARM_ABS32:
10397 case R_ARM_ABS32_NOI:
10398 case R_ARM_REL32:
10399 case R_ARM_REL32_NOI:
10400 case R_ARM_CALL:
10401 case R_ARM_JUMP24:
10402 case R_ARM_XPC25:
10403 case R_ARM_PREL31:
10404 case R_ARM_PLT32:
10405 /* Handle relocations which should use the PLT entry. ABS32/REL32
10406 will use the symbol's value, which may point to a PLT entry, but we
10407 don't need to handle that here. If we created a PLT entry, all
10408 branches in this object should go to it, except if the PLT is too
10409 far away, in which case a long branch stub should be inserted. */
10410 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10411 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10412 && r_type != R_ARM_CALL
10413 && r_type != R_ARM_JUMP24
10414 && r_type != R_ARM_PLT32)
10415 && plt_offset != (bfd_vma) -1)
10416 {
10417 /* If we've created a .plt section, and assigned a PLT entry
10418 to this function, it must either be a STT_GNU_IFUNC reference
10419 or not be known to bind locally. In other cases, we should
10420 have cleared the PLT entry by now. */
10421 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10422
10423 value = (splt->output_section->vma
10424 + splt->output_offset
10425 + plt_offset);
10426 *unresolved_reloc_p = FALSE;
10427 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10428 contents, rel->r_offset, value,
10429 rel->r_addend);
10430 }
10431
10432 /* When generating a shared object or relocatable executable, these
10433 relocations are copied into the output file to be resolved at
10434 run time. */
10435 if ((bfd_link_pic (info)
10436 || globals->root.is_relocatable_executable
10437 || globals->fdpic_p)
10438 && (input_section->flags & SEC_ALLOC)
10439 && !(globals->vxworks_p
10440 && strcmp (input_section->output_section->name,
10441 ".tls_vars") == 0)
10442 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10443 || !SYMBOL_CALLS_LOCAL (info, h))
10444 && !(input_bfd == globals->stub_bfd
10445 && strstr (input_section->name, STUB_SUFFIX))
10446 && (h == NULL
10447 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10448 && !resolved_to_zero)
10449 || h->root.type != bfd_link_hash_undefweak)
10450 && r_type != R_ARM_PC24
10451 && r_type != R_ARM_CALL
10452 && r_type != R_ARM_JUMP24
10453 && r_type != R_ARM_PREL31
10454 && r_type != R_ARM_PLT32)
10455 {
10456 Elf_Internal_Rela outrel;
10457 bfd_boolean skip, relocate;
10458 int isrofixup = 0;
10459
10460 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10461 && !h->def_regular)
10462 {
10463 char *v = _("shared object");
10464
10465 if (bfd_link_executable (info))
10466 v = _("PIE executable");
10467
10468 _bfd_error_handler
10469 (_("%pB: relocation %s against external or undefined symbol `%s'"
10470 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10471 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10472 return bfd_reloc_notsupported;
10473 }
10474
10475 *unresolved_reloc_p = FALSE;
10476
10477 if (sreloc == NULL && globals->root.dynamic_sections_created)
10478 {
10479 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10480 ! globals->use_rel);
10481
10482 if (sreloc == NULL)
10483 return bfd_reloc_notsupported;
10484 }
10485
10486 skip = FALSE;
10487 relocate = FALSE;
10488
10489 outrel.r_addend = addend;
10490 outrel.r_offset =
10491 _bfd_elf_section_offset (output_bfd, info, input_section,
10492 rel->r_offset);
10493 if (outrel.r_offset == (bfd_vma) -1)
10494 skip = TRUE;
10495 else if (outrel.r_offset == (bfd_vma) -2)
10496 skip = TRUE, relocate = TRUE;
10497 outrel.r_offset += (input_section->output_section->vma
10498 + input_section->output_offset);
10499
10500 if (skip)
10501 memset (&outrel, 0, sizeof outrel);
10502 else if (h != NULL
10503 && h->dynindx != -1
10504 && (!bfd_link_pic (info)
10505 || !(bfd_link_pie (info)
10506 || SYMBOLIC_BIND (info, h))
10507 || !h->def_regular))
10508 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10509 else
10510 {
10511 int symbol;
10512
10513 /* This symbol is local, or marked to become local. */
10514 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10515 || (globals->fdpic_p && !bfd_link_pic(info)));
10516 if (globals->symbian_p)
10517 {
10518 asection *osec;
10519
10520 /* On Symbian OS, the data segment and text segement
10521 can be relocated independently. Therefore, we
10522 must indicate the segment to which this
10523 relocation is relative. The BPABI allows us to
10524 use any symbol in the right segment; we just use
10525 the section symbol as it is convenient. (We
10526 cannot use the symbol given by "h" directly as it
10527 will not appear in the dynamic symbol table.)
10528
10529 Note that the dynamic linker ignores the section
10530 symbol value, so we don't subtract osec->vma
10531 from the emitted reloc addend. */
10532 if (sym_sec)
10533 osec = sym_sec->output_section;
10534 else
10535 osec = input_section->output_section;
10536 symbol = elf_section_data (osec)->dynindx;
10537 if (symbol == 0)
10538 {
10539 struct elf_link_hash_table *htab = elf_hash_table (info);
10540
10541 if ((osec->flags & SEC_READONLY) == 0
10542 && htab->data_index_section != NULL)
10543 osec = htab->data_index_section;
10544 else
10545 osec = htab->text_index_section;
10546 symbol = elf_section_data (osec)->dynindx;
10547 }
10548 BFD_ASSERT (symbol != 0);
10549 }
10550 else
10551 /* On SVR4-ish systems, the dynamic loader cannot
10552 relocate the text and data segments independently,
10553 so the symbol does not matter. */
10554 symbol = 0;
10555 if (dynreloc_st_type == STT_GNU_IFUNC)
10556 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10557 to the .iplt entry. Instead, every non-call reference
10558 must use an R_ARM_IRELATIVE relocation to obtain the
10559 correct run-time address. */
10560 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10561 else if (globals->fdpic_p && !bfd_link_pic(info))
10562 isrofixup = 1;
10563 else
10564 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10565 if (globals->use_rel)
10566 relocate = TRUE;
10567 else
10568 outrel.r_addend += dynreloc_value;
10569 }
10570
10571 if (isrofixup)
10572 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10573 else
10574 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10575
10576 /* If this reloc is against an external symbol, we do not want to
10577 fiddle with the addend. Otherwise, we need to include the symbol
10578 value so that it becomes an addend for the dynamic reloc. */
10579 if (! relocate)
10580 return bfd_reloc_ok;
10581
10582 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10583 contents, rel->r_offset,
10584 dynreloc_value, (bfd_vma) 0);
10585 }
10586 else switch (r_type)
10587 {
10588 case R_ARM_ABS12:
10589 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10590
10591 case R_ARM_XPC25: /* Arm BLX instruction. */
10592 case R_ARM_CALL:
10593 case R_ARM_JUMP24:
10594 case R_ARM_PC24: /* Arm B/BL instruction. */
10595 case R_ARM_PLT32:
10596 {
10597 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10598
10599 if (r_type == R_ARM_XPC25)
10600 {
10601 /* Check for Arm calling Arm function. */
10602 /* FIXME: Should we translate the instruction into a BL
10603 instruction instead ? */
10604 if (branch_type != ST_BRANCH_TO_THUMB)
10605 _bfd_error_handler
10606 (_("\%pB: warning: %s BLX instruction targets"
10607 " %s function '%s'"),
10608 input_bfd, "ARM",
10609 "ARM", h ? h->root.root.string : "(local)");
10610 }
10611 else if (r_type == R_ARM_PC24)
10612 {
10613 /* Check for Arm calling Thumb function. */
10614 if (branch_type == ST_BRANCH_TO_THUMB)
10615 {
10616 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10617 output_bfd, input_section,
10618 hit_data, sym_sec, rel->r_offset,
10619 signed_addend, value,
10620 error_message))
10621 return bfd_reloc_ok;
10622 else
10623 return bfd_reloc_dangerous;
10624 }
10625 }
10626
10627 /* Check if a stub has to be inserted because the
10628 destination is too far or we are changing mode. */
10629 if ( r_type == R_ARM_CALL
10630 || r_type == R_ARM_JUMP24
10631 || r_type == R_ARM_PLT32)
10632 {
10633 enum elf32_arm_stub_type stub_type = arm_stub_none;
10634 struct elf32_arm_link_hash_entry *hash;
10635
10636 hash = (struct elf32_arm_link_hash_entry *) h;
10637 stub_type = arm_type_of_stub (info, input_section, rel,
10638 st_type, &branch_type,
10639 hash, value, sym_sec,
10640 input_bfd, sym_name);
10641
10642 if (stub_type != arm_stub_none)
10643 {
10644 /* The target is out of reach, so redirect the
10645 branch to the local stub for this function. */
10646 stub_entry = elf32_arm_get_stub_entry (input_section,
10647 sym_sec, h,
10648 rel, globals,
10649 stub_type);
10650 {
10651 if (stub_entry != NULL)
10652 value = (stub_entry->stub_offset
10653 + stub_entry->stub_sec->output_offset
10654 + stub_entry->stub_sec->output_section->vma);
10655
10656 if (plt_offset != (bfd_vma) -1)
10657 *unresolved_reloc_p = FALSE;
10658 }
10659 }
10660 else
10661 {
10662 /* If the call goes through a PLT entry, make sure to
10663 check distance to the right destination address. */
10664 if (plt_offset != (bfd_vma) -1)
10665 {
10666 value = (splt->output_section->vma
10667 + splt->output_offset
10668 + plt_offset);
10669 *unresolved_reloc_p = FALSE;
10670 /* The PLT entry is in ARM mode, regardless of the
10671 target function. */
10672 branch_type = ST_BRANCH_TO_ARM;
10673 }
10674 }
10675 }
10676
10677 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10678 where:
10679 S is the address of the symbol in the relocation.
10680 P is address of the instruction being relocated.
10681 A is the addend (extracted from the instruction) in bytes.
10682
10683 S is held in 'value'.
10684 P is the base address of the section containing the
10685 instruction plus the offset of the reloc into that
10686 section, ie:
10687 (input_section->output_section->vma +
10688 input_section->output_offset +
10689 rel->r_offset).
10690 A is the addend, converted into bytes, ie:
10691 (signed_addend * 4)
10692
10693 Note: None of these operations have knowledge of the pipeline
10694 size of the processor, thus it is up to the assembler to
10695 encode this information into the addend. */
10696 value -= (input_section->output_section->vma
10697 + input_section->output_offset);
10698 value -= rel->r_offset;
10699 if (globals->use_rel)
10700 value += (signed_addend << howto->size);
10701 else
10702 /* RELA addends do not have to be adjusted by howto->size. */
10703 value += signed_addend;
10704
10705 signed_addend = value;
10706 signed_addend >>= howto->rightshift;
10707
10708 /* A branch to an undefined weak symbol is turned into a jump to
10709 the next instruction unless a PLT entry will be created.
10710 Do the same for local undefined symbols (but not for STN_UNDEF).
10711 The jump to the next instruction is optimized as a NOP depending
10712 on the architecture. */
10713 if (h ? (h->root.type == bfd_link_hash_undefweak
10714 && plt_offset == (bfd_vma) -1)
10715 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10716 {
10717 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10718
10719 if (arch_has_arm_nop (globals))
10720 value |= 0x0320f000;
10721 else
10722 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10723 }
10724 else
10725 {
10726 /* Perform a signed range check. */
10727 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10728 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10729 return bfd_reloc_overflow;
10730
10731 addend = (value & 2);
10732
10733 value = (signed_addend & howto->dst_mask)
10734 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10735
10736 if (r_type == R_ARM_CALL)
10737 {
10738 /* Set the H bit in the BLX instruction. */
10739 if (branch_type == ST_BRANCH_TO_THUMB)
10740 {
10741 if (addend)
10742 value |= (1 << 24);
10743 else
10744 value &= ~(bfd_vma)(1 << 24);
10745 }
10746
10747 /* Select the correct instruction (BL or BLX). */
10748 /* Only if we are not handling a BL to a stub. In this
10749 case, mode switching is performed by the stub. */
10750 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10751 value |= (1 << 28);
10752 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10753 {
10754 value &= ~(bfd_vma)(1 << 28);
10755 value |= (1 << 24);
10756 }
10757 }
10758 }
10759 }
10760 break;
10761
10762 case R_ARM_ABS32:
10763 value += addend;
10764 if (branch_type == ST_BRANCH_TO_THUMB)
10765 value |= 1;
10766 break;
10767
10768 case R_ARM_ABS32_NOI:
10769 value += addend;
10770 break;
10771
10772 case R_ARM_REL32:
10773 value += addend;
10774 if (branch_type == ST_BRANCH_TO_THUMB)
10775 value |= 1;
10776 value -= (input_section->output_section->vma
10777 + input_section->output_offset + rel->r_offset);
10778 break;
10779
10780 case R_ARM_REL32_NOI:
10781 value += addend;
10782 value -= (input_section->output_section->vma
10783 + input_section->output_offset + rel->r_offset);
10784 break;
10785
10786 case R_ARM_PREL31:
10787 value -= (input_section->output_section->vma
10788 + input_section->output_offset + rel->r_offset);
10789 value += signed_addend;
10790 if (! h || h->root.type != bfd_link_hash_undefweak)
10791 {
10792 /* Check for overflow. */
10793 if ((value ^ (value >> 1)) & (1 << 30))
10794 return bfd_reloc_overflow;
10795 }
10796 value &= 0x7fffffff;
10797 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10798 if (branch_type == ST_BRANCH_TO_THUMB)
10799 value |= 1;
10800 break;
10801 }
10802
10803 bfd_put_32 (input_bfd, value, hit_data);
10804 return bfd_reloc_ok;
10805
10806 case R_ARM_ABS8:
10807 /* PR 16202: Refectch the addend using the correct size. */
10808 if (globals->use_rel)
10809 addend = bfd_get_8 (input_bfd, hit_data);
10810 value += addend;
10811
10812 /* There is no way to tell whether the user intended to use a signed or
10813 unsigned addend. When checking for overflow we accept either,
10814 as specified by the AAELF. */
10815 if ((long) value > 0xff || (long) value < -0x80)
10816 return bfd_reloc_overflow;
10817
10818 bfd_put_8 (input_bfd, value, hit_data);
10819 return bfd_reloc_ok;
10820
10821 case R_ARM_ABS16:
10822 /* PR 16202: Refectch the addend using the correct size. */
10823 if (globals->use_rel)
10824 addend = bfd_get_16 (input_bfd, hit_data);
10825 value += addend;
10826
10827 /* See comment for R_ARM_ABS8. */
10828 if ((long) value > 0xffff || (long) value < -0x8000)
10829 return bfd_reloc_overflow;
10830
10831 bfd_put_16 (input_bfd, value, hit_data);
10832 return bfd_reloc_ok;
10833
10834 case R_ARM_THM_ABS5:
10835 /* Support ldr and str instructions for the thumb. */
10836 if (globals->use_rel)
10837 {
10838 /* Need to refetch addend. */
10839 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10840 /* ??? Need to determine shift amount from operand size. */
10841 addend >>= howto->rightshift;
10842 }
10843 value += addend;
10844
10845 /* ??? Isn't value unsigned? */
10846 if ((long) value > 0x1f || (long) value < -0x10)
10847 return bfd_reloc_overflow;
10848
10849 /* ??? Value needs to be properly shifted into place first. */
10850 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10851 bfd_put_16 (input_bfd, value, hit_data);
10852 return bfd_reloc_ok;
10853
10854 case R_ARM_THM_ALU_PREL_11_0:
10855 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10856 {
10857 bfd_vma insn;
10858 bfd_signed_vma relocation;
10859
10860 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10861 | bfd_get_16 (input_bfd, hit_data + 2);
10862
10863 if (globals->use_rel)
10864 {
10865 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10866 | ((insn & (1 << 26)) >> 15);
10867 if (insn & 0xf00000)
10868 signed_addend = -signed_addend;
10869 }
10870
10871 relocation = value + signed_addend;
10872 relocation -= Pa (input_section->output_section->vma
10873 + input_section->output_offset
10874 + rel->r_offset);
10875
10876 /* PR 21523: Use an absolute value. The user of this reloc will
10877 have already selected an ADD or SUB insn appropriately. */
10878 value = labs (relocation);
10879
10880 if (value >= 0x1000)
10881 return bfd_reloc_overflow;
10882
10883 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10884 if (branch_type == ST_BRANCH_TO_THUMB)
10885 value |= 1;
10886
10887 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10888 | ((value & 0x700) << 4)
10889 | ((value & 0x800) << 15);
10890 if (relocation < 0)
10891 insn |= 0xa00000;
10892
10893 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10894 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10895
10896 return bfd_reloc_ok;
10897 }
10898
10899 case R_ARM_THM_PC8:
10900 /* PR 10073: This reloc is not generated by the GNU toolchain,
10901 but it is supported for compatibility with third party libraries
10902 generated by other compilers, specifically the ARM/IAR. */
10903 {
10904 bfd_vma insn;
10905 bfd_signed_vma relocation;
10906
10907 insn = bfd_get_16 (input_bfd, hit_data);
10908
10909 if (globals->use_rel)
10910 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10911
10912 relocation = value + addend;
10913 relocation -= Pa (input_section->output_section->vma
10914 + input_section->output_offset
10915 + rel->r_offset);
10916
10917 value = relocation;
10918
10919 /* We do not check for overflow of this reloc. Although strictly
10920 speaking this is incorrect, it appears to be necessary in order
10921 to work with IAR generated relocs. Since GCC and GAS do not
10922 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10923 a problem for them. */
10924 value &= 0x3fc;
10925
10926 insn = (insn & 0xff00) | (value >> 2);
10927
10928 bfd_put_16 (input_bfd, insn, hit_data);
10929
10930 return bfd_reloc_ok;
10931 }
10932
10933 case R_ARM_THM_PC12:
10934 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10935 {
10936 bfd_vma insn;
10937 bfd_signed_vma relocation;
10938
10939 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10940 | bfd_get_16 (input_bfd, hit_data + 2);
10941
10942 if (globals->use_rel)
10943 {
10944 signed_addend = insn & 0xfff;
10945 if (!(insn & (1 << 23)))
10946 signed_addend = -signed_addend;
10947 }
10948
10949 relocation = value + signed_addend;
10950 relocation -= Pa (input_section->output_section->vma
10951 + input_section->output_offset
10952 + rel->r_offset);
10953
10954 value = relocation;
10955
10956 if (value >= 0x1000)
10957 return bfd_reloc_overflow;
10958
10959 insn = (insn & 0xff7ff000) | value;
10960 if (relocation >= 0)
10961 insn |= (1 << 23);
10962
10963 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10964 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10965
10966 return bfd_reloc_ok;
10967 }
10968
10969 case R_ARM_THM_XPC22:
10970 case R_ARM_THM_CALL:
10971 case R_ARM_THM_JUMP24:
10972 /* Thumb BL (branch long instruction). */
10973 {
10974 bfd_vma relocation;
10975 bfd_vma reloc_sign;
10976 bfd_boolean overflow = FALSE;
10977 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10978 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10979 bfd_signed_vma reloc_signed_max;
10980 bfd_signed_vma reloc_signed_min;
10981 bfd_vma check;
10982 bfd_signed_vma signed_check;
10983 int bitsize;
10984 const int thumb2 = using_thumb2 (globals);
10985 const int thumb2_bl = using_thumb2_bl (globals);
10986
10987 /* A branch to an undefined weak symbol is turned into a jump to
10988 the next instruction unless a PLT entry will be created.
10989 The jump to the next instruction is optimized as a NOP.W for
10990 Thumb-2 enabled architectures. */
10991 if (h && h->root.type == bfd_link_hash_undefweak
10992 && plt_offset == (bfd_vma) -1)
10993 {
10994 if (thumb2)
10995 {
10996 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10997 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10998 }
10999 else
11000 {
11001 bfd_put_16 (input_bfd, 0xe000, hit_data);
11002 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11003 }
11004 return bfd_reloc_ok;
11005 }
11006
11007 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11008 with Thumb-1) involving the J1 and J2 bits. */
11009 if (globals->use_rel)
11010 {
11011 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11012 bfd_vma upper = upper_insn & 0x3ff;
11013 bfd_vma lower = lower_insn & 0x7ff;
11014 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11015 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11016 bfd_vma i1 = j1 ^ s ? 0 : 1;
11017 bfd_vma i2 = j2 ^ s ? 0 : 1;
11018
11019 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11020 /* Sign extend. */
11021 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11022
11023 signed_addend = addend;
11024 }
11025
11026 if (r_type == R_ARM_THM_XPC22)
11027 {
11028 /* Check for Thumb to Thumb call. */
11029 /* FIXME: Should we translate the instruction into a BL
11030 instruction instead ? */
11031 if (branch_type == ST_BRANCH_TO_THUMB)
11032 _bfd_error_handler
11033 (_("%pB: warning: %s BLX instruction targets"
11034 " %s function '%s'"),
11035 input_bfd, "Thumb",
11036 "Thumb", h ? h->root.root.string : "(local)");
11037 }
11038 else
11039 {
11040 /* If it is not a call to Thumb, assume call to Arm.
11041 If it is a call relative to a section name, then it is not a
11042 function call at all, but rather a long jump. Calls through
11043 the PLT do not require stubs. */
11044 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11045 {
11046 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11047 {
11048 /* Convert BL to BLX. */
11049 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11050 }
11051 else if (( r_type != R_ARM_THM_CALL)
11052 && (r_type != R_ARM_THM_JUMP24))
11053 {
11054 if (elf32_thumb_to_arm_stub
11055 (info, sym_name, input_bfd, output_bfd, input_section,
11056 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11057 error_message))
11058 return bfd_reloc_ok;
11059 else
11060 return bfd_reloc_dangerous;
11061 }
11062 }
11063 else if (branch_type == ST_BRANCH_TO_THUMB
11064 && globals->use_blx
11065 && r_type == R_ARM_THM_CALL)
11066 {
11067 /* Make sure this is a BL. */
11068 lower_insn |= 0x1800;
11069 }
11070 }
11071
11072 enum elf32_arm_stub_type stub_type = arm_stub_none;
11073 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11074 {
11075 /* Check if a stub has to be inserted because the destination
11076 is too far. */
11077 struct elf32_arm_stub_hash_entry *stub_entry;
11078 struct elf32_arm_link_hash_entry *hash;
11079
11080 hash = (struct elf32_arm_link_hash_entry *) h;
11081
11082 stub_type = arm_type_of_stub (info, input_section, rel,
11083 st_type, &branch_type,
11084 hash, value, sym_sec,
11085 input_bfd, sym_name);
11086
11087 if (stub_type != arm_stub_none)
11088 {
11089 /* The target is out of reach or we are changing modes, so
11090 redirect the branch to the local stub for this
11091 function. */
11092 stub_entry = elf32_arm_get_stub_entry (input_section,
11093 sym_sec, h,
11094 rel, globals,
11095 stub_type);
11096 if (stub_entry != NULL)
11097 {
11098 value = (stub_entry->stub_offset
11099 + stub_entry->stub_sec->output_offset
11100 + stub_entry->stub_sec->output_section->vma);
11101
11102 if (plt_offset != (bfd_vma) -1)
11103 *unresolved_reloc_p = FALSE;
11104 }
11105
11106 /* If this call becomes a call to Arm, force BLX. */
11107 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11108 {
11109 if ((stub_entry
11110 && !arm_stub_is_thumb (stub_entry->stub_type))
11111 || branch_type != ST_BRANCH_TO_THUMB)
11112 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11113 }
11114 }
11115 }
11116
11117 /* Handle calls via the PLT. */
11118 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11119 {
11120 value = (splt->output_section->vma
11121 + splt->output_offset
11122 + plt_offset);
11123
11124 if (globals->use_blx
11125 && r_type == R_ARM_THM_CALL
11126 && ! using_thumb_only (globals))
11127 {
11128 /* If the Thumb BLX instruction is available, convert
11129 the BL to a BLX instruction to call the ARM-mode
11130 PLT entry. */
11131 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11132 branch_type = ST_BRANCH_TO_ARM;
11133 }
11134 else
11135 {
11136 if (! using_thumb_only (globals))
11137 /* Target the Thumb stub before the ARM PLT entry. */
11138 value -= PLT_THUMB_STUB_SIZE;
11139 branch_type = ST_BRANCH_TO_THUMB;
11140 }
11141 *unresolved_reloc_p = FALSE;
11142 }
11143
11144 relocation = value + signed_addend;
11145
11146 relocation -= (input_section->output_section->vma
11147 + input_section->output_offset
11148 + rel->r_offset);
11149
11150 check = relocation >> howto->rightshift;
11151
11152 /* If this is a signed value, the rightshift just dropped
11153 leading 1 bits (assuming twos complement). */
11154 if ((bfd_signed_vma) relocation >= 0)
11155 signed_check = check;
11156 else
11157 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11158
11159 /* Calculate the permissable maximum and minimum values for
11160 this relocation according to whether we're relocating for
11161 Thumb-2 or not. */
11162 bitsize = howto->bitsize;
11163 if (!thumb2_bl)
11164 bitsize -= 2;
11165 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11166 reloc_signed_min = ~reloc_signed_max;
11167
11168 /* Assumes two's complement. */
11169 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11170 overflow = TRUE;
11171
11172 if ((lower_insn & 0x5000) == 0x4000)
11173 /* For a BLX instruction, make sure that the relocation is rounded up
11174 to a word boundary. This follows the semantics of the instruction
11175 which specifies that bit 1 of the target address will come from bit
11176 1 of the base address. */
11177 relocation = (relocation + 2) & ~ 3;
11178
11179 /* Put RELOCATION back into the insn. Assumes two's complement.
11180 We use the Thumb-2 encoding, which is safe even if dealing with
11181 a Thumb-1 instruction by virtue of our overflow check above. */
11182 reloc_sign = (signed_check < 0) ? 1 : 0;
11183 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11184 | ((relocation >> 12) & 0x3ff)
11185 | (reloc_sign << 10);
11186 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11187 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11188 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11189 | ((relocation >> 1) & 0x7ff);
11190
11191 /* Put the relocated value back in the object file: */
11192 bfd_put_16 (input_bfd, upper_insn, hit_data);
11193 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11194
11195 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11196 }
11197 break;
11198
11199 case R_ARM_THM_JUMP19:
11200 /* Thumb32 conditional branch instruction. */
11201 {
11202 bfd_vma relocation;
11203 bfd_boolean overflow = FALSE;
11204 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11205 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11206 bfd_signed_vma reloc_signed_max = 0xffffe;
11207 bfd_signed_vma reloc_signed_min = -0x100000;
11208 bfd_signed_vma signed_check;
11209 enum elf32_arm_stub_type stub_type = arm_stub_none;
11210 struct elf32_arm_stub_hash_entry *stub_entry;
11211 struct elf32_arm_link_hash_entry *hash;
11212
11213 /* Need to refetch the addend, reconstruct the top three bits,
11214 and squish the two 11 bit pieces together. */
11215 if (globals->use_rel)
11216 {
11217 bfd_vma S = (upper_insn & 0x0400) >> 10;
11218 bfd_vma upper = (upper_insn & 0x003f);
11219 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11220 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11221 bfd_vma lower = (lower_insn & 0x07ff);
11222
11223 upper |= J1 << 6;
11224 upper |= J2 << 7;
11225 upper |= (!S) << 8;
11226 upper -= 0x0100; /* Sign extend. */
11227
11228 addend = (upper << 12) | (lower << 1);
11229 signed_addend = addend;
11230 }
11231
11232 /* Handle calls via the PLT. */
11233 if (plt_offset != (bfd_vma) -1)
11234 {
11235 value = (splt->output_section->vma
11236 + splt->output_offset
11237 + plt_offset);
11238 /* Target the Thumb stub before the ARM PLT entry. */
11239 value -= PLT_THUMB_STUB_SIZE;
11240 *unresolved_reloc_p = FALSE;
11241 }
11242
11243 hash = (struct elf32_arm_link_hash_entry *)h;
11244
11245 stub_type = arm_type_of_stub (info, input_section, rel,
11246 st_type, &branch_type,
11247 hash, value, sym_sec,
11248 input_bfd, sym_name);
11249 if (stub_type != arm_stub_none)
11250 {
11251 stub_entry = elf32_arm_get_stub_entry (input_section,
11252 sym_sec, h,
11253 rel, globals,
11254 stub_type);
11255 if (stub_entry != NULL)
11256 {
11257 value = (stub_entry->stub_offset
11258 + stub_entry->stub_sec->output_offset
11259 + stub_entry->stub_sec->output_section->vma);
11260 }
11261 }
11262
11263 relocation = value + signed_addend;
11264 relocation -= (input_section->output_section->vma
11265 + input_section->output_offset
11266 + rel->r_offset);
11267 signed_check = (bfd_signed_vma) relocation;
11268
11269 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11270 overflow = TRUE;
11271
11272 /* Put RELOCATION back into the insn. */
11273 {
11274 bfd_vma S = (relocation & 0x00100000) >> 20;
11275 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11276 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11277 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11278 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11279
11280 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11281 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11282 }
11283
11284 /* Put the relocated value back in the object file: */
11285 bfd_put_16 (input_bfd, upper_insn, hit_data);
11286 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11287
11288 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11289 }
11290
11291 case R_ARM_THM_JUMP11:
11292 case R_ARM_THM_JUMP8:
11293 case R_ARM_THM_JUMP6:
11294 /* Thumb B (branch) instruction). */
11295 {
11296 bfd_signed_vma relocation;
11297 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11298 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11299 bfd_signed_vma signed_check;
11300
11301 /* CZB cannot jump backward. */
11302 if (r_type == R_ARM_THM_JUMP6)
11303 reloc_signed_min = 0;
11304
11305 if (globals->use_rel)
11306 {
11307 /* Need to refetch addend. */
11308 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11309 if (addend & ((howto->src_mask + 1) >> 1))
11310 {
11311 signed_addend = -1;
11312 signed_addend &= ~ howto->src_mask;
11313 signed_addend |= addend;
11314 }
11315 else
11316 signed_addend = addend;
11317 /* The value in the insn has been right shifted. We need to
11318 undo this, so that we can perform the address calculation
11319 in terms of bytes. */
11320 signed_addend <<= howto->rightshift;
11321 }
11322 relocation = value + signed_addend;
11323
11324 relocation -= (input_section->output_section->vma
11325 + input_section->output_offset
11326 + rel->r_offset);
11327
11328 relocation >>= howto->rightshift;
11329 signed_check = relocation;
11330
11331 if (r_type == R_ARM_THM_JUMP6)
11332 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11333 else
11334 relocation &= howto->dst_mask;
11335 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11336
11337 bfd_put_16 (input_bfd, relocation, hit_data);
11338
11339 /* Assumes two's complement. */
11340 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11341 return bfd_reloc_overflow;
11342
11343 return bfd_reloc_ok;
11344 }
11345
11346 case R_ARM_ALU_PCREL7_0:
11347 case R_ARM_ALU_PCREL15_8:
11348 case R_ARM_ALU_PCREL23_15:
11349 {
11350 bfd_vma insn;
11351 bfd_vma relocation;
11352
11353 insn = bfd_get_32 (input_bfd, hit_data);
11354 if (globals->use_rel)
11355 {
11356 /* Extract the addend. */
11357 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11358 signed_addend = addend;
11359 }
11360 relocation = value + signed_addend;
11361
11362 relocation -= (input_section->output_section->vma
11363 + input_section->output_offset
11364 + rel->r_offset);
11365 insn = (insn & ~0xfff)
11366 | ((howto->bitpos << 7) & 0xf00)
11367 | ((relocation >> howto->bitpos) & 0xff);
11368 bfd_put_32 (input_bfd, value, hit_data);
11369 }
11370 return bfd_reloc_ok;
11371
11372 case R_ARM_GNU_VTINHERIT:
11373 case R_ARM_GNU_VTENTRY:
11374 return bfd_reloc_ok;
11375
11376 case R_ARM_GOTOFF32:
11377 /* Relocation is relative to the start of the
11378 global offset table. */
11379
11380 BFD_ASSERT (sgot != NULL);
11381 if (sgot == NULL)
11382 return bfd_reloc_notsupported;
11383
11384 /* If we are addressing a Thumb function, we need to adjust the
11385 address by one, so that attempts to call the function pointer will
11386 correctly interpret it as Thumb code. */
11387 if (branch_type == ST_BRANCH_TO_THUMB)
11388 value += 1;
11389
11390 /* Note that sgot->output_offset is not involved in this
11391 calculation. We always want the start of .got. If we
11392 define _GLOBAL_OFFSET_TABLE in a different way, as is
11393 permitted by the ABI, we might have to change this
11394 calculation. */
11395 value -= sgot->output_section->vma;
11396 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11397 contents, rel->r_offset, value,
11398 rel->r_addend);
11399
11400 case R_ARM_GOTPC:
11401 /* Use global offset table as symbol value. */
11402 BFD_ASSERT (sgot != NULL);
11403
11404 if (sgot == NULL)
11405 return bfd_reloc_notsupported;
11406
11407 *unresolved_reloc_p = FALSE;
11408 value = sgot->output_section->vma;
11409 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11410 contents, rel->r_offset, value,
11411 rel->r_addend);
11412
11413 case R_ARM_GOT32:
11414 case R_ARM_GOT_PREL:
11415 /* Relocation is to the entry for this symbol in the
11416 global offset table. */
11417 if (sgot == NULL)
11418 return bfd_reloc_notsupported;
11419
11420 if (dynreloc_st_type == STT_GNU_IFUNC
11421 && plt_offset != (bfd_vma) -1
11422 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11423 {
11424 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11425 symbol, and the relocation resolves directly to the runtime
11426 target rather than to the .iplt entry. This means that any
11427 .got entry would be the same value as the .igot.plt entry,
11428 so there's no point creating both. */
11429 sgot = globals->root.igotplt;
11430 value = sgot->output_offset + gotplt_offset;
11431 }
11432 else if (h != NULL)
11433 {
11434 bfd_vma off;
11435
11436 off = h->got.offset;
11437 BFD_ASSERT (off != (bfd_vma) -1);
11438 if ((off & 1) != 0)
11439 {
11440 /* We have already processsed one GOT relocation against
11441 this symbol. */
11442 off &= ~1;
11443 if (globals->root.dynamic_sections_created
11444 && !SYMBOL_REFERENCES_LOCAL (info, h))
11445 *unresolved_reloc_p = FALSE;
11446 }
11447 else
11448 {
11449 Elf_Internal_Rela outrel;
11450 int isrofixup = 0;
11451
11452 if (((h->dynindx != -1) || globals->fdpic_p)
11453 && !SYMBOL_REFERENCES_LOCAL (info, h))
11454 {
11455 /* If the symbol doesn't resolve locally in a static
11456 object, we have an undefined reference. If the
11457 symbol doesn't resolve locally in a dynamic object,
11458 it should be resolved by the dynamic linker. */
11459 if (globals->root.dynamic_sections_created)
11460 {
11461 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11462 *unresolved_reloc_p = FALSE;
11463 }
11464 else
11465 outrel.r_info = 0;
11466 outrel.r_addend = 0;
11467 }
11468 else
11469 {
11470 if (dynreloc_st_type == STT_GNU_IFUNC)
11471 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11472 else if (bfd_link_pic (info)
11473 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11474 || h->root.type != bfd_link_hash_undefweak))
11475 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11476 else if (globals->fdpic_p)
11477 isrofixup = 1;
11478 else
11479 outrel.r_info = 0;
11480 outrel.r_addend = dynreloc_value;
11481 }
11482
11483 /* The GOT entry is initialized to zero by default.
11484 See if we should install a different value. */
11485 if (outrel.r_addend != 0
11486 && (outrel.r_info == 0 || globals->use_rel || isrofixup))
11487 {
11488 bfd_put_32 (output_bfd, outrel.r_addend,
11489 sgot->contents + off);
11490 outrel.r_addend = 0;
11491 }
11492
11493 if (outrel.r_info != 0 && !isrofixup)
11494 {
11495 outrel.r_offset = (sgot->output_section->vma
11496 + sgot->output_offset
11497 + off);
11498 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11499 }
11500 else if (isrofixup)
11501 {
11502 arm_elf_add_rofixup(output_bfd,
11503 elf32_arm_hash_table(info)->srofixup,
11504 sgot->output_section->vma
11505 + sgot->output_offset + off);
11506 }
11507 h->got.offset |= 1;
11508 }
11509 value = sgot->output_offset + off;
11510 }
11511 else
11512 {
11513 bfd_vma off;
11514
11515 BFD_ASSERT (local_got_offsets != NULL
11516 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11517
11518 off = local_got_offsets[r_symndx];
11519
11520 /* The offset must always be a multiple of 4. We use the
11521 least significant bit to record whether we have already
11522 generated the necessary reloc. */
11523 if ((off & 1) != 0)
11524 off &= ~1;
11525 else
11526 {
11527 if (globals->use_rel)
11528 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11529
11530 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11531 {
11532 Elf_Internal_Rela outrel;
11533
11534 outrel.r_addend = addend + dynreloc_value;
11535 outrel.r_offset = (sgot->output_section->vma
11536 + sgot->output_offset
11537 + off);
11538 if (dynreloc_st_type == STT_GNU_IFUNC)
11539 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11540 else
11541 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11542 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11543 }
11544 else if (globals->fdpic_p)
11545 {
11546 /* For FDPIC executables, we use rofixup to fix
11547 address at runtime. */
11548 arm_elf_add_rofixup(output_bfd, globals->srofixup,
11549 sgot->output_section->vma + sgot->output_offset
11550 + off);
11551 }
11552
11553 local_got_offsets[r_symndx] |= 1;
11554 }
11555
11556 value = sgot->output_offset + off;
11557 }
11558 if (r_type != R_ARM_GOT32)
11559 value += sgot->output_section->vma;
11560
11561 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11562 contents, rel->r_offset, value,
11563 rel->r_addend);
11564
11565 case R_ARM_TLS_LDO32:
11566 value = value - dtpoff_base (info);
11567
11568 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11569 contents, rel->r_offset, value,
11570 rel->r_addend);
11571
11572 case R_ARM_TLS_LDM32:
11573 case R_ARM_TLS_LDM32_FDPIC:
11574 {
11575 bfd_vma off;
11576
11577 if (sgot == NULL)
11578 abort ();
11579
11580 off = globals->tls_ldm_got.offset;
11581
11582 if ((off & 1) != 0)
11583 off &= ~1;
11584 else
11585 {
11586 /* If we don't know the module number, create a relocation
11587 for it. */
11588 if (bfd_link_pic (info))
11589 {
11590 Elf_Internal_Rela outrel;
11591
11592 if (srelgot == NULL)
11593 abort ();
11594
11595 outrel.r_addend = 0;
11596 outrel.r_offset = (sgot->output_section->vma
11597 + sgot->output_offset + off);
11598 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11599
11600 if (globals->use_rel)
11601 bfd_put_32 (output_bfd, outrel.r_addend,
11602 sgot->contents + off);
11603
11604 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11605 }
11606 else
11607 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11608
11609 globals->tls_ldm_got.offset |= 1;
11610 }
11611
11612 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11613 {
11614 bfd_put_32(output_bfd,
11615 globals->root.sgot->output_offset + off,
11616 contents + rel->r_offset);
11617
11618 return bfd_reloc_ok;
11619 }
11620 else
11621 {
11622 value = sgot->output_section->vma + sgot->output_offset + off
11623 - (input_section->output_section->vma
11624 + input_section->output_offset + rel->r_offset);
11625
11626 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11627 contents, rel->r_offset, value,
11628 rel->r_addend);
11629 }
11630 }
11631
11632 case R_ARM_TLS_CALL:
11633 case R_ARM_THM_TLS_CALL:
11634 case R_ARM_TLS_GD32:
11635 case R_ARM_TLS_GD32_FDPIC:
11636 case R_ARM_TLS_IE32:
11637 case R_ARM_TLS_IE32_FDPIC:
11638 case R_ARM_TLS_GOTDESC:
11639 case R_ARM_TLS_DESCSEQ:
11640 case R_ARM_THM_TLS_DESCSEQ:
11641 {
11642 bfd_vma off, offplt;
11643 int indx = 0;
11644 char tls_type;
11645
11646 BFD_ASSERT (sgot != NULL);
11647
11648 if (h != NULL)
11649 {
11650 bfd_boolean dyn;
11651 dyn = globals->root.dynamic_sections_created;
11652 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11653 bfd_link_pic (info),
11654 h)
11655 && (!bfd_link_pic (info)
11656 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11657 {
11658 *unresolved_reloc_p = FALSE;
11659 indx = h->dynindx;
11660 }
11661 off = h->got.offset;
11662 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11663 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11664 }
11665 else
11666 {
11667 BFD_ASSERT (local_got_offsets != NULL);
11668 off = local_got_offsets[r_symndx];
11669 offplt = local_tlsdesc_gotents[r_symndx];
11670 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11671 }
11672
11673 /* Linker relaxations happens from one of the
11674 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11675 if (ELF32_R_TYPE(rel->r_info) != r_type)
11676 tls_type = GOT_TLS_IE;
11677
11678 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11679
11680 if ((off & 1) != 0)
11681 off &= ~1;
11682 else
11683 {
11684 bfd_boolean need_relocs = FALSE;
11685 Elf_Internal_Rela outrel;
11686 int cur_off = off;
11687
11688 /* The GOT entries have not been initialized yet. Do it
11689 now, and emit any relocations. If both an IE GOT and a
11690 GD GOT are necessary, we emit the GD first. */
11691
11692 if ((bfd_link_pic (info) || indx != 0)
11693 && (h == NULL
11694 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11695 && !resolved_to_zero)
11696 || h->root.type != bfd_link_hash_undefweak))
11697 {
11698 need_relocs = TRUE;
11699 BFD_ASSERT (srelgot != NULL);
11700 }
11701
11702 if (tls_type & GOT_TLS_GDESC)
11703 {
11704 bfd_byte *loc;
11705
11706 /* We should have relaxed, unless this is an undefined
11707 weak symbol. */
11708 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11709 || bfd_link_pic (info));
11710 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11711 <= globals->root.sgotplt->size);
11712
11713 outrel.r_addend = 0;
11714 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11715 + globals->root.sgotplt->output_offset
11716 + offplt
11717 + globals->sgotplt_jump_table_size);
11718
11719 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11720 sreloc = globals->root.srelplt;
11721 loc = sreloc->contents;
11722 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11723 BFD_ASSERT (loc + RELOC_SIZE (globals)
11724 <= sreloc->contents + sreloc->size);
11725
11726 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11727
11728 /* For globals, the first word in the relocation gets
11729 the relocation index and the top bit set, or zero,
11730 if we're binding now. For locals, it gets the
11731 symbol's offset in the tls section. */
11732 bfd_put_32 (output_bfd,
11733 !h ? value - elf_hash_table (info)->tls_sec->vma
11734 : info->flags & DF_BIND_NOW ? 0
11735 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11736 globals->root.sgotplt->contents + offplt
11737 + globals->sgotplt_jump_table_size);
11738
11739 /* Second word in the relocation is always zero. */
11740 bfd_put_32 (output_bfd, 0,
11741 globals->root.sgotplt->contents + offplt
11742 + globals->sgotplt_jump_table_size + 4);
11743 }
11744 if (tls_type & GOT_TLS_GD)
11745 {
11746 if (need_relocs)
11747 {
11748 outrel.r_addend = 0;
11749 outrel.r_offset = (sgot->output_section->vma
11750 + sgot->output_offset
11751 + cur_off);
11752 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11753
11754 if (globals->use_rel)
11755 bfd_put_32 (output_bfd, outrel.r_addend,
11756 sgot->contents + cur_off);
11757
11758 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11759
11760 if (indx == 0)
11761 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11762 sgot->contents + cur_off + 4);
11763 else
11764 {
11765 outrel.r_addend = 0;
11766 outrel.r_info = ELF32_R_INFO (indx,
11767 R_ARM_TLS_DTPOFF32);
11768 outrel.r_offset += 4;
11769
11770 if (globals->use_rel)
11771 bfd_put_32 (output_bfd, outrel.r_addend,
11772 sgot->contents + cur_off + 4);
11773
11774 elf32_arm_add_dynreloc (output_bfd, info,
11775 srelgot, &outrel);
11776 }
11777 }
11778 else
11779 {
11780 /* If we are not emitting relocations for a
11781 general dynamic reference, then we must be in a
11782 static link or an executable link with the
11783 symbol binding locally. Mark it as belonging
11784 to module 1, the executable. */
11785 bfd_put_32 (output_bfd, 1,
11786 sgot->contents + cur_off);
11787 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11788 sgot->contents + cur_off + 4);
11789 }
11790
11791 cur_off += 8;
11792 }
11793
11794 if (tls_type & GOT_TLS_IE)
11795 {
11796 if (need_relocs)
11797 {
11798 if (indx == 0)
11799 outrel.r_addend = value - dtpoff_base (info);
11800 else
11801 outrel.r_addend = 0;
11802 outrel.r_offset = (sgot->output_section->vma
11803 + sgot->output_offset
11804 + cur_off);
11805 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11806
11807 if (globals->use_rel)
11808 bfd_put_32 (output_bfd, outrel.r_addend,
11809 sgot->contents + cur_off);
11810
11811 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11812 }
11813 else
11814 bfd_put_32 (output_bfd, tpoff (info, value),
11815 sgot->contents + cur_off);
11816 cur_off += 4;
11817 }
11818
11819 if (h != NULL)
11820 h->got.offset |= 1;
11821 else
11822 local_got_offsets[r_symndx] |= 1;
11823 }
11824
11825 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11826 off += 8;
11827 else if (tls_type & GOT_TLS_GDESC)
11828 off = offplt;
11829
11830 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11831 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11832 {
11833 bfd_signed_vma offset;
11834 /* TLS stubs are arm mode. The original symbol is a
11835 data object, so branch_type is bogus. */
11836 branch_type = ST_BRANCH_TO_ARM;
11837 enum elf32_arm_stub_type stub_type
11838 = arm_type_of_stub (info, input_section, rel,
11839 st_type, &branch_type,
11840 (struct elf32_arm_link_hash_entry *)h,
11841 globals->tls_trampoline, globals->root.splt,
11842 input_bfd, sym_name);
11843
11844 if (stub_type != arm_stub_none)
11845 {
11846 struct elf32_arm_stub_hash_entry *stub_entry
11847 = elf32_arm_get_stub_entry
11848 (input_section, globals->root.splt, 0, rel,
11849 globals, stub_type);
11850 offset = (stub_entry->stub_offset
11851 + stub_entry->stub_sec->output_offset
11852 + stub_entry->stub_sec->output_section->vma);
11853 }
11854 else
11855 offset = (globals->root.splt->output_section->vma
11856 + globals->root.splt->output_offset
11857 + globals->tls_trampoline);
11858
11859 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11860 {
11861 unsigned long inst;
11862
11863 offset -= (input_section->output_section->vma
11864 + input_section->output_offset
11865 + rel->r_offset + 8);
11866
11867 inst = offset >> 2;
11868 inst &= 0x00ffffff;
11869 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11870 }
11871 else
11872 {
11873 /* Thumb blx encodes the offset in a complicated
11874 fashion. */
11875 unsigned upper_insn, lower_insn;
11876 unsigned neg;
11877
11878 offset -= (input_section->output_section->vma
11879 + input_section->output_offset
11880 + rel->r_offset + 4);
11881
11882 if (stub_type != arm_stub_none
11883 && arm_stub_is_thumb (stub_type))
11884 {
11885 lower_insn = 0xd000;
11886 }
11887 else
11888 {
11889 lower_insn = 0xc000;
11890 /* Round up the offset to a word boundary. */
11891 offset = (offset + 2) & ~2;
11892 }
11893
11894 neg = offset < 0;
11895 upper_insn = (0xf000
11896 | ((offset >> 12) & 0x3ff)
11897 | (neg << 10));
11898 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11899 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11900 | ((offset >> 1) & 0x7ff);
11901 bfd_put_16 (input_bfd, upper_insn, hit_data);
11902 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11903 return bfd_reloc_ok;
11904 }
11905 }
11906 /* These relocations needs special care, as besides the fact
11907 they point somewhere in .gotplt, the addend must be
11908 adjusted accordingly depending on the type of instruction
11909 we refer to. */
11910 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11911 {
11912 unsigned long data, insn;
11913 unsigned thumb;
11914
11915 data = bfd_get_32 (input_bfd, hit_data);
11916 thumb = data & 1;
11917 data &= ~1u;
11918
11919 if (thumb)
11920 {
11921 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11922 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11923 insn = (insn << 16)
11924 | bfd_get_16 (input_bfd,
11925 contents + rel->r_offset - data + 2);
11926 if ((insn & 0xf800c000) == 0xf000c000)
11927 /* bl/blx */
11928 value = -6;
11929 else if ((insn & 0xffffff00) == 0x4400)
11930 /* add */
11931 value = -5;
11932 else
11933 {
11934 _bfd_error_handler
11935 /* xgettext:c-format */
11936 (_("%pB(%pA+%#" PRIx64 "): "
11937 "unexpected %s instruction '%#lx' "
11938 "referenced by TLS_GOTDESC"),
11939 input_bfd, input_section, (uint64_t) rel->r_offset,
11940 "Thumb", insn);
11941 return bfd_reloc_notsupported;
11942 }
11943 }
11944 else
11945 {
11946 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11947
11948 switch (insn >> 24)
11949 {
11950 case 0xeb: /* bl */
11951 case 0xfa: /* blx */
11952 value = -4;
11953 break;
11954
11955 case 0xe0: /* add */
11956 value = -8;
11957 break;
11958
11959 default:
11960 _bfd_error_handler
11961 /* xgettext:c-format */
11962 (_("%pB(%pA+%#" PRIx64 "): "
11963 "unexpected %s instruction '%#lx' "
11964 "referenced by TLS_GOTDESC"),
11965 input_bfd, input_section, (uint64_t) rel->r_offset,
11966 "ARM", insn);
11967 return bfd_reloc_notsupported;
11968 }
11969 }
11970
11971 value += ((globals->root.sgotplt->output_section->vma
11972 + globals->root.sgotplt->output_offset + off)
11973 - (input_section->output_section->vma
11974 + input_section->output_offset
11975 + rel->r_offset)
11976 + globals->sgotplt_jump_table_size);
11977 }
11978 else
11979 value = ((globals->root.sgot->output_section->vma
11980 + globals->root.sgot->output_offset + off)
11981 - (input_section->output_section->vma
11982 + input_section->output_offset + rel->r_offset));
11983
11984 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
11985 r_type == R_ARM_TLS_IE32_FDPIC))
11986 {
11987 /* For FDPIC relocations, resolve to the offset of the GOT
11988 entry from the start of GOT. */
11989 bfd_put_32(output_bfd,
11990 globals->root.sgot->output_offset + off,
11991 contents + rel->r_offset);
11992
11993 return bfd_reloc_ok;
11994 }
11995 else
11996 {
11997 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11998 contents, rel->r_offset, value,
11999 rel->r_addend);
12000 }
12001 }
12002
12003 case R_ARM_TLS_LE32:
12004 if (bfd_link_dll (info))
12005 {
12006 _bfd_error_handler
12007 /* xgettext:c-format */
12008 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12009 "in shared object"),
12010 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12011 return bfd_reloc_notsupported;
12012 }
12013 else
12014 value = tpoff (info, value);
12015
12016 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12017 contents, rel->r_offset, value,
12018 rel->r_addend);
12019
12020 case R_ARM_V4BX:
12021 if (globals->fix_v4bx)
12022 {
12023 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12024
12025 /* Ensure that we have a BX instruction. */
12026 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12027
12028 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12029 {
12030 /* Branch to veneer. */
12031 bfd_vma glue_addr;
12032 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12033 glue_addr -= input_section->output_section->vma
12034 + input_section->output_offset
12035 + rel->r_offset + 8;
12036 insn = (insn & 0xf0000000) | 0x0a000000
12037 | ((glue_addr >> 2) & 0x00ffffff);
12038 }
12039 else
12040 {
12041 /* Preserve Rm (lowest four bits) and the condition code
12042 (highest four bits). Other bits encode MOV PC,Rm. */
12043 insn = (insn & 0xf000000f) | 0x01a0f000;
12044 }
12045
12046 bfd_put_32 (input_bfd, insn, hit_data);
12047 }
12048 return bfd_reloc_ok;
12049
12050 case R_ARM_MOVW_ABS_NC:
12051 case R_ARM_MOVT_ABS:
12052 case R_ARM_MOVW_PREL_NC:
12053 case R_ARM_MOVT_PREL:
12054 /* Until we properly support segment-base-relative addressing then
12055 we assume the segment base to be zero, as for the group relocations.
12056 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12057 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12058 case R_ARM_MOVW_BREL_NC:
12059 case R_ARM_MOVW_BREL:
12060 case R_ARM_MOVT_BREL:
12061 {
12062 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12063
12064 if (globals->use_rel)
12065 {
12066 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12067 signed_addend = (addend ^ 0x8000) - 0x8000;
12068 }
12069
12070 value += signed_addend;
12071
12072 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12073 value -= (input_section->output_section->vma
12074 + input_section->output_offset + rel->r_offset);
12075
12076 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12077 return bfd_reloc_overflow;
12078
12079 if (branch_type == ST_BRANCH_TO_THUMB)
12080 value |= 1;
12081
12082 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12083 || r_type == R_ARM_MOVT_BREL)
12084 value >>= 16;
12085
12086 insn &= 0xfff0f000;
12087 insn |= value & 0xfff;
12088 insn |= (value & 0xf000) << 4;
12089 bfd_put_32 (input_bfd, insn, hit_data);
12090 }
12091 return bfd_reloc_ok;
12092
12093 case R_ARM_THM_MOVW_ABS_NC:
12094 case R_ARM_THM_MOVT_ABS:
12095 case R_ARM_THM_MOVW_PREL_NC:
12096 case R_ARM_THM_MOVT_PREL:
12097 /* Until we properly support segment-base-relative addressing then
12098 we assume the segment base to be zero, as for the above relocations.
12099 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12100 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12101 as R_ARM_THM_MOVT_ABS. */
12102 case R_ARM_THM_MOVW_BREL_NC:
12103 case R_ARM_THM_MOVW_BREL:
12104 case R_ARM_THM_MOVT_BREL:
12105 {
12106 bfd_vma insn;
12107
12108 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12109 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12110
12111 if (globals->use_rel)
12112 {
12113 addend = ((insn >> 4) & 0xf000)
12114 | ((insn >> 15) & 0x0800)
12115 | ((insn >> 4) & 0x0700)
12116 | (insn & 0x00ff);
12117 signed_addend = (addend ^ 0x8000) - 0x8000;
12118 }
12119
12120 value += signed_addend;
12121
12122 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12123 value -= (input_section->output_section->vma
12124 + input_section->output_offset + rel->r_offset);
12125
12126 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12127 return bfd_reloc_overflow;
12128
12129 if (branch_type == ST_BRANCH_TO_THUMB)
12130 value |= 1;
12131
12132 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12133 || r_type == R_ARM_THM_MOVT_BREL)
12134 value >>= 16;
12135
12136 insn &= 0xfbf08f00;
12137 insn |= (value & 0xf000) << 4;
12138 insn |= (value & 0x0800) << 15;
12139 insn |= (value & 0x0700) << 4;
12140 insn |= (value & 0x00ff);
12141
12142 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12143 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12144 }
12145 return bfd_reloc_ok;
12146
12147 case R_ARM_ALU_PC_G0_NC:
12148 case R_ARM_ALU_PC_G1_NC:
12149 case R_ARM_ALU_PC_G0:
12150 case R_ARM_ALU_PC_G1:
12151 case R_ARM_ALU_PC_G2:
12152 case R_ARM_ALU_SB_G0_NC:
12153 case R_ARM_ALU_SB_G1_NC:
12154 case R_ARM_ALU_SB_G0:
12155 case R_ARM_ALU_SB_G1:
12156 case R_ARM_ALU_SB_G2:
12157 {
12158 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12159 bfd_vma pc = input_section->output_section->vma
12160 + input_section->output_offset + rel->r_offset;
12161 /* sb is the origin of the *segment* containing the symbol. */
12162 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12163 bfd_vma residual;
12164 bfd_vma g_n;
12165 bfd_signed_vma signed_value;
12166 int group = 0;
12167
12168 /* Determine which group of bits to select. */
12169 switch (r_type)
12170 {
12171 case R_ARM_ALU_PC_G0_NC:
12172 case R_ARM_ALU_PC_G0:
12173 case R_ARM_ALU_SB_G0_NC:
12174 case R_ARM_ALU_SB_G0:
12175 group = 0;
12176 break;
12177
12178 case R_ARM_ALU_PC_G1_NC:
12179 case R_ARM_ALU_PC_G1:
12180 case R_ARM_ALU_SB_G1_NC:
12181 case R_ARM_ALU_SB_G1:
12182 group = 1;
12183 break;
12184
12185 case R_ARM_ALU_PC_G2:
12186 case R_ARM_ALU_SB_G2:
12187 group = 2;
12188 break;
12189
12190 default:
12191 abort ();
12192 }
12193
12194 /* If REL, extract the addend from the insn. If RELA, it will
12195 have already been fetched for us. */
12196 if (globals->use_rel)
12197 {
12198 int negative;
12199 bfd_vma constant = insn & 0xff;
12200 bfd_vma rotation = (insn & 0xf00) >> 8;
12201
12202 if (rotation == 0)
12203 signed_addend = constant;
12204 else
12205 {
12206 /* Compensate for the fact that in the instruction, the
12207 rotation is stored in multiples of 2 bits. */
12208 rotation *= 2;
12209
12210 /* Rotate "constant" right by "rotation" bits. */
12211 signed_addend = (constant >> rotation) |
12212 (constant << (8 * sizeof (bfd_vma) - rotation));
12213 }
12214
12215 /* Determine if the instruction is an ADD or a SUB.
12216 (For REL, this determines the sign of the addend.) */
12217 negative = identify_add_or_sub (insn);
12218 if (negative == 0)
12219 {
12220 _bfd_error_handler
12221 /* xgettext:c-format */
12222 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12223 "are allowed for ALU group relocations"),
12224 input_bfd, input_section, (uint64_t) rel->r_offset);
12225 return bfd_reloc_overflow;
12226 }
12227
12228 signed_addend *= negative;
12229 }
12230
12231 /* Compute the value (X) to go in the place. */
12232 if (r_type == R_ARM_ALU_PC_G0_NC
12233 || r_type == R_ARM_ALU_PC_G1_NC
12234 || r_type == R_ARM_ALU_PC_G0
12235 || r_type == R_ARM_ALU_PC_G1
12236 || r_type == R_ARM_ALU_PC_G2)
12237 /* PC relative. */
12238 signed_value = value - pc + signed_addend;
12239 else
12240 /* Section base relative. */
12241 signed_value = value - sb + signed_addend;
12242
12243 /* If the target symbol is a Thumb function, then set the
12244 Thumb bit in the address. */
12245 if (branch_type == ST_BRANCH_TO_THUMB)
12246 signed_value |= 1;
12247
12248 /* Calculate the value of the relevant G_n, in encoded
12249 constant-with-rotation format. */
12250 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12251 group, &residual);
12252
12253 /* Check for overflow if required. */
12254 if ((r_type == R_ARM_ALU_PC_G0
12255 || r_type == R_ARM_ALU_PC_G1
12256 || r_type == R_ARM_ALU_PC_G2
12257 || r_type == R_ARM_ALU_SB_G0
12258 || r_type == R_ARM_ALU_SB_G1
12259 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12260 {
12261 _bfd_error_handler
12262 /* xgettext:c-format */
12263 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12264 "splitting %#" PRIx64 " for group relocation %s"),
12265 input_bfd, input_section, (uint64_t) rel->r_offset,
12266 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12267 howto->name);
12268 return bfd_reloc_overflow;
12269 }
12270
12271 /* Mask out the value and the ADD/SUB part of the opcode; take care
12272 not to destroy the S bit. */
12273 insn &= 0xff1ff000;
12274
12275 /* Set the opcode according to whether the value to go in the
12276 place is negative. */
12277 if (signed_value < 0)
12278 insn |= 1 << 22;
12279 else
12280 insn |= 1 << 23;
12281
12282 /* Encode the offset. */
12283 insn |= g_n;
12284
12285 bfd_put_32 (input_bfd, insn, hit_data);
12286 }
12287 return bfd_reloc_ok;
12288
12289 case R_ARM_LDR_PC_G0:
12290 case R_ARM_LDR_PC_G1:
12291 case R_ARM_LDR_PC_G2:
12292 case R_ARM_LDR_SB_G0:
12293 case R_ARM_LDR_SB_G1:
12294 case R_ARM_LDR_SB_G2:
12295 {
12296 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12297 bfd_vma pc = input_section->output_section->vma
12298 + input_section->output_offset + rel->r_offset;
12299 /* sb is the origin of the *segment* containing the symbol. */
12300 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12301 bfd_vma residual;
12302 bfd_signed_vma signed_value;
12303 int group = 0;
12304
12305 /* Determine which groups of bits to calculate. */
12306 switch (r_type)
12307 {
12308 case R_ARM_LDR_PC_G0:
12309 case R_ARM_LDR_SB_G0:
12310 group = 0;
12311 break;
12312
12313 case R_ARM_LDR_PC_G1:
12314 case R_ARM_LDR_SB_G1:
12315 group = 1;
12316 break;
12317
12318 case R_ARM_LDR_PC_G2:
12319 case R_ARM_LDR_SB_G2:
12320 group = 2;
12321 break;
12322
12323 default:
12324 abort ();
12325 }
12326
12327 /* If REL, extract the addend from the insn. If RELA, it will
12328 have already been fetched for us. */
12329 if (globals->use_rel)
12330 {
12331 int negative = (insn & (1 << 23)) ? 1 : -1;
12332 signed_addend = negative * (insn & 0xfff);
12333 }
12334
12335 /* Compute the value (X) to go in the place. */
12336 if (r_type == R_ARM_LDR_PC_G0
12337 || r_type == R_ARM_LDR_PC_G1
12338 || r_type == R_ARM_LDR_PC_G2)
12339 /* PC relative. */
12340 signed_value = value - pc + signed_addend;
12341 else
12342 /* Section base relative. */
12343 signed_value = value - sb + signed_addend;
12344
12345 /* Calculate the value of the relevant G_{n-1} to obtain
12346 the residual at that stage. */
12347 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12348 group - 1, &residual);
12349
12350 /* Check for overflow. */
12351 if (residual >= 0x1000)
12352 {
12353 _bfd_error_handler
12354 /* xgettext:c-format */
12355 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12356 "splitting %#" PRIx64 " for group relocation %s"),
12357 input_bfd, input_section, (uint64_t) rel->r_offset,
12358 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12359 howto->name);
12360 return bfd_reloc_overflow;
12361 }
12362
12363 /* Mask out the value and U bit. */
12364 insn &= 0xff7ff000;
12365
12366 /* Set the U bit if the value to go in the place is non-negative. */
12367 if (signed_value >= 0)
12368 insn |= 1 << 23;
12369
12370 /* Encode the offset. */
12371 insn |= residual;
12372
12373 bfd_put_32 (input_bfd, insn, hit_data);
12374 }
12375 return bfd_reloc_ok;
12376
12377 case R_ARM_LDRS_PC_G0:
12378 case R_ARM_LDRS_PC_G1:
12379 case R_ARM_LDRS_PC_G2:
12380 case R_ARM_LDRS_SB_G0:
12381 case R_ARM_LDRS_SB_G1:
12382 case R_ARM_LDRS_SB_G2:
12383 {
12384 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12385 bfd_vma pc = input_section->output_section->vma
12386 + input_section->output_offset + rel->r_offset;
12387 /* sb is the origin of the *segment* containing the symbol. */
12388 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12389 bfd_vma residual;
12390 bfd_signed_vma signed_value;
12391 int group = 0;
12392
12393 /* Determine which groups of bits to calculate. */
12394 switch (r_type)
12395 {
12396 case R_ARM_LDRS_PC_G0:
12397 case R_ARM_LDRS_SB_G0:
12398 group = 0;
12399 break;
12400
12401 case R_ARM_LDRS_PC_G1:
12402 case R_ARM_LDRS_SB_G1:
12403 group = 1;
12404 break;
12405
12406 case R_ARM_LDRS_PC_G2:
12407 case R_ARM_LDRS_SB_G2:
12408 group = 2;
12409 break;
12410
12411 default:
12412 abort ();
12413 }
12414
12415 /* If REL, extract the addend from the insn. If RELA, it will
12416 have already been fetched for us. */
12417 if (globals->use_rel)
12418 {
12419 int negative = (insn & (1 << 23)) ? 1 : -1;
12420 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12421 }
12422
12423 /* Compute the value (X) to go in the place. */
12424 if (r_type == R_ARM_LDRS_PC_G0
12425 || r_type == R_ARM_LDRS_PC_G1
12426 || r_type == R_ARM_LDRS_PC_G2)
12427 /* PC relative. */
12428 signed_value = value - pc + signed_addend;
12429 else
12430 /* Section base relative. */
12431 signed_value = value - sb + signed_addend;
12432
12433 /* Calculate the value of the relevant G_{n-1} to obtain
12434 the residual at that stage. */
12435 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12436 group - 1, &residual);
12437
12438 /* Check for overflow. */
12439 if (residual >= 0x100)
12440 {
12441 _bfd_error_handler
12442 /* xgettext:c-format */
12443 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12444 "splitting %#" PRIx64 " for group relocation %s"),
12445 input_bfd, input_section, (uint64_t) rel->r_offset,
12446 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12447 howto->name);
12448 return bfd_reloc_overflow;
12449 }
12450
12451 /* Mask out the value and U bit. */
12452 insn &= 0xff7ff0f0;
12453
12454 /* Set the U bit if the value to go in the place is non-negative. */
12455 if (signed_value >= 0)
12456 insn |= 1 << 23;
12457
12458 /* Encode the offset. */
12459 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12460
12461 bfd_put_32 (input_bfd, insn, hit_data);
12462 }
12463 return bfd_reloc_ok;
12464
12465 case R_ARM_LDC_PC_G0:
12466 case R_ARM_LDC_PC_G1:
12467 case R_ARM_LDC_PC_G2:
12468 case R_ARM_LDC_SB_G0:
12469 case R_ARM_LDC_SB_G1:
12470 case R_ARM_LDC_SB_G2:
12471 {
12472 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12473 bfd_vma pc = input_section->output_section->vma
12474 + input_section->output_offset + rel->r_offset;
12475 /* sb is the origin of the *segment* containing the symbol. */
12476 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12477 bfd_vma residual;
12478 bfd_signed_vma signed_value;
12479 int group = 0;
12480
12481 /* Determine which groups of bits to calculate. */
12482 switch (r_type)
12483 {
12484 case R_ARM_LDC_PC_G0:
12485 case R_ARM_LDC_SB_G0:
12486 group = 0;
12487 break;
12488
12489 case R_ARM_LDC_PC_G1:
12490 case R_ARM_LDC_SB_G1:
12491 group = 1;
12492 break;
12493
12494 case R_ARM_LDC_PC_G2:
12495 case R_ARM_LDC_SB_G2:
12496 group = 2;
12497 break;
12498
12499 default:
12500 abort ();
12501 }
12502
12503 /* If REL, extract the addend from the insn. If RELA, it will
12504 have already been fetched for us. */
12505 if (globals->use_rel)
12506 {
12507 int negative = (insn & (1 << 23)) ? 1 : -1;
12508 signed_addend = negative * ((insn & 0xff) << 2);
12509 }
12510
12511 /* Compute the value (X) to go in the place. */
12512 if (r_type == R_ARM_LDC_PC_G0
12513 || r_type == R_ARM_LDC_PC_G1
12514 || r_type == R_ARM_LDC_PC_G2)
12515 /* PC relative. */
12516 signed_value = value - pc + signed_addend;
12517 else
12518 /* Section base relative. */
12519 signed_value = value - sb + signed_addend;
12520
12521 /* Calculate the value of the relevant G_{n-1} to obtain
12522 the residual at that stage. */
12523 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12524 group - 1, &residual);
12525
12526 /* Check for overflow. (The absolute value to go in the place must be
12527 divisible by four and, after having been divided by four, must
12528 fit in eight bits.) */
12529 if ((residual & 0x3) != 0 || residual >= 0x400)
12530 {
12531 _bfd_error_handler
12532 /* xgettext:c-format */
12533 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12534 "splitting %#" PRIx64 " for group relocation %s"),
12535 input_bfd, input_section, (uint64_t) rel->r_offset,
12536 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12537 howto->name);
12538 return bfd_reloc_overflow;
12539 }
12540
12541 /* Mask out the value and U bit. */
12542 insn &= 0xff7fff00;
12543
12544 /* Set the U bit if the value to go in the place is non-negative. */
12545 if (signed_value >= 0)
12546 insn |= 1 << 23;
12547
12548 /* Encode the offset. */
12549 insn |= residual >> 2;
12550
12551 bfd_put_32 (input_bfd, insn, hit_data);
12552 }
12553 return bfd_reloc_ok;
12554
12555 case R_ARM_THM_ALU_ABS_G0_NC:
12556 case R_ARM_THM_ALU_ABS_G1_NC:
12557 case R_ARM_THM_ALU_ABS_G2_NC:
12558 case R_ARM_THM_ALU_ABS_G3_NC:
12559 {
12560 const int shift_array[4] = {0, 8, 16, 24};
12561 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12562 bfd_vma addr = value;
12563 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12564
12565 /* Compute address. */
12566 if (globals->use_rel)
12567 signed_addend = insn & 0xff;
12568 addr += signed_addend;
12569 if (branch_type == ST_BRANCH_TO_THUMB)
12570 addr |= 1;
12571 /* Clean imm8 insn. */
12572 insn &= 0xff00;
12573 /* And update with correct part of address. */
12574 insn |= (addr >> shift) & 0xff;
12575 /* Update insn. */
12576 bfd_put_16 (input_bfd, insn, hit_data);
12577 }
12578
12579 *unresolved_reloc_p = FALSE;
12580 return bfd_reloc_ok;
12581
12582 case R_ARM_GOTOFFFUNCDESC:
12583 {
12584 if (h == NULL)
12585 {
12586 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12587 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12588 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12589 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12590 bfd_vma seg = -1;
12591
12592 if (bfd_link_pic(info) && dynindx == 0)
12593 abort();
12594
12595 /* Resolve relocation. */
12596 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12597 , contents + rel->r_offset);
12598 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12599 not done yet. */
12600 arm_elf_fill_funcdesc(output_bfd, info,
12601 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12602 dynindx, offset, addr, dynreloc_value, seg);
12603 }
12604 else
12605 {
12606 int dynindx;
12607 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12608 bfd_vma addr;
12609 bfd_vma seg = -1;
12610
12611 /* For static binaries, sym_sec can be null. */
12612 if (sym_sec)
12613 {
12614 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12615 addr = dynreloc_value - sym_sec->output_section->vma;
12616 }
12617 else
12618 {
12619 dynindx = 0;
12620 addr = 0;
12621 }
12622
12623 if (bfd_link_pic(info) && dynindx == 0)
12624 abort();
12625
12626 /* This case cannot occur since funcdesc is allocated by
12627 the dynamic loader so we cannot resolve the relocation. */
12628 if (h->dynindx != -1)
12629 abort();
12630
12631 /* Resolve relocation. */
12632 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12633 contents + rel->r_offset);
12634 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12635 arm_elf_fill_funcdesc(output_bfd, info,
12636 &eh->fdpic_cnts.funcdesc_offset,
12637 dynindx, offset, addr, dynreloc_value, seg);
12638 }
12639 }
12640 *unresolved_reloc_p = FALSE;
12641 return bfd_reloc_ok;
12642
12643 case R_ARM_GOTFUNCDESC:
12644 {
12645 if (h != NULL)
12646 {
12647 Elf_Internal_Rela outrel;
12648
12649 /* Resolve relocation. */
12650 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12651 + sgot->output_offset),
12652 contents + rel->r_offset);
12653 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12654 if(h->dynindx == -1)
12655 {
12656 int dynindx;
12657 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12658 bfd_vma addr;
12659 bfd_vma seg = -1;
12660
12661 /* For static binaries sym_sec can be null. */
12662 if (sym_sec)
12663 {
12664 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12665 addr = dynreloc_value - sym_sec->output_section->vma;
12666 }
12667 else
12668 {
12669 dynindx = 0;
12670 addr = 0;
12671 }
12672
12673 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12674 arm_elf_fill_funcdesc(output_bfd, info,
12675 &eh->fdpic_cnts.funcdesc_offset,
12676 dynindx, offset, addr, dynreloc_value, seg);
12677 }
12678
12679 /* Add a dynamic relocation on GOT entry if not already done. */
12680 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12681 {
12682 if (h->dynindx == -1)
12683 {
12684 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12685 if (h->root.type == bfd_link_hash_undefweak)
12686 bfd_put_32(output_bfd, 0, sgot->contents
12687 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12688 else
12689 bfd_put_32(output_bfd, sgot->output_section->vma
12690 + sgot->output_offset
12691 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12692 sgot->contents
12693 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12694 }
12695 else
12696 {
12697 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12698 }
12699 outrel.r_offset = sgot->output_section->vma
12700 + sgot->output_offset
12701 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12702 outrel.r_addend = 0;
12703 if (h->dynindx == -1 && !bfd_link_pic(info))
12704 if (h->root.type == bfd_link_hash_undefweak)
12705 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12706 else
12707 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12708 else
12709 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12710 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12711 }
12712 }
12713 else
12714 {
12715 /* Such relocation on static function should not have been
12716 emitted by the compiler. */
12717 abort();
12718 }
12719 }
12720 *unresolved_reloc_p = FALSE;
12721 return bfd_reloc_ok;
12722
12723 case R_ARM_FUNCDESC:
12724 {
12725 if (h == NULL)
12726 {
12727 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12728 Elf_Internal_Rela outrel;
12729 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12730 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12731 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12732 bfd_vma seg = -1;
12733
12734 if (bfd_link_pic(info) && dynindx == 0)
12735 abort();
12736
12737 /* Replace static FUNCDESC relocation with a
12738 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12739 executable. */
12740 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12741 outrel.r_offset = input_section->output_section->vma
12742 + input_section->output_offset + rel->r_offset;
12743 outrel.r_addend = 0;
12744 if (bfd_link_pic(info))
12745 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12746 else
12747 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12748
12749 bfd_put_32 (input_bfd, sgot->output_section->vma
12750 + sgot->output_offset + offset, hit_data);
12751
12752 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12753 arm_elf_fill_funcdesc(output_bfd, info,
12754 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12755 dynindx, offset, addr, dynreloc_value, seg);
12756 }
12757 else
12758 {
12759 if (h->dynindx == -1)
12760 {
12761 int dynindx;
12762 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12763 bfd_vma addr;
12764 bfd_vma seg = -1;
12765 Elf_Internal_Rela outrel;
12766
12767 /* For static binaries sym_sec can be null. */
12768 if (sym_sec)
12769 {
12770 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12771 addr = dynreloc_value - sym_sec->output_section->vma;
12772 }
12773 else
12774 {
12775 dynindx = 0;
12776 addr = 0;
12777 }
12778
12779 if (bfd_link_pic(info) && dynindx == 0)
12780 abort();
12781
12782 /* Replace static FUNCDESC relocation with a
12783 R_ARM_RELATIVE dynamic relocation. */
12784 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12785 outrel.r_offset = input_section->output_section->vma
12786 + input_section->output_offset + rel->r_offset;
12787 outrel.r_addend = 0;
12788 if (bfd_link_pic(info))
12789 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12790 else
12791 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12792
12793 bfd_put_32 (input_bfd, sgot->output_section->vma
12794 + sgot->output_offset + offset, hit_data);
12795
12796 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12797 arm_elf_fill_funcdesc(output_bfd, info,
12798 &eh->fdpic_cnts.funcdesc_offset,
12799 dynindx, offset, addr, dynreloc_value, seg);
12800 }
12801 else
12802 {
12803 Elf_Internal_Rela outrel;
12804
12805 /* Add a dynamic relocation. */
12806 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12807 outrel.r_offset = input_section->output_section->vma
12808 + input_section->output_offset + rel->r_offset;
12809 outrel.r_addend = 0;
12810 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12811 }
12812 }
12813 }
12814 *unresolved_reloc_p = FALSE;
12815 return bfd_reloc_ok;
12816
12817 default:
12818 return bfd_reloc_notsupported;
12819 }
12820 }
12821
12822 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12823 static void
12824 arm_add_to_rel (bfd * abfd,
12825 bfd_byte * address,
12826 reloc_howto_type * howto,
12827 bfd_signed_vma increment)
12828 {
12829 bfd_signed_vma addend;
12830
12831 if (howto->type == R_ARM_THM_CALL
12832 || howto->type == R_ARM_THM_JUMP24)
12833 {
12834 int upper_insn, lower_insn;
12835 int upper, lower;
12836
12837 upper_insn = bfd_get_16 (abfd, address);
12838 lower_insn = bfd_get_16 (abfd, address + 2);
12839 upper = upper_insn & 0x7ff;
12840 lower = lower_insn & 0x7ff;
12841
12842 addend = (upper << 12) | (lower << 1);
12843 addend += increment;
12844 addend >>= 1;
12845
12846 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12847 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12848
12849 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12850 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12851 }
12852 else
12853 {
12854 bfd_vma contents;
12855
12856 contents = bfd_get_32 (abfd, address);
12857
12858 /* Get the (signed) value from the instruction. */
12859 addend = contents & howto->src_mask;
12860 if (addend & ((howto->src_mask + 1) >> 1))
12861 {
12862 bfd_signed_vma mask;
12863
12864 mask = -1;
12865 mask &= ~ howto->src_mask;
12866 addend |= mask;
12867 }
12868
12869 /* Add in the increment, (which is a byte value). */
12870 switch (howto->type)
12871 {
12872 default:
12873 addend += increment;
12874 break;
12875
12876 case R_ARM_PC24:
12877 case R_ARM_PLT32:
12878 case R_ARM_CALL:
12879 case R_ARM_JUMP24:
12880 addend <<= howto->size;
12881 addend += increment;
12882
12883 /* Should we check for overflow here ? */
12884
12885 /* Drop any undesired bits. */
12886 addend >>= howto->rightshift;
12887 break;
12888 }
12889
12890 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12891
12892 bfd_put_32 (abfd, contents, address);
12893 }
12894 }
12895
12896 #define IS_ARM_TLS_RELOC(R_TYPE) \
12897 ((R_TYPE) == R_ARM_TLS_GD32 \
12898 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
12899 || (R_TYPE) == R_ARM_TLS_LDO32 \
12900 || (R_TYPE) == R_ARM_TLS_LDM32 \
12901 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
12902 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12903 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12904 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12905 || (R_TYPE) == R_ARM_TLS_LE32 \
12906 || (R_TYPE) == R_ARM_TLS_IE32 \
12907 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
12908 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12909
12910 /* Specific set of relocations for the gnu tls dialect. */
12911 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12912 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12913 || (R_TYPE) == R_ARM_TLS_CALL \
12914 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12915 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12916 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12917
12918 /* Relocate an ARM ELF section. */
12919
12920 static bfd_boolean
12921 elf32_arm_relocate_section (bfd * output_bfd,
12922 struct bfd_link_info * info,
12923 bfd * input_bfd,
12924 asection * input_section,
12925 bfd_byte * contents,
12926 Elf_Internal_Rela * relocs,
12927 Elf_Internal_Sym * local_syms,
12928 asection ** local_sections)
12929 {
12930 Elf_Internal_Shdr *symtab_hdr;
12931 struct elf_link_hash_entry **sym_hashes;
12932 Elf_Internal_Rela *rel;
12933 Elf_Internal_Rela *relend;
12934 const char *name;
12935 struct elf32_arm_link_hash_table * globals;
12936
12937 globals = elf32_arm_hash_table (info);
12938 if (globals == NULL)
12939 return FALSE;
12940
12941 symtab_hdr = & elf_symtab_hdr (input_bfd);
12942 sym_hashes = elf_sym_hashes (input_bfd);
12943
12944 rel = relocs;
12945 relend = relocs + input_section->reloc_count;
12946 for (; rel < relend; rel++)
12947 {
12948 int r_type;
12949 reloc_howto_type * howto;
12950 unsigned long r_symndx;
12951 Elf_Internal_Sym * sym;
12952 asection * sec;
12953 struct elf_link_hash_entry * h;
12954 bfd_vma relocation;
12955 bfd_reloc_status_type r;
12956 arelent bfd_reloc;
12957 char sym_type;
12958 bfd_boolean unresolved_reloc = FALSE;
12959 char *error_message = NULL;
12960
12961 r_symndx = ELF32_R_SYM (rel->r_info);
12962 r_type = ELF32_R_TYPE (rel->r_info);
12963 r_type = arm_real_reloc_type (globals, r_type);
12964
12965 if ( r_type == R_ARM_GNU_VTENTRY
12966 || r_type == R_ARM_GNU_VTINHERIT)
12967 continue;
12968
12969 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12970
12971 if (howto == NULL)
12972 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
12973
12974 h = NULL;
12975 sym = NULL;
12976 sec = NULL;
12977
12978 if (r_symndx < symtab_hdr->sh_info)
12979 {
12980 sym = local_syms + r_symndx;
12981 sym_type = ELF32_ST_TYPE (sym->st_info);
12982 sec = local_sections[r_symndx];
12983
12984 /* An object file might have a reference to a local
12985 undefined symbol. This is a daft object file, but we
12986 should at least do something about it. V4BX & NONE
12987 relocations do not use the symbol and are explicitly
12988 allowed to use the undefined symbol, so allow those.
12989 Likewise for relocations against STN_UNDEF. */
12990 if (r_type != R_ARM_V4BX
12991 && r_type != R_ARM_NONE
12992 && r_symndx != STN_UNDEF
12993 && bfd_is_und_section (sec)
12994 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12995 (*info->callbacks->undefined_symbol)
12996 (info, bfd_elf_string_from_elf_section
12997 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12998 input_bfd, input_section,
12999 rel->r_offset, TRUE);
13000
13001 if (globals->use_rel)
13002 {
13003 relocation = (sec->output_section->vma
13004 + sec->output_offset
13005 + sym->st_value);
13006 if (!bfd_link_relocatable (info)
13007 && (sec->flags & SEC_MERGE)
13008 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13009 {
13010 asection *msec;
13011 bfd_vma addend, value;
13012
13013 switch (r_type)
13014 {
13015 case R_ARM_MOVW_ABS_NC:
13016 case R_ARM_MOVT_ABS:
13017 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13018 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13019 addend = (addend ^ 0x8000) - 0x8000;
13020 break;
13021
13022 case R_ARM_THM_MOVW_ABS_NC:
13023 case R_ARM_THM_MOVT_ABS:
13024 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13025 << 16;
13026 value |= bfd_get_16 (input_bfd,
13027 contents + rel->r_offset + 2);
13028 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13029 | ((value & 0x04000000) >> 15);
13030 addend = (addend ^ 0x8000) - 0x8000;
13031 break;
13032
13033 default:
13034 if (howto->rightshift
13035 || (howto->src_mask & (howto->src_mask + 1)))
13036 {
13037 _bfd_error_handler
13038 /* xgettext:c-format */
13039 (_("%pB(%pA+%#" PRIx64 "): "
13040 "%s relocation against SEC_MERGE section"),
13041 input_bfd, input_section,
13042 (uint64_t) rel->r_offset, howto->name);
13043 return FALSE;
13044 }
13045
13046 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13047
13048 /* Get the (signed) value from the instruction. */
13049 addend = value & howto->src_mask;
13050 if (addend & ((howto->src_mask + 1) >> 1))
13051 {
13052 bfd_signed_vma mask;
13053
13054 mask = -1;
13055 mask &= ~ howto->src_mask;
13056 addend |= mask;
13057 }
13058 break;
13059 }
13060
13061 msec = sec;
13062 addend =
13063 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13064 - relocation;
13065 addend += msec->output_section->vma + msec->output_offset;
13066
13067 /* Cases here must match those in the preceding
13068 switch statement. */
13069 switch (r_type)
13070 {
13071 case R_ARM_MOVW_ABS_NC:
13072 case R_ARM_MOVT_ABS:
13073 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13074 | (addend & 0xfff);
13075 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13076 break;
13077
13078 case R_ARM_THM_MOVW_ABS_NC:
13079 case R_ARM_THM_MOVT_ABS:
13080 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13081 | (addend & 0xff) | ((addend & 0x0800) << 15);
13082 bfd_put_16 (input_bfd, value >> 16,
13083 contents + rel->r_offset);
13084 bfd_put_16 (input_bfd, value,
13085 contents + rel->r_offset + 2);
13086 break;
13087
13088 default:
13089 value = (value & ~ howto->dst_mask)
13090 | (addend & howto->dst_mask);
13091 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13092 break;
13093 }
13094 }
13095 }
13096 else
13097 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13098 }
13099 else
13100 {
13101 bfd_boolean warned, ignored;
13102
13103 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13104 r_symndx, symtab_hdr, sym_hashes,
13105 h, sec, relocation,
13106 unresolved_reloc, warned, ignored);
13107
13108 sym_type = h->type;
13109 }
13110
13111 if (sec != NULL && discarded_section (sec))
13112 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13113 rel, 1, relend, howto, 0, contents);
13114
13115 if (bfd_link_relocatable (info))
13116 {
13117 /* This is a relocatable link. We don't have to change
13118 anything, unless the reloc is against a section symbol,
13119 in which case we have to adjust according to where the
13120 section symbol winds up in the output section. */
13121 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13122 {
13123 if (globals->use_rel)
13124 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13125 howto, (bfd_signed_vma) sec->output_offset);
13126 else
13127 rel->r_addend += sec->output_offset;
13128 }
13129 continue;
13130 }
13131
13132 if (h != NULL)
13133 name = h->root.root.string;
13134 else
13135 {
13136 name = (bfd_elf_string_from_elf_section
13137 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13138 if (name == NULL || *name == '\0')
13139 name = bfd_section_name (input_bfd, sec);
13140 }
13141
13142 if (r_symndx != STN_UNDEF
13143 && r_type != R_ARM_NONE
13144 && (h == NULL
13145 || h->root.type == bfd_link_hash_defined
13146 || h->root.type == bfd_link_hash_defweak)
13147 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13148 {
13149 _bfd_error_handler
13150 ((sym_type == STT_TLS
13151 /* xgettext:c-format */
13152 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13153 /* xgettext:c-format */
13154 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13155 input_bfd,
13156 input_section,
13157 (uint64_t) rel->r_offset,
13158 howto->name,
13159 name);
13160 }
13161
13162 /* We call elf32_arm_final_link_relocate unless we're completely
13163 done, i.e., the relaxation produced the final output we want,
13164 and we won't let anybody mess with it. Also, we have to do
13165 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13166 both in relaxed and non-relaxed cases. */
13167 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13168 || (IS_ARM_TLS_GNU_RELOC (r_type)
13169 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13170 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13171 & GOT_TLS_GDESC)))
13172 {
13173 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13174 contents, rel, h == NULL);
13175 /* This may have been marked unresolved because it came from
13176 a shared library. But we've just dealt with that. */
13177 unresolved_reloc = 0;
13178 }
13179 else
13180 r = bfd_reloc_continue;
13181
13182 if (r == bfd_reloc_continue)
13183 {
13184 unsigned char branch_type =
13185 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13186 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13187
13188 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13189 input_section, contents, rel,
13190 relocation, info, sec, name,
13191 sym_type, branch_type, h,
13192 &unresolved_reloc,
13193 &error_message);
13194 }
13195
13196 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13197 because such sections are not SEC_ALLOC and thus ld.so will
13198 not process them. */
13199 if (unresolved_reloc
13200 && !((input_section->flags & SEC_DEBUGGING) != 0
13201 && h->def_dynamic)
13202 && _bfd_elf_section_offset (output_bfd, info, input_section,
13203 rel->r_offset) != (bfd_vma) -1)
13204 {
13205 _bfd_error_handler
13206 /* xgettext:c-format */
13207 (_("%pB(%pA+%#" PRIx64 "): "
13208 "unresolvable %s relocation against symbol `%s'"),
13209 input_bfd,
13210 input_section,
13211 (uint64_t) rel->r_offset,
13212 howto->name,
13213 h->root.root.string);
13214 return FALSE;
13215 }
13216
13217 if (r != bfd_reloc_ok)
13218 {
13219 switch (r)
13220 {
13221 case bfd_reloc_overflow:
13222 /* If the overflowing reloc was to an undefined symbol,
13223 we have already printed one error message and there
13224 is no point complaining again. */
13225 if (!h || h->root.type != bfd_link_hash_undefined)
13226 (*info->callbacks->reloc_overflow)
13227 (info, (h ? &h->root : NULL), name, howto->name,
13228 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13229 break;
13230
13231 case bfd_reloc_undefined:
13232 (*info->callbacks->undefined_symbol)
13233 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
13234 break;
13235
13236 case bfd_reloc_outofrange:
13237 error_message = _("out of range");
13238 goto common_error;
13239
13240 case bfd_reloc_notsupported:
13241 error_message = _("unsupported relocation");
13242 goto common_error;
13243
13244 case bfd_reloc_dangerous:
13245 /* error_message should already be set. */
13246 goto common_error;
13247
13248 default:
13249 error_message = _("unknown error");
13250 /* Fall through. */
13251
13252 common_error:
13253 BFD_ASSERT (error_message != NULL);
13254 (*info->callbacks->reloc_dangerous)
13255 (info, error_message, input_bfd, input_section, rel->r_offset);
13256 break;
13257 }
13258 }
13259 }
13260
13261 return TRUE;
13262 }
13263
13264 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13265 adds the edit to the start of the list. (The list must be built in order of
13266 ascending TINDEX: the function's callers are primarily responsible for
13267 maintaining that condition). */
13268
13269 static void
13270 add_unwind_table_edit (arm_unwind_table_edit **head,
13271 arm_unwind_table_edit **tail,
13272 arm_unwind_edit_type type,
13273 asection *linked_section,
13274 unsigned int tindex)
13275 {
13276 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13277 xmalloc (sizeof (arm_unwind_table_edit));
13278
13279 new_edit->type = type;
13280 new_edit->linked_section = linked_section;
13281 new_edit->index = tindex;
13282
13283 if (tindex > 0)
13284 {
13285 new_edit->next = NULL;
13286
13287 if (*tail)
13288 (*tail)->next = new_edit;
13289
13290 (*tail) = new_edit;
13291
13292 if (!*head)
13293 (*head) = new_edit;
13294 }
13295 else
13296 {
13297 new_edit->next = *head;
13298
13299 if (!*tail)
13300 *tail = new_edit;
13301
13302 *head = new_edit;
13303 }
13304 }
13305
13306 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13307
13308 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13309 static void
13310 adjust_exidx_size(asection *exidx_sec, int adjust)
13311 {
13312 asection *out_sec;
13313
13314 if (!exidx_sec->rawsize)
13315 exidx_sec->rawsize = exidx_sec->size;
13316
13317 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
13318 out_sec = exidx_sec->output_section;
13319 /* Adjust size of output section. */
13320 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
13321 }
13322
13323 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13324 static void
13325 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13326 {
13327 struct _arm_elf_section_data *exidx_arm_data;
13328
13329 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13330 add_unwind_table_edit (
13331 &exidx_arm_data->u.exidx.unwind_edit_list,
13332 &exidx_arm_data->u.exidx.unwind_edit_tail,
13333 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13334
13335 exidx_arm_data->additional_reloc_count++;
13336
13337 adjust_exidx_size(exidx_sec, 8);
13338 }
13339
13340 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13341 made to those tables, such that:
13342
13343 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13344 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13345 codes which have been inlined into the index).
13346
13347 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13348
13349 The edits are applied when the tables are written
13350 (in elf32_arm_write_section). */
13351
13352 bfd_boolean
13353 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13354 unsigned int num_text_sections,
13355 struct bfd_link_info *info,
13356 bfd_boolean merge_exidx_entries)
13357 {
13358 bfd *inp;
13359 unsigned int last_second_word = 0, i;
13360 asection *last_exidx_sec = NULL;
13361 asection *last_text_sec = NULL;
13362 int last_unwind_type = -1;
13363
13364 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13365 text sections. */
13366 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13367 {
13368 asection *sec;
13369
13370 for (sec = inp->sections; sec != NULL; sec = sec->next)
13371 {
13372 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13373 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13374
13375 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13376 continue;
13377
13378 if (elf_sec->linked_to)
13379 {
13380 Elf_Internal_Shdr *linked_hdr
13381 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13382 struct _arm_elf_section_data *linked_sec_arm_data
13383 = get_arm_elf_section_data (linked_hdr->bfd_section);
13384
13385 if (linked_sec_arm_data == NULL)
13386 continue;
13387
13388 /* Link this .ARM.exidx section back from the text section it
13389 describes. */
13390 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13391 }
13392 }
13393 }
13394
13395 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13396 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13397 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13398
13399 for (i = 0; i < num_text_sections; i++)
13400 {
13401 asection *sec = text_section_order[i];
13402 asection *exidx_sec;
13403 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13404 struct _arm_elf_section_data *exidx_arm_data;
13405 bfd_byte *contents = NULL;
13406 int deleted_exidx_bytes = 0;
13407 bfd_vma j;
13408 arm_unwind_table_edit *unwind_edit_head = NULL;
13409 arm_unwind_table_edit *unwind_edit_tail = NULL;
13410 Elf_Internal_Shdr *hdr;
13411 bfd *ibfd;
13412
13413 if (arm_data == NULL)
13414 continue;
13415
13416 exidx_sec = arm_data->u.text.arm_exidx_sec;
13417 if (exidx_sec == NULL)
13418 {
13419 /* Section has no unwind data. */
13420 if (last_unwind_type == 0 || !last_exidx_sec)
13421 continue;
13422
13423 /* Ignore zero sized sections. */
13424 if (sec->size == 0)
13425 continue;
13426
13427 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13428 last_unwind_type = 0;
13429 continue;
13430 }
13431
13432 /* Skip /DISCARD/ sections. */
13433 if (bfd_is_abs_section (exidx_sec->output_section))
13434 continue;
13435
13436 hdr = &elf_section_data (exidx_sec)->this_hdr;
13437 if (hdr->sh_type != SHT_ARM_EXIDX)
13438 continue;
13439
13440 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13441 if (exidx_arm_data == NULL)
13442 continue;
13443
13444 ibfd = exidx_sec->owner;
13445
13446 if (hdr->contents != NULL)
13447 contents = hdr->contents;
13448 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13449 /* An error? */
13450 continue;
13451
13452 if (last_unwind_type > 0)
13453 {
13454 unsigned int first_word = bfd_get_32 (ibfd, contents);
13455 /* Add cantunwind if first unwind item does not match section
13456 start. */
13457 if (first_word != sec->vma)
13458 {
13459 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13460 last_unwind_type = 0;
13461 }
13462 }
13463
13464 for (j = 0; j < hdr->sh_size; j += 8)
13465 {
13466 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13467 int unwind_type;
13468 int elide = 0;
13469
13470 /* An EXIDX_CANTUNWIND entry. */
13471 if (second_word == 1)
13472 {
13473 if (last_unwind_type == 0)
13474 elide = 1;
13475 unwind_type = 0;
13476 }
13477 /* Inlined unwinding data. Merge if equal to previous. */
13478 else if ((second_word & 0x80000000) != 0)
13479 {
13480 if (merge_exidx_entries
13481 && last_second_word == second_word && last_unwind_type == 1)
13482 elide = 1;
13483 unwind_type = 1;
13484 last_second_word = second_word;
13485 }
13486 /* Normal table entry. In theory we could merge these too,
13487 but duplicate entries are likely to be much less common. */
13488 else
13489 unwind_type = 2;
13490
13491 if (elide && !bfd_link_relocatable (info))
13492 {
13493 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13494 DELETE_EXIDX_ENTRY, NULL, j / 8);
13495
13496 deleted_exidx_bytes += 8;
13497 }
13498
13499 last_unwind_type = unwind_type;
13500 }
13501
13502 /* Free contents if we allocated it ourselves. */
13503 if (contents != hdr->contents)
13504 free (contents);
13505
13506 /* Record edits to be applied later (in elf32_arm_write_section). */
13507 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13508 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13509
13510 if (deleted_exidx_bytes > 0)
13511 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13512
13513 last_exidx_sec = exidx_sec;
13514 last_text_sec = sec;
13515 }
13516
13517 /* Add terminating CANTUNWIND entry. */
13518 if (!bfd_link_relocatable (info) && last_exidx_sec
13519 && last_unwind_type != 0)
13520 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13521
13522 return TRUE;
13523 }
13524
13525 static bfd_boolean
13526 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13527 bfd *ibfd, const char *name)
13528 {
13529 asection *sec, *osec;
13530
13531 sec = bfd_get_linker_section (ibfd, name);
13532 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13533 return TRUE;
13534
13535 osec = sec->output_section;
13536 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13537 return TRUE;
13538
13539 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13540 sec->output_offset, sec->size))
13541 return FALSE;
13542
13543 return TRUE;
13544 }
13545
13546 static bfd_boolean
13547 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13548 {
13549 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13550 asection *sec, *osec;
13551
13552 if (globals == NULL)
13553 return FALSE;
13554
13555 /* Invoke the regular ELF backend linker to do all the work. */
13556 if (!bfd_elf_final_link (abfd, info))
13557 return FALSE;
13558
13559 /* Process stub sections (eg BE8 encoding, ...). */
13560 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13561 unsigned int i;
13562 for (i=0; i<htab->top_id; i++)
13563 {
13564 sec = htab->stub_group[i].stub_sec;
13565 /* Only process it once, in its link_sec slot. */
13566 if (sec && i == htab->stub_group[i].link_sec->id)
13567 {
13568 osec = sec->output_section;
13569 elf32_arm_write_section (abfd, info, sec, sec->contents);
13570 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13571 sec->output_offset, sec->size))
13572 return FALSE;
13573 }
13574 }
13575
13576 /* Write out any glue sections now that we have created all the
13577 stubs. */
13578 if (globals->bfd_of_glue_owner != NULL)
13579 {
13580 if (! elf32_arm_output_glue_section (info, abfd,
13581 globals->bfd_of_glue_owner,
13582 ARM2THUMB_GLUE_SECTION_NAME))
13583 return FALSE;
13584
13585 if (! elf32_arm_output_glue_section (info, abfd,
13586 globals->bfd_of_glue_owner,
13587 THUMB2ARM_GLUE_SECTION_NAME))
13588 return FALSE;
13589
13590 if (! elf32_arm_output_glue_section (info, abfd,
13591 globals->bfd_of_glue_owner,
13592 VFP11_ERRATUM_VENEER_SECTION_NAME))
13593 return FALSE;
13594
13595 if (! elf32_arm_output_glue_section (info, abfd,
13596 globals->bfd_of_glue_owner,
13597 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13598 return FALSE;
13599
13600 if (! elf32_arm_output_glue_section (info, abfd,
13601 globals->bfd_of_glue_owner,
13602 ARM_BX_GLUE_SECTION_NAME))
13603 return FALSE;
13604 }
13605
13606 return TRUE;
13607 }
13608
13609 /* Return a best guess for the machine number based on the attributes. */
13610
13611 static unsigned int
13612 bfd_arm_get_mach_from_attributes (bfd * abfd)
13613 {
13614 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13615
13616 switch (arch)
13617 {
13618 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13619 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13620 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13621
13622 case TAG_CPU_ARCH_V5TE:
13623 {
13624 char * name;
13625
13626 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13627 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13628
13629 if (name)
13630 {
13631 if (strcmp (name, "IWMMXT2") == 0)
13632 return bfd_mach_arm_iWMMXt2;
13633
13634 if (strcmp (name, "IWMMXT") == 0)
13635 return bfd_mach_arm_iWMMXt;
13636
13637 if (strcmp (name, "XSCALE") == 0)
13638 {
13639 int wmmx;
13640
13641 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13642 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13643 switch (wmmx)
13644 {
13645 case 1: return bfd_mach_arm_iWMMXt;
13646 case 2: return bfd_mach_arm_iWMMXt2;
13647 default: return bfd_mach_arm_XScale;
13648 }
13649 }
13650 }
13651
13652 return bfd_mach_arm_5TE;
13653 }
13654
13655 default:
13656 return bfd_mach_arm_unknown;
13657 }
13658 }
13659
13660 /* Set the right machine number. */
13661
13662 static bfd_boolean
13663 elf32_arm_object_p (bfd *abfd)
13664 {
13665 unsigned int mach;
13666
13667 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13668
13669 if (mach == bfd_mach_arm_unknown)
13670 {
13671 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13672 mach = bfd_mach_arm_ep9312;
13673 else
13674 mach = bfd_arm_get_mach_from_attributes (abfd);
13675 }
13676
13677 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13678 return TRUE;
13679 }
13680
13681 /* Function to keep ARM specific flags in the ELF header. */
13682
13683 static bfd_boolean
13684 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13685 {
13686 if (elf_flags_init (abfd)
13687 && elf_elfheader (abfd)->e_flags != flags)
13688 {
13689 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13690 {
13691 if (flags & EF_ARM_INTERWORK)
13692 _bfd_error_handler
13693 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13694 abfd);
13695 else
13696 _bfd_error_handler
13697 (_("warning: clearing the interworking flag of %pB due to outside request"),
13698 abfd);
13699 }
13700 }
13701 else
13702 {
13703 elf_elfheader (abfd)->e_flags = flags;
13704 elf_flags_init (abfd) = TRUE;
13705 }
13706
13707 return TRUE;
13708 }
13709
13710 /* Copy backend specific data from one object module to another. */
13711
13712 static bfd_boolean
13713 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13714 {
13715 flagword in_flags;
13716 flagword out_flags;
13717
13718 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13719 return TRUE;
13720
13721 in_flags = elf_elfheader (ibfd)->e_flags;
13722 out_flags = elf_elfheader (obfd)->e_flags;
13723
13724 if (elf_flags_init (obfd)
13725 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13726 && in_flags != out_flags)
13727 {
13728 /* Cannot mix APCS26 and APCS32 code. */
13729 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13730 return FALSE;
13731
13732 /* Cannot mix float APCS and non-float APCS code. */
13733 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13734 return FALSE;
13735
13736 /* If the src and dest have different interworking flags
13737 then turn off the interworking bit. */
13738 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13739 {
13740 if (out_flags & EF_ARM_INTERWORK)
13741 _bfd_error_handler
13742 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13743 obfd, ibfd);
13744
13745 in_flags &= ~EF_ARM_INTERWORK;
13746 }
13747
13748 /* Likewise for PIC, though don't warn for this case. */
13749 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13750 in_flags &= ~EF_ARM_PIC;
13751 }
13752
13753 elf_elfheader (obfd)->e_flags = in_flags;
13754 elf_flags_init (obfd) = TRUE;
13755
13756 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13757 }
13758
13759 /* Values for Tag_ABI_PCS_R9_use. */
13760 enum
13761 {
13762 AEABI_R9_V6,
13763 AEABI_R9_SB,
13764 AEABI_R9_TLS,
13765 AEABI_R9_unused
13766 };
13767
13768 /* Values for Tag_ABI_PCS_RW_data. */
13769 enum
13770 {
13771 AEABI_PCS_RW_data_absolute,
13772 AEABI_PCS_RW_data_PCrel,
13773 AEABI_PCS_RW_data_SBrel,
13774 AEABI_PCS_RW_data_unused
13775 };
13776
13777 /* Values for Tag_ABI_enum_size. */
13778 enum
13779 {
13780 AEABI_enum_unused,
13781 AEABI_enum_short,
13782 AEABI_enum_wide,
13783 AEABI_enum_forced_wide
13784 };
13785
13786 /* Determine whether an object attribute tag takes an integer, a
13787 string or both. */
13788
13789 static int
13790 elf32_arm_obj_attrs_arg_type (int tag)
13791 {
13792 if (tag == Tag_compatibility)
13793 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13794 else if (tag == Tag_nodefaults)
13795 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13796 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13797 return ATTR_TYPE_FLAG_STR_VAL;
13798 else if (tag < 32)
13799 return ATTR_TYPE_FLAG_INT_VAL;
13800 else
13801 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13802 }
13803
13804 /* The ABI defines that Tag_conformance should be emitted first, and that
13805 Tag_nodefaults should be second (if either is defined). This sets those
13806 two positions, and bumps up the position of all the remaining tags to
13807 compensate. */
13808 static int
13809 elf32_arm_obj_attrs_order (int num)
13810 {
13811 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13812 return Tag_conformance;
13813 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13814 return Tag_nodefaults;
13815 if ((num - 2) < Tag_nodefaults)
13816 return num - 2;
13817 if ((num - 1) < Tag_conformance)
13818 return num - 1;
13819 return num;
13820 }
13821
13822 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13823 static bfd_boolean
13824 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13825 {
13826 if ((tag & 127) < 64)
13827 {
13828 _bfd_error_handler
13829 (_("%pB: unknown mandatory EABI object attribute %d"),
13830 abfd, tag);
13831 bfd_set_error (bfd_error_bad_value);
13832 return FALSE;
13833 }
13834 else
13835 {
13836 _bfd_error_handler
13837 (_("warning: %pB: unknown EABI object attribute %d"),
13838 abfd, tag);
13839 return TRUE;
13840 }
13841 }
13842
13843 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13844 Returns -1 if no architecture could be read. */
13845
13846 static int
13847 get_secondary_compatible_arch (bfd *abfd)
13848 {
13849 obj_attribute *attr =
13850 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13851
13852 /* Note: the tag and its argument below are uleb128 values, though
13853 currently-defined values fit in one byte for each. */
13854 if (attr->s
13855 && attr->s[0] == Tag_CPU_arch
13856 && (attr->s[1] & 128) != 128
13857 && attr->s[2] == 0)
13858 return attr->s[1];
13859
13860 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13861 return -1;
13862 }
13863
13864 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13865 The tag is removed if ARCH is -1. */
13866
13867 static void
13868 set_secondary_compatible_arch (bfd *abfd, int arch)
13869 {
13870 obj_attribute *attr =
13871 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13872
13873 if (arch == -1)
13874 {
13875 attr->s = NULL;
13876 return;
13877 }
13878
13879 /* Note: the tag and its argument below are uleb128 values, though
13880 currently-defined values fit in one byte for each. */
13881 if (!attr->s)
13882 attr->s = (char *) bfd_alloc (abfd, 3);
13883 attr->s[0] = Tag_CPU_arch;
13884 attr->s[1] = arch;
13885 attr->s[2] = '\0';
13886 }
13887
13888 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13889 into account. */
13890
13891 static int
13892 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13893 int newtag, int secondary_compat)
13894 {
13895 #define T(X) TAG_CPU_ARCH_##X
13896 int tagl, tagh, result;
13897 const int v6t2[] =
13898 {
13899 T(V6T2), /* PRE_V4. */
13900 T(V6T2), /* V4. */
13901 T(V6T2), /* V4T. */
13902 T(V6T2), /* V5T. */
13903 T(V6T2), /* V5TE. */
13904 T(V6T2), /* V5TEJ. */
13905 T(V6T2), /* V6. */
13906 T(V7), /* V6KZ. */
13907 T(V6T2) /* V6T2. */
13908 };
13909 const int v6k[] =
13910 {
13911 T(V6K), /* PRE_V4. */
13912 T(V6K), /* V4. */
13913 T(V6K), /* V4T. */
13914 T(V6K), /* V5T. */
13915 T(V6K), /* V5TE. */
13916 T(V6K), /* V5TEJ. */
13917 T(V6K), /* V6. */
13918 T(V6KZ), /* V6KZ. */
13919 T(V7), /* V6T2. */
13920 T(V6K) /* V6K. */
13921 };
13922 const int v7[] =
13923 {
13924 T(V7), /* PRE_V4. */
13925 T(V7), /* V4. */
13926 T(V7), /* V4T. */
13927 T(V7), /* V5T. */
13928 T(V7), /* V5TE. */
13929 T(V7), /* V5TEJ. */
13930 T(V7), /* V6. */
13931 T(V7), /* V6KZ. */
13932 T(V7), /* V6T2. */
13933 T(V7), /* V6K. */
13934 T(V7) /* V7. */
13935 };
13936 const int v6_m[] =
13937 {
13938 -1, /* PRE_V4. */
13939 -1, /* V4. */
13940 T(V6K), /* V4T. */
13941 T(V6K), /* V5T. */
13942 T(V6K), /* V5TE. */
13943 T(V6K), /* V5TEJ. */
13944 T(V6K), /* V6. */
13945 T(V6KZ), /* V6KZ. */
13946 T(V7), /* V6T2. */
13947 T(V6K), /* V6K. */
13948 T(V7), /* V7. */
13949 T(V6_M) /* V6_M. */
13950 };
13951 const int v6s_m[] =
13952 {
13953 -1, /* PRE_V4. */
13954 -1, /* V4. */
13955 T(V6K), /* V4T. */
13956 T(V6K), /* V5T. */
13957 T(V6K), /* V5TE. */
13958 T(V6K), /* V5TEJ. */
13959 T(V6K), /* V6. */
13960 T(V6KZ), /* V6KZ. */
13961 T(V7), /* V6T2. */
13962 T(V6K), /* V6K. */
13963 T(V7), /* V7. */
13964 T(V6S_M), /* V6_M. */
13965 T(V6S_M) /* V6S_M. */
13966 };
13967 const int v7e_m[] =
13968 {
13969 -1, /* PRE_V4. */
13970 -1, /* V4. */
13971 T(V7E_M), /* V4T. */
13972 T(V7E_M), /* V5T. */
13973 T(V7E_M), /* V5TE. */
13974 T(V7E_M), /* V5TEJ. */
13975 T(V7E_M), /* V6. */
13976 T(V7E_M), /* V6KZ. */
13977 T(V7E_M), /* V6T2. */
13978 T(V7E_M), /* V6K. */
13979 T(V7E_M), /* V7. */
13980 T(V7E_M), /* V6_M. */
13981 T(V7E_M), /* V6S_M. */
13982 T(V7E_M) /* V7E_M. */
13983 };
13984 const int v8[] =
13985 {
13986 T(V8), /* PRE_V4. */
13987 T(V8), /* V4. */
13988 T(V8), /* V4T. */
13989 T(V8), /* V5T. */
13990 T(V8), /* V5TE. */
13991 T(V8), /* V5TEJ. */
13992 T(V8), /* V6. */
13993 T(V8), /* V6KZ. */
13994 T(V8), /* V6T2. */
13995 T(V8), /* V6K. */
13996 T(V8), /* V7. */
13997 T(V8), /* V6_M. */
13998 T(V8), /* V6S_M. */
13999 T(V8), /* V7E_M. */
14000 T(V8) /* V8. */
14001 };
14002 const int v8r[] =
14003 {
14004 T(V8R), /* PRE_V4. */
14005 T(V8R), /* V4. */
14006 T(V8R), /* V4T. */
14007 T(V8R), /* V5T. */
14008 T(V8R), /* V5TE. */
14009 T(V8R), /* V5TEJ. */
14010 T(V8R), /* V6. */
14011 T(V8R), /* V6KZ. */
14012 T(V8R), /* V6T2. */
14013 T(V8R), /* V6K. */
14014 T(V8R), /* V7. */
14015 T(V8R), /* V6_M. */
14016 T(V8R), /* V6S_M. */
14017 T(V8R), /* V7E_M. */
14018 T(V8), /* V8. */
14019 T(V8R), /* V8R. */
14020 };
14021 const int v8m_baseline[] =
14022 {
14023 -1, /* PRE_V4. */
14024 -1, /* V4. */
14025 -1, /* V4T. */
14026 -1, /* V5T. */
14027 -1, /* V5TE. */
14028 -1, /* V5TEJ. */
14029 -1, /* V6. */
14030 -1, /* V6KZ. */
14031 -1, /* V6T2. */
14032 -1, /* V6K. */
14033 -1, /* V7. */
14034 T(V8M_BASE), /* V6_M. */
14035 T(V8M_BASE), /* V6S_M. */
14036 -1, /* V7E_M. */
14037 -1, /* V8. */
14038 -1, /* V8R. */
14039 T(V8M_BASE) /* V8-M BASELINE. */
14040 };
14041 const int v8m_mainline[] =
14042 {
14043 -1, /* PRE_V4. */
14044 -1, /* V4. */
14045 -1, /* V4T. */
14046 -1, /* V5T. */
14047 -1, /* V5TE. */
14048 -1, /* V5TEJ. */
14049 -1, /* V6. */
14050 -1, /* V6KZ. */
14051 -1, /* V6T2. */
14052 -1, /* V6K. */
14053 T(V8M_MAIN), /* V7. */
14054 T(V8M_MAIN), /* V6_M. */
14055 T(V8M_MAIN), /* V6S_M. */
14056 T(V8M_MAIN), /* V7E_M. */
14057 -1, /* V8. */
14058 -1, /* V8R. */
14059 T(V8M_MAIN), /* V8-M BASELINE. */
14060 T(V8M_MAIN) /* V8-M MAINLINE. */
14061 };
14062 const int v4t_plus_v6_m[] =
14063 {
14064 -1, /* PRE_V4. */
14065 -1, /* V4. */
14066 T(V4T), /* V4T. */
14067 T(V5T), /* V5T. */
14068 T(V5TE), /* V5TE. */
14069 T(V5TEJ), /* V5TEJ. */
14070 T(V6), /* V6. */
14071 T(V6KZ), /* V6KZ. */
14072 T(V6T2), /* V6T2. */
14073 T(V6K), /* V6K. */
14074 T(V7), /* V7. */
14075 T(V6_M), /* V6_M. */
14076 T(V6S_M), /* V6S_M. */
14077 T(V7E_M), /* V7E_M. */
14078 T(V8), /* V8. */
14079 -1, /* V8R. */
14080 T(V8M_BASE), /* V8-M BASELINE. */
14081 T(V8M_MAIN), /* V8-M MAINLINE. */
14082 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14083 };
14084 const int *comb[] =
14085 {
14086 v6t2,
14087 v6k,
14088 v7,
14089 v6_m,
14090 v6s_m,
14091 v7e_m,
14092 v8,
14093 v8r,
14094 v8m_baseline,
14095 v8m_mainline,
14096 /* Pseudo-architecture. */
14097 v4t_plus_v6_m
14098 };
14099
14100 /* Check we've not got a higher architecture than we know about. */
14101
14102 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14103 {
14104 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14105 return -1;
14106 }
14107
14108 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14109
14110 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14111 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14112 oldtag = T(V4T_PLUS_V6_M);
14113
14114 /* And override the new tag if we have a Tag_also_compatible_with on the
14115 input. */
14116
14117 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14118 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14119 newtag = T(V4T_PLUS_V6_M);
14120
14121 tagl = (oldtag < newtag) ? oldtag : newtag;
14122 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14123
14124 /* Architectures before V6KZ add features monotonically. */
14125 if (tagh <= TAG_CPU_ARCH_V6KZ)
14126 return result;
14127
14128 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14129
14130 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14131 as the canonical version. */
14132 if (result == T(V4T_PLUS_V6_M))
14133 {
14134 result = T(V4T);
14135 *secondary_compat_out = T(V6_M);
14136 }
14137 else
14138 *secondary_compat_out = -1;
14139
14140 if (result == -1)
14141 {
14142 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14143 ibfd, oldtag, newtag);
14144 return -1;
14145 }
14146
14147 return result;
14148 #undef T
14149 }
14150
14151 /* Query attributes object to see if integer divide instructions may be
14152 present in an object. */
14153 static bfd_boolean
14154 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14155 {
14156 int arch = attr[Tag_CPU_arch].i;
14157 int profile = attr[Tag_CPU_arch_profile].i;
14158
14159 switch (attr[Tag_DIV_use].i)
14160 {
14161 case 0:
14162 /* Integer divide allowed if instruction contained in archetecture. */
14163 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14164 return TRUE;
14165 else if (arch >= TAG_CPU_ARCH_V7E_M)
14166 return TRUE;
14167 else
14168 return FALSE;
14169
14170 case 1:
14171 /* Integer divide explicitly prohibited. */
14172 return FALSE;
14173
14174 default:
14175 /* Unrecognised case - treat as allowing divide everywhere. */
14176 case 2:
14177 /* Integer divide allowed in ARM state. */
14178 return TRUE;
14179 }
14180 }
14181
14182 /* Query attributes object to see if integer divide instructions are
14183 forbidden to be in the object. This is not the inverse of
14184 elf32_arm_attributes_accept_div. */
14185 static bfd_boolean
14186 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14187 {
14188 return attr[Tag_DIV_use].i == 1;
14189 }
14190
14191 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14192 are conflicting attributes. */
14193
14194 static bfd_boolean
14195 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14196 {
14197 bfd *obfd = info->output_bfd;
14198 obj_attribute *in_attr;
14199 obj_attribute *out_attr;
14200 /* Some tags have 0 = don't care, 1 = strong requirement,
14201 2 = weak requirement. */
14202 static const int order_021[3] = {0, 2, 1};
14203 int i;
14204 bfd_boolean result = TRUE;
14205 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14206
14207 /* Skip the linker stubs file. This preserves previous behavior
14208 of accepting unknown attributes in the first input file - but
14209 is that a bug? */
14210 if (ibfd->flags & BFD_LINKER_CREATED)
14211 return TRUE;
14212
14213 /* Skip any input that hasn't attribute section.
14214 This enables to link object files without attribute section with
14215 any others. */
14216 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14217 return TRUE;
14218
14219 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14220 {
14221 /* This is the first object. Copy the attributes. */
14222 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14223
14224 out_attr = elf_known_obj_attributes_proc (obfd);
14225
14226 /* Use the Tag_null value to indicate the attributes have been
14227 initialized. */
14228 out_attr[0].i = 1;
14229
14230 /* We do not output objects with Tag_MPextension_use_legacy - we move
14231 the attribute's value to Tag_MPextension_use. */
14232 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14233 {
14234 if (out_attr[Tag_MPextension_use].i != 0
14235 && out_attr[Tag_MPextension_use_legacy].i
14236 != out_attr[Tag_MPextension_use].i)
14237 {
14238 _bfd_error_handler
14239 (_("Error: %pB has both the current and legacy "
14240 "Tag_MPextension_use attributes"), ibfd);
14241 result = FALSE;
14242 }
14243
14244 out_attr[Tag_MPextension_use] =
14245 out_attr[Tag_MPextension_use_legacy];
14246 out_attr[Tag_MPextension_use_legacy].type = 0;
14247 out_attr[Tag_MPextension_use_legacy].i = 0;
14248 }
14249
14250 return result;
14251 }
14252
14253 in_attr = elf_known_obj_attributes_proc (ibfd);
14254 out_attr = elf_known_obj_attributes_proc (obfd);
14255 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14256 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14257 {
14258 /* Ignore mismatches if the object doesn't use floating point or is
14259 floating point ABI independent. */
14260 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14261 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14262 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14263 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14264 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14265 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14266 {
14267 _bfd_error_handler
14268 (_("error: %pB uses VFP register arguments, %pB does not"),
14269 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14270 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14271 result = FALSE;
14272 }
14273 }
14274
14275 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14276 {
14277 /* Merge this attribute with existing attributes. */
14278 switch (i)
14279 {
14280 case Tag_CPU_raw_name:
14281 case Tag_CPU_name:
14282 /* These are merged after Tag_CPU_arch. */
14283 break;
14284
14285 case Tag_ABI_optimization_goals:
14286 case Tag_ABI_FP_optimization_goals:
14287 /* Use the first value seen. */
14288 break;
14289
14290 case Tag_CPU_arch:
14291 {
14292 int secondary_compat = -1, secondary_compat_out = -1;
14293 unsigned int saved_out_attr = out_attr[i].i;
14294 int arch_attr;
14295 static const char *name_table[] =
14296 {
14297 /* These aren't real CPU names, but we can't guess
14298 that from the architecture version alone. */
14299 "Pre v4",
14300 "ARM v4",
14301 "ARM v4T",
14302 "ARM v5T",
14303 "ARM v5TE",
14304 "ARM v5TEJ",
14305 "ARM v6",
14306 "ARM v6KZ",
14307 "ARM v6T2",
14308 "ARM v6K",
14309 "ARM v7",
14310 "ARM v6-M",
14311 "ARM v6S-M",
14312 "ARM v8",
14313 "",
14314 "ARM v8-M.baseline",
14315 "ARM v8-M.mainline",
14316 };
14317
14318 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14319 secondary_compat = get_secondary_compatible_arch (ibfd);
14320 secondary_compat_out = get_secondary_compatible_arch (obfd);
14321 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14322 &secondary_compat_out,
14323 in_attr[i].i,
14324 secondary_compat);
14325
14326 /* Return with error if failed to merge. */
14327 if (arch_attr == -1)
14328 return FALSE;
14329
14330 out_attr[i].i = arch_attr;
14331
14332 set_secondary_compatible_arch (obfd, secondary_compat_out);
14333
14334 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14335 if (out_attr[i].i == saved_out_attr)
14336 ; /* Leave the names alone. */
14337 else if (out_attr[i].i == in_attr[i].i)
14338 {
14339 /* The output architecture has been changed to match the
14340 input architecture. Use the input names. */
14341 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14342 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14343 : NULL;
14344 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14345 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14346 : NULL;
14347 }
14348 else
14349 {
14350 out_attr[Tag_CPU_name].s = NULL;
14351 out_attr[Tag_CPU_raw_name].s = NULL;
14352 }
14353
14354 /* If we still don't have a value for Tag_CPU_name,
14355 make one up now. Tag_CPU_raw_name remains blank. */
14356 if (out_attr[Tag_CPU_name].s == NULL
14357 && out_attr[i].i < ARRAY_SIZE (name_table))
14358 out_attr[Tag_CPU_name].s =
14359 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14360 }
14361 break;
14362
14363 case Tag_ARM_ISA_use:
14364 case Tag_THUMB_ISA_use:
14365 case Tag_WMMX_arch:
14366 case Tag_Advanced_SIMD_arch:
14367 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14368 case Tag_ABI_FP_rounding:
14369 case Tag_ABI_FP_exceptions:
14370 case Tag_ABI_FP_user_exceptions:
14371 case Tag_ABI_FP_number_model:
14372 case Tag_FP_HP_extension:
14373 case Tag_CPU_unaligned_access:
14374 case Tag_T2EE_use:
14375 case Tag_MPextension_use:
14376 /* Use the largest value specified. */
14377 if (in_attr[i].i > out_attr[i].i)
14378 out_attr[i].i = in_attr[i].i;
14379 break;
14380
14381 case Tag_ABI_align_preserved:
14382 case Tag_ABI_PCS_RO_data:
14383 /* Use the smallest value specified. */
14384 if (in_attr[i].i < out_attr[i].i)
14385 out_attr[i].i = in_attr[i].i;
14386 break;
14387
14388 case Tag_ABI_align_needed:
14389 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14390 && (in_attr[Tag_ABI_align_preserved].i == 0
14391 || out_attr[Tag_ABI_align_preserved].i == 0))
14392 {
14393 /* This error message should be enabled once all non-conformant
14394 binaries in the toolchain have had the attributes set
14395 properly.
14396 _bfd_error_handler
14397 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14398 obfd, ibfd);
14399 result = FALSE; */
14400 }
14401 /* Fall through. */
14402 case Tag_ABI_FP_denormal:
14403 case Tag_ABI_PCS_GOT_use:
14404 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14405 value if greater than 2 (for future-proofing). */
14406 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14407 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14408 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14409 out_attr[i].i = in_attr[i].i;
14410 break;
14411
14412 case Tag_Virtualization_use:
14413 /* The virtualization tag effectively stores two bits of
14414 information: the intended use of TrustZone (in bit 0), and the
14415 intended use of Virtualization (in bit 1). */
14416 if (out_attr[i].i == 0)
14417 out_attr[i].i = in_attr[i].i;
14418 else if (in_attr[i].i != 0
14419 && in_attr[i].i != out_attr[i].i)
14420 {
14421 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14422 out_attr[i].i = 3;
14423 else
14424 {
14425 _bfd_error_handler
14426 (_("error: %pB: unable to merge virtualization attributes "
14427 "with %pB"),
14428 obfd, ibfd);
14429 result = FALSE;
14430 }
14431 }
14432 break;
14433
14434 case Tag_CPU_arch_profile:
14435 if (out_attr[i].i != in_attr[i].i)
14436 {
14437 /* 0 will merge with anything.
14438 'A' and 'S' merge to 'A'.
14439 'R' and 'S' merge to 'R'.
14440 'M' and 'A|R|S' is an error. */
14441 if (out_attr[i].i == 0
14442 || (out_attr[i].i == 'S'
14443 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14444 out_attr[i].i = in_attr[i].i;
14445 else if (in_attr[i].i == 0
14446 || (in_attr[i].i == 'S'
14447 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14448 ; /* Do nothing. */
14449 else
14450 {
14451 _bfd_error_handler
14452 (_("error: %pB: conflicting architecture profiles %c/%c"),
14453 ibfd,
14454 in_attr[i].i ? in_attr[i].i : '0',
14455 out_attr[i].i ? out_attr[i].i : '0');
14456 result = FALSE;
14457 }
14458 }
14459 break;
14460
14461 case Tag_DSP_extension:
14462 /* No need to change output value if any of:
14463 - pre (<=) ARMv5T input architecture (do not have DSP)
14464 - M input profile not ARMv7E-M and do not have DSP. */
14465 if (in_attr[Tag_CPU_arch].i <= 3
14466 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14467 && in_attr[Tag_CPU_arch].i != 13
14468 && in_attr[i].i == 0))
14469 ; /* Do nothing. */
14470 /* Output value should be 0 if DSP part of architecture, ie.
14471 - post (>=) ARMv5te architecture output
14472 - A, R or S profile output or ARMv7E-M output architecture. */
14473 else if (out_attr[Tag_CPU_arch].i >= 4
14474 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14475 || out_attr[Tag_CPU_arch_profile].i == 'R'
14476 || out_attr[Tag_CPU_arch_profile].i == 'S'
14477 || out_attr[Tag_CPU_arch].i == 13))
14478 out_attr[i].i = 0;
14479 /* Otherwise, DSP instructions are added and not part of output
14480 architecture. */
14481 else
14482 out_attr[i].i = 1;
14483 break;
14484
14485 case Tag_FP_arch:
14486 {
14487 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14488 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14489 when it's 0. It might mean absence of FP hardware if
14490 Tag_FP_arch is zero. */
14491
14492 #define VFP_VERSION_COUNT 9
14493 static const struct
14494 {
14495 int ver;
14496 int regs;
14497 } vfp_versions[VFP_VERSION_COUNT] =
14498 {
14499 {0, 0},
14500 {1, 16},
14501 {2, 16},
14502 {3, 32},
14503 {3, 16},
14504 {4, 32},
14505 {4, 16},
14506 {8, 32},
14507 {8, 16}
14508 };
14509 int ver;
14510 int regs;
14511 int newval;
14512
14513 /* If the output has no requirement about FP hardware,
14514 follow the requirement of the input. */
14515 if (out_attr[i].i == 0)
14516 {
14517 /* This assert is still reasonable, we shouldn't
14518 produce the suspicious build attribute
14519 combination (See below for in_attr). */
14520 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14521 out_attr[i].i = in_attr[i].i;
14522 out_attr[Tag_ABI_HardFP_use].i
14523 = in_attr[Tag_ABI_HardFP_use].i;
14524 break;
14525 }
14526 /* If the input has no requirement about FP hardware, do
14527 nothing. */
14528 else if (in_attr[i].i == 0)
14529 {
14530 /* We used to assert that Tag_ABI_HardFP_use was
14531 zero here, but we should never assert when
14532 consuming an object file that has suspicious
14533 build attributes. The single precision variant
14534 of 'no FP architecture' is still 'no FP
14535 architecture', so we just ignore the tag in this
14536 case. */
14537 break;
14538 }
14539
14540 /* Both the input and the output have nonzero Tag_FP_arch.
14541 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14542
14543 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14544 do nothing. */
14545 if (in_attr[Tag_ABI_HardFP_use].i == 0
14546 && out_attr[Tag_ABI_HardFP_use].i == 0)
14547 ;
14548 /* If the input and the output have different Tag_ABI_HardFP_use,
14549 the combination of them is 0 (implied by Tag_FP_arch). */
14550 else if (in_attr[Tag_ABI_HardFP_use].i
14551 != out_attr[Tag_ABI_HardFP_use].i)
14552 out_attr[Tag_ABI_HardFP_use].i = 0;
14553
14554 /* Now we can handle Tag_FP_arch. */
14555
14556 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14557 pick the biggest. */
14558 if (in_attr[i].i >= VFP_VERSION_COUNT
14559 && in_attr[i].i > out_attr[i].i)
14560 {
14561 out_attr[i] = in_attr[i];
14562 break;
14563 }
14564 /* The output uses the superset of input features
14565 (ISA version) and registers. */
14566 ver = vfp_versions[in_attr[i].i].ver;
14567 if (ver < vfp_versions[out_attr[i].i].ver)
14568 ver = vfp_versions[out_attr[i].i].ver;
14569 regs = vfp_versions[in_attr[i].i].regs;
14570 if (regs < vfp_versions[out_attr[i].i].regs)
14571 regs = vfp_versions[out_attr[i].i].regs;
14572 /* This assumes all possible supersets are also a valid
14573 options. */
14574 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14575 {
14576 if (regs == vfp_versions[newval].regs
14577 && ver == vfp_versions[newval].ver)
14578 break;
14579 }
14580 out_attr[i].i = newval;
14581 }
14582 break;
14583 case Tag_PCS_config:
14584 if (out_attr[i].i == 0)
14585 out_attr[i].i = in_attr[i].i;
14586 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14587 {
14588 /* It's sometimes ok to mix different configs, so this is only
14589 a warning. */
14590 _bfd_error_handler
14591 (_("warning: %pB: conflicting platform configuration"), ibfd);
14592 }
14593 break;
14594 case Tag_ABI_PCS_R9_use:
14595 if (in_attr[i].i != out_attr[i].i
14596 && out_attr[i].i != AEABI_R9_unused
14597 && in_attr[i].i != AEABI_R9_unused)
14598 {
14599 _bfd_error_handler
14600 (_("error: %pB: conflicting use of R9"), ibfd);
14601 result = FALSE;
14602 }
14603 if (out_attr[i].i == AEABI_R9_unused)
14604 out_attr[i].i = in_attr[i].i;
14605 break;
14606 case Tag_ABI_PCS_RW_data:
14607 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14608 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14609 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14610 {
14611 _bfd_error_handler
14612 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14613 ibfd);
14614 result = FALSE;
14615 }
14616 /* Use the smallest value specified. */
14617 if (in_attr[i].i < out_attr[i].i)
14618 out_attr[i].i = in_attr[i].i;
14619 break;
14620 case Tag_ABI_PCS_wchar_t:
14621 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14622 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14623 {
14624 _bfd_error_handler
14625 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14626 ibfd, in_attr[i].i, out_attr[i].i);
14627 }
14628 else if (in_attr[i].i && !out_attr[i].i)
14629 out_attr[i].i = in_attr[i].i;
14630 break;
14631 case Tag_ABI_enum_size:
14632 if (in_attr[i].i != AEABI_enum_unused)
14633 {
14634 if (out_attr[i].i == AEABI_enum_unused
14635 || out_attr[i].i == AEABI_enum_forced_wide)
14636 {
14637 /* The existing object is compatible with anything.
14638 Use whatever requirements the new object has. */
14639 out_attr[i].i = in_attr[i].i;
14640 }
14641 else if (in_attr[i].i != AEABI_enum_forced_wide
14642 && out_attr[i].i != in_attr[i].i
14643 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14644 {
14645 static const char *aeabi_enum_names[] =
14646 { "", "variable-size", "32-bit", "" };
14647 const char *in_name =
14648 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14649 ? aeabi_enum_names[in_attr[i].i]
14650 : "<unknown>";
14651 const char *out_name =
14652 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14653 ? aeabi_enum_names[out_attr[i].i]
14654 : "<unknown>";
14655 _bfd_error_handler
14656 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14657 ibfd, in_name, out_name);
14658 }
14659 }
14660 break;
14661 case Tag_ABI_VFP_args:
14662 /* Aready done. */
14663 break;
14664 case Tag_ABI_WMMX_args:
14665 if (in_attr[i].i != out_attr[i].i)
14666 {
14667 _bfd_error_handler
14668 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14669 ibfd, obfd);
14670 result = FALSE;
14671 }
14672 break;
14673 case Tag_compatibility:
14674 /* Merged in target-independent code. */
14675 break;
14676 case Tag_ABI_HardFP_use:
14677 /* This is handled along with Tag_FP_arch. */
14678 break;
14679 case Tag_ABI_FP_16bit_format:
14680 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14681 {
14682 if (in_attr[i].i != out_attr[i].i)
14683 {
14684 _bfd_error_handler
14685 (_("error: fp16 format mismatch between %pB and %pB"),
14686 ibfd, obfd);
14687 result = FALSE;
14688 }
14689 }
14690 if (in_attr[i].i != 0)
14691 out_attr[i].i = in_attr[i].i;
14692 break;
14693
14694 case Tag_DIV_use:
14695 /* A value of zero on input means that the divide instruction may
14696 be used if available in the base architecture as specified via
14697 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14698 the user did not want divide instructions. A value of 2
14699 explicitly means that divide instructions were allowed in ARM
14700 and Thumb state. */
14701 if (in_attr[i].i == out_attr[i].i)
14702 /* Do nothing. */ ;
14703 else if (elf32_arm_attributes_forbid_div (in_attr)
14704 && !elf32_arm_attributes_accept_div (out_attr))
14705 out_attr[i].i = 1;
14706 else if (elf32_arm_attributes_forbid_div (out_attr)
14707 && elf32_arm_attributes_accept_div (in_attr))
14708 out_attr[i].i = in_attr[i].i;
14709 else if (in_attr[i].i == 2)
14710 out_attr[i].i = in_attr[i].i;
14711 break;
14712
14713 case Tag_MPextension_use_legacy:
14714 /* We don't output objects with Tag_MPextension_use_legacy - we
14715 move the value to Tag_MPextension_use. */
14716 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14717 {
14718 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14719 {
14720 _bfd_error_handler
14721 (_("%pB has both the current and legacy "
14722 "Tag_MPextension_use attributes"),
14723 ibfd);
14724 result = FALSE;
14725 }
14726 }
14727
14728 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14729 out_attr[Tag_MPextension_use] = in_attr[i];
14730
14731 break;
14732
14733 case Tag_nodefaults:
14734 /* This tag is set if it exists, but the value is unused (and is
14735 typically zero). We don't actually need to do anything here -
14736 the merge happens automatically when the type flags are merged
14737 below. */
14738 break;
14739 case Tag_also_compatible_with:
14740 /* Already done in Tag_CPU_arch. */
14741 break;
14742 case Tag_conformance:
14743 /* Keep the attribute if it matches. Throw it away otherwise.
14744 No attribute means no claim to conform. */
14745 if (!in_attr[i].s || !out_attr[i].s
14746 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14747 out_attr[i].s = NULL;
14748 break;
14749
14750 default:
14751 result
14752 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14753 }
14754
14755 /* If out_attr was copied from in_attr then it won't have a type yet. */
14756 if (in_attr[i].type && !out_attr[i].type)
14757 out_attr[i].type = in_attr[i].type;
14758 }
14759
14760 /* Merge Tag_compatibility attributes and any common GNU ones. */
14761 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14762 return FALSE;
14763
14764 /* Check for any attributes not known on ARM. */
14765 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14766
14767 return result;
14768 }
14769
14770
14771 /* Return TRUE if the two EABI versions are incompatible. */
14772
14773 static bfd_boolean
14774 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14775 {
14776 /* v4 and v5 are the same spec before and after it was released,
14777 so allow mixing them. */
14778 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14779 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14780 return TRUE;
14781
14782 return (iver == over);
14783 }
14784
14785 /* Merge backend specific data from an object file to the output
14786 object file when linking. */
14787
14788 static bfd_boolean
14789 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14790
14791 /* Display the flags field. */
14792
14793 static bfd_boolean
14794 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14795 {
14796 FILE * file = (FILE *) ptr;
14797 unsigned long flags;
14798
14799 BFD_ASSERT (abfd != NULL && ptr != NULL);
14800
14801 /* Print normal ELF private data. */
14802 _bfd_elf_print_private_bfd_data (abfd, ptr);
14803
14804 flags = elf_elfheader (abfd)->e_flags;
14805 /* Ignore init flag - it may not be set, despite the flags field
14806 containing valid data. */
14807
14808 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14809
14810 switch (EF_ARM_EABI_VERSION (flags))
14811 {
14812 case EF_ARM_EABI_UNKNOWN:
14813 /* The following flag bits are GNU extensions and not part of the
14814 official ARM ELF extended ABI. Hence they are only decoded if
14815 the EABI version is not set. */
14816 if (flags & EF_ARM_INTERWORK)
14817 fprintf (file, _(" [interworking enabled]"));
14818
14819 if (flags & EF_ARM_APCS_26)
14820 fprintf (file, " [APCS-26]");
14821 else
14822 fprintf (file, " [APCS-32]");
14823
14824 if (flags & EF_ARM_VFP_FLOAT)
14825 fprintf (file, _(" [VFP float format]"));
14826 else if (flags & EF_ARM_MAVERICK_FLOAT)
14827 fprintf (file, _(" [Maverick float format]"));
14828 else
14829 fprintf (file, _(" [FPA float format]"));
14830
14831 if (flags & EF_ARM_APCS_FLOAT)
14832 fprintf (file, _(" [floats passed in float registers]"));
14833
14834 if (flags & EF_ARM_PIC)
14835 fprintf (file, _(" [position independent]"));
14836
14837 if (flags & EF_ARM_NEW_ABI)
14838 fprintf (file, _(" [new ABI]"));
14839
14840 if (flags & EF_ARM_OLD_ABI)
14841 fprintf (file, _(" [old ABI]"));
14842
14843 if (flags & EF_ARM_SOFT_FLOAT)
14844 fprintf (file, _(" [software FP]"));
14845
14846 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14847 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14848 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14849 | EF_ARM_MAVERICK_FLOAT);
14850 break;
14851
14852 case EF_ARM_EABI_VER1:
14853 fprintf (file, _(" [Version1 EABI]"));
14854
14855 if (flags & EF_ARM_SYMSARESORTED)
14856 fprintf (file, _(" [sorted symbol table]"));
14857 else
14858 fprintf (file, _(" [unsorted symbol table]"));
14859
14860 flags &= ~ EF_ARM_SYMSARESORTED;
14861 break;
14862
14863 case EF_ARM_EABI_VER2:
14864 fprintf (file, _(" [Version2 EABI]"));
14865
14866 if (flags & EF_ARM_SYMSARESORTED)
14867 fprintf (file, _(" [sorted symbol table]"));
14868 else
14869 fprintf (file, _(" [unsorted symbol table]"));
14870
14871 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14872 fprintf (file, _(" [dynamic symbols use segment index]"));
14873
14874 if (flags & EF_ARM_MAPSYMSFIRST)
14875 fprintf (file, _(" [mapping symbols precede others]"));
14876
14877 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14878 | EF_ARM_MAPSYMSFIRST);
14879 break;
14880
14881 case EF_ARM_EABI_VER3:
14882 fprintf (file, _(" [Version3 EABI]"));
14883 break;
14884
14885 case EF_ARM_EABI_VER4:
14886 fprintf (file, _(" [Version4 EABI]"));
14887 goto eabi;
14888
14889 case EF_ARM_EABI_VER5:
14890 fprintf (file, _(" [Version5 EABI]"));
14891
14892 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14893 fprintf (file, _(" [soft-float ABI]"));
14894
14895 if (flags & EF_ARM_ABI_FLOAT_HARD)
14896 fprintf (file, _(" [hard-float ABI]"));
14897
14898 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14899
14900 eabi:
14901 if (flags & EF_ARM_BE8)
14902 fprintf (file, _(" [BE8]"));
14903
14904 if (flags & EF_ARM_LE8)
14905 fprintf (file, _(" [LE8]"));
14906
14907 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14908 break;
14909
14910 default:
14911 fprintf (file, _(" <EABI version unrecognised>"));
14912 break;
14913 }
14914
14915 flags &= ~ EF_ARM_EABIMASK;
14916
14917 if (flags & EF_ARM_RELEXEC)
14918 fprintf (file, _(" [relocatable executable]"));
14919
14920 if (flags & EF_ARM_PIC)
14921 fprintf (file, _(" [position independent]"));
14922
14923 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
14924 fprintf (file, _(" [FDPIC ABI supplement]"));
14925
14926 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
14927
14928 if (flags)
14929 fprintf (file, _("<Unrecognised flag bits set>"));
14930
14931 fputc ('\n', file);
14932
14933 return TRUE;
14934 }
14935
14936 static int
14937 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14938 {
14939 switch (ELF_ST_TYPE (elf_sym->st_info))
14940 {
14941 case STT_ARM_TFUNC:
14942 return ELF_ST_TYPE (elf_sym->st_info);
14943
14944 case STT_ARM_16BIT:
14945 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14946 This allows us to distinguish between data used by Thumb instructions
14947 and non-data (which is probably code) inside Thumb regions of an
14948 executable. */
14949 if (type != STT_OBJECT && type != STT_TLS)
14950 return ELF_ST_TYPE (elf_sym->st_info);
14951 break;
14952
14953 default:
14954 break;
14955 }
14956
14957 return type;
14958 }
14959
14960 static asection *
14961 elf32_arm_gc_mark_hook (asection *sec,
14962 struct bfd_link_info *info,
14963 Elf_Internal_Rela *rel,
14964 struct elf_link_hash_entry *h,
14965 Elf_Internal_Sym *sym)
14966 {
14967 if (h != NULL)
14968 switch (ELF32_R_TYPE (rel->r_info))
14969 {
14970 case R_ARM_GNU_VTINHERIT:
14971 case R_ARM_GNU_VTENTRY:
14972 return NULL;
14973 }
14974
14975 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14976 }
14977
14978 /* Look through the relocs for a section during the first phase. */
14979
14980 static bfd_boolean
14981 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14982 asection *sec, const Elf_Internal_Rela *relocs)
14983 {
14984 Elf_Internal_Shdr *symtab_hdr;
14985 struct elf_link_hash_entry **sym_hashes;
14986 const Elf_Internal_Rela *rel;
14987 const Elf_Internal_Rela *rel_end;
14988 bfd *dynobj;
14989 asection *sreloc;
14990 struct elf32_arm_link_hash_table *htab;
14991 bfd_boolean call_reloc_p;
14992 bfd_boolean may_become_dynamic_p;
14993 bfd_boolean may_need_local_target_p;
14994 unsigned long nsyms;
14995
14996 if (bfd_link_relocatable (info))
14997 return TRUE;
14998
14999 BFD_ASSERT (is_arm_elf (abfd));
15000
15001 htab = elf32_arm_hash_table (info);
15002 if (htab == NULL)
15003 return FALSE;
15004
15005 sreloc = NULL;
15006
15007 /* Create dynamic sections for relocatable executables so that we can
15008 copy relocations. */
15009 if (htab->root.is_relocatable_executable
15010 && ! htab->root.dynamic_sections_created)
15011 {
15012 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15013 return FALSE;
15014 }
15015
15016 if (htab->root.dynobj == NULL)
15017 htab->root.dynobj = abfd;
15018 if (!create_ifunc_sections (info))
15019 return FALSE;
15020
15021 dynobj = htab->root.dynobj;
15022
15023 symtab_hdr = & elf_symtab_hdr (abfd);
15024 sym_hashes = elf_sym_hashes (abfd);
15025 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15026
15027 rel_end = relocs + sec->reloc_count;
15028 for (rel = relocs; rel < rel_end; rel++)
15029 {
15030 Elf_Internal_Sym *isym;
15031 struct elf_link_hash_entry *h;
15032 struct elf32_arm_link_hash_entry *eh;
15033 unsigned int r_symndx;
15034 int r_type;
15035
15036 r_symndx = ELF32_R_SYM (rel->r_info);
15037 r_type = ELF32_R_TYPE (rel->r_info);
15038 r_type = arm_real_reloc_type (htab, r_type);
15039
15040 if (r_symndx >= nsyms
15041 /* PR 9934: It is possible to have relocations that do not
15042 refer to symbols, thus it is also possible to have an
15043 object file containing relocations but no symbol table. */
15044 && (r_symndx > STN_UNDEF || nsyms > 0))
15045 {
15046 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15047 r_symndx);
15048 return FALSE;
15049 }
15050
15051 h = NULL;
15052 isym = NULL;
15053 if (nsyms > 0)
15054 {
15055 if (r_symndx < symtab_hdr->sh_info)
15056 {
15057 /* A local symbol. */
15058 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
15059 abfd, r_symndx);
15060 if (isym == NULL)
15061 return FALSE;
15062 }
15063 else
15064 {
15065 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15066 while (h->root.type == bfd_link_hash_indirect
15067 || h->root.type == bfd_link_hash_warning)
15068 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15069 }
15070 }
15071
15072 eh = (struct elf32_arm_link_hash_entry *) h;
15073
15074 call_reloc_p = FALSE;
15075 may_become_dynamic_p = FALSE;
15076 may_need_local_target_p = FALSE;
15077
15078 /* Could be done earlier, if h were already available. */
15079 r_type = elf32_arm_tls_transition (info, r_type, h);
15080 switch (r_type)
15081 {
15082 case R_ARM_GOTOFFFUNCDESC:
15083 {
15084 if (h == NULL)
15085 {
15086 if (!elf32_arm_allocate_local_sym_info (abfd))
15087 return FALSE;
15088 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15089 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15090 }
15091 else
15092 {
15093 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15094 }
15095 }
15096 break;
15097
15098 case R_ARM_GOTFUNCDESC:
15099 {
15100 if (h == NULL)
15101 {
15102 /* Such a relocation is not supposed to be generated
15103 by gcc on a static function. */
15104 /* Anyway if needed it could be handled. */
15105 abort();
15106 }
15107 else
15108 {
15109 eh->fdpic_cnts.gotfuncdesc_cnt++;
15110 }
15111 }
15112 break;
15113
15114 case R_ARM_FUNCDESC:
15115 {
15116 if (h == NULL)
15117 {
15118 if (!elf32_arm_allocate_local_sym_info (abfd))
15119 return FALSE;
15120 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15121 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15122 }
15123 else
15124 {
15125 eh->fdpic_cnts.funcdesc_cnt++;
15126 }
15127 }
15128 break;
15129
15130 case R_ARM_GOT32:
15131 case R_ARM_GOT_PREL:
15132 case R_ARM_TLS_GD32:
15133 case R_ARM_TLS_GD32_FDPIC:
15134 case R_ARM_TLS_IE32:
15135 case R_ARM_TLS_IE32_FDPIC:
15136 case R_ARM_TLS_GOTDESC:
15137 case R_ARM_TLS_DESCSEQ:
15138 case R_ARM_THM_TLS_DESCSEQ:
15139 case R_ARM_TLS_CALL:
15140 case R_ARM_THM_TLS_CALL:
15141 /* This symbol requires a global offset table entry. */
15142 {
15143 int tls_type, old_tls_type;
15144
15145 switch (r_type)
15146 {
15147 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15148 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15149
15150 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15151 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15152
15153 case R_ARM_TLS_GOTDESC:
15154 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15155 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15156 tls_type = GOT_TLS_GDESC; break;
15157
15158 default: tls_type = GOT_NORMAL; break;
15159 }
15160
15161 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15162 info->flags |= DF_STATIC_TLS;
15163
15164 if (h != NULL)
15165 {
15166 h->got.refcount++;
15167 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15168 }
15169 else
15170 {
15171 /* This is a global offset table entry for a local symbol. */
15172 if (!elf32_arm_allocate_local_sym_info (abfd))
15173 return FALSE;
15174 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15175 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15176 }
15177
15178 /* If a variable is accessed with both tls methods, two
15179 slots may be created. */
15180 if (GOT_TLS_GD_ANY_P (old_tls_type)
15181 && GOT_TLS_GD_ANY_P (tls_type))
15182 tls_type |= old_tls_type;
15183
15184 /* We will already have issued an error message if there
15185 is a TLS/non-TLS mismatch, based on the symbol
15186 type. So just combine any TLS types needed. */
15187 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15188 && tls_type != GOT_NORMAL)
15189 tls_type |= old_tls_type;
15190
15191 /* If the symbol is accessed in both IE and GDESC
15192 method, we're able to relax. Turn off the GDESC flag,
15193 without messing up with any other kind of tls types
15194 that may be involved. */
15195 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15196 tls_type &= ~GOT_TLS_GDESC;
15197
15198 if (old_tls_type != tls_type)
15199 {
15200 if (h != NULL)
15201 elf32_arm_hash_entry (h)->tls_type = tls_type;
15202 else
15203 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15204 }
15205 }
15206 /* Fall through. */
15207
15208 case R_ARM_TLS_LDM32:
15209 case R_ARM_TLS_LDM32_FDPIC:
15210 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15211 htab->tls_ldm_got.refcount++;
15212 /* Fall through. */
15213
15214 case R_ARM_GOTOFF32:
15215 case R_ARM_GOTPC:
15216 if (htab->root.sgot == NULL
15217 && !create_got_section (htab->root.dynobj, info))
15218 return FALSE;
15219 break;
15220
15221 case R_ARM_PC24:
15222 case R_ARM_PLT32:
15223 case R_ARM_CALL:
15224 case R_ARM_JUMP24:
15225 case R_ARM_PREL31:
15226 case R_ARM_THM_CALL:
15227 case R_ARM_THM_JUMP24:
15228 case R_ARM_THM_JUMP19:
15229 call_reloc_p = TRUE;
15230 may_need_local_target_p = TRUE;
15231 break;
15232
15233 case R_ARM_ABS12:
15234 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15235 ldr __GOTT_INDEX__ offsets. */
15236 if (!htab->vxworks_p)
15237 {
15238 may_need_local_target_p = TRUE;
15239 break;
15240 }
15241 else goto jump_over;
15242
15243 /* Fall through. */
15244
15245 case R_ARM_MOVW_ABS_NC:
15246 case R_ARM_MOVT_ABS:
15247 case R_ARM_THM_MOVW_ABS_NC:
15248 case R_ARM_THM_MOVT_ABS:
15249 if (bfd_link_pic (info))
15250 {
15251 _bfd_error_handler
15252 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15253 abfd, elf32_arm_howto_table_1[r_type].name,
15254 (h) ? h->root.root.string : "a local symbol");
15255 bfd_set_error (bfd_error_bad_value);
15256 return FALSE;
15257 }
15258
15259 /* Fall through. */
15260 case R_ARM_ABS32:
15261 case R_ARM_ABS32_NOI:
15262 jump_over:
15263 if (h != NULL && bfd_link_executable (info))
15264 {
15265 h->pointer_equality_needed = 1;
15266 }
15267 /* Fall through. */
15268 case R_ARM_REL32:
15269 case R_ARM_REL32_NOI:
15270 case R_ARM_MOVW_PREL_NC:
15271 case R_ARM_MOVT_PREL:
15272 case R_ARM_THM_MOVW_PREL_NC:
15273 case R_ARM_THM_MOVT_PREL:
15274
15275 /* Should the interworking branches be listed here? */
15276 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15277 || htab->fdpic_p)
15278 && (sec->flags & SEC_ALLOC) != 0)
15279 {
15280 if (h == NULL
15281 && elf32_arm_howto_from_type (r_type)->pc_relative)
15282 {
15283 /* In shared libraries and relocatable executables,
15284 we treat local relative references as calls;
15285 see the related SYMBOL_CALLS_LOCAL code in
15286 allocate_dynrelocs. */
15287 call_reloc_p = TRUE;
15288 may_need_local_target_p = TRUE;
15289 }
15290 else
15291 /* We are creating a shared library or relocatable
15292 executable, and this is a reloc against a global symbol,
15293 or a non-PC-relative reloc against a local symbol.
15294 We may need to copy the reloc into the output. */
15295 may_become_dynamic_p = TRUE;
15296 }
15297 else
15298 may_need_local_target_p = TRUE;
15299 break;
15300
15301 /* This relocation describes the C++ object vtable hierarchy.
15302 Reconstruct it for later use during GC. */
15303 case R_ARM_GNU_VTINHERIT:
15304 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15305 return FALSE;
15306 break;
15307
15308 /* This relocation describes which C++ vtable entries are actually
15309 used. Record for later use during GC. */
15310 case R_ARM_GNU_VTENTRY:
15311 BFD_ASSERT (h != NULL);
15312 if (h != NULL
15313 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15314 return FALSE;
15315 break;
15316 }
15317
15318 if (h != NULL)
15319 {
15320 if (call_reloc_p)
15321 /* We may need a .plt entry if the function this reloc
15322 refers to is in a different object, regardless of the
15323 symbol's type. We can't tell for sure yet, because
15324 something later might force the symbol local. */
15325 h->needs_plt = 1;
15326 else if (may_need_local_target_p)
15327 /* If this reloc is in a read-only section, we might
15328 need a copy reloc. We can't check reliably at this
15329 stage whether the section is read-only, as input
15330 sections have not yet been mapped to output sections.
15331 Tentatively set the flag for now, and correct in
15332 adjust_dynamic_symbol. */
15333 h->non_got_ref = 1;
15334 }
15335
15336 if (may_need_local_target_p
15337 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15338 {
15339 union gotplt_union *root_plt;
15340 struct arm_plt_info *arm_plt;
15341 struct arm_local_iplt_info *local_iplt;
15342
15343 if (h != NULL)
15344 {
15345 root_plt = &h->plt;
15346 arm_plt = &eh->plt;
15347 }
15348 else
15349 {
15350 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15351 if (local_iplt == NULL)
15352 return FALSE;
15353 root_plt = &local_iplt->root;
15354 arm_plt = &local_iplt->arm;
15355 }
15356
15357 /* If the symbol is a function that doesn't bind locally,
15358 this relocation will need a PLT entry. */
15359 if (root_plt->refcount != -1)
15360 root_plt->refcount += 1;
15361
15362 if (!call_reloc_p)
15363 arm_plt->noncall_refcount++;
15364
15365 /* It's too early to use htab->use_blx here, so we have to
15366 record possible blx references separately from
15367 relocs that definitely need a thumb stub. */
15368
15369 if (r_type == R_ARM_THM_CALL)
15370 arm_plt->maybe_thumb_refcount += 1;
15371
15372 if (r_type == R_ARM_THM_JUMP24
15373 || r_type == R_ARM_THM_JUMP19)
15374 arm_plt->thumb_refcount += 1;
15375 }
15376
15377 if (may_become_dynamic_p)
15378 {
15379 struct elf_dyn_relocs *p, **head;
15380
15381 /* Create a reloc section in dynobj. */
15382 if (sreloc == NULL)
15383 {
15384 sreloc = _bfd_elf_make_dynamic_reloc_section
15385 (sec, dynobj, 2, abfd, ! htab->use_rel);
15386
15387 if (sreloc == NULL)
15388 return FALSE;
15389
15390 /* BPABI objects never have dynamic relocations mapped. */
15391 if (htab->symbian_p)
15392 {
15393 flagword flags;
15394
15395 flags = bfd_get_section_flags (dynobj, sreloc);
15396 flags &= ~(SEC_LOAD | SEC_ALLOC);
15397 bfd_set_section_flags (dynobj, sreloc, flags);
15398 }
15399 }
15400
15401 /* If this is a global symbol, count the number of
15402 relocations we need for this symbol. */
15403 if (h != NULL)
15404 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
15405 else
15406 {
15407 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15408 if (head == NULL)
15409 return FALSE;
15410 }
15411
15412 p = *head;
15413 if (p == NULL || p->sec != sec)
15414 {
15415 bfd_size_type amt = sizeof *p;
15416
15417 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15418 if (p == NULL)
15419 return FALSE;
15420 p->next = *head;
15421 *head = p;
15422 p->sec = sec;
15423 p->count = 0;
15424 p->pc_count = 0;
15425 }
15426
15427 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15428 p->pc_count += 1;
15429 p->count += 1;
15430 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15431 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15432 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15433 that will become rofixup. */
15434 /* This is due to the fact that we suppose all will become rofixup. */
15435 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15436 _bfd_error_handler
15437 (_("FDPIC does not yet support %s relocation"
15438 " to become dynamic for executable"),
15439 elf32_arm_howto_table_1[r_type].name);
15440 abort();
15441 }
15442 }
15443 }
15444
15445 return TRUE;
15446 }
15447
15448 static void
15449 elf32_arm_update_relocs (asection *o,
15450 struct bfd_elf_section_reloc_data *reldata)
15451 {
15452 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15453 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15454 const struct elf_backend_data *bed;
15455 _arm_elf_section_data *eado;
15456 struct bfd_link_order *p;
15457 bfd_byte *erela_head, *erela;
15458 Elf_Internal_Rela *irela_head, *irela;
15459 Elf_Internal_Shdr *rel_hdr;
15460 bfd *abfd;
15461 unsigned int count;
15462
15463 eado = get_arm_elf_section_data (o);
15464
15465 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15466 return;
15467
15468 abfd = o->owner;
15469 bed = get_elf_backend_data (abfd);
15470 rel_hdr = reldata->hdr;
15471
15472 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15473 {
15474 swap_in = bed->s->swap_reloc_in;
15475 swap_out = bed->s->swap_reloc_out;
15476 }
15477 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15478 {
15479 swap_in = bed->s->swap_reloca_in;
15480 swap_out = bed->s->swap_reloca_out;
15481 }
15482 else
15483 abort ();
15484
15485 erela_head = rel_hdr->contents;
15486 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15487 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15488
15489 erela = erela_head;
15490 irela = irela_head;
15491 count = 0;
15492
15493 for (p = o->map_head.link_order; p; p = p->next)
15494 {
15495 if (p->type == bfd_section_reloc_link_order
15496 || p->type == bfd_symbol_reloc_link_order)
15497 {
15498 (*swap_in) (abfd, erela, irela);
15499 erela += rel_hdr->sh_entsize;
15500 irela++;
15501 count++;
15502 }
15503 else if (p->type == bfd_indirect_link_order)
15504 {
15505 struct bfd_elf_section_reloc_data *input_reldata;
15506 arm_unwind_table_edit *edit_list, *edit_tail;
15507 _arm_elf_section_data *eadi;
15508 bfd_size_type j;
15509 bfd_vma offset;
15510 asection *i;
15511
15512 i = p->u.indirect.section;
15513
15514 eadi = get_arm_elf_section_data (i);
15515 edit_list = eadi->u.exidx.unwind_edit_list;
15516 edit_tail = eadi->u.exidx.unwind_edit_tail;
15517 offset = o->vma + i->output_offset;
15518
15519 if (eadi->elf.rel.hdr &&
15520 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15521 input_reldata = &eadi->elf.rel;
15522 else if (eadi->elf.rela.hdr &&
15523 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15524 input_reldata = &eadi->elf.rela;
15525 else
15526 abort ();
15527
15528 if (edit_list)
15529 {
15530 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15531 {
15532 arm_unwind_table_edit *edit_node, *edit_next;
15533 bfd_vma bias;
15534 bfd_vma reloc_index;
15535
15536 (*swap_in) (abfd, erela, irela);
15537 reloc_index = (irela->r_offset - offset) / 8;
15538
15539 bias = 0;
15540 edit_node = edit_list;
15541 for (edit_next = edit_list;
15542 edit_next && edit_next->index <= reloc_index;
15543 edit_next = edit_node->next)
15544 {
15545 bias++;
15546 edit_node = edit_next;
15547 }
15548
15549 if (edit_node->type != DELETE_EXIDX_ENTRY
15550 || edit_node->index != reloc_index)
15551 {
15552 irela->r_offset -= bias * 8;
15553 irela++;
15554 count++;
15555 }
15556
15557 erela += rel_hdr->sh_entsize;
15558 }
15559
15560 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15561 {
15562 /* New relocation entity. */
15563 asection *text_sec = edit_tail->linked_section;
15564 asection *text_out = text_sec->output_section;
15565 bfd_vma exidx_offset = offset + i->size - 8;
15566
15567 irela->r_addend = 0;
15568 irela->r_offset = exidx_offset;
15569 irela->r_info = ELF32_R_INFO
15570 (text_out->target_index, R_ARM_PREL31);
15571 irela++;
15572 count++;
15573 }
15574 }
15575 else
15576 {
15577 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15578 {
15579 (*swap_in) (abfd, erela, irela);
15580 erela += rel_hdr->sh_entsize;
15581 irela++;
15582 }
15583
15584 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15585 }
15586 }
15587 }
15588
15589 reldata->count = count;
15590 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15591
15592 erela = erela_head;
15593 irela = irela_head;
15594 while (count > 0)
15595 {
15596 (*swap_out) (abfd, irela, erela);
15597 erela += rel_hdr->sh_entsize;
15598 irela++;
15599 count--;
15600 }
15601
15602 free (irela_head);
15603
15604 /* Hashes are no longer valid. */
15605 free (reldata->hashes);
15606 reldata->hashes = NULL;
15607 }
15608
15609 /* Unwinding tables are not referenced directly. This pass marks them as
15610 required if the corresponding code section is marked. Similarly, ARMv8-M
15611 secure entry functions can only be referenced by SG veneers which are
15612 created after the GC process. They need to be marked in case they reside in
15613 their own section (as would be the case if code was compiled with
15614 -ffunction-sections). */
15615
15616 static bfd_boolean
15617 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15618 elf_gc_mark_hook_fn gc_mark_hook)
15619 {
15620 bfd *sub;
15621 Elf_Internal_Shdr **elf_shdrp;
15622 asection *cmse_sec;
15623 obj_attribute *out_attr;
15624 Elf_Internal_Shdr *symtab_hdr;
15625 unsigned i, sym_count, ext_start;
15626 const struct elf_backend_data *bed;
15627 struct elf_link_hash_entry **sym_hashes;
15628 struct elf32_arm_link_hash_entry *cmse_hash;
15629 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15630
15631 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15632
15633 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15634 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15635 && out_attr[Tag_CPU_arch_profile].i == 'M';
15636
15637 /* Marking EH data may cause additional code sections to be marked,
15638 requiring multiple passes. */
15639 again = TRUE;
15640 while (again)
15641 {
15642 again = FALSE;
15643 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15644 {
15645 asection *o;
15646
15647 if (! is_arm_elf (sub))
15648 continue;
15649
15650 elf_shdrp = elf_elfsections (sub);
15651 for (o = sub->sections; o != NULL; o = o->next)
15652 {
15653 Elf_Internal_Shdr *hdr;
15654
15655 hdr = &elf_section_data (o)->this_hdr;
15656 if (hdr->sh_type == SHT_ARM_EXIDX
15657 && hdr->sh_link
15658 && hdr->sh_link < elf_numsections (sub)
15659 && !o->gc_mark
15660 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15661 {
15662 again = TRUE;
15663 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15664 return FALSE;
15665 }
15666 }
15667
15668 /* Mark section holding ARMv8-M secure entry functions. We mark all
15669 of them so no need for a second browsing. */
15670 if (is_v8m && first_bfd_browse)
15671 {
15672 sym_hashes = elf_sym_hashes (sub);
15673 bed = get_elf_backend_data (sub);
15674 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15675 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15676 ext_start = symtab_hdr->sh_info;
15677
15678 /* Scan symbols. */
15679 for (i = ext_start; i < sym_count; i++)
15680 {
15681 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15682
15683 /* Assume it is a special symbol. If not, cmse_scan will
15684 warn about it and user can do something about it. */
15685 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15686 {
15687 cmse_sec = cmse_hash->root.root.u.def.section;
15688 if (!cmse_sec->gc_mark
15689 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15690 return FALSE;
15691 }
15692 }
15693 }
15694 }
15695 first_bfd_browse = FALSE;
15696 }
15697
15698 return TRUE;
15699 }
15700
15701 /* Treat mapping symbols as special target symbols. */
15702
15703 static bfd_boolean
15704 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15705 {
15706 return bfd_is_arm_special_symbol_name (sym->name,
15707 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15708 }
15709
15710 /* This is a copy of elf_find_function() from elf.c except that
15711 ARM mapping symbols are ignored when looking for function names
15712 and STT_ARM_TFUNC is considered to a function type. */
15713
15714 static bfd_boolean
15715 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15716 asymbol ** symbols,
15717 asection * section,
15718 bfd_vma offset,
15719 const char ** filename_ptr,
15720 const char ** functionname_ptr)
15721 {
15722 const char * filename = NULL;
15723 asymbol * func = NULL;
15724 bfd_vma low_func = 0;
15725 asymbol ** p;
15726
15727 for (p = symbols; *p != NULL; p++)
15728 {
15729 elf_symbol_type *q;
15730
15731 q = (elf_symbol_type *) *p;
15732
15733 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15734 {
15735 default:
15736 break;
15737 case STT_FILE:
15738 filename = bfd_asymbol_name (&q->symbol);
15739 break;
15740 case STT_FUNC:
15741 case STT_ARM_TFUNC:
15742 case STT_NOTYPE:
15743 /* Skip mapping symbols. */
15744 if ((q->symbol.flags & BSF_LOCAL)
15745 && bfd_is_arm_special_symbol_name (q->symbol.name,
15746 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15747 continue;
15748 /* Fall through. */
15749 if (bfd_get_section (&q->symbol) == section
15750 && q->symbol.value >= low_func
15751 && q->symbol.value <= offset)
15752 {
15753 func = (asymbol *) q;
15754 low_func = q->symbol.value;
15755 }
15756 break;
15757 }
15758 }
15759
15760 if (func == NULL)
15761 return FALSE;
15762
15763 if (filename_ptr)
15764 *filename_ptr = filename;
15765 if (functionname_ptr)
15766 *functionname_ptr = bfd_asymbol_name (func);
15767
15768 return TRUE;
15769 }
15770
15771
15772 /* Find the nearest line to a particular section and offset, for error
15773 reporting. This code is a duplicate of the code in elf.c, except
15774 that it uses arm_elf_find_function. */
15775
15776 static bfd_boolean
15777 elf32_arm_find_nearest_line (bfd * abfd,
15778 asymbol ** symbols,
15779 asection * section,
15780 bfd_vma offset,
15781 const char ** filename_ptr,
15782 const char ** functionname_ptr,
15783 unsigned int * line_ptr,
15784 unsigned int * discriminator_ptr)
15785 {
15786 bfd_boolean found = FALSE;
15787
15788 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15789 filename_ptr, functionname_ptr,
15790 line_ptr, discriminator_ptr,
15791 dwarf_debug_sections, 0,
15792 & elf_tdata (abfd)->dwarf2_find_line_info))
15793 {
15794 if (!*functionname_ptr)
15795 arm_elf_find_function (abfd, symbols, section, offset,
15796 *filename_ptr ? NULL : filename_ptr,
15797 functionname_ptr);
15798
15799 return TRUE;
15800 }
15801
15802 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15803 uses DWARF1. */
15804
15805 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15806 & found, filename_ptr,
15807 functionname_ptr, line_ptr,
15808 & elf_tdata (abfd)->line_info))
15809 return FALSE;
15810
15811 if (found && (*functionname_ptr || *line_ptr))
15812 return TRUE;
15813
15814 if (symbols == NULL)
15815 return FALSE;
15816
15817 if (! arm_elf_find_function (abfd, symbols, section, offset,
15818 filename_ptr, functionname_ptr))
15819 return FALSE;
15820
15821 *line_ptr = 0;
15822 return TRUE;
15823 }
15824
15825 static bfd_boolean
15826 elf32_arm_find_inliner_info (bfd * abfd,
15827 const char ** filename_ptr,
15828 const char ** functionname_ptr,
15829 unsigned int * line_ptr)
15830 {
15831 bfd_boolean found;
15832 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15833 functionname_ptr, line_ptr,
15834 & elf_tdata (abfd)->dwarf2_find_line_info);
15835 return found;
15836 }
15837
15838 /* Find dynamic relocs for H that apply to read-only sections. */
15839
15840 static asection *
15841 readonly_dynrelocs (struct elf_link_hash_entry *h)
15842 {
15843 struct elf_dyn_relocs *p;
15844
15845 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
15846 {
15847 asection *s = p->sec->output_section;
15848
15849 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15850 return p->sec;
15851 }
15852 return NULL;
15853 }
15854
15855 /* Adjust a symbol defined by a dynamic object and referenced by a
15856 regular object. The current definition is in some section of the
15857 dynamic object, but we're not including those sections. We have to
15858 change the definition to something the rest of the link can
15859 understand. */
15860
15861 static bfd_boolean
15862 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15863 struct elf_link_hash_entry * h)
15864 {
15865 bfd * dynobj;
15866 asection *s, *srel;
15867 struct elf32_arm_link_hash_entry * eh;
15868 struct elf32_arm_link_hash_table *globals;
15869
15870 globals = elf32_arm_hash_table (info);
15871 if (globals == NULL)
15872 return FALSE;
15873
15874 dynobj = elf_hash_table (info)->dynobj;
15875
15876 /* Make sure we know what is going on here. */
15877 BFD_ASSERT (dynobj != NULL
15878 && (h->needs_plt
15879 || h->type == STT_GNU_IFUNC
15880 || h->is_weakalias
15881 || (h->def_dynamic
15882 && h->ref_regular
15883 && !h->def_regular)));
15884
15885 eh = (struct elf32_arm_link_hash_entry *) h;
15886
15887 /* If this is a function, put it in the procedure linkage table. We
15888 will fill in the contents of the procedure linkage table later,
15889 when we know the address of the .got section. */
15890 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15891 {
15892 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15893 symbol binds locally. */
15894 if (h->plt.refcount <= 0
15895 || (h->type != STT_GNU_IFUNC
15896 && (SYMBOL_CALLS_LOCAL (info, h)
15897 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15898 && h->root.type == bfd_link_hash_undefweak))))
15899 {
15900 /* This case can occur if we saw a PLT32 reloc in an input
15901 file, but the symbol was never referred to by a dynamic
15902 object, or if all references were garbage collected. In
15903 such a case, we don't actually need to build a procedure
15904 linkage table, and we can just do a PC24 reloc instead. */
15905 h->plt.offset = (bfd_vma) -1;
15906 eh->plt.thumb_refcount = 0;
15907 eh->plt.maybe_thumb_refcount = 0;
15908 eh->plt.noncall_refcount = 0;
15909 h->needs_plt = 0;
15910 }
15911
15912 return TRUE;
15913 }
15914 else
15915 {
15916 /* It's possible that we incorrectly decided a .plt reloc was
15917 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15918 in check_relocs. We can't decide accurately between function
15919 and non-function syms in check-relocs; Objects loaded later in
15920 the link may change h->type. So fix it now. */
15921 h->plt.offset = (bfd_vma) -1;
15922 eh->plt.thumb_refcount = 0;
15923 eh->plt.maybe_thumb_refcount = 0;
15924 eh->plt.noncall_refcount = 0;
15925 }
15926
15927 /* If this is a weak symbol, and there is a real definition, the
15928 processor independent code will have arranged for us to see the
15929 real definition first, and we can just use the same value. */
15930 if (h->is_weakalias)
15931 {
15932 struct elf_link_hash_entry *def = weakdef (h);
15933 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
15934 h->root.u.def.section = def->root.u.def.section;
15935 h->root.u.def.value = def->root.u.def.value;
15936 return TRUE;
15937 }
15938
15939 /* If there are no non-GOT references, we do not need a copy
15940 relocation. */
15941 if (!h->non_got_ref)
15942 return TRUE;
15943
15944 /* This is a reference to a symbol defined by a dynamic object which
15945 is not a function. */
15946
15947 /* If we are creating a shared library, we must presume that the
15948 only references to the symbol are via the global offset table.
15949 For such cases we need not do anything here; the relocations will
15950 be handled correctly by relocate_section. Relocatable executables
15951 can reference data in shared objects directly, so we don't need to
15952 do anything here. */
15953 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15954 return TRUE;
15955
15956 /* We must allocate the symbol in our .dynbss section, which will
15957 become part of the .bss section of the executable. There will be
15958 an entry for this symbol in the .dynsym section. The dynamic
15959 object will contain position independent code, so all references
15960 from the dynamic object to this symbol will go through the global
15961 offset table. The dynamic linker will use the .dynsym entry to
15962 determine the address it must put in the global offset table, so
15963 both the dynamic object and the regular object will refer to the
15964 same memory location for the variable. */
15965 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15966 linker to copy the initial value out of the dynamic object and into
15967 the runtime process image. We need to remember the offset into the
15968 .rel(a).bss section we are going to use. */
15969 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
15970 {
15971 s = globals->root.sdynrelro;
15972 srel = globals->root.sreldynrelro;
15973 }
15974 else
15975 {
15976 s = globals->root.sdynbss;
15977 srel = globals->root.srelbss;
15978 }
15979 if (info->nocopyreloc == 0
15980 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15981 && h->size != 0)
15982 {
15983 elf32_arm_allocate_dynrelocs (info, srel, 1);
15984 h->needs_copy = 1;
15985 }
15986
15987 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15988 }
15989
15990 /* Allocate space in .plt, .got and associated reloc sections for
15991 dynamic relocs. */
15992
15993 static bfd_boolean
15994 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15995 {
15996 struct bfd_link_info *info;
15997 struct elf32_arm_link_hash_table *htab;
15998 struct elf32_arm_link_hash_entry *eh;
15999 struct elf_dyn_relocs *p;
16000
16001 if (h->root.type == bfd_link_hash_indirect)
16002 return TRUE;
16003
16004 eh = (struct elf32_arm_link_hash_entry *) h;
16005
16006 info = (struct bfd_link_info *) inf;
16007 htab = elf32_arm_hash_table (info);
16008 if (htab == NULL)
16009 return FALSE;
16010
16011 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16012 && h->plt.refcount > 0)
16013 {
16014 /* Make sure this symbol is output as a dynamic symbol.
16015 Undefined weak syms won't yet be marked as dynamic. */
16016 if (h->dynindx == -1 && !h->forced_local
16017 && h->root.type == bfd_link_hash_undefweak)
16018 {
16019 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16020 return FALSE;
16021 }
16022
16023 /* If the call in the PLT entry binds locally, the associated
16024 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16025 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16026 than the .plt section. */
16027 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16028 {
16029 eh->is_iplt = 1;
16030 if (eh->plt.noncall_refcount == 0
16031 && SYMBOL_REFERENCES_LOCAL (info, h))
16032 /* All non-call references can be resolved directly.
16033 This means that they can (and in some cases, must)
16034 resolve directly to the run-time target, rather than
16035 to the PLT. That in turns means that any .got entry
16036 would be equal to the .igot.plt entry, so there's
16037 no point having both. */
16038 h->got.refcount = 0;
16039 }
16040
16041 if (bfd_link_pic (info)
16042 || eh->is_iplt
16043 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16044 {
16045 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16046
16047 /* If this symbol is not defined in a regular file, and we are
16048 not generating a shared library, then set the symbol to this
16049 location in the .plt. This is required to make function
16050 pointers compare as equal between the normal executable and
16051 the shared library. */
16052 if (! bfd_link_pic (info)
16053 && !h->def_regular)
16054 {
16055 h->root.u.def.section = htab->root.splt;
16056 h->root.u.def.value = h->plt.offset;
16057
16058 /* Make sure the function is not marked as Thumb, in case
16059 it is the target of an ABS32 relocation, which will
16060 point to the PLT entry. */
16061 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16062 }
16063
16064 /* VxWorks executables have a second set of relocations for
16065 each PLT entry. They go in a separate relocation section,
16066 which is processed by the kernel loader. */
16067 if (htab->vxworks_p && !bfd_link_pic (info))
16068 {
16069 /* There is a relocation for the initial PLT entry:
16070 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16071 if (h->plt.offset == htab->plt_header_size)
16072 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16073
16074 /* There are two extra relocations for each subsequent
16075 PLT entry: an R_ARM_32 relocation for the GOT entry,
16076 and an R_ARM_32 relocation for the PLT entry. */
16077 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16078 }
16079 }
16080 else
16081 {
16082 h->plt.offset = (bfd_vma) -1;
16083 h->needs_plt = 0;
16084 }
16085 }
16086 else
16087 {
16088 h->plt.offset = (bfd_vma) -1;
16089 h->needs_plt = 0;
16090 }
16091
16092 eh = (struct elf32_arm_link_hash_entry *) h;
16093 eh->tlsdesc_got = (bfd_vma) -1;
16094
16095 if (h->got.refcount > 0)
16096 {
16097 asection *s;
16098 bfd_boolean dyn;
16099 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16100 int indx;
16101
16102 /* Make sure this symbol is output as a dynamic symbol.
16103 Undefined weak syms won't yet be marked as dynamic. */
16104 if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local
16105 && h->root.type == bfd_link_hash_undefweak)
16106 {
16107 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16108 return FALSE;
16109 }
16110
16111 if (!htab->symbian_p)
16112 {
16113 s = htab->root.sgot;
16114 h->got.offset = s->size;
16115
16116 if (tls_type == GOT_UNKNOWN)
16117 abort ();
16118
16119 if (tls_type == GOT_NORMAL)
16120 /* Non-TLS symbols need one GOT slot. */
16121 s->size += 4;
16122 else
16123 {
16124 if (tls_type & GOT_TLS_GDESC)
16125 {
16126 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16127 eh->tlsdesc_got
16128 = (htab->root.sgotplt->size
16129 - elf32_arm_compute_jump_table_size (htab));
16130 htab->root.sgotplt->size += 8;
16131 h->got.offset = (bfd_vma) -2;
16132 /* plt.got_offset needs to know there's a TLS_DESC
16133 reloc in the middle of .got.plt. */
16134 htab->num_tls_desc++;
16135 }
16136
16137 if (tls_type & GOT_TLS_GD)
16138 {
16139 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16140 consecutive GOT slots. If the symbol is both GD
16141 and GDESC, got.offset may have been
16142 overwritten. */
16143 h->got.offset = s->size;
16144 s->size += 8;
16145 }
16146
16147 if (tls_type & GOT_TLS_IE)
16148 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16149 slot. */
16150 s->size += 4;
16151 }
16152
16153 dyn = htab->root.dynamic_sections_created;
16154
16155 indx = 0;
16156 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
16157 bfd_link_pic (info),
16158 h)
16159 && (!bfd_link_pic (info)
16160 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16161 indx = h->dynindx;
16162
16163 if (tls_type != GOT_NORMAL
16164 && (bfd_link_pic (info) || indx != 0)
16165 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16166 || h->root.type != bfd_link_hash_undefweak))
16167 {
16168 if (tls_type & GOT_TLS_IE)
16169 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16170
16171 if (tls_type & GOT_TLS_GD)
16172 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16173
16174 if (tls_type & GOT_TLS_GDESC)
16175 {
16176 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16177 /* GDESC needs a trampoline to jump to. */
16178 htab->tls_trampoline = -1;
16179 }
16180
16181 /* Only GD needs it. GDESC just emits one relocation per
16182 2 entries. */
16183 if ((tls_type & GOT_TLS_GD) && indx != 0)
16184 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16185 }
16186 else if (((indx != -1) || htab->fdpic_p)
16187 && !SYMBOL_REFERENCES_LOCAL (info, h))
16188 {
16189 if (htab->root.dynamic_sections_created)
16190 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16191 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16192 }
16193 else if (h->type == STT_GNU_IFUNC
16194 && eh->plt.noncall_refcount == 0)
16195 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16196 they all resolve dynamically instead. Reserve room for the
16197 GOT entry's R_ARM_IRELATIVE relocation. */
16198 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16199 else if (bfd_link_pic (info)
16200 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16201 || h->root.type != bfd_link_hash_undefweak))
16202 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16203 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16204 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16205 /* Reserve room for rofixup for FDPIC executable. */
16206 /* TLS relocs do not need space since they are completely
16207 resolved. */
16208 htab->srofixup->size += 4;
16209 }
16210 }
16211 else
16212 h->got.offset = (bfd_vma) -1;
16213
16214 /* FDPIC support. */
16215 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16216 {
16217 /* Symbol musn't be exported. */
16218 if (h->dynindx != -1)
16219 abort();
16220
16221 /* We only allocate one function descriptor with its associated relocation. */
16222 if (eh->fdpic_cnts.funcdesc_offset == -1)
16223 {
16224 asection *s = htab->root.sgot;
16225
16226 eh->fdpic_cnts.funcdesc_offset = s->size;
16227 s->size += 8;
16228 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16229 if (bfd_link_pic(info))
16230 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16231 else
16232 htab->srofixup->size += 8;
16233 }
16234 }
16235
16236 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16237 {
16238 asection *s = htab->root.sgot;
16239
16240 if (htab->root.dynamic_sections_created && h->dynindx == -1
16241 && !h->forced_local)
16242 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16243 return FALSE;
16244
16245 if (h->dynindx == -1)
16246 {
16247 /* We only allocate one function descriptor with its associated relocation. q */
16248 if (eh->fdpic_cnts.funcdesc_offset == -1)
16249 {
16250
16251 eh->fdpic_cnts.funcdesc_offset = s->size;
16252 s->size += 8;
16253 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16254 if (bfd_link_pic(info))
16255 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16256 else
16257 htab->srofixup->size += 8;
16258 }
16259 }
16260
16261 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16262 R_ARM_RELATIVE/rofixup relocation on it. */
16263 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16264 s->size += 4;
16265 if (h->dynindx == -1 && !bfd_link_pic(info))
16266 htab->srofixup->size += 4;
16267 else
16268 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16269 }
16270
16271 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16272 {
16273 if (htab->root.dynamic_sections_created && h->dynindx == -1
16274 && !h->forced_local)
16275 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16276 return FALSE;
16277
16278 if (h->dynindx == -1)
16279 {
16280 /* We only allocate one function descriptor with its associated relocation. */
16281 if (eh->fdpic_cnts.funcdesc_offset == -1)
16282 {
16283 asection *s = htab->root.sgot;
16284
16285 eh->fdpic_cnts.funcdesc_offset = s->size;
16286 s->size += 8;
16287 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16288 if (bfd_link_pic(info))
16289 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16290 else
16291 htab->srofixup->size += 8;
16292 }
16293 }
16294 if (h->dynindx == -1 && !bfd_link_pic(info))
16295 {
16296 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16297 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16298 }
16299 else
16300 {
16301 /* Will need one dynamic reloc per reference. will be either
16302 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16303 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16304 eh->fdpic_cnts.funcdesc_cnt);
16305 }
16306 }
16307
16308 /* Allocate stubs for exported Thumb functions on v4t. */
16309 if (!htab->use_blx && h->dynindx != -1
16310 && h->def_regular
16311 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16312 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16313 {
16314 struct elf_link_hash_entry * th;
16315 struct bfd_link_hash_entry * bh;
16316 struct elf_link_hash_entry * myh;
16317 char name[1024];
16318 asection *s;
16319 bh = NULL;
16320 /* Create a new symbol to regist the real location of the function. */
16321 s = h->root.u.def.section;
16322 sprintf (name, "__real_%s", h->root.root.string);
16323 _bfd_generic_link_add_one_symbol (info, s->owner,
16324 name, BSF_GLOBAL, s,
16325 h->root.u.def.value,
16326 NULL, TRUE, FALSE, &bh);
16327
16328 myh = (struct elf_link_hash_entry *) bh;
16329 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16330 myh->forced_local = 1;
16331 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16332 eh->export_glue = myh;
16333 th = record_arm_to_thumb_glue (info, h);
16334 /* Point the symbol at the stub. */
16335 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16336 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16337 h->root.u.def.section = th->root.u.def.section;
16338 h->root.u.def.value = th->root.u.def.value & ~1;
16339 }
16340
16341 if (eh->dyn_relocs == NULL)
16342 return TRUE;
16343
16344 /* In the shared -Bsymbolic case, discard space allocated for
16345 dynamic pc-relative relocs against symbols which turn out to be
16346 defined in regular objects. For the normal shared case, discard
16347 space for pc-relative relocs that have become local due to symbol
16348 visibility changes. */
16349
16350 if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p)
16351 {
16352 /* Relocs that use pc_count are PC-relative forms, which will appear
16353 on something like ".long foo - ." or "movw REG, foo - .". We want
16354 calls to protected symbols to resolve directly to the function
16355 rather than going via the plt. If people want function pointer
16356 comparisons to work as expected then they should avoid writing
16357 assembly like ".long foo - .". */
16358 if (SYMBOL_CALLS_LOCAL (info, h))
16359 {
16360 struct elf_dyn_relocs **pp;
16361
16362 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16363 {
16364 p->count -= p->pc_count;
16365 p->pc_count = 0;
16366 if (p->count == 0)
16367 *pp = p->next;
16368 else
16369 pp = &p->next;
16370 }
16371 }
16372
16373 if (htab->vxworks_p)
16374 {
16375 struct elf_dyn_relocs **pp;
16376
16377 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16378 {
16379 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16380 *pp = p->next;
16381 else
16382 pp = &p->next;
16383 }
16384 }
16385
16386 /* Also discard relocs on undefined weak syms with non-default
16387 visibility. */
16388 if (eh->dyn_relocs != NULL
16389 && h->root.type == bfd_link_hash_undefweak)
16390 {
16391 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16392 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16393 eh->dyn_relocs = NULL;
16394
16395 /* Make sure undefined weak symbols are output as a dynamic
16396 symbol in PIEs. */
16397 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16398 && !h->forced_local)
16399 {
16400 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16401 return FALSE;
16402 }
16403 }
16404
16405 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16406 && h->root.type == bfd_link_hash_new)
16407 {
16408 /* Output absolute symbols so that we can create relocations
16409 against them. For normal symbols we output a relocation
16410 against the section that contains them. */
16411 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16412 return FALSE;
16413 }
16414
16415 }
16416 else
16417 {
16418 /* For the non-shared case, discard space for relocs against
16419 symbols which turn out to need copy relocs or are not
16420 dynamic. */
16421
16422 if (!h->non_got_ref
16423 && ((h->def_dynamic
16424 && !h->def_regular)
16425 || (htab->root.dynamic_sections_created
16426 && (h->root.type == bfd_link_hash_undefweak
16427 || h->root.type == bfd_link_hash_undefined))))
16428 {
16429 /* Make sure this symbol is output as a dynamic symbol.
16430 Undefined weak syms won't yet be marked as dynamic. */
16431 if (h->dynindx == -1 && !h->forced_local
16432 && h->root.type == bfd_link_hash_undefweak)
16433 {
16434 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16435 return FALSE;
16436 }
16437
16438 /* If that succeeded, we know we'll be keeping all the
16439 relocs. */
16440 if (h->dynindx != -1)
16441 goto keep;
16442 }
16443
16444 eh->dyn_relocs = NULL;
16445
16446 keep: ;
16447 }
16448
16449 /* Finally, allocate space. */
16450 for (p = eh->dyn_relocs; p != NULL; p = p->next)
16451 {
16452 asection *sreloc = elf_section_data (p->sec)->sreloc;
16453
16454 if (h->type == STT_GNU_IFUNC
16455 && eh->plt.noncall_refcount == 0
16456 && SYMBOL_REFERENCES_LOCAL (info, h))
16457 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16458 else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16459 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16460 else if (htab->fdpic_p && !bfd_link_pic(info))
16461 htab->srofixup->size += 4 * p->count;
16462 else
16463 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16464 }
16465
16466 return TRUE;
16467 }
16468
16469 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16470 read-only sections. */
16471
16472 static bfd_boolean
16473 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
16474 {
16475 asection *sec;
16476
16477 if (h->root.type == bfd_link_hash_indirect)
16478 return TRUE;
16479
16480 sec = readonly_dynrelocs (h);
16481 if (sec != NULL)
16482 {
16483 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
16484
16485 info->flags |= DF_TEXTREL;
16486 info->callbacks->minfo
16487 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16488 sec->owner, h->root.root.string, sec);
16489
16490 /* Not an error, just cut short the traversal. */
16491 return FALSE;
16492 }
16493
16494 return TRUE;
16495 }
16496
16497 void
16498 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16499 int byteswap_code)
16500 {
16501 struct elf32_arm_link_hash_table *globals;
16502
16503 globals = elf32_arm_hash_table (info);
16504 if (globals == NULL)
16505 return;
16506
16507 globals->byteswap_code = byteswap_code;
16508 }
16509
16510 /* Set the sizes of the dynamic sections. */
16511
16512 static bfd_boolean
16513 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16514 struct bfd_link_info * info)
16515 {
16516 bfd * dynobj;
16517 asection * s;
16518 bfd_boolean plt;
16519 bfd_boolean relocs;
16520 bfd *ibfd;
16521 struct elf32_arm_link_hash_table *htab;
16522
16523 htab = elf32_arm_hash_table (info);
16524 if (htab == NULL)
16525 return FALSE;
16526
16527 dynobj = elf_hash_table (info)->dynobj;
16528 BFD_ASSERT (dynobj != NULL);
16529 check_use_blx (htab);
16530
16531 if (elf_hash_table (info)->dynamic_sections_created)
16532 {
16533 /* Set the contents of the .interp section to the interpreter. */
16534 if (bfd_link_executable (info) && !info->nointerp)
16535 {
16536 s = bfd_get_linker_section (dynobj, ".interp");
16537 BFD_ASSERT (s != NULL);
16538 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16539 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16540 }
16541 }
16542
16543 /* Set up .got offsets for local syms, and space for local dynamic
16544 relocs. */
16545 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16546 {
16547 bfd_signed_vma *local_got;
16548 bfd_signed_vma *end_local_got;
16549 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16550 char *local_tls_type;
16551 bfd_vma *local_tlsdesc_gotent;
16552 bfd_size_type locsymcount;
16553 Elf_Internal_Shdr *symtab_hdr;
16554 asection *srel;
16555 bfd_boolean is_vxworks = htab->vxworks_p;
16556 unsigned int symndx;
16557 struct fdpic_local *local_fdpic_cnts;
16558
16559 if (! is_arm_elf (ibfd))
16560 continue;
16561
16562 for (s = ibfd->sections; s != NULL; s = s->next)
16563 {
16564 struct elf_dyn_relocs *p;
16565
16566 for (p = (struct elf_dyn_relocs *)
16567 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16568 {
16569 if (!bfd_is_abs_section (p->sec)
16570 && bfd_is_abs_section (p->sec->output_section))
16571 {
16572 /* Input section has been discarded, either because
16573 it is a copy of a linkonce section or due to
16574 linker script /DISCARD/, so we'll be discarding
16575 the relocs too. */
16576 }
16577 else if (is_vxworks
16578 && strcmp (p->sec->output_section->name,
16579 ".tls_vars") == 0)
16580 {
16581 /* Relocations in vxworks .tls_vars sections are
16582 handled specially by the loader. */
16583 }
16584 else if (p->count != 0)
16585 {
16586 srel = elf_section_data (p->sec)->sreloc;
16587 if (htab->fdpic_p && !bfd_link_pic(info))
16588 htab->srofixup->size += 4 * p->count;
16589 else
16590 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16591 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16592 info->flags |= DF_TEXTREL;
16593 }
16594 }
16595 }
16596
16597 local_got = elf_local_got_refcounts (ibfd);
16598 if (!local_got)
16599 continue;
16600
16601 symtab_hdr = & elf_symtab_hdr (ibfd);
16602 locsymcount = symtab_hdr->sh_info;
16603 end_local_got = local_got + locsymcount;
16604 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16605 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16606 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16607 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16608 symndx = 0;
16609 s = htab->root.sgot;
16610 srel = htab->root.srelgot;
16611 for (; local_got < end_local_got;
16612 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16613 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16614 {
16615 *local_tlsdesc_gotent = (bfd_vma) -1;
16616 local_iplt = *local_iplt_ptr;
16617
16618 /* FDPIC support. */
16619 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16620 {
16621 if (local_fdpic_cnts->funcdesc_offset == -1)
16622 {
16623 local_fdpic_cnts->funcdesc_offset = s->size;
16624 s->size += 8;
16625
16626 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16627 if (bfd_link_pic(info))
16628 elf32_arm_allocate_dynrelocs (info, srel, 1);
16629 else
16630 htab->srofixup->size += 8;
16631 }
16632 }
16633
16634 if (local_fdpic_cnts->funcdesc_cnt > 0)
16635 {
16636 if (local_fdpic_cnts->funcdesc_offset == -1)
16637 {
16638 local_fdpic_cnts->funcdesc_offset = s->size;
16639 s->size += 8;
16640
16641 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16642 if (bfd_link_pic(info))
16643 elf32_arm_allocate_dynrelocs (info, srel, 1);
16644 else
16645 htab->srofixup->size += 8;
16646 }
16647
16648 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16649 if (bfd_link_pic(info))
16650 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16651 else
16652 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16653 }
16654
16655 if (local_iplt != NULL)
16656 {
16657 struct elf_dyn_relocs *p;
16658
16659 if (local_iplt->root.refcount > 0)
16660 {
16661 elf32_arm_allocate_plt_entry (info, TRUE,
16662 &local_iplt->root,
16663 &local_iplt->arm);
16664 if (local_iplt->arm.noncall_refcount == 0)
16665 /* All references to the PLT are calls, so all
16666 non-call references can resolve directly to the
16667 run-time target. This means that the .got entry
16668 would be the same as the .igot.plt entry, so there's
16669 no point creating both. */
16670 *local_got = 0;
16671 }
16672 else
16673 {
16674 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16675 local_iplt->root.offset = (bfd_vma) -1;
16676 }
16677
16678 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16679 {
16680 asection *psrel;
16681
16682 psrel = elf_section_data (p->sec)->sreloc;
16683 if (local_iplt->arm.noncall_refcount == 0)
16684 elf32_arm_allocate_irelocs (info, psrel, p->count);
16685 else
16686 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16687 }
16688 }
16689 if (*local_got > 0)
16690 {
16691 Elf_Internal_Sym *isym;
16692
16693 *local_got = s->size;
16694 if (*local_tls_type & GOT_TLS_GD)
16695 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16696 s->size += 8;
16697 if (*local_tls_type & GOT_TLS_GDESC)
16698 {
16699 *local_tlsdesc_gotent = htab->root.sgotplt->size
16700 - elf32_arm_compute_jump_table_size (htab);
16701 htab->root.sgotplt->size += 8;
16702 *local_got = (bfd_vma) -2;
16703 /* plt.got_offset needs to know there's a TLS_DESC
16704 reloc in the middle of .got.plt. */
16705 htab->num_tls_desc++;
16706 }
16707 if (*local_tls_type & GOT_TLS_IE)
16708 s->size += 4;
16709
16710 if (*local_tls_type & GOT_NORMAL)
16711 {
16712 /* If the symbol is both GD and GDESC, *local_got
16713 may have been overwritten. */
16714 *local_got = s->size;
16715 s->size += 4;
16716 }
16717
16718 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
16719 if (isym == NULL)
16720 return FALSE;
16721
16722 /* If all references to an STT_GNU_IFUNC PLT are calls,
16723 then all non-call references, including this GOT entry,
16724 resolve directly to the run-time target. */
16725 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16726 && (local_iplt == NULL
16727 || local_iplt->arm.noncall_refcount == 0))
16728 elf32_arm_allocate_irelocs (info, srel, 1);
16729 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16730 {
16731 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16732 elf32_arm_allocate_dynrelocs (info, srel, 1);
16733 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16734 htab->srofixup->size += 4;
16735
16736 if ((bfd_link_pic (info) || htab->fdpic_p)
16737 && *local_tls_type & GOT_TLS_GDESC)
16738 {
16739 elf32_arm_allocate_dynrelocs (info,
16740 htab->root.srelplt, 1);
16741 htab->tls_trampoline = -1;
16742 }
16743 }
16744 }
16745 else
16746 *local_got = (bfd_vma) -1;
16747 }
16748 }
16749
16750 if (htab->tls_ldm_got.refcount > 0)
16751 {
16752 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16753 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16754 htab->tls_ldm_got.offset = htab->root.sgot->size;
16755 htab->root.sgot->size += 8;
16756 if (bfd_link_pic (info))
16757 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16758 }
16759 else
16760 htab->tls_ldm_got.offset = -1;
16761
16762 /* At the very end of the .rofixup section is a pointer to the GOT,
16763 reserve space for it. */
16764 if (htab->fdpic_p && htab->srofixup != NULL)
16765 htab->srofixup->size += 4;
16766
16767 /* Allocate global sym .plt and .got entries, and space for global
16768 sym dynamic relocs. */
16769 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16770
16771 /* Here we rummage through the found bfds to collect glue information. */
16772 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16773 {
16774 if (! is_arm_elf (ibfd))
16775 continue;
16776
16777 /* Initialise mapping tables for code/data. */
16778 bfd_elf32_arm_init_maps (ibfd);
16779
16780 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16781 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16782 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16783 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16784 }
16785
16786 /* Allocate space for the glue sections now that we've sized them. */
16787 bfd_elf32_arm_allocate_interworking_sections (info);
16788
16789 /* For every jump slot reserved in the sgotplt, reloc_count is
16790 incremented. However, when we reserve space for TLS descriptors,
16791 it's not incremented, so in order to compute the space reserved
16792 for them, it suffices to multiply the reloc count by the jump
16793 slot size. */
16794 if (htab->root.srelplt)
16795 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16796
16797 if (htab->tls_trampoline)
16798 {
16799 if (htab->root.splt->size == 0)
16800 htab->root.splt->size += htab->plt_header_size;
16801
16802 htab->tls_trampoline = htab->root.splt->size;
16803 htab->root.splt->size += htab->plt_entry_size;
16804
16805 /* If we're not using lazy TLS relocations, don't generate the
16806 PLT and GOT entries they require. */
16807 if (!(info->flags & DF_BIND_NOW))
16808 {
16809 htab->dt_tlsdesc_got = htab->root.sgot->size;
16810 htab->root.sgot->size += 4;
16811
16812 htab->dt_tlsdesc_plt = htab->root.splt->size;
16813 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16814 }
16815 }
16816
16817 /* The check_relocs and adjust_dynamic_symbol entry points have
16818 determined the sizes of the various dynamic sections. Allocate
16819 memory for them. */
16820 plt = FALSE;
16821 relocs = FALSE;
16822 for (s = dynobj->sections; s != NULL; s = s->next)
16823 {
16824 const char * name;
16825
16826 if ((s->flags & SEC_LINKER_CREATED) == 0)
16827 continue;
16828
16829 /* It's OK to base decisions on the section name, because none
16830 of the dynobj section names depend upon the input files. */
16831 name = bfd_get_section_name (dynobj, s);
16832
16833 if (s == htab->root.splt)
16834 {
16835 /* Remember whether there is a PLT. */
16836 plt = s->size != 0;
16837 }
16838 else if (CONST_STRNEQ (name, ".rel"))
16839 {
16840 if (s->size != 0)
16841 {
16842 /* Remember whether there are any reloc sections other
16843 than .rel(a).plt and .rela.plt.unloaded. */
16844 if (s != htab->root.srelplt && s != htab->srelplt2)
16845 relocs = TRUE;
16846
16847 /* We use the reloc_count field as a counter if we need
16848 to copy relocs into the output file. */
16849 s->reloc_count = 0;
16850 }
16851 }
16852 else if (s != htab->root.sgot
16853 && s != htab->root.sgotplt
16854 && s != htab->root.iplt
16855 && s != htab->root.igotplt
16856 && s != htab->root.sdynbss
16857 && s != htab->root.sdynrelro
16858 && s != htab->srofixup)
16859 {
16860 /* It's not one of our sections, so don't allocate space. */
16861 continue;
16862 }
16863
16864 if (s->size == 0)
16865 {
16866 /* If we don't need this section, strip it from the
16867 output file. This is mostly to handle .rel(a).bss and
16868 .rel(a).plt. We must create both sections in
16869 create_dynamic_sections, because they must be created
16870 before the linker maps input sections to output
16871 sections. The linker does that before
16872 adjust_dynamic_symbol is called, and it is that
16873 function which decides whether anything needs to go
16874 into these sections. */
16875 s->flags |= SEC_EXCLUDE;
16876 continue;
16877 }
16878
16879 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16880 continue;
16881
16882 /* Allocate memory for the section contents. */
16883 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16884 if (s->contents == NULL)
16885 return FALSE;
16886 }
16887
16888 if (elf_hash_table (info)->dynamic_sections_created)
16889 {
16890 /* Add some entries to the .dynamic section. We fill in the
16891 values later, in elf32_arm_finish_dynamic_sections, but we
16892 must add the entries now so that we get the correct size for
16893 the .dynamic section. The DT_DEBUG entry is filled in by the
16894 dynamic linker and used by the debugger. */
16895 #define add_dynamic_entry(TAG, VAL) \
16896 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16897
16898 if (bfd_link_executable (info))
16899 {
16900 if (!add_dynamic_entry (DT_DEBUG, 0))
16901 return FALSE;
16902 }
16903
16904 if (plt)
16905 {
16906 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16907 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16908 || !add_dynamic_entry (DT_PLTREL,
16909 htab->use_rel ? DT_REL : DT_RELA)
16910 || !add_dynamic_entry (DT_JMPREL, 0))
16911 return FALSE;
16912
16913 if (htab->dt_tlsdesc_plt
16914 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16915 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16916 return FALSE;
16917 }
16918
16919 if (relocs)
16920 {
16921 if (htab->use_rel)
16922 {
16923 if (!add_dynamic_entry (DT_REL, 0)
16924 || !add_dynamic_entry (DT_RELSZ, 0)
16925 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16926 return FALSE;
16927 }
16928 else
16929 {
16930 if (!add_dynamic_entry (DT_RELA, 0)
16931 || !add_dynamic_entry (DT_RELASZ, 0)
16932 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16933 return FALSE;
16934 }
16935 }
16936
16937 /* If any dynamic relocs apply to a read-only section,
16938 then we need a DT_TEXTREL entry. */
16939 if ((info->flags & DF_TEXTREL) == 0)
16940 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
16941
16942 if ((info->flags & DF_TEXTREL) != 0)
16943 {
16944 if (!add_dynamic_entry (DT_TEXTREL, 0))
16945 return FALSE;
16946 }
16947 if (htab->vxworks_p
16948 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16949 return FALSE;
16950 }
16951 #undef add_dynamic_entry
16952
16953 return TRUE;
16954 }
16955
16956 /* Size sections even though they're not dynamic. We use it to setup
16957 _TLS_MODULE_BASE_, if needed. */
16958
16959 static bfd_boolean
16960 elf32_arm_always_size_sections (bfd *output_bfd,
16961 struct bfd_link_info *info)
16962 {
16963 asection *tls_sec;
16964 struct elf32_arm_link_hash_table *htab;
16965
16966 htab = elf32_arm_hash_table (info);
16967
16968 if (bfd_link_relocatable (info))
16969 return TRUE;
16970
16971 tls_sec = elf_hash_table (info)->tls_sec;
16972
16973 if (tls_sec)
16974 {
16975 struct elf_link_hash_entry *tlsbase;
16976
16977 tlsbase = elf_link_hash_lookup
16978 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16979
16980 if (tlsbase)
16981 {
16982 struct bfd_link_hash_entry *bh = NULL;
16983 const struct elf_backend_data *bed
16984 = get_elf_backend_data (output_bfd);
16985
16986 if (!(_bfd_generic_link_add_one_symbol
16987 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16988 tls_sec, 0, NULL, FALSE,
16989 bed->collect, &bh)))
16990 return FALSE;
16991
16992 tlsbase->type = STT_TLS;
16993 tlsbase = (struct elf_link_hash_entry *)bh;
16994 tlsbase->def_regular = 1;
16995 tlsbase->other = STV_HIDDEN;
16996 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16997 }
16998 }
16999
17000 if (htab->fdpic_p && !bfd_link_relocatable (info)
17001 && !bfd_elf_stack_segment_size (output_bfd, info,
17002 "__stacksize", DEFAULT_STACK_SIZE))
17003 return FALSE;
17004
17005 return TRUE;
17006 }
17007
17008 /* Finish up dynamic symbol handling. We set the contents of various
17009 dynamic sections here. */
17010
17011 static bfd_boolean
17012 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17013 struct bfd_link_info * info,
17014 struct elf_link_hash_entry * h,
17015 Elf_Internal_Sym * sym)
17016 {
17017 struct elf32_arm_link_hash_table *htab;
17018 struct elf32_arm_link_hash_entry *eh;
17019
17020 htab = elf32_arm_hash_table (info);
17021 if (htab == NULL)
17022 return FALSE;
17023
17024 eh = (struct elf32_arm_link_hash_entry *) h;
17025
17026 if (h->plt.offset != (bfd_vma) -1)
17027 {
17028 if (!eh->is_iplt)
17029 {
17030 BFD_ASSERT (h->dynindx != -1);
17031 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17032 h->dynindx, 0))
17033 return FALSE;
17034 }
17035
17036 if (!h->def_regular)
17037 {
17038 /* Mark the symbol as undefined, rather than as defined in
17039 the .plt section. */
17040 sym->st_shndx = SHN_UNDEF;
17041 /* If the symbol is weak we need to clear the value.
17042 Otherwise, the PLT entry would provide a definition for
17043 the symbol even if the symbol wasn't defined anywhere,
17044 and so the symbol would never be NULL. Leave the value if
17045 there were any relocations where pointer equality matters
17046 (this is a clue for the dynamic linker, to make function
17047 pointer comparisons work between an application and shared
17048 library). */
17049 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17050 sym->st_value = 0;
17051 }
17052 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17053 {
17054 /* At least one non-call relocation references this .iplt entry,
17055 so the .iplt entry is the function's canonical address. */
17056 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17057 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17058 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17059 (output_bfd, htab->root.iplt->output_section));
17060 sym->st_value = (h->plt.offset
17061 + htab->root.iplt->output_section->vma
17062 + htab->root.iplt->output_offset);
17063 }
17064 }
17065
17066 if (h->needs_copy)
17067 {
17068 asection * s;
17069 Elf_Internal_Rela rel;
17070
17071 /* This symbol needs a copy reloc. Set it up. */
17072 BFD_ASSERT (h->dynindx != -1
17073 && (h->root.type == bfd_link_hash_defined
17074 || h->root.type == bfd_link_hash_defweak));
17075
17076 rel.r_addend = 0;
17077 rel.r_offset = (h->root.u.def.value
17078 + h->root.u.def.section->output_section->vma
17079 + h->root.u.def.section->output_offset);
17080 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17081 if (h->root.u.def.section == htab->root.sdynrelro)
17082 s = htab->root.sreldynrelro;
17083 else
17084 s = htab->root.srelbss;
17085 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17086 }
17087
17088 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17089 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17090 it is relative to the ".got" section. */
17091 if (h == htab->root.hdynamic
17092 || (!htab->fdpic_p && !htab->vxworks_p && h == htab->root.hgot))
17093 sym->st_shndx = SHN_ABS;
17094
17095 return TRUE;
17096 }
17097
17098 static void
17099 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17100 void *contents,
17101 const unsigned long *template, unsigned count)
17102 {
17103 unsigned ix;
17104
17105 for (ix = 0; ix != count; ix++)
17106 {
17107 unsigned long insn = template[ix];
17108
17109 /* Emit mov pc,rx if bx is not permitted. */
17110 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17111 insn = (insn & 0xf000000f) | 0x01a0f000;
17112 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17113 }
17114 }
17115
17116 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17117 other variants, NaCl needs this entry in a static executable's
17118 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17119 zero. For .iplt really only the last bundle is useful, and .iplt
17120 could have a shorter first entry, with each individual PLT entry's
17121 relative branch calculated differently so it targets the last
17122 bundle instead of the instruction before it (labelled .Lplt_tail
17123 above). But it's simpler to keep the size and layout of PLT0
17124 consistent with the dynamic case, at the cost of some dead code at
17125 the start of .iplt and the one dead store to the stack at the start
17126 of .Lplt_tail. */
17127 static void
17128 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17129 asection *plt, bfd_vma got_displacement)
17130 {
17131 unsigned int i;
17132
17133 put_arm_insn (htab, output_bfd,
17134 elf32_arm_nacl_plt0_entry[0]
17135 | arm_movw_immediate (got_displacement),
17136 plt->contents + 0);
17137 put_arm_insn (htab, output_bfd,
17138 elf32_arm_nacl_plt0_entry[1]
17139 | arm_movt_immediate (got_displacement),
17140 plt->contents + 4);
17141
17142 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17143 put_arm_insn (htab, output_bfd,
17144 elf32_arm_nacl_plt0_entry[i],
17145 plt->contents + (i * 4));
17146 }
17147
17148 /* Finish up the dynamic sections. */
17149
17150 static bfd_boolean
17151 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17152 {
17153 bfd * dynobj;
17154 asection * sgot;
17155 asection * sdyn;
17156 struct elf32_arm_link_hash_table *htab;
17157
17158 htab = elf32_arm_hash_table (info);
17159 if (htab == NULL)
17160 return FALSE;
17161
17162 dynobj = elf_hash_table (info)->dynobj;
17163
17164 sgot = htab->root.sgotplt;
17165 /* A broken linker script might have discarded the dynamic sections.
17166 Catch this here so that we do not seg-fault later on. */
17167 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17168 return FALSE;
17169 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17170
17171 if (elf_hash_table (info)->dynamic_sections_created)
17172 {
17173 asection *splt;
17174 Elf32_External_Dyn *dyncon, *dynconend;
17175
17176 splt = htab->root.splt;
17177 BFD_ASSERT (splt != NULL && sdyn != NULL);
17178 BFD_ASSERT (htab->symbian_p || sgot != NULL);
17179
17180 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17181 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17182
17183 for (; dyncon < dynconend; dyncon++)
17184 {
17185 Elf_Internal_Dyn dyn;
17186 const char * name;
17187 asection * s;
17188
17189 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17190
17191 switch (dyn.d_tag)
17192 {
17193 unsigned int type;
17194
17195 default:
17196 if (htab->vxworks_p
17197 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17198 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17199 break;
17200
17201 case DT_HASH:
17202 name = ".hash";
17203 goto get_vma_if_bpabi;
17204 case DT_STRTAB:
17205 name = ".dynstr";
17206 goto get_vma_if_bpabi;
17207 case DT_SYMTAB:
17208 name = ".dynsym";
17209 goto get_vma_if_bpabi;
17210 case DT_VERSYM:
17211 name = ".gnu.version";
17212 goto get_vma_if_bpabi;
17213 case DT_VERDEF:
17214 name = ".gnu.version_d";
17215 goto get_vma_if_bpabi;
17216 case DT_VERNEED:
17217 name = ".gnu.version_r";
17218 goto get_vma_if_bpabi;
17219
17220 case DT_PLTGOT:
17221 name = htab->symbian_p ? ".got" : ".got.plt";
17222 goto get_vma;
17223 case DT_JMPREL:
17224 name = RELOC_SECTION (htab, ".plt");
17225 get_vma:
17226 s = bfd_get_linker_section (dynobj, name);
17227 if (s == NULL)
17228 {
17229 _bfd_error_handler
17230 (_("could not find section %s"), name);
17231 bfd_set_error (bfd_error_invalid_operation);
17232 return FALSE;
17233 }
17234 if (!htab->symbian_p)
17235 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17236 else
17237 /* In the BPABI, tags in the PT_DYNAMIC section point
17238 at the file offset, not the memory address, for the
17239 convenience of the post linker. */
17240 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
17241 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17242 break;
17243
17244 get_vma_if_bpabi:
17245 if (htab->symbian_p)
17246 goto get_vma;
17247 break;
17248
17249 case DT_PLTRELSZ:
17250 s = htab->root.srelplt;
17251 BFD_ASSERT (s != NULL);
17252 dyn.d_un.d_val = s->size;
17253 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17254 break;
17255
17256 case DT_RELSZ:
17257 case DT_RELASZ:
17258 case DT_REL:
17259 case DT_RELA:
17260 /* In the BPABI, the DT_REL tag must point at the file
17261 offset, not the VMA, of the first relocation
17262 section. So, we use code similar to that in
17263 elflink.c, but do not check for SHF_ALLOC on the
17264 relocation section, since relocation sections are
17265 never allocated under the BPABI. PLT relocs are also
17266 included. */
17267 if (htab->symbian_p)
17268 {
17269 unsigned int i;
17270 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
17271 ? SHT_REL : SHT_RELA);
17272 dyn.d_un.d_val = 0;
17273 for (i = 1; i < elf_numsections (output_bfd); i++)
17274 {
17275 Elf_Internal_Shdr *hdr
17276 = elf_elfsections (output_bfd)[i];
17277 if (hdr->sh_type == type)
17278 {
17279 if (dyn.d_tag == DT_RELSZ
17280 || dyn.d_tag == DT_RELASZ)
17281 dyn.d_un.d_val += hdr->sh_size;
17282 else if ((ufile_ptr) hdr->sh_offset
17283 <= dyn.d_un.d_val - 1)
17284 dyn.d_un.d_val = hdr->sh_offset;
17285 }
17286 }
17287 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17288 }
17289 break;
17290
17291 case DT_TLSDESC_PLT:
17292 s = htab->root.splt;
17293 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17294 + htab->dt_tlsdesc_plt);
17295 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17296 break;
17297
17298 case DT_TLSDESC_GOT:
17299 s = htab->root.sgot;
17300 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17301 + htab->dt_tlsdesc_got);
17302 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17303 break;
17304
17305 /* Set the bottom bit of DT_INIT/FINI if the
17306 corresponding function is Thumb. */
17307 case DT_INIT:
17308 name = info->init_function;
17309 goto get_sym;
17310 case DT_FINI:
17311 name = info->fini_function;
17312 get_sym:
17313 /* If it wasn't set by elf_bfd_final_link
17314 then there is nothing to adjust. */
17315 if (dyn.d_un.d_val != 0)
17316 {
17317 struct elf_link_hash_entry * eh;
17318
17319 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17320 FALSE, FALSE, TRUE);
17321 if (eh != NULL
17322 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17323 == ST_BRANCH_TO_THUMB)
17324 {
17325 dyn.d_un.d_val |= 1;
17326 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17327 }
17328 }
17329 break;
17330 }
17331 }
17332
17333 /* Fill in the first entry in the procedure linkage table. */
17334 if (splt->size > 0 && htab->plt_header_size)
17335 {
17336 const bfd_vma *plt0_entry;
17337 bfd_vma got_address, plt_address, got_displacement;
17338
17339 /* Calculate the addresses of the GOT and PLT. */
17340 got_address = sgot->output_section->vma + sgot->output_offset;
17341 plt_address = splt->output_section->vma + splt->output_offset;
17342
17343 if (htab->vxworks_p)
17344 {
17345 /* The VxWorks GOT is relocated by the dynamic linker.
17346 Therefore, we must emit relocations rather than simply
17347 computing the values now. */
17348 Elf_Internal_Rela rel;
17349
17350 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17351 put_arm_insn (htab, output_bfd, plt0_entry[0],
17352 splt->contents + 0);
17353 put_arm_insn (htab, output_bfd, plt0_entry[1],
17354 splt->contents + 4);
17355 put_arm_insn (htab, output_bfd, plt0_entry[2],
17356 splt->contents + 8);
17357 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17358
17359 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17360 rel.r_offset = plt_address + 12;
17361 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17362 rel.r_addend = 0;
17363 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17364 htab->srelplt2->contents);
17365 }
17366 else if (htab->nacl_p)
17367 arm_nacl_put_plt0 (htab, output_bfd, splt,
17368 got_address + 8 - (plt_address + 16));
17369 else if (using_thumb_only (htab))
17370 {
17371 got_displacement = got_address - (plt_address + 12);
17372
17373 plt0_entry = elf32_thumb2_plt0_entry;
17374 put_arm_insn (htab, output_bfd, plt0_entry[0],
17375 splt->contents + 0);
17376 put_arm_insn (htab, output_bfd, plt0_entry[1],
17377 splt->contents + 4);
17378 put_arm_insn (htab, output_bfd, plt0_entry[2],
17379 splt->contents + 8);
17380
17381 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17382 }
17383 else
17384 {
17385 got_displacement = got_address - (plt_address + 16);
17386
17387 plt0_entry = elf32_arm_plt0_entry;
17388 put_arm_insn (htab, output_bfd, plt0_entry[0],
17389 splt->contents + 0);
17390 put_arm_insn (htab, output_bfd, plt0_entry[1],
17391 splt->contents + 4);
17392 put_arm_insn (htab, output_bfd, plt0_entry[2],
17393 splt->contents + 8);
17394 put_arm_insn (htab, output_bfd, plt0_entry[3],
17395 splt->contents + 12);
17396
17397 #ifdef FOUR_WORD_PLT
17398 /* The displacement value goes in the otherwise-unused
17399 last word of the second entry. */
17400 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17401 #else
17402 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17403 #endif
17404 }
17405 }
17406
17407 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17408 really seem like the right value. */
17409 if (splt->output_section->owner == output_bfd)
17410 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17411
17412 if (htab->dt_tlsdesc_plt)
17413 {
17414 bfd_vma got_address
17415 = sgot->output_section->vma + sgot->output_offset;
17416 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17417 + htab->root.sgot->output_offset);
17418 bfd_vma plt_address
17419 = splt->output_section->vma + splt->output_offset;
17420
17421 arm_put_trampoline (htab, output_bfd,
17422 splt->contents + htab->dt_tlsdesc_plt,
17423 dl_tlsdesc_lazy_trampoline, 6);
17424
17425 bfd_put_32 (output_bfd,
17426 gotplt_address + htab->dt_tlsdesc_got
17427 - (plt_address + htab->dt_tlsdesc_plt)
17428 - dl_tlsdesc_lazy_trampoline[6],
17429 splt->contents + htab->dt_tlsdesc_plt + 24);
17430 bfd_put_32 (output_bfd,
17431 got_address - (plt_address + htab->dt_tlsdesc_plt)
17432 - dl_tlsdesc_lazy_trampoline[7],
17433 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
17434 }
17435
17436 if (htab->tls_trampoline)
17437 {
17438 arm_put_trampoline (htab, output_bfd,
17439 splt->contents + htab->tls_trampoline,
17440 tls_trampoline, 3);
17441 #ifdef FOUR_WORD_PLT
17442 bfd_put_32 (output_bfd, 0x00000000,
17443 splt->contents + htab->tls_trampoline + 12);
17444 #endif
17445 }
17446
17447 if (htab->vxworks_p
17448 && !bfd_link_pic (info)
17449 && htab->root.splt->size > 0)
17450 {
17451 /* Correct the .rel(a).plt.unloaded relocations. They will have
17452 incorrect symbol indexes. */
17453 int num_plts;
17454 unsigned char *p;
17455
17456 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17457 / htab->plt_entry_size);
17458 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17459
17460 for (; num_plts; num_plts--)
17461 {
17462 Elf_Internal_Rela rel;
17463
17464 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17465 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17466 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17467 p += RELOC_SIZE (htab);
17468
17469 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17470 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17471 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17472 p += RELOC_SIZE (htab);
17473 }
17474 }
17475 }
17476
17477 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
17478 /* NaCl uses a special first entry in .iplt too. */
17479 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17480
17481 /* Fill in the first three entries in the global offset table. */
17482 if (sgot)
17483 {
17484 if (sgot->size > 0)
17485 {
17486 if (sdyn == NULL)
17487 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17488 else
17489 bfd_put_32 (output_bfd,
17490 sdyn->output_section->vma + sdyn->output_offset,
17491 sgot->contents);
17492 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17493 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17494 }
17495
17496 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17497 }
17498
17499 /* At the very end of the .rofixup section is a pointer to the GOT. */
17500 if (htab->fdpic_p && htab->srofixup != NULL)
17501 {
17502 struct elf_link_hash_entry *hgot = htab->root.hgot;
17503
17504 bfd_vma got_value = hgot->root.u.def.value
17505 + hgot->root.u.def.section->output_section->vma
17506 + hgot->root.u.def.section->output_offset;
17507
17508 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17509
17510 /* Make sure we allocated and generated the same number of fixups. */
17511 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17512 }
17513
17514 return TRUE;
17515 }
17516
17517 static void
17518 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
17519 {
17520 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17521 struct elf32_arm_link_hash_table *globals;
17522 struct elf_segment_map *m;
17523
17524 i_ehdrp = elf_elfheader (abfd);
17525
17526 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17527 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17528 else
17529 _bfd_elf_post_process_headers (abfd, link_info);
17530 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17531
17532 if (link_info)
17533 {
17534 globals = elf32_arm_hash_table (link_info);
17535 if (globals != NULL && globals->byteswap_code)
17536 i_ehdrp->e_flags |= EF_ARM_BE8;
17537
17538 if (globals->fdpic_p)
17539 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17540 }
17541
17542 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17543 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17544 {
17545 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17546 if (abi == AEABI_VFP_args_vfp)
17547 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17548 else
17549 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17550 }
17551
17552 /* Scan segment to set p_flags attribute if it contains only sections with
17553 SHF_ARM_PURECODE flag. */
17554 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17555 {
17556 unsigned int j;
17557
17558 if (m->count == 0)
17559 continue;
17560 for (j = 0; j < m->count; j++)
17561 {
17562 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17563 break;
17564 }
17565 if (j == m->count)
17566 {
17567 m->p_flags = PF_X;
17568 m->p_flags_valid = 1;
17569 }
17570 }
17571 }
17572
17573 static enum elf_reloc_type_class
17574 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17575 const asection *rel_sec ATTRIBUTE_UNUSED,
17576 const Elf_Internal_Rela *rela)
17577 {
17578 switch ((int) ELF32_R_TYPE (rela->r_info))
17579 {
17580 case R_ARM_RELATIVE:
17581 return reloc_class_relative;
17582 case R_ARM_JUMP_SLOT:
17583 return reloc_class_plt;
17584 case R_ARM_COPY:
17585 return reloc_class_copy;
17586 case R_ARM_IRELATIVE:
17587 return reloc_class_ifunc;
17588 default:
17589 return reloc_class_normal;
17590 }
17591 }
17592
17593 static void
17594 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
17595 {
17596 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17597 }
17598
17599 /* Return TRUE if this is an unwinding table entry. */
17600
17601 static bfd_boolean
17602 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17603 {
17604 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
17605 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
17606 }
17607
17608
17609 /* Set the type and flags for an ARM section. We do this by
17610 the section name, which is a hack, but ought to work. */
17611
17612 static bfd_boolean
17613 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17614 {
17615 const char * name;
17616
17617 name = bfd_get_section_name (abfd, sec);
17618
17619 if (is_arm_elf_unwind_section_name (abfd, name))
17620 {
17621 hdr->sh_type = SHT_ARM_EXIDX;
17622 hdr->sh_flags |= SHF_LINK_ORDER;
17623 }
17624
17625 if (sec->flags & SEC_ELF_PURECODE)
17626 hdr->sh_flags |= SHF_ARM_PURECODE;
17627
17628 return TRUE;
17629 }
17630
17631 /* Handle an ARM specific section when reading an object file. This is
17632 called when bfd_section_from_shdr finds a section with an unknown
17633 type. */
17634
17635 static bfd_boolean
17636 elf32_arm_section_from_shdr (bfd *abfd,
17637 Elf_Internal_Shdr * hdr,
17638 const char *name,
17639 int shindex)
17640 {
17641 /* There ought to be a place to keep ELF backend specific flags, but
17642 at the moment there isn't one. We just keep track of the
17643 sections by their name, instead. Fortunately, the ABI gives
17644 names for all the ARM specific sections, so we will probably get
17645 away with this. */
17646 switch (hdr->sh_type)
17647 {
17648 case SHT_ARM_EXIDX:
17649 case SHT_ARM_PREEMPTMAP:
17650 case SHT_ARM_ATTRIBUTES:
17651 break;
17652
17653 default:
17654 return FALSE;
17655 }
17656
17657 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17658 return FALSE;
17659
17660 return TRUE;
17661 }
17662
17663 static _arm_elf_section_data *
17664 get_arm_elf_section_data (asection * sec)
17665 {
17666 if (sec && sec->owner && is_arm_elf (sec->owner))
17667 return elf32_arm_section_data (sec);
17668 else
17669 return NULL;
17670 }
17671
17672 typedef struct
17673 {
17674 void *flaginfo;
17675 struct bfd_link_info *info;
17676 asection *sec;
17677 int sec_shndx;
17678 int (*func) (void *, const char *, Elf_Internal_Sym *,
17679 asection *, struct elf_link_hash_entry *);
17680 } output_arch_syminfo;
17681
17682 enum map_symbol_type
17683 {
17684 ARM_MAP_ARM,
17685 ARM_MAP_THUMB,
17686 ARM_MAP_DATA
17687 };
17688
17689
17690 /* Output a single mapping symbol. */
17691
17692 static bfd_boolean
17693 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17694 enum map_symbol_type type,
17695 bfd_vma offset)
17696 {
17697 static const char *names[3] = {"$a", "$t", "$d"};
17698 Elf_Internal_Sym sym;
17699
17700 sym.st_value = osi->sec->output_section->vma
17701 + osi->sec->output_offset
17702 + offset;
17703 sym.st_size = 0;
17704 sym.st_other = 0;
17705 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17706 sym.st_shndx = osi->sec_shndx;
17707 sym.st_target_internal = 0;
17708 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17709 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17710 }
17711
17712 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17713 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17714
17715 static bfd_boolean
17716 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17717 bfd_boolean is_iplt_entry_p,
17718 union gotplt_union *root_plt,
17719 struct arm_plt_info *arm_plt)
17720 {
17721 struct elf32_arm_link_hash_table *htab;
17722 bfd_vma addr, plt_header_size;
17723
17724 if (root_plt->offset == (bfd_vma) -1)
17725 return TRUE;
17726
17727 htab = elf32_arm_hash_table (osi->info);
17728 if (htab == NULL)
17729 return FALSE;
17730
17731 if (is_iplt_entry_p)
17732 {
17733 osi->sec = htab->root.iplt;
17734 plt_header_size = 0;
17735 }
17736 else
17737 {
17738 osi->sec = htab->root.splt;
17739 plt_header_size = htab->plt_header_size;
17740 }
17741 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17742 (osi->info->output_bfd, osi->sec->output_section));
17743
17744 addr = root_plt->offset & -2;
17745 if (htab->symbian_p)
17746 {
17747 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17748 return FALSE;
17749 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
17750 return FALSE;
17751 }
17752 else if (htab->vxworks_p)
17753 {
17754 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17755 return FALSE;
17756 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17757 return FALSE;
17758 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17759 return FALSE;
17760 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17761 return FALSE;
17762 }
17763 else if (htab->nacl_p)
17764 {
17765 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17766 return FALSE;
17767 }
17768 else if (htab->fdpic_p)
17769 {
17770 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17771 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17772 return FALSE;
17773 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17774 return FALSE;
17775 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17776 return FALSE;
17777 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
17778 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 24))
17779 return FALSE;
17780 }
17781 else if (using_thumb_only (htab))
17782 {
17783 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17784 return FALSE;
17785 }
17786 else
17787 {
17788 bfd_boolean thumb_stub_p;
17789
17790 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17791 if (thumb_stub_p)
17792 {
17793 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17794 return FALSE;
17795 }
17796 #ifdef FOUR_WORD_PLT
17797 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17798 return FALSE;
17799 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17800 return FALSE;
17801 #else
17802 /* A three-word PLT with no Thumb thunk contains only Arm code,
17803 so only need to output a mapping symbol for the first PLT entry and
17804 entries with thumb thunks. */
17805 if (thumb_stub_p || addr == plt_header_size)
17806 {
17807 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17808 return FALSE;
17809 }
17810 #endif
17811 }
17812
17813 return TRUE;
17814 }
17815
17816 /* Output mapping symbols for PLT entries associated with H. */
17817
17818 static bfd_boolean
17819 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17820 {
17821 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17822 struct elf32_arm_link_hash_entry *eh;
17823
17824 if (h->root.type == bfd_link_hash_indirect)
17825 return TRUE;
17826
17827 if (h->root.type == bfd_link_hash_warning)
17828 /* When warning symbols are created, they **replace** the "real"
17829 entry in the hash table, thus we never get to see the real
17830 symbol in a hash traversal. So look at it now. */
17831 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17832
17833 eh = (struct elf32_arm_link_hash_entry *) h;
17834 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17835 &h->plt, &eh->plt);
17836 }
17837
17838 /* Bind a veneered symbol to its veneer identified by its hash entry
17839 STUB_ENTRY. The veneered location thus loose its symbol. */
17840
17841 static void
17842 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17843 {
17844 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17845
17846 BFD_ASSERT (hash);
17847 hash->root.root.u.def.section = stub_entry->stub_sec;
17848 hash->root.root.u.def.value = stub_entry->stub_offset;
17849 hash->root.size = stub_entry->stub_size;
17850 }
17851
17852 /* Output a single local symbol for a generated stub. */
17853
17854 static bfd_boolean
17855 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17856 bfd_vma offset, bfd_vma size)
17857 {
17858 Elf_Internal_Sym sym;
17859
17860 sym.st_value = osi->sec->output_section->vma
17861 + osi->sec->output_offset
17862 + offset;
17863 sym.st_size = size;
17864 sym.st_other = 0;
17865 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17866 sym.st_shndx = osi->sec_shndx;
17867 sym.st_target_internal = 0;
17868 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17869 }
17870
17871 static bfd_boolean
17872 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17873 void * in_arg)
17874 {
17875 struct elf32_arm_stub_hash_entry *stub_entry;
17876 asection *stub_sec;
17877 bfd_vma addr;
17878 char *stub_name;
17879 output_arch_syminfo *osi;
17880 const insn_sequence *template_sequence;
17881 enum stub_insn_type prev_type;
17882 int size;
17883 int i;
17884 enum map_symbol_type sym_type;
17885
17886 /* Massage our args to the form they really have. */
17887 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17888 osi = (output_arch_syminfo *) in_arg;
17889
17890 stub_sec = stub_entry->stub_sec;
17891
17892 /* Ensure this stub is attached to the current section being
17893 processed. */
17894 if (stub_sec != osi->sec)
17895 return TRUE;
17896
17897 addr = (bfd_vma) stub_entry->stub_offset;
17898 template_sequence = stub_entry->stub_template;
17899
17900 if (arm_stub_sym_claimed (stub_entry->stub_type))
17901 arm_stub_claim_sym (stub_entry);
17902 else
17903 {
17904 stub_name = stub_entry->output_name;
17905 switch (template_sequence[0].type)
17906 {
17907 case ARM_TYPE:
17908 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17909 stub_entry->stub_size))
17910 return FALSE;
17911 break;
17912 case THUMB16_TYPE:
17913 case THUMB32_TYPE:
17914 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17915 stub_entry->stub_size))
17916 return FALSE;
17917 break;
17918 default:
17919 BFD_FAIL ();
17920 return 0;
17921 }
17922 }
17923
17924 prev_type = DATA_TYPE;
17925 size = 0;
17926 for (i = 0; i < stub_entry->stub_template_size; i++)
17927 {
17928 switch (template_sequence[i].type)
17929 {
17930 case ARM_TYPE:
17931 sym_type = ARM_MAP_ARM;
17932 break;
17933
17934 case THUMB16_TYPE:
17935 case THUMB32_TYPE:
17936 sym_type = ARM_MAP_THUMB;
17937 break;
17938
17939 case DATA_TYPE:
17940 sym_type = ARM_MAP_DATA;
17941 break;
17942
17943 default:
17944 BFD_FAIL ();
17945 return FALSE;
17946 }
17947
17948 if (template_sequence[i].type != prev_type)
17949 {
17950 prev_type = template_sequence[i].type;
17951 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17952 return FALSE;
17953 }
17954
17955 switch (template_sequence[i].type)
17956 {
17957 case ARM_TYPE:
17958 case THUMB32_TYPE:
17959 size += 4;
17960 break;
17961
17962 case THUMB16_TYPE:
17963 size += 2;
17964 break;
17965
17966 case DATA_TYPE:
17967 size += 4;
17968 break;
17969
17970 default:
17971 BFD_FAIL ();
17972 return FALSE;
17973 }
17974 }
17975
17976 return TRUE;
17977 }
17978
17979 /* Output mapping symbols for linker generated sections,
17980 and for those data-only sections that do not have a
17981 $d. */
17982
17983 static bfd_boolean
17984 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17985 struct bfd_link_info *info,
17986 void *flaginfo,
17987 int (*func) (void *, const char *,
17988 Elf_Internal_Sym *,
17989 asection *,
17990 struct elf_link_hash_entry *))
17991 {
17992 output_arch_syminfo osi;
17993 struct elf32_arm_link_hash_table *htab;
17994 bfd_vma offset;
17995 bfd_size_type size;
17996 bfd *input_bfd;
17997
17998 htab = elf32_arm_hash_table (info);
17999 if (htab == NULL)
18000 return FALSE;
18001
18002 check_use_blx (htab);
18003
18004 osi.flaginfo = flaginfo;
18005 osi.info = info;
18006 osi.func = func;
18007
18008 /* Add a $d mapping symbol to data-only sections that
18009 don't have any mapping symbol. This may result in (harmless) redundant
18010 mapping symbols. */
18011 for (input_bfd = info->input_bfds;
18012 input_bfd != NULL;
18013 input_bfd = input_bfd->link.next)
18014 {
18015 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18016 for (osi.sec = input_bfd->sections;
18017 osi.sec != NULL;
18018 osi.sec = osi.sec->next)
18019 {
18020 if (osi.sec->output_section != NULL
18021 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18022 != 0)
18023 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18024 == SEC_HAS_CONTENTS
18025 && get_arm_elf_section_data (osi.sec) != NULL
18026 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18027 && osi.sec->size > 0
18028 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18029 {
18030 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18031 (output_bfd, osi.sec->output_section);
18032 if (osi.sec_shndx != (int)SHN_BAD)
18033 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18034 }
18035 }
18036 }
18037
18038 /* ARM->Thumb glue. */
18039 if (htab->arm_glue_size > 0)
18040 {
18041 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18042 ARM2THUMB_GLUE_SECTION_NAME);
18043
18044 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18045 (output_bfd, osi.sec->output_section);
18046 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18047 || htab->pic_veneer)
18048 size = ARM2THUMB_PIC_GLUE_SIZE;
18049 else if (htab->use_blx)
18050 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18051 else
18052 size = ARM2THUMB_STATIC_GLUE_SIZE;
18053
18054 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18055 {
18056 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18057 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18058 }
18059 }
18060
18061 /* Thumb->ARM glue. */
18062 if (htab->thumb_glue_size > 0)
18063 {
18064 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18065 THUMB2ARM_GLUE_SECTION_NAME);
18066
18067 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18068 (output_bfd, osi.sec->output_section);
18069 size = THUMB2ARM_GLUE_SIZE;
18070
18071 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18072 {
18073 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18074 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18075 }
18076 }
18077
18078 /* ARMv4 BX veneers. */
18079 if (htab->bx_glue_size > 0)
18080 {
18081 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18082 ARM_BX_GLUE_SECTION_NAME);
18083
18084 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18085 (output_bfd, osi.sec->output_section);
18086
18087 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18088 }
18089
18090 /* Long calls stubs. */
18091 if (htab->stub_bfd && htab->stub_bfd->sections)
18092 {
18093 asection* stub_sec;
18094
18095 for (stub_sec = htab->stub_bfd->sections;
18096 stub_sec != NULL;
18097 stub_sec = stub_sec->next)
18098 {
18099 /* Ignore non-stub sections. */
18100 if (!strstr (stub_sec->name, STUB_SUFFIX))
18101 continue;
18102
18103 osi.sec = stub_sec;
18104
18105 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18106 (output_bfd, osi.sec->output_section);
18107
18108 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18109 }
18110 }
18111
18112 /* Finally, output mapping symbols for the PLT. */
18113 if (htab->root.splt && htab->root.splt->size > 0)
18114 {
18115 osi.sec = htab->root.splt;
18116 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18117 (output_bfd, osi.sec->output_section));
18118
18119 /* Output mapping symbols for the plt header. SymbianOS does not have a
18120 plt header. */
18121 if (htab->vxworks_p)
18122 {
18123 /* VxWorks shared libraries have no PLT header. */
18124 if (!bfd_link_pic (info))
18125 {
18126 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18127 return FALSE;
18128 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18129 return FALSE;
18130 }
18131 }
18132 else if (htab->nacl_p)
18133 {
18134 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18135 return FALSE;
18136 }
18137 else if (using_thumb_only (htab))
18138 {
18139 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18140 return FALSE;
18141 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18142 return FALSE;
18143 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18144 return FALSE;
18145 }
18146 else if (!htab->symbian_p && !htab->fdpic_p)
18147 {
18148 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18149 return FALSE;
18150 #ifndef FOUR_WORD_PLT
18151 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18152 return FALSE;
18153 #endif
18154 }
18155 }
18156 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
18157 {
18158 /* NaCl uses a special first entry in .iplt too. */
18159 osi.sec = htab->root.iplt;
18160 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18161 (output_bfd, osi.sec->output_section));
18162 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18163 return FALSE;
18164 }
18165 if ((htab->root.splt && htab->root.splt->size > 0)
18166 || (htab->root.iplt && htab->root.iplt->size > 0))
18167 {
18168 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18169 for (input_bfd = info->input_bfds;
18170 input_bfd != NULL;
18171 input_bfd = input_bfd->link.next)
18172 {
18173 struct arm_local_iplt_info **local_iplt;
18174 unsigned int i, num_syms;
18175
18176 local_iplt = elf32_arm_local_iplt (input_bfd);
18177 if (local_iplt != NULL)
18178 {
18179 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18180 for (i = 0; i < num_syms; i++)
18181 if (local_iplt[i] != NULL
18182 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
18183 &local_iplt[i]->root,
18184 &local_iplt[i]->arm))
18185 return FALSE;
18186 }
18187 }
18188 }
18189 if (htab->dt_tlsdesc_plt != 0)
18190 {
18191 /* Mapping symbols for the lazy tls trampoline. */
18192 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
18193 return FALSE;
18194
18195 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18196 htab->dt_tlsdesc_plt + 24))
18197 return FALSE;
18198 }
18199 if (htab->tls_trampoline != 0)
18200 {
18201 /* Mapping symbols for the tls trampoline. */
18202 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18203 return FALSE;
18204 #ifdef FOUR_WORD_PLT
18205 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18206 htab->tls_trampoline + 12))
18207 return FALSE;
18208 #endif
18209 }
18210
18211 return TRUE;
18212 }
18213
18214 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18215 the import library. All SYMCOUNT symbols of ABFD can be examined
18216 from their pointers in SYMS. Pointers of symbols to keep should be
18217 stored continuously at the beginning of that array.
18218
18219 Returns the number of symbols to keep. */
18220
18221 static unsigned int
18222 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18223 struct bfd_link_info *info,
18224 asymbol **syms, long symcount)
18225 {
18226 size_t maxnamelen;
18227 char *cmse_name;
18228 long src_count, dst_count = 0;
18229 struct elf32_arm_link_hash_table *htab;
18230
18231 htab = elf32_arm_hash_table (info);
18232 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18233 symcount = 0;
18234
18235 maxnamelen = 128;
18236 cmse_name = (char *) bfd_malloc (maxnamelen);
18237 for (src_count = 0; src_count < symcount; src_count++)
18238 {
18239 struct elf32_arm_link_hash_entry *cmse_hash;
18240 asymbol *sym;
18241 flagword flags;
18242 char *name;
18243 size_t namelen;
18244
18245 sym = syms[src_count];
18246 flags = sym->flags;
18247 name = (char *) bfd_asymbol_name (sym);
18248
18249 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18250 continue;
18251 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18252 continue;
18253
18254 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18255 if (namelen > maxnamelen)
18256 {
18257 cmse_name = (char *)
18258 bfd_realloc (cmse_name, namelen);
18259 maxnamelen = namelen;
18260 }
18261 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18262 cmse_hash = (struct elf32_arm_link_hash_entry *)
18263 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
18264
18265 if (!cmse_hash
18266 || (cmse_hash->root.root.type != bfd_link_hash_defined
18267 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18268 || cmse_hash->root.type != STT_FUNC)
18269 continue;
18270
18271 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
18272 continue;
18273
18274 syms[dst_count++] = sym;
18275 }
18276 free (cmse_name);
18277
18278 syms[dst_count] = NULL;
18279
18280 return dst_count;
18281 }
18282
18283 /* Filter symbols of ABFD to include in the import library. All
18284 SYMCOUNT symbols of ABFD can be examined from their pointers in
18285 SYMS. Pointers of symbols to keep should be stored continuously at
18286 the beginning of that array.
18287
18288 Returns the number of symbols to keep. */
18289
18290 static unsigned int
18291 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18292 struct bfd_link_info *info,
18293 asymbol **syms, long symcount)
18294 {
18295 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18296
18297 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18298 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18299 library to be a relocatable object file. */
18300 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18301 if (globals->cmse_implib)
18302 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18303 else
18304 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18305 }
18306
18307 /* Allocate target specific section data. */
18308
18309 static bfd_boolean
18310 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18311 {
18312 if (!sec->used_by_bfd)
18313 {
18314 _arm_elf_section_data *sdata;
18315 bfd_size_type amt = sizeof (*sdata);
18316
18317 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18318 if (sdata == NULL)
18319 return FALSE;
18320 sec->used_by_bfd = sdata;
18321 }
18322
18323 return _bfd_elf_new_section_hook (abfd, sec);
18324 }
18325
18326
18327 /* Used to order a list of mapping symbols by address. */
18328
18329 static int
18330 elf32_arm_compare_mapping (const void * a, const void * b)
18331 {
18332 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18333 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18334
18335 if (amap->vma > bmap->vma)
18336 return 1;
18337 else if (amap->vma < bmap->vma)
18338 return -1;
18339 else if (amap->type > bmap->type)
18340 /* Ensure results do not depend on the host qsort for objects with
18341 multiple mapping symbols at the same address by sorting on type
18342 after vma. */
18343 return 1;
18344 else if (amap->type < bmap->type)
18345 return -1;
18346 else
18347 return 0;
18348 }
18349
18350 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18351
18352 static unsigned long
18353 offset_prel31 (unsigned long addr, bfd_vma offset)
18354 {
18355 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18356 }
18357
18358 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18359 relocations. */
18360
18361 static void
18362 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18363 {
18364 unsigned long first_word = bfd_get_32 (output_bfd, from);
18365 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18366
18367 /* High bit of first word is supposed to be zero. */
18368 if ((first_word & 0x80000000ul) == 0)
18369 first_word = offset_prel31 (first_word, offset);
18370
18371 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18372 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18373 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18374 second_word = offset_prel31 (second_word, offset);
18375
18376 bfd_put_32 (output_bfd, first_word, to);
18377 bfd_put_32 (output_bfd, second_word, to + 4);
18378 }
18379
18380 /* Data for make_branch_to_a8_stub(). */
18381
18382 struct a8_branch_to_stub_data
18383 {
18384 asection *writing_section;
18385 bfd_byte *contents;
18386 };
18387
18388
18389 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18390 places for a particular section. */
18391
18392 static bfd_boolean
18393 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18394 void *in_arg)
18395 {
18396 struct elf32_arm_stub_hash_entry *stub_entry;
18397 struct a8_branch_to_stub_data *data;
18398 bfd_byte *contents;
18399 unsigned long branch_insn;
18400 bfd_vma veneered_insn_loc, veneer_entry_loc;
18401 bfd_signed_vma branch_offset;
18402 bfd *abfd;
18403 unsigned int loc;
18404
18405 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18406 data = (struct a8_branch_to_stub_data *) in_arg;
18407
18408 if (stub_entry->target_section != data->writing_section
18409 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18410 return TRUE;
18411
18412 contents = data->contents;
18413
18414 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18415 generated when both source and target are in the same section. */
18416 veneered_insn_loc = stub_entry->target_section->output_section->vma
18417 + stub_entry->target_section->output_offset
18418 + stub_entry->source_value;
18419
18420 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18421 + stub_entry->stub_sec->output_offset
18422 + stub_entry->stub_offset;
18423
18424 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18425 veneered_insn_loc &= ~3u;
18426
18427 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18428
18429 abfd = stub_entry->target_section->owner;
18430 loc = stub_entry->source_value;
18431
18432 /* We attempt to avoid this condition by setting stubs_always_after_branch
18433 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18434 This check is just to be on the safe side... */
18435 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18436 {
18437 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18438 "allocated in unsafe location"), abfd);
18439 return FALSE;
18440 }
18441
18442 switch (stub_entry->stub_type)
18443 {
18444 case arm_stub_a8_veneer_b:
18445 case arm_stub_a8_veneer_b_cond:
18446 branch_insn = 0xf0009000;
18447 goto jump24;
18448
18449 case arm_stub_a8_veneer_blx:
18450 branch_insn = 0xf000e800;
18451 goto jump24;
18452
18453 case arm_stub_a8_veneer_bl:
18454 {
18455 unsigned int i1, j1, i2, j2, s;
18456
18457 branch_insn = 0xf000d000;
18458
18459 jump24:
18460 if (branch_offset < -16777216 || branch_offset > 16777214)
18461 {
18462 /* There's not much we can do apart from complain if this
18463 happens. */
18464 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18465 "of range (input file too large)"), abfd);
18466 return FALSE;
18467 }
18468
18469 /* i1 = not(j1 eor s), so:
18470 not i1 = j1 eor s
18471 j1 = (not i1) eor s. */
18472
18473 branch_insn |= (branch_offset >> 1) & 0x7ff;
18474 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18475 i2 = (branch_offset >> 22) & 1;
18476 i1 = (branch_offset >> 23) & 1;
18477 s = (branch_offset >> 24) & 1;
18478 j1 = (!i1) ^ s;
18479 j2 = (!i2) ^ s;
18480 branch_insn |= j2 << 11;
18481 branch_insn |= j1 << 13;
18482 branch_insn |= s << 26;
18483 }
18484 break;
18485
18486 default:
18487 BFD_FAIL ();
18488 return FALSE;
18489 }
18490
18491 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18492 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18493
18494 return TRUE;
18495 }
18496
18497 /* Beginning of stm32l4xx work-around. */
18498
18499 /* Functions encoding instructions necessary for the emission of the
18500 fix-stm32l4xx-629360.
18501 Encoding is extracted from the
18502 ARM (C) Architecture Reference Manual
18503 ARMv7-A and ARMv7-R edition
18504 ARM DDI 0406C.b (ID072512). */
18505
18506 static inline bfd_vma
18507 create_instruction_branch_absolute (int branch_offset)
18508 {
18509 /* A8.8.18 B (A8-334)
18510 B target_address (Encoding T4). */
18511 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18512 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18513 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18514
18515 int s = ((branch_offset & 0x1000000) >> 24);
18516 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18517 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18518
18519 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18520 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18521
18522 bfd_vma patched_inst = 0xf0009000
18523 | s << 26 /* S. */
18524 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18525 | j1 << 13 /* J1. */
18526 | j2 << 11 /* J2. */
18527 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18528
18529 return patched_inst;
18530 }
18531
18532 static inline bfd_vma
18533 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18534 {
18535 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18536 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18537 bfd_vma patched_inst = 0xe8900000
18538 | (/*W=*/wback << 21)
18539 | (base_reg << 16)
18540 | (reg_mask & 0x0000ffff);
18541
18542 return patched_inst;
18543 }
18544
18545 static inline bfd_vma
18546 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18547 {
18548 /* A8.8.60 LDMDB/LDMEA (A8-402)
18549 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18550 bfd_vma patched_inst = 0xe9100000
18551 | (/*W=*/wback << 21)
18552 | (base_reg << 16)
18553 | (reg_mask & 0x0000ffff);
18554
18555 return patched_inst;
18556 }
18557
18558 static inline bfd_vma
18559 create_instruction_mov (int target_reg, int source_reg)
18560 {
18561 /* A8.8.103 MOV (register) (A8-486)
18562 MOV Rd, Rm (Encoding T1). */
18563 bfd_vma patched_inst = 0x4600
18564 | (target_reg & 0x7)
18565 | ((target_reg & 0x8) >> 3) << 7
18566 | (source_reg << 3);
18567
18568 return patched_inst;
18569 }
18570
18571 static inline bfd_vma
18572 create_instruction_sub (int target_reg, int source_reg, int value)
18573 {
18574 /* A8.8.221 SUB (immediate) (A8-708)
18575 SUB Rd, Rn, #value (Encoding T3). */
18576 bfd_vma patched_inst = 0xf1a00000
18577 | (target_reg << 8)
18578 | (source_reg << 16)
18579 | (/*S=*/0 << 20)
18580 | ((value & 0x800) >> 11) << 26
18581 | ((value & 0x700) >> 8) << 12
18582 | (value & 0x0ff);
18583
18584 return patched_inst;
18585 }
18586
18587 static inline bfd_vma
18588 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18589 int first_reg)
18590 {
18591 /* A8.8.332 VLDM (A8-922)
18592 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18593 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18594 | (/*W=*/wback << 21)
18595 | (base_reg << 16)
18596 | (num_words & 0x000000ff)
18597 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18598 | (first_reg & 0x00000001) << 22;
18599
18600 return patched_inst;
18601 }
18602
18603 static inline bfd_vma
18604 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18605 int first_reg)
18606 {
18607 /* A8.8.332 VLDM (A8-922)
18608 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18609 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18610 | (base_reg << 16)
18611 | (num_words & 0x000000ff)
18612 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18613 | (first_reg & 0x00000001) << 22;
18614
18615 return patched_inst;
18616 }
18617
18618 static inline bfd_vma
18619 create_instruction_udf_w (int value)
18620 {
18621 /* A8.8.247 UDF (A8-758)
18622 Undefined (Encoding T2). */
18623 bfd_vma patched_inst = 0xf7f0a000
18624 | (value & 0x00000fff)
18625 | (value & 0x000f0000) << 16;
18626
18627 return patched_inst;
18628 }
18629
18630 static inline bfd_vma
18631 create_instruction_udf (int value)
18632 {
18633 /* A8.8.247 UDF (A8-758)
18634 Undefined (Encoding T1). */
18635 bfd_vma patched_inst = 0xde00
18636 | (value & 0xff);
18637
18638 return patched_inst;
18639 }
18640
18641 /* Functions writing an instruction in memory, returning the next
18642 memory position to write to. */
18643
18644 static inline bfd_byte *
18645 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18646 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18647 {
18648 put_thumb2_insn (htab, output_bfd, insn, pt);
18649 return pt + 4;
18650 }
18651
18652 static inline bfd_byte *
18653 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18654 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18655 {
18656 put_thumb_insn (htab, output_bfd, insn, pt);
18657 return pt + 2;
18658 }
18659
18660 /* Function filling up a region in memory with T1 and T2 UDFs taking
18661 care of alignment. */
18662
18663 static bfd_byte *
18664 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18665 bfd * output_bfd,
18666 const bfd_byte * const base_stub_contents,
18667 bfd_byte * const from_stub_contents,
18668 const bfd_byte * const end_stub_contents)
18669 {
18670 bfd_byte *current_stub_contents = from_stub_contents;
18671
18672 /* Fill the remaining of the stub with deterministic contents : UDF
18673 instructions.
18674 Check if realignment is needed on modulo 4 frontier using T1, to
18675 further use T2. */
18676 if ((current_stub_contents < end_stub_contents)
18677 && !((current_stub_contents - base_stub_contents) % 2)
18678 && ((current_stub_contents - base_stub_contents) % 4))
18679 current_stub_contents =
18680 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18681 create_instruction_udf (0));
18682
18683 for (; current_stub_contents < end_stub_contents;)
18684 current_stub_contents =
18685 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18686 create_instruction_udf_w (0));
18687
18688 return current_stub_contents;
18689 }
18690
18691 /* Functions writing the stream of instructions equivalent to the
18692 derived sequence for ldmia, ldmdb, vldm respectively. */
18693
18694 static void
18695 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18696 bfd * output_bfd,
18697 const insn32 initial_insn,
18698 const bfd_byte *const initial_insn_addr,
18699 bfd_byte *const base_stub_contents)
18700 {
18701 int wback = (initial_insn & 0x00200000) >> 21;
18702 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18703 int insn_all_registers = initial_insn & 0x0000ffff;
18704 int insn_low_registers, insn_high_registers;
18705 int usable_register_mask;
18706 int nb_registers = elf32_arm_popcount (insn_all_registers);
18707 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18708 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18709 bfd_byte *current_stub_contents = base_stub_contents;
18710
18711 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18712
18713 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18714 smaller than 8 registers load sequences that do not cause the
18715 hardware issue. */
18716 if (nb_registers <= 8)
18717 {
18718 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18719 current_stub_contents =
18720 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18721 initial_insn);
18722
18723 /* B initial_insn_addr+4. */
18724 if (!restore_pc)
18725 current_stub_contents =
18726 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18727 create_instruction_branch_absolute
18728 (initial_insn_addr - current_stub_contents));
18729
18730 /* Fill the remaining of the stub with deterministic contents. */
18731 current_stub_contents =
18732 stm32l4xx_fill_stub_udf (htab, output_bfd,
18733 base_stub_contents, current_stub_contents,
18734 base_stub_contents +
18735 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18736
18737 return;
18738 }
18739
18740 /* - reg_list[13] == 0. */
18741 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18742
18743 /* - reg_list[14] & reg_list[15] != 1. */
18744 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18745
18746 /* - if (wback==1) reg_list[rn] == 0. */
18747 BFD_ASSERT (!wback || !restore_rn);
18748
18749 /* - nb_registers > 8. */
18750 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18751
18752 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18753
18754 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18755 - One with the 7 lowest registers (register mask 0x007F)
18756 This LDM will finally contain between 2 and 7 registers
18757 - One with the 7 highest registers (register mask 0xDF80)
18758 This ldm will finally contain between 2 and 7 registers. */
18759 insn_low_registers = insn_all_registers & 0x007F;
18760 insn_high_registers = insn_all_registers & 0xDF80;
18761
18762 /* A spare register may be needed during this veneer to temporarily
18763 handle the base register. This register will be restored with the
18764 last LDM operation.
18765 The usable register may be any general purpose register (that
18766 excludes PC, SP, LR : register mask is 0x1FFF). */
18767 usable_register_mask = 0x1FFF;
18768
18769 /* Generate the stub function. */
18770 if (wback)
18771 {
18772 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18773 current_stub_contents =
18774 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18775 create_instruction_ldmia
18776 (rn, /*wback=*/1, insn_low_registers));
18777
18778 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18779 current_stub_contents =
18780 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18781 create_instruction_ldmia
18782 (rn, /*wback=*/1, insn_high_registers));
18783 if (!restore_pc)
18784 {
18785 /* B initial_insn_addr+4. */
18786 current_stub_contents =
18787 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18788 create_instruction_branch_absolute
18789 (initial_insn_addr - current_stub_contents));
18790 }
18791 }
18792 else /* if (!wback). */
18793 {
18794 ri = rn;
18795
18796 /* If Rn is not part of the high-register-list, move it there. */
18797 if (!(insn_high_registers & (1 << rn)))
18798 {
18799 /* Choose a Ri in the high-register-list that will be restored. */
18800 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18801
18802 /* MOV Ri, Rn. */
18803 current_stub_contents =
18804 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18805 create_instruction_mov (ri, rn));
18806 }
18807
18808 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18809 current_stub_contents =
18810 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18811 create_instruction_ldmia
18812 (ri, /*wback=*/1, insn_low_registers));
18813
18814 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18815 current_stub_contents =
18816 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18817 create_instruction_ldmia
18818 (ri, /*wback=*/0, insn_high_registers));
18819
18820 if (!restore_pc)
18821 {
18822 /* B initial_insn_addr+4. */
18823 current_stub_contents =
18824 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18825 create_instruction_branch_absolute
18826 (initial_insn_addr - current_stub_contents));
18827 }
18828 }
18829
18830 /* Fill the remaining of the stub with deterministic contents. */
18831 current_stub_contents =
18832 stm32l4xx_fill_stub_udf (htab, output_bfd,
18833 base_stub_contents, current_stub_contents,
18834 base_stub_contents +
18835 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18836 }
18837
18838 static void
18839 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18840 bfd * output_bfd,
18841 const insn32 initial_insn,
18842 const bfd_byte *const initial_insn_addr,
18843 bfd_byte *const base_stub_contents)
18844 {
18845 int wback = (initial_insn & 0x00200000) >> 21;
18846 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18847 int insn_all_registers = initial_insn & 0x0000ffff;
18848 int insn_low_registers, insn_high_registers;
18849 int usable_register_mask;
18850 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18851 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18852 int nb_registers = elf32_arm_popcount (insn_all_registers);
18853 bfd_byte *current_stub_contents = base_stub_contents;
18854
18855 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18856
18857 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18858 smaller than 8 registers load sequences that do not cause the
18859 hardware issue. */
18860 if (nb_registers <= 8)
18861 {
18862 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18863 current_stub_contents =
18864 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18865 initial_insn);
18866
18867 /* B initial_insn_addr+4. */
18868 current_stub_contents =
18869 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18870 create_instruction_branch_absolute
18871 (initial_insn_addr - current_stub_contents));
18872
18873 /* Fill the remaining of the stub with deterministic contents. */
18874 current_stub_contents =
18875 stm32l4xx_fill_stub_udf (htab, output_bfd,
18876 base_stub_contents, current_stub_contents,
18877 base_stub_contents +
18878 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18879
18880 return;
18881 }
18882
18883 /* - reg_list[13] == 0. */
18884 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18885
18886 /* - reg_list[14] & reg_list[15] != 1. */
18887 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18888
18889 /* - if (wback==1) reg_list[rn] == 0. */
18890 BFD_ASSERT (!wback || !restore_rn);
18891
18892 /* - nb_registers > 8. */
18893 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18894
18895 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18896
18897 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18898 - One with the 7 lowest registers (register mask 0x007F)
18899 This LDM will finally contain between 2 and 7 registers
18900 - One with the 7 highest registers (register mask 0xDF80)
18901 This ldm will finally contain between 2 and 7 registers. */
18902 insn_low_registers = insn_all_registers & 0x007F;
18903 insn_high_registers = insn_all_registers & 0xDF80;
18904
18905 /* A spare register may be needed during this veneer to temporarily
18906 handle the base register. This register will be restored with
18907 the last LDM operation.
18908 The usable register may be any general purpose register (that excludes
18909 PC, SP, LR : register mask is 0x1FFF). */
18910 usable_register_mask = 0x1FFF;
18911
18912 /* Generate the stub function. */
18913 if (!wback && !restore_pc && !restore_rn)
18914 {
18915 /* Choose a Ri in the low-register-list that will be restored. */
18916 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18917
18918 /* MOV Ri, Rn. */
18919 current_stub_contents =
18920 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18921 create_instruction_mov (ri, rn));
18922
18923 /* LDMDB Ri!, {R-high-register-list}. */
18924 current_stub_contents =
18925 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18926 create_instruction_ldmdb
18927 (ri, /*wback=*/1, insn_high_registers));
18928
18929 /* LDMDB Ri, {R-low-register-list}. */
18930 current_stub_contents =
18931 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18932 create_instruction_ldmdb
18933 (ri, /*wback=*/0, insn_low_registers));
18934
18935 /* B initial_insn_addr+4. */
18936 current_stub_contents =
18937 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18938 create_instruction_branch_absolute
18939 (initial_insn_addr - current_stub_contents));
18940 }
18941 else if (wback && !restore_pc && !restore_rn)
18942 {
18943 /* LDMDB Rn!, {R-high-register-list}. */
18944 current_stub_contents =
18945 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18946 create_instruction_ldmdb
18947 (rn, /*wback=*/1, insn_high_registers));
18948
18949 /* LDMDB Rn!, {R-low-register-list}. */
18950 current_stub_contents =
18951 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18952 create_instruction_ldmdb
18953 (rn, /*wback=*/1, insn_low_registers));
18954
18955 /* B initial_insn_addr+4. */
18956 current_stub_contents =
18957 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18958 create_instruction_branch_absolute
18959 (initial_insn_addr - current_stub_contents));
18960 }
18961 else if (!wback && restore_pc && !restore_rn)
18962 {
18963 /* Choose a Ri in the high-register-list that will be restored. */
18964 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18965
18966 /* SUB Ri, Rn, #(4*nb_registers). */
18967 current_stub_contents =
18968 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18969 create_instruction_sub (ri, rn, (4 * nb_registers)));
18970
18971 /* LDMIA Ri!, {R-low-register-list}. */
18972 current_stub_contents =
18973 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18974 create_instruction_ldmia
18975 (ri, /*wback=*/1, insn_low_registers));
18976
18977 /* LDMIA Ri, {R-high-register-list}. */
18978 current_stub_contents =
18979 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18980 create_instruction_ldmia
18981 (ri, /*wback=*/0, insn_high_registers));
18982 }
18983 else if (wback && restore_pc && !restore_rn)
18984 {
18985 /* Choose a Ri in the high-register-list that will be restored. */
18986 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18987
18988 /* SUB Rn, Rn, #(4*nb_registers) */
18989 current_stub_contents =
18990 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18991 create_instruction_sub (rn, rn, (4 * nb_registers)));
18992
18993 /* MOV Ri, Rn. */
18994 current_stub_contents =
18995 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18996 create_instruction_mov (ri, rn));
18997
18998 /* LDMIA Ri!, {R-low-register-list}. */
18999 current_stub_contents =
19000 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19001 create_instruction_ldmia
19002 (ri, /*wback=*/1, insn_low_registers));
19003
19004 /* LDMIA Ri, {R-high-register-list}. */
19005 current_stub_contents =
19006 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19007 create_instruction_ldmia
19008 (ri, /*wback=*/0, insn_high_registers));
19009 }
19010 else if (!wback && !restore_pc && restore_rn)
19011 {
19012 ri = rn;
19013 if (!(insn_low_registers & (1 << rn)))
19014 {
19015 /* Choose a Ri in the low-register-list that will be restored. */
19016 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19017
19018 /* MOV Ri, Rn. */
19019 current_stub_contents =
19020 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19021 create_instruction_mov (ri, rn));
19022 }
19023
19024 /* LDMDB Ri!, {R-high-register-list}. */
19025 current_stub_contents =
19026 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19027 create_instruction_ldmdb
19028 (ri, /*wback=*/1, insn_high_registers));
19029
19030 /* LDMDB Ri, {R-low-register-list}. */
19031 current_stub_contents =
19032 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19033 create_instruction_ldmdb
19034 (ri, /*wback=*/0, insn_low_registers));
19035
19036 /* B initial_insn_addr+4. */
19037 current_stub_contents =
19038 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19039 create_instruction_branch_absolute
19040 (initial_insn_addr - current_stub_contents));
19041 }
19042 else if (!wback && restore_pc && restore_rn)
19043 {
19044 ri = rn;
19045 if (!(insn_high_registers & (1 << rn)))
19046 {
19047 /* Choose a Ri in the high-register-list that will be restored. */
19048 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19049 }
19050
19051 /* SUB Ri, Rn, #(4*nb_registers). */
19052 current_stub_contents =
19053 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19054 create_instruction_sub (ri, rn, (4 * nb_registers)));
19055
19056 /* LDMIA Ri!, {R-low-register-list}. */
19057 current_stub_contents =
19058 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19059 create_instruction_ldmia
19060 (ri, /*wback=*/1, insn_low_registers));
19061
19062 /* LDMIA Ri, {R-high-register-list}. */
19063 current_stub_contents =
19064 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19065 create_instruction_ldmia
19066 (ri, /*wback=*/0, insn_high_registers));
19067 }
19068 else if (wback && restore_rn)
19069 {
19070 /* The assembler should not have accepted to encode this. */
19071 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19072 "undefined behavior.\n");
19073 }
19074
19075 /* Fill the remaining of the stub with deterministic contents. */
19076 current_stub_contents =
19077 stm32l4xx_fill_stub_udf (htab, output_bfd,
19078 base_stub_contents, current_stub_contents,
19079 base_stub_contents +
19080 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19081
19082 }
19083
19084 static void
19085 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19086 bfd * output_bfd,
19087 const insn32 initial_insn,
19088 const bfd_byte *const initial_insn_addr,
19089 bfd_byte *const base_stub_contents)
19090 {
19091 int num_words = ((unsigned int) initial_insn << 24) >> 24;
19092 bfd_byte *current_stub_contents = base_stub_contents;
19093
19094 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19095
19096 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19097 smaller than 8 words load sequences that do not cause the
19098 hardware issue. */
19099 if (num_words <= 8)
19100 {
19101 /* Untouched instruction. */
19102 current_stub_contents =
19103 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19104 initial_insn);
19105
19106 /* B initial_insn_addr+4. */
19107 current_stub_contents =
19108 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19109 create_instruction_branch_absolute
19110 (initial_insn_addr - current_stub_contents));
19111 }
19112 else
19113 {
19114 bfd_boolean is_dp = /* DP encoding. */
19115 (initial_insn & 0xfe100f00) == 0xec100b00;
19116 bfd_boolean is_ia_nobang = /* (IA without !). */
19117 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19118 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
19119 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19120 bfd_boolean is_db_bang = /* (DB with !). */
19121 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19122 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19123 /* d = UInt (Vd:D);. */
19124 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19125 | (((unsigned int)initial_insn << 9) >> 31);
19126
19127 /* Compute the number of 8-words chunks needed to split. */
19128 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19129 int chunk;
19130
19131 /* The test coverage has been done assuming the following
19132 hypothesis that exactly one of the previous is_ predicates is
19133 true. */
19134 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19135 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19136
19137 /* We treat the cutting of the words in one pass for all
19138 cases, then we emit the adjustments:
19139
19140 vldm rx, {...}
19141 -> vldm rx!, {8_words_or_less} for each needed 8_word
19142 -> sub rx, rx, #size (list)
19143
19144 vldm rx!, {...}
19145 -> vldm rx!, {8_words_or_less} for each needed 8_word
19146 This also handles vpop instruction (when rx is sp)
19147
19148 vldmd rx!, {...}
19149 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19150 for (chunk = 0; chunk < chunks; ++chunk)
19151 {
19152 bfd_vma new_insn = 0;
19153
19154 if (is_ia_nobang || is_ia_bang)
19155 {
19156 new_insn = create_instruction_vldmia
19157 (base_reg,
19158 is_dp,
19159 /*wback= . */1,
19160 chunks - (chunk + 1) ?
19161 8 : num_words - chunk * 8,
19162 first_reg + chunk * 8);
19163 }
19164 else if (is_db_bang)
19165 {
19166 new_insn = create_instruction_vldmdb
19167 (base_reg,
19168 is_dp,
19169 chunks - (chunk + 1) ?
19170 8 : num_words - chunk * 8,
19171 first_reg + chunk * 8);
19172 }
19173
19174 if (new_insn)
19175 current_stub_contents =
19176 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19177 new_insn);
19178 }
19179
19180 /* Only this case requires the base register compensation
19181 subtract. */
19182 if (is_ia_nobang)
19183 {
19184 current_stub_contents =
19185 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19186 create_instruction_sub
19187 (base_reg, base_reg, 4*num_words));
19188 }
19189
19190 /* B initial_insn_addr+4. */
19191 current_stub_contents =
19192 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19193 create_instruction_branch_absolute
19194 (initial_insn_addr - current_stub_contents));
19195 }
19196
19197 /* Fill the remaining of the stub with deterministic contents. */
19198 current_stub_contents =
19199 stm32l4xx_fill_stub_udf (htab, output_bfd,
19200 base_stub_contents, current_stub_contents,
19201 base_stub_contents +
19202 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19203 }
19204
19205 static void
19206 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19207 bfd * output_bfd,
19208 const insn32 wrong_insn,
19209 const bfd_byte *const wrong_insn_addr,
19210 bfd_byte *const stub_contents)
19211 {
19212 if (is_thumb2_ldmia (wrong_insn))
19213 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19214 wrong_insn, wrong_insn_addr,
19215 stub_contents);
19216 else if (is_thumb2_ldmdb (wrong_insn))
19217 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19218 wrong_insn, wrong_insn_addr,
19219 stub_contents);
19220 else if (is_thumb2_vldm (wrong_insn))
19221 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19222 wrong_insn, wrong_insn_addr,
19223 stub_contents);
19224 }
19225
19226 /* End of stm32l4xx work-around. */
19227
19228
19229 /* Do code byteswapping. Return FALSE afterwards so that the section is
19230 written out as normal. */
19231
19232 static bfd_boolean
19233 elf32_arm_write_section (bfd *output_bfd,
19234 struct bfd_link_info *link_info,
19235 asection *sec,
19236 bfd_byte *contents)
19237 {
19238 unsigned int mapcount, errcount;
19239 _arm_elf_section_data *arm_data;
19240 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19241 elf32_arm_section_map *map;
19242 elf32_vfp11_erratum_list *errnode;
19243 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19244 bfd_vma ptr;
19245 bfd_vma end;
19246 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19247 bfd_byte tmp;
19248 unsigned int i;
19249
19250 if (globals == NULL)
19251 return FALSE;
19252
19253 /* If this section has not been allocated an _arm_elf_section_data
19254 structure then we cannot record anything. */
19255 arm_data = get_arm_elf_section_data (sec);
19256 if (arm_data == NULL)
19257 return FALSE;
19258
19259 mapcount = arm_data->mapcount;
19260 map = arm_data->map;
19261 errcount = arm_data->erratumcount;
19262
19263 if (errcount != 0)
19264 {
19265 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19266
19267 for (errnode = arm_data->erratumlist; errnode != 0;
19268 errnode = errnode->next)
19269 {
19270 bfd_vma target = errnode->vma - offset;
19271
19272 switch (errnode->type)
19273 {
19274 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19275 {
19276 bfd_vma branch_to_veneer;
19277 /* Original condition code of instruction, plus bit mask for
19278 ARM B instruction. */
19279 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19280 | 0x0a000000;
19281
19282 /* The instruction is before the label. */
19283 target -= 4;
19284
19285 /* Above offset included in -4 below. */
19286 branch_to_veneer = errnode->u.b.veneer->vma
19287 - errnode->vma - 4;
19288
19289 if ((signed) branch_to_veneer < -(1 << 25)
19290 || (signed) branch_to_veneer >= (1 << 25))
19291 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19292 "range"), output_bfd);
19293
19294 insn |= (branch_to_veneer >> 2) & 0xffffff;
19295 contents[endianflip ^ target] = insn & 0xff;
19296 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19297 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19298 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19299 }
19300 break;
19301
19302 case VFP11_ERRATUM_ARM_VENEER:
19303 {
19304 bfd_vma branch_from_veneer;
19305 unsigned int insn;
19306
19307 /* Take size of veneer into account. */
19308 branch_from_veneer = errnode->u.v.branch->vma
19309 - errnode->vma - 12;
19310
19311 if ((signed) branch_from_veneer < -(1 << 25)
19312 || (signed) branch_from_veneer >= (1 << 25))
19313 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19314 "range"), output_bfd);
19315
19316 /* Original instruction. */
19317 insn = errnode->u.v.branch->u.b.vfp_insn;
19318 contents[endianflip ^ target] = insn & 0xff;
19319 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19320 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19321 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19322
19323 /* Branch back to insn after original insn. */
19324 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19325 contents[endianflip ^ (target + 4)] = insn & 0xff;
19326 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19327 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19328 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19329 }
19330 break;
19331
19332 default:
19333 abort ();
19334 }
19335 }
19336 }
19337
19338 if (arm_data->stm32l4xx_erratumcount != 0)
19339 {
19340 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19341 stm32l4xx_errnode != 0;
19342 stm32l4xx_errnode = stm32l4xx_errnode->next)
19343 {
19344 bfd_vma target = stm32l4xx_errnode->vma - offset;
19345
19346 switch (stm32l4xx_errnode->type)
19347 {
19348 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19349 {
19350 unsigned int insn;
19351 bfd_vma branch_to_veneer =
19352 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19353
19354 if ((signed) branch_to_veneer < -(1 << 24)
19355 || (signed) branch_to_veneer >= (1 << 24))
19356 {
19357 bfd_vma out_of_range =
19358 ((signed) branch_to_veneer < -(1 << 24)) ?
19359 - branch_to_veneer - (1 << 24) :
19360 ((signed) branch_to_veneer >= (1 << 24)) ?
19361 branch_to_veneer - (1 << 24) : 0;
19362
19363 _bfd_error_handler
19364 (_("%pB(%#" PRIx64 "): error: "
19365 "cannot create STM32L4XX veneer; "
19366 "jump out of range by %" PRId64 " bytes; "
19367 "cannot encode branch instruction"),
19368 output_bfd,
19369 (uint64_t) (stm32l4xx_errnode->vma - 4),
19370 (int64_t) out_of_range);
19371 continue;
19372 }
19373
19374 insn = create_instruction_branch_absolute
19375 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19376
19377 /* The instruction is before the label. */
19378 target -= 4;
19379
19380 put_thumb2_insn (globals, output_bfd,
19381 (bfd_vma) insn, contents + target);
19382 }
19383 break;
19384
19385 case STM32L4XX_ERRATUM_VENEER:
19386 {
19387 bfd_byte * veneer;
19388 bfd_byte * veneer_r;
19389 unsigned int insn;
19390
19391 veneer = contents + target;
19392 veneer_r = veneer
19393 + stm32l4xx_errnode->u.b.veneer->vma
19394 - stm32l4xx_errnode->vma - 4;
19395
19396 if ((signed) (veneer_r - veneer -
19397 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19398 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19399 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19400 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19401 || (signed) (veneer_r - veneer) >= (1 << 24))
19402 {
19403 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19404 "veneer"), output_bfd);
19405 continue;
19406 }
19407
19408 /* Original instruction. */
19409 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19410
19411 stm32l4xx_create_replacing_stub
19412 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19413 }
19414 break;
19415
19416 default:
19417 abort ();
19418 }
19419 }
19420 }
19421
19422 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19423 {
19424 arm_unwind_table_edit *edit_node
19425 = arm_data->u.exidx.unwind_edit_list;
19426 /* Now, sec->size is the size of the section we will write. The original
19427 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19428 markers) was sec->rawsize. (This isn't the case if we perform no
19429 edits, then rawsize will be zero and we should use size). */
19430 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19431 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19432 unsigned int in_index, out_index;
19433 bfd_vma add_to_offsets = 0;
19434
19435 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19436 {
19437 if (edit_node)
19438 {
19439 unsigned int edit_index = edit_node->index;
19440
19441 if (in_index < edit_index && in_index * 8 < input_size)
19442 {
19443 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19444 contents + in_index * 8, add_to_offsets);
19445 out_index++;
19446 in_index++;
19447 }
19448 else if (in_index == edit_index
19449 || (in_index * 8 >= input_size
19450 && edit_index == UINT_MAX))
19451 {
19452 switch (edit_node->type)
19453 {
19454 case DELETE_EXIDX_ENTRY:
19455 in_index++;
19456 add_to_offsets += 8;
19457 break;
19458
19459 case INSERT_EXIDX_CANTUNWIND_AT_END:
19460 {
19461 asection *text_sec = edit_node->linked_section;
19462 bfd_vma text_offset = text_sec->output_section->vma
19463 + text_sec->output_offset
19464 + text_sec->size;
19465 bfd_vma exidx_offset = offset + out_index * 8;
19466 unsigned long prel31_offset;
19467
19468 /* Note: this is meant to be equivalent to an
19469 R_ARM_PREL31 relocation. These synthetic
19470 EXIDX_CANTUNWIND markers are not relocated by the
19471 usual BFD method. */
19472 prel31_offset = (text_offset - exidx_offset)
19473 & 0x7ffffffful;
19474 if (bfd_link_relocatable (link_info))
19475 {
19476 /* Here relocation for new EXIDX_CANTUNWIND is
19477 created, so there is no need to
19478 adjust offset by hand. */
19479 prel31_offset = text_sec->output_offset
19480 + text_sec->size;
19481 }
19482
19483 /* First address we can't unwind. */
19484 bfd_put_32 (output_bfd, prel31_offset,
19485 &edited_contents[out_index * 8]);
19486
19487 /* Code for EXIDX_CANTUNWIND. */
19488 bfd_put_32 (output_bfd, 0x1,
19489 &edited_contents[out_index * 8 + 4]);
19490
19491 out_index++;
19492 add_to_offsets -= 8;
19493 }
19494 break;
19495 }
19496
19497 edit_node = edit_node->next;
19498 }
19499 }
19500 else
19501 {
19502 /* No more edits, copy remaining entries verbatim. */
19503 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19504 contents + in_index * 8, add_to_offsets);
19505 out_index++;
19506 in_index++;
19507 }
19508 }
19509
19510 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19511 bfd_set_section_contents (output_bfd, sec->output_section,
19512 edited_contents,
19513 (file_ptr) sec->output_offset, sec->size);
19514
19515 return TRUE;
19516 }
19517
19518 /* Fix code to point to Cortex-A8 erratum stubs. */
19519 if (globals->fix_cortex_a8)
19520 {
19521 struct a8_branch_to_stub_data data;
19522
19523 data.writing_section = sec;
19524 data.contents = contents;
19525
19526 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19527 & data);
19528 }
19529
19530 if (mapcount == 0)
19531 return FALSE;
19532
19533 if (globals->byteswap_code)
19534 {
19535 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19536
19537 ptr = map[0].vma;
19538 for (i = 0; i < mapcount; i++)
19539 {
19540 if (i == mapcount - 1)
19541 end = sec->size;
19542 else
19543 end = map[i + 1].vma;
19544
19545 switch (map[i].type)
19546 {
19547 case 'a':
19548 /* Byte swap code words. */
19549 while (ptr + 3 < end)
19550 {
19551 tmp = contents[ptr];
19552 contents[ptr] = contents[ptr + 3];
19553 contents[ptr + 3] = tmp;
19554 tmp = contents[ptr + 1];
19555 contents[ptr + 1] = contents[ptr + 2];
19556 contents[ptr + 2] = tmp;
19557 ptr += 4;
19558 }
19559 break;
19560
19561 case 't':
19562 /* Byte swap code halfwords. */
19563 while (ptr + 1 < end)
19564 {
19565 tmp = contents[ptr];
19566 contents[ptr] = contents[ptr + 1];
19567 contents[ptr + 1] = tmp;
19568 ptr += 2;
19569 }
19570 break;
19571
19572 case 'd':
19573 /* Leave data alone. */
19574 break;
19575 }
19576 ptr = end;
19577 }
19578 }
19579
19580 free (map);
19581 arm_data->mapcount = -1;
19582 arm_data->mapsize = 0;
19583 arm_data->map = NULL;
19584
19585 return FALSE;
19586 }
19587
19588 /* Mangle thumb function symbols as we read them in. */
19589
19590 static bfd_boolean
19591 elf32_arm_swap_symbol_in (bfd * abfd,
19592 const void *psrc,
19593 const void *pshn,
19594 Elf_Internal_Sym *dst)
19595 {
19596 Elf_Internal_Shdr *symtab_hdr;
19597 const char *name = NULL;
19598
19599 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19600 return FALSE;
19601 dst->st_target_internal = 0;
19602
19603 /* New EABI objects mark thumb function symbols by setting the low bit of
19604 the address. */
19605 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19606 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19607 {
19608 if (dst->st_value & 1)
19609 {
19610 dst->st_value &= ~(bfd_vma) 1;
19611 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19612 ST_BRANCH_TO_THUMB);
19613 }
19614 else
19615 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19616 }
19617 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19618 {
19619 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19620 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19621 }
19622 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19623 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19624 else
19625 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19626
19627 /* Mark CMSE special symbols. */
19628 symtab_hdr = & elf_symtab_hdr (abfd);
19629 if (symtab_hdr->sh_size)
19630 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
19631 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
19632 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
19633
19634 return TRUE;
19635 }
19636
19637
19638 /* Mangle thumb function symbols as we write them out. */
19639
19640 static void
19641 elf32_arm_swap_symbol_out (bfd *abfd,
19642 const Elf_Internal_Sym *src,
19643 void *cdst,
19644 void *shndx)
19645 {
19646 Elf_Internal_Sym newsym;
19647
19648 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19649 of the address set, as per the new EABI. We do this unconditionally
19650 because objcopy does not set the elf header flags until after
19651 it writes out the symbol table. */
19652 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19653 {
19654 newsym = *src;
19655 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19656 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19657 if (newsym.st_shndx != SHN_UNDEF)
19658 {
19659 /* Do this only for defined symbols. At link type, the static
19660 linker will simulate the work of dynamic linker of resolving
19661 symbols and will carry over the thumbness of found symbols to
19662 the output symbol table. It's not clear how it happens, but
19663 the thumbness of undefined symbols can well be different at
19664 runtime, and writing '1' for them will be confusing for users
19665 and possibly for dynamic linker itself.
19666 */
19667 newsym.st_value |= 1;
19668 }
19669
19670 src = &newsym;
19671 }
19672 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19673 }
19674
19675 /* Add the PT_ARM_EXIDX program header. */
19676
19677 static bfd_boolean
19678 elf32_arm_modify_segment_map (bfd *abfd,
19679 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19680 {
19681 struct elf_segment_map *m;
19682 asection *sec;
19683
19684 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19685 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19686 {
19687 /* If there is already a PT_ARM_EXIDX header, then we do not
19688 want to add another one. This situation arises when running
19689 "strip"; the input binary already has the header. */
19690 m = elf_seg_map (abfd);
19691 while (m && m->p_type != PT_ARM_EXIDX)
19692 m = m->next;
19693 if (!m)
19694 {
19695 m = (struct elf_segment_map *)
19696 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19697 if (m == NULL)
19698 return FALSE;
19699 m->p_type = PT_ARM_EXIDX;
19700 m->count = 1;
19701 m->sections[0] = sec;
19702
19703 m->next = elf_seg_map (abfd);
19704 elf_seg_map (abfd) = m;
19705 }
19706 }
19707
19708 return TRUE;
19709 }
19710
19711 /* We may add a PT_ARM_EXIDX program header. */
19712
19713 static int
19714 elf32_arm_additional_program_headers (bfd *abfd,
19715 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19716 {
19717 asection *sec;
19718
19719 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19720 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19721 return 1;
19722 else
19723 return 0;
19724 }
19725
19726 /* Hook called by the linker routine which adds symbols from an object
19727 file. */
19728
19729 static bfd_boolean
19730 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19731 Elf_Internal_Sym *sym, const char **namep,
19732 flagword *flagsp, asection **secp, bfd_vma *valp)
19733 {
19734 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
19735 && (abfd->flags & DYNAMIC) == 0
19736 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
19737 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
19738
19739 if (elf32_arm_hash_table (info) == NULL)
19740 return FALSE;
19741
19742 if (elf32_arm_hash_table (info)->vxworks_p
19743 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19744 flagsp, secp, valp))
19745 return FALSE;
19746
19747 return TRUE;
19748 }
19749
19750 /* We use this to override swap_symbol_in and swap_symbol_out. */
19751 const struct elf_size_info elf32_arm_size_info =
19752 {
19753 sizeof (Elf32_External_Ehdr),
19754 sizeof (Elf32_External_Phdr),
19755 sizeof (Elf32_External_Shdr),
19756 sizeof (Elf32_External_Rel),
19757 sizeof (Elf32_External_Rela),
19758 sizeof (Elf32_External_Sym),
19759 sizeof (Elf32_External_Dyn),
19760 sizeof (Elf_External_Note),
19761 4,
19762 1,
19763 32, 2,
19764 ELFCLASS32, EV_CURRENT,
19765 bfd_elf32_write_out_phdrs,
19766 bfd_elf32_write_shdrs_and_ehdr,
19767 bfd_elf32_checksum_contents,
19768 bfd_elf32_write_relocs,
19769 elf32_arm_swap_symbol_in,
19770 elf32_arm_swap_symbol_out,
19771 bfd_elf32_slurp_reloc_table,
19772 bfd_elf32_slurp_symbol_table,
19773 bfd_elf32_swap_dyn_in,
19774 bfd_elf32_swap_dyn_out,
19775 bfd_elf32_swap_reloc_in,
19776 bfd_elf32_swap_reloc_out,
19777 bfd_elf32_swap_reloca_in,
19778 bfd_elf32_swap_reloca_out
19779 };
19780
19781 static bfd_vma
19782 read_code32 (const bfd *abfd, const bfd_byte *addr)
19783 {
19784 /* V7 BE8 code is always little endian. */
19785 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19786 return bfd_getl32 (addr);
19787
19788 return bfd_get_32 (abfd, addr);
19789 }
19790
19791 static bfd_vma
19792 read_code16 (const bfd *abfd, const bfd_byte *addr)
19793 {
19794 /* V7 BE8 code is always little endian. */
19795 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19796 return bfd_getl16 (addr);
19797
19798 return bfd_get_16 (abfd, addr);
19799 }
19800
19801 /* Return size of plt0 entry starting at ADDR
19802 or (bfd_vma) -1 if size can not be determined. */
19803
19804 static bfd_vma
19805 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19806 {
19807 bfd_vma first_word;
19808 bfd_vma plt0_size;
19809
19810 first_word = read_code32 (abfd, addr);
19811
19812 if (first_word == elf32_arm_plt0_entry[0])
19813 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19814 else if (first_word == elf32_thumb2_plt0_entry[0])
19815 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19816 else
19817 /* We don't yet handle this PLT format. */
19818 return (bfd_vma) -1;
19819
19820 return plt0_size;
19821 }
19822
19823 /* Return size of plt entry starting at offset OFFSET
19824 of plt section located at address START
19825 or (bfd_vma) -1 if size can not be determined. */
19826
19827 static bfd_vma
19828 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19829 {
19830 bfd_vma first_insn;
19831 bfd_vma plt_size = 0;
19832 const bfd_byte *addr = start + offset;
19833
19834 /* PLT entry size if fixed on Thumb-only platforms. */
19835 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19836 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19837
19838 /* Respect Thumb stub if necessary. */
19839 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19840 {
19841 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19842 }
19843
19844 /* Strip immediate from first add. */
19845 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19846
19847 #ifdef FOUR_WORD_PLT
19848 if (first_insn == elf32_arm_plt_entry[0])
19849 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19850 #else
19851 if (first_insn == elf32_arm_plt_entry_long[0])
19852 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19853 else if (first_insn == elf32_arm_plt_entry_short[0])
19854 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19855 #endif
19856 else
19857 /* We don't yet handle this PLT format. */
19858 return (bfd_vma) -1;
19859
19860 return plt_size;
19861 }
19862
19863 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19864
19865 static long
19866 elf32_arm_get_synthetic_symtab (bfd *abfd,
19867 long symcount ATTRIBUTE_UNUSED,
19868 asymbol **syms ATTRIBUTE_UNUSED,
19869 long dynsymcount,
19870 asymbol **dynsyms,
19871 asymbol **ret)
19872 {
19873 asection *relplt;
19874 asymbol *s;
19875 arelent *p;
19876 long count, i, n;
19877 size_t size;
19878 Elf_Internal_Shdr *hdr;
19879 char *names;
19880 asection *plt;
19881 bfd_vma offset;
19882 bfd_byte *data;
19883
19884 *ret = NULL;
19885
19886 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19887 return 0;
19888
19889 if (dynsymcount <= 0)
19890 return 0;
19891
19892 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19893 if (relplt == NULL)
19894 return 0;
19895
19896 hdr = &elf_section_data (relplt)->this_hdr;
19897 if (hdr->sh_link != elf_dynsymtab (abfd)
19898 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19899 return 0;
19900
19901 plt = bfd_get_section_by_name (abfd, ".plt");
19902 if (plt == NULL)
19903 return 0;
19904
19905 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19906 return -1;
19907
19908 data = plt->contents;
19909 if (data == NULL)
19910 {
19911 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19912 return -1;
19913 bfd_cache_section_contents((asection *) plt, data);
19914 }
19915
19916 count = relplt->size / hdr->sh_entsize;
19917 size = count * sizeof (asymbol);
19918 p = relplt->relocation;
19919 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19920 {
19921 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19922 if (p->addend != 0)
19923 size += sizeof ("+0x") - 1 + 8;
19924 }
19925
19926 s = *ret = (asymbol *) bfd_malloc (size);
19927 if (s == NULL)
19928 return -1;
19929
19930 offset = elf32_arm_plt0_size (abfd, data);
19931 if (offset == (bfd_vma) -1)
19932 return -1;
19933
19934 names = (char *) (s + count);
19935 p = relplt->relocation;
19936 n = 0;
19937 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19938 {
19939 size_t len;
19940
19941 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19942 if (plt_size == (bfd_vma) -1)
19943 break;
19944
19945 *s = **p->sym_ptr_ptr;
19946 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19947 we are defining a symbol, ensure one of them is set. */
19948 if ((s->flags & BSF_LOCAL) == 0)
19949 s->flags |= BSF_GLOBAL;
19950 s->flags |= BSF_SYNTHETIC;
19951 s->section = plt;
19952 s->value = offset;
19953 s->name = names;
19954 s->udata.p = NULL;
19955 len = strlen ((*p->sym_ptr_ptr)->name);
19956 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19957 names += len;
19958 if (p->addend != 0)
19959 {
19960 char buf[30], *a;
19961
19962 memcpy (names, "+0x", sizeof ("+0x") - 1);
19963 names += sizeof ("+0x") - 1;
19964 bfd_sprintf_vma (abfd, buf, p->addend);
19965 for (a = buf; *a == '0'; ++a)
19966 ;
19967 len = strlen (a);
19968 memcpy (names, a, len);
19969 names += len;
19970 }
19971 memcpy (names, "@plt", sizeof ("@plt"));
19972 names += sizeof ("@plt");
19973 ++s, ++n;
19974 offset += plt_size;
19975 }
19976
19977 return n;
19978 }
19979
19980 static bfd_boolean
19981 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19982 {
19983 if (hdr->sh_flags & SHF_ARM_PURECODE)
19984 *flags |= SEC_ELF_PURECODE;
19985 return TRUE;
19986 }
19987
19988 static flagword
19989 elf32_arm_lookup_section_flags (char *flag_name)
19990 {
19991 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19992 return SHF_ARM_PURECODE;
19993
19994 return SEC_NO_FLAGS;
19995 }
19996
19997 static unsigned int
19998 elf32_arm_count_additional_relocs (asection *sec)
19999 {
20000 struct _arm_elf_section_data *arm_data;
20001 arm_data = get_arm_elf_section_data (sec);
20002
20003 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20004 }
20005
20006 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20007 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20008 FALSE otherwise. ISECTION is the best guess matching section from the
20009 input bfd IBFD, but it might be NULL. */
20010
20011 static bfd_boolean
20012 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20013 bfd *obfd ATTRIBUTE_UNUSED,
20014 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20015 Elf_Internal_Shdr *osection)
20016 {
20017 switch (osection->sh_type)
20018 {
20019 case SHT_ARM_EXIDX:
20020 {
20021 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20022 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20023 unsigned i = 0;
20024
20025 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20026 osection->sh_info = 0;
20027
20028 /* The sh_link field must be set to the text section associated with
20029 this index section. Unfortunately the ARM EHABI does not specify
20030 exactly how to determine this association. Our caller does try
20031 to match up OSECTION with its corresponding input section however
20032 so that is a good first guess. */
20033 if (isection != NULL
20034 && osection->bfd_section != NULL
20035 && isection->bfd_section != NULL
20036 && isection->bfd_section->output_section != NULL
20037 && isection->bfd_section->output_section == osection->bfd_section
20038 && iheaders != NULL
20039 && isection->sh_link > 0
20040 && isection->sh_link < elf_numsections (ibfd)
20041 && iheaders[isection->sh_link]->bfd_section != NULL
20042 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20043 )
20044 {
20045 for (i = elf_numsections (obfd); i-- > 0;)
20046 if (oheaders[i]->bfd_section
20047 == iheaders[isection->sh_link]->bfd_section->output_section)
20048 break;
20049 }
20050
20051 if (i == 0)
20052 {
20053 /* Failing that we have to find a matching section ourselves. If
20054 we had the output section name available we could compare that
20055 with input section names. Unfortunately we don't. So instead
20056 we use a simple heuristic and look for the nearest executable
20057 section before this one. */
20058 for (i = elf_numsections (obfd); i-- > 0;)
20059 if (oheaders[i] == osection)
20060 break;
20061 if (i == 0)
20062 break;
20063
20064 while (i-- > 0)
20065 if (oheaders[i]->sh_type == SHT_PROGBITS
20066 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20067 == (SHF_ALLOC | SHF_EXECINSTR))
20068 break;
20069 }
20070
20071 if (i)
20072 {
20073 osection->sh_link = i;
20074 /* If the text section was part of a group
20075 then the index section should be too. */
20076 if (oheaders[i]->sh_flags & SHF_GROUP)
20077 osection->sh_flags |= SHF_GROUP;
20078 return TRUE;
20079 }
20080 }
20081 break;
20082
20083 case SHT_ARM_PREEMPTMAP:
20084 osection->sh_flags = SHF_ALLOC;
20085 break;
20086
20087 case SHT_ARM_ATTRIBUTES:
20088 case SHT_ARM_DEBUGOVERLAY:
20089 case SHT_ARM_OVERLAYSECTION:
20090 default:
20091 break;
20092 }
20093
20094 return FALSE;
20095 }
20096
20097 /* Returns TRUE if NAME is an ARM mapping symbol.
20098 Traditionally the symbols $a, $d and $t have been used.
20099 The ARM ELF standard also defines $x (for A64 code). It also allows a
20100 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20101 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20102 not support them here. $t.x indicates the start of ThumbEE instructions. */
20103
20104 static bfd_boolean
20105 is_arm_mapping_symbol (const char * name)
20106 {
20107 return name != NULL /* Paranoia. */
20108 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20109 the mapping symbols could have acquired a prefix.
20110 We do not support this here, since such symbols no
20111 longer conform to the ARM ELF ABI. */
20112 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20113 && (name[2] == 0 || name[2] == '.');
20114 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20115 any characters that follow the period are legal characters for the body
20116 of a symbol's name. For now we just assume that this is the case. */
20117 }
20118
20119 /* Make sure that mapping symbols in object files are not removed via the
20120 "strip --strip-unneeded" tool. These symbols are needed in order to
20121 correctly generate interworking veneers, and for byte swapping code
20122 regions. Once an object file has been linked, it is safe to remove the
20123 symbols as they will no longer be needed. */
20124
20125 static void
20126 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20127 {
20128 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20129 && sym->section != bfd_abs_section_ptr
20130 && is_arm_mapping_symbol (sym->name))
20131 sym->flags |= BSF_KEEP;
20132 }
20133
20134 #undef elf_backend_copy_special_section_fields
20135 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20136
20137 #define ELF_ARCH bfd_arch_arm
20138 #define ELF_TARGET_ID ARM_ELF_DATA
20139 #define ELF_MACHINE_CODE EM_ARM
20140 #ifdef __QNXTARGET__
20141 #define ELF_MAXPAGESIZE 0x1000
20142 #else
20143 #define ELF_MAXPAGESIZE 0x10000
20144 #endif
20145 #define ELF_MINPAGESIZE 0x1000
20146 #define ELF_COMMONPAGESIZE 0x1000
20147
20148 #define bfd_elf32_mkobject elf32_arm_mkobject
20149
20150 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20151 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20152 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20153 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20154 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20155 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20156 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20157 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
20158 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20159 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20160 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20161 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20162 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20163
20164 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20165 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20166 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20167 #define elf_backend_check_relocs elf32_arm_check_relocs
20168 #define elf_backend_update_relocs elf32_arm_update_relocs
20169 #define elf_backend_relocate_section elf32_arm_relocate_section
20170 #define elf_backend_write_section elf32_arm_write_section
20171 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20172 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20173 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20174 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20175 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20176 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20177 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20178 #define elf_backend_post_process_headers elf32_arm_post_process_headers
20179 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20180 #define elf_backend_object_p elf32_arm_object_p
20181 #define elf_backend_fake_sections elf32_arm_fake_sections
20182 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20183 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20184 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20185 #define elf_backend_size_info elf32_arm_size_info
20186 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20187 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20188 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20189 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20190 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20191 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20192 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20193 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20194
20195 #define elf_backend_can_refcount 1
20196 #define elf_backend_can_gc_sections 1
20197 #define elf_backend_plt_readonly 1
20198 #define elf_backend_want_got_plt 1
20199 #define elf_backend_want_plt_sym 0
20200 #define elf_backend_want_dynrelro 1
20201 #define elf_backend_may_use_rel_p 1
20202 #define elf_backend_may_use_rela_p 0
20203 #define elf_backend_default_use_rela_p 0
20204 #define elf_backend_dtrel_excludes_plt 1
20205
20206 #define elf_backend_got_header_size 12
20207 #define elf_backend_extern_protected_data 1
20208
20209 #undef elf_backend_obj_attrs_vendor
20210 #define elf_backend_obj_attrs_vendor "aeabi"
20211 #undef elf_backend_obj_attrs_section
20212 #define elf_backend_obj_attrs_section ".ARM.attributes"
20213 #undef elf_backend_obj_attrs_arg_type
20214 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20215 #undef elf_backend_obj_attrs_section_type
20216 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20217 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20218 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20219
20220 #undef elf_backend_section_flags
20221 #define elf_backend_section_flags elf32_arm_section_flags
20222 #undef elf_backend_lookup_section_flags_hook
20223 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20224
20225 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20226
20227 #include "elf32-target.h"
20228
20229 /* Native Client targets. */
20230
20231 #undef TARGET_LITTLE_SYM
20232 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20233 #undef TARGET_LITTLE_NAME
20234 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20235 #undef TARGET_BIG_SYM
20236 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20237 #undef TARGET_BIG_NAME
20238 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20239
20240 /* Like elf32_arm_link_hash_table_create -- but overrides
20241 appropriately for NaCl. */
20242
20243 static struct bfd_link_hash_table *
20244 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20245 {
20246 struct bfd_link_hash_table *ret;
20247
20248 ret = elf32_arm_link_hash_table_create (abfd);
20249 if (ret)
20250 {
20251 struct elf32_arm_link_hash_table *htab
20252 = (struct elf32_arm_link_hash_table *) ret;
20253
20254 htab->nacl_p = 1;
20255
20256 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20257 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20258 }
20259 return ret;
20260 }
20261
20262 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20263 really need to use elf32_arm_modify_segment_map. But we do it
20264 anyway just to reduce gratuitous differences with the stock ARM backend. */
20265
20266 static bfd_boolean
20267 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20268 {
20269 return (elf32_arm_modify_segment_map (abfd, info)
20270 && nacl_modify_segment_map (abfd, info));
20271 }
20272
20273 static void
20274 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
20275 {
20276 elf32_arm_final_write_processing (abfd, linker);
20277 nacl_final_write_processing (abfd, linker);
20278 }
20279
20280 static bfd_vma
20281 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20282 const arelent *rel ATTRIBUTE_UNUSED)
20283 {
20284 return plt->vma
20285 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20286 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20287 }
20288
20289 #undef elf32_bed
20290 #define elf32_bed elf32_arm_nacl_bed
20291 #undef bfd_elf32_bfd_link_hash_table_create
20292 #define bfd_elf32_bfd_link_hash_table_create \
20293 elf32_arm_nacl_link_hash_table_create
20294 #undef elf_backend_plt_alignment
20295 #define elf_backend_plt_alignment 4
20296 #undef elf_backend_modify_segment_map
20297 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20298 #undef elf_backend_modify_program_headers
20299 #define elf_backend_modify_program_headers nacl_modify_program_headers
20300 #undef elf_backend_final_write_processing
20301 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20302 #undef bfd_elf32_get_synthetic_symtab
20303 #undef elf_backend_plt_sym_val
20304 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20305 #undef elf_backend_copy_special_section_fields
20306
20307 #undef ELF_MINPAGESIZE
20308 #undef ELF_COMMONPAGESIZE
20309
20310
20311 #include "elf32-target.h"
20312
20313 /* Reset to defaults. */
20314 #undef elf_backend_plt_alignment
20315 #undef elf_backend_modify_segment_map
20316 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20317 #undef elf_backend_modify_program_headers
20318 #undef elf_backend_final_write_processing
20319 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20320 #undef ELF_MINPAGESIZE
20321 #define ELF_MINPAGESIZE 0x1000
20322 #undef ELF_COMMONPAGESIZE
20323 #define ELF_COMMONPAGESIZE 0x1000
20324
20325
20326 /* FDPIC Targets. */
20327
20328 #undef TARGET_LITTLE_SYM
20329 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20330 #undef TARGET_LITTLE_NAME
20331 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20332 #undef TARGET_BIG_SYM
20333 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20334 #undef TARGET_BIG_NAME
20335 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20336 #undef elf_match_priority
20337 #define elf_match_priority 128
20338 #undef ELF_OSABI
20339 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20340
20341 /* Like elf32_arm_link_hash_table_create -- but overrides
20342 appropriately for FDPIC. */
20343
20344 static struct bfd_link_hash_table *
20345 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20346 {
20347 struct bfd_link_hash_table *ret;
20348
20349 ret = elf32_arm_link_hash_table_create (abfd);
20350 if (ret)
20351 {
20352 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20353
20354 htab->fdpic_p = 1;
20355 }
20356 return ret;
20357 }
20358
20359 /* We need dynamic symbols for every section, since segments can
20360 relocate independently. */
20361 static bfd_boolean
20362 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20363 struct bfd_link_info *info
20364 ATTRIBUTE_UNUSED,
20365 asection *p ATTRIBUTE_UNUSED)
20366 {
20367 switch (elf_section_data (p)->this_hdr.sh_type)
20368 {
20369 case SHT_PROGBITS:
20370 case SHT_NOBITS:
20371 /* If sh_type is yet undecided, assume it could be
20372 SHT_PROGBITS/SHT_NOBITS. */
20373 case SHT_NULL:
20374 return FALSE;
20375
20376 /* There shouldn't be section relative relocations
20377 against any other section. */
20378 default:
20379 return TRUE;
20380 }
20381 }
20382
20383 #undef elf32_bed
20384 #define elf32_bed elf32_arm_fdpic_bed
20385
20386 #undef bfd_elf32_bfd_link_hash_table_create
20387 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20388
20389 #undef elf_backend_omit_section_dynsym
20390 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20391
20392 #include "elf32-target.h"
20393
20394 #undef elf_match_priority
20395 #undef ELF_OSABI
20396 #undef elf_backend_omit_section_dynsym
20397
20398 /* VxWorks Targets. */
20399
20400 #undef TARGET_LITTLE_SYM
20401 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20402 #undef TARGET_LITTLE_NAME
20403 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20404 #undef TARGET_BIG_SYM
20405 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20406 #undef TARGET_BIG_NAME
20407 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20408
20409 /* Like elf32_arm_link_hash_table_create -- but overrides
20410 appropriately for VxWorks. */
20411
20412 static struct bfd_link_hash_table *
20413 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20414 {
20415 struct bfd_link_hash_table *ret;
20416
20417 ret = elf32_arm_link_hash_table_create (abfd);
20418 if (ret)
20419 {
20420 struct elf32_arm_link_hash_table *htab
20421 = (struct elf32_arm_link_hash_table *) ret;
20422 htab->use_rel = 0;
20423 htab->vxworks_p = 1;
20424 }
20425 return ret;
20426 }
20427
20428 static void
20429 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
20430 {
20431 elf32_arm_final_write_processing (abfd, linker);
20432 elf_vxworks_final_write_processing (abfd, linker);
20433 }
20434
20435 #undef elf32_bed
20436 #define elf32_bed elf32_arm_vxworks_bed
20437
20438 #undef bfd_elf32_bfd_link_hash_table_create
20439 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20440 #undef elf_backend_final_write_processing
20441 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20442 #undef elf_backend_emit_relocs
20443 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20444
20445 #undef elf_backend_may_use_rel_p
20446 #define elf_backend_may_use_rel_p 0
20447 #undef elf_backend_may_use_rela_p
20448 #define elf_backend_may_use_rela_p 1
20449 #undef elf_backend_default_use_rela_p
20450 #define elf_backend_default_use_rela_p 1
20451 #undef elf_backend_want_plt_sym
20452 #define elf_backend_want_plt_sym 1
20453 #undef ELF_MAXPAGESIZE
20454 #define ELF_MAXPAGESIZE 0x1000
20455
20456 #include "elf32-target.h"
20457
20458
20459 /* Merge backend specific data from an object file to the output
20460 object file when linking. */
20461
20462 static bfd_boolean
20463 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20464 {
20465 bfd *obfd = info->output_bfd;
20466 flagword out_flags;
20467 flagword in_flags;
20468 bfd_boolean flags_compatible = TRUE;
20469 asection *sec;
20470
20471 /* Check if we have the same endianness. */
20472 if (! _bfd_generic_verify_endian_match (ibfd, info))
20473 return FALSE;
20474
20475 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20476 return TRUE;
20477
20478 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20479 return FALSE;
20480
20481 /* The input BFD must have had its flags initialised. */
20482 /* The following seems bogus to me -- The flags are initialized in
20483 the assembler but I don't think an elf_flags_init field is
20484 written into the object. */
20485 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20486
20487 in_flags = elf_elfheader (ibfd)->e_flags;
20488 out_flags = elf_elfheader (obfd)->e_flags;
20489
20490 /* In theory there is no reason why we couldn't handle this. However
20491 in practice it isn't even close to working and there is no real
20492 reason to want it. */
20493 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20494 && !(ibfd->flags & DYNAMIC)
20495 && (in_flags & EF_ARM_BE8))
20496 {
20497 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20498 ibfd);
20499 return FALSE;
20500 }
20501
20502 if (!elf_flags_init (obfd))
20503 {
20504 /* If the input is the default architecture and had the default
20505 flags then do not bother setting the flags for the output
20506 architecture, instead allow future merges to do this. If no
20507 future merges ever set these flags then they will retain their
20508 uninitialised values, which surprise surprise, correspond
20509 to the default values. */
20510 if (bfd_get_arch_info (ibfd)->the_default
20511 && elf_elfheader (ibfd)->e_flags == 0)
20512 return TRUE;
20513
20514 elf_flags_init (obfd) = TRUE;
20515 elf_elfheader (obfd)->e_flags = in_flags;
20516
20517 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20518 && bfd_get_arch_info (obfd)->the_default)
20519 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20520
20521 return TRUE;
20522 }
20523
20524 /* Determine what should happen if the input ARM architecture
20525 does not match the output ARM architecture. */
20526 if (! bfd_arm_merge_machines (ibfd, obfd))
20527 return FALSE;
20528
20529 /* Identical flags must be compatible. */
20530 if (in_flags == out_flags)
20531 return TRUE;
20532
20533 /* Check to see if the input BFD actually contains any sections. If
20534 not, its flags may not have been initialised either, but it
20535 cannot actually cause any incompatiblity. Do not short-circuit
20536 dynamic objects; their section list may be emptied by
20537 elf_link_add_object_symbols.
20538
20539 Also check to see if there are no code sections in the input.
20540 In this case there is no need to check for code specific flags.
20541 XXX - do we need to worry about floating-point format compatability
20542 in data sections ? */
20543 if (!(ibfd->flags & DYNAMIC))
20544 {
20545 bfd_boolean null_input_bfd = TRUE;
20546 bfd_boolean only_data_sections = TRUE;
20547
20548 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20549 {
20550 /* Ignore synthetic glue sections. */
20551 if (strcmp (sec->name, ".glue_7")
20552 && strcmp (sec->name, ".glue_7t"))
20553 {
20554 if ((bfd_get_section_flags (ibfd, sec)
20555 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20556 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20557 only_data_sections = FALSE;
20558
20559 null_input_bfd = FALSE;
20560 break;
20561 }
20562 }
20563
20564 if (null_input_bfd || only_data_sections)
20565 return TRUE;
20566 }
20567
20568 /* Complain about various flag mismatches. */
20569 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20570 EF_ARM_EABI_VERSION (out_flags)))
20571 {
20572 _bfd_error_handler
20573 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20574 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20575 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20576 return FALSE;
20577 }
20578
20579 /* Not sure what needs to be checked for EABI versions >= 1. */
20580 /* VxWorks libraries do not use these flags. */
20581 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20582 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20583 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20584 {
20585 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20586 {
20587 _bfd_error_handler
20588 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20589 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20590 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20591 flags_compatible = FALSE;
20592 }
20593
20594 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20595 {
20596 if (in_flags & EF_ARM_APCS_FLOAT)
20597 _bfd_error_handler
20598 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20599 ibfd, obfd);
20600 else
20601 _bfd_error_handler
20602 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20603 ibfd, obfd);
20604
20605 flags_compatible = FALSE;
20606 }
20607
20608 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20609 {
20610 if (in_flags & EF_ARM_VFP_FLOAT)
20611 _bfd_error_handler
20612 (_("error: %pB uses %s instructions, whereas %pB does not"),
20613 ibfd, "VFP", obfd);
20614 else
20615 _bfd_error_handler
20616 (_("error: %pB uses %s instructions, whereas %pB does not"),
20617 ibfd, "FPA", obfd);
20618
20619 flags_compatible = FALSE;
20620 }
20621
20622 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20623 {
20624 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20625 _bfd_error_handler
20626 (_("error: %pB uses %s instructions, whereas %pB does not"),
20627 ibfd, "Maverick", obfd);
20628 else
20629 _bfd_error_handler
20630 (_("error: %pB does not use %s instructions, whereas %pB does"),
20631 ibfd, "Maverick", obfd);
20632
20633 flags_compatible = FALSE;
20634 }
20635
20636 #ifdef EF_ARM_SOFT_FLOAT
20637 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20638 {
20639 /* We can allow interworking between code that is VFP format
20640 layout, and uses either soft float or integer regs for
20641 passing floating point arguments and results. We already
20642 know that the APCS_FLOAT flags match; similarly for VFP
20643 flags. */
20644 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20645 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20646 {
20647 if (in_flags & EF_ARM_SOFT_FLOAT)
20648 _bfd_error_handler
20649 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20650 ibfd, obfd);
20651 else
20652 _bfd_error_handler
20653 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20654 ibfd, obfd);
20655
20656 flags_compatible = FALSE;
20657 }
20658 }
20659 #endif
20660
20661 /* Interworking mismatch is only a warning. */
20662 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20663 {
20664 if (in_flags & EF_ARM_INTERWORK)
20665 {
20666 _bfd_error_handler
20667 (_("warning: %pB supports interworking, whereas %pB does not"),
20668 ibfd, obfd);
20669 }
20670 else
20671 {
20672 _bfd_error_handler
20673 (_("warning: %pB does not support interworking, whereas %pB does"),
20674 ibfd, obfd);
20675 }
20676 }
20677 }
20678
20679 return flags_compatible;
20680 }
20681
20682
20683 /* Symbian OS Targets. */
20684
20685 #undef TARGET_LITTLE_SYM
20686 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20687 #undef TARGET_LITTLE_NAME
20688 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20689 #undef TARGET_BIG_SYM
20690 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20691 #undef TARGET_BIG_NAME
20692 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20693
20694 /* Like elf32_arm_link_hash_table_create -- but overrides
20695 appropriately for Symbian OS. */
20696
20697 static struct bfd_link_hash_table *
20698 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
20699 {
20700 struct bfd_link_hash_table *ret;
20701
20702 ret = elf32_arm_link_hash_table_create (abfd);
20703 if (ret)
20704 {
20705 struct elf32_arm_link_hash_table *htab
20706 = (struct elf32_arm_link_hash_table *)ret;
20707 /* There is no PLT header for Symbian OS. */
20708 htab->plt_header_size = 0;
20709 /* The PLT entries are each one instruction and one word. */
20710 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
20711 htab->symbian_p = 1;
20712 /* Symbian uses armv5t or above, so use_blx is always true. */
20713 htab->use_blx = 1;
20714 htab->root.is_relocatable_executable = 1;
20715 }
20716 return ret;
20717 }
20718
20719 static const struct bfd_elf_special_section
20720 elf32_arm_symbian_special_sections[] =
20721 {
20722 /* In a BPABI executable, the dynamic linking sections do not go in
20723 the loadable read-only segment. The post-linker may wish to
20724 refer to these sections, but they are not part of the final
20725 program image. */
20726 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
20727 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
20728 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
20729 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
20730 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
20731 /* These sections do not need to be writable as the SymbianOS
20732 postlinker will arrange things so that no dynamic relocation is
20733 required. */
20734 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
20735 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
20736 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
20737 { NULL, 0, 0, 0, 0 }
20738 };
20739
20740 static void
20741 elf32_arm_symbian_begin_write_processing (bfd *abfd,
20742 struct bfd_link_info *link_info)
20743 {
20744 /* BPABI objects are never loaded directly by an OS kernel; they are
20745 processed by a postlinker first, into an OS-specific format. If
20746 the D_PAGED bit is set on the file, BFD will align segments on
20747 page boundaries, so that an OS can directly map the file. With
20748 BPABI objects, that just results in wasted space. In addition,
20749 because we clear the D_PAGED bit, map_sections_to_segments will
20750 recognize that the program headers should not be mapped into any
20751 loadable segment. */
20752 abfd->flags &= ~D_PAGED;
20753 elf32_arm_begin_write_processing (abfd, link_info);
20754 }
20755
20756 static bfd_boolean
20757 elf32_arm_symbian_modify_segment_map (bfd *abfd,
20758 struct bfd_link_info *info)
20759 {
20760 struct elf_segment_map *m;
20761 asection *dynsec;
20762
20763 /* BPABI shared libraries and executables should have a PT_DYNAMIC
20764 segment. However, because the .dynamic section is not marked
20765 with SEC_LOAD, the generic ELF code will not create such a
20766 segment. */
20767 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
20768 if (dynsec)
20769 {
20770 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
20771 if (m->p_type == PT_DYNAMIC)
20772 break;
20773
20774 if (m == NULL)
20775 {
20776 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
20777 m->next = elf_seg_map (abfd);
20778 elf_seg_map (abfd) = m;
20779 }
20780 }
20781
20782 /* Also call the generic arm routine. */
20783 return elf32_arm_modify_segment_map (abfd, info);
20784 }
20785
20786 /* Return address for Ith PLT stub in section PLT, for relocation REL
20787 or (bfd_vma) -1 if it should not be included. */
20788
20789 static bfd_vma
20790 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
20791 const arelent *rel ATTRIBUTE_UNUSED)
20792 {
20793 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
20794 }
20795
20796 #undef elf32_bed
20797 #define elf32_bed elf32_arm_symbian_bed
20798
20799 /* The dynamic sections are not allocated on SymbianOS; the postlinker
20800 will process them and then discard them. */
20801 #undef ELF_DYNAMIC_SEC_FLAGS
20802 #define ELF_DYNAMIC_SEC_FLAGS \
20803 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
20804
20805 #undef elf_backend_emit_relocs
20806
20807 #undef bfd_elf32_bfd_link_hash_table_create
20808 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
20809 #undef elf_backend_special_sections
20810 #define elf_backend_special_sections elf32_arm_symbian_special_sections
20811 #undef elf_backend_begin_write_processing
20812 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
20813 #undef elf_backend_final_write_processing
20814 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20815
20816 #undef elf_backend_modify_segment_map
20817 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
20818
20819 /* There is no .got section for BPABI objects, and hence no header. */
20820 #undef elf_backend_got_header_size
20821 #define elf_backend_got_header_size 0
20822
20823 /* Similarly, there is no .got.plt section. */
20824 #undef elf_backend_want_got_plt
20825 #define elf_backend_want_got_plt 0
20826
20827 #undef elf_backend_plt_sym_val
20828 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
20829
20830 #undef elf_backend_may_use_rel_p
20831 #define elf_backend_may_use_rel_p 1
20832 #undef elf_backend_may_use_rela_p
20833 #define elf_backend_may_use_rela_p 0
20834 #undef elf_backend_default_use_rela_p
20835 #define elf_backend_default_use_rela_p 0
20836 #undef elf_backend_want_plt_sym
20837 #define elf_backend_want_plt_sym 0
20838 #undef elf_backend_dtrel_excludes_plt
20839 #define elf_backend_dtrel_excludes_plt 0
20840 #undef ELF_MAXPAGESIZE
20841 #define ELF_MAXPAGESIZE 0x8000
20842
20843 #include "elf32-target.h"
GDB Binutils - Deliverables
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