cpu/ChangeLog

   1 2019-12-17  Alan Modra  <amodra@gmail.com>
   2
   3         * bpf.cpu (f-imm64): Avoid signed overflow.
   4
   5 2019-12-16  Alan Modra  <amodra@gmail.com>
   6
   7         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
   8
   9 2019-12-11  Alan Modra  <amodra@gmail.com>
  10
  11         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
  12         * lm32.cpu (f-branch, f-vall): Likewise.
  13         * m32.cpu (f-lab-8-16): Likewise.
  14
  15 2019-12-11  Alan Modra  <amodra@gmail.com>
  16
  17         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
  18         shift left to avoid UB on left shift of negative values.
  19
  20 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
  21
  22         * bpf.cpu: Fix comment describing the 128-bit instruction format.
  23
  24 2019-09-09  Phil Blundell  <pb@pbcl.net>
  25
  26         binutils 2.33 branch created.
  27
  28 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
  29
  30         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
  31         %a and %ctx.
  32
  33 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
  34
  35         * bpf.cpu (dlabs): New pmacro.
  36         (dlind): Likewise.
  37
  38 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
  39
  40         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
  41         explicit 'dst' argument.
  42
  43 2019-06-13  Stafford Horne  <shorne@gmail.com>
  44
  45         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
  46
  47 2019-06-13  Stafford Horne  <shorne@gmail.com>
  48
  49         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
  50         (l-adrp): Improve comment.
  51
  52 2019-06-13  Stafford Horne  <shorne@gmail.com>
  53
  54         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
  55         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
  56         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
  57         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
  58         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
  59         float-setflag-unordered-symantics): New pmacro for instruction
  60         symantics.
  61         (float-setflag-insn): Update to use float-setflag-insn-base.
  62         (float-setflag-unordered-insn): New pmacro for generating instructions.
  63
  64 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
  65             Stafford Horne  <shorne@gmail.com>
  66
  67         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
  68         (ORFPX-MACHS): Removed pmacro.
  69         * or1k.opc (or1k_cgen_insn_supported): New function.
  70         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
  71         (parse_regpair, print_regpair): New functions.
  72         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
  73         and add comments.
  74         (h-fdr): Update comment to indicate or64.
  75         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
  76         (h-fd32r): New hardware for 64-bit fpu registers.
  77         (h-i64r): New hardware for 64-bit int registers.
  78         * or1korbis.cpu (f-resv-8-1): New field.
  79         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
  80         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
  81         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
  82         (h-roff1): New hardware.
  83         (double-field-and-ops mnemonic): New pmacro to generate operations
  84         rDD32F, rAD32F, rBD32F, rDDI and rADI.
  85         (float-regreg-insn): Update single precision generator to MACH
  86         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  87         (float-setflag-insn): Update single precision generator to MACH
  88         ORFPX32-MACHS.  Fix double instructions from single to double
  89         precision.  Add generator for or32 64-bit instructions.
  90         (float-cust-insn cust-num): Update single precision generator to MACH
  91         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  92         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
  93         ORFPX32-MACHS.
  94         (lf-rem-d): Fix operation from mod to rem.
  95         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
  96         (lf-itof-d): Fix operands from single to double.
  97         (lf-ftoi-d): Update operand mode from DI to WI.
  98
  99 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 100
 101         * bpf.cpu: New file.
 102         * bpf.opc: Likewise.
 103
 104 2018-06-24  Nick Clifton  <nickc@redhat.com>
 105
 106         2.32 branch created.
 107
 108 2018-10-05  Richard Henderson  <rth@twiddle.net>
 109             Stafford Horne  <shorne@gmail.com>
 110
 111         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 112         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 113         (l-mul): Fix overflow support and indentation.
 114         (l-mulu): Fix overflow support and indentation.
 115         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 116         (l-div); Remove incorrect carry behavior.
 117         (l-divu): Fix carry and overflow behavior.
 118         (l-mac): Add overflow support.
 119         (l-msb, l-msbu): Add carry and overflow support.
 120
 121 2018-10-05  Richard Henderson  <rth@twiddle.net>
 122
 123         * or1k.opc (parse_disp26): Add support for plta() relocations.
 124         (parse_disp21): New function.
 125         (or1k_rclass): New enum.
 126         (or1k_rtype): New enum.
 127         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 128         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 129         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 130         * or1korbis.cpu (f-disp26): Don't assume SI.
 131         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 132         (insn-opcode): Add ADRP.
 133         (l-adrp): New instruction.
 134
 135 2018-10-05  Richard Henderson  <rth@twiddle.net>
 136
 137         * or1k.opc: Add RTYPE_ enum.
 138         (INVALID_STORE_RELOC): New string.
 139         (or1k_imm16_relocs): New array array.
 140         (parse_reloc): New static function that just does the parsing.
 141         (parse_imm16): New static function for generic parsing.
 142         (parse_simm16): Change to just call parse_imm16.
 143         (parse_simm16_split): New function.
 144         (parse_uimm16): Change to call parse_imm16.
 145         (parse_uimm16_split): New function.
 146         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 147         (uimm16-split): Change to use new uimm16_split.
 148
 149 2018-07-24  Alan Modra  <amodra@gmail.com>
 150
 151         PR 23430
 152         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 153
 154 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 155
 156         * or1kcommon.cpu (spr-reg-info): Typo fix.
 157
 158 2018-03-03  Alan Modra  <amodra@gmail.com>
 159
 160         * frv.opc: Include opintl.h.
 161         (add_next_to_vliw): Use opcodes_error_handler to print error.
 162         Standardize error message.
 163         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 164
 165 2018-01-13  Nick Clifton  <nickc@redhat.com>
 166
 167         2.30 branch created.
 168
 169 2017-03-15  Stafford Horne  <shorne@gmail.com>
 170
 171         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 172
 173 2016-10-06  Alan Modra  <amodra@gmail.com>
 174
 175         * mep.opc (expand_string): Add fall through comment.
 176
 177 2016-03-03  Alan Modra  <amodra@gmail.com>
 178
 179         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 180         at what is really going on.
 181
 182 2016-03-02  Alan Modra  <amodra@gmail.com>
 183
 184         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 185
 186 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 187
 188         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 189         a constant to better align disassembler output.
 190
 191 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 192
 193         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 194
 195 2014-06-12  Alan Modra  <amodra@gmail.com>
 196
 197         * or1k.opc: Whitespace fixes.
 198
 199 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 200
 201         * or1korbis.cpu (h-atomic-reserve): New hardware.
 202         (h-atomic-address): Likewise.
 203         (insn-opcode): Add opcodes for LWA and SWA.
 204         (atomic-reserve): New operand.
 205         (atomic-address): Likewise.
 206         (l-lwa, l-swa): New instructions.
 207         (l-lbs): Fix typo in comment.
 208         (store-insn): Clear atomic reserve on store to atomic-address.
 209         Fix register names in fmt field.
 210
 211 2014-04-22  Christian Svensson  <blue@cmd.nu>
 212
 213         * openrisc.cpu: Delete.
 214         * openrisc.opc: Delete.
 215         * or1k.cpu: New file.
 216         * or1k.opc: New file.
 217         * or1kcommon.cpu: New file.
 218         * or1korbis.cpu: New file.
 219         * or1korfpx.cpu: New file.
 220
 221 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 222
 223         * epiphany.opc: Remove +x file mode.
 224
 225 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 226
 227         PR binutils/15241
 228         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 229         TLBVADDR, TLBPADDR and TLBBADVADDR.
 230
 231 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 232             Joern Rennecke  <joern.rennecke@embecosm.com>
 233
 234         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 235         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 236         (testset-insn): Add NO_DIS attribute to t.l.
 237         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 238         (move-insns): Add NO-DIS attribute to cmov.l.
 239         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 240         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 241         (op-rrr): Add NO-DIS attribute to .l.
 242         (shift-rrr): Add NO-DIS attribute to .l.
 243         (op-shift-rri): Add NO-DIS attribute to i32.l.
 244         (bitrl, movtl): Add NO-DIS attribute.
 245         (op-iextrrr): Add NO-DIS attribute to .l
 246         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 247         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 248
 249 2012-02-27  Alan Modra  <amodra@gmail.com>
 250
 251         * mt.opc (print_dollarhex): Trim values to 32 bits.
 252
 253 2011-12-15  Nick Clifton  <nickc@redhat.com>
 254
 255         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 256         hosts.
 257
 258 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 259
 260         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 261         Cast value before printing it as a long.
 262         (parse_postindex): Fix type of valuep.
 263
 264 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 265
 266         * cpu/epiphany.cpu: New file.
 267         * cpu/epiphany.opc: New file.
 268
 269 2011-08-22  Nick Clifton  <nickc@redhat.com>
 270
 271         * fr30.cpu: Newly contributed file.
 272         * fr30.opc: Likewise.
 273         * ip2k.cpu: Likewise.
 274         * ip2k.opc: Likewise.
 275         * mep-avc.cpu: Likewise.
 276         * mep-avc2.cpu: Likewise.
 277         * mep-c5.cpu: Likewise.
 278         * mep-core.cpu: Likewise.
 279         * mep-default.cpu: Likewise.
 280         * mep-ext-cop.cpu: Likewise.
 281         * mep-fmax.cpu: Likewise.
 282         * mep-h1.cpu: Likewise.
 283         * mep-ivc2.cpu: Likewise.
 284         * mep-rhcop.cpu: Likewise.
 285         * mep-sample-ucidsp.cpu: Likewise.
 286         * mep.cpu: Likewise.
 287         * mep.opc: Likewise.
 288         * openrisc.cpu: Likewise.
 289         * openrisc.opc: Likewise.
 290         * xstormy16.cpu: Likewise.
 291         * xstormy16.opc: Likewise.
 292
 293 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 294
 295         * frv.opc: #undef DEBUG.
 296
 297 2010-07-03  DJ Delorie  <dj@delorie.com>
 298
 299         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 300
 301 2010-02-11  Doug Evans  <dje@sebabeach.org>
 302
 303         * m32r.cpu (HASH-PREFIX): Delete.
 304         (duhpo, dshpo): New pmacros.
 305         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 306         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 307         attribute, define with dshpo.
 308         (uimm24): Delete HASH-PREFIX attribute.
 309         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 310         (print_signed_with_hash_prefix): New function.
 311         (print_unsigned_with_hash_prefix): New function.
 312         * xc16x.cpu (dowh): New pmacro.
 313         (upof16): Define with dowh, specify print handler.
 314         (qbit, qlobit, qhibit): Ditto.
 315         (upag16): Ditto.
 316         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 317         (print_with_dot_prefix): New functions.
 318         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 319
 320 2010-01-24  Doug Evans  <dje@sebabeach.org>
 321
 322         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 323         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 324         conditional-floating-point-conversion, ne-floating-point-conversion,
 325         float-parallel-mul-add-double-semantics): Ditto.
 326
 327 2010-01-05  Doug Evans  <dje@sebabeach.org>
 328
 329         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 330         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 331
 332 2010-01-02  Doug Evans  <dje@sebabeach.org>
 333
 334         * m32c.opc (parse_signed16): Fix typo.
 335
 336 2009-12-11  Nick Clifton  <nickc@redhat.com>
 337
 338         * frv.opc: Fix shadowed variable warnings.
 339         * m32c.opc: Fix shadowed variable warnings.
 340
 341 2009-11-14  Doug Evans  <dje@sebabeach.org>
 342
 343         Must use VOID expression in VOID context.
 344         * xc16x.cpu (mov4): Fix mode of `sequence'.
 345         (mov9, mov10): Ditto.
 346         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 347         (callr, callseg, calls, trap, rets, reti): Ditto.
 348         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 349         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 350         (exts, exts1, extsr, extsr1, prior): Ditto.
 351
 352 2009-10-23  Doug Evans  <dje@sebabeach.org>
 353
 354         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 355         cgen-ops.h -> cgen/basic-ops.h.
 356
 357 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 358
 359         * m32r.cpu (stb-plus): Typo fix.
 360
 361 2009-09-23  Doug Evans  <dje@sebabeach.org>
 362
 363         * m32r.cpu (sth-plus): Fix address mode and calculation.
 364         (stb-plus): Ditto.
 365         (clrpsw): Fix mask calculation.
 366         (bset, bclr, btst): Make mode in bit calculation match expression.
 367
 368         * xc16x.cpu (rtl-version): Set to 0.8.
 369         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 370         make uppercase.  Remove unnecessary name-prefix spec.
 371         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 372         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 373         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 374         (h-cr): New hardware.
 375         (muls): Comment out parts that won't compile, add fixme.
 376         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 377         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 378         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 379
 380 2009-07-16  Doug Evans  <dje@sebabeach.org>
 381
 382         * cpu/simplify.inc (*): One line doc strings don't need \n.
 383         (df): Invoke define-full-ifield instead of claiming it's an alias.
 384         (dno): Define.
 385         (dnop): Mark as deprecated.
 386
 387 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 388
 389         * m32c.opc (parse_lab_5_3): Use correct enum.
 390
 391 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 392
 393         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 394         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 395         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 396         arguments of "operation" to DI using "mode" and the new pmacros.
 397
 398 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 399
 400         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 401         of number 2, PID.
 402
 403 2008-12-23  Jon Beniston <jon@beniston.com>
 404
 405         * lm32.cpu: New file.
 406         * lm32.opc: New file.
 407
 408 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 409
 410         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 411         to source.
 412
 413 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 414
 415         * cris.cpu (movs, movu): Use result of extension operation when
 416         updating flags.
 417
 418 2007-07-04  Nick Clifton  <nickc@redhat.com>
 419
 420         * cris.cpu: Update copyright notice to refer to GPLv3.
 421         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 422         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 423         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 424         xc16x.opc: Likewise.
 425         * iq2000.cpu: Fix copyright notice to refer to FSF.
 426
 427 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 428
 429         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 430
 431 2007-04-20  Nick Clifton  <nickc@redhat.com>
 432
 433         * xc16x.cpu: Restore after accidentally overwriting this file with
 434         xc16x.opc.
 435
 436 2007-03-29  DJ Delorie  <dj@redhat.com>
 437
 438         * m32c.cpu (Imm-8-s4n): Fix print hook.
 439         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 440         (arith-jnz-imm4-dst-defn): Make relaxable.
 441         (arith-jnz16-imm4-dst-defn): Fix encodings.
 442
 443 2007-03-20  DJ Delorie  <dj@redhat.com>
 444
 445         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 446         mem20): New.
 447         (src16-16-20-An-relative-*): New.
 448         (dst16-*-20-An-relative-*): New.
 449         (dst16-16-16sa-*): New
 450         (dst16-16-16ar-*): New
 451         (dst32-16-16sa-Unprefixed-*): New
 452         (jsri): Fix operands.
 453         (setzx): Fix encoding.
 454
 455 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 456
 457         * m32r.opc: Formatting.
 458
 459 2006-05-22  Nick Clifton  <nickc@redhat.com>
 460
 461         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 462
 463 2006-04-10  DJ Delorie  <dj@redhat.com>
 464
 465         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 466         decides if this function accepts symbolic constants or not.
 467         (parse_signed_bitbase): Likewise.
 468         (parse_unsigned_bitbase8): Pass the new parameter.
 469         (parse_unsigned_bitbase11): Likewise.
 470         (parse_unsigned_bitbase16): Likewise.
 471         (parse_unsigned_bitbase19): Likewise.
 472         (parse_unsigned_bitbase27): Likewise.
 473         (parse_signed_bitbase8): Likewise.
 474         (parse_signed_bitbase11): Likewise.
 475         (parse_signed_bitbase19): Likewise.
 476
 477 2006-03-13  DJ Delorie  <dj@redhat.com>
 478
 479         * m32c.cpu (Bit3-S): New.
 480         (btst:s): New.
 481         * m32c.opc (parse_bit3_S): New.
 482
 483         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 484         (btst): Add optional :G suffix for MACH32.
 485         (or.b:S): New.
 486         (pop.w:G): Add optional :G suffix for MACH16.
 487         (push.b.imm): Fix syntax.
 488
 489 2006-03-10  DJ Delorie  <dj@redhat.com>
 490
 491         * m32c.cpu (mul.l): New.
 492         (mulu.l): New.
 493
 494 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 495
 496         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 497         an error message otherwise.
 498         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 499         Fix up comments to correctly describe the functions.
 500
 501 2006-02-24  DJ Delorie  <dj@redhat.com>
 502
 503         * m32c.cpu (RL_TYPE): New attribute, with macros.
 504         (Lab-8-24): Add RELAX.
 505         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 506         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 507         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 508         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 509         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 510         attribute.
 511         (jsri16, jsri32): Add 1ADDR attribute.
 512         (jsr32.w, jsr32.a): Add JUMP attribute.
 513
 514 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 515             Anil Paranjape   <anilp1@kpitcummins.com>
 516             Shilin Shakti    <shilins@kpitcummins.com>
 517
 518         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 519         description.
 520         * xc16x.opc: New file containing supporting XC16C routines.
 521
 522 2006-02-10  Nick Clifton  <nickc@redhat.com>
 523
 524         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 525
 526 2006-01-06  DJ Delorie  <dj@redhat.com>
 527
 528         * m32c.cpu (mov.w:q): Fix mode.
 529         (push32.b.imm): Likewise, for the comment.
 530
 531 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 532
 533         Second part of ms1 to mt renaming.
 534         * mt.cpu (define-arch, define-isa): Set name to mt.
 535         (define-mach): Adjust.
 536         * mt.opc (CGEN_ASM_HASH): Update.
 537         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 538         (parse_loopsize, parse_imm16): Adjust.
 539
 540 2005-12-13  DJ Delorie  <dj@redhat.com>
 541
 542         * m32c.cpu (jsri): Fix order so register names aren't treated as
 543         symbols.
 544         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 545         indexwd, indexws): Fix encodings.
 546
 547 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 548
 549         * mt.cpu: Rename from ms1.cpu.
 550         * mt.opc: Rename from ms1.opc.
 551
 552 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 553
 554         * cris.cpu (simplecris-common-writable-specregs)
 555         (simplecris-common-readable-specregs): Split from
 556         simplecris-common-specregs.  All users changed.
 557         (cris-implemented-writable-specregs-v0)
 558         (cris-implemented-readable-specregs-v0): Similar from
 559         cris-implemented-specregs-v0.
 560         (cris-implemented-writable-specregs-v3)
 561         (cris-implemented-readable-specregs-v3)
 562         (cris-implemented-writable-specregs-v8)
 563         (cris-implemented-readable-specregs-v8)
 564         (cris-implemented-writable-specregs-v10)
 565         (cris-implemented-readable-specregs-v10)
 566         (cris-implemented-writable-specregs-v32)
 567         (cris-implemented-readable-specregs-v32): Similar.
 568         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 569         insns and specializations.
 570
 571 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 572
 573         Add ms2
 574         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 575         model.
 576         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 577         f-cb2incr, f-rc3): New fields.
 578         (LOOP): New instruction.
 579         (JAL-HAZARD): New hazard.
 580         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 581         New operands.
 582         (mul, muli, dbnz, iflush): Enable for ms2
 583         (jal, reti): Has JAL-HAZARD.
 584         (ldctxt, ldfb, stfb): Only ms1.
 585         (fbcb): Only ms1,ms1-003.
 586         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 587         fbcbincrs, mfbcbincrs): Enable for ms2.
 588         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 589         * ms1.opc (parse_loopsize): New.
 590         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 591         (print_pcrel): New.
 592
 593 2005-10-28  Dave Brolley  <brolley@redhat.com>
 594
 595         Contribute the following change:
 596         2003-09-24  Dave Brolley  <brolley@redhat.com>
 597
 598         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 599         CGEN_ATTR_VALUE_TYPE.
 600         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 601         Use cgen_bitset_intersect_p.
 602
 603 2005-10-27  DJ Delorie  <dj@redhat.com>
 604
 605         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 606         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 607         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 608         imm operand is needed.
 609         (adjnz, sbjnz): Pass the right operands.
 610         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 611         unary-insn): Add -g variants for opcodes that need to support :G.
 612         (not.BW:G, push.BW:G): Call it.
 613         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 614         stzx16-imm8-imm8-abs16): Fix operand typos.
 615         * m32c.opc (m32c_asm_hash): Support bnCND.
 616         (parse_signed4n, print_signed4n): New.
 617
 618 2005-10-26  DJ Delorie  <dj@redhat.com>
 619
 620         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 621         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 622         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 623         dsp8[sp] is signed.
 624         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 625         (mov.BW:S r0,r1): Fix typo r1l->r1.
 626         (tst): Allow :G suffix.
 627         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 628
 629 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 630
 631         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 632
 633 2005-10-25  DJ Delorie  <dj@redhat.com>
 634
 635         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 636         making one a macro of the other.
 637
 638 2005-10-21  DJ Delorie  <dj@redhat.com>
 639
 640         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 641         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 642         indexld, indexls): .w variants have `1' bit.
 643         (rot32.b): QI, not SI.
 644         (rot32.w): HI, not SI.
 645         (xchg16): HI for .w variant.
 646
 647 2005-10-19  Nick Clifton  <nickc@redhat.com>
 648
 649         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 650
 651 2005-10-18  Andreas Schwab  <schwab@suse.de>
 652
 653         * m32r.opc (parse_slo16): Better version of previous patch.
 654
 655 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 656
 657         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 658         size.
 659
 660 2005-07-25  DJ Delorie  <dj@redhat.com>
 661
 662         * m32c.opc (parse_unsigned8): Add %dsp8().
 663         (parse_signed8): Add %hi8().
 664         (parse_unsigned16): Add %dsp16().
 665         (parse_signed16): Add %lo16() and %hi16().
 666         (parse_lab_5_3): Make valuep a bfd_vma *.
 667
 668 2005-07-18  Nick Clifton  <nickc@redhat.com>
 669
 670         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 671         components.
 672         (f-lab32-jmp-s): Fix insertion sequence.
 673         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 674         (Dsp-40-s8): Make parameter be signed.
 675         (Dsp-40-s16): Likewise.
 676         (Dsp-48-s8): Likewise.
 677         (Dsp-48-s16): Likewise.
 678         (Imm-13-u3): Likewise. (Despite its name!)
 679         (BitBase16-16-s8): Make the parameter be unsigned.
 680         (BitBase16-8-u11-S): Likewise.
 681         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 682         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 683         relaxation.
 684
 685         * m32c.opc: Fix formatting.
 686         Use safe-ctype.h instead of ctype.h
 687         Move duplicated code sequences into a macro.
 688         Fix compile time warnings about signedness mismatches.
 689         Remove dead code.
 690         (parse_lab_5_3): New parser function.
 691
 692 2005-07-16  Jim Blandy  <jimb@redhat.com>
 693
 694         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 695         to represent isa sets.
 696
 697 2005-07-15  Jim Blandy  <jimb@redhat.com>
 698
 699         * m32c.cpu, m32c.opc: Fix copyright.
 700
 701 2005-07-14  Jim Blandy  <jimb@redhat.com>
 702
 703         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 704
 705 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 706
 707         * ms1.opc (print_dollarhex): Correct format string.
 708
 709 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 710
 711         * iq2000.cpu: Include from binutils cpu dir.
 712
 713 2005-07-05  Nick Clifton  <nickc@redhat.com>
 714
 715         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 716         unsigned in order to avoid compile time warnings about sign
 717         conflicts.
 718
 719         * ms1.opc (parse_*): Likewise.
 720         (parse_imm16): Use a "void *" as it is passed both signed and
 721         unsigned arguments.
 722
 723 2005-07-01  Nick Clifton  <nickc@redhat.com>
 724
 725         * frv.opc: Update to ISO C90 function declaration style.
 726         * iq2000.opc: Likewise.
 727         * m32r.opc: Likewise.
 728         * sh.opc: Likewise.
 729
 730 2005-06-15  Dave Brolley  <brolley@redhat.com>
 731
 732         Contributed by Red Hat.
 733         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 734         * ms1.opc: New file.  Written by Stan Cox.
 735
 736 2005-05-10  Nick Clifton  <nickc@redhat.com>
 737
 738         * Update the address and phone number of the FSF organization in
 739         the GPL notices in the following files:
 740         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 741         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 742         sh64-media.cpu, simplify.inc
 743
 744 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 745
 746         * frv.opc (parse_A): Warning fix.
 747
 748 2005-02-23  Nick Clifton  <nickc@redhat.com>
 749
 750         * frv.opc: Fixed compile time warnings about differing signed'ness
 751         of pointers passed to functions.
 752         * m32r.opc: Likewise.
 753
 754 2005-02-11  Nick Clifton  <nickc@redhat.com>
 755
 756         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 757         'bfd_vma *' in order avoid compile time warning message.
 758
 759 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 760
 761         * cris.cpu (mstep): Add missing insn.
 762
 763 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 764
 765         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 766         * frv.cpu: Add support for TLS annotations in loads and calll.
 767         * frv.opc (parse_symbolic_address): New.
 768         (parse_ldd_annotation): New.
 769         (parse_call_annotation): New.
 770         (parse_ld_annotation): New.
 771         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 772         Introduce TLS relocations.
 773         (parse_d12, parse_s12, parse_u12): Likewise.
 774         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 775         (parse_call_label, print_at): New.
 776
 777 2004-12-21  Mikael Starvik  <starvik@axis.com>
 778
 779         * cris.cpu (cris-set-mem): Correct integral write semantics.
 780
 781 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 782
 783         * cris.cpu: New file.
 784
 785 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 786
 787         * iq2000.cpu: Added quotes around macro arguments so that they
 788         will work with newer versions of guile.
 789
 790 2004-10-27  Nick Clifton  <nickc@redhat.com>
 791
 792         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 793         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 794         operand.
 795         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 796         with guile.
 797
 798 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 799
 800         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 801
 802 2004-05-15  Nick Clifton  <nickc@redhat.com>
 803
 804         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 805
 806 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 807
 808         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 809
 810 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 811
 812         * frv.cpu (define-arch frv): Add fr450 mach.
 813         (define-mach fr450): New.
 814         (define-model fr450): New.  Add profile units to every fr450 insn.
 815         (define-attr UNIT): Add MDCUTSSI.
 816         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 817         (define-attr AUDIO): New boolean.
 818         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 819         (f-LRA-null, f-TLBPR-null): New fields.
 820         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 821         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 822         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 823         (LRA-null, TLBPR-null): New macros.
 824         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 825         (load-real-address): New macro.
 826         (lrai, lrad, tlbpr): New instructions.
 827         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 828         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 829         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 830         (media-low-clear-semantics, media-scope-limit-semantics)
 831         (media-quad-limit, media-quad-shift): New macros.
 832         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 833         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 834         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 835         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 836         (fr450_unit_mapping): New array.
 837         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 838         for new MDCUTSSI unit.
 839         (fr450_check_insn_major_constraints): New function.
 840         (check_insn_major_constraints): Use it.
 841
 842 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 843
 844         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 845         (scutss): Change unit to I0.
 846         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 847         (mqsaths): Fix FR400-MAJOR categorization.
 848         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 849         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 850         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 851         combinations.
 852
 853 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 854
 855         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 856         (rstb, rsth, rst, rstd, rstq): Delete.
 857         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 858
 859 2004-02-23  Nick Clifton  <nickc@redhat.com>
 860
 861         * Apply these patches from Renesas:
 862
 863         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 864
 865         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 866         disassembling codes for 0x*2 addresses.
 867
 868         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 869
 870         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 871
 872         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 873
 874         * cpu/m32r.cpu : Add new model m32r2.
 875         Add new instructions.
 876         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 877         Changed PIPE attr of push from O to OS.
 878         Care for Little-endian of M32R.
 879         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 880         Care for Little-endian of M32R.
 881         (parse_slo16): signed extension for value.
 882
 883 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 884
 885         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 886         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 887
 888         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 889         written by Ben Elliston.
 890
 891 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 892
 893         * frv.cpu (UNIT): Add IACC.
 894         (iacc-multiply-r-r): Use it.
 895         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 896         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 897
 898 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 899
 900         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 901         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 902         cut&paste errors in shifting/truncating numerical operands.
 903         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 904         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 905         (parse_uslo16): Likewise.
 906         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 907         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 908         (parse_s12): Likewise.
 909         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 910         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 911         (parse_uslo16): Likewise.
 912         (parse_uhi16): Parse gothi and gotfuncdeschi.
 913         (parse_d12): Parse got12 and gotfuncdesc12.
 914         (parse_s12): Likewise.
 915
 916 2003-10-10  Dave Brolley  <brolley@redhat.com>
 917
 918         * frv.cpu (dnpmop): New p-macro.
 919         (GRdoublek): Use dnpmop.
 920         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 921         (store-double-r-r): Use (.sym regtype doublek).
 922         (r-store-double): Ditto.
 923         (store-double-r-r-u): Ditto.
 924         (conditional-store-double): Ditto.
 925         (conditional-store-double-u): Ditto.
 926         (store-double-r-simm): Ditto.
 927         (fmovs): Assign to UNIT FMALL.
 928
 929 2003-10-06  Dave Brolley  <brolley@redhat.com>
 930
 931         * frv.cpu, frv.opc: Add support for fr550.
 932
 933 2003-09-24  Dave Brolley  <brolley@redhat.com>
 934
 935         * frv.cpu (u-commit): New modelling unit for fr500.
 936         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 937         (commit-r): Use u-commit model for fr500.
 938         (commit): Ditto.
 939         (conditional-float-binary-op): Take profiling data as an argument.
 940         Update callers.
 941         (ne-float-binary-op): Ditto.
 942
 943 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 944
 945         * frv.cpu (nldqi): Delete unimplemented instruction.
 946
 947 2003-09-12  Dave Brolley  <brolley@redhat.com>
 948
 949         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 950         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 951         frv_ref_SI to get input register referenced for profiling.
 952         (clear-ne-flag-all): Pass insn profiling in as an argument.
 953         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 954
 955 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 956
 957         * frv.cpu: Typographical corrections.
 958
 959 2003-09-09  Dave Brolley  <brolley@redhat.com>
 960
 961         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 962         (conditional-media-dual-complex, media-quad-complex): Likewise.
 963
 964 2003-09-04  Dave Brolley  <brolley@redhat.com>
 965
 966         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 967         Update all callers.
 968         (conditional-register-transfer): Ditto.
 969         (cache-preload): Ditto.
 970         (floating-point-conversion): Ditto.
 971         (floating-point-neg): Ditto.
 972         (float-abs): Ditto.
 973         (float-binary-op-s): Ditto.
 974         (conditional-float-binary-op): Ditto.
 975         (ne-float-binary-op): Ditto.
 976         (float-dual-arith): Ditto.
 977         (ne-float-dual-arith): Ditto.
 978
 979 2003-09-03  Dave Brolley  <brolley@redhat.com>
 980
 981         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 982         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 983         MCLRACC-1.
 984         (A): Removed operand.
 985         (A0,A1): New operands replace operand A.
 986         (mnop): Now a real insn
 987         (mclracc): Removed insn.
 988         (mclracc-0, mclracc-1): New insns replace mclracc.
 989         (all insns): Use new UNIT attributes.
 990
 991 2003-08-21  Nick Clifton  <nickc@redhat.com>
 992
 993         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 994         and u-media-dual-btoh with output parameter.
 995         (cmbtoh): Add profiling hack.
 996
 997 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 998
 999         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1000
1001 2003-06-10  Doug Evans  <dje@sebabeach.org>
1002
1003         * frv.cpu: Add IDOC attribute.
1004
1005 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1006
1007         Contributed by Red Hat.
1008         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1009         Stan Cox, and Frank Ch. Eigler.
1010         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1011         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1012         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1013         * iq10.cpu: New file.  Written by Jeff Johnston.
1014
1015 2003-06-05  Nick Clifton  <nickc@redhat.com>
1016
1017         * frv.cpu (FRintieven): New operand.  An even-numbered only
1018         version of the FRinti operand.
1019         (FRintjeven): Likewise for FRintj.
1020         (FRintkeven): Likewise for FRintk.
1021         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1022         media-quad-arith-sat-semantics, media-quad-arith-sat,
1023         conditional-media-quad-arith-sat, mdunpackh,
1024         media-quad-multiply-semantics, media-quad-multiply,
1025         conditional-media-quad-multiply, media-quad-complex-i,
1026         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1027         conditional-media-quad-multiply-acc, munpackh,
1028         media-quad-multiply-cross-acc-semantics, mdpackh,
1029         media-quad-multiply-cross-acc, mbtoh-semantics,
1030         media-quad-cross-multiply-cross-acc-semantics,
1031         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1032         media-quad-cross-multiply-acc-semantics, cmbtoh,
1033         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1034         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1035         cmhtob): Use new operands.
1036         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1037         (parse_even_register): New function.
1038
1039 2003-06-03  Nick Clifton  <nickc@redhat.com>
1040
1041         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1042         immediate value not unsigned.
1043
1044 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1045
1046         Contributed by Red Hat.
1047         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1048         and Eric Christopher.
1049         * frv.opc: New file.  Written by Catherine Moore, and Dave
1050         Brolley.
1051         * simplify.inc: New file.  Written by Doug Evans.
1052
1053 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1054
1055         * New file.
1056
1057 \f
1058 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1059
1060 Copying and distribution of this file, with or without modification,
1061 are permitted in any medium without royalty provided the copyright
1062 notice and this notice are preserved.
1063
1064 Local Variables:
1065 mode: change-log
1066 left-margin: 8
1067 fill-column: 74
1068 version-control: never
1069 End: