1 /* Target-dependent code for Motorola 68HC11 & 68HC12
3 Copyright (C) 1999-2021 Free Software Foundation, Inc.
5 Contributed by Stephane Carrez, stcarrez@nerim.fr
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
27 #include "dwarf2/frame.h"
28 #include "trad-frame.h"
38 #include "arch-utils.h"
40 #include "reggroups.h"
43 #include "opcode/m68hc11.h"
44 #include "elf/m68hc11.h"
47 /* Macros for setting and testing a bit in a minimal symbol.
48 For 68HC11/68HC12 we have two flags that tell which return
49 type the function is using. This is used for prologue and frame
50 analysis to compute correct stack frame layout.
52 The MSB of the minimal symbol's "info" field is used for this purpose.
54 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
55 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
56 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
57 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. */
59 #define MSYMBOL_SET_RTC(msym) \
60 MSYMBOL_TARGET_FLAG_1 (msym) = 1
62 #define MSYMBOL_SET_RTI(msym) \
63 MSYMBOL_TARGET_FLAG_2 (msym) = 1
65 #define MSYMBOL_IS_RTC(msym) \
66 MSYMBOL_TARGET_FLAG_1 (msym)
68 #define MSYMBOL_IS_RTI(msym) \
69 MSYMBOL_TARGET_FLAG_2 (msym)
71 enum insn_return_kind
{
78 /* Register numbers of various important registers. */
80 #define HARD_X_REGNUM 0
81 #define HARD_D_REGNUM 1
82 #define HARD_Y_REGNUM 2
83 #define HARD_SP_REGNUM 3
84 #define HARD_PC_REGNUM 4
86 #define HARD_A_REGNUM 5
87 #define HARD_B_REGNUM 6
88 #define HARD_CCR_REGNUM 7
90 /* 68HC12 page number register.
91 Note: to keep a compatibility with gcc register naming, we must
92 not have to rename FP and other soft registers. The page register
93 is a real hard register and must therefore be counted by gdbarch_num_regs.
94 For this it has the same number as Z register (which is not used). */
95 #define HARD_PAGE_REGNUM 8
96 #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
98 /* Z is replaced by X or Y by gcc during machine reorg.
99 ??? There is no way to get it and even know whether
100 it's in X or Y or in ZS. */
101 #define SOFT_Z_REGNUM 8
103 /* Soft registers. These registers are special. There are treated
104 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
105 They are physically located in memory. */
106 #define SOFT_FP_REGNUM 9
107 #define SOFT_TMP_REGNUM 10
108 #define SOFT_ZS_REGNUM 11
109 #define SOFT_XY_REGNUM 12
110 #define SOFT_UNUSED_REGNUM 13
111 #define SOFT_D1_REGNUM 14
112 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
113 #define M68HC11_MAX_SOFT_REGS 32
115 #define M68HC11_NUM_REGS (M68HC11_LAST_HARD_REG + 1)
116 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
117 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
119 #define M68HC11_REG_SIZE (2)
121 #define M68HC12_NUM_REGS (9)
122 #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
123 #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
125 struct insn_sequence
;
128 /* Stack pointer correction value. For 68hc11, the stack pointer points
129 to the next push location. An offset of 1 must be applied to obtain
130 the address where the last value is saved. For 68hc12, the stack
131 pointer points to the last value pushed. No offset is necessary. */
132 int stack_correction
;
134 /* Description of instructions in the prologue. */
135 struct insn_sequence
*prologue
;
137 /* True if the page memory bank register is available
139 int use_page_register
;
141 /* ELF flags for ABI. */
145 #define STACK_CORRECTION(gdbarch) (gdbarch_tdep (gdbarch)->stack_correction)
146 #define USE_PAGE_REGISTER(gdbarch) (gdbarch_tdep (gdbarch)->use_page_register)
148 struct m68hc11_unwind_cache
150 /* The previous frame's inner most stack address. Used as this
151 frame ID's stack_addr. */
153 /* The frame's base, optionally used by the high-level debug info. */
161 enum insn_return_kind return_kind
;
163 /* Table indicating the location of each and every register. */
164 trad_frame_saved_reg
*saved_regs
;
167 /* Table of registers for 68HC11. This includes the hard registers
168 and the soft registers used by GCC. */
170 m68hc11_register_names
[] =
172 "x", "d", "y", "sp", "pc", "a", "b",
173 "ccr", "page", "frame","tmp", "zs", "xy", 0,
174 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
175 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
176 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
177 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
178 "d29", "d30", "d31", "d32"
181 struct m68hc11_soft_reg
187 static struct m68hc11_soft_reg soft_regs
[M68HC11_ALL_REGS
];
189 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
191 static int soft_min_addr
;
192 static int soft_max_addr
;
193 static int soft_reg_initialized
= 0;
195 /* Look in the symbol table for the address of a pseudo register
196 in memory. If we don't find it, pretend the register is not used
197 and not available. */
199 m68hc11_get_register_info (struct m68hc11_soft_reg
*reg
, const char *name
)
201 struct bound_minimal_symbol msymbol
;
203 msymbol
= lookup_minimal_symbol (name
, NULL
, NULL
);
206 reg
->addr
= BMSYMBOL_VALUE_ADDRESS (msymbol
);
207 reg
->name
= xstrdup (name
);
209 /* Keep track of the address range for soft registers. */
210 if (reg
->addr
< (CORE_ADDR
) soft_min_addr
)
211 soft_min_addr
= reg
->addr
;
212 if (reg
->addr
> (CORE_ADDR
) soft_max_addr
)
213 soft_max_addr
= reg
->addr
;
222 /* Initialize the table of soft register addresses according
223 to the symbol table. */
225 m68hc11_initialize_register_info (void)
229 if (soft_reg_initialized
)
232 soft_min_addr
= INT_MAX
;
234 for (i
= 0; i
< M68HC11_ALL_REGS
; i
++)
236 soft_regs
[i
].name
= 0;
239 m68hc11_get_register_info (&soft_regs
[SOFT_FP_REGNUM
], "_.frame");
240 m68hc11_get_register_info (&soft_regs
[SOFT_TMP_REGNUM
], "_.tmp");
241 m68hc11_get_register_info (&soft_regs
[SOFT_ZS_REGNUM
], "_.z");
242 soft_regs
[SOFT_Z_REGNUM
] = soft_regs
[SOFT_ZS_REGNUM
];
243 m68hc11_get_register_info (&soft_regs
[SOFT_XY_REGNUM
], "_.xy");
245 for (i
= SOFT_D1_REGNUM
; i
< M68HC11_MAX_SOFT_REGS
; i
++)
249 xsnprintf (buf
, sizeof (buf
), "_.d%d", i
- SOFT_D1_REGNUM
+ 1);
250 m68hc11_get_register_info (&soft_regs
[i
], buf
);
253 if (soft_regs
[SOFT_FP_REGNUM
].name
== 0)
254 warning (_("No frame soft register found in the symbol table.\n"
255 "Stack backtrace will not work."));
256 soft_reg_initialized
= 1;
259 /* Given an address in memory, return the soft register number if
260 that address corresponds to a soft register. Returns -1 if not. */
262 m68hc11_which_soft_register (CORE_ADDR addr
)
266 if (addr
< soft_min_addr
|| addr
> soft_max_addr
)
269 for (i
= SOFT_FP_REGNUM
; i
< M68HC11_ALL_REGS
; i
++)
271 if (soft_regs
[i
].name
&& soft_regs
[i
].addr
== addr
)
277 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
278 pseudo registers. They are located in memory. Translate the register
279 fetch into a memory read. */
280 static enum register_status
281 m68hc11_pseudo_register_read (struct gdbarch
*gdbarch
,
282 readable_regcache
*regcache
,
283 int regno
, gdb_byte
*buf
)
285 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
287 /* The PC is a pseudo reg only for 68HC12 with the memory bank
289 if (regno
== M68HC12_HARD_PC_REGNUM
)
292 const int regsize
= 4;
293 enum register_status status
;
295 status
= regcache
->cooked_read (HARD_PC_REGNUM
, &pc
);
296 if (status
!= REG_VALID
)
298 if (pc
>= 0x8000 && pc
< 0xc000)
302 regcache
->cooked_read (HARD_PAGE_REGNUM
, &page
);
307 store_unsigned_integer (buf
, regsize
, byte_order
, pc
);
311 m68hc11_initialize_register_info ();
313 /* Fetch a soft register: translate into a memory read. */
314 if (soft_regs
[regno
].name
)
316 target_read_memory (soft_regs
[regno
].addr
, buf
, 2);
326 /* Store a pseudo register. Translate the register store
327 into a memory write. */
329 m68hc11_pseudo_register_write (struct gdbarch
*gdbarch
,
330 struct regcache
*regcache
,
331 int regno
, const gdb_byte
*buf
)
333 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
335 /* The PC is a pseudo reg only for 68HC12 with the memory bank
337 if (regno
== M68HC12_HARD_PC_REGNUM
)
339 const int regsize
= 4;
340 gdb_byte
*tmp
= (gdb_byte
*) alloca (regsize
);
343 memcpy (tmp
, buf
, regsize
);
344 pc
= extract_unsigned_integer (tmp
, regsize
, byte_order
);
348 regcache_cooked_write_unsigned (regcache
, HARD_PAGE_REGNUM
,
351 regcache_cooked_write_unsigned (regcache
, HARD_PC_REGNUM
,
355 regcache_cooked_write_unsigned (regcache
, HARD_PC_REGNUM
, pc
);
359 m68hc11_initialize_register_info ();
361 /* Store a soft register: translate into a memory write. */
362 if (soft_regs
[regno
].name
)
364 const int regsize
= 2;
365 gdb_byte
*tmp
= (gdb_byte
*) alloca (regsize
);
366 memcpy (tmp
, buf
, regsize
);
367 target_write_memory (soft_regs
[regno
].addr
, tmp
, regsize
);
372 m68hc11_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
374 if (reg_nr
== M68HC12_HARD_PC_REGNUM
&& USE_PAGE_REGISTER (gdbarch
))
376 if (reg_nr
== HARD_PC_REGNUM
&& USE_PAGE_REGISTER (gdbarch
))
381 if (reg_nr
>= M68HC11_ALL_REGS
)
384 m68hc11_initialize_register_info ();
386 /* If we don't know the address of a soft register, pretend it
388 if (reg_nr
> M68HC11_LAST_HARD_REG
&& soft_regs
[reg_nr
].name
== 0)
390 return m68hc11_register_names
[reg_nr
];
393 constexpr gdb_byte m68hc11_break_insn
[] = {0x0};
395 typedef BP_MANIPULATION (m68hc11_break_insn
) m68hc11_breakpoint
;
397 /* 68HC11 & 68HC12 prologue analysis. */
401 /* 68HC11 opcodes. */
402 #undef M6811_OP_PAGE2
403 #define M6811_OP_PAGE2 (0x18)
404 #define M6811_OP_LDX (0xde)
405 #define M6811_OP_LDX_EXT (0xfe)
406 #define M6811_OP_PSHX (0x3c)
407 #define M6811_OP_STS (0x9f)
408 #define M6811_OP_STS_EXT (0xbf)
409 #define M6811_OP_TSX (0x30)
410 #define M6811_OP_XGDX (0x8f)
411 #define M6811_OP_ADDD (0xc3)
412 #define M6811_OP_TXS (0x35)
413 #define M6811_OP_DES (0x34)
415 /* 68HC12 opcodes. */
416 #define M6812_OP_PAGE2 (0x18)
417 #define M6812_OP_MOVW (0x01)
418 #define M6812_PB_PSHW (0xae)
419 #define M6812_OP_STS (0x5f)
420 #define M6812_OP_STS_EXT (0x7f)
421 #define M6812_OP_LEAS (0x1b)
422 #define M6812_OP_PSHX (0x34)
423 #define M6812_OP_PSHY (0x35)
425 /* Operand extraction. */
426 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
427 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
428 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
429 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
431 /* Identification of the sequence. */
435 P_SAVE_REG
, /* Save a register on the stack. */
436 P_SET_FRAME
, /* Setup the frame pointer. */
437 P_LOCAL_1
, /* Allocate 1 byte for locals. */
438 P_LOCAL_2
, /* Allocate 2 bytes for locals. */
439 P_LOCAL_N
/* Allocate N bytes for locals. */
442 struct insn_sequence
{
443 enum m6811_seq_type type
;
445 unsigned short code
[MAX_CODES
];
448 /* Sequence of instructions in the 68HC11 function prologue. */
449 static struct insn_sequence m6811_prologue
[] = {
450 /* Sequences to save a soft-register. */
451 { P_SAVE_REG
, 3, { M6811_OP_LDX
, OP_DIRECT
,
453 { P_SAVE_REG
, 5, { M6811_OP_PAGE2
, M6811_OP_LDX
, OP_DIRECT
,
454 M6811_OP_PAGE2
, M6811_OP_PSHX
} },
455 { P_SAVE_REG
, 4, { M6811_OP_LDX_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
,
457 { P_SAVE_REG
, 6, { M6811_OP_PAGE2
, M6811_OP_LDX_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
,
458 M6811_OP_PAGE2
, M6811_OP_PSHX
} },
460 /* Sequences to allocate local variables. */
461 { P_LOCAL_N
, 7, { M6811_OP_TSX
,
463 M6811_OP_ADDD
, OP_IMM_HIGH
, OP_IMM_LOW
,
466 { P_LOCAL_N
, 11, { M6811_OP_PAGE2
, M6811_OP_TSX
,
467 M6811_OP_PAGE2
, M6811_OP_XGDX
,
468 M6811_OP_ADDD
, OP_IMM_HIGH
, OP_IMM_LOW
,
469 M6811_OP_PAGE2
, M6811_OP_XGDX
,
470 M6811_OP_PAGE2
, M6811_OP_TXS
} },
471 { P_LOCAL_1
, 1, { M6811_OP_DES
} },
472 { P_LOCAL_2
, 1, { M6811_OP_PSHX
} },
473 { P_LOCAL_2
, 2, { M6811_OP_PAGE2
, M6811_OP_PSHX
} },
475 /* Initialize the frame pointer. */
476 { P_SET_FRAME
, 2, { M6811_OP_STS
, OP_DIRECT
} },
477 { P_SET_FRAME
, 3, { M6811_OP_STS_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
} },
482 /* Sequence of instructions in the 68HC12 function prologue. */
483 static struct insn_sequence m6812_prologue
[] = {
484 { P_SAVE_REG
, 5, { M6812_OP_PAGE2
, M6812_OP_MOVW
, M6812_PB_PSHW
,
485 OP_IMM_HIGH
, OP_IMM_LOW
} },
486 { P_SET_FRAME
, 2, { M6812_OP_STS
, OP_DIRECT
} },
487 { P_SET_FRAME
, 3, { M6812_OP_STS_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
} },
488 { P_LOCAL_N
, 2, { M6812_OP_LEAS
, OP_PBYTE
} },
489 { P_LOCAL_2
, 1, { M6812_OP_PSHX
} },
490 { P_LOCAL_2
, 1, { M6812_OP_PSHY
} },
495 /* Analyze the sequence of instructions starting at the given address.
496 Returns a pointer to the sequence when it is recognized and
497 the optional value (constant/address) associated with it. */
498 static struct insn_sequence
*
499 m68hc11_analyze_instruction (struct gdbarch
*gdbarch
,
500 struct insn_sequence
*seq
, CORE_ADDR pc
,
503 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
504 unsigned char buffer
[MAX_CODES
];
511 for (; seq
->type
!= P_LAST
; seq
++)
514 for (j
= 0; j
< seq
->length
; j
++)
518 buffer
[bufsize
] = read_memory_unsigned_integer (pc
+ bufsize
,
522 /* Continue while we match the opcode. */
523 if (seq
->code
[j
] == buffer
[j
])
526 if ((seq
->code
[j
] & 0xf00) == 0)
529 /* Extract a sequence parameter (address or constant). */
530 switch (seq
->code
[j
])
533 cur_val
= (CORE_ADDR
) buffer
[j
];
537 cur_val
= cur_val
& 0x0ff;
538 cur_val
|= (buffer
[j
] << 8);
543 cur_val
|= buffer
[j
];
547 if ((buffer
[j
] & 0xE0) == 0x80)
549 v
= buffer
[j
] & 0x1f;
553 else if ((buffer
[j
] & 0xfe) == 0xf0)
555 v
= read_memory_unsigned_integer (pc
+ j
+ 1, 1, byte_order
);
559 else if (buffer
[j
] == 0xf2)
561 v
= read_memory_unsigned_integer (pc
+ j
+ 1, 2, byte_order
);
568 /* We have a full match. */
569 if (j
== seq
->length
)
578 /* Return the instruction that the function at the PC is using. */
579 static enum insn_return_kind
580 m68hc11_get_return_insn (CORE_ADDR pc
)
582 struct bound_minimal_symbol sym
;
584 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
585 function is stored by elfread.c in the high bit of the info field.
586 Use this to decide which instruction the function uses to return. */
587 sym
= lookup_minimal_symbol_by_pc (pc
);
591 if (MSYMBOL_IS_RTC (sym
.minsym
))
593 else if (MSYMBOL_IS_RTI (sym
.minsym
))
599 /* Analyze the function prologue to find some information
601 - the PC of the first line (for m68hc11_skip_prologue)
602 - the offset of the previous frame saved address (from current frame)
603 - the soft registers which are pushed. */
605 m68hc11_scan_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
606 CORE_ADDR current_pc
, struct m68hc11_unwind_cache
*info
)
611 int found_frame_point
;
614 struct insn_sequence
*seq_table
;
618 if (pc
>= current_pc
)
623 m68hc11_initialize_register_info ();
630 seq_table
= gdbarch_tdep (gdbarch
)->prologue
;
632 /* The 68hc11 stack is as follows:
648 +-----------+ <--- current frame
651 With most processors (like 68K) the previous frame can be computed
652 easily because it is always at a fixed offset (see link/unlink).
653 That is, locals are accessed with negative offsets, arguments are
654 accessed with positive ones. Since 68hc11 only supports offsets
655 in the range [0..255], the frame is defined at the bottom of
656 locals (see picture).
658 The purpose of the analysis made here is to find out the size
659 of locals in this function. An alternative to this is to use
660 DWARF2 info. This would be better but I don't know how to
661 access dwarf2 debug from this function.
663 Walk from the function entry point to the point where we save
664 the frame. While walking instructions, compute the size of bytes
665 which are pushed. This gives us the index to access the previous
668 We limit the search to 128 bytes so that the algorithm is bounded
669 in case of random and wrong code. We also stop and abort if
670 we find an instruction which is not supposed to appear in the
671 prologue (as generated by gcc 2.95, 2.96). */
674 found_frame_point
= 0;
677 while (!done
&& pc
+ 2 < func_end
)
679 struct insn_sequence
*seq
;
682 seq
= m68hc11_analyze_instruction (gdbarch
, seq_table
, pc
, &val
);
686 /* If we are within the instruction group, we can't advance the
687 pc nor the stack offset. Otherwise the caller's stack computed
688 from the current stack can be wrong. */
689 if (pc
+ seq
->length
> current_pc
)
692 pc
= pc
+ seq
->length
;
693 if (seq
->type
== P_SAVE_REG
)
695 if (found_frame_point
)
697 saved_reg
= m68hc11_which_soft_register (val
);
702 if (info
->saved_regs
)
703 info
->saved_regs
[saved_reg
].set_addr (save_addr
);
710 else if (seq
->type
== P_SET_FRAME
)
712 found_frame_point
= 1;
715 else if (seq
->type
== P_LOCAL_1
)
719 else if (seq
->type
== P_LOCAL_2
)
723 else if (seq
->type
== P_LOCAL_N
)
725 /* Stack pointer is decremented for the allocation. */
727 size
-= (int) (val
) | 0xffff0000;
732 if (found_frame_point
== 0)
733 info
->sp_offset
= size
;
735 info
->sp_offset
= -1;
740 m68hc11_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
742 CORE_ADDR func_addr
, func_end
;
743 struct symtab_and_line sal
;
744 struct m68hc11_unwind_cache tmp_cache
= { 0 };
746 /* If we have line debugging information, then the end of the
747 prologue should be the first assembly instruction of the
748 first source line. */
749 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
751 sal
= find_pc_line (func_addr
, 0);
752 if (sal
.end
&& sal
.end
< func_end
)
756 pc
= m68hc11_scan_prologue (gdbarch
, pc
, (CORE_ADDR
) -1, &tmp_cache
);
760 /* Put here the code to store, into fi->saved_regs, the addresses of
761 the saved registers of frame described by FRAME_INFO. This
762 includes special registers such as pc and fp saved in special ways
763 in the stack frame. sp is even more special: the address we return
764 for it IS the sp for the next frame. */
766 static struct m68hc11_unwind_cache
*
767 m68hc11_frame_unwind_cache (struct frame_info
*this_frame
,
768 void **this_prologue_cache
)
770 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
773 struct m68hc11_unwind_cache
*info
;
774 CORE_ADDR current_pc
;
777 if ((*this_prologue_cache
))
778 return (struct m68hc11_unwind_cache
*) (*this_prologue_cache
);
780 info
= FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache
);
781 (*this_prologue_cache
) = info
;
782 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
784 info
->pc
= get_frame_func (this_frame
);
787 info
->return_kind
= m68hc11_get_return_insn (info
->pc
);
789 /* The SP was moved to the FP. This indicates that a new frame
790 was created. Get THIS frame's FP value by unwinding it from
792 this_base
= get_frame_register_unsigned (this_frame
, SOFT_FP_REGNUM
);
799 current_pc
= get_frame_pc (this_frame
);
801 m68hc11_scan_prologue (gdbarch
, info
->pc
, current_pc
, info
);
803 info
->saved_regs
[HARD_PC_REGNUM
].set_addr (info
->size
);
805 if (info
->sp_offset
!= (CORE_ADDR
) -1)
807 info
->saved_regs
[HARD_PC_REGNUM
].set_addr (info
->sp_offset
);
808 this_base
= get_frame_register_unsigned (this_frame
, HARD_SP_REGNUM
);
809 prev_sp
= this_base
+ info
->sp_offset
+ 2;
810 this_base
+= STACK_CORRECTION (gdbarch
);
814 /* The FP points at the last saved register. Adjust the FP back
815 to before the first saved register giving the SP. */
816 prev_sp
= this_base
+ info
->size
+ 2;
818 this_base
+= STACK_CORRECTION (gdbarch
);
819 if (soft_regs
[SOFT_FP_REGNUM
].name
)
820 info
->saved_regs
[SOFT_FP_REGNUM
].set_addr (info
->size
- 2);
823 if (info
->return_kind
== RETURN_RTC
)
826 info
->saved_regs
[HARD_PAGE_REGNUM
].set_addr (info
->size
);
827 info
->saved_regs
[HARD_PC_REGNUM
].set_addr (info
->size
+ 1);
829 else if (info
->return_kind
== RETURN_RTI
)
832 info
->saved_regs
[HARD_CCR_REGNUM
].set_addr (info
->size
);
833 info
->saved_regs
[HARD_D_REGNUM
].set_addr (info
->size
+ 1);
834 info
->saved_regs
[HARD_X_REGNUM
].set_addr (info
->size
+ 3);
835 info
->saved_regs
[HARD_Y_REGNUM
].set_addr (info
->size
+ 5);
836 info
->saved_regs
[HARD_PC_REGNUM
].set_addr (info
->size
+ 7);
839 /* Add 1 here to adjust for the post-decrement nature of the push
841 info
->prev_sp
= prev_sp
;
843 info
->base
= this_base
;
845 /* Adjust all the saved registers so that they contain addresses and not
847 for (i
= 0; i
< gdbarch_num_cooked_regs (gdbarch
); i
++)
848 if (info
->saved_regs
[i
].is_addr ())
850 info
->saved_regs
[i
].set_addr (info
->saved_regs
[i
].addr () + this_base
);
853 /* The previous frame's SP needed to be computed. Save the computed
855 info
->saved_regs
[HARD_SP_REGNUM
].set_value (info
->prev_sp
);
860 /* Given a GDB frame, determine the address of the calling function's
861 frame. This will be used to create a new GDB frame struct. */
864 m68hc11_frame_this_id (struct frame_info
*this_frame
,
865 void **this_prologue_cache
,
866 struct frame_id
*this_id
)
868 struct m68hc11_unwind_cache
*info
869 = m68hc11_frame_unwind_cache (this_frame
, this_prologue_cache
);
874 /* The FUNC is easy. */
875 func
= get_frame_func (this_frame
);
877 /* Hopefully the prologue analysis either correctly determined the
878 frame's base (which is the SP from the previous frame), or set
879 that base to "NULL". */
880 base
= info
->prev_sp
;
884 id
= frame_id_build (base
, func
);
888 static struct value
*
889 m68hc11_frame_prev_register (struct frame_info
*this_frame
,
890 void **this_prologue_cache
, int regnum
)
893 struct m68hc11_unwind_cache
*info
894 = m68hc11_frame_unwind_cache (this_frame
, this_prologue_cache
);
896 value
= trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
898 /* Take into account the 68HC12 specific call (PC + page). */
899 if (regnum
== HARD_PC_REGNUM
900 && info
->return_kind
== RETURN_RTC
901 && USE_PAGE_REGISTER (get_frame_arch (this_frame
)))
903 CORE_ADDR pc
= value_as_long (value
);
904 if (pc
>= 0x08000 && pc
< 0x0c000)
908 release_value (value
);
910 value
= trad_frame_get_prev_register (this_frame
, info
->saved_regs
,
912 page
= value_as_long (value
);
913 release_value (value
);
916 pc
+= ((page
& 0x0ff) << 14);
919 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
926 static const struct frame_unwind m68hc11_frame_unwind
= {
929 default_frame_unwind_stop_reason
,
930 m68hc11_frame_this_id
,
931 m68hc11_frame_prev_register
,
933 default_frame_sniffer
937 m68hc11_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
939 struct m68hc11_unwind_cache
*info
940 = m68hc11_frame_unwind_cache (this_frame
, this_cache
);
946 m68hc11_frame_args_address (struct frame_info
*this_frame
, void **this_cache
)
949 struct m68hc11_unwind_cache
*info
950 = m68hc11_frame_unwind_cache (this_frame
, this_cache
);
952 addr
= info
->base
+ info
->size
;
953 if (info
->return_kind
== RETURN_RTC
)
955 else if (info
->return_kind
== RETURN_RTI
)
961 static const struct frame_base m68hc11_frame_base
= {
962 &m68hc11_frame_unwind
,
963 m68hc11_frame_base_address
,
964 m68hc11_frame_base_address
,
965 m68hc11_frame_args_address
968 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
969 frame. The frame ID's base needs to match the TOS value saved by
970 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
972 static struct frame_id
973 m68hc11_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
976 CORE_ADDR pc
= get_frame_pc (this_frame
);
978 tos
= get_frame_register_unsigned (this_frame
, SOFT_FP_REGNUM
);
980 return frame_id_build (tos
, pc
);
984 /* Get and print the register from the given frame. */
986 m68hc11_print_register (struct gdbarch
*gdbarch
, struct ui_file
*file
,
987 struct frame_info
*frame
, int regno
)
991 if (regno
== HARD_PC_REGNUM
|| regno
== HARD_SP_REGNUM
992 || regno
== SOFT_FP_REGNUM
|| regno
== M68HC12_HARD_PC_REGNUM
)
993 rval
= get_frame_register_unsigned (frame
, regno
);
995 rval
= get_frame_register_signed (frame
, regno
);
997 if (regno
== HARD_A_REGNUM
|| regno
== HARD_B_REGNUM
998 || regno
== HARD_CCR_REGNUM
|| regno
== HARD_PAGE_REGNUM
)
1000 fprintf_filtered (file
, "0x%02x ", (unsigned char) rval
);
1001 if (regno
!= HARD_CCR_REGNUM
)
1002 print_longest (file
, 'd', 1, rval
);
1006 if (regno
== HARD_PC_REGNUM
&& gdbarch_tdep (gdbarch
)->use_page_register
)
1010 page
= get_frame_register_unsigned (frame
, HARD_PAGE_REGNUM
);
1011 fprintf_filtered (file
, "0x%02x:%04x ", (unsigned) page
,
1016 fprintf_filtered (file
, "0x%04x ", (unsigned) rval
);
1017 if (regno
!= HARD_PC_REGNUM
&& regno
!= HARD_SP_REGNUM
1018 && regno
!= SOFT_FP_REGNUM
&& regno
!= M68HC12_HARD_PC_REGNUM
)
1019 print_longest (file
, 'd', 1, rval
);
1023 if (regno
== HARD_CCR_REGNUM
)
1027 unsigned char l
= rval
& 0xff;
1029 fprintf_filtered (file
, "%c%c%c%c%c%c%c%c ",
1030 l
& M6811_S_BIT
? 'S' : '-',
1031 l
& M6811_X_BIT
? 'X' : '-',
1032 l
& M6811_H_BIT
? 'H' : '-',
1033 l
& M6811_I_BIT
? 'I' : '-',
1034 l
& M6811_N_BIT
? 'N' : '-',
1035 l
& M6811_Z_BIT
? 'Z' : '-',
1036 l
& M6811_V_BIT
? 'V' : '-',
1037 l
& M6811_C_BIT
? 'C' : '-');
1038 N
= (l
& M6811_N_BIT
) != 0;
1039 Z
= (l
& M6811_Z_BIT
) != 0;
1040 V
= (l
& M6811_V_BIT
) != 0;
1041 C
= (l
& M6811_C_BIT
) != 0;
1043 /* Print flags following the h8300. */
1045 fprintf_filtered (file
, "u> ");
1046 else if ((C
| Z
) == 1)
1047 fprintf_filtered (file
, "u<= ");
1049 fprintf_filtered (file
, "u< ");
1052 fprintf_filtered (file
, "!= ");
1054 fprintf_filtered (file
, "== ");
1057 fprintf_filtered (file
, ">= ");
1059 fprintf_filtered (file
, "< ");
1061 if ((Z
| (N
^ V
)) == 0)
1062 fprintf_filtered (file
, "> ");
1064 fprintf_filtered (file
, "<= ");
1068 /* Same as 'info reg' but prints the registers in a different way. */
1070 m68hc11_print_registers_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1071 struct frame_info
*frame
, int regno
, int cpregs
)
1075 const char *name
= gdbarch_register_name (gdbarch
, regno
);
1077 if (!name
|| !*name
)
1080 fprintf_filtered (file
, "%-10s ", name
);
1081 m68hc11_print_register (gdbarch
, file
, frame
, regno
);
1082 fprintf_filtered (file
, "\n");
1088 fprintf_filtered (file
, "PC=");
1089 m68hc11_print_register (gdbarch
, file
, frame
, HARD_PC_REGNUM
);
1091 fprintf_filtered (file
, " SP=");
1092 m68hc11_print_register (gdbarch
, file
, frame
, HARD_SP_REGNUM
);
1094 fprintf_filtered (file
, " FP=");
1095 m68hc11_print_register (gdbarch
, file
, frame
, SOFT_FP_REGNUM
);
1097 fprintf_filtered (file
, "\nCCR=");
1098 m68hc11_print_register (gdbarch
, file
, frame
, HARD_CCR_REGNUM
);
1100 fprintf_filtered (file
, "\nD=");
1101 m68hc11_print_register (gdbarch
, file
, frame
, HARD_D_REGNUM
);
1103 fprintf_filtered (file
, " X=");
1104 m68hc11_print_register (gdbarch
, file
, frame
, HARD_X_REGNUM
);
1106 fprintf_filtered (file
, " Y=");
1107 m68hc11_print_register (gdbarch
, file
, frame
, HARD_Y_REGNUM
);
1109 if (gdbarch_tdep (gdbarch
)->use_page_register
)
1111 fprintf_filtered (file
, "\nPage=");
1112 m68hc11_print_register (gdbarch
, file
, frame
, HARD_PAGE_REGNUM
);
1114 fprintf_filtered (file
, "\n");
1117 for (i
= SOFT_D1_REGNUM
; i
< M68HC11_ALL_REGS
; i
++)
1119 /* Skip registers which are not defined in the symbol table. */
1120 if (soft_regs
[i
].name
== 0)
1123 fprintf_filtered (file
, "D%d=", i
- SOFT_D1_REGNUM
+ 1);
1124 m68hc11_print_register (gdbarch
, file
, frame
, i
);
1127 fprintf_filtered (file
, "\n");
1129 fprintf_filtered (file
, " ");
1131 if (nr
&& (nr
% 8) != 7)
1132 fprintf_filtered (file
, "\n");
1137 m68hc11_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1138 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1139 int nargs
, struct value
**args
, CORE_ADDR sp
,
1140 function_call_return_method return_method
,
1141 CORE_ADDR struct_addr
)
1143 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1145 int first_stack_argnum
;
1147 const gdb_byte
*val
;
1150 first_stack_argnum
= 0;
1151 if (return_method
== return_method_struct
)
1152 regcache_cooked_write_unsigned (regcache
, HARD_D_REGNUM
, struct_addr
);
1155 type
= value_type (args
[0]);
1157 /* First argument is passed in D and X registers. */
1158 if (TYPE_LENGTH (type
) <= 4)
1162 v
= extract_unsigned_integer (value_contents (args
[0]),
1163 TYPE_LENGTH (type
), byte_order
);
1164 first_stack_argnum
= 1;
1166 regcache_cooked_write_unsigned (regcache
, HARD_D_REGNUM
, v
);
1167 if (TYPE_LENGTH (type
) > 2)
1170 regcache_cooked_write_unsigned (regcache
, HARD_X_REGNUM
, v
);
1175 for (argnum
= nargs
- 1; argnum
>= first_stack_argnum
; argnum
--)
1177 type
= value_type (args
[argnum
]);
1179 if (TYPE_LENGTH (type
) & 1)
1181 static gdb_byte zero
= 0;
1184 write_memory (sp
, &zero
, 1);
1186 val
= value_contents (args
[argnum
]);
1187 sp
-= TYPE_LENGTH (type
);
1188 write_memory (sp
, val
, TYPE_LENGTH (type
));
1191 /* Store return address. */
1193 store_unsigned_integer (buf
, 2, byte_order
, bp_addr
);
1194 write_memory (sp
, buf
, 2);
1196 /* Finally, update the stack pointer... */
1197 sp
-= STACK_CORRECTION (gdbarch
);
1198 regcache_cooked_write_unsigned (regcache
, HARD_SP_REGNUM
, sp
);
1200 /* ...and fake a frame pointer. */
1201 regcache_cooked_write_unsigned (regcache
, SOFT_FP_REGNUM
, sp
);
1203 /* DWARF2/GCC uses the stack address *before* the function call as a
1209 /* Return the GDB type object for the "standard" data type
1210 of data in register N. */
1212 static struct type
*
1213 m68hc11_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
1217 case HARD_PAGE_REGNUM
:
1220 case HARD_CCR_REGNUM
:
1221 return builtin_type (gdbarch
)->builtin_uint8
;
1223 case M68HC12_HARD_PC_REGNUM
:
1224 return builtin_type (gdbarch
)->builtin_uint32
;
1227 return builtin_type (gdbarch
)->builtin_uint16
;
1232 m68hc11_store_return_value (struct type
*type
, struct regcache
*regcache
,
1233 const gdb_byte
*valbuf
)
1237 len
= TYPE_LENGTH (type
);
1239 /* First argument is passed in D and X registers. */
1241 regcache
->raw_write_part (HARD_D_REGNUM
, 2 - len
, len
, valbuf
);
1244 regcache
->raw_write_part (HARD_X_REGNUM
, 4 - len
, len
- 2, valbuf
);
1245 regcache
->raw_write (HARD_D_REGNUM
, valbuf
+ (len
- 2));
1248 error (_("return of value > 4 is not supported."));
1252 /* Given a return value in `regcache' with a type `type',
1253 extract and copy its value into `valbuf'. */
1256 m68hc11_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1259 gdb_byte buf
[M68HC11_REG_SIZE
];
1261 regcache
->raw_read (HARD_D_REGNUM
, buf
);
1262 switch (TYPE_LENGTH (type
))
1265 memcpy (valbuf
, buf
+ 1, 1);
1269 memcpy (valbuf
, buf
, 2);
1273 memcpy ((char*) valbuf
+ 1, buf
, 2);
1274 regcache
->raw_read (HARD_X_REGNUM
, buf
);
1275 memcpy (valbuf
, buf
+ 1, 1);
1279 memcpy ((char*) valbuf
+ 2, buf
, 2);
1280 regcache
->raw_read (HARD_X_REGNUM
, buf
);
1281 memcpy (valbuf
, buf
, 2);
1285 error (_("bad size for return value"));
1289 static enum return_value_convention
1290 m68hc11_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
1291 struct type
*valtype
, struct regcache
*regcache
,
1292 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1294 if (valtype
->code () == TYPE_CODE_STRUCT
1295 || valtype
->code () == TYPE_CODE_UNION
1296 || valtype
->code () == TYPE_CODE_ARRAY
1297 || TYPE_LENGTH (valtype
) > 4)
1298 return RETURN_VALUE_STRUCT_CONVENTION
;
1301 if (readbuf
!= NULL
)
1302 m68hc11_extract_return_value (valtype
, regcache
, readbuf
);
1303 if (writebuf
!= NULL
)
1304 m68hc11_store_return_value (valtype
, regcache
, writebuf
);
1305 return RETURN_VALUE_REGISTER_CONVENTION
;
1309 /* Test whether the ELF symbol corresponds to a function using rtc or
1313 m68hc11_elf_make_msymbol_special (asymbol
*sym
, struct minimal_symbol
*msym
)
1315 unsigned char flags
;
1317 flags
= ((elf_symbol_type
*)sym
)->internal_elf_sym
.st_other
;
1318 if (flags
& STO_M68HC12_FAR
)
1319 MSYMBOL_SET_RTC (msym
);
1320 if (flags
& STO_M68HC12_INTERRUPT
)
1321 MSYMBOL_SET_RTI (msym
);
1325 /* 68HC11/68HC12 register groups.
1326 Identify real hard registers and soft registers used by gcc. */
1328 static struct reggroup
*m68hc11_soft_reggroup
;
1329 static struct reggroup
*m68hc11_hard_reggroup
;
1332 m68hc11_init_reggroups (void)
1334 m68hc11_hard_reggroup
= reggroup_new ("hard", USER_REGGROUP
);
1335 m68hc11_soft_reggroup
= reggroup_new ("soft", USER_REGGROUP
);
1339 m68hc11_add_reggroups (struct gdbarch
*gdbarch
)
1341 reggroup_add (gdbarch
, m68hc11_hard_reggroup
);
1342 reggroup_add (gdbarch
, m68hc11_soft_reggroup
);
1343 reggroup_add (gdbarch
, general_reggroup
);
1344 reggroup_add (gdbarch
, float_reggroup
);
1345 reggroup_add (gdbarch
, all_reggroup
);
1346 reggroup_add (gdbarch
, save_reggroup
);
1347 reggroup_add (gdbarch
, restore_reggroup
);
1348 reggroup_add (gdbarch
, vector_reggroup
);
1349 reggroup_add (gdbarch
, system_reggroup
);
1353 m68hc11_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1354 struct reggroup
*group
)
1356 /* We must save the real hard register as well as gcc
1357 soft registers including the frame pointer. */
1358 if (group
== save_reggroup
|| group
== restore_reggroup
)
1360 return (regnum
<= gdbarch_num_regs (gdbarch
)
1361 || ((regnum
== SOFT_FP_REGNUM
1362 || regnum
== SOFT_TMP_REGNUM
1363 || regnum
== SOFT_ZS_REGNUM
1364 || regnum
== SOFT_XY_REGNUM
)
1365 && m68hc11_register_name (gdbarch
, regnum
)));
1368 /* Group to identify gcc soft registers (d1..dN). */
1369 if (group
== m68hc11_soft_reggroup
)
1371 return regnum
>= SOFT_D1_REGNUM
1372 && m68hc11_register_name (gdbarch
, regnum
);
1375 if (group
== m68hc11_hard_reggroup
)
1377 return regnum
== HARD_PC_REGNUM
|| regnum
== HARD_SP_REGNUM
1378 || regnum
== HARD_X_REGNUM
|| regnum
== HARD_D_REGNUM
1379 || regnum
== HARD_Y_REGNUM
|| regnum
== HARD_CCR_REGNUM
;
1381 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1384 static struct gdbarch
*
1385 m68hc11_gdbarch_init (struct gdbarch_info info
,
1386 struct gdbarch_list
*arches
)
1388 struct gdbarch
*gdbarch
;
1389 struct gdbarch_tdep
*tdep
;
1392 soft_reg_initialized
= 0;
1394 /* Extract the elf_flags if available. */
1395 if (info
.abfd
!= NULL
1396 && bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1397 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1401 /* Try to find a pre-existing architecture. */
1402 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1404 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1406 if (gdbarch_tdep (arches
->gdbarch
)->elf_flags
!= elf_flags
)
1409 return arches
->gdbarch
;
1412 /* Need a new architecture. Fill in a target specific vector. */
1413 tdep
= XCNEW (struct gdbarch_tdep
);
1414 gdbarch
= gdbarch_alloc (&info
, tdep
);
1415 tdep
->elf_flags
= elf_flags
;
1417 switch (info
.bfd_arch_info
->arch
)
1419 case bfd_arch_m68hc11
:
1420 tdep
->stack_correction
= 1;
1421 tdep
->use_page_register
= 0;
1422 tdep
->prologue
= m6811_prologue
;
1423 set_gdbarch_addr_bit (gdbarch
, 16);
1424 set_gdbarch_num_pseudo_regs (gdbarch
, M68HC11_NUM_PSEUDO_REGS
);
1425 set_gdbarch_pc_regnum (gdbarch
, HARD_PC_REGNUM
);
1426 set_gdbarch_num_regs (gdbarch
, M68HC11_NUM_REGS
);
1429 case bfd_arch_m68hc12
:
1430 tdep
->stack_correction
= 0;
1431 tdep
->use_page_register
= elf_flags
& E_M68HC12_BANKS
;
1432 tdep
->prologue
= m6812_prologue
;
1433 set_gdbarch_addr_bit (gdbarch
, elf_flags
& E_M68HC12_BANKS
? 32 : 16);
1434 set_gdbarch_num_pseudo_regs (gdbarch
,
1435 elf_flags
& E_M68HC12_BANKS
1436 ? M68HC12_NUM_PSEUDO_REGS
1437 : M68HC11_NUM_PSEUDO_REGS
);
1438 set_gdbarch_pc_regnum (gdbarch
, elf_flags
& E_M68HC12_BANKS
1439 ? M68HC12_HARD_PC_REGNUM
: HARD_PC_REGNUM
);
1440 set_gdbarch_num_regs (gdbarch
, elf_flags
& E_M68HC12_BANKS
1441 ? M68HC12_NUM_REGS
: M68HC11_NUM_REGS
);
1448 /* Initially set everything according to the ABI.
1449 Use 16-bit integers since it will be the case for most
1450 programs. The size of these types should normally be set
1451 according to the dwarf2 debug information. */
1452 set_gdbarch_short_bit (gdbarch
, 16);
1453 set_gdbarch_int_bit (gdbarch
, elf_flags
& E_M68HC11_I32
? 32 : 16);
1454 set_gdbarch_float_bit (gdbarch
, 32);
1455 if (elf_flags
& E_M68HC11_F64
)
1457 set_gdbarch_double_bit (gdbarch
, 64);
1458 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
1462 set_gdbarch_double_bit (gdbarch
, 32);
1463 set_gdbarch_double_format (gdbarch
, floatformats_ieee_single
);
1465 set_gdbarch_long_double_bit (gdbarch
, 64);
1466 set_gdbarch_long_bit (gdbarch
, 32);
1467 set_gdbarch_ptr_bit (gdbarch
, 16);
1468 set_gdbarch_long_long_bit (gdbarch
, 64);
1470 /* Characters are unsigned. */
1471 set_gdbarch_char_signed (gdbarch
, 0);
1473 /* Set register info. */
1474 set_gdbarch_fp0_regnum (gdbarch
, -1);
1476 set_gdbarch_sp_regnum (gdbarch
, HARD_SP_REGNUM
);
1477 set_gdbarch_register_name (gdbarch
, m68hc11_register_name
);
1478 set_gdbarch_register_type (gdbarch
, m68hc11_register_type
);
1479 set_gdbarch_pseudo_register_read (gdbarch
, m68hc11_pseudo_register_read
);
1480 set_gdbarch_pseudo_register_write (gdbarch
, m68hc11_pseudo_register_write
);
1482 set_gdbarch_push_dummy_call (gdbarch
, m68hc11_push_dummy_call
);
1484 set_gdbarch_return_value (gdbarch
, m68hc11_return_value
);
1485 set_gdbarch_skip_prologue (gdbarch
, m68hc11_skip_prologue
);
1486 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1487 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
1488 m68hc11_breakpoint::kind_from_pc
);
1489 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
1490 m68hc11_breakpoint::bp_from_kind
);
1492 m68hc11_add_reggroups (gdbarch
);
1493 set_gdbarch_register_reggroup_p (gdbarch
, m68hc11_register_reggroup_p
);
1494 set_gdbarch_print_registers_info (gdbarch
, m68hc11_print_registers_info
);
1496 /* Hook in the DWARF CFI frame unwinder. */
1497 dwarf2_append_unwinders (gdbarch
);
1499 frame_unwind_append_unwinder (gdbarch
, &m68hc11_frame_unwind
);
1500 frame_base_set_default (gdbarch
, &m68hc11_frame_base
);
1502 /* Methods for saving / extracting a dummy frame's ID. The ID's
1503 stack address must match the SP value returned by
1504 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
1505 set_gdbarch_dummy_id (gdbarch
, m68hc11_dummy_id
);
1507 /* Minsymbol frobbing. */
1508 set_gdbarch_elf_make_msymbol_special (gdbarch
,
1509 m68hc11_elf_make_msymbol_special
);
1511 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
1516 void _initialize_m68hc11_tdep ();
1518 _initialize_m68hc11_tdep ()
1520 register_gdbarch_init (bfd_arch_m68hc11
, m68hc11_gdbarch_init
);
1521 register_gdbarch_init (bfd_arch_m68hc12
, m68hc11_gdbarch_init
);
1522 m68hc11_init_reggroups ();