include/ChangeLog

   1 2018-12-07  Nick Clifton  <nickc@redhat.com>
   2
   3         * demangle.h (DMGL_NO_RECURSE_LIMIT): Define.
   4         (DEMANGLE_RECURSION_LIMIT): Define
   5
   6 2018-12-06  Alan Modra  <amodra@gmail.com>
   7
   8         * opcode/ppc.h (E_OPCODE_MASK, E_LI_MASK, E_LI_INSN): Define.
   9
  10 2018-12-06  Andrew Burgess  <andrew.burgess@embecosm.com>
  11
  12         * dis-asm.h (riscv_symbol_is_valid): Declare.
  13         * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
  14         (RISCV_FAKE_LABEL_CHAR): Define.
  15
  16 2018-12-03  Kito Cheng  <kito@andestech.com>
  17
  18         * opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to
  19         unsigned.
  20
  21 2018-11-27  Jim Wilson  <jimw@sifive.com>
  22
  23         * opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
  24         (OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
  25
  26 2018-11-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  27
  28         * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
  29         (ARM_ARCH_V6M_ONLY): Remove.
  30         (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
  31         ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
  32         ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
  33         ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
  34         ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
  35         ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
  36         ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
  37         ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
  38         ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
  39         ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
  40         ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
  41         ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
  42         FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
  43         FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
  44         FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
  45         FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
  46         FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
  47         FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
  48         ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
  49         ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
  50         ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
  51         ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
  52         ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
  53         ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
  54         ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
  55         ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
  56         ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
  57         ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
  58         ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
  59         ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
  60         ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
  61         FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
  62         FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
  63         FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
  64         FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
  65         FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
  66         FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
  67         FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
  68         FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
  69         FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
  70         FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
  71         FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
  72         FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
  73         FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
  74         ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
  75         ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
  76         ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
  77         ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
  78         ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
  79         ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
  80         ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
  81         ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
  82         ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
  83         ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.
  84
  85 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  86
  87         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
  88         (aarch64_insn_class): Add ldstgv_indexed.
  89
  90 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  91
  92         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
  93         and AARCH64_OPND_ADDR_SIMM13.
  94         (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
  95
  96 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  97
  98         * opcode/aarch64.h (aarch64_opnd): Add
  99         AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
 100
 101 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 102
 103         * opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
 104
 105 2018-11-07  Roman Bolshakov <r.bolshakov@yadro.com>
 106             Saagar Jha  <saagar@saagarjha.com>
 107
 108         * mach-o/external.h (mach_o_nversion_min_command_external): Rename
 109         reserved to sdk.
 110         (mach_o_note_command_external): New.
 111         (mach_o_build_version_command_external): New.
 112         * mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
 113         (BFD_MACH_O_LC_NOTE): Define.
 114
 115 2018-11-06  Romain Margheriti  <lilrom13@gmail.com>
 116
 117         PR 23742
 118         * mach-o/loader.h: Add BFD_MACH_O_LC_BUILD_VERSION.
 119
 120 2018-11-06  Sudakshina Das  <sudi.das@arm.com>
 121
 122         * opcode/arm.h (ARM_ARCH_V8_5A): Move ARM_EXT2_PREDRES and
 123         ARM_EXT2_SB to ...
 124         (ARM_AEXT2_V8_5A): Here.
 125
 126 2018-10-26  John Baldwin  <jhb@FreeBSD.org>
 127
 128         * elf/common.h (AT_FREEBSD_HWCAP2): Define.
 129
 130 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 131
 132         * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
 133         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
 134
 135 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 136
 137         * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
 138         (AARCH64_FEATURE_ID_PFR2): New.
 139         (AARCH64_ARCH_V8_5): Add both by default.
 140
 141 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 142
 143         * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
 144         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
 145         (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
 146         (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
 147         define HINT #imm values.
 148         (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
 149
 150 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 151
 152         * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
 153
 154 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 155
 156         * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
 157
 158 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 159
 160         * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
 161         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
 162         (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
 163         (aarch64_sys_regs_sr): Declare new table.
 164
 165 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 166
 167         * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
 168         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
 169
 170 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 171
 172         * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
 173         (AARCH64_FEATURE_FRINTTS): New.
 174         (AARCH64_ARCH_V8_5): Add both by default.
 175
 176 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 177
 178         * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
 179         (AARCH64_ARCH_V8_5): New.
 180
 181 2018-10-08  Alan Modra  <amodra@gmail.com>
 182
 183         * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
 184
 185 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 186
 187         * opcode/arm.h (ARM_EXT2_PREDRES): New.
 188         (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
 189
 190 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 191
 192         * opcode/arm.h (ARM_EXT2_SB): New.
 193         (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
 194
 195 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 196
 197         * opcode/arm.h (ARM_EXT2_V8_5A): New.
 198         (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
 199
 200 2018-10-05  Richard Henderson  <rth@twiddle.net>
 201
 202         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
 203         R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
 204         R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
 205         R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
 206         R_OR1K_SLO13, R_OR1K_PLTA26.
 207
 208 2018-10-05  Richard Henderson  <rth@twiddle.net>
 209
 210         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
 211         R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
 212         R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
 213
 214 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 215
 216         * opcode/aarch64.h (aarch64_inst): Remove.
 217         (enum err_type): Add ERR_VFI.
 218         (aarch64_is_destructive_by_operands): New.
 219         (init_insn_sequence): New.
 220         (aarch64_decode_insn): Remove param name.
 221
 222 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 223
 224         * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
 225         more arguments.
 226
 227 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 228
 229         * opcode/aarch64.h (enum err_type): New.
 230         (aarch64_decode_insn): Use it.
 231
 232 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 233
 234         * opcode/aarch64.h (struct aarch64_instr_sequence): New.
 235         (aarch64_opcode_encode): Use it.
 236
 237 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 238
 239         * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
 240         extend flags field size.
 241         (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
 242
 243 2018-10-03  John Darrington <john@darrington.wattle.id.au>
 244
 245         * dis-asm.h (print_insn_s12z): New declaration.
 246
 247 2018-10-02  Palmer Dabbelt  <palmer@sifive.com>
 248
 249         * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
 250         (MASK_FENCE_TSO): Likewise.
 251
 252 2018-10-01  Cupertino Miranda <cmiranda@synopsys.com>
 253
 254         * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
 255
 256 2018-09-21  H.J. Lu  <hongjiu.lu@intel.com>
 257
 258         PR binutils/23694
 259         * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
 260         include zero size sections at start of PT_NOTE segment.
 261
 262 2018-09-20  Nelson Chu <nelson.chu1990@gmail.com>
 263
 264         * elf/nds32.h: Remove the unused target features.
 265         * dis-asm.h (disassemble_init_nds32): Declared.
 266         * elf/nds32.h (E_NDS32_NULL): Removed.
 267         (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
 268         * opcode/nds32.h: Ident.
 269         (N32_SUB6, INSN_LW): New macros.
 270         (enum n32_opcodes): Updated.
 271         * elf/nds32.h: Doc fixes.
 272         * elf/nds32.h: Add R_NDS32_LSI.
 273         * elf/nds32.h: Add new relocations for TLS.
 274
 275 2018-09-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 276
 277         * elf/common.h (AT_SUN_HWCAP): Rename to ...
 278         (AT_SUN_CAP_HW1): ... this.  Retain old name for backward
 279         compatibility.
 280         (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
 281         (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
 282
 283 2018-09-05  Simon Marchi  <simon.marchi@ericsson.com>
 284
 285         * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
 286
 287 2018-08-31  Alan Modra  <amodra@gmail.com>
 288
 289         * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
 290         (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
 291         (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
 292         (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
 293
 294 2018-08-30  Kito Cheng  <kito@andestech.com>
 295
 296         * opcode/riscv.h (MAX_SUBSET_NUM): New.
 297         (riscv_opcode): Add xlen_requirement field and change type of
 298         subset.
 299
 300 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 301
 302         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
 303         * opcode/mips.h (CPU_XXX): New CPU_GS264E.
 304
 305 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 306
 307         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
 308         * opcode/mips.h (CPU_XXX): New CPU_GS464E.
 309
 310 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 311
 312         * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
 313         E_MIPS_MACH_GS464.
 314         (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
 315         * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
 316         (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
 317         * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
 318
 319 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 320
 321         * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
 322         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
 323         * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
 324
 325 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 326
 327          * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
 328          (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
 329          * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
 330
 331 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 332
 333         * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
 334         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
 335         * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
 336
 337 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 338
 339         * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
 340         (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
 341         (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
 342         (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
 343         (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
 344         (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
 345         (GNU_PROPERTY_X86_UINT32_AND_LO): New.
 346         (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
 347         (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
 348         (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
 349         (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
 350         (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
 351         (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
 352         (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
 353         (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
 354         (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
 355         (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
 356         (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
 357         (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
 358         (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
 359         (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
 360         (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
 361         (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
 362         (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
 363         (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
 364         (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
 365         (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
 366         (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
 367         (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
 368         (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
 369         (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
 370         (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
 371         (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
 372         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
 373         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
 374         (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
 375         (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
 376         (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
 377         (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
 378         (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
 379         (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
 380         (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
 381         (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
 382         (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
 383         (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
 384         (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
 385         (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
 386         (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
 387         (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
 388         (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
 389         (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
 390         (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
 391         (GNU_PROPERTY_X86_ISA_1_USED): Defined to
 392         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
 393         (GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
 394         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
 395
 396 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 397
 398         * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
 399
 400 2018-08-21  John Darrington  <john@darrington.wattle.id.au>
 401
 402         * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
 403
 404 2018-08-21  Alan Modra  <amodra@gmail.com>
 405
 406         * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
 407         Mention use of "extract" function to provide default value.
 408         (PPC_OPERAND_OPTIONAL_VALUE): Delete.
 409         (ppc_optional_operand_value): Rewrite to use extract function.
 410
 411 2018-08-18  John Darrington  <john@darrington.wattle.id.au>
 412
 413         * opcode/s12z.h: New file.
 414
 415 2018-08-09  Richard Earnshaw  <rearnsha@arm.com>
 416
 417         * elf/arm.h: Updated comments for e_flags definitions.
 418
 419 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 420
 421         * elf/arc.h (Tag_ARC_ATR_version): New tag.
 422
 423 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 424
 425         * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
 426
 427 2018-08-01  Richard Earnshaw  <rearnsha@arm.com>
 428
 429         Copy over from GCC
 430         2018-07-26  Martin Liska  <mliska@suse.cz>
 431
 432         PR lto/86548
 433         * libiberty.h (make_temp_file_with_prefix): New function.
 434
 435 2018-07-30  Jim Wilson  <jimw@sifive.com>
 436
 437         * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
 438         (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
 439         (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
 440
 441 2018-07-30  Andrew Jenner  <andrew@codesourcery.com>
 442
 443         * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
 444         * elf/csky.h: New file.
 445
 446 2018-07-27  Chenghua Xu  <paul.hua.gm@gmail.com>
 447             Maciej W. Rozycki  <macro@linux-mips.org>
 448
 449         * elf/mips.h (AFL_ASE_MASK): Correct typo.
 450
 451 2018-07-26  Alex Chadwick  <Alex.Chadwick@cl.cam.ac.uk>
 452
 453         * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
 454
 455 2018-07-26  Alan Modra  <amodra@gmail.com>
 456
 457         * elf/ppc64.h: Specify byte offset to local entry for values
 458         of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
 459         value for such functions when entering via global entry point.
 460         Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
 461
 462 2018-07-24  Alan Modra  <amodra@gmail.com>
 463
 464         PR 23430
 465         * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
 466
 467 2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
 468             Maciej W. Rozycki  <macro@mips.com>
 469
 470         * elf/mips.h (AFL_ASE_MMI): New macro.
 471         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
 472         * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
 473
 474 2018-07-17  Maciej W. Rozycki  <macro@mips.com>
 475
 476         * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
 477
 478 2018-07-06  Alan Modra  <amodra@gmail.com>
 479
 480         * diagnostics.h: Comment on macro usage.
 481
 482 2018-07-05  Simon Marchi  <simon.marchi@polymtl.ca>
 483
 484         * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
 485         Define for clang.
 486
 487 2018-07-02  Maciej W. Rozycki  <macro@mips.com>
 488
 489         PR tdep/8282
 490         * dis-asm.h (disasm_option_arg_t): New typedef.
 491         (disasm_options_and_args_t): Likewise.
 492         (disasm_options_t): Add `arg' member, document members.
 493         (disassembler_options_mips): New prototype.
 494         (disassembler_options_arm, disassembler_options_powerpc)
 495         (disassembler_options_s390): Update prototypes.
 496
 497 2018-06-29  Tamar Christina  <tamar.christina@arm.com>
 498
 499         PR binutils/23192
 500         *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
 501
 502 2018-06-26  Alan Modra  <amodra@gmail.com>
 503
 504         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
 505
 506 2018-06-24  Nick Clifton  <nickc@redhat.com>
 507
 508         2.31 branch created.
 509
 510 2018-06-21  Alan Hayward  <alan.hayward@arm.com>
 511
 512         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
 513         for non SHT_NOBITS.
 514
 515 2018-06-19  Simon Marchi  <simon.marchi@ericsson.com>
 516
 517         Sync with GCC
 518
 519         2018-05-24  Tom Rix  <trix@juniper.net>
 520
 521         * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
 522
 523         2017-11-20  Kito Cheng  <kito.cheng@gmail.com>
 524
 525         * longlong.h [__riscv] (__umulsidi3): Define.
 526         [__riscv] (umul_ppmm): Likewise.
 527         [__riscv] (__muluw3): Likewise.
 528
 529 2018-06-14  Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 530
 531         * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
 532         (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
 533         * opcode/mips.h: Document "+\" operand format.
 534         (ASE_GINV): New macro.
 535
 536 2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
 537             Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 538
 539         * elf/mips.h (AFL_ASE_CRC): New macro.
 540         (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
 541         * opcode/mips.h (ASE_CRC): New macro.
 542         * opcode/mips.h (ASE_CRC64): Likewise.
 543
 544 2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
 545
 546         * elf/xtensa.h (xtensa_read_table_entries)
 547         (xtensa_compute_fill_extra_space): New declarations.
 548
 549 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 550
 551         * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
 552         define for GCC.
 553
 554 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 555
 556         * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
 557         (DIAGNOSTIC_STRINGIFY): Likewise.
 558         (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
 559         (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
 560         (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
 561         (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
 562         (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
 563         (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
 564
 565 2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
 566
 567         * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
 568
 569 2018-05-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 570
 571         * splay-tree.h (splay_tree_compare_strings,
 572         splay_tree_delete_pointers): Declare new utility functions.
 573
 574 2018-05-21  Peter Bergner  <bergner@vnet.ibm.com.com>
 575
 576         * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
 577
 578 2018-05-18  Kito Cheng  <kito.cheng@gmail.com>
 579
 580         * elf/riscv.h (EF_RISCV_RVE): New define.
 581
 582 2018-05-18  John Darrington  <john@darrington.wattle.id.au>
 583
 584         * elf/s12z.h: New header.
 585
 586 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 587
 588         PR binutils/21446
 589         * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
 590
 591 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 592
 593         PR binutils/21446
 594         * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
 595         (aarch64_print_operand): Support notes.
 596
 597 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 598
 599         PR binutils/21446
 600         * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
 601         (aarch64_decode_insn): Accept error struct.
 602
 603 2018-05-15  Francois H. Theron  <francois.theron@netronome.com>
 604
 605         * opcode/nfp.h: Use uint64_t instead of bfd_vma.
 606
 607 2018-05-10  John Darrington  <john@darrington.wattle.id.au>
 608
 609         * elf/common.h (EM_S12Z): New macro.
 610
 611 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 612
 613         * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
 614         Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
 615         (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
 616         MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
 617
 618 2018-05-08  Jim Wilson  <jimw@sifive.com>
 619
 620         * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
 621         (MATCH_C_SRAI64, MASK_C_SRAI64): New.
 622         (MATCH_C_SLLI64, MASK_C_SLLI64): New.
 623
 624 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 625
 626         * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
 627         (vle_num_opcodes): Likewise.
 628         (spe2_num_opcodes): Likewise.
 629
 630 2018-05-04  Alan Modra  <amodra@gmail.com>
 631
 632         * ansidecl.h: Import from gcc.
 633         * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
 634         to s_name.
 635         (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
 636
 637 2018-04-30  Francois H. Theron <francois.theron@netronome.com>
 638
 639         * dis-asm.h: Added print_nfp_disassembler_options prototype.
 640         * elf/common.h: Added EM_NFP, officially assigned. See Google Group
 641         Generic System V Application Binary Interface.
 642         * elf/nfp.h: New, for NFP support.
 643         * opcode/nfp.h: New, for NFP support.
 644
 645 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 646         Mickaël Guêné  <mickael.guene@st.com>
 647
 648         * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
 649         R_ARM_TLS_IE32_FDPIC.
 650
 651 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 652         Mickaël Guêné  <mickael.guene@st.com>
 653
 654         * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
 655         (R_ARM_FUNCDESC)
 656         (R_ARM_FUNCDESC_VALUE): Define new relocations.
 657
 658 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 659         Mickaël Guêné  <mickael.guene@st.com>
 660
 661         * elf/arm.h (EF_ARM_FDPIC): New.
 662
 663 2018-04-18  Alan Modra  <amodra@gmail.com>
 664
 665         * coff/mipspe.h: Delete.
 666
 667 2018-04-18  Alan Modra  <amodra@gmail.com>
 668
 669         * aout/dynix3.h: Delete.
 670
 671 2018-04-17 Andrew Sadek  <andrew.sadek.se@gmail.com>
 672
 673         Microblaze Target: PIC data text relative
 674
 675         * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
 676         * elf/microblaze.h (Add 3 new relocations):
 677         R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
 678         and R_MICROBLAZE_TEXTREL_32_LO for relax function.
 679
 680 2018-04-17  Alan Modra  <amodra@gmail.com>
 681
 682         * elf/i370.h: Revert removal.
 683         * elf/i860.h: Likewise.
 684         * elf/i960.h: Likewise.
 685
 686 2018-04-16  Alan Modra  <amodra@gmail.com>
 687
 688         * coff/sparc.h: Delete.
 689
 690 2018-04-16  Alan Modra  <amodra@gmail.com>
 691
 692         * aout/host.h: Remove m68k-aout and m68k-coff support.
 693         * aout/hp300hpux.h: Delete.
 694         * coff/apollo.h: Delete.
 695         * coff/aux-coff.h: Delete.
 696         * coff/m68k.h: Delete.
 697
 698 2018-04-16  Alan Modra  <amodra@gmail.com>
 699
 700         * dis-asm.h: Remove sh5 and sh64 support.
 701
 702 2018-04-16  Alan Modra  <amodra@gmail.com>
 703
 704         * coff/internal.h: Remove w65 support.
 705         * coff/w65.h: Delete.
 706
 707 2018-04-16  Alan Modra  <amodra@gmail.com>
 708
 709         * coff/we32k.h: Delete.
 710
 711 2018-04-16  Alan Modra  <amodra@gmail.com>
 712
 713         * coff/internal.h: Remove m88k support.
 714         * coff/m88k.h: Delete.
 715         * opcode/m88k.h: Delete.
 716
 717 2018-04-16  Alan Modra  <amodra@gmail.com>
 718
 719         * elf/i370.h: Delete.
 720         * opcode/i370.h: Delete.
 721
 722 2018-04-16  Alan Modra  <amodra@gmail.com>
 723
 724         * coff/h8500.h: Delete.
 725         * coff/internal.h: Remove h8500 support.
 726
 727 2018-04-16  Alan Modra  <amodra@gmail.com>
 728
 729         * coff/h8300.h: Delete.
 730
 731 2018-04-16  Alan Modra  <amodra@gmail.com>
 732
 733         * ieee.h: Delete.
 734
 735 2018-04-16  Alan Modra  <amodra@gmail.com>
 736
 737         * aout/host.h: Remove newsos3 support.
 738
 739 2018-04-16  Alan Modra  <amodra@gmail.com>
 740
 741         * nlm/ChangeLog-9315: Delete.
 742         * nlm/alpha-ext.h: Delete.
 743         * nlm/common.h: Delete.
 744         * nlm/external.h: Delete.
 745         * nlm/i386-ext.h: Delete.
 746         * nlm/internal.h: Delete.
 747         * nlm/ppc-ext.h: Delete.
 748         * nlm/sparc32-ext.h: Delete.
 749
 750 2018-04-16  Alan Modra  <amodra@gmail.com>
 751
 752         * opcode/tahoe.h: Delete.
 753
 754 2018-04-11  Alan Modra  <amodra@gmail.com>
 755
 756         * aout/adobe.h: Delete.
 757         * aout/reloc.h: Delete.
 758         * coff/i860.h: Delete.
 759         * coff/i960.h: Delete.
 760         * elf/i860.h: Delete.
 761         * elf/i960.h: Delete.
 762         * opcode/i860.h: Delete.
 763         * opcode/i960.h: Delete.
 764         * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
 765         * aout/ar.h (ARMAGB): Remove.
 766         * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
 767         union internal_auxent): Remove i960 support.
 768
 769 2018-04-09  Alan Modra  <amodra@gmail.com>
 770
 771         * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
 772         * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
 773
 774 2018-03-28  Renlin Li  <renlin.li@arm.com>
 775
 776         PR ld/22970
 777         * elf/aarch64.h: Add relocation number for
 778         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
 779         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
 780         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
 781         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
 782         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
 783         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
 784         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
 785         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
 786
 787 2018-03-28  Nick Clifton  <nickc@redhat.com>
 788
 789         PR 22988
 790         * opcode/aarch64.h (enum aarch64_opnd): Add
 791         AARCH64_OPND_SVE_ADDR_R.
 792
 793 2018-03-21  H.J. Lu  <hongjiu.lu@intel.com>
 794
 795         * elf/common.h (DF_1_KMOD): New.
 796         (DF_1_WEAKFILTER): Likewise.
 797         (DF_1_NOCOMMON): Likewise.
 798
 799 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
 800
 801         * opcode/riscv.h (OP_MASK_FUNCT3): New.
 802         (OP_SH_FUNCT3): Likewise.
 803         (OP_MASK_FUNCT7): Likewise.
 804         (OP_SH_FUNCT7): Likewise.
 805         (OP_MASK_OP2): Likewise.
 806         (OP_SH_OP2): Likewise.
 807         (OP_MASK_CFUNCT4): Likewise.
 808         (OP_SH_CFUNCT4): Likewise.
 809         (OP_MASK_CFUNCT3): Likewise.
 810         (OP_SH_CFUNCT3): Likewise.
 811         (riscv_insn_types): Likewise.
 812
 813 2018-03-13  Nick Clifton  <nickc@redhat.com>
 814
 815         PR 22113
 816         * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
 817         field.
 818
 819 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 820
 821         * opcode/i386 (OLDGCC_COMPAT): Removed.
 822
 823 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 824
 825         * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
 826
 827 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 828
 829         * opcode/mips.h: Remove `M' operand code.
 830
 831 2018-02-12  Zebediah Figura  <z.figura12@gmail.com>
 832
 833         * coff/msdos.h: New header.
 834         * coff/pe.h: Move common defines to msdos.h.
 835         * coff/powerpc.h: Likewise.
 836
 837 2018-01-13  Nick Clifton  <nickc@redhat.com>
 838
 839         2.30 branch created.
 840
 841 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
 842
 843         PR ld/22393
 844         * bfdlink.h (bfd_link_info): Add separate_code.
 845
 846 2018-01-04  Jim Wilson  <jimw@sifive.com>
 847
 848         * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL.  Rename
 849         DECLARE_CSR entry.  Add alias to map sbadaddr to CSR_STVAL.
 850         (CSR_MBADADDR): Rename to CSR_MTVAL.  Rename DECLARE_CSR entry.
 851         Add alias to map mbadaddr to CSR_MTVAL.
 852
 853 2018-01-03  Alan Modra  <amodra@gmail.com>
 854
 855         Update year range in copyright notice of all files.
 856
 857 For older changes see ChangeLog-2017
 858 \f
 859 Copyright (C) 2018 Free Software Foundation, Inc.
 860
 861 Copying and distribution of this file, with or without modification,
 862 are permitted in any medium without royalty provided the copyright
 863 notice and this notice are preserved.
 864
 865 Local Variables:
 866 mode: change-log
 867 left-margin: 8
 868 fill-column: 74
 869 version-control: never
 870 End: