include/opcode/rl78.h

   1 /* Opcode decoder for the Renesas RL78
   2    Copyright (C) 2011-2015 Free Software Foundation, Inc.
   3    Written by DJ Delorie <dj@redhat.com>
   4
   5    This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
  20    02110-1301, USA.  */
  21
  22 /* The RL78 decoder in libopcodes is used by the simulator, gdb's
  23    analyzer, and the disassembler.  Given an opcode data source, it
  24    decodes the next opcode into the following structures.  */
  25
  26 #ifndef RL78_OPCODES_H_INCLUDED
  27 #define RL78_OPCODES_H_INCLUDED
  28
  29 /* For the purposes of these structures, the RL78 registers are as
  30    follows, despite most of these being memory-mapped and
  31    bank-switched:  */
  32 typedef enum {
  33   RL78_Reg_None,
  34   /* The order of these matches the encodings.  */
  35   RL78_Reg_X,
  36   RL78_Reg_A,
  37   RL78_Reg_C,
  38   RL78_Reg_B,
  39   RL78_Reg_E,
  40   RL78_Reg_D,
  41   RL78_Reg_L,
  42   RL78_Reg_H,
  43   /* The order of these matches the encodings.  */
  44   RL78_Reg_AX,
  45   RL78_Reg_BC,
  46   RL78_Reg_DE,
  47   RL78_Reg_HL,
  48   /* Unordered.  */
  49   RL78_Reg_SP,
  50   RL78_Reg_PSW,
  51   RL78_Reg_CS,
  52   RL78_Reg_ES,
  53   RL78_Reg_PMC,
  54   RL78_Reg_MEM
  55 } RL78_Register;
  56
  57 typedef enum
  58 {
  59   RL78_Byte = 0,
  60   RL78_Word
  61 } RL78_Size;
  62
  63 typedef enum {
  64   RL78_Condition_T,
  65   RL78_Condition_F,
  66   RL78_Condition_C,
  67   RL78_Condition_NC,
  68   RL78_Condition_H,
  69   RL78_Condition_NH,
  70   RL78_Condition_Z,
  71   RL78_Condition_NZ
  72 } RL78_Condition;
  73
  74 typedef enum {
  75   RL78_Operand_None = 0,
  76   RL78_Operand_Immediate,       /* #addend */
  77   RL78_Operand_Register,        /* reg */
  78   RL78_Operand_Indirect,        /* [reg + reg2 + addend] */
  79   RL78_Operand_Bit,             /* reg.bit */
  80   RL78_Operand_BitIndirect,     /* [reg+reg2+addend].bit */
  81   RL78_Operand_PreDec,          /* [--reg] = push */
  82   RL78_Operand_PostInc          /* [reg++] = pop */
  83 } RL78_Operand_Type;
  84
  85 typedef enum
  86 {
  87   RLO_unknown,
  88   RLO_add,                      /* d += s */
  89   RLO_addc,                     /* d += s + CY */
  90   RLO_and,                      /* d &= s (byte, word, bit) */
  91   RLO_branch,                   /* pc = d */
  92   RLO_branch_cond,              /* pc = d if cond(src) */
  93   RLO_branch_cond_clear,        /* pc = d if cond(src), and clear(src) */
  94   RLO_break,                    /* BRK */
  95   RLO_call,                     /* call */
  96   RLO_cmp,                      /* cmp d, s */
  97   RLO_divhu,                    /* DIVHU */
  98   RLO_divwu,                    /* DIVWU */
  99   RLO_halt,                     /* HALT */
 100   RLO_mov,                      /* d = s */
 101   RLO_mach,                     /* MACH */
 102   RLO_machu,                    /* MACHU */
 103   RLO_mulu,                     /* MULU */
 104   RLO_mulh,                     /* MULH */
 105   RLO_mulhu,                    /* MULHU */
 106   RLO_nop,                      /* NOP */
 107   RLO_or,                       /* d |= s */
 108   RLO_ret,                      /* RET */
 109   RLO_reti,                     /* RETI */
 110   RLO_rol,                      /* d <<= s, MSB to LSB and CY */
 111   RLO_rolc,                     /* d <<= s, MSB to CY, CY, to LSB */
 112   RLO_ror,                      /* d >>= s, LSB to MSB and CY */
 113   RLO_rorc,                     /* d >>= s, LSB to CY, CY, to MSB */
 114   RLO_sar,                      /* d >>= s, signed */
 115   RLO_sel,                      /* rb = s */
 116   RLO_shr,                      /* d >>= s, unsigned */
 117   RLO_shl,                      /* d <<= s */
 118   RLO_skip,                     /* skip next insn is cond(s) */
 119   RLO_stop,                     /* STOP */
 120   RLO_sub,                      /* d -= s */
 121   RLO_subc,                     /* d -= s - CY */
 122   RLO_xch,                      /* swap d, s  */
 123   RLO_xor,                      /* d ^= s */
 124 } RL78_Opcode_ID;
 125
 126 typedef struct {
 127   RL78_Operand_Type  type;
 128   int              addend;
 129   RL78_Register    reg : 8;
 130   RL78_Register    reg2 : 8;
 131   unsigned char    bit_number : 4;
 132   unsigned char    condition : 3;
 133   unsigned char    use_es : 1;
 134 } RL78_Opcode_Operand;
 135
 136 /* PSW flag bits */
 137 #define RL78_PSW_IE     0x80
 138 #define RL78_PSW_Z      0x40
 139 #define RL78_PSW_RBS1   0x20
 140 #define RL78_PSW_AC     0x10
 141 #define RL78_PSW_RBS0   0x08
 142 #define RL78_PSW_ISP1   0x04
 143 #define RL78_PSW_ISP0   0x02
 144 #define RL78_PSW_CY     0x01
 145
 146 #define RL78_SFR_SP     0xffff8
 147 #define RL78_SFR_PSW    0xffffa
 148 #define RL78_SFR_CS     0xffffc
 149 #define RL78_SFR_ES     0xffffd
 150 #define RL78_SFR_PMC    0xffffe
 151 #define RL78_SFR_MEM    0xfffff
 152
 153 typedef struct
 154 {
 155   int lineno;
 156   RL78_Opcode_ID        id:24;
 157   unsigned              flags:8; /* PSW mask, for side effects only */
 158   int                   n_bytes;
 159   char *                syntax;
 160   RL78_Size             size;
 161   /* By convention, these are destination, source.  */
 162   RL78_Opcode_Operand   op[2];
 163 } RL78_Opcode_Decoded;
 164
 165 int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *);
 166
 167 #endif