gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / opcodes / bpf-ibld.c
1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for bpf. -*- C -*-
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
6
7 Copyright (C) 1996-2020 Free Software Foundation, Inc.
8
9 This file is part of libopcodes.
10
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
14 any later version.
15
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "bpf-desc.h"
35 #include "bpf-opc.h"
36 #include "cgen/basic-modes.h"
37 #include "opintl.h"
38 #include "safe-ctype.h"
39
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
44
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
47
48 static const char * insert_normal
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54 static int extract_normal
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61 #if CGEN_INT_INSN_P
62 static void put_insn_int_value
63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64 #endif
65 #if ! CGEN_INT_INSN_P
66 static CGEN_INLINE void insert_1
67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE int fill_cache
69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
70 static CGEN_INLINE long extract_1
71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72 #endif
73 \f
74 /* Operand insertion. */
75
76 #if ! CGEN_INT_INSN_P
77
78 /* Subroutine of insert_normal. */
79
80 static CGEN_INLINE void
81 insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
87 {
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102 }
103
104 #endif /* ! CGEN_INT_INSN_P */
105
106 /* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122 static const char *
123 insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
132 {
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
158
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
196
197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208 #if CGEN_INT_INSN_P
209
210 {
211 int shift_within_word, shift_to_word, shift;
212
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
215
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P)
218 shift_within_word = start + 1 - length;
219 else
220 shift_within_word = word_length - start - length;
221
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
225 }
226
227 #else /* ! CGEN_INT_INSN_P */
228
229 {
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
231
232 insert_1 (cd, value, start, length, word_length, bufp);
233 }
234
235 #endif /* ! CGEN_INT_INSN_P */
236
237 return NULL;
238 }
239
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
246
247 static const char *
248 insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
252 bfd_vma pc)
253 {
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
255 unsigned long value;
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
257
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
260
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
263
264 #if CGEN_INT_INSN_P
265
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
268
269 #else
270
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
273 value);
274
275 #endif /* ! CGEN_INT_INSN_P */
276
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
281
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
283 {
284 const char *errmsg;
285
286 if (CGEN_SYNTAX_CHAR_P (* syn))
287 continue;
288
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
290 fields, buffer, pc);
291 if (errmsg)
292 return errmsg;
293 }
294
295 return NULL;
296 }
297
298 #if CGEN_INT_INSN_P
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
301
302 static void
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
305 int length,
306 int insn_length,
307 CGEN_INSN_INT value)
308 {
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
312 *buf = value;
313 else
314 {
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
318
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
320 }
321 }
322 #endif
323 \f
324 /* Operand extraction. */
325
326 #if ! CGEN_INT_INSN_P
327
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
333
334 static CGEN_INLINE int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
337 int offset,
338 int bytes,
339 bfd_vma pc)
340 {
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
343 unsigned int mask;
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
345
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
349 return 1;
350
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
354 break;
355
356 if (bytes)
357 {
358 int status;
359
360 pc += offset;
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
363
364 if (status != 0)
365 {
366 (*info->memory_error_func) (status, pc, info);
367 return 0;
368 }
369
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
371 }
372
373 return 1;
374 }
375
376 /* Subroutine of extract_normal. */
377
378 static CGEN_INLINE long
379 extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
381 int start,
382 int length,
383 int word_length,
384 unsigned char *bufp,
385 bfd_vma pc ATTRIBUTE_UNUSED)
386 {
387 unsigned long x;
388 int shift;
389
390 x = cgen_get_insn_value (cd, bufp, word_length);
391
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
394 else
395 shift = (word_length - (start + length));
396 return x >> shift;
397 }
398
399 #endif /* ! CGEN_INT_INSN_P */
400
401 /* Default extraction routine.
402
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
413
414 Returns 1 for success, 0 for failure. */
415
416 /* ??? The return code isn't properly used. wip. */
417
418 /* ??? This doesn't handle bfd_vma's. Create another function when
419 necessary. */
420
421 static int
422 extract_normal (CGEN_CPU_DESC cd,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO *ex_info,
425 #else
426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
427 #endif
428 CGEN_INSN_INT insn_value,
429 unsigned int attrs,
430 unsigned int word_offset,
431 unsigned int start,
432 unsigned int length,
433 unsigned int word_length,
434 unsigned int total_length,
435 #if ! CGEN_INT_INSN_P
436 bfd_vma pc,
437 #else
438 bfd_vma pc ATTRIBUTE_UNUSED,
439 #endif
440 long *valuep)
441 {
442 long value, mask;
443
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
446 if (length == 0)
447 {
448 *valuep = 0;
449 return 1;
450 }
451
452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
453 abort ();
454
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
458 {
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
461 }
462
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
464
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
466 {
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
469 else
470 value = insn_value >> (total_length - ( word_offset + start + length));
471 }
472
473 #if ! CGEN_INT_INSN_P
474
475 else
476 {
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
478
479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
480 abort ();
481
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
483 {
484 *valuep = 0;
485 return 0;
486 }
487
488 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
489 }
490
491 #endif /* ! CGEN_INT_INSN_P */
492
493 /* Written this way to avoid undefined behaviour. */
494 mask = (((1L << (length - 1)) - 1) << 1) | 1;
495
496 value &= mask;
497 /* sign extend? */
498 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
499 && (value & (1L << (length - 1))))
500 value |= ~mask;
501
502 *valuep = value;
503
504 return 1;
505 }
506
507 /* Default insn extractor.
508
509 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
510 The extracted fields are stored in FIELDS.
511 EX_INFO is used to handle reading variable length insns.
512 Return the length of the insn in bits, or 0 if no match,
513 or -1 if an error occurs fetching data (memory_error_func will have
514 been called). */
515
516 static int
517 extract_insn_normal (CGEN_CPU_DESC cd,
518 const CGEN_INSN *insn,
519 CGEN_EXTRACT_INFO *ex_info,
520 CGEN_INSN_INT insn_value,
521 CGEN_FIELDS *fields,
522 bfd_vma pc)
523 {
524 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
525 const CGEN_SYNTAX_CHAR_TYPE *syn;
526
527 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
528
529 CGEN_INIT_EXTRACT (cd);
530
531 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
532 {
533 int length;
534
535 if (CGEN_SYNTAX_CHAR_P (*syn))
536 continue;
537
538 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
539 ex_info, insn_value, fields, pc);
540 if (length <= 0)
541 return length;
542 }
543
544 /* We recognized and successfully extracted this insn. */
545 return CGEN_INSN_BITSIZE (insn);
546 }
547 \f
548 /* Machine generated code added here. */
549
550 const char * bpf_cgen_insert_operand
551 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
552
553 /* Main entry point for operand insertion.
554
555 This function is basically just a big switch statement. Earlier versions
556 used tables to look up the function to use, but
557 - if the table contains both assembler and disassembler functions then
558 the disassembler contains much of the assembler and vice-versa,
559 - there's a lot of inlining possibilities as things grow,
560 - using a switch statement avoids the function call overhead.
561
562 This function could be moved into `parse_insn_normal', but keeping it
563 separate makes clear the interface between `parse_insn_normal' and each of
564 the handlers. It's also needed by GAS to insert operands that couldn't be
565 resolved during parsing. */
566
567 const char *
568 bpf_cgen_insert_operand (CGEN_CPU_DESC cd,
569 int opindex,
570 CGEN_FIELDS * fields,
571 CGEN_INSN_BYTES_PTR buffer,
572 bfd_vma pc ATTRIBUTE_UNUSED)
573 {
574 const char * errmsg = NULL;
575 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
576
577 switch (opindex)
578 {
579 case BPF_OPERAND_DISP16 :
580 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_SIGNED), 16, 15, 16, 16, total_length, buffer);
581 break;
582 case BPF_OPERAND_DISP32 :
583 errmsg = insert_normal (cd, fields->f_imm32, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, buffer);
584 break;
585 case BPF_OPERAND_DSTBE :
586 errmsg = insert_normal (cd, fields->f_dstbe, 0, 8, 7, 4, 8, total_length, buffer);
587 break;
588 case BPF_OPERAND_DSTLE :
589 errmsg = insert_normal (cd, fields->f_dstle, 0, 8, 3, 4, 8, total_length, buffer);
590 break;
591 case BPF_OPERAND_ENDSIZE :
592 errmsg = insert_normal (cd, fields->f_imm32, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, buffer);
593 break;
594 case BPF_OPERAND_IMM32 :
595 errmsg = insert_normal (cd, fields->f_imm32, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, buffer);
596 break;
597 case BPF_OPERAND_IMM64 :
598 {
599 {
600 FLD (f_imm64_b) = 0;
601 FLD (f_imm64_c) = ((UDI) (FLD (f_imm64)) >> (32));
602 FLD (f_imm64_a) = ((FLD (f_imm64)) & (MAKEDI (0, 0xffffffff)));
603 }
604 errmsg = insert_normal (cd, fields->f_imm64_a, 0, 32, 31, 32, 32, total_length, buffer);
605 if (errmsg)
606 break;
607 errmsg = insert_normal (cd, fields->f_imm64_b, 0, 64, 31, 32, 32, total_length, buffer);
608 if (errmsg)
609 break;
610 errmsg = insert_normal (cd, fields->f_imm64_c, 0, 96, 31, 32, 32, total_length, buffer);
611 if (errmsg)
612 break;
613 }
614 break;
615 case BPF_OPERAND_OFFSET16 :
616 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_SIGNED), 16, 15, 16, 16, total_length, buffer);
617 break;
618 case BPF_OPERAND_SRCBE :
619 errmsg = insert_normal (cd, fields->f_srcbe, 0, 8, 3, 4, 8, total_length, buffer);
620 break;
621 case BPF_OPERAND_SRCLE :
622 errmsg = insert_normal (cd, fields->f_srcle, 0, 8, 7, 4, 8, total_length, buffer);
623 break;
624
625 default :
626 /* xgettext:c-format */
627 opcodes_error_handler
628 (_("internal error: unrecognized field %d while building insn"),
629 opindex);
630 abort ();
631 }
632
633 return errmsg;
634 }
635
636 int bpf_cgen_extract_operand
637 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
638
639 /* Main entry point for operand extraction.
640 The result is <= 0 for error, >0 for success.
641 ??? Actual values aren't well defined right now.
642
643 This function is basically just a big switch statement. Earlier versions
644 used tables to look up the function to use, but
645 - if the table contains both assembler and disassembler functions then
646 the disassembler contains much of the assembler and vice-versa,
647 - there's a lot of inlining possibilities as things grow,
648 - using a switch statement avoids the function call overhead.
649
650 This function could be moved into `print_insn_normal', but keeping it
651 separate makes clear the interface between `print_insn_normal' and each of
652 the handlers. */
653
654 int
655 bpf_cgen_extract_operand (CGEN_CPU_DESC cd,
656 int opindex,
657 CGEN_EXTRACT_INFO *ex_info,
658 CGEN_INSN_INT insn_value,
659 CGEN_FIELDS * fields,
660 bfd_vma pc)
661 {
662 /* Assume success (for those operands that are nops). */
663 int length = 1;
664 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
665
666 switch (opindex)
667 {
668 case BPF_OPERAND_DISP16 :
669 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 16, 15, 16, 16, total_length, pc, & fields->f_offset16);
670 break;
671 case BPF_OPERAND_DISP32 :
672 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, pc, & fields->f_imm32);
673 break;
674 case BPF_OPERAND_DSTBE :
675 length = extract_normal (cd, ex_info, insn_value, 0, 8, 7, 4, 8, total_length, pc, & fields->f_dstbe);
676 break;
677 case BPF_OPERAND_DSTLE :
678 length = extract_normal (cd, ex_info, insn_value, 0, 8, 3, 4, 8, total_length, pc, & fields->f_dstle);
679 break;
680 case BPF_OPERAND_ENDSIZE :
681 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, pc, & fields->f_imm32);
682 break;
683 case BPF_OPERAND_IMM32 :
684 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, pc, & fields->f_imm32);
685 break;
686 case BPF_OPERAND_IMM64 :
687 {
688 length = extract_normal (cd, ex_info, insn_value, 0, 32, 31, 32, 32, total_length, pc, & fields->f_imm64_a);
689 if (length <= 0) break;
690 length = extract_normal (cd, ex_info, insn_value, 0, 64, 31, 32, 32, total_length, pc, & fields->f_imm64_b);
691 if (length <= 0) break;
692 length = extract_normal (cd, ex_info, insn_value, 0, 96, 31, 32, 32, total_length, pc, & fields->f_imm64_c);
693 if (length <= 0) break;
694 {
695 FLD (f_imm64) = ((((((UDI) (UINT) (FLD (f_imm64_c)))) << (32))) | (((UDI) (UINT) (FLD (f_imm64_a)))));
696 }
697 }
698 break;
699 case BPF_OPERAND_OFFSET16 :
700 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 16, 15, 16, 16, total_length, pc, & fields->f_offset16);
701 break;
702 case BPF_OPERAND_SRCBE :
703 length = extract_normal (cd, ex_info, insn_value, 0, 8, 3, 4, 8, total_length, pc, & fields->f_srcbe);
704 break;
705 case BPF_OPERAND_SRCLE :
706 length = extract_normal (cd, ex_info, insn_value, 0, 8, 7, 4, 8, total_length, pc, & fields->f_srcle);
707 break;
708
709 default :
710 /* xgettext:c-format */
711 opcodes_error_handler
712 (_("internal error: unrecognized field %d while decoding insn"),
713 opindex);
714 abort ();
715 }
716
717 return length;
718 }
719
720 cgen_insert_fn * const bpf_cgen_insert_handlers[] =
721 {
722 insert_insn_normal,
723 };
724
725 cgen_extract_fn * const bpf_cgen_extract_handlers[] =
726 {
727 extract_insn_normal,
728 };
729
730 int bpf_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
731 bfd_vma bpf_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
732
733 /* Getting values from cgen_fields is handled by a collection of functions.
734 They are distinguished by the type of the VALUE argument they return.
735 TODO: floating point, inlining support, remove cases where result type
736 not appropriate. */
737
738 int
739 bpf_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
740 int opindex,
741 const CGEN_FIELDS * fields)
742 {
743 int value;
744
745 switch (opindex)
746 {
747 case BPF_OPERAND_DISP16 :
748 value = fields->f_offset16;
749 break;
750 case BPF_OPERAND_DISP32 :
751 value = fields->f_imm32;
752 break;
753 case BPF_OPERAND_DSTBE :
754 value = fields->f_dstbe;
755 break;
756 case BPF_OPERAND_DSTLE :
757 value = fields->f_dstle;
758 break;
759 case BPF_OPERAND_ENDSIZE :
760 value = fields->f_imm32;
761 break;
762 case BPF_OPERAND_IMM32 :
763 value = fields->f_imm32;
764 break;
765 case BPF_OPERAND_IMM64 :
766 value = fields->f_imm64;
767 break;
768 case BPF_OPERAND_OFFSET16 :
769 value = fields->f_offset16;
770 break;
771 case BPF_OPERAND_SRCBE :
772 value = fields->f_srcbe;
773 break;
774 case BPF_OPERAND_SRCLE :
775 value = fields->f_srcle;
776 break;
777
778 default :
779 /* xgettext:c-format */
780 opcodes_error_handler
781 (_("internal error: unrecognized field %d while getting int operand"),
782 opindex);
783 abort ();
784 }
785
786 return value;
787 }
788
789 bfd_vma
790 bpf_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
791 int opindex,
792 const CGEN_FIELDS * fields)
793 {
794 bfd_vma value;
795
796 switch (opindex)
797 {
798 case BPF_OPERAND_DISP16 :
799 value = fields->f_offset16;
800 break;
801 case BPF_OPERAND_DISP32 :
802 value = fields->f_imm32;
803 break;
804 case BPF_OPERAND_DSTBE :
805 value = fields->f_dstbe;
806 break;
807 case BPF_OPERAND_DSTLE :
808 value = fields->f_dstle;
809 break;
810 case BPF_OPERAND_ENDSIZE :
811 value = fields->f_imm32;
812 break;
813 case BPF_OPERAND_IMM32 :
814 value = fields->f_imm32;
815 break;
816 case BPF_OPERAND_IMM64 :
817 value = fields->f_imm64;
818 break;
819 case BPF_OPERAND_OFFSET16 :
820 value = fields->f_offset16;
821 break;
822 case BPF_OPERAND_SRCBE :
823 value = fields->f_srcbe;
824 break;
825 case BPF_OPERAND_SRCLE :
826 value = fields->f_srcle;
827 break;
828
829 default :
830 /* xgettext:c-format */
831 opcodes_error_handler
832 (_("internal error: unrecognized field %d while getting vma operand"),
833 opindex);
834 abort ();
835 }
836
837 return value;
838 }
839
840 void bpf_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
841 void bpf_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
842
843 /* Stuffing values in cgen_fields is handled by a collection of functions.
844 They are distinguished by the type of the VALUE argument they accept.
845 TODO: floating point, inlining support, remove cases where argument type
846 not appropriate. */
847
848 void
849 bpf_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
850 int opindex,
851 CGEN_FIELDS * fields,
852 int value)
853 {
854 switch (opindex)
855 {
856 case BPF_OPERAND_DISP16 :
857 fields->f_offset16 = value;
858 break;
859 case BPF_OPERAND_DISP32 :
860 fields->f_imm32 = value;
861 break;
862 case BPF_OPERAND_DSTBE :
863 fields->f_dstbe = value;
864 break;
865 case BPF_OPERAND_DSTLE :
866 fields->f_dstle = value;
867 break;
868 case BPF_OPERAND_ENDSIZE :
869 fields->f_imm32 = value;
870 break;
871 case BPF_OPERAND_IMM32 :
872 fields->f_imm32 = value;
873 break;
874 case BPF_OPERAND_IMM64 :
875 fields->f_imm64 = value;
876 break;
877 case BPF_OPERAND_OFFSET16 :
878 fields->f_offset16 = value;
879 break;
880 case BPF_OPERAND_SRCBE :
881 fields->f_srcbe = value;
882 break;
883 case BPF_OPERAND_SRCLE :
884 fields->f_srcle = value;
885 break;
886
887 default :
888 /* xgettext:c-format */
889 opcodes_error_handler
890 (_("internal error: unrecognized field %d while setting int operand"),
891 opindex);
892 abort ();
893 }
894 }
895
896 void
897 bpf_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
898 int opindex,
899 CGEN_FIELDS * fields,
900 bfd_vma value)
901 {
902 switch (opindex)
903 {
904 case BPF_OPERAND_DISP16 :
905 fields->f_offset16 = value;
906 break;
907 case BPF_OPERAND_DISP32 :
908 fields->f_imm32 = value;
909 break;
910 case BPF_OPERAND_DSTBE :
911 fields->f_dstbe = value;
912 break;
913 case BPF_OPERAND_DSTLE :
914 fields->f_dstle = value;
915 break;
916 case BPF_OPERAND_ENDSIZE :
917 fields->f_imm32 = value;
918 break;
919 case BPF_OPERAND_IMM32 :
920 fields->f_imm32 = value;
921 break;
922 case BPF_OPERAND_IMM64 :
923 fields->f_imm64 = value;
924 break;
925 case BPF_OPERAND_OFFSET16 :
926 fields->f_offset16 = value;
927 break;
928 case BPF_OPERAND_SRCBE :
929 fields->f_srcbe = value;
930 break;
931 case BPF_OPERAND_SRCLE :
932 fields->f_srcle = value;
933 break;
934
935 default :
936 /* xgettext:c-format */
937 opcodes_error_handler
938 (_("internal error: unrecognized field %d while setting vma operand"),
939 opindex);
940 abort ();
941 }
942 }
943
944 /* Function to call before using the instruction builder tables. */
945
946 void
947 bpf_cgen_init_ibld_table (CGEN_CPU_DESC cd)
948 {
949 cd->insert_handlers = & bpf_cgen_insert_handlers[0];
950 cd->extract_handlers = & bpf_cgen_extract_handlers[0];
951
952 cd->insert_operand = bpf_cgen_insert_operand;
953 cd->extract_operand = bpf_cgen_extract_operand;
954
955 cd->get_int_operand = bpf_cgen_get_int_operand;
956 cd->set_int_operand = bpf_cgen_set_int_operand;
957 cd->get_vma_operand = bpf_cgen_get_vma_operand;
958 cd->set_vma_operand = bpf_cgen_set_vma_operand;
959 }
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