gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / opcodes / fr30-opc.c
1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction opcode table for fr30.
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5
6 Copyright (C) 1996-2020 Free Software Foundation, Inc.
7
8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
19
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
23
24 */
25
26 #include "sysdep.h"
27 #include "ansidecl.h"
28 #include "bfd.h"
29 #include "symcat.h"
30 #include "fr30-desc.h"
31 #include "fr30-opc.h"
32 #include "libiberty.h"
33
34 /* The hash functions are recorded here to help keep assembler code out of
35 the disassembler and vice versa. */
36
37 static int asm_hash_insn_p (const CGEN_INSN *);
38 static unsigned int asm_hash_insn (const char *);
39 static int dis_hash_insn_p (const CGEN_INSN *);
40 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
41
42 /* Instruction formats. */
43
44 #define F(f) & fr30_cgen_ifld_table[FR30_##f]
45 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
46 0, 0, 0x0, { { 0 } }
47 };
48
49 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
50 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RJ) }, { F (F_RI) }, { 0 } }
51 };
52
53 static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = {
54 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U4) }, { F (F_RI) }, { 0 } }
55 };
56
57 static const CGEN_IFMT ifmt_add2 ATTRIBUTE_UNUSED = {
58 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_M4) }, { F (F_RI) }, { 0 } }
59 };
60
61 static const CGEN_IFMT ifmt_div0s ATTRIBUTE_UNUSED = {
62 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { 0 } }
63 };
64
65 static const CGEN_IFMT ifmt_div3 ATTRIBUTE_UNUSED = {
66 16, 16, 0xffff, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_OP4) }, { 0 } }
67 };
68
69 static const CGEN_IFMT ifmt_ldi8 ATTRIBUTE_UNUSED = {
70 16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
71 };
72
73 static const CGEN_IFMT ifmt_ldi20 ATTRIBUTE_UNUSED = {
74 16, 32, 0xff00, { { F (F_OP1) }, { F (F_I20) }, { F (F_OP2) }, { F (F_RI) }, { 0 } }
75 };
76
77 static const CGEN_IFMT ifmt_ldi32 ATTRIBUTE_UNUSED = {
78 16, 48, 0xfff0, { { F (F_OP1) }, { F (F_I32) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { 0 } }
79 };
80
81 static const CGEN_IFMT ifmt_ldr14 ATTRIBUTE_UNUSED = {
82 16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP10) }, { F (F_RI) }, { 0 } }
83 };
84
85 static const CGEN_IFMT ifmt_ldr14uh ATTRIBUTE_UNUSED = {
86 16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP9) }, { F (F_RI) }, { 0 } }
87 };
88
89 static const CGEN_IFMT ifmt_ldr14ub ATTRIBUTE_UNUSED = {
90 16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP8) }, { F (F_RI) }, { 0 } }
91 };
92
93 static const CGEN_IFMT ifmt_ldr15 ATTRIBUTE_UNUSED = {
94 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_UDISP6) }, { F (F_RI) }, { 0 } }
95 };
96
97 static const CGEN_IFMT ifmt_ldr15dr ATTRIBUTE_UNUSED = {
98 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RS2) }, { 0 } }
99 };
100
101 static const CGEN_IFMT ifmt_movdr ATTRIBUTE_UNUSED = {
102 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS1) }, { F (F_RI) }, { 0 } }
103 };
104
105 static const CGEN_IFMT ifmt_call ATTRIBUTE_UNUSED = {
106 16, 16, 0xf800, { { F (F_OP1) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
107 };
108
109 static const CGEN_IFMT ifmt_int ATTRIBUTE_UNUSED = {
110 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U8) }, { 0 } }
111 };
112
113 static const CGEN_IFMT ifmt_brad ATTRIBUTE_UNUSED = {
114 16, 16, 0xff00, { { F (F_OP1) }, { F (F_CC) }, { F (F_REL9) }, { 0 } }
115 };
116
117 static const CGEN_IFMT ifmt_dmovr13 ATTRIBUTE_UNUSED = {
118 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR10) }, { 0 } }
119 };
120
121 static const CGEN_IFMT ifmt_dmovr13h ATTRIBUTE_UNUSED = {
122 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR9) }, { 0 } }
123 };
124
125 static const CGEN_IFMT ifmt_dmovr13b ATTRIBUTE_UNUSED = {
126 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR8) }, { 0 } }
127 };
128
129 static const CGEN_IFMT ifmt_copop ATTRIBUTE_UNUSED = {
130 16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_CRJ) }, { F (F_U4C) }, { F (F_CRI) }, { 0 } }
131 };
132
133 static const CGEN_IFMT ifmt_copld ATTRIBUTE_UNUSED = {
134 16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RJC) }, { F (F_U4C) }, { F (F_CRI) }, { 0 } }
135 };
136
137 static const CGEN_IFMT ifmt_copst ATTRIBUTE_UNUSED = {
138 16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_CRJ) }, { F (F_U4C) }, { F (F_RIC) }, { 0 } }
139 };
140
141 static const CGEN_IFMT ifmt_addsp ATTRIBUTE_UNUSED = {
142 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_S10) }, { 0 } }
143 };
144
145 static const CGEN_IFMT ifmt_ldm0 ATTRIBUTE_UNUSED = {
146 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_LOW_LD) }, { 0 } }
147 };
148
149 static const CGEN_IFMT ifmt_ldm1 ATTRIBUTE_UNUSED = {
150 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_HI_LD) }, { 0 } }
151 };
152
153 static const CGEN_IFMT ifmt_stm0 ATTRIBUTE_UNUSED = {
154 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_LOW_ST) }, { 0 } }
155 };
156
157 static const CGEN_IFMT ifmt_stm1 ATTRIBUTE_UNUSED = {
158 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_HI_ST) }, { 0 } }
159 };
160
161 static const CGEN_IFMT ifmt_enter ATTRIBUTE_UNUSED = {
162 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U10) }, { 0 } }
163 };
164
165 #undef F
166
167 #define A(a) (1 << CGEN_INSN_##a)
168 #define OPERAND(op) FR30_OPERAND_##op
169 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
170 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
171
172 /* The instruction table. */
173
174 static const CGEN_OPCODE fr30_cgen_insn_opcode_table[MAX_INSNS] =
175 {
176 /* Special null first entry.
177 A `num' value of zero is thus invalid.
178 Also, the special `invalid' insn resides here. */
179 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
180 /* add $Rj,$Ri */
181 {
182 { 0, 0, 0, 0 },
183 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
184 & ifmt_add, { 0xa600 }
185 },
186 /* add $u4,$Ri */
187 {
188 { 0, 0, 0, 0 },
189 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
190 & ifmt_addi, { 0xa400 }
191 },
192 /* add2 $m4,$Ri */
193 {
194 { 0, 0, 0, 0 },
195 { { MNEM, ' ', OP (M4), ',', OP (RI), 0 } },
196 & ifmt_add2, { 0xa500 }
197 },
198 /* addc $Rj,$Ri */
199 {
200 { 0, 0, 0, 0 },
201 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
202 & ifmt_add, { 0xa700 }
203 },
204 /* addn $Rj,$Ri */
205 {
206 { 0, 0, 0, 0 },
207 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
208 & ifmt_add, { 0xa200 }
209 },
210 /* addn $u4,$Ri */
211 {
212 { 0, 0, 0, 0 },
213 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
214 & ifmt_addi, { 0xa000 }
215 },
216 /* addn2 $m4,$Ri */
217 {
218 { 0, 0, 0, 0 },
219 { { MNEM, ' ', OP (M4), ',', OP (RI), 0 } },
220 & ifmt_add2, { 0xa100 }
221 },
222 /* sub $Rj,$Ri */
223 {
224 { 0, 0, 0, 0 },
225 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
226 & ifmt_add, { 0xac00 }
227 },
228 /* subc $Rj,$Ri */
229 {
230 { 0, 0, 0, 0 },
231 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
232 & ifmt_add, { 0xad00 }
233 },
234 /* subn $Rj,$Ri */
235 {
236 { 0, 0, 0, 0 },
237 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
238 & ifmt_add, { 0xae00 }
239 },
240 /* cmp $Rj,$Ri */
241 {
242 { 0, 0, 0, 0 },
243 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
244 & ifmt_add, { 0xaa00 }
245 },
246 /* cmp $u4,$Ri */
247 {
248 { 0, 0, 0, 0 },
249 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
250 & ifmt_addi, { 0xa800 }
251 },
252 /* cmp2 $m4,$Ri */
253 {
254 { 0, 0, 0, 0 },
255 { { MNEM, ' ', OP (M4), ',', OP (RI), 0 } },
256 & ifmt_add2, { 0xa900 }
257 },
258 /* and $Rj,$Ri */
259 {
260 { 0, 0, 0, 0 },
261 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
262 & ifmt_add, { 0x8200 }
263 },
264 /* or $Rj,$Ri */
265 {
266 { 0, 0, 0, 0 },
267 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
268 & ifmt_add, { 0x9200 }
269 },
270 /* eor $Rj,$Ri */
271 {
272 { 0, 0, 0, 0 },
273 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
274 & ifmt_add, { 0x9a00 }
275 },
276 /* and $Rj,@$Ri */
277 {
278 { 0, 0, 0, 0 },
279 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
280 & ifmt_add, { 0x8400 }
281 },
282 /* andh $Rj,@$Ri */
283 {
284 { 0, 0, 0, 0 },
285 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
286 & ifmt_add, { 0x8500 }
287 },
288 /* andb $Rj,@$Ri */
289 {
290 { 0, 0, 0, 0 },
291 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
292 & ifmt_add, { 0x8600 }
293 },
294 /* or $Rj,@$Ri */
295 {
296 { 0, 0, 0, 0 },
297 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
298 & ifmt_add, { 0x9400 }
299 },
300 /* orh $Rj,@$Ri */
301 {
302 { 0, 0, 0, 0 },
303 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
304 & ifmt_add, { 0x9500 }
305 },
306 /* orb $Rj,@$Ri */
307 {
308 { 0, 0, 0, 0 },
309 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
310 & ifmt_add, { 0x9600 }
311 },
312 /* eor $Rj,@$Ri */
313 {
314 { 0, 0, 0, 0 },
315 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
316 & ifmt_add, { 0x9c00 }
317 },
318 /* eorh $Rj,@$Ri */
319 {
320 { 0, 0, 0, 0 },
321 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
322 & ifmt_add, { 0x9d00 }
323 },
324 /* eorb $Rj,@$Ri */
325 {
326 { 0, 0, 0, 0 },
327 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
328 & ifmt_add, { 0x9e00 }
329 },
330 /* bandl $u4,@$Ri */
331 {
332 { 0, 0, 0, 0 },
333 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
334 & ifmt_addi, { 0x8000 }
335 },
336 /* borl $u4,@$Ri */
337 {
338 { 0, 0, 0, 0 },
339 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
340 & ifmt_addi, { 0x9000 }
341 },
342 /* beorl $u4,@$Ri */
343 {
344 { 0, 0, 0, 0 },
345 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
346 & ifmt_addi, { 0x9800 }
347 },
348 /* bandh $u4,@$Ri */
349 {
350 { 0, 0, 0, 0 },
351 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
352 & ifmt_addi, { 0x8100 }
353 },
354 /* borh $u4,@$Ri */
355 {
356 { 0, 0, 0, 0 },
357 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
358 & ifmt_addi, { 0x9100 }
359 },
360 /* beorh $u4,@$Ri */
361 {
362 { 0, 0, 0, 0 },
363 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
364 & ifmt_addi, { 0x9900 }
365 },
366 /* btstl $u4,@$Ri */
367 {
368 { 0, 0, 0, 0 },
369 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
370 & ifmt_addi, { 0x8800 }
371 },
372 /* btsth $u4,@$Ri */
373 {
374 { 0, 0, 0, 0 },
375 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
376 & ifmt_addi, { 0x8900 }
377 },
378 /* mul $Rj,$Ri */
379 {
380 { 0, 0, 0, 0 },
381 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
382 & ifmt_add, { 0xaf00 }
383 },
384 /* mulu $Rj,$Ri */
385 {
386 { 0, 0, 0, 0 },
387 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
388 & ifmt_add, { 0xab00 }
389 },
390 /* mulh $Rj,$Ri */
391 {
392 { 0, 0, 0, 0 },
393 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
394 & ifmt_add, { 0xbf00 }
395 },
396 /* muluh $Rj,$Ri */
397 {
398 { 0, 0, 0, 0 },
399 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
400 & ifmt_add, { 0xbb00 }
401 },
402 /* div0s $Ri */
403 {
404 { 0, 0, 0, 0 },
405 { { MNEM, ' ', OP (RI), 0 } },
406 & ifmt_div0s, { 0x9740 }
407 },
408 /* div0u $Ri */
409 {
410 { 0, 0, 0, 0 },
411 { { MNEM, ' ', OP (RI), 0 } },
412 & ifmt_div0s, { 0x9750 }
413 },
414 /* div1 $Ri */
415 {
416 { 0, 0, 0, 0 },
417 { { MNEM, ' ', OP (RI), 0 } },
418 & ifmt_div0s, { 0x9760 }
419 },
420 /* div2 $Ri */
421 {
422 { 0, 0, 0, 0 },
423 { { MNEM, ' ', OP (RI), 0 } },
424 & ifmt_div0s, { 0x9770 }
425 },
426 /* div3 */
427 {
428 { 0, 0, 0, 0 },
429 { { MNEM, 0 } },
430 & ifmt_div3, { 0x9f60 }
431 },
432 /* div4s */
433 {
434 { 0, 0, 0, 0 },
435 { { MNEM, 0 } },
436 & ifmt_div3, { 0x9f70 }
437 },
438 /* lsl $Rj,$Ri */
439 {
440 { 0, 0, 0, 0 },
441 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
442 & ifmt_add, { 0xb600 }
443 },
444 /* lsl $u4,$Ri */
445 {
446 { 0, 0, 0, 0 },
447 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
448 & ifmt_addi, { 0xb400 }
449 },
450 /* lsl2 $u4,$Ri */
451 {
452 { 0, 0, 0, 0 },
453 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
454 & ifmt_addi, { 0xb500 }
455 },
456 /* lsr $Rj,$Ri */
457 {
458 { 0, 0, 0, 0 },
459 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
460 & ifmt_add, { 0xb200 }
461 },
462 /* lsr $u4,$Ri */
463 {
464 { 0, 0, 0, 0 },
465 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
466 & ifmt_addi, { 0xb000 }
467 },
468 /* lsr2 $u4,$Ri */
469 {
470 { 0, 0, 0, 0 },
471 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
472 & ifmt_addi, { 0xb100 }
473 },
474 /* asr $Rj,$Ri */
475 {
476 { 0, 0, 0, 0 },
477 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
478 & ifmt_add, { 0xba00 }
479 },
480 /* asr $u4,$Ri */
481 {
482 { 0, 0, 0, 0 },
483 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
484 & ifmt_addi, { 0xb800 }
485 },
486 /* asr2 $u4,$Ri */
487 {
488 { 0, 0, 0, 0 },
489 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
490 & ifmt_addi, { 0xb900 }
491 },
492 /* ldi:8 $i8,$Ri */
493 {
494 { 0, 0, 0, 0 },
495 { { MNEM, ' ', OP (I8), ',', OP (RI), 0 } },
496 & ifmt_ldi8, { 0xc000 }
497 },
498 /* ldi:20 $i20,$Ri */
499 {
500 { 0, 0, 0, 0 },
501 { { MNEM, ' ', OP (I20), ',', OP (RI), 0 } },
502 & ifmt_ldi20, { 0x9b00 }
503 },
504 /* ldi:32 $i32,$Ri */
505 {
506 { 0, 0, 0, 0 },
507 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
508 & ifmt_ldi32, { 0x9f80 }
509 },
510 /* ld @$Rj,$Ri */
511 {
512 { 0, 0, 0, 0 },
513 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
514 & ifmt_add, { 0x400 }
515 },
516 /* lduh @$Rj,$Ri */
517 {
518 { 0, 0, 0, 0 },
519 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
520 & ifmt_add, { 0x500 }
521 },
522 /* ldub @$Rj,$Ri */
523 {
524 { 0, 0, 0, 0 },
525 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
526 & ifmt_add, { 0x600 }
527 },
528 /* ld @($R13,$Rj),$Ri */
529 {
530 { 0, 0, 0, 0 },
531 { { MNEM, ' ', '@', '(', OP (R13), ',', OP (RJ), ')', ',', OP (RI), 0 } },
532 & ifmt_add, { 0x0 }
533 },
534 /* lduh @($R13,$Rj),$Ri */
535 {
536 { 0, 0, 0, 0 },
537 { { MNEM, ' ', '@', '(', OP (R13), ',', OP (RJ), ')', ',', OP (RI), 0 } },
538 & ifmt_add, { 0x100 }
539 },
540 /* ldub @($R13,$Rj),$Ri */
541 {
542 { 0, 0, 0, 0 },
543 { { MNEM, ' ', '@', '(', OP (R13), ',', OP (RJ), ')', ',', OP (RI), 0 } },
544 & ifmt_add, { 0x200 }
545 },
546 /* ld @($R14,$disp10),$Ri */
547 {
548 { 0, 0, 0, 0 },
549 { { MNEM, ' ', '@', '(', OP (R14), ',', OP (DISP10), ')', ',', OP (RI), 0 } },
550 & ifmt_ldr14, { 0x2000 }
551 },
552 /* lduh @($R14,$disp9),$Ri */
553 {
554 { 0, 0, 0, 0 },
555 { { MNEM, ' ', '@', '(', OP (R14), ',', OP (DISP9), ')', ',', OP (RI), 0 } },
556 & ifmt_ldr14uh, { 0x4000 }
557 },
558 /* ldub @($R14,$disp8),$Ri */
559 {
560 { 0, 0, 0, 0 },
561 { { MNEM, ' ', '@', '(', OP (R14), ',', OP (DISP8), ')', ',', OP (RI), 0 } },
562 & ifmt_ldr14ub, { 0x6000 }
563 },
564 /* ld @($R15,$udisp6),$Ri */
565 {
566 { 0, 0, 0, 0 },
567 { { MNEM, ' ', '@', '(', OP (R15), ',', OP (UDISP6), ')', ',', OP (RI), 0 } },
568 & ifmt_ldr15, { 0x300 }
569 },
570 /* ld @$R15+,$Ri */
571 {
572 { 0, 0, 0, 0 },
573 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RI), 0 } },
574 & ifmt_div0s, { 0x700 }
575 },
576 /* ld @$R15+,$Rs2 */
577 {
578 { 0, 0, 0, 0 },
579 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RS2), 0 } },
580 & ifmt_ldr15dr, { 0x780 }
581 },
582 /* ld @$R15+,$ps */
583 {
584 { 0, 0, 0, 0 },
585 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (PS), 0 } },
586 & ifmt_div3, { 0x790 }
587 },
588 /* st $Ri,@$Rj */
589 {
590 { 0, 0, 0, 0 },
591 { { MNEM, ' ', OP (RI), ',', '@', OP (RJ), 0 } },
592 & ifmt_add, { 0x1400 }
593 },
594 /* sth $Ri,@$Rj */
595 {
596 { 0, 0, 0, 0 },
597 { { MNEM, ' ', OP (RI), ',', '@', OP (RJ), 0 } },
598 & ifmt_add, { 0x1500 }
599 },
600 /* stb $Ri,@$Rj */
601 {
602 { 0, 0, 0, 0 },
603 { { MNEM, ' ', OP (RI), ',', '@', OP (RJ), 0 } },
604 & ifmt_add, { 0x1600 }
605 },
606 /* st $Ri,@($R13,$Rj) */
607 {
608 { 0, 0, 0, 0 },
609 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R13), ',', OP (RJ), ')', 0 } },
610 & ifmt_add, { 0x1000 }
611 },
612 /* sth $Ri,@($R13,$Rj) */
613 {
614 { 0, 0, 0, 0 },
615 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R13), ',', OP (RJ), ')', 0 } },
616 & ifmt_add, { 0x1100 }
617 },
618 /* stb $Ri,@($R13,$Rj) */
619 {
620 { 0, 0, 0, 0 },
621 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R13), ',', OP (RJ), ')', 0 } },
622 & ifmt_add, { 0x1200 }
623 },
624 /* st $Ri,@($R14,$disp10) */
625 {
626 { 0, 0, 0, 0 },
627 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R14), ',', OP (DISP10), ')', 0 } },
628 & ifmt_ldr14, { 0x3000 }
629 },
630 /* sth $Ri,@($R14,$disp9) */
631 {
632 { 0, 0, 0, 0 },
633 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R14), ',', OP (DISP9), ')', 0 } },
634 & ifmt_ldr14uh, { 0x5000 }
635 },
636 /* stb $Ri,@($R14,$disp8) */
637 {
638 { 0, 0, 0, 0 },
639 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R14), ',', OP (DISP8), ')', 0 } },
640 & ifmt_ldr14ub, { 0x7000 }
641 },
642 /* st $Ri,@($R15,$udisp6) */
643 {
644 { 0, 0, 0, 0 },
645 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R15), ',', OP (UDISP6), ')', 0 } },
646 & ifmt_ldr15, { 0x1300 }
647 },
648 /* st $Ri,@-$R15 */
649 {
650 { 0, 0, 0, 0 },
651 { { MNEM, ' ', OP (RI), ',', '@', '-', OP (R15), 0 } },
652 & ifmt_div0s, { 0x1700 }
653 },
654 /* st $Rs2,@-$R15 */
655 {
656 { 0, 0, 0, 0 },
657 { { MNEM, ' ', OP (RS2), ',', '@', '-', OP (R15), 0 } },
658 & ifmt_ldr15dr, { 0x1780 }
659 },
660 /* st $ps,@-$R15 */
661 {
662 { 0, 0, 0, 0 },
663 { { MNEM, ' ', OP (PS), ',', '@', '-', OP (R15), 0 } },
664 & ifmt_div3, { 0x1790 }
665 },
666 /* mov $Rj,$Ri */
667 {
668 { 0, 0, 0, 0 },
669 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
670 & ifmt_add, { 0x8b00 }
671 },
672 /* mov $Rs1,$Ri */
673 {
674 { 0, 0, 0, 0 },
675 { { MNEM, ' ', OP (RS1), ',', OP (RI), 0 } },
676 & ifmt_movdr, { 0xb700 }
677 },
678 /* mov $ps,$Ri */
679 {
680 { 0, 0, 0, 0 },
681 { { MNEM, ' ', OP (PS), ',', OP (RI), 0 } },
682 & ifmt_div0s, { 0x1710 }
683 },
684 /* mov $Ri,$Rs1 */
685 {
686 { 0, 0, 0, 0 },
687 { { MNEM, ' ', OP (RI), ',', OP (RS1), 0 } },
688 & ifmt_movdr, { 0xb300 }
689 },
690 /* mov $Ri,$ps */
691 {
692 { 0, 0, 0, 0 },
693 { { MNEM, ' ', OP (RI), ',', OP (PS), 0 } },
694 & ifmt_div0s, { 0x710 }
695 },
696 /* jmp @$Ri */
697 {
698 { 0, 0, 0, 0 },
699 { { MNEM, ' ', '@', OP (RI), 0 } },
700 & ifmt_div0s, { 0x9700 }
701 },
702 /* jmp:d @$Ri */
703 {
704 { 0, 0, 0, 0 },
705 { { MNEM, ' ', '@', OP (RI), 0 } },
706 & ifmt_div0s, { 0x9f00 }
707 },
708 /* call @$Ri */
709 {
710 { 0, 0, 0, 0 },
711 { { MNEM, ' ', '@', OP (RI), 0 } },
712 & ifmt_div0s, { 0x9710 }
713 },
714 /* call:d @$Ri */
715 {
716 { 0, 0, 0, 0 },
717 { { MNEM, ' ', '@', OP (RI), 0 } },
718 & ifmt_div0s, { 0x9f10 }
719 },
720 /* call $label12 */
721 {
722 { 0, 0, 0, 0 },
723 { { MNEM, ' ', OP (LABEL12), 0 } },
724 & ifmt_call, { 0xd000 }
725 },
726 /* call:d $label12 */
727 {
728 { 0, 0, 0, 0 },
729 { { MNEM, ' ', OP (LABEL12), 0 } },
730 & ifmt_call, { 0xd800 }
731 },
732 /* ret */
733 {
734 { 0, 0, 0, 0 },
735 { { MNEM, 0 } },
736 & ifmt_div3, { 0x9720 }
737 },
738 /* ret:d */
739 {
740 { 0, 0, 0, 0 },
741 { { MNEM, 0 } },
742 & ifmt_div3, { 0x9f20 }
743 },
744 /* int $u8 */
745 {
746 { 0, 0, 0, 0 },
747 { { MNEM, ' ', OP (U8), 0 } },
748 & ifmt_int, { 0x1f00 }
749 },
750 /* inte */
751 {
752 { 0, 0, 0, 0 },
753 { { MNEM, 0 } },
754 & ifmt_div3, { 0x9f30 }
755 },
756 /* reti */
757 {
758 { 0, 0, 0, 0 },
759 { { MNEM, 0 } },
760 & ifmt_div3, { 0x9730 }
761 },
762 /* bra:d $label9 */
763 {
764 { 0, 0, 0, 0 },
765 { { MNEM, ' ', OP (LABEL9), 0 } },
766 & ifmt_brad, { 0xf000 }
767 },
768 /* bra $label9 */
769 {
770 { 0, 0, 0, 0 },
771 { { MNEM, ' ', OP (LABEL9), 0 } },
772 & ifmt_brad, { 0xe000 }
773 },
774 /* bno:d $label9 */
775 {
776 { 0, 0, 0, 0 },
777 { { MNEM, ' ', OP (LABEL9), 0 } },
778 & ifmt_brad, { 0xf100 }
779 },
780 /* bno $label9 */
781 {
782 { 0, 0, 0, 0 },
783 { { MNEM, ' ', OP (LABEL9), 0 } },
784 & ifmt_brad, { 0xe100 }
785 },
786 /* beq:d $label9 */
787 {
788 { 0, 0, 0, 0 },
789 { { MNEM, ' ', OP (LABEL9), 0 } },
790 & ifmt_brad, { 0xf200 }
791 },
792 /* beq $label9 */
793 {
794 { 0, 0, 0, 0 },
795 { { MNEM, ' ', OP (LABEL9), 0 } },
796 & ifmt_brad, { 0xe200 }
797 },
798 /* bne:d $label9 */
799 {
800 { 0, 0, 0, 0 },
801 { { MNEM, ' ', OP (LABEL9), 0 } },
802 & ifmt_brad, { 0xf300 }
803 },
804 /* bne $label9 */
805 {
806 { 0, 0, 0, 0 },
807 { { MNEM, ' ', OP (LABEL9), 0 } },
808 & ifmt_brad, { 0xe300 }
809 },
810 /* bc:d $label9 */
811 {
812 { 0, 0, 0, 0 },
813 { { MNEM, ' ', OP (LABEL9), 0 } },
814 & ifmt_brad, { 0xf400 }
815 },
816 /* bc $label9 */
817 {
818 { 0, 0, 0, 0 },
819 { { MNEM, ' ', OP (LABEL9), 0 } },
820 & ifmt_brad, { 0xe400 }
821 },
822 /* bnc:d $label9 */
823 {
824 { 0, 0, 0, 0 },
825 { { MNEM, ' ', OP (LABEL9), 0 } },
826 & ifmt_brad, { 0xf500 }
827 },
828 /* bnc $label9 */
829 {
830 { 0, 0, 0, 0 },
831 { { MNEM, ' ', OP (LABEL9), 0 } },
832 & ifmt_brad, { 0xe500 }
833 },
834 /* bn:d $label9 */
835 {
836 { 0, 0, 0, 0 },
837 { { MNEM, ' ', OP (LABEL9), 0 } },
838 & ifmt_brad, { 0xf600 }
839 },
840 /* bn $label9 */
841 {
842 { 0, 0, 0, 0 },
843 { { MNEM, ' ', OP (LABEL9), 0 } },
844 & ifmt_brad, { 0xe600 }
845 },
846 /* bp:d $label9 */
847 {
848 { 0, 0, 0, 0 },
849 { { MNEM, ' ', OP (LABEL9), 0 } },
850 & ifmt_brad, { 0xf700 }
851 },
852 /* bp $label9 */
853 {
854 { 0, 0, 0, 0 },
855 { { MNEM, ' ', OP (LABEL9), 0 } },
856 & ifmt_brad, { 0xe700 }
857 },
858 /* bv:d $label9 */
859 {
860 { 0, 0, 0, 0 },
861 { { MNEM, ' ', OP (LABEL9), 0 } },
862 & ifmt_brad, { 0xf800 }
863 },
864 /* bv $label9 */
865 {
866 { 0, 0, 0, 0 },
867 { { MNEM, ' ', OP (LABEL9), 0 } },
868 & ifmt_brad, { 0xe800 }
869 },
870 /* bnv:d $label9 */
871 {
872 { 0, 0, 0, 0 },
873 { { MNEM, ' ', OP (LABEL9), 0 } },
874 & ifmt_brad, { 0xf900 }
875 },
876 /* bnv $label9 */
877 {
878 { 0, 0, 0, 0 },
879 { { MNEM, ' ', OP (LABEL9), 0 } },
880 & ifmt_brad, { 0xe900 }
881 },
882 /* blt:d $label9 */
883 {
884 { 0, 0, 0, 0 },
885 { { MNEM, ' ', OP (LABEL9), 0 } },
886 & ifmt_brad, { 0xfa00 }
887 },
888 /* blt $label9 */
889 {
890 { 0, 0, 0, 0 },
891 { { MNEM, ' ', OP (LABEL9), 0 } },
892 & ifmt_brad, { 0xea00 }
893 },
894 /* bge:d $label9 */
895 {
896 { 0, 0, 0, 0 },
897 { { MNEM, ' ', OP (LABEL9), 0 } },
898 & ifmt_brad, { 0xfb00 }
899 },
900 /* bge $label9 */
901 {
902 { 0, 0, 0, 0 },
903 { { MNEM, ' ', OP (LABEL9), 0 } },
904 & ifmt_brad, { 0xeb00 }
905 },
906 /* ble:d $label9 */
907 {
908 { 0, 0, 0, 0 },
909 { { MNEM, ' ', OP (LABEL9), 0 } },
910 & ifmt_brad, { 0xfc00 }
911 },
912 /* ble $label9 */
913 {
914 { 0, 0, 0, 0 },
915 { { MNEM, ' ', OP (LABEL9), 0 } },
916 & ifmt_brad, { 0xec00 }
917 },
918 /* bgt:d $label9 */
919 {
920 { 0, 0, 0, 0 },
921 { { MNEM, ' ', OP (LABEL9), 0 } },
922 & ifmt_brad, { 0xfd00 }
923 },
924 /* bgt $label9 */
925 {
926 { 0, 0, 0, 0 },
927 { { MNEM, ' ', OP (LABEL9), 0 } },
928 & ifmt_brad, { 0xed00 }
929 },
930 /* bls:d $label9 */
931 {
932 { 0, 0, 0, 0 },
933 { { MNEM, ' ', OP (LABEL9), 0 } },
934 & ifmt_brad, { 0xfe00 }
935 },
936 /* bls $label9 */
937 {
938 { 0, 0, 0, 0 },
939 { { MNEM, ' ', OP (LABEL9), 0 } },
940 & ifmt_brad, { 0xee00 }
941 },
942 /* bhi:d $label9 */
943 {
944 { 0, 0, 0, 0 },
945 { { MNEM, ' ', OP (LABEL9), 0 } },
946 & ifmt_brad, { 0xff00 }
947 },
948 /* bhi $label9 */
949 {
950 { 0, 0, 0, 0 },
951 { { MNEM, ' ', OP (LABEL9), 0 } },
952 & ifmt_brad, { 0xef00 }
953 },
954 /* dmov $R13,@$dir10 */
955 {
956 { 0, 0, 0, 0 },
957 { { MNEM, ' ', OP (R13), ',', '@', OP (DIR10), 0 } },
958 & ifmt_dmovr13, { 0x1800 }
959 },
960 /* dmovh $R13,@$dir9 */
961 {
962 { 0, 0, 0, 0 },
963 { { MNEM, ' ', OP (R13), ',', '@', OP (DIR9), 0 } },
964 & ifmt_dmovr13h, { 0x1900 }
965 },
966 /* dmovb $R13,@$dir8 */
967 {
968 { 0, 0, 0, 0 },
969 { { MNEM, ' ', OP (R13), ',', '@', OP (DIR8), 0 } },
970 & ifmt_dmovr13b, { 0x1a00 }
971 },
972 /* dmov @$R13+,@$dir10 */
973 {
974 { 0, 0, 0, 0 },
975 { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR10), 0 } },
976 & ifmt_dmovr13, { 0x1c00 }
977 },
978 /* dmovh @$R13+,@$dir9 */
979 {
980 { 0, 0, 0, 0 },
981 { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR9), 0 } },
982 & ifmt_dmovr13h, { 0x1d00 }
983 },
984 /* dmovb @$R13+,@$dir8 */
985 {
986 { 0, 0, 0, 0 },
987 { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR8), 0 } },
988 & ifmt_dmovr13b, { 0x1e00 }
989 },
990 /* dmov @$R15+,@$dir10 */
991 {
992 { 0, 0, 0, 0 },
993 { { MNEM, ' ', '@', OP (R15), '+', ',', '@', OP (DIR10), 0 } },
994 & ifmt_dmovr13, { 0x1b00 }
995 },
996 /* dmov @$dir10,$R13 */
997 {
998 { 0, 0, 0, 0 },
999 { { MNEM, ' ', '@', OP (DIR10), ',', OP (R13), 0 } },
1000 & ifmt_dmovr13, { 0x800 }
1001 },
1002 /* dmovh @$dir9,$R13 */
1003 {
1004 { 0, 0, 0, 0 },
1005 { { MNEM, ' ', '@', OP (DIR9), ',', OP (R13), 0 } },
1006 & ifmt_dmovr13h, { 0x900 }
1007 },
1008 /* dmovb @$dir8,$R13 */
1009 {
1010 { 0, 0, 0, 0 },
1011 { { MNEM, ' ', '@', OP (DIR8), ',', OP (R13), 0 } },
1012 & ifmt_dmovr13b, { 0xa00 }
1013 },
1014 /* dmov @$dir10,@$R13+ */
1015 {
1016 { 0, 0, 0, 0 },
1017 { { MNEM, ' ', '@', OP (DIR10), ',', '@', OP (R13), '+', 0 } },
1018 & ifmt_dmovr13, { 0xc00 }
1019 },
1020 /* dmovh @$dir9,@$R13+ */
1021 {
1022 { 0, 0, 0, 0 },
1023 { { MNEM, ' ', '@', OP (DIR9), ',', '@', OP (R13), '+', 0 } },
1024 & ifmt_dmovr13h, { 0xd00 }
1025 },
1026 /* dmovb @$dir8,@$R13+ */
1027 {
1028 { 0, 0, 0, 0 },
1029 { { MNEM, ' ', '@', OP (DIR8), ',', '@', OP (R13), '+', 0 } },
1030 & ifmt_dmovr13b, { 0xe00 }
1031 },
1032 /* dmov @$dir10,@-$R15 */
1033 {
1034 { 0, 0, 0, 0 },
1035 { { MNEM, ' ', '@', OP (DIR10), ',', '@', '-', OP (R15), 0 } },
1036 & ifmt_dmovr13, { 0xb00 }
1037 },
1038 /* ldres @$Ri+,$u4 */
1039 {
1040 { 0, 0, 0, 0 },
1041 { { MNEM, ' ', '@', OP (RI), '+', ',', OP (U4), 0 } },
1042 & ifmt_addi, { 0xbc00 }
1043 },
1044 /* stres $u4,@$Ri+ */
1045 {
1046 { 0, 0, 0, 0 },
1047 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), '+', 0 } },
1048 & ifmt_addi, { 0xbd00 }
1049 },
1050 /* copop $u4c,$ccc,$CRj,$CRi */
1051 {
1052 { 0, 0, 0, 0 },
1053 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (CRI), 0 } },
1054 & ifmt_copop, { 0x9fc0 }
1055 },
1056 /* copld $u4c,$ccc,$Rjc,$CRi */
1057 {
1058 { 0, 0, 0, 0 },
1059 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (RJC), ',', OP (CRI), 0 } },
1060 & ifmt_copld, { 0x9fd0 }
1061 },
1062 /* copst $u4c,$ccc,$CRj,$Ric */
1063 {
1064 { 0, 0, 0, 0 },
1065 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (RIC), 0 } },
1066 & ifmt_copst, { 0x9fe0 }
1067 },
1068 /* copsv $u4c,$ccc,$CRj,$Ric */
1069 {
1070 { 0, 0, 0, 0 },
1071 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (RIC), 0 } },
1072 & ifmt_copst, { 0x9ff0 }
1073 },
1074 /* nop */
1075 {
1076 { 0, 0, 0, 0 },
1077 { { MNEM, 0 } },
1078 & ifmt_div3, { 0x9fa0 }
1079 },
1080 /* andccr $u8 */
1081 {
1082 { 0, 0, 0, 0 },
1083 { { MNEM, ' ', OP (U8), 0 } },
1084 & ifmt_int, { 0x8300 }
1085 },
1086 /* orccr $u8 */
1087 {
1088 { 0, 0, 0, 0 },
1089 { { MNEM, ' ', OP (U8), 0 } },
1090 & ifmt_int, { 0x9300 }
1091 },
1092 /* stilm $u8 */
1093 {
1094 { 0, 0, 0, 0 },
1095 { { MNEM, ' ', OP (U8), 0 } },
1096 & ifmt_int, { 0x8700 }
1097 },
1098 /* addsp $s10 */
1099 {
1100 { 0, 0, 0, 0 },
1101 { { MNEM, ' ', OP (S10), 0 } },
1102 & ifmt_addsp, { 0xa300 }
1103 },
1104 /* extsb $Ri */
1105 {
1106 { 0, 0, 0, 0 },
1107 { { MNEM, ' ', OP (RI), 0 } },
1108 & ifmt_div0s, { 0x9780 }
1109 },
1110 /* extub $Ri */
1111 {
1112 { 0, 0, 0, 0 },
1113 { { MNEM, ' ', OP (RI), 0 } },
1114 & ifmt_div0s, { 0x9790 }
1115 },
1116 /* extsh $Ri */
1117 {
1118 { 0, 0, 0, 0 },
1119 { { MNEM, ' ', OP (RI), 0 } },
1120 & ifmt_div0s, { 0x97a0 }
1121 },
1122 /* extuh $Ri */
1123 {
1124 { 0, 0, 0, 0 },
1125 { { MNEM, ' ', OP (RI), 0 } },
1126 & ifmt_div0s, { 0x97b0 }
1127 },
1128 /* ldm0 ($reglist_low_ld) */
1129 {
1130 { 0, 0, 0, 0 },
1131 { { MNEM, ' ', '(', OP (REGLIST_LOW_LD), ')', 0 } },
1132 & ifmt_ldm0, { 0x8c00 }
1133 },
1134 /* ldm1 ($reglist_hi_ld) */
1135 {
1136 { 0, 0, 0, 0 },
1137 { { MNEM, ' ', '(', OP (REGLIST_HI_LD), ')', 0 } },
1138 & ifmt_ldm1, { 0x8d00 }
1139 },
1140 /* stm0 ($reglist_low_st) */
1141 {
1142 { 0, 0, 0, 0 },
1143 { { MNEM, ' ', '(', OP (REGLIST_LOW_ST), ')', 0 } },
1144 & ifmt_stm0, { 0x8e00 }
1145 },
1146 /* stm1 ($reglist_hi_st) */
1147 {
1148 { 0, 0, 0, 0 },
1149 { { MNEM, ' ', '(', OP (REGLIST_HI_ST), ')', 0 } },
1150 & ifmt_stm1, { 0x8f00 }
1151 },
1152 /* enter $u10 */
1153 {
1154 { 0, 0, 0, 0 },
1155 { { MNEM, ' ', OP (U10), 0 } },
1156 & ifmt_enter, { 0xf00 }
1157 },
1158 /* leave */
1159 {
1160 { 0, 0, 0, 0 },
1161 { { MNEM, 0 } },
1162 & ifmt_div3, { 0x9f90 }
1163 },
1164 /* xchb @$Rj,$Ri */
1165 {
1166 { 0, 0, 0, 0 },
1167 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
1168 & ifmt_add, { 0x8a00 }
1169 },
1170 };
1171
1172 #undef A
1173 #undef OPERAND
1174 #undef MNEM
1175 #undef OP
1176
1177 /* Formats for ALIAS macro-insns. */
1178
1179 #define F(f) & fr30_cgen_ifld_table[FR30_##f]
1180 static const CGEN_IFMT ifmt_ldi8m ATTRIBUTE_UNUSED = {
1181 16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
1182 };
1183
1184 static const CGEN_IFMT ifmt_ldi20m ATTRIBUTE_UNUSED = {
1185 16, 32, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RI) }, { F (F_I20) }, { 0 } }
1186 };
1187
1188 static const CGEN_IFMT ifmt_ldi32m ATTRIBUTE_UNUSED = {
1189 16, 48, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { F (F_I32) }, { 0 } }
1190 };
1191
1192 #undef F
1193
1194 /* Each non-simple macro entry points to an array of expansion possibilities. */
1195
1196 #define A(a) (1 << CGEN_INSN_##a)
1197 #define OPERAND(op) FR30_OPERAND_##op
1198 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1199 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1200
1201 /* The macro instruction table. */
1202
1203 static const CGEN_IBASE fr30_cgen_macro_insn_table[] =
1204 {
1205 /* ldi8 $i8,$Ri */
1206 {
1207 -1, "ldi8m", "ldi8", 16,
1208 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
1209 },
1210 /* ldi20 $i20,$Ri */
1211 {
1212 -1, "ldi20m", "ldi20", 32,
1213 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
1214 },
1215 /* ldi32 $i32,$Ri */
1216 {
1217 -1, "ldi32m", "ldi32", 48,
1218 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
1219 },
1220 };
1221
1222 /* The macro instruction opcode table. */
1223
1224 static const CGEN_OPCODE fr30_cgen_macro_insn_opcode_table[] =
1225 {
1226 /* ldi8 $i8,$Ri */
1227 {
1228 { 0, 0, 0, 0 },
1229 { { MNEM, ' ', OP (I8), ',', OP (RI), 0 } },
1230 & ifmt_ldi8m, { 0xc000 }
1231 },
1232 /* ldi20 $i20,$Ri */
1233 {
1234 { 0, 0, 0, 0 },
1235 { { MNEM, ' ', OP (I20), ',', OP (RI), 0 } },
1236 & ifmt_ldi20m, { 0x9b00 }
1237 },
1238 /* ldi32 $i32,$Ri */
1239 {
1240 { 0, 0, 0, 0 },
1241 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
1242 & ifmt_ldi32m, { 0x9f80 }
1243 },
1244 };
1245
1246 #undef A
1247 #undef OPERAND
1248 #undef MNEM
1249 #undef OP
1250
1251 #ifndef CGEN_ASM_HASH_P
1252 #define CGEN_ASM_HASH_P(insn) 1
1253 #endif
1254
1255 #ifndef CGEN_DIS_HASH_P
1256 #define CGEN_DIS_HASH_P(insn) 1
1257 #endif
1258
1259 /* Return non-zero if INSN is to be added to the hash table.
1260 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
1261
1262 static int
1263 asm_hash_insn_p (const CGEN_INSN *insn ATTRIBUTE_UNUSED)
1264 {
1265 return CGEN_ASM_HASH_P (insn);
1266 }
1267
1268 static int
1269 dis_hash_insn_p (const CGEN_INSN *insn)
1270 {
1271 /* If building the hash table and the NO-DIS attribute is present,
1272 ignore. */
1273 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
1274 return 0;
1275 return CGEN_DIS_HASH_P (insn);
1276 }
1277
1278 #ifndef CGEN_ASM_HASH
1279 #define CGEN_ASM_HASH_SIZE 127
1280 #ifdef CGEN_MNEMONIC_OPERANDS
1281 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1282 #else
1283 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1284 #endif
1285 #endif
1286
1287 /* It doesn't make much sense to provide a default here,
1288 but while this is under development we do.
1289 BUFFER is a pointer to the bytes of the insn, target order.
1290 VALUE is the first base_insn_bitsize bits as an int in host order. */
1291
1292 #ifndef CGEN_DIS_HASH
1293 #define CGEN_DIS_HASH_SIZE 256
1294 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1295 #endif
1296
1297 /* The result is the hash value of the insn.
1298 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
1299
1300 static unsigned int
1301 asm_hash_insn (const char *mnem)
1302 {
1303 return CGEN_ASM_HASH (mnem);
1304 }
1305
1306 /* BUF is a pointer to the bytes of the insn, target order.
1307 VALUE is the first base_insn_bitsize bits as an int in host order. */
1308
1309 static unsigned int
1310 dis_hash_insn (const char *buf ATTRIBUTE_UNUSED,
1311 CGEN_INSN_INT value ATTRIBUTE_UNUSED)
1312 {
1313 return CGEN_DIS_HASH (buf, value);
1314 }
1315
1316 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
1317
1318 static void
1319 set_fields_bitsize (CGEN_FIELDS *fields, int size)
1320 {
1321 CGEN_FIELDS_BITSIZE (fields) = size;
1322 }
1323
1324 /* Function to call before using the operand instance table.
1325 This plugs the opcode entries and macro instructions into the cpu table. */
1326
1327 void
1328 fr30_cgen_init_opcode_table (CGEN_CPU_DESC cd)
1329 {
1330 int i;
1331 int num_macros = (sizeof (fr30_cgen_macro_insn_table) /
1332 sizeof (fr30_cgen_macro_insn_table[0]));
1333 const CGEN_IBASE *ib = & fr30_cgen_macro_insn_table[0];
1334 const CGEN_OPCODE *oc = & fr30_cgen_macro_insn_opcode_table[0];
1335 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
1336
1337 /* This test has been added to avoid a warning generated
1338 if memset is called with a third argument of value zero. */
1339 if (num_macros >= 1)
1340 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
1341 for (i = 0; i < num_macros; ++i)
1342 {
1343 insns[i].base = &ib[i];
1344 insns[i].opcode = &oc[i];
1345 fr30_cgen_build_insn_regex (& insns[i]);
1346 }
1347 cd->macro_insn_table.init_entries = insns;
1348 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
1349 cd->macro_insn_table.num_init_entries = num_macros;
1350
1351 oc = & fr30_cgen_insn_opcode_table[0];
1352 insns = (CGEN_INSN *) cd->insn_table.init_entries;
1353 for (i = 0; i < MAX_INSNS; ++i)
1354 {
1355 insns[i].opcode = &oc[i];
1356 fr30_cgen_build_insn_regex (& insns[i]);
1357 }
1358
1359 cd->sizeof_fields = sizeof (CGEN_FIELDS);
1360 cd->set_fields_bitsize = set_fields_bitsize;
1361
1362 cd->asm_hash_p = asm_hash_insn_p;
1363 cd->asm_hash = asm_hash_insn;
1364 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
1365
1366 cd->dis_hash_p = dis_hash_insn_p;
1367 cd->dis_hash = dis_hash_insn;
1368 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
1369 }
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