x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands
[deliverable/binutils-gdb.git] / opcodes / i386-dis-evex-len.h
1 static const struct dis386 evex_len_table[][3] = {
2 /* EVEX_LEN_0F6E_P_2 */
3 {
4 { "vmovK", { XMScalar, Edq }, 0 },
5 },
6
7 /* EVEX_LEN_0F7E_P_1 */
8 {
9 { VEX_W_TABLE (EVEX_W_0F7E_P_1) },
10 },
11
12 /* EVEX_LEN_0F7E_P_2 */
13 {
14 { "vmovK", { Edq, XMScalar }, 0 },
15 },
16
17 /* EVEX_LEN_0FC4_P_2 */
18 {
19 { "vpinsrw", { XM, Vex128, Edqw, Ib }, 0 },
20 },
21
22 /* EVEX_LEN_0FC5_P_2 */
23 {
24 { "vpextrw", { Gdq, XS, Ib }, 0 },
25 },
26
27 /* EVEX_LEN_0FD6_P_2 */
28 {
29 { VEX_W_TABLE (EVEX_W_0FD6_P_2) },
30 },
31
32 /* EVEX_LEN_0F3816_P_2 */
33 {
34 { Bad_Opcode },
35 { "vpermp%XW", { XM, Vex, EXx }, 0 },
36 { "vpermp%XW", { XM, Vex, EXx }, 0 },
37 },
38
39 /* EVEX_LEN_0F3819_P_2_W_0 */
40 {
41 { Bad_Opcode },
42 { "vbroadcastf32x2", { XM, EXxmm_mq }, 0 },
43 { "vbroadcastf32x2", { XM, EXxmm_mq }, 0 },
44 },
45
46 /* EVEX_LEN_0F3819_P_2_W_1 */
47 {
48 { Bad_Opcode },
49 { "vbroadcastsd", { XM, EXxmm_mq }, 0 },
50 { "vbroadcastsd", { XM, EXxmm_mq }, 0 },
51 },
52
53 /* EVEX_LEN_0F381A_P_2_W_0_M_0 */
54 {
55 { Bad_Opcode },
56 { "vbroadcastf32x4", { XM, EXxmm }, 0 },
57 { "vbroadcastf32x4", { XM, EXxmm }, 0 },
58 },
59
60 /* EVEX_LEN_0F381A_P_2_W_1_M_0 */
61 {
62 { Bad_Opcode },
63 { "vbroadcastf64x2", { XM, EXxmm }, 0 },
64 { "vbroadcastf64x2", { XM, EXxmm }, 0 },
65 },
66
67 /* EVEX_LEN_0F381B_P_2_W_0_M_0 */
68 {
69 { Bad_Opcode },
70 { Bad_Opcode },
71 { "vbroadcastf32x8", { XM, EXymm }, 0 },
72 },
73
74 /* EVEX_LEN_0F381B_P_2_W_1_M_0 */
75 {
76 { Bad_Opcode },
77 { Bad_Opcode },
78 { "vbroadcastf64x4", { XM, EXymm }, 0 },
79 },
80
81 /* EVEX_LEN_0F3836_P_2 */
82 {
83 { Bad_Opcode },
84 { "vperm%LW", { XM, Vex, EXx }, 0 },
85 { "vperm%LW", { XM, Vex, EXx }, 0 },
86 },
87
88 /* EVEX_LEN_0F385A_P_2_W_0_M_0 */
89 {
90 { Bad_Opcode },
91 { "vbroadcasti32x4", { XM, EXxmm }, 0 },
92 { "vbroadcasti32x4", { XM, EXxmm }, 0 },
93 },
94
95 /* EVEX_LEN_0F385A_P_2_W_1_M_0 */
96 {
97 { Bad_Opcode },
98 { "vbroadcasti64x2", { XM, EXxmm }, 0 },
99 { "vbroadcasti64x2", { XM, EXxmm }, 0 },
100 },
101
102 /* EVEX_LEN_0F385B_P_2_W_0_M_0 */
103 {
104 { Bad_Opcode },
105 { Bad_Opcode },
106 { "vbroadcasti32x8", { XM, EXymm }, 0 },
107 },
108
109 /* EVEX_LEN_0F385B_P_2_W_1_M_0 */
110 {
111 { Bad_Opcode },
112 { Bad_Opcode },
113 { "vbroadcasti64x4", { XM, EXymm }, 0 },
114 },
115
116 /* EVEX_LEN_0F38C6_REG_1_PREFIX_2 */
117 {
118 { Bad_Opcode },
119 { Bad_Opcode },
120 { "vgatherpf0dp%XW", { MVexVSIBDWpX }, 0 },
121 },
122
123 /* EVEX_LEN_0F38C6_REG_2_PREFIX_2 */
124 {
125 { Bad_Opcode },
126 { Bad_Opcode },
127 { "vgatherpf1dp%XW", { MVexVSIBDWpX }, 0 },
128 },
129
130 /* EVEX_LEN_0F38C6_REG_5_PREFIX_2 */
131 {
132 { Bad_Opcode },
133 { Bad_Opcode },
134 { "vscatterpf0dp%XW", { MVexVSIBDWpX }, 0 },
135 },
136
137 /* EVEX_LEN_0F38C6_REG_6_PREFIX_2 */
138 {
139 { Bad_Opcode },
140 { Bad_Opcode },
141 { "vscatterpf1dp%XW", { MVexVSIBDWpX }, 0 },
142 },
143
144 /* EVEX_LEN_0F38C7_R_1_P_2_W_0 */
145 {
146 { Bad_Opcode },
147 { Bad_Opcode },
148 { "vgatherpf0qps", { MVexVSIBDQWpX }, 0 },
149 },
150
151 /* EVEX_LEN_0F38C7_R_1_P_2_W_1 */
152 {
153 { Bad_Opcode },
154 { Bad_Opcode },
155 { "vgatherpf0qpd", { MVexVSIBQWpX }, 0 },
156 },
157
158 /* EVEX_LEN_0F38C7_R_2_P_2_W_0 */
159 {
160 { Bad_Opcode },
161 { Bad_Opcode },
162 { "vgatherpf1qps", { MVexVSIBDQWpX }, 0 },
163 },
164
165 /* EVEX_LEN_0F38C7_R_2_P_2_W_1 */
166 {
167 { Bad_Opcode },
168 { Bad_Opcode },
169 { "vgatherpf1qpd", { MVexVSIBQWpX }, 0 },
170 },
171
172 /* EVEX_LEN_0F38C7_R_5_P_2_W_0 */
173 {
174 { Bad_Opcode },
175 { Bad_Opcode },
176 { "vscatterpf0qps", { MVexVSIBDQWpX }, 0 },
177 },
178
179 /* EVEX_LEN_0F38C7_R_5_P_2_W_1 */
180 {
181 { Bad_Opcode },
182 { Bad_Opcode },
183 { "vscatterpf0qpd", { MVexVSIBQWpX }, 0 },
184 },
185
186 /* EVEX_LEN_0F38C7_R_6_P_2_W_0 */
187 {
188 { Bad_Opcode },
189 { Bad_Opcode },
190 { "vscatterpf1qps", { MVexVSIBDQWpX }, 0 },
191 },
192
193 /* EVEX_LEN_0F38C7_R_6_P_2_W_1 */
194 {
195 { Bad_Opcode },
196 { Bad_Opcode },
197 { "vscatterpf1qpd", { MVexVSIBQWpX }, 0 },
198 },
199
200 /* EVEX_LEN_0F3A00_P_2_W_1 */
201 {
202 { Bad_Opcode },
203 { "vpermq", { XM, EXx, Ib }, 0 },
204 { "vpermq", { XM, EXx, Ib }, 0 },
205 },
206
207 /* EVEX_LEN_0F3A01_P_2_W_1 */
208 {
209 { Bad_Opcode },
210 { "vpermpd", { XM, EXx, Ib }, 0 },
211 { "vpermpd", { XM, EXx, Ib }, 0 },
212 },
213
214 /* EVEX_LEN_0F3A14_P_2 */
215 {
216 { "vpextrb", { Edqb, XM, Ib }, 0 },
217 },
218
219 /* EVEX_LEN_0F3A15_P_2 */
220 {
221 { "vpextrw", { Edqw, XM, Ib }, 0 },
222 },
223
224 /* EVEX_LEN_0F3A16_P_2 */
225 {
226 { "vpextrK", { Edq, XM, Ib }, 0 },
227 },
228
229 /* EVEX_LEN_0F3A17_P_2 */
230 {
231 { "vextractps", { Edqd, XMM, Ib }, 0 },
232 },
233
234 /* EVEX_LEN_0F3A18_P_2_W_0 */
235 {
236 { Bad_Opcode },
237 { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 },
238 { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 },
239 },
240
241 /* EVEX_LEN_0F3A18_P_2_W_1 */
242 {
243 { Bad_Opcode },
244 { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, 0 },
245 { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, 0 },
246 },
247
248 /* EVEX_LEN_0F3A19_P_2_W_0 */
249 {
250 { Bad_Opcode },
251 { "vextractf32x4", { EXxmm, XM, Ib }, 0 },
252 { "vextractf32x4", { EXxmm, XM, Ib }, 0 },
253 },
254
255 /* EVEX_LEN_0F3A19_P_2_W_1 */
256 {
257 { Bad_Opcode },
258 { "vextractf64x2", { EXxmm, XM, Ib }, 0 },
259 { "vextractf64x2", { EXxmm, XM, Ib }, 0 },
260 },
261
262 /* EVEX_LEN_0F3A1A_P_2_W_0 */
263 {
264 { Bad_Opcode },
265 { Bad_Opcode },
266 { "vinsertf32x8", { XM, Vex, EXymm, Ib }, 0 },
267 },
268
269 /* EVEX_LEN_0F3A1A_P_2_W_1 */
270 {
271 { Bad_Opcode },
272 { Bad_Opcode },
273 { "vinsertf64x4", { XM, Vex, EXymm, Ib }, 0 },
274 },
275
276 /* EVEX_LEN_0F3A1B_P_2_W_0 */
277 {
278 { Bad_Opcode },
279 { Bad_Opcode },
280 { "vextractf32x8", { EXymm, XM, Ib }, 0 },
281 },
282
283 /* EVEX_LEN_0F3A1B_P_2_W_1 */
284 {
285 { Bad_Opcode },
286 { Bad_Opcode },
287 { "vextractf64x4", { EXymm, XM, Ib }, 0 },
288 },
289
290 /* EVEX_LEN_0F3A20_P_2 */
291 {
292 { "vpinsrb", { XM, Vex128, Edqb, Ib }, 0 },
293 },
294
295 /* EVEX_LEN_0F3A21_P_2_W_0 */
296 {
297 { "vinsertps", { XMM, Vex, EXxmm_md, Ib }, 0 },
298 },
299
300 /* EVEX_LEN_0F3A22_P_2 */
301 {
302 { "vpinsrK", { XM, Vex128, Edq, Ib }, 0 },
303 },
304
305 /* EVEX_LEN_0F3A23_P_2_W_0 */
306 {
307 { Bad_Opcode },
308 { "vshuff32x4", { XM, Vex, EXx, Ib }, 0 },
309 { "vshuff32x4", { XM, Vex, EXx, Ib }, 0 },
310 },
311
312 /* EVEX_LEN_0F3A23_P_2_W_1 */
313 {
314 { Bad_Opcode },
315 { "vshuff64x2", { XM, Vex, EXx, Ib }, 0 },
316 { "vshuff64x2", { XM, Vex, EXx, Ib }, 0 },
317 },
318
319 /* EVEX_LEN_0F3A38_P_2_W_0 */
320 {
321 { Bad_Opcode },
322 { "vinserti32x4", { XM, Vex, EXxmm, Ib }, 0 },
323 { "vinserti32x4", { XM, Vex, EXxmm, Ib }, 0 },
324 },
325
326 /* EVEX_LEN_0F3A38_P_2_W_1 */
327 {
328 { Bad_Opcode },
329 { "vinserti64x2", { XM, Vex, EXxmm, Ib }, 0 },
330 { "vinserti64x2", { XM, Vex, EXxmm, Ib }, 0 },
331 },
332
333 /* EVEX_LEN_0F3A39_P_2_W_0 */
334 {
335 { Bad_Opcode },
336 { "vextracti32x4", { EXxmm, XM, Ib }, 0 },
337 { "vextracti32x4", { EXxmm, XM, Ib }, 0 },
338 },
339
340 /* EVEX_LEN_0F3A39_P_2_W_1 */
341 {
342 { Bad_Opcode },
343 { "vextracti64x2", { EXxmm, XM, Ib }, 0 },
344 { "vextracti64x2", { EXxmm, XM, Ib }, 0 },
345 },
346
347 /* EVEX_LEN_0F3A3A_P_2_W_0 */
348 {
349 { Bad_Opcode },
350 { Bad_Opcode },
351 { "vinserti32x8", { XM, Vex, EXymm, Ib }, 0 },
352 },
353
354 /* EVEX_LEN_0F3A3A_P_2_W_1 */
355 {
356 { Bad_Opcode },
357 { Bad_Opcode },
358 { "vinserti64x4", { XM, Vex, EXymm, Ib }, 0 },
359 },
360
361 /* EVEX_LEN_0F3A3B_P_2_W_0 */
362 {
363 { Bad_Opcode },
364 { Bad_Opcode },
365 { "vextracti32x8", { EXymm, XM, Ib }, 0 },
366 },
367
368 /* EVEX_LEN_0F3A3B_P_2_W_1 */
369 {
370 { Bad_Opcode },
371 { Bad_Opcode },
372 { "vextracti64x4", { EXymm, XM, Ib }, 0 },
373 },
374
375 /* EVEX_LEN_0F3A43_P_2_W_0 */
376 {
377 { Bad_Opcode },
378 { "vshufi32x4", { XM, Vex, EXx, Ib }, 0 },
379 { "vshufi32x4", { XM, Vex, EXx, Ib }, 0 },
380 },
381
382 /* EVEX_LEN_0F3A43_P_2_W_1 */
383 {
384 { Bad_Opcode },
385 { "vshufi64x2", { XM, Vex, EXx, Ib }, 0 },
386 { "vshufi64x2", { XM, Vex, EXx, Ib }, 0 },
387 },
388 };
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