opcodes/or1k-ibld.c

   1 /* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
   2 /* Instruction building/extraction support for or1k. -*- C -*-
   3
   4    THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
   5    - the resultant file is machine generated, cgen-ibld.in isn't
   6
   7    Copyright (C) 1996-2020 Free Software Foundation, Inc.
   8
   9    This file is part of libopcodes.
  10
  11    This library is free software; you can redistribute it and/or modify
  12    it under the terms of the GNU General Public License as published by
  13    the Free Software Foundation; either version 3, or (at your option)
  14    any later version.
  15
  16    It is distributed in the hope that it will be useful, but WITHOUT
  17    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  18    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  19    License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software Foundation, Inc.,
  23    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "dis-asm.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "or1k-desc.h"
  35 #include "or1k-opc.h"
  36 #include "cgen/basic-modes.h"
  37 #include "opintl.h"
  38 #include "safe-ctype.h"
  39
  40 #undef  min
  41 #define min(a,b) ((a) < (b) ? (a) : (b))
  42 #undef  max
  43 #define max(a,b) ((a) > (b) ? (a) : (b))
  44
  45 /* Used by the ifield rtx function.  */
  46 #define FLD(f) (fields->f)
  47
  48 static const char * insert_normal
  49   (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
  50    unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
  51 static const char * insert_insn_normal
  52   (CGEN_CPU_DESC, const CGEN_INSN *,
  53    CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
  54 static int extract_normal
  55   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
  56    unsigned int, unsigned int, unsigned int, unsigned int,
  57    unsigned int, unsigned int, bfd_vma, long *);
  58 static int extract_insn_normal
  59   (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
  60    CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
  61 #if CGEN_INT_INSN_P
  62 static void put_insn_int_value
  63   (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
  64 #endif
  65 #if ! CGEN_INT_INSN_P
  66 static CGEN_INLINE void insert_1
  67   (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
  68 static CGEN_INLINE int fill_cache
  69   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *,  int, int, bfd_vma);
  70 static CGEN_INLINE long extract_1
  71   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
  72 #endif
  73 \f
  74 /* Operand insertion.  */
  75
  76 #if ! CGEN_INT_INSN_P
  77
  78 /* Subroutine of insert_normal.  */
  79
  80 static CGEN_INLINE void
  81 insert_1 (CGEN_CPU_DESC cd,
  82           unsigned long value,
  83           int start,
  84           int length,
  85           int word_length,
  86           unsigned char *bufp)
  87 {
  88   unsigned long x,mask;
  89   int shift;
  90
  91   x = cgen_get_insn_value (cd, bufp, word_length);
  92
  93   /* Written this way to avoid undefined behaviour.  */
  94   mask = (((1L << (length - 1)) - 1) << 1) | 1;
  95   if (CGEN_INSN_LSB0_P)
  96     shift = (start + 1) - length;
  97   else
  98     shift = (word_length - (start + length));
  99   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 100
 101   cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
 102 }
 103
 104 #endif /* ! CGEN_INT_INSN_P */
 105
 106 /* Default insertion routine.
 107
 108    ATTRS is a mask of the boolean attributes.
 109    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 110    WORD_LENGTH is the length of the word in bits in which the value resides.
 111    START is the starting bit number in the word, architecture origin.
 112    LENGTH is the length of VALUE in bits.
 113    TOTAL_LENGTH is the total length of the insn in bits.
 114
 115    The result is an error message or NULL if success.  */
 116
 117 /* ??? This duplicates functionality with bfd's howto table and
 118    bfd_install_relocation.  */
 119 /* ??? This doesn't handle bfd_vma's.  Create another function when
 120    necessary.  */
 121
 122 static const char *
 123 insert_normal (CGEN_CPU_DESC cd,
 124                long value,
 125                unsigned int attrs,
 126                unsigned int word_offset,
 127                unsigned int start,
 128                unsigned int length,
 129                unsigned int word_length,
 130                unsigned int total_length,
 131                CGEN_INSN_BYTES_PTR buffer)
 132 {
 133   static char errbuf[100];
 134   /* Written this way to avoid undefined behaviour.  */
 135   unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
 136
 137   /* If LENGTH is zero, this operand doesn't contribute to the value.  */
 138   if (length == 0)
 139     return NULL;
 140
 141   if (word_length > 8 * sizeof (CGEN_INSN_INT))
 142     abort ();
 143
 144   /* For architectures with insns smaller than the base-insn-bitsize,
 145      word_length may be too big.  */
 146   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 147     {
 148       if (word_offset == 0
 149           && word_length > total_length)
 150         word_length = total_length;
 151     }
 152
 153   /* Ensure VALUE will fit.  */
 154   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
 155     {
 156       long minval = - (1L << (length - 1));
 157       unsigned long maxval = mask;
 158
 159       if ((value > 0 && (unsigned long) value > maxval)
 160           || value < minval)
 161         {
 162           /* xgettext:c-format */
 163           sprintf (errbuf,
 164                    _("operand out of range (%ld not between %ld and %lu)"),
 165                    value, minval, maxval);
 166           return errbuf;
 167         }
 168     }
 169   else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
 170     {
 171       unsigned long maxval = mask;
 172       unsigned long val = (unsigned long) value;
 173
 174       /* For hosts with a word size > 32 check to see if value has been sign
 175          extended beyond 32 bits.  If so then ignore these higher sign bits
 176          as the user is attempting to store a 32-bit signed value into an
 177          unsigned 32-bit field which is allowed.  */
 178       if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
 179         val &= 0xFFFFFFFF;
 180
 181       if (val > maxval)
 182         {
 183           /* xgettext:c-format */
 184           sprintf (errbuf,
 185                    _("operand out of range (0x%lx not between 0 and 0x%lx)"),
 186                    val, maxval);
 187           return errbuf;
 188         }
 189     }
 190   else
 191     {
 192       if (! cgen_signed_overflow_ok_p (cd))
 193         {
 194           long minval = - (1L << (length - 1));
 195           long maxval =   (1L << (length - 1)) - 1;
 196
 197           if (value < minval || value > maxval)
 198             {
 199               sprintf
 200                 /* xgettext:c-format */
 201                 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
 202                  value, minval, maxval);
 203               return errbuf;
 204             }
 205         }
 206     }
 207
 208 #if CGEN_INT_INSN_P
 209
 210   {
 211     int shift_within_word, shift_to_word, shift;
 212
 213     /* How to shift the value to BIT0 of the word.  */
 214     shift_to_word = total_length - (word_offset + word_length);
 215
 216     /* How to shift the value to the field within the word.  */
 217     if (CGEN_INSN_LSB0_P)
 218       shift_within_word = start + 1 - length;
 219     else
 220       shift_within_word = word_length - start - length;
 221
 222     /* The total SHIFT, then mask in the value.  */
 223     shift = shift_to_word + shift_within_word;
 224     *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
 225   }
 226
 227 #else /* ! CGEN_INT_INSN_P */
 228
 229   {
 230     unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
 231
 232     insert_1 (cd, value, start, length, word_length, bufp);
 233   }
 234
 235 #endif /* ! CGEN_INT_INSN_P */
 236
 237   return NULL;
 238 }
 239
 240 /* Default insn builder (insert handler).
 241    The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
 242    that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
 243    recorded in host byte order, otherwise BUFFER is an array of bytes
 244    and the value is recorded in target byte order).
 245    The result is an error message or NULL if success.  */
 246
 247 static const char *
 248 insert_insn_normal (CGEN_CPU_DESC cd,
 249                     const CGEN_INSN * insn,
 250                     CGEN_FIELDS * fields,
 251                     CGEN_INSN_BYTES_PTR buffer,
 252                     bfd_vma pc)
 253 {
 254   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 255   unsigned long value;
 256   const CGEN_SYNTAX_CHAR_TYPE * syn;
 257
 258   CGEN_INIT_INSERT (cd);
 259   value = CGEN_INSN_BASE_VALUE (insn);
 260
 261   /* If we're recording insns as numbers (rather than a string of bytes),
 262      target byte order handling is deferred until later.  */
 263
 264 #if CGEN_INT_INSN_P
 265
 266   put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
 267                       CGEN_FIELDS_BITSIZE (fields), value);
 268
 269 #else
 270
 271   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
 272                                         (unsigned) CGEN_FIELDS_BITSIZE (fields)),
 273                        value);
 274
 275 #endif /* ! CGEN_INT_INSN_P */
 276
 277   /* ??? It would be better to scan the format's fields.
 278      Still need to be able to insert a value based on the operand though;
 279      e.g. storing a branch displacement that got resolved later.
 280      Needs more thought first.  */
 281
 282   for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
 283     {
 284       const char *errmsg;
 285
 286       if (CGEN_SYNTAX_CHAR_P (* syn))
 287         continue;
 288
 289       errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 290                                        fields, buffer, pc);
 291       if (errmsg)
 292         return errmsg;
 293     }
 294
 295   return NULL;
 296 }
 297
 298 #if CGEN_INT_INSN_P
 299 /* Cover function to store an insn value into an integral insn.  Must go here
 300    because it needs <prefix>-desc.h for CGEN_INT_INSN_P.  */
 301
 302 static void
 303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 304                     CGEN_INSN_BYTES_PTR buf,
 305                     int length,
 306                     int insn_length,
 307                     CGEN_INSN_INT value)
 308 {
 309   /* For architectures with insns smaller than the base-insn-bitsize,
 310      length may be too big.  */
 311   if (length > insn_length)
 312     *buf = value;
 313   else
 314     {
 315       int shift = insn_length - length;
 316       /* Written this way to avoid undefined behaviour.  */
 317       CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
 318
 319       *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
 320     }
 321 }
 322 #endif
 323 \f
 324 /* Operand extraction.  */
 325
 326 #if ! CGEN_INT_INSN_P
 327
 328 /* Subroutine of extract_normal.
 329    Ensure sufficient bytes are cached in EX_INFO.
 330    OFFSET is the offset in bytes from the start of the insn of the value.
 331    BYTES is the length of the needed value.
 332    Returns 1 for success, 0 for failure.  */
 333
 334 static CGEN_INLINE int
 335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 336             CGEN_EXTRACT_INFO *ex_info,
 337             int offset,
 338             int bytes,
 339             bfd_vma pc)
 340 {
 341   /* It's doubtful that the middle part has already been fetched so
 342      we don't optimize that case.  kiss.  */
 343   unsigned int mask;
 344   disassemble_info *info = (disassemble_info *) ex_info->dis_info;
 345
 346   /* First do a quick check.  */
 347   mask = (1 << bytes) - 1;
 348   if (((ex_info->valid >> offset) & mask) == mask)
 349     return 1;
 350
 351   /* Search for the first byte we need to read.  */
 352   for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
 353     if (! (mask & ex_info->valid))
 354       break;
 355
 356   if (bytes)
 357     {
 358       int status;
 359
 360       pc += offset;
 361       status = (*info->read_memory_func)
 362         (pc, ex_info->insn_bytes + offset, bytes, info);
 363
 364       if (status != 0)
 365         {
 366           (*info->memory_error_func) (status, pc, info);
 367           return 0;
 368         }
 369
 370       ex_info->valid |= ((1 << bytes) - 1) << offset;
 371     }
 372
 373   return 1;
 374 }
 375
 376 /* Subroutine of extract_normal.  */
 377
 378 static CGEN_INLINE long
 379 extract_1 (CGEN_CPU_DESC cd,
 380            CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
 381            int start,
 382            int length,
 383            int word_length,
 384            unsigned char *bufp,
 385            bfd_vma pc ATTRIBUTE_UNUSED)
 386 {
 387   unsigned long x;
 388   int shift;
 389
 390   x = cgen_get_insn_value (cd, bufp, word_length);
 391
 392   if (CGEN_INSN_LSB0_P)
 393     shift = (start + 1) - length;
 394   else
 395     shift = (word_length - (start + length));
 396   return x >> shift;
 397 }
 398
 399 #endif /* ! CGEN_INT_INSN_P */
 400
 401 /* Default extraction routine.
 402
 403    INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
 404    or sometimes less for cases like the m32r where the base insn size is 32
 405    but some insns are 16 bits.
 406    ATTRS is a mask of the boolean attributes.  We only need `SIGNED',
 407    but for generality we take a bitmask of all of them.
 408    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 409    WORD_LENGTH is the length of the word in bits in which the value resides.
 410    START is the starting bit number in the word, architecture origin.
 411    LENGTH is the length of VALUE in bits.
 412    TOTAL_LENGTH is the total length of the insn in bits.
 413
 414    Returns 1 for success, 0 for failure.  */
 415
 416 /* ??? The return code isn't properly used.  wip.  */
 417
 418 /* ??? This doesn't handle bfd_vma's.  Create another function when
 419    necessary.  */
 420
 421 static int
 422 extract_normal (CGEN_CPU_DESC cd,
 423 #if ! CGEN_INT_INSN_P
 424                 CGEN_EXTRACT_INFO *ex_info,
 425 #else
 426                 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
 427 #endif
 428                 CGEN_INSN_INT insn_value,
 429                 unsigned int attrs,
 430                 unsigned int word_offset,
 431                 unsigned int start,
 432                 unsigned int length,
 433                 unsigned int word_length,
 434                 unsigned int total_length,
 435 #if ! CGEN_INT_INSN_P
 436                 bfd_vma pc,
 437 #else
 438                 bfd_vma pc ATTRIBUTE_UNUSED,
 439 #endif
 440                 long *valuep)
 441 {
 442   long value, mask;
 443
 444   /* If LENGTH is zero, this operand doesn't contribute to the value
 445      so give it a standard value of zero.  */
 446   if (length == 0)
 447     {
 448       *valuep = 0;
 449       return 1;
 450     }
 451
 452   if (word_length > 8 * sizeof (CGEN_INSN_INT))
 453     abort ();
 454
 455   /* For architectures with insns smaller than the insn-base-bitsize,
 456      word_length may be too big.  */
 457   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 458     {
 459       if (word_offset + word_length > total_length)
 460         word_length = total_length - word_offset;
 461     }
 462
 463   /* Does the value reside in INSN_VALUE, and at the right alignment?  */
 464
 465   if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
 466     {
 467       if (CGEN_INSN_LSB0_P)
 468         value = insn_value >> ((word_offset + start + 1) - length);
 469       else
 470         value = insn_value >> (total_length - ( word_offset + start + length));
 471     }
 472
 473 #if ! CGEN_INT_INSN_P
 474
 475   else
 476     {
 477       unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
 478
 479       if (word_length > 8 * sizeof (CGEN_INSN_INT))
 480         abort ();
 481
 482       if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
 483         {
 484           *valuep = 0;
 485           return 0;
 486         }
 487
 488       value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
 489     }
 490
 491 #endif /* ! CGEN_INT_INSN_P */
 492
 493   /* Written this way to avoid undefined behaviour.  */
 494   mask = (((1L << (length - 1)) - 1) << 1) | 1;
 495
 496   value &= mask;
 497   /* sign extend? */
 498   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
 499       && (value & (1L << (length - 1))))
 500     value |= ~mask;
 501
 502   *valuep = value;
 503
 504   return 1;
 505 }
 506
 507 /* Default insn extractor.
 508
 509    INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
 510    The extracted fields are stored in FIELDS.
 511    EX_INFO is used to handle reading variable length insns.
 512    Return the length of the insn in bits, or 0 if no match,
 513    or -1 if an error occurs fetching data (memory_error_func will have
 514    been called).  */
 515
 516 static int
 517 extract_insn_normal (CGEN_CPU_DESC cd,
 518                      const CGEN_INSN *insn,
 519                      CGEN_EXTRACT_INFO *ex_info,
 520                      CGEN_INSN_INT insn_value,
 521                      CGEN_FIELDS *fields,
 522                      bfd_vma pc)
 523 {
 524   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 525   const CGEN_SYNTAX_CHAR_TYPE *syn;
 526
 527   CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
 528
 529   CGEN_INIT_EXTRACT (cd);
 530
 531   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 532     {
 533       int length;
 534
 535       if (CGEN_SYNTAX_CHAR_P (*syn))
 536         continue;
 537
 538       length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 539                                         ex_info, insn_value, fields, pc);
 540       if (length <= 0)
 541         return length;
 542     }
 543
 544   /* We recognized and successfully extracted this insn.  */
 545   return CGEN_INSN_BITSIZE (insn);
 546 }
 547 \f
 548 /* Machine generated code added here.  */
 549
 550 const char * or1k_cgen_insert_operand
 551   (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
 552
 553 /* Main entry point for operand insertion.
 554
 555    This function is basically just a big switch statement.  Earlier versions
 556    used tables to look up the function to use, but
 557    - if the table contains both assembler and disassembler functions then
 558      the disassembler contains much of the assembler and vice-versa,
 559    - there's a lot of inlining possibilities as things grow,
 560    - using a switch statement avoids the function call overhead.
 561
 562    This function could be moved into `parse_insn_normal', but keeping it
 563    separate makes clear the interface between `parse_insn_normal' and each of
 564    the handlers.  It's also needed by GAS to insert operands that couldn't be
 565    resolved during parsing.  */
 566
 567 const char *
 568 or1k_cgen_insert_operand (CGEN_CPU_DESC cd,
 569                              int opindex,
 570                              CGEN_FIELDS * fields,
 571                              CGEN_INSN_BYTES_PTR buffer,
 572                              bfd_vma pc ATTRIBUTE_UNUSED)
 573 {
 574   const char * errmsg = NULL;
 575   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 576
 577   switch (opindex)
 578     {
 579     case OR1K_OPERAND_DISP21 :
 580       {
 581         long value = fields->f_disp21;
 582         value = ((((SI) (value) >> (13))) - (((SI) (pc) >> (13))));
 583         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, buffer);
 584       }
 585       break;
 586     case OR1K_OPERAND_DISP26 :
 587       {
 588         long value = fields->f_disp26;
 589         value = ((SI) (((value) - (pc))) >> (2));
 590         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer);
 591       }
 592       break;
 593     case OR1K_OPERAND_RA :
 594       errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer);
 595       break;
 596     case OR1K_OPERAND_RAD32F :
 597       {
 598 {
 599   FLD (f_r2) = ((FLD (f_rad32)) & (31));
 600   FLD (f_raoff_9_1) = ((((SI) (FLD (f_rad32)) >> (5))) & (1));
 601 }
 602         errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer);
 603         if (errmsg)
 604           break;
 605         errmsg = insert_normal (cd, fields->f_raoff_9_1, 0, 0, 9, 1, 32, total_length, buffer);
 606         if (errmsg)
 607           break;
 608       }
 609       break;
 610     case OR1K_OPERAND_RADI :
 611       {
 612 {
 613   FLD (f_r2) = ((FLD (f_rad32)) & (31));
 614   FLD (f_raoff_9_1) = ((((SI) (FLD (f_rad32)) >> (5))) & (1));
 615 }
 616         errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer);
 617         if (errmsg)
 618           break;
 619         errmsg = insert_normal (cd, fields->f_raoff_9_1, 0, 0, 9, 1, 32, total_length, buffer);
 620         if (errmsg)
 621           break;
 622       }
 623       break;
 624     case OR1K_OPERAND_RASF :
 625       errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer);
 626       break;
 627     case OR1K_OPERAND_RB :
 628       errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer);
 629       break;
 630     case OR1K_OPERAND_RBD32F :
 631       {
 632 {
 633   FLD (f_r3) = ((FLD (f_rbd32)) & (31));
 634   FLD (f_rboff_8_1) = ((((SI) (FLD (f_rbd32)) >> (5))) & (1));
 635 }
 636         errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer);
 637         if (errmsg)
 638           break;
 639         errmsg = insert_normal (cd, fields->f_rboff_8_1, 0, 0, 8, 1, 32, total_length, buffer);
 640         if (errmsg)
 641           break;
 642       }
 643       break;
 644     case OR1K_OPERAND_RBDI :
 645       {
 646 {
 647   FLD (f_r3) = ((FLD (f_rbd32)) & (31));
 648   FLD (f_rboff_8_1) = ((((SI) (FLD (f_rbd32)) >> (5))) & (1));
 649 }
 650         errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer);
 651         if (errmsg)
 652           break;
 653         errmsg = insert_normal (cd, fields->f_rboff_8_1, 0, 0, 8, 1, 32, total_length, buffer);
 654         if (errmsg)
 655           break;
 656       }
 657       break;
 658     case OR1K_OPERAND_RBSF :
 659       errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer);
 660       break;
 661     case OR1K_OPERAND_RD :
 662       errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
 663       break;
 664     case OR1K_OPERAND_RDD32F :
 665       {
 666 {
 667   FLD (f_r1) = ((FLD (f_rdd32)) & (31));
 668   FLD (f_rdoff_10_1) = ((((SI) (FLD (f_rdd32)) >> (5))) & (1));
 669 }
 670         errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
 671         if (errmsg)
 672           break;
 673         errmsg = insert_normal (cd, fields->f_rdoff_10_1, 0, 0, 10, 1, 32, total_length, buffer);
 674         if (errmsg)
 675           break;
 676       }
 677       break;
 678     case OR1K_OPERAND_RDDI :
 679       {
 680 {
 681   FLD (f_r1) = ((FLD (f_rdd32)) & (31));
 682   FLD (f_rdoff_10_1) = ((((SI) (FLD (f_rdd32)) >> (5))) & (1));
 683 }
 684         errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
 685         if (errmsg)
 686           break;
 687         errmsg = insert_normal (cd, fields->f_rdoff_10_1, 0, 0, 10, 1, 32, total_length, buffer);
 688         if (errmsg)
 689           break;
 690       }
 691       break;
 692     case OR1K_OPERAND_RDSF :
 693       errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
 694       break;
 695     case OR1K_OPERAND_SIMM16 :
 696       errmsg = insert_normal (cd, fields->f_simm16, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_SIGN_OPT), 0, 15, 16, 32, total_length, buffer);
 697       break;
 698     case OR1K_OPERAND_SIMM16_SPLIT :
 699       {
 700 {
 701   FLD (f_imm16_25_5) = ((((INT) (FLD (f_simm16_split)) >> (11))) & (31));
 702   FLD (f_imm16_10_11) = ((FLD (f_simm16_split)) & (2047));
 703 }
 704         errmsg = insert_normal (cd, fields->f_imm16_25_5, 0, 0, 25, 5, 32, total_length, buffer);
 705         if (errmsg)
 706           break;
 707         errmsg = insert_normal (cd, fields->f_imm16_10_11, 0, 0, 10, 11, 32, total_length, buffer);
 708         if (errmsg)
 709           break;
 710       }
 711       break;
 712     case OR1K_OPERAND_UIMM16 :
 713       errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 15, 16, 32, total_length, buffer);
 714       break;
 715     case OR1K_OPERAND_UIMM16_SPLIT :
 716       {
 717 {
 718   FLD (f_imm16_25_5) = ((((UINT) (FLD (f_uimm16_split)) >> (11))) & (31));
 719   FLD (f_imm16_10_11) = ((FLD (f_uimm16_split)) & (2047));
 720 }
 721         errmsg = insert_normal (cd, fields->f_imm16_25_5, 0, 0, 25, 5, 32, total_length, buffer);
 722         if (errmsg)
 723           break;
 724         errmsg = insert_normal (cd, fields->f_imm16_10_11, 0, 0, 10, 11, 32, total_length, buffer);
 725         if (errmsg)
 726           break;
 727       }
 728       break;
 729     case OR1K_OPERAND_UIMM6 :
 730       errmsg = insert_normal (cd, fields->f_uimm6, 0, 0, 5, 6, 32, total_length, buffer);
 731       break;
 732
 733     default :
 734       /* xgettext:c-format */
 735       opcodes_error_handler
 736         (_("internal error: unrecognized field %d while building insn"),
 737          opindex);
 738       abort ();
 739   }
 740
 741   return errmsg;
 742 }
 743
 744 int or1k_cgen_extract_operand
 745   (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
 746
 747 /* Main entry point for operand extraction.
 748    The result is <= 0 for error, >0 for success.
 749    ??? Actual values aren't well defined right now.
 750
 751    This function is basically just a big switch statement.  Earlier versions
 752    used tables to look up the function to use, but
 753    - if the table contains both assembler and disassembler functions then
 754      the disassembler contains much of the assembler and vice-versa,
 755    - there's a lot of inlining possibilities as things grow,
 756    - using a switch statement avoids the function call overhead.
 757
 758    This function could be moved into `print_insn_normal', but keeping it
 759    separate makes clear the interface between `print_insn_normal' and each of
 760    the handlers.  */
 761
 762 int
 763 or1k_cgen_extract_operand (CGEN_CPU_DESC cd,
 764                              int opindex,
 765                              CGEN_EXTRACT_INFO *ex_info,
 766                              CGEN_INSN_INT insn_value,
 767                              CGEN_FIELDS * fields,
 768                              bfd_vma pc)
 769 {
 770   /* Assume success (for those operands that are nops).  */
 771   int length = 1;
 772   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 773
 774   switch (opindex)
 775     {
 776     case OR1K_OPERAND_DISP21 :
 777       {
 778         long value;
 779         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, pc, & value);
 780         value = ((((value) + (((SI) (pc) >> (13))))) * (8192));
 781         fields->f_disp21 = value;
 782       }
 783       break;
 784     case OR1K_OPERAND_DISP26 :
 785       {
 786         long value;
 787         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, pc, & value);
 788         value = ((((value) * (4))) + (pc));
 789         fields->f_disp26 = value;
 790       }
 791       break;
 792     case OR1K_OPERAND_RA :
 793       length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2);
 794       break;
 795     case OR1K_OPERAND_RAD32F :
 796       {
 797         length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2);
 798         if (length <= 0) break;
 799         length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_raoff_9_1);
 800         if (length <= 0) break;
 801   FLD (f_rad32) = ((FLD (f_r2)) | (((FLD (f_raoff_9_1)) << (5))));
 802       }
 803       break;
 804     case OR1K_OPERAND_RADI :
 805       {
 806         length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2);
 807         if (length <= 0) break;
 808         length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_raoff_9_1);
 809         if (length <= 0) break;
 810   FLD (f_rad32) = ((FLD (f_r2)) | (((FLD (f_raoff_9_1)) << (5))));
 811       }
 812       break;
 813     case OR1K_OPERAND_RASF :
 814       length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2);
 815       break;
 816     case OR1K_OPERAND_RB :
 817       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3);
 818       break;
 819     case OR1K_OPERAND_RBD32F :
 820       {
 821         length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3);
 822         if (length <= 0) break;
 823         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_rboff_8_1);
 824         if (length <= 0) break;
 825   FLD (f_rbd32) = ((FLD (f_r3)) | (((FLD (f_rboff_8_1)) << (5))));
 826       }
 827       break;
 828     case OR1K_OPERAND_RBDI :
 829       {
 830         length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3);
 831         if (length <= 0) break;
 832         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_rboff_8_1);
 833         if (length <= 0) break;
 834   FLD (f_rbd32) = ((FLD (f_r3)) | (((FLD (f_rboff_8_1)) << (5))));
 835       }
 836       break;
 837     case OR1K_OPERAND_RBSF :
 838       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3);
 839       break;
 840     case OR1K_OPERAND_RD :
 841       length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
 842       break;
 843     case OR1K_OPERAND_RDD32F :
 844       {
 845         length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
 846         if (length <= 0) break;
 847         length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 1, 32, total_length, pc, & fields->f_rdoff_10_1);
 848         if (length <= 0) break;
 849   FLD (f_rdd32) = ((FLD (f_r1)) | (((FLD (f_rdoff_10_1)) << (5))));
 850       }
 851       break;
 852     case OR1K_OPERAND_RDDI :
 853       {
 854         length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
 855         if (length <= 0) break;
 856         length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 1, 32, total_length, pc, & fields->f_rdoff_10_1);
 857         if (length <= 0) break;
 858   FLD (f_rdd32) = ((FLD (f_r1)) | (((FLD (f_rdoff_10_1)) << (5))));
 859       }
 860       break;
 861     case OR1K_OPERAND_RDSF :
 862       length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
 863       break;
 864     case OR1K_OPERAND_SIMM16 :
 865       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_SIGN_OPT), 0, 15, 16, 32, total_length, pc, & fields->f_simm16);
 866       break;
 867     case OR1K_OPERAND_SIMM16_SPLIT :
 868       {
 869         length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_imm16_25_5);
 870         if (length <= 0) break;
 871         length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_imm16_10_11);
 872         if (length <= 0) break;
 873   FLD (f_simm16_split) = ((HI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11)))));
 874       }
 875       break;
 876     case OR1K_OPERAND_UIMM16 :
 877       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm16);
 878       break;
 879     case OR1K_OPERAND_UIMM16_SPLIT :
 880       {
 881         length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_imm16_25_5);
 882         if (length <= 0) break;
 883         length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_imm16_10_11);
 884         if (length <= 0) break;
 885   FLD (f_uimm16_split) = ((UHI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11)))));
 886       }
 887       break;
 888     case OR1K_OPERAND_UIMM6 :
 889       length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 6, 32, total_length, pc, & fields->f_uimm6);
 890       break;
 891
 892     default :
 893       /* xgettext:c-format */
 894       opcodes_error_handler
 895         (_("internal error: unrecognized field %d while decoding insn"),
 896          opindex);
 897       abort ();
 898     }
 899
 900   return length;
 901 }
 902
 903 cgen_insert_fn * const or1k_cgen_insert_handlers[] =
 904 {
 905   insert_insn_normal,
 906 };
 907
 908 cgen_extract_fn * const or1k_cgen_extract_handlers[] =
 909 {
 910   extract_insn_normal,
 911 };
 912
 913 int or1k_cgen_get_int_operand     (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
 914 bfd_vma or1k_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
 915
 916 /* Getting values from cgen_fields is handled by a collection of functions.
 917    They are distinguished by the type of the VALUE argument they return.
 918    TODO: floating point, inlining support, remove cases where result type
 919    not appropriate.  */
 920
 921 int
 922 or1k_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 923                              int opindex,
 924                              const CGEN_FIELDS * fields)
 925 {
 926   int value;
 927
 928   switch (opindex)
 929     {
 930     case OR1K_OPERAND_DISP21 :
 931       value = fields->f_disp21;
 932       break;
 933     case OR1K_OPERAND_DISP26 :
 934       value = fields->f_disp26;
 935       break;
 936     case OR1K_OPERAND_RA :
 937       value = fields->f_r2;
 938       break;
 939     case OR1K_OPERAND_RAD32F :
 940       value = fields->f_rad32;
 941       break;
 942     case OR1K_OPERAND_RADI :
 943       value = fields->f_rad32;
 944       break;
 945     case OR1K_OPERAND_RASF :
 946       value = fields->f_r2;
 947       break;
 948     case OR1K_OPERAND_RB :
 949       value = fields->f_r3;
 950       break;
 951     case OR1K_OPERAND_RBD32F :
 952       value = fields->f_rbd32;
 953       break;
 954     case OR1K_OPERAND_RBDI :
 955       value = fields->f_rbd32;
 956       break;
 957     case OR1K_OPERAND_RBSF :
 958       value = fields->f_r3;
 959       break;
 960     case OR1K_OPERAND_RD :
 961       value = fields->f_r1;
 962       break;
 963     case OR1K_OPERAND_RDD32F :
 964       value = fields->f_rdd32;
 965       break;
 966     case OR1K_OPERAND_RDDI :
 967       value = fields->f_rdd32;
 968       break;
 969     case OR1K_OPERAND_RDSF :
 970       value = fields->f_r1;
 971       break;
 972     case OR1K_OPERAND_SIMM16 :
 973       value = fields->f_simm16;
 974       break;
 975     case OR1K_OPERAND_SIMM16_SPLIT :
 976       value = fields->f_simm16_split;
 977       break;
 978     case OR1K_OPERAND_UIMM16 :
 979       value = fields->f_uimm16;
 980       break;
 981     case OR1K_OPERAND_UIMM16_SPLIT :
 982       value = fields->f_uimm16_split;
 983       break;
 984     case OR1K_OPERAND_UIMM6 :
 985       value = fields->f_uimm6;
 986       break;
 987
 988     default :
 989       /* xgettext:c-format */
 990       opcodes_error_handler
 991         (_("internal error: unrecognized field %d while getting int operand"),
 992          opindex);
 993       abort ();
 994   }
 995
 996   return value;
 997 }
 998
 999 bfd_vma
1000 or1k_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1001                              int opindex,
1002                              const CGEN_FIELDS * fields)
1003 {
1004   bfd_vma value;
1005
1006   switch (opindex)
1007     {
1008     case OR1K_OPERAND_DISP21 :
1009       value = fields->f_disp21;
1010       break;
1011     case OR1K_OPERAND_DISP26 :
1012       value = fields->f_disp26;
1013       break;
1014     case OR1K_OPERAND_RA :
1015       value = fields->f_r2;
1016       break;
1017     case OR1K_OPERAND_RAD32F :
1018       value = fields->f_rad32;
1019       break;
1020     case OR1K_OPERAND_RADI :
1021       value = fields->f_rad32;
1022       break;
1023     case OR1K_OPERAND_RASF :
1024       value = fields->f_r2;
1025       break;
1026     case OR1K_OPERAND_RB :
1027       value = fields->f_r3;
1028       break;
1029     case OR1K_OPERAND_RBD32F :
1030       value = fields->f_rbd32;
1031       break;
1032     case OR1K_OPERAND_RBDI :
1033       value = fields->f_rbd32;
1034       break;
1035     case OR1K_OPERAND_RBSF :
1036       value = fields->f_r3;
1037       break;
1038     case OR1K_OPERAND_RD :
1039       value = fields->f_r1;
1040       break;
1041     case OR1K_OPERAND_RDD32F :
1042       value = fields->f_rdd32;
1043       break;
1044     case OR1K_OPERAND_RDDI :
1045       value = fields->f_rdd32;
1046       break;
1047     case OR1K_OPERAND_RDSF :
1048       value = fields->f_r1;
1049       break;
1050     case OR1K_OPERAND_SIMM16 :
1051       value = fields->f_simm16;
1052       break;
1053     case OR1K_OPERAND_SIMM16_SPLIT :
1054       value = fields->f_simm16_split;
1055       break;
1056     case OR1K_OPERAND_UIMM16 :
1057       value = fields->f_uimm16;
1058       break;
1059     case OR1K_OPERAND_UIMM16_SPLIT :
1060       value = fields->f_uimm16_split;
1061       break;
1062     case OR1K_OPERAND_UIMM6 :
1063       value = fields->f_uimm6;
1064       break;
1065
1066     default :
1067       /* xgettext:c-format */
1068       opcodes_error_handler
1069         (_("internal error: unrecognized field %d while getting vma operand"),
1070          opindex);
1071       abort ();
1072   }
1073
1074   return value;
1075 }
1076
1077 void or1k_cgen_set_int_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1078 void or1k_cgen_set_vma_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
1079
1080 /* Stuffing values in cgen_fields is handled by a collection of functions.
1081    They are distinguished by the type of the VALUE argument they accept.
1082    TODO: floating point, inlining support, remove cases where argument type
1083    not appropriate.  */
1084
1085 void
1086 or1k_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1087                              int opindex,
1088                              CGEN_FIELDS * fields,
1089                              int value)
1090 {
1091   switch (opindex)
1092     {
1093     case OR1K_OPERAND_DISP21 :
1094       fields->f_disp21 = value;
1095       break;
1096     case OR1K_OPERAND_DISP26 :
1097       fields->f_disp26 = value;
1098       break;
1099     case OR1K_OPERAND_RA :
1100       fields->f_r2 = value;
1101       break;
1102     case OR1K_OPERAND_RAD32F :
1103       fields->f_rad32 = value;
1104       break;
1105     case OR1K_OPERAND_RADI :
1106       fields->f_rad32 = value;
1107       break;
1108     case OR1K_OPERAND_RASF :
1109       fields->f_r2 = value;
1110       break;
1111     case OR1K_OPERAND_RB :
1112       fields->f_r3 = value;
1113       break;
1114     case OR1K_OPERAND_RBD32F :
1115       fields->f_rbd32 = value;
1116       break;
1117     case OR1K_OPERAND_RBDI :
1118       fields->f_rbd32 = value;
1119       break;
1120     case OR1K_OPERAND_RBSF :
1121       fields->f_r3 = value;
1122       break;
1123     case OR1K_OPERAND_RD :
1124       fields->f_r1 = value;
1125       break;
1126     case OR1K_OPERAND_RDD32F :
1127       fields->f_rdd32 = value;
1128       break;
1129     case OR1K_OPERAND_RDDI :
1130       fields->f_rdd32 = value;
1131       break;
1132     case OR1K_OPERAND_RDSF :
1133       fields->f_r1 = value;
1134       break;
1135     case OR1K_OPERAND_SIMM16 :
1136       fields->f_simm16 = value;
1137       break;
1138     case OR1K_OPERAND_SIMM16_SPLIT :
1139       fields->f_simm16_split = value;
1140       break;
1141     case OR1K_OPERAND_UIMM16 :
1142       fields->f_uimm16 = value;
1143       break;
1144     case OR1K_OPERAND_UIMM16_SPLIT :
1145       fields->f_uimm16_split = value;
1146       break;
1147     case OR1K_OPERAND_UIMM6 :
1148       fields->f_uimm6 = value;
1149       break;
1150
1151     default :
1152       /* xgettext:c-format */
1153       opcodes_error_handler
1154         (_("internal error: unrecognized field %d while setting int operand"),
1155          opindex);
1156       abort ();
1157   }
1158 }
1159
1160 void
1161 or1k_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1162                              int opindex,
1163                              CGEN_FIELDS * fields,
1164                              bfd_vma value)
1165 {
1166   switch (opindex)
1167     {
1168     case OR1K_OPERAND_DISP21 :
1169       fields->f_disp21 = value;
1170       break;
1171     case OR1K_OPERAND_DISP26 :
1172       fields->f_disp26 = value;
1173       break;
1174     case OR1K_OPERAND_RA :
1175       fields->f_r2 = value;
1176       break;
1177     case OR1K_OPERAND_RAD32F :
1178       fields->f_rad32 = value;
1179       break;
1180     case OR1K_OPERAND_RADI :
1181       fields->f_rad32 = value;
1182       break;
1183     case OR1K_OPERAND_RASF :
1184       fields->f_r2 = value;
1185       break;
1186     case OR1K_OPERAND_RB :
1187       fields->f_r3 = value;
1188       break;
1189     case OR1K_OPERAND_RBD32F :
1190       fields->f_rbd32 = value;
1191       break;
1192     case OR1K_OPERAND_RBDI :
1193       fields->f_rbd32 = value;
1194       break;
1195     case OR1K_OPERAND_RBSF :
1196       fields->f_r3 = value;
1197       break;
1198     case OR1K_OPERAND_RD :
1199       fields->f_r1 = value;
1200       break;
1201     case OR1K_OPERAND_RDD32F :
1202       fields->f_rdd32 = value;
1203       break;
1204     case OR1K_OPERAND_RDDI :
1205       fields->f_rdd32 = value;
1206       break;
1207     case OR1K_OPERAND_RDSF :
1208       fields->f_r1 = value;
1209       break;
1210     case OR1K_OPERAND_SIMM16 :
1211       fields->f_simm16 = value;
1212       break;
1213     case OR1K_OPERAND_SIMM16_SPLIT :
1214       fields->f_simm16_split = value;
1215       break;
1216     case OR1K_OPERAND_UIMM16 :
1217       fields->f_uimm16 = value;
1218       break;
1219     case OR1K_OPERAND_UIMM16_SPLIT :
1220       fields->f_uimm16_split = value;
1221       break;
1222     case OR1K_OPERAND_UIMM6 :
1223       fields->f_uimm6 = value;
1224       break;
1225
1226     default :
1227       /* xgettext:c-format */
1228       opcodes_error_handler
1229         (_("internal error: unrecognized field %d while setting vma operand"),
1230          opindex);
1231       abort ();
1232   }
1233 }
1234
1235 /* Function to call before using the instruction builder tables.  */
1236
1237 void
1238 or1k_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1239 {
1240   cd->insert_handlers = & or1k_cgen_insert_handlers[0];
1241   cd->extract_handlers = & or1k_cgen_extract_handlers[0];
1242
1243   cd->insert_operand = or1k_cgen_insert_operand;
1244   cd->extract_operand = or1k_cgen_extract_operand;
1245
1246   cd->get_int_operand = or1k_cgen_get_int_operand;
1247   cd->set_int_operand = or1k_cgen_set_int_operand;
1248   cd->get_vma_operand = or1k_cgen_get_vma_operand;
1249   cd->set_vma_operand = or1k_cgen_set_vma_operand;
1250 }