+2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * Makefile.am (ALL_MACHINES): Add cpu-crx.lo.
+ (ALL_MACHINES_CFILES): Add cpu-crx.c.
+ (BFD32_BACKENDS): Add elf32-crx.lo.
+ (BFD32_BACKENDS_CFILES): Add elf32-crx.c.
+ (cpu-crx.lo): New target.
+ (elf32-crx.lo): New target.
+ * Makefile.in: Regenerate.
+ * archures.c (bfd_architecture): Add bfd_{arch,mach}_crx.
+ (bfd_archures_list): Add bfd_crx_arch.
+ * bfd-in2.h: Regenerate.
+ * config.bfd: Handle crx-*-elf*, crx*.
+ * configure.in: Handle bfd_elf32_crx_vec.
+ * configure: Regenerate.
+ * cpu-crx.c: New file.
+ * elf32-crx.c: Likewise.
+ * libbfd.h: Regenerate.
+ * reloc.c: Add BFD_RELOC_CRX_REL4, BFD_RELOC_CRX_REL8,
+ BFD_RELOC_CRX_REL8_CMP, BFD_RELOC_CRX_REL16, BFD_RELOC_CRX_REL24,
+ BFD_RELOC_CRX_REL32, BFD_RELOC_CRX_REGREL12, BFD_RELOC_CRX_REGREL22,
+ BFD_RELOC_CRX_REGREL28, BFD_RELOC_CRX_REGREL32, BFD_RELOC_CRX_ABS16,
+ BFD_RELOC_CRX_ABS32, BFD_RELOC_CRX_NUM8, BFD_RELOC_CRX_NUM16,
+ BFD_RELOC_CRX_NUM32, BFD_RELOC_CRX_IMM16 and BFD_RELOC_CRX_IMM32
+ * targets.c (bfd_elf32_crx_vec): Declare.
+ (bfd_target_vector): Add bfd_elf32_crx_vec.
+
2004-07-06 Nick Clifton <nickc@redhat.com>
* config.bfd: Add sh-symbian-elf target.
* configure: Regenerate.
* elf-bfd.h (struct elf_backend_data): Add new field
'check_directives'.
- * elflink.c (elf_link_add_object_symbols): Invoke the
+ * elflink.c (elf_link_add_object_symbols): Invoke the
check_directives function, if defined.
- * elfxx-target.h: Provide a default, NULL definition for
+ * elfxx-target.h: Provide a default, NULL definition for
check_directives.
- * targets.c: Add bfd_elf32_shl_symbian_vec.
- * elf32-sh.c (sh_elf_swap_insns): Protect against unnecessary
+ * targets.c: Add bfd_elf32_shl_symbian_vec.
+ * elf32-sh.c (sh_elf_swap_insns): Protect against unnecessary
definition.
- (elf32_shlin_grok_prstatus, elf32_shlib_grok_psinfo,
+ (elf32_shlin_grok_prstatus, elf32_shlib_grok_psinfo,
* sh_elf_get_flags_from_mach, sh_elf_find_flags): Likewise.
- (TARGET_BIG_SYM, TARGET_LITTLE_SYM): Only define if they have
+ (TARGET_BIG_SYM, TARGET_LITTLE_SYM): Only define if they have
not already been defined.
- * elf32-sh64.c: Use SH_TARGET_ALREADY_DEFINED.
- * sh-symbian.c: New file. Provide functions to support the
+ * elf32-sh64.c: Use SH_TARGET_ALREADY_DEFINED.
+ * sh-symbian.c: New file. Provide functions to support the
* sh-symbian-elf target.
* Makefile.am: Add elf32-sh-symbian.c
* Makefile.in: Regenerate.
-
+
2004-07-05 Andrew Stubbs <andrew.stubbs@superh.com>
- * elf32-sh.c: Include ../opcodes/sh-opc.h .
- * Makefile.am: Ran make dep-am .
- * Makefile.in: Ran make dep-in .
+ * elf32-sh.c: Include ../opcodes/sh-opc.h.
+ * Makefile.am: Ran make dep-am.
+ * Makefile.in: Ran make dep-in.
2004-07-03 Aaron W. LaFramboise <aaron98wiridge9@aaronwl.com>
2004-06-29 Alan Modra <amodra@bigpond.net.au>
* bfd-in.h (bfd_get_section_limit): Define.
- * reloc.c (bfd_perform_relocation, bfd_install_relocation)
+ * reloc.c (bfd_perform_relocation, bfd_install_relocation)
(_bfd_final_link_relocate): Use bfd_get_section_limit.
* aout-tic30.c (tic30_aout_final_link_relocate): Likewise.
* coff-arm.c (coff_arm_relocate_section): Likewise.
(bfd_ns32k_final_link_relocate): Likewise.
* elf32-d30v.c (bfd_elf_d30v_reloc, bfd_elf_d30v_reloc_21): Likwise.
* elf32-dlx.c (_bfd_dlx_elf_hi16_reloc): Likewise.
- * elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc)
+ * elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc)
(i860_howto_highadj_reloc, i860_howto_splitn_reloc): Likewise.
- * elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc)
+ * elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc)
(m32r_elf_generic_reloc, m32r_elf_relocate_section): Likewise.
* elf32-m68hc1x.c (m68hc11_elf_special_reloc): Likewise.
* elf32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
* elf64-s390.c (s390_elf_ldisp_reloc): Likewise.
* elf64-sparc.c (init_insn_reloc): Likewise.
* elfn32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp)
- (_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_lo16_reloc)
+ * elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp)
+ (_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_lo16_reloc)
(_bfd_mips_elf_generic_reloc): Likewise.
* bfd-in2.h: Regenerate.
cpu-avr.lo \
cpu-cr16c.lo \
cpu-cris.lo \
+ cpu-crx.lo \
cpu-d10v.lo \
cpu-d30v.lo \
cpu-dlx.lo \
cpu-avr.c \
cpu-cris.c \
cpu-cr16c.c \
+ cpu-crx.c \
cpu-d10v.c \
cpu-d30v.c \
cpu-dlx.c \
elf32-avr.lo \
elf32-cr16c.lo \
elf32-cris.lo \
+ elf32-crx.lo \
elf32-d10v.lo \
elf32-d30v.lo \
elf32-dlx.lo \
elf32-avr.c \
elf32-cr16c.c \
elf32-cris.c \
+ elf32-crx.c \
elf32-d10v.c \
elf32-d30v.c \
elf32-dlx.c \
cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
+cpu-crx.lo: cpu-crx.c $(INCDIR)/filenames.h
cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
cpu-dlx.lo: cpu-dlx.c $(INCDIR)/filenames.h
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
+elf32-crx.lo: elf32-crx.c $(INCDIR)/filenames.h elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/elf/crx.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
elf32-d10v.lo: elf32-d10v.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/d10v.h $(INCDIR)/elf/reloc-macros.h \
cpu-avr.lo \
cpu-cr16c.lo \
cpu-cris.lo \
+ cpu-crx.lo \
cpu-d10v.lo \
cpu-d30v.lo \
cpu-dlx.lo \
cpu-avr.c \
cpu-cris.c \
cpu-cr16c.c \
+ cpu-crx.c \
cpu-d10v.c \
cpu-d30v.c \
cpu-dlx.c \
elf32-avr.lo \
elf32-cr16c.lo \
elf32-cris.lo \
+ elf32-crx.lo \
elf32-d10v.lo \
elf32-d30v.lo \
elf32-dlx.lo \
elf32-avr.c \
elf32-cr16c.c \
elf32-cris.c \
+ elf32-crx.c \
elf32-d10v.c \
elf32-d30v.c \
elf32-dlx.c \
cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
+cpu-crx.lo: cpu-crx.c $(INCDIR)/filenames.h
cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
cpu-dlx.lo: cpu-dlx.c $(INCDIR)/filenames.h
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
+elf32-crx.lo: elf32-crx.c $(INCDIR)/filenames.h elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/elf/crx.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
elf32-d10v.lo: elf32-d10v.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/d10v.h $(INCDIR)/elf/reloc-macros.h \
.#define bfd_mach_avr5 5
. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
.#define bfd_mach_cr16c 1
+. bfd_arch_crx, {* National Semiconductor CRX. *}
+.#define bfd_mach_crx 1
. bfd_arch_cris, {* Axis CRIS *}
. bfd_arch_s390, {* IBM s390 *}
.#define bfd_mach_s390_31 31
extern const bfd_arch_info_type bfd_avr_arch;
extern const bfd_arch_info_type bfd_cr16c_arch;
extern const bfd_arch_info_type bfd_cris_arch;
+extern const bfd_arch_info_type bfd_crx_arch;
extern const bfd_arch_info_type bfd_d10v_arch;
extern const bfd_arch_info_type bfd_d30v_arch;
extern const bfd_arch_info_type bfd_dlx_arch;
&bfd_avr_arch,
&bfd_cr16c_arch,
&bfd_cris_arch,
+ &bfd_crx_arch,
&bfd_d10v_arch,
&bfd_d30v_arch,
&bfd_dlx_arch,
#define bfd_mach_avr5 5
bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
#define bfd_mach_cr16c 1
+ bfd_arch_crx, /* National Semiconductor CRX. */
+#define bfd_mach_crx 1
bfd_arch_cris, /* Axis CRIS */
bfd_arch_s390, /* IBM s390 */
#define bfd_mach_s390_31 31
BFD_RELOC_16C_IMM32,
BFD_RELOC_16C_IMM32_C,
+/* NS CRX Relocations. */
+ BFD_RELOC_CRX_REL4,
+ BFD_RELOC_CRX_REL8,
+ BFD_RELOC_CRX_REL8_CMP,
+ BFD_RELOC_CRX_REL16,
+ BFD_RELOC_CRX_REL24,
+ BFD_RELOC_CRX_REL32,
+ BFD_RELOC_CRX_REGREL12,
+ BFD_RELOC_CRX_REGREL22,
+ BFD_RELOC_CRX_REGREL28,
+ BFD_RELOC_CRX_REGREL32,
+ BFD_RELOC_CRX_ABS16,
+ BFD_RELOC_CRX_ABS32,
+ BFD_RELOC_CRX_NUM8,
+ BFD_RELOC_CRX_NUM16,
+ BFD_RELOC_CRX_NUM32,
+ BFD_RELOC_CRX_IMM16,
+ BFD_RELOC_CRX_IMM32,
+
/* These relocs are only used within the CRIS assembler. They are not
(at present) written to any object files. */
BFD_RELOC_CRIS_BDISP8,
c30*) targ_archs=bfd_tic30_arch ;;
c4x*) targ_archs=bfd_tic4x_arch ;;
c54x*) targ_archs=bfd_tic54x_arch ;;
+crx*) targ_archs=bfd_crx_arch ;;
dlx*) targ_archs=bfd_dlx_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
i[3-7]86) targ_archs=bfd_i386_arch ;;
targ_underscore=yes # Note: not true for bfd_elf32_cris_vec.
;;
+ crx-*-elf*)
+ targ_defvec=bfd_elf32_crx_vec
+ targ_underscore=yes
+ ;;
+
d10v-*-*)
targ_defvec=bfd_elf32_d10v_vec
;;
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
+ bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
bfd_elf32_dlx_big_vec) tb="$tb elf32-dlx.lo elf32.lo $elf" ;;
if test -n "$GCC" ; then
bad_64bit_gcc=no;
echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6
-echo "configure:6573: checking for gcc version with buggy 64-bit support" >&5
+echo "configure:6574: checking for gcc version with buggy 64-bit support" >&5
# Add more tests for gcc versions with non-working 64-bit support here.
cat > conftest.$ac_ext <<EOF
-#line 6576 "configure"
+#line 6577 "configure"
#include "confdefs.h"
:__GNUC__:__GNUC_MINOR__:__i386__:
EOF
for ac_func in ftello ftello64 fseeko fseeko64
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6618: checking for $ac_func" >&5
+echo "configure:6619: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6623 "configure"
+#line 6624 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:6646: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
if test x"$ac_cv_func_ftello" = xyes -a x"$ac_cv_func_fseeko" = xyes; then
echo $ac_n "checking size of off_t""... $ac_c" 1>&6
-echo "configure:6672: checking size of off_t" >&5
+echo "configure:6673: checking size of off_t" >&5
if eval "test \"`echo '$''{'ac_cv_sizeof_off_t'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
for ac_size in 4 8 1 2 16 12 ; do # List sizes in rough order of prevalence.
cat > conftest.$ac_ext <<EOF
-#line 6678 "configure"
+#line 6679 "configure"
#include "confdefs.h"
#include "confdefs.h"
#include <sys/types.h>
switch (0) case 0: case (sizeof (off_t) == $ac_size):;
; return 0; }
EOF
-if { (eval echo configure:6688: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:6689: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_sizeof_off_t=$ac_size
else
fi
echo $ac_n "checking file_ptr type""... $ac_c" 1>&6
-echo "configure:6712: checking file_ptr type" >&5
+echo "configure:6713: checking file_ptr type" >&5
bfd_file_ptr="long"
bfd_ufile_ptr="unsigned long"
if test x"$ac_cv_func_ftello64" = xyes -a x"$ac_cv_func_fseeko64" = xyes \
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:6737: checking for $ac_hdr" >&5
+echo "configure:6738: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6742 "configure"
+#line 6743 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:6747: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:6748: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6776: checking for $ac_func" >&5
+echo "configure:6777: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6781 "configure"
+#line 6782 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:6804: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6805: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:6829: checking for working mmap" >&5
+echo "configure:6830: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
-#line 6837 "configure"
+#line 6838 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
}
EOF
-if { (eval echo configure:6977: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:6978: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
for ac_func in madvise mprotect
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:7002: checking for $ac_func" >&5
+echo "configure:7003: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 7007 "configure"
+#line 7008 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:7030: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:7031: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
+ bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
bfd_elf32_dlx_big_vec) tb="$tb elf32-dlx.lo elf32.lo $elf" ;;
--- /dev/null
+/* BFD support for the CRX processor.
+ Copyright 2004 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+
+const bfd_arch_info_type bfd_crx_arch =
+ {
+ 16, /* 16 bits in a word. */
+ 32, /* 32 bits in an address. */
+ 8, /* 8 bits in a byte. */
+ bfd_arch_crx, /* enum bfd_architecture arch. */
+ bfd_mach_crx,
+ "crx", /* Arch name. */
+ "crx", /* Printable name. */
+ 1, /* Unsigned int section alignment power. */
+ TRUE, /* The one and only. */
+ bfd_default_compatible,
+ bfd_default_scan ,
+ 0,
+ };
--- /dev/null
+/* BFD back-end for National Semiconductor's CRX ELF
+ Copyright 2004 Free Software Foundation, Inc.
+ Written by Tomer Levi, NSC, Israel.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "bfdlink.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+#include "elf/crx.h"
+
+static reloc_howto_type *elf_crx_reloc_type_lookup
+ (bfd *, bfd_reloc_code_real_type);
+static void elf_crx_info_to_howto
+ (bfd *, arelent *, Elf_Internal_Rela *);
+static bfd_boolean elf32_crx_relax_delete_bytes
+ (bfd *, asection *, bfd_vma, int);
+static bfd_reloc_status_type crx_elf_final_link_relocate
+ (reloc_howto_type *, bfd *, bfd *, asection *,
+ bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
+ struct bfd_link_info *, asection *, int);
+static bfd_boolean elf32_crx_relocate_section
+ (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
+ Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
+static asection * elf32_crx_gc_mark_hook
+ (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
+ struct elf_link_hash_entry *, Elf_Internal_Sym *);
+static bfd_boolean elf32_crx_gc_sweep_hook
+ (bfd *, struct bfd_link_info *, asection *,
+ const Elf_Internal_Rela *);
+static bfd_boolean elf32_crx_relax_section
+ (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
+static bfd_byte * elf32_crx_get_relocated_section_contents
+ (bfd *, struct bfd_link_info *, struct bfd_link_order *,
+ bfd_byte *, bfd_boolean, asymbol **);
+
+/* crx_reloc_map array maps BFD relocation enum into a CRGAS relocation type. */
+
+struct crx_reloc_map
+{
+ bfd_reloc_code_real_type bfd_reloc_enum; /* BFD relocation enum. */
+ unsigned short crx_reloc_type; /* CRX relocation type. */
+};
+
+static const struct crx_reloc_map crx_reloc_map[R_CRX_MAX] =
+{
+ {BFD_RELOC_NONE, R_CRX_NONE},
+ {BFD_RELOC_CRX_REL4, R_CRX_REL4},
+ {BFD_RELOC_CRX_REL8, R_CRX_REL8},
+ {BFD_RELOC_CRX_REL8_CMP, R_CRX_REL8_CMP},
+ {BFD_RELOC_CRX_REL16, R_CRX_REL16},
+ {BFD_RELOC_CRX_REL24, R_CRX_REL24},
+ {BFD_RELOC_CRX_REL32, R_CRX_REL32},
+ {BFD_RELOC_CRX_REGREL12, R_CRX_REGREL12},
+ {BFD_RELOC_CRX_REGREL22, R_CRX_REGREL22},
+ {BFD_RELOC_CRX_REGREL28, R_CRX_REGREL28},
+ {BFD_RELOC_CRX_REGREL32, R_CRX_REGREL32},
+ {BFD_RELOC_CRX_ABS16, R_CRX_ABS16},
+ {BFD_RELOC_CRX_ABS32, R_CRX_ABS32},
+ {BFD_RELOC_CRX_NUM8, R_CRX_NUM8},
+ {BFD_RELOC_CRX_NUM16, R_CRX_NUM16},
+ {BFD_RELOC_CRX_NUM32, R_CRX_NUM32},
+ {BFD_RELOC_CRX_IMM16, R_CRX_IMM16},
+ {BFD_RELOC_CRX_IMM32, R_CRX_IMM32}
+};
+
+static reloc_howto_type crx_elf_howto_table[] =
+{
+ HOWTO (R_CRX_NONE, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_NONE", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL4, /* type */
+ 1, /* rightshift */
+ 0, /* size */
+ 4, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL4", /* name */
+ FALSE, /* partial_inplace */
+ 0xf, /* src_mask */
+ 0xf, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL8, /* type */
+ 1, /* rightshift */
+ 0, /* size */
+ 8, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL8", /* name */
+ FALSE, /* partial_inplace */
+ 0xff, /* src_mask */
+ 0xff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL8_CMP, /* type */
+ 1, /* rightshift */
+ 0, /* size */
+ 8, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL8_CMP", /* name */
+ FALSE, /* partial_inplace */
+ 0xff, /* src_mask */
+ 0xff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL16, /* type */
+ 1, /* rightshift */
+ 1, /* size */
+ 16, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL16", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL24, /* type */
+ 1, /* rightshift */
+ 2, /* size */
+ 24, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL24", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffff, /* src_mask */
+ 0xffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL32, /* type */
+ 1, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REGREL12, /* type */
+ 0, /* rightshift */
+ 1, /* size */
+ 12, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REGREL12", /* name */
+ FALSE, /* partial_inplace */
+ 0xfff, /* src_mask */
+ 0xfff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REGREL22, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 22, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REGREL22", /* name */
+ FALSE, /* partial_inplace */
+ 0x3fffff, /* src_mask */
+ 0x3fffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REGREL28, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 28, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REGREL28", /* name */
+ FALSE, /* partial_inplace */
+ 0xfffffff, /* src_mask */
+ 0xfffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REGREL32, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REGREL32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_ABS16, /* type */
+ 0, /* rightshift */
+ 1, /* size */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_ABS16", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_ABS32, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_ABS32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_NUM8, /* type */
+ 0, /* rightshift */
+ 0, /* size */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_NUM8", /* name */
+ FALSE, /* partial_inplace */
+ 0xff, /* src_mask */
+ 0xff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_NUM16, /* type */
+ 0, /* rightshift */
+ 1, /* size */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_NUM16", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_NUM32, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_NUM32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_IMM16, /* type */
+ 0, /* rightshift */
+ 1, /* size */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_IMM16", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_IMM32, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_IMM32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE) /* pcrel_offset */
+};
+
+/* Retrieve a howto ptr using a BFD reloc_code. */
+
+static reloc_howto_type *
+elf_crx_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ bfd_reloc_code_real_type code)
+{
+ unsigned int i;
+
+ for (i = 0; i < R_CRX_MAX; i++)
+ if (code == crx_reloc_map[i].bfd_reloc_enum)
+ return &crx_elf_howto_table[crx_reloc_map[i].crx_reloc_type];
+
+ printf ("This relocation Type is not supported -0x%x\n", code);
+ return 0;
+}
+
+/* Retrieve a howto ptr using an internal relocation entry. */
+
+static void
+elf_crx_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
+ Elf_Internal_Rela *dst)
+{
+ unsigned int r_type = ELF32_R_TYPE (dst->r_info);
+ BFD_ASSERT (r_type < (unsigned int) R_CRX_MAX);
+ cache_ptr->howto = &crx_elf_howto_table[r_type];
+}
+
+/* Perform a relocation as part of a final link. */
+
+static bfd_reloc_status_type
+crx_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ asection *input_section, bfd_byte *contents,
+ bfd_vma offset, bfd_vma Rvalue, bfd_vma addend,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ asection *sec ATTRIBUTE_UNUSED,
+ int is_local ATTRIBUTE_UNUSED)
+{
+ unsigned short r_type = howto->type;
+ bfd_byte *hit_data = contents + offset;
+ bfd_vma reloc_bits, check;
+
+ switch (r_type)
+ {
+ case R_CRX_IMM16:
+ case R_CRX_IMM32:
+ case R_CRX_ABS16:
+ case R_CRX_ABS32:
+ case R_CRX_REL8_CMP:
+ case R_CRX_REL16:
+ case R_CRX_REL24:
+ case R_CRX_REL32:
+ case R_CRX_REGREL12:
+ case R_CRX_REGREL22:
+ case R_CRX_REGREL28:
+ case R_CRX_REGREL32:
+ /* 'hit_data' is relative to the start of the instruction, not the
+ relocation offset. Advance it to account for the exact offset. */
+ hit_data += 2;
+ break;
+
+ case R_CRX_REL4:
+ /* This relocation type is used only in 'Branch if Equal to 0'
+ instructions and requires special handling. */
+ Rvalue -= 1;
+ break;
+
+ case R_CRX_NONE:
+ return bfd_reloc_ok;
+ break;
+
+ default:
+ break;
+ }
+
+ if (howto->pc_relative)
+ {
+ /* Subtract the address of the section containing the location. */
+ Rvalue -= (input_section->output_section->vma
+ + input_section->output_offset);
+ /* Subtract the position of the location within the section. */
+ Rvalue -= offset;
+ }
+
+ /* Add in supplied addend. */
+ Rvalue += addend;
+
+ /* Complain if the bitfield overflows, whether it is considered
+ as signed or unsigned. */
+ check = Rvalue >> howto->rightshift;
+
+ /* Assumes two's complement. This expression avoids
+ overflow if howto->bitsize is the number of bits in
+ bfd_vma. */
+ reloc_bits = (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
+
+ if (((bfd_vma) check & ~reloc_bits) != 0
+ && (((bfd_vma) check & ~reloc_bits)
+ != (-(bfd_vma) 1 & ~reloc_bits)))
+ {
+ /* The above right shift is incorrect for a signed
+ value. See if turning on the upper bits fixes the
+ overflow. */
+ if (howto->rightshift && (bfd_signed_vma) Rvalue < 0)
+ {
+ check |= ((bfd_vma) - 1
+ & ~((bfd_vma) - 1
+ >> howto->rightshift));
+ if (((bfd_vma) check & ~reloc_bits)
+ != (-(bfd_vma) 1 & ~reloc_bits))
+ return bfd_reloc_overflow;
+ }
+ else
+ return bfd_reloc_overflow;
+ }
+
+ /* Drop unwanted bits from the value we are relocating to. */
+ Rvalue >>= (bfd_vma) howto->rightshift;
+
+ /* Apply dst_mask to select only relocatable part of the insn. */
+ Rvalue &= howto->dst_mask;
+
+ switch (howto->size)
+ {
+ case 0:
+ if (r_type == R_CRX_REL4)
+ {
+ Rvalue <<= 4;
+ Rvalue |= (bfd_get_8 (input_bfd, hit_data) & 0x0f);
+ }
+
+ bfd_put_8 (input_bfd, (unsigned char) Rvalue, hit_data);
+ break;
+
+ case 1:
+ if (r_type == R_CRX_REGREL12)
+ Rvalue |= (bfd_get_16 (input_bfd, hit_data) & 0xf000);
+
+ bfd_put_16 (input_bfd, Rvalue, hit_data);
+ break;
+
+ case 2:
+ if (r_type == R_CRX_REL24
+ || r_type == R_CRX_REGREL22
+ || r_type == R_CRX_REGREL28)
+ Rvalue |= (((bfd_get_16 (input_bfd, hit_data) << 16) |
+ bfd_get_16 (input_bfd, hit_data + 2)) & ~howto->dst_mask);
+
+ if (r_type == R_CRX_NUM32)
+ /* Relocation on DATA is purely little-endian, that is, for a
+ multi-byte datum, the lowest address in memory contains the
+ little end of the datum, that is, the least significant byte.
+ Therefore we use BFD's byte Putting functions. */
+ bfd_put_32 (input_bfd, Rvalue, hit_data);
+ else
+ /* Relocation on INSTRUCTIONS is different : Instructions are
+ word-addressable, that is, each word itself is arranged according
+ to little-endian convention, whereas the words are arranged with
+ respect to one another in BIG ENDIAN fashion.
+ When there is an immediate value that spans a word boundary, it is
+ split in a big-endian way with respect to the words. */
+ {
+ bfd_put_16 (input_bfd, (Rvalue >> 16) & 0xffff, hit_data);
+ bfd_put_16 (input_bfd, Rvalue & 0xffff, hit_data + 2);
+ }
+ break;
+
+ default:
+ return bfd_reloc_notsupported;
+ }
+
+ return bfd_reloc_ok;
+}
+
+/* Delete some bytes from a section while relaxing. */
+
+static bfd_boolean
+elf32_crx_relax_delete_bytes (bfd *abfd, asection *sec,
+ bfd_vma addr, int count)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ unsigned int sec_shndx;
+ bfd_byte *contents;
+ Elf_Internal_Rela *irel, *irelend;
+ Elf_Internal_Rela *irelalign;
+ bfd_vma toaddr;
+ Elf_Internal_Sym *isym;
+ Elf_Internal_Sym *isymend;
+ struct elf_link_hash_entry **sym_hashes;
+ struct elf_link_hash_entry **end_hashes;
+ unsigned int symcount;
+
+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
+
+ contents = elf_section_data (sec)->this_hdr.contents;
+
+ /* The deletion must stop at the next ALIGN reloc for an aligment
+ power larger than the number of bytes we are deleting. */
+
+ irelalign = NULL;
+ toaddr = sec->size;
+
+ irel = elf_section_data (sec)->relocs;
+ irelend = irel + sec->reloc_count;
+
+ /* Actually delete the bytes. */
+ memmove (contents + addr, contents + addr + count,
+ (size_t) (toaddr - addr - count));
+ sec->size -= count;
+
+ /* Adjust all the relocs. */
+ for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
+ {
+ /* Get the new reloc address. */
+ if ((irel->r_offset > addr
+ && irel->r_offset < toaddr))
+ irel->r_offset -= count;
+ }
+
+ /* Adjust the local symbols defined in this section. */
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ isym = (Elf_Internal_Sym *) symtab_hdr->contents;
+ for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
+ {
+ if (isym->st_shndx == sec_shndx
+ && isym->st_value > addr
+ && isym->st_value < toaddr)
+ isym->st_value -= count;
+ }
+
+ /* Now adjust the global symbols defined in this section. */
+ symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
+ - symtab_hdr->sh_info);
+ sym_hashes = elf_sym_hashes (abfd);
+ end_hashes = sym_hashes + symcount;
+
+ for (; sym_hashes < end_hashes; sym_hashes++)
+ {
+ struct elf_link_hash_entry *sym_hash = *sym_hashes;
+
+ if ((sym_hash->root.type == bfd_link_hash_defined
+ || sym_hash->root.type == bfd_link_hash_defweak)
+ && sym_hash->root.u.def.section == sec
+ && sym_hash->root.u.def.value > addr
+ && sym_hash->root.u.def.value < toaddr)
+ sym_hash->root.u.def.value -= count;
+ }
+
+ return TRUE;
+}
+
+/* This is a version of bfd_generic_get_relocated_section_contents
+ which uses elf32_crx_relocate_section. */
+
+static bfd_byte *
+elf32_crx_get_relocated_section_contents (bfd *output_bfd,
+ struct bfd_link_info *link_info,
+ struct bfd_link_order *link_order,
+ bfd_byte *data,
+ bfd_boolean relocatable,
+ asymbol **symbols)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ asection *input_section = link_order->u.indirect.section;
+ bfd *input_bfd = input_section->owner;
+ asection **sections = NULL;
+ Elf_Internal_Rela *internal_relocs = NULL;
+ Elf_Internal_Sym *isymbuf = NULL;
+
+ /* We only need to handle the case of relaxing, or of having a
+ particular set of section contents, specially. */
+ if (relocatable
+ || elf_section_data (input_section)->this_hdr.contents == NULL)
+ return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
+ link_order, data,
+ relocatable,
+ symbols);
+
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+
+ memcpy (data, elf_section_data (input_section)->this_hdr.contents,
+ (size_t) input_section->size);
+
+ if ((input_section->flags & SEC_RELOC) != 0
+ && input_section->reloc_count > 0)
+ {
+ Elf_Internal_Sym *isym;
+ Elf_Internal_Sym *isymend;
+ asection **secpp;
+ bfd_size_type amt;
+
+ internal_relocs = (_bfd_elf_link_read_relocs
+ (input_bfd, input_section, (PTR) NULL,
+ (Elf_Internal_Rela *) NULL, FALSE));
+ if (internal_relocs == NULL)
+ goto error_return;
+
+ if (symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ goto error_return;
+ }
+
+ amt = symtab_hdr->sh_info;
+ amt *= sizeof (asection *);
+ sections = bfd_malloc (amt);
+ if (sections == NULL && amt != 0)
+ goto error_return;
+
+ isymend = isymbuf + symtab_hdr->sh_info;
+ for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
+ {
+ asection *isec;
+
+ if (isym->st_shndx == SHN_UNDEF)
+ isec = bfd_und_section_ptr;
+ else if (isym->st_shndx == SHN_ABS)
+ isec = bfd_abs_section_ptr;
+ else if (isym->st_shndx == SHN_COMMON)
+ isec = bfd_com_section_ptr;
+ else
+ isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
+
+ *secpp = isec;
+ }
+
+ if (! elf32_crx_relocate_section (output_bfd, link_info, input_bfd,
+ input_section, data, internal_relocs,
+ isymbuf, sections))
+ goto error_return;
+
+ if (sections != NULL)
+ free (sections);
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (elf_section_data (input_section)->relocs != internal_relocs)
+ free (internal_relocs);
+ }
+
+ return data;
+
+ error_return:
+ if (sections != NULL)
+ free (sections);
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (internal_relocs != NULL
+ && elf_section_data (input_section)->relocs != internal_relocs)
+ free (internal_relocs);
+ return NULL;
+}
+
+/* Relocate a CRX ELF section. */
+
+static bfd_boolean
+elf32_crx_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
+ bfd *input_bfd, asection *input_section,
+ bfd_byte *contents, Elf_Internal_Rela *relocs,
+ Elf_Internal_Sym *local_syms,
+ asection **local_sections)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ Elf_Internal_Rela *rel, *relend;
+
+ if (info->relocatable)
+ return TRUE;
+
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (input_bfd);
+
+ rel = relocs;
+ relend = relocs + input_section->reloc_count;
+ for (; rel < relend; rel++)
+ {
+ int r_type;
+ reloc_howto_type *howto;
+ unsigned long r_symndx;
+ Elf_Internal_Sym *sym;
+ asection *sec;
+ struct elf_link_hash_entry *h;
+ bfd_vma relocation;
+ bfd_reloc_status_type r;
+
+ r_symndx = ELF32_R_SYM (rel->r_info);
+ r_type = ELF32_R_TYPE (rel->r_info);
+ howto = crx_elf_howto_table + (r_type);
+
+ h = NULL;
+ sym = NULL;
+ sec = NULL;
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ sym = local_syms + r_symndx;
+ sec = local_sections[r_symndx];
+ relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
+ }
+ else
+ {
+ bfd_boolean unresolved_reloc, warned;
+
+ RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
+ r_symndx, symtab_hdr, sym_hashes,
+ h, sec, relocation,
+ unresolved_reloc, warned);
+ }
+
+ r = crx_elf_final_link_relocate (howto, input_bfd, output_bfd,
+ input_section,
+ contents, rel->r_offset,
+ relocation, rel->r_addend,
+ info, sec, h == NULL);
+
+ if (r != bfd_reloc_ok)
+ {
+ const char *name;
+ const char *msg = (const char *) 0;
+
+ if (h != NULL)
+ name = h->root.root.string;
+ else
+ {
+ name = (bfd_elf_string_from_elf_section
+ (input_bfd, symtab_hdr->sh_link, sym->st_name));
+ if (name == NULL || *name == '\0')
+ name = bfd_section_name (input_bfd, sec);
+ }
+
+ switch (r)
+ {
+ case bfd_reloc_overflow:
+ if (!((*info->callbacks->reloc_overflow)
+ (info, name, howto->name, (bfd_vma) 0,
+ input_bfd, input_section, rel->r_offset)))
+ return FALSE;
+ break;
+
+ case bfd_reloc_undefined:
+ if (!((*info->callbacks->undefined_symbol)
+ (info, name, input_bfd, input_section,
+ rel->r_offset, TRUE)))
+ return FALSE;
+ break;
+
+ case bfd_reloc_outofrange:
+ msg = _("internal error: out of range error");
+ goto common_error;
+
+ case bfd_reloc_notsupported:
+ msg = _("internal error: unsupported relocation error");
+ goto common_error;
+
+ case bfd_reloc_dangerous:
+ msg = _("internal error: dangerous error");
+ goto common_error;
+
+ default:
+ msg = _("internal error: unknown error");
+ /* Fall through. */
+
+ common_error:
+ if (!((*info->callbacks->warning)
+ (info, msg, name, input_bfd, input_section,
+ rel->r_offset)))
+ return FALSE;
+ break;
+ }
+ }
+ }
+
+ return TRUE;
+}
+
+/* This function handles relaxing for the CRX.
+
+ There's quite a few relaxing opportunites available on the CRX:
+
+ * bal/bcond:32 -> bal/bcond:16 2 bytes
+ * bcond:16 -> bcond:8 2 bytes
+ * cmpbcond:24 -> cmpbcond:8 2 bytes
+ * arithmetic imm32 -> arithmetic imm16 2 bytes
+
+ Symbol- and reloc-reading infrastructure copied from elf-m10200.c. */
+
+static bfd_boolean
+elf32_crx_relax_section (bfd *abfd, asection *sec,
+ struct bfd_link_info *link_info, bfd_boolean *again)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ Elf_Internal_Rela *internal_relocs;
+ Elf_Internal_Rela *irel, *irelend;
+ bfd_byte *contents = NULL;
+ Elf_Internal_Sym *isymbuf = NULL;
+
+ /* Assume nothing changes. */
+ *again = FALSE;
+
+ /* We don't have to do anything for a relocatable link, if
+ this section does not have relocs, or if this is not a
+ code section. */
+ if (link_info->relocatable
+ || (sec->flags & SEC_RELOC) == 0
+ || sec->reloc_count == 0
+ || (sec->flags & SEC_CODE) == 0)
+ return TRUE;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+
+ /* Get a copy of the native relocations. */
+ internal_relocs = (_bfd_elf_link_read_relocs
+ (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
+ link_info->keep_memory));
+ if (internal_relocs == NULL)
+ goto error_return;
+
+ /* Walk through them looking for relaxing opportunities. */
+ irelend = internal_relocs + sec->reloc_count;
+ for (irel = internal_relocs; irel < irelend; irel++)
+ {
+ bfd_vma symval;
+
+ /* If this isn't something that can be relaxed, then ignore
+ this reloc. */
+ if (ELF32_R_TYPE (irel->r_info) != (int) R_CRX_REL32
+ && ELF32_R_TYPE (irel->r_info) != (int) R_CRX_REL16
+ && ELF32_R_TYPE (irel->r_info) != (int) R_CRX_REL24
+ && ELF32_R_TYPE (irel->r_info) != (int) R_CRX_IMM32)
+ continue;
+
+ /* Get the section contents if we haven't done so already. */
+ if (contents == NULL)
+ {
+ /* Get cached copy if it exists. */
+ if (elf_section_data (sec)->this_hdr.contents != NULL)
+ contents = elf_section_data (sec)->this_hdr.contents;
+ /* Go get them off disk. */
+ else if (!bfd_malloc_and_get_section (abfd, sec, &contents))
+ goto error_return;
+ }
+
+ /* Read this BFD's local symbols if we haven't done so already. */
+ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ goto error_return;
+ }
+
+ /* Get the value of the symbol referred to by the reloc. */
+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ Elf_Internal_Sym *isym;
+ asection *sym_sec;
+
+ isym = isymbuf + ELF32_R_SYM (irel->r_info);
+ if (isym->st_shndx == SHN_UNDEF)
+ sym_sec = bfd_und_section_ptr;
+ else if (isym->st_shndx == SHN_ABS)
+ sym_sec = bfd_abs_section_ptr;
+ else if (isym->st_shndx == SHN_COMMON)
+ sym_sec = bfd_com_section_ptr;
+ else
+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ symval = (isym->st_value
+ + sym_sec->output_section->vma
+ + sym_sec->output_offset);
+ }
+ else
+ {
+ unsigned long indx;
+ struct elf_link_hash_entry *h;
+
+ /* An external symbol. */
+ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
+ h = elf_sym_hashes (abfd)[indx];
+ BFD_ASSERT (h != NULL);
+
+ if (h->root.type != bfd_link_hash_defined
+ && h->root.type != bfd_link_hash_defweak)
+ /* This appears to be a reference to an undefined
+ symbol. Just ignore it--it will be caught by the
+ regular reloc processing. */
+ continue;
+
+ symval = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+ }
+
+ /* For simplicity of coding, we are going to modify the section
+ contents, the section relocs, and the BFD symbol table. We
+ must tell the rest of the code not to free up this
+ information. It would be possible to instead create a table
+ of changes which have to be made, as is done in coff-mips.c;
+ that would be more work, but would require less memory when
+ the linker is run. */
+
+ /* Try to turn a 32bit pc-relative branch/call into
+ a 16bit pc-relative branch/call. */
+ if (ELF32_R_TYPE (irel->r_info) == (int) R_CRX_REL32)
+ {
+ bfd_vma value = symval;
+
+ /* Deal with pc-relative gunk. */
+ value -= (sec->output_section->vma + sec->output_offset);
+ value -= irel->r_offset;
+ value += irel->r_addend;
+
+ /* See if the value will fit in 16 bits, note the high value is
+ 0xfffe + 2 as the target will be two bytes closer if we are
+ able to relax. */
+ if ((long) value < 0x10000 && (long) value > -0x10002)
+ {
+ unsigned short code;
+
+ /* Get the opcode. */
+ code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
+
+ /* Verify it's a 'bal'/'bcond' and fix the opcode. */
+ if ((code & 0xfff0) == 0x3170)
+ bfd_put_8 (abfd, 0x30, contents + irel->r_offset + 1);
+ else if ((code & 0xf0ff) == 0x707f)
+ bfd_put_8 (abfd, 0x7e, contents + irel->r_offset);
+ else
+ continue;
+
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
+ R_CRX_REL16);
+
+ /* Delete two bytes of data. */
+ if (!elf32_crx_relax_delete_bytes (abfd, sec,
+ irel->r_offset + 2, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
+ }
+
+ /* Try to turn a 16bit pc-relative branch into an
+ 8bit pc-relative branch. */
+ if (ELF32_R_TYPE (irel->r_info) == (int) R_CRX_REL16)
+ {
+ bfd_vma value = symval;
+
+ /* Deal with pc-relative gunk. */
+ value -= (sec->output_section->vma + sec->output_offset);
+ value -= irel->r_offset;
+ value += irel->r_addend;
+
+ /* See if the value will fit in 8 bits, note the high value is
+ 0xfc + 2 as the target will be two bytes closer if we are
+ able to relax. */
+ if ((long) value < 0xfe && (long) value > -0x100)
+ {
+ unsigned short code;
+
+ /* Get the opcode. */
+ code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
+
+ /* Verify it's a 'bcond' opcode. */
+ if ((code & 0xf0ff) != 0x707e)
+ continue;
+
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
+ R_CRX_REL8);
+
+ /* Delete two bytes of data. */
+ if (!elf32_crx_relax_delete_bytes (abfd, sec,
+ irel->r_offset + 2, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
+ }
+
+ /* Try to turn a 24bit pc-relative cmp&branch into
+ an 8bit pc-relative cmp&branch. */
+ if (ELF32_R_TYPE (irel->r_info) == (int) R_CRX_REL24)
+ {
+ bfd_vma value = symval;
+
+ /* Deal with pc-relative gunk. */
+ value -= (sec->output_section->vma + sec->output_offset);
+ value -= irel->r_offset;
+ value += irel->r_addend;
+
+ /* See if the value will fit in 8 bits, note the high value is
+ 0x7e + 2 as the target will be two bytes closer if we are
+ able to relax. */
+ if ((long) value < 0x100 && (long) value > -0x100)
+ {
+ unsigned short code;
+
+ /* Get the opcode. */
+ code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
+
+ /* Verify it's a 'cmp&branch' opcode. */
+ if ((code & 0xfff0) != 0x3180 && (code & 0xfff0) != 0x3190
+ && (code & 0xfff0) != 0x31a0 && (code & 0xfff0) != 0x31c0
+ && (code & 0xfff0) != 0x31d0 && (code & 0xfff0) != 0x31e0)
+ continue;
+
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Fix the opcode. */
+ bfd_put_8 (abfd, 0x30, contents + irel->r_offset + 1);
+
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
+ R_CRX_REL8_CMP);
+
+ /* Delete two bytes of data. */
+ if (!elf32_crx_relax_delete_bytes (abfd, sec,
+ irel->r_offset + 4, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
+ }
+
+ /* Try to turn a 32bit immediate address into
+ a 16bit immediate address. */
+ if (ELF32_R_TYPE (irel->r_info) == (int) R_CRX_IMM32)
+ {
+ bfd_vma value = symval;
+
+ /* See if the value will fit in 16 bits. */
+ if ((long) value < 0x7fff && (long) value > -0x8000)
+ {
+ unsigned short code;
+
+ /* Get the opcode. */
+ code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
+
+ /* Verify it's a 'arithmetic double'. */
+ if ((code & 0xf0f0) != 0x20f0)
+ continue;
+
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Fix the opcode. */
+ bfd_put_8 (abfd, (code & 0xff) - 0x10, contents + irel->r_offset);
+
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
+ R_CRX_IMM16);
+
+ /* Delete two bytes of data. */
+ if (!elf32_crx_relax_delete_bytes (abfd, sec,
+ irel->r_offset + 2, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
+ }
+ }
+
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ {
+ if (! link_info->keep_memory)
+ free (isymbuf);
+ else
+ {
+ /* Cache the symbols for elf_link_input_bfd. */
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+ }
+ }
+
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ {
+ if (! link_info->keep_memory)
+ free (contents);
+ else
+ {
+ /* Cache the section contents for elf_link_input_bfd. */
+ elf_section_data (sec)->this_hdr.contents = contents;
+ }
+ }
+
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return TRUE;
+
+ error_return:
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ free (contents);
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return FALSE;
+}
+
+static asection *
+elf32_crx_gc_mark_hook (asection *sec,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ Elf_Internal_Rela *rel ATTRIBUTE_UNUSED,
+ struct elf_link_hash_entry *h,
+ Elf_Internal_Sym *sym)
+{
+ if (h == NULL)
+ return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
+
+ switch (h->root.type)
+ {
+ case bfd_link_hash_defined:
+ case bfd_link_hash_defweak:
+ return h->root.u.def.section;
+
+ case bfd_link_hash_common:
+ return h->root.u.c.p->section;
+
+ default:
+ return NULL;
+ }
+}
+
+/* Update the got entry reference counts for the section being removed. */
+
+static bfd_boolean
+elf32_crx_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ asection *sec ATTRIBUTE_UNUSED,
+ const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED)
+{
+ /* We don't support garbage collection of GOT and PLT relocs yet. */
+ return TRUE;
+}
+
+/* Definitions for setting CRX target vector. */
+#define TARGET_LITTLE_SYM bfd_elf32_crx_vec
+#define TARGET_LITTLE_NAME "elf32-crx"
+#define ELF_ARCH bfd_arch_crx
+#define ELF_MACHINE_CODE EM_CRX
+#define ELF_MAXPAGESIZE 0x1
+#define elf_symbol_leading_char '_'
+
+#define bfd_elf32_bfd_reloc_type_lookup elf_crx_reloc_type_lookup
+#define elf_info_to_howto elf_crx_info_to_howto
+#define elf_info_to_howto_rel 0
+#define elf_backend_relocate_section elf32_crx_relocate_section
+#define bfd_elf32_bfd_relax_section elf32_crx_relax_section
+#define bfd_elf32_bfd_get_relocated_section_contents \
+ elf32_crx_get_relocated_section_contents
+#define elf_backend_gc_mark_hook elf32_crx_gc_mark_hook
+#define elf_backend_gc_sweep_hook elf32_crx_gc_sweep_hook
+#define elf_backend_can_gc_sections 1
+#define elf_backend_rela_normal 1
+
+#include "elf32-target.h"
"BFD_RELOC_16C_IMM24_C",
"BFD_RELOC_16C_IMM32",
"BFD_RELOC_16C_IMM32_C",
+ "BFD_RELOC_CRX_REL4",
+ "BFD_RELOC_CRX_REL8",
+ "BFD_RELOC_CRX_REL8_CMP",
+ "BFD_RELOC_CRX_REL16",
+ "BFD_RELOC_CRX_REL24",
+ "BFD_RELOC_CRX_REL32",
+ "BFD_RELOC_CRX_REGREL12",
+ "BFD_RELOC_CRX_REGREL22",
+ "BFD_RELOC_CRX_REGREL28",
+ "BFD_RELOC_CRX_REGREL32",
+ "BFD_RELOC_CRX_ABS16",
+ "BFD_RELOC_CRX_ABS32",
+ "BFD_RELOC_CRX_NUM8",
+ "BFD_RELOC_CRX_NUM16",
+ "BFD_RELOC_CRX_NUM32",
+ "BFD_RELOC_CRX_IMM16",
+ "BFD_RELOC_CRX_IMM32",
"BFD_RELOC_CRIS_BDISP8",
"BFD_RELOC_CRIS_UNSIGNED_5",
"BFD_RELOC_CRIS_SIGNED_6",
ENUMDOC
NS CR16C Relocations.
+ENUM
+ BFD_RELOC_CRX_REL4
+ENUMX
+ BFD_RELOC_CRX_REL8
+ENUMX
+ BFD_RELOC_CRX_REL8_CMP
+ENUMX
+ BFD_RELOC_CRX_REL16
+ENUMX
+ BFD_RELOC_CRX_REL24
+ENUMX
+ BFD_RELOC_CRX_REL32
+ENUMX
+ BFD_RELOC_CRX_REGREL12
+ENUMX
+ BFD_RELOC_CRX_REGREL22
+ENUMX
+ BFD_RELOC_CRX_REGREL28
+ENUMX
+ BFD_RELOC_CRX_REGREL32
+ENUMX
+ BFD_RELOC_CRX_ABS16
+ENUMX
+ BFD_RELOC_CRX_ABS32
+ENUMX
+ BFD_RELOC_CRX_NUM8
+ENUMX
+ BFD_RELOC_CRX_NUM16
+ENUMX
+ BFD_RELOC_CRX_NUM32
+ENUMX
+ BFD_RELOC_CRX_IMM16
+ENUMX
+ BFD_RELOC_CRX_IMM32
+ENUMDOC
+ NS CRX Relocations.
+
ENUM
BFD_RELOC_CRIS_BDISP8
ENUMX
extern const bfd_target bfd_elf32_bigmips_vec;
extern const bfd_target bfd_elf32_cr16c_vec;
extern const bfd_target bfd_elf32_cris_vec;
+extern const bfd_target bfd_elf32_crx_vec;
extern const bfd_target bfd_elf32_d10v_vec;
extern const bfd_target bfd_elf32_d30v_vec;
extern const bfd_target bfd_elf32_dlx_big_vec;
&bfd_elf32_bigmips_vec,
&bfd_elf32_cr16c_vec,
&bfd_elf32_cris_vec,
+ &bfd_elf32_crx_vec,
&bfd_elf32_d10v_vec,
&bfd_elf32_d30v_vec,
&bfd_elf32_dlx_big_vec,
+2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * MAINTAINERS: Added myself to the list.
+ * readelf.c: Include "elf/crx.h".
+ (guess_is_rela): Handle EM_CRX.
+ (get_machine_name): Likewise.
+ (dump_relocations): Likewise.
+
2004-07-03 Aaron W. LaFramboise <aaron98wiridge9@aaronwl.com>
* doc/binutils.texi (nm): Clarify weak symbol description.
BUILD SYSTEM Ben Elliston <bje@gnu.org>
BUILD SYSTEM Daniel Jacobowitz <dan@debian.org>
CRIS Hans-Peter Nilsson <hp@axis.com>
+ CRX Tomer Levi <Tomer.Levi@nsc.com>
DWARF2 Jason Merrill <jason@redhat.com>
FR30 Dave Brolley <brolley@redhat.com>
FRV Dave Brolley <brolley@redhat.com>
#include "elf/vax.h"
#include "elf/x86-64.h"
#include "elf/xstormy16.h"
+#include "elf/crx.h"
#include "elf/iq2000.h"
#include "elf/xtensa.h"
case EM_MSP430:
case EM_MSP430_OLD:
case EM_XSTORMY16:
+ case EM_CRX:
case EM_VAX:
case EM_IP2K:
case EM_IP2K_OLD:
rtype = elf_xstormy16_reloc_type (type);
break;
+ case EM_CRX:
+ rtype = elf_crx_reloc_type (type);
+ break;
+
case EM_VAX:
rtype = elf_vax_reloc_type (type);
break;
case EM_XSTORMY16: return "Sanyo Xstormy16 CPU core";
case EM_OPENRISC:
case EM_OR32: return "OpenRISC";
+ case EM_CRX: return "National Semiconductor CRX microprocessor";
case EM_DLX: return "OpenDLX";
case EM_IP2K_OLD:
case EM_IP2K: return "Ubicom IP2xxx 8-bit microcontrollers";
cris | cris-* | etrax*)
basic_machine=cris-axis
;;
+ crx)
+ basic_machine=crx-unknown
+ os=-elf
+ ;;
da30 | da30-*)
basic_machine=m68k-da30
;;
program_transform_name=s,x,x,
silent=
site=
+sitefile=
srcdir=
target=NONE
verbose=
--help print this message
--no-create do not create output files
--quiet, --silent do not print \`checking...' messages
+ --site-file=FILE use FILE as the site file
--version print the version of autoconf that created configure
Directory and file names:
--prefix=PREFIX install architecture-independent files in PREFIX
-site=* | --site=* | --sit=*)
site="$ac_optarg" ;;
+ -site-file | --site-file | --site-fil | --site-fi | --site-f)
+ ac_prev=sitefile ;;
+ -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*)
+ sitefile="$ac_optarg" ;;
+
-srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
ac_prev=srcdir ;;
-srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
# Prefer explicitly selected file to automatically selected ones.
-if test -z "$CONFIG_SITE"; then
- if test "x$prefix" != xNONE; then
- CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
- else
- CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
+if test -z "$sitefile"; then
+ if test -z "$CONFIG_SITE"; then
+ if test "x$prefix" != xNONE; then
+ CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
+ else
+ CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
+ fi
fi
+else
+ CONFIG_SITE="$sitefile"
fi
for ac_site_file in $CONFIG_SITE; do
if test -r "$ac_site_file"; then
fi
echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:593: checking host system type" >&5
+echo "configure:604: checking host system type" >&5
host_alias=$host
case "$host_alias" in
echo "$ac_t""$host" 1>&6
echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:614: checking target system type" >&5
+echo "configure:625: checking target system type" >&5
target_alias=$target
case "$target_alias" in
echo "$ac_t""$target" 1>&6
echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:632: checking build system type" >&5
+echo "configure:643: checking build system type" >&5
build_alias=$build
case "$build_alias" in
# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
# ./install, which can be erroneously created by make from ./install.sh.
echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:687: checking for a BSD compatible install" >&5
+echo "configure:698: checking for a BSD compatible install" >&5
if test -z "$INSTALL"; then
if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
echo $ac_n "checking whether ln works""... $ac_c" 1>&6
-echo "configure:740: checking whether ln works" >&5
+echo "configure:751: checking whether ln works" >&5
if eval "test \"`echo '$''{'acx_cv_prog_LN'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6
-echo "configure:764: checking whether ln -s works" >&5
+echo "configure:775: checking whether ln -s works" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LN_S'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cris-*-*)
noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
;;
+ crx-*-*)
+ noconfigdirs="$noconfigdirs target-libgloss target-libstdc++-v3 target-libmudflap ${libgcj}"
+ ;;
d10v-*-*)
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-libgloss ${libgcj}"
;;
# Extract the first word of "gcc", so it can be a program name with args.
set dummy gcc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1773: checking for $ac_word" >&5
+echo "configure:1787: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "cc", so it can be a program name with args.
set dummy cc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1803: checking for $ac_word" >&5
+echo "configure:1817: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "cl", so it can be a program name with args.
set dummy cl; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1854: checking for $ac_word" >&5
+echo "configure:1868: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1886: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
ac_ext=c
# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
cat > conftest.$ac_ext << EOF
-#line 1897 "configure"
+#line 1911 "configure"
#include "confdefs.h"
main(){return(0);}
EOF
-if { (eval echo configure:1902: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:1916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
ac_cv_prog_cc_works=yes
# If we can't run a trivial program, we are probably using a cross compiler.
if (./conftest; exit) 2>/dev/null; then
{ echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1928: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
cross_compiling=$ac_cv_prog_cc_cross
echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1933: checking whether we are using GNU C" >&5
+echo "configure:1947: checking whether we are using GNU C" >&5
if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
yes;
#endif
EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1942: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
ac_cv_prog_gcc=yes
else
ac_cv_prog_gcc=no
ac_save_CFLAGS="$CFLAGS"
CFLAGS=
echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1961: checking whether ${CC-cc} accepts -g" >&5
+echo "configure:1975: checking whether ${CC-cc} accepts -g" >&5
if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ac_tool_prefix}gnatbind", so it can be a program name with args.
set dummy ${ac_tool_prefix}gnatbind; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2028: checking for $ac_word" >&5
+echo "configure:2042: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_GNATBIND'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "gnatbind", so it can be a program name with args.
set dummy gnatbind; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2060: checking for $ac_word" >&5
+echo "configure:2074: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_GNATBIND'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
echo $ac_n "checking whether compiler driver understands Ada""... $ac_c" 1>&6
-echo "configure:2093: checking whether compiler driver understands Ada" >&5
+echo "configure:2107: checking whether compiler driver understands Ada" >&5
if eval "test \"`echo '$''{'acx_cv_cc_gcc_supports_ada'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
echo $ac_n "checking how to compare bootstrapped objects""... $ac_c" 1>&6
-echo "configure:2126: checking how to compare bootstrapped objects" >&5
+echo "configure:2140: checking how to compare bootstrapped objects" >&5
if eval "test \"`echo '$''{'gcc_cv_prog_cmp_skip'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
CFLAGS="$CFLAGS $gmpinc"
# Check GMP actually works
echo $ac_n "checking for correct version of gmp.h""... $ac_c" 1>&6
-echo "configure:2199: checking for correct version of gmp.h" >&5
+echo "configure:2213: checking for correct version of gmp.h" >&5
cat > conftest.$ac_ext <<EOF
-#line 2201 "configure"
+#line 2215 "configure"
#include "confdefs.h"
#include "gmp.h"
int main() {
; return 0; }
EOF
-if { (eval echo configure:2212: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2226: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
echo "$ac_t""yes" 1>&6
else
if test x"$have_gmp" = xyes; then
echo $ac_n "checking for mpf_init in -lgmp""... $ac_c" 1>&6
-echo "configure:2225: checking for mpf_init in -lgmp" >&5
+echo "configure:2239: checking for mpf_init in -lgmp" >&5
saved_LIBS="$LIBS"
LIBS="$LIBS $gmplibs"
cat > conftest.$ac_ext <<EOF
-#line 2230 "configure"
+#line 2244 "configure"
#include "confdefs.h"
#include <gmp.h>
int main() {
mpf_t n; mpf_init(n);
; return 0; }
EOF
-if { (eval echo configure:2237: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:2251: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
echo "$ac_t""yes" 1>&6
else
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2710: checking for $ac_word" >&5
+echo "configure:2724: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_BISON'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2745: checking for $ac_word" >&5
+echo "configure:2759: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_YACC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2780: checking for $ac_word" >&5
+echo "configure:2794: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_M4'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2815: checking for $ac_word" >&5
+echo "configure:2829: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_FLEX'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2850: checking for $ac_word" >&5
+echo "configure:2864: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_LEX'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2885: checking for $ac_word" >&5
+echo "configure:2899: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_MAKEINFO'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_tool_prefix}ar", so it can be a program name with args.
set dummy ${ncn_tool_prefix}ar; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3483: checking for $ac_word" >&5
+echo "configure:3497: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "ar", so it can be a program name with args.
set dummy ar; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3516: checking for $ac_word" >&5
+echo "configure:3530: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_AR'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_tool_prefix}as", so it can be a program name with args.
set dummy ${ncn_tool_prefix}as; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3555: checking for $ac_word" >&5
+echo "configure:3569: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "as", so it can be a program name with args.
set dummy as; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3588: checking for $ac_word" >&5
+echo "configure:3602: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_AS'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_tool_prefix}dlltool", so it can be a program name with args.
set dummy ${ncn_tool_prefix}dlltool; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3627: checking for $ac_word" >&5
+echo "configure:3641: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "dlltool", so it can be a program name with args.
set dummy dlltool; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3660: checking for $ac_word" >&5
+echo "configure:3674: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_DLLTOOL'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_tool_prefix}ld", so it can be a program name with args.
set dummy ${ncn_tool_prefix}ld; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3699: checking for $ac_word" >&5
+echo "configure:3713: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "ld", so it can be a program name with args.
set dummy ld; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3732: checking for $ac_word" >&5
+echo "configure:3746: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_LD'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_tool_prefix}nm", so it can be a program name with args.
set dummy ${ncn_tool_prefix}nm; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3771: checking for $ac_word" >&5
+echo "configure:3785: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_NM'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "nm", so it can be a program name with args.
set dummy nm; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3804: checking for $ac_word" >&5
+echo "configure:3818: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_NM'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_tool_prefix}ranlib", so it can be a program name with args.
set dummy ${ncn_tool_prefix}ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3843: checking for $ac_word" >&5
+echo "configure:3857: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "ranlib", so it can be a program name with args.
set dummy ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3876: checking for $ac_word" >&5
+echo "configure:3890: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_tool_prefix}windres", so it can be a program name with args.
set dummy ${ncn_tool_prefix}windres; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3915: checking for $ac_word" >&5
+echo "configure:3929: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_WINDRES'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "windres", so it can be a program name with args.
set dummy windres; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3948: checking for $ac_word" >&5
+echo "configure:3962: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_WINDRES'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_tool_prefix}objcopy", so it can be a program name with args.
set dummy ${ncn_tool_prefix}objcopy; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3987: checking for $ac_word" >&5
+echo "configure:4001: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_OBJCOPY'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "objcopy", so it can be a program name with args.
set dummy objcopy; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4020: checking for $ac_word" >&5
+echo "configure:4034: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_OBJCOPY'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_tool_prefix}objdump", so it can be a program name with args.
set dummy ${ncn_tool_prefix}objdump; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4059: checking for $ac_word" >&5
+echo "configure:4073: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "objdump", so it can be a program name with args.
set dummy objdump; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4092: checking for $ac_word" >&5
+echo "configure:4106: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_OBJDUMP'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_target_tool_prefix}ar", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}ar; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4138: checking for $ac_word" >&5
+echo "configure:4152: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_AR_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "ar", so it can be a program name with args.
set dummy ar; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4171: checking for $ac_word" >&5
+echo "configure:4185: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_AR_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_target_tool_prefix}as", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}as; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4210: checking for $ac_word" >&5
+echo "configure:4224: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_AS_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "as", so it can be a program name with args.
set dummy as; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4243: checking for $ac_word" >&5
+echo "configure:4257: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_AS_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_target_tool_prefix}dlltool", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}dlltool; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4282: checking for $ac_word" >&5
+echo "configure:4296: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "dlltool", so it can be a program name with args.
set dummy dlltool; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4315: checking for $ac_word" >&5
+echo "configure:4329: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_target_tool_prefix}ld", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}ld; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4354: checking for $ac_word" >&5
+echo "configure:4368: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_LD_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "ld", so it can be a program name with args.
set dummy ld; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4387: checking for $ac_word" >&5
+echo "configure:4401: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_LD_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_target_tool_prefix}nm", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}nm; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4426: checking for $ac_word" >&5
+echo "configure:4440: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_NM_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "nm", so it can be a program name with args.
set dummy nm; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4459: checking for $ac_word" >&5
+echo "configure:4473: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_NM_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_target_tool_prefix}ranlib", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4498: checking for $ac_word" >&5
+echo "configure:4512: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_RANLIB_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "ranlib", so it can be a program name with args.
set dummy ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4531: checking for $ac_word" >&5
+echo "configure:4545: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_RANLIB_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ncn_target_tool_prefix}windres", so it can be a program name with args.
set dummy ${ncn_target_tool_prefix}windres; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4570: checking for $ac_word" >&5
+echo "configure:4584: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CONFIGURED_WINDRES_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "windres", so it can be a program name with args.
set dummy windres; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4603: checking for $ac_word" >&5
+echo "configure:4617: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_CONFIGURED_WINDRES_FOR_TARGET'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
NM_FOR_TARGET=${NM_FOR_TARGET}${extra_nmflags_for_target}
echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6
-echo "configure:4688: checking whether to enable maintainer-specific portions of Makefiles" >&5
+echo "configure:4702: checking whether to enable maintainer-specific portions of Makefiles" >&5
# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
if test "${enable_maintainer_mode+set}" = set; then
enableval="$enable_maintainer_mode"
# gcc for stageN-gcc and stage-prev for stage(N-1). In case this is not
# possible, however, we can resort to mv.
echo $ac_n "checking if symbolic links between directories work""... $ac_c" 1>&6
-echo "configure:4735: checking if symbolic links between directories work" >&5
+echo "configure:4749: checking if symbolic links between directories work" >&5
if eval "test \"`echo '$''{'gcc_cv_prog_ln_s_dir'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cris-*-*)
noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
;;
+ crx-*-*)
+ noconfigdirs="$noconfigdirs target-libgloss target-libstdc++-v3 target-libmudflap ${libgcj}"
+ ;;
d10v-*-*)
noconfigdirs="$noconfigdirs target-libstdc++-v3 target-libgloss ${libgcj}"
;;
+2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * Makefile.am (CPU_TYPES): Add crx.
+ (TARGET_CPU_CFILES): Add config/tc-crx.c.
+ (TARGET_CPU_HFILES): Add config/tc-crx.h.
+ (DEPTC_crx_elf): New target.
+ (DEPOBJ_crx_elf): Likewise.
+ (DEP_crx_elf): Likewise.
+ * Makefile.in: Regenerate.
+ * configure.in: Add crx* target.
+ * configure: Regenerate.
+ * config/tc-crx.c: New file.
+ * config/tc-crx.h: New file.
+ * NEWS: Mention new target.
+
2004-07-06 Nick Clifton <nickc@redhat.com>
* config.in: Undefine TARGET_SYMBIAN by default.
arm \
avr \
cris \
+ crx \
d10v \
d30v \
dlx \
config/tc-arm.c \
config/tc-avr.c \
config/tc-cris.c \
+ config/tc-crx.c \
config/tc-d10v.c \
config/tc-d30v.c \
config/tc-dlx.c \
config/tc-arm.h \
config/tc-avr.h \
config/tc-cris.h \
+ config/tc-crx.h \
config/tc-d10v.h \
config/tc-d30v.h \
config/tc-dlx.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(INCDIR)/opcode/cris.h dwarf2dbg.h
+DEPTC_crx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
+ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+ $(INCDIR)/opcode/crx.h dwarf2dbg.h
DEPTC_d10v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-d10v.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
-# Makefile.in generated by automake 1.8.4 from Makefile.am.
+# Makefile.in generated by automake 1.8.5 from Makefile.am.
# @configure_input@
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
arm \
avr \
cris \
+ crx \
d10v \
d30v \
dlx \
config/tc-arm.c \
config/tc-avr.c \
config/tc-cris.c \
+ config/tc-crx.c \
config/tc-d10v.c \
config/tc-d30v.c \
config/tc-dlx.c \
config/tc-arm.h \
config/tc-avr.h \
config/tc-cris.h \
+ config/tc-crx.h \
config/tc-d10v.h \
config/tc-d30v.h \
config/tc-dlx.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(INCDIR)/opcode/cris.h dwarf2dbg.h
+DEPTC_crx_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h \
+ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+ $(INCDIR)/opcode/crx.h dwarf2dbg.h
+
DEPTC_d10v_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-d10v.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
fi; \
list='$(SUBDIRS)'; for subdir in $$list; do \
if test "$$subdir" = .; then :; else \
- test -f $$subdir/TAGS && \
+ test ! -f $$subdir/TAGS || \
tags="$$tags $$include_option=$$here/$$subdir/TAGS"; \
fi; \
done; \
$(AWK) ' { files[$$0] = 1; } \
END { for (i in files) print i; }'`; \
if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
- test -z "$$unique" && unique=$$empty_fix; \
+ test -n "$$unique" || unique=$$empty_fix; \
$(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
$$tags $$unique; \
fi
-*- text -*-
+* Support for the crx-elf target added.
+
+* Support for the sh-symbian-elf target added.
+
* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
on pe[i]-i386; required for this target's DWARF 2 support.
-# generated automatically by aclocal 1.8.4 -*- Autoconf -*-
+# generated automatically by aclocal 1.8.5 -*- Autoconf -*-
# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
# Free Software Foundation, Inc.
# Call AM_AUTOMAKE_VERSION so it can be traced.
# This function is AC_REQUIREd by AC_INIT_AUTOMAKE.
AC_DEFUN([AM_SET_CURRENT_AUTOMAKE_VERSION],
- [AM_AUTOMAKE_VERSION([1.8.4])])
+ [AM_AUTOMAKE_VERSION([1.8.5])])
# AM_AUX_DIR_EXPAND
--- /dev/null
+/* tc-crx.c -- Assembler code for the CRX CPU core.
+ Copyright 2004 Free Software Foundation, Inc.
+
+ Contributed by Tomer Levi, NSC, Israel.
+ Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
+ Updates, BFDizing, GNUifying and ELF support by Tomer Levi.
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to the
+ Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+ MA 02111-1307, USA. */
+
+#include "as.h"
+#include "safe-ctype.h"
+#include "dwarf2dbg.h"
+#include "opcode/crx.h"
+#include "elf/crx.h"
+
+/* Include <limits.h> do define ULONG_MAX, LONG_MAX, LONG_MIN. */
+#include <limits.h>
+
+/* Word is considered here as a 16-bit unsigned short int. */
+#define WORD_SIZE 16
+#define WORD_SHIFT 16
+
+/* Register is 4-bit size. */
+#define REG_SIZE 4
+
+/* Maximum size of a single instruction (in words). */
+#define INSN_MAX_SIZE 3
+
+/* Maximum bits which may be set in a `mask16' operand. */
+#define MAX_REGS_IN_MASK16 8
+
+/* Escape to 16-bit immediate. */
+#define ESC_16 0xE
+/* Escape to 32-bit immediate. */
+#define ESC_32 0xF
+
+/* Utility macros for string comparison. */
+#define streq(a, b) (strcmp (a, b) == 0)
+#define strneq(a, b, c) (strncmp (a, b, c) == 0)
+
+/* A mask to set n_bits starting from offset offs. */
+#define SET_BITS_MASK(offs,n_bits) ((((1 << (n_bits)) - 1) << (offs)))
+/* A mask to clear n_bits starting from offset offs. */
+#define CLEAR_BITS_MASK(offs,n_bits) (~(((1 << (n_bits)) - 1) << (offs)))
+
+/* Get the argument type for each operand of a given instruction. */
+#define GET_ACTUAL_TYPE \
+ for (i = 0; i < insn->nargs; i++) \
+ atyp_act[i] = getarg_type (instruction->operands[i].op_type)
+
+/* Get the size (in bits) for each operand of a given instruction. */
+#define GET_ACTUAL_SIZE \
+ for (i = 0; i < insn->nargs; i++) \
+ bits_act[i] = getbits (instruction->operands[i].op_type)
+
+/* Non-zero if OP is instruction with no operands. */
+#define NO_OPERANDS_INST(OP) \
+ (streq (OP, "di") || streq (OP, "nop") \
+ || streq (OP, "retx") || streq (OP, "ei") \
+ || streq (OP, "wait") || streq (OP, "eiwait"))
+
+/* Print a number NUM, shifted by SHIFT bytes, into a location
+ pointed by index BYTE of array 'output_opcode'. */
+#define CRX_PRINT(BYTE, NUM, SHIFT) output_opcode[BYTE] |= (NUM << SHIFT)
+
+/* Opcode mnemonics hash table. */
+static struct hash_control *crx_inst_hash;
+/* CRX registers hash table. */
+static struct hash_control *reg_hash;
+/* CRX coprocessor registers hash table. */
+static struct hash_control *copreg_hash;
+/* Current instruction we're assembling. */
+const inst *instruction;
+
+/* Initialize global variables. */
+long output_opcode[2];
+/* Nonzero means a relocatable symbol. */
+int relocatable;
+/* Nonzero means a constant's bit-size was already set. */
+int size_was_set;
+/* Nonzero means a negative constant. */
+int signflag;
+/* Nonzero means a CST4 instruction. */
+int cst4flag;
+/* A copy of the original instruction (used in error messages). */
+char ins_parse[MAX_INST_LEN];
+/* Nonzero means instruction is represented in post increment mode. */
+int post_inc_mode;
+/* Holds the current processed argument number. */
+int processing_arg_number;
+
+/* Generic assembler global variables which must be defined by all targets. */
+
+/* Characters which always start a comment. */
+const char comment_chars[] = "#";
+
+/* Characters which start a comment at the beginning of a line. */
+const char line_comment_chars[] = "#";
+
+/* This array holds machine specific line separator characters. */
+const char line_separator_chars[] = ";";
+
+/* Chars that can be used to separate mant from exp in floating point nums. */
+const char EXP_CHARS[] = "eE";
+
+/* Chars that mean this number is a floating point constant as in 0f12.456 */
+const char FLT_CHARS[] = "f'";
+
+/* Target-specific multicharacter options, not const-declared at usage. */
+const char *md_shortopts = "";
+struct option md_longopts[] = {
+ {NULL, no_argument, NULL, 0}
+};
+size_t md_longopts_size = sizeof (md_longopts);
+
+/* This table describes all the machine specific pseudo-ops
+ the assembler has to support. The fields are:
+ *** Pseudo-op name without dot.
+ *** Function to call to execute this pseudo-op.
+ *** Integer arg to pass to the function. */
+
+const pseudo_typeS md_pseudo_table[] =
+{
+ /* In CRX machine, align is in bytes (not a ptwo boundary). */
+ {"align", s_align_bytes, 0},
+ {0, 0, 0}
+};
+
+const relax_typeS md_relax_table[] =
+{
+ /* bCC */
+ {0xfa, -0x100, 2, 1}, /* 8 */
+ {0xfffe, -0x10000, 4, 2}, /* 16 */
+ {0xfffffffe, -0xfffffffe, 6, 0}, /* 32 */
+
+ /* bal */
+ {0xfffe, -0x10000, 4, 4}, /* 16 */
+ {0xfffffffe, -0xfffffffe, 6, 0}, /* 32 */
+
+ /* cmpbr */
+ {0xfe, -0x100, 4, 6}, /* 8 */
+ {0xfffffe, -0x1000000, 6, 0} /* 24 */
+};
+
+static void reset_vars (char *, ins *);
+static reg get_register (char *);
+static copreg get_copregister (char *);
+static void get_number_of_bits (ins *, int);
+static argtype getarg_type (operand_type);
+static int getbits (operand_type);
+static int get_number_of_operands (void);
+static void get_operandtype (char *, int, ins *);
+static int gettrap (char *);
+static void handle_pi_insn (char *);
+static int get_cinv_parameters (char *);
+static unsigned long getconstant (unsigned long, int);
+static int getreg_image (reg);
+static void parse_operands (ins *, char *);
+static void parse_insn (ins *, char *);
+static void print_operand (int, int, argument *);
+static void print_constant (int, int, argument *);
+static int exponent2scale (int);
+static void mask_const (unsigned long *, int);
+static void mask_reg (int, unsigned short *);
+static int process_label_constant (char *, ins *, int);
+static void set_indexmode_parameters (char *, ins *, int);
+static void set_cons_rparams (char *, ins *, int);
+static char * preprocess_reglist (char *, int *);
+static int assemble_insn (char *, ins *);
+static void print_insn (ins *);
+
+/* Return the bit size for a given operand. */
+
+static int
+getbits (operand_type op)
+{
+ if (op < MAX_OPRD)
+ return crx_optab[op].bit_size;
+ else
+ return 0;
+}
+
+/* Return the argument type of a given operand. */
+
+static argtype
+getarg_type (operand_type op)
+{
+ if (op < MAX_OPRD)
+ return crx_optab[op].arg_type;
+ else
+ return nullargs;
+}
+
+/* Get the core processor register 'reg_name'. */
+
+static reg
+get_register (char *reg_name)
+{
+ const reg_entry *reg;
+
+ reg = (const reg_entry *) hash_find (reg_hash, reg_name);
+
+ if (reg != NULL)
+ return reg->value.reg_val;
+ else
+ return nullregister;
+}
+
+/* Get the coprocessor register 'copreg_name'. */
+
+static copreg
+get_copregister (char *copreg_name)
+{
+ const reg_entry *copreg;
+
+ copreg = (const reg_entry *) hash_find (copreg_hash, copreg_name);
+
+ if (copreg != NULL)
+ return copreg->value.copreg_val;
+ else
+ return nullcopregister;
+}
+
+/* Mask a constant to the number of bits it is to be mapped to. */
+
+static void
+mask_const (unsigned long int *t, int size)
+{
+ *t &= (((LONGLONG)1 << size) - 1);
+}
+
+/* Round up a section size to the appropriate boundary. */
+
+valueT
+md_section_align (segT seg, valueT val)
+{
+ /* Round .text section to a multiple of 2. */
+ if (seg == text_section)
+ return (val + 1) & ~1;
+ return val;
+}
+
+/* Parse an operand that is machine-specific (remove '*'). */
+
+void
+md_operand (expressionS * exp)
+{
+ char c = *input_line_pointer;
+
+ switch (c)
+ {
+ case '*':
+ input_line_pointer++;
+ expression (exp);
+ break;
+ default:
+ break;
+ }
+}
+
+/* Reset global variables before parsing a new instruction. */
+
+static void
+reset_vars (char *op, ins *crx_ins)
+{
+ unsigned int i;
+
+ processing_arg_number = relocatable = size_was_set
+ = signflag = post_inc_mode = cst4flag = 0;
+ memset (&output_opcode, '\0', sizeof (output_opcode));
+
+ /* Memset the 'signflag' field in every argument. */
+ for (i = 0; i < MAX_OPERANDS; i++)
+ crx_ins->arg[i].signflag = 0;
+
+ /* Save a copy of the original OP (used in error messages). */
+ strcpy (ins_parse, op);
+}
+
+/* Generate a relocation entry for a fixup. */
+
+arelent *
+tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS * fixP)
+{
+ arelent * reloc;
+
+ reloc = xmalloc (sizeof (arelent));
+ reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
+ reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
+ reloc->addend = fixP->fx_offset;
+
+ if (fixP->fx_subsy != NULL)
+ /* We don't resolve difference expressions. */
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("can't resolve `%s' {%s section} - `%s' {%s section}"),
+ fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : "0",
+ segment_name (fixP->fx_addsy
+ ? S_GET_SEGMENT (fixP->fx_addsy)
+ : absolute_section),
+ S_GET_NAME (fixP->fx_subsy),
+ segment_name (S_GET_SEGMENT (fixP->fx_addsy)));
+
+ assert ((int) fixP->fx_r_type > 0);
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
+
+ if (reloc->howto == (reloc_howto_type *) NULL)
+ {
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("internal error: reloc %d (`%s') not supported by object file format"),
+ fixP->fx_r_type,
+ bfd_get_reloc_code_name (fixP->fx_r_type));
+ return NULL;
+ }
+ assert (!fixP->fx_pcrel == !reloc->howto->pc_relative);
+
+ return reloc;
+}
+
+/* Prepare machine-dependent frags for relaxation. */
+
+int
+md_estimate_size_before_relax (fragS *fragp, asection *seg)
+{
+ /* If symbol is undefined or located in a different section,
+ select the largest supported relocation. */
+ relax_substateT subtype;
+ relax_substateT rlx_state[] = {0, 2,
+ 3, 4,
+ 5, 6};
+
+ for (subtype = 0; subtype < ARRAY_SIZE (rlx_state); subtype += 2)
+ {
+ if (fragp->fr_subtype == rlx_state[subtype]
+ && (!S_IS_DEFINED (fragp->fr_symbol)
+ || seg != S_GET_SEGMENT (fragp->fr_symbol)))
+ {
+ fragp->fr_subtype = rlx_state[subtype + 1];
+ break;
+ }
+ }
+
+ if (fragp->fr_subtype >= ARRAY_SIZE (md_relax_table))
+ abort ();
+
+ return md_relax_table[fragp->fr_subtype].rlx_length;
+}
+
+void
+md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, fragS *fragP)
+{
+ /* 'opcode' points to the start of the instruction, whether
+ we need to change the instruction's fixed encoding. */
+ char *opcode = fragP->fr_literal + fragP->fr_fix;
+ bfd_reloc_code_real_type reloc;
+
+ subseg_change (sec, 0);
+
+ switch (fragP->fr_subtype)
+ {
+ case 0:
+ reloc = BFD_RELOC_CRX_REL8;
+ break;
+ case 1:
+ *opcode = 0x7e;
+ reloc = BFD_RELOC_CRX_REL16;
+ break;
+ case 2:
+ *opcode = 0x7f;
+ reloc = BFD_RELOC_CRX_REL32;
+ break;
+ case 3:
+ reloc = BFD_RELOC_CRX_REL16;
+ break;
+ case 4:
+ *++opcode = 0x31;
+ reloc = BFD_RELOC_CRX_REL32;
+ break;
+ case 5:
+ reloc = BFD_RELOC_CRX_REL8_CMP;
+ break;
+ case 6:
+ *++opcode = 0x31;
+ reloc = BFD_RELOC_CRX_REL24;
+ break;
+ default:
+ abort ();
+ break;
+ }
+
+ fix_new (fragP, fragP->fr_fix,
+ bfd_get_reloc_size (bfd_reloc_type_lookup (stdoutput, reloc)),
+ fragP->fr_symbol, fragP->fr_offset, 1, reloc);
+ fragP->fr_var = 0;
+ fragP->fr_fix += md_relax_table[fragP->fr_subtype].rlx_length;
+}
+
+/* Process machine-dependent command line options. Called once for
+ each option on the command line that the machine-independent part of
+ GAS does not understand. */
+
+int
+md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED)
+{
+ return 0;
+}
+
+/* Machine-dependent usage-output. */
+
+void
+md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
+{
+ return;
+}
+
+/* Turn a string in input_line_pointer into a floating point constant
+ of type TYPE, and store the appropriate bytes in *LITP. The number
+ of LITTLENUMS emitted is stored in *SIZEP. An error message is
+ returned, or NULL on OK. */
+
+char *
+md_atof (int type, char *litP, int *sizeP)
+{
+ int prec;
+ LITTLENUM_TYPE words[4];
+ char *t;
+ int i;
+
+ switch (type)
+ {
+ case 'f':
+ prec = 2;
+ break;
+
+ case 'd':
+ prec = 4;
+ break;
+
+ default:
+ *sizeP = 0;
+ return _("bad call to md_atof");
+ }
+
+ t = atof_ieee (input_line_pointer, type, words);
+ if (t)
+ input_line_pointer = t;
+
+ *sizeP = prec * 2;
+
+ if (! target_big_endian)
+ {
+ for (i = prec - 1; i >= 0; i--)
+ {
+ md_number_to_chars (litP, (valueT) words[i], 2);
+ litP += 2;
+ }
+ }
+ else
+ {
+ for (i = 0; i < prec; i++)
+ {
+ md_number_to_chars (litP, (valueT) words[i], 2);
+ litP += 2;
+ }
+ }
+
+ return NULL;
+}
+
+/* Apply a fixS (fixup of an instruction or data that we didn't have
+ enough info to complete immediately) to the data in a frag.
+ Since linkrelax is nonzero and TC_LINKRELAX_FIXUP is defined to disable
+ relaxation of debug sections, this function is called only when
+ fixuping relocations of debug sections. */
+
+void
+md_apply_fix3 (fixS *fixP, valueT *valP, segT seg)
+{
+ valueT val = * valP;
+ char *buf = fixP->fx_frag->fr_literal + fixP->fx_where;
+ fixP->fx_offset = 0;
+
+ switch (fixP->fx_r_type)
+ {
+ case BFD_RELOC_CRX_NUM8:
+ bfd_put_8 (stdoutput, (unsigned char) val, buf);
+ break;
+ case BFD_RELOC_CRX_NUM16:
+ bfd_put_16 (stdoutput, val, buf);
+ break;
+ case BFD_RELOC_CRX_NUM32:
+ bfd_put_32 (stdoutput, val, buf);
+ break;
+ default:
+ /* We shouldn't ever get here because linkrelax is nonzero. */
+ abort ();
+ break;
+ }
+
+ fixP->fx_done = 0;
+
+ if (fixP->fx_addsy == NULL
+ && fixP->fx_pcrel == 0)
+ fixP->fx_done = 1;
+
+ if (fixP->fx_pcrel == 1
+ && fixP->fx_addsy != NULL
+ && S_GET_SEGMENT (fixP->fx_addsy) == seg)
+ fixP->fx_done = 1;
+}
+
+/* The location from which a PC relative jump should be calculated,
+ given a PC relative reloc. */
+
+long
+md_pcrel_from (fixS *fixp)
+{
+ return fixp->fx_frag->fr_address + fixp->fx_where;
+}
+
+/* This function is called once, at assembler startup time. This should
+ set up all the tables, etc that the MD part of the assembler needs. */
+
+void
+md_begin (void)
+{
+ const char *hashret = NULL;
+ int i = 0;
+
+ /* Set up a hash table for the instructions. */
+ crx_inst_hash = hash_new ();
+ if (crx_inst_hash == NULL)
+ as_fatal (_("Virtual memory exhausted"));
+
+ while (crx_instruction[i].mnemonic != NULL)
+ {
+ const char *mnemonic = crx_instruction[i].mnemonic;
+
+ hashret = hash_insert (crx_inst_hash, mnemonic,
+ (PTR) &crx_instruction[i]);
+
+ if (hashret != NULL && *hashret != '\0')
+ as_fatal (_("Can't hash `%s': %s\n"), crx_instruction[i].mnemonic,
+ *hashret == 0 ? _("(unknown reason)") : hashret);
+
+ /* Insert unique names into hash table. The CRX instruction set
+ has many identical opcode names that have different opcodes based
+ on the operands. This hash table then provides a quick index to
+ the first opcode with a particular name in the opcode table. */
+ do
+ {
+ ++i;
+ }
+ while (crx_instruction[i].mnemonic != NULL
+ && streq (crx_instruction[i].mnemonic, mnemonic));
+ }
+
+ /* Initialize reg_hash hash table. */
+ reg_hash = hash_new ();
+
+ {
+ const reg_entry *regtab;
+
+ for (regtab = crx_regtab;
+ regtab < (crx_regtab + NUMREGS); regtab++)
+ {
+ hashret = hash_insert (reg_hash, regtab->name, (PTR) regtab);
+ if (hashret)
+ as_fatal (_("Internal Error: Can't hash %s: %s"),
+ regtab->name,
+ hashret);
+ }
+ }
+
+ /* Initialize copreg_hash hash table. */
+ copreg_hash = hash_new ();
+
+ {
+ const reg_entry *copregtab;
+
+ for (copregtab = crx_copregtab; copregtab < (crx_copregtab + NUMCOPREGS);
+ copregtab++)
+ {
+ hashret = hash_insert (copreg_hash, copregtab->name, (PTR) copregtab);
+ if (hashret)
+ as_fatal (_("Internal Error: Can't hash %s: %s"),
+ copregtab->name,
+ hashret);
+ }
+ }
+ /* Set linkrelax here to avoid fixups in most sections. */
+ linkrelax = 1;
+}
+
+/* Get the number of bits corresponding to a constant -
+ here we check for possible overflow cases. */
+
+static void
+get_number_of_bits (ins * crx_ins, int op_num)
+{
+ int cnt_bits = 0;
+ unsigned long int temp = crx_ins->arg[op_num].constant;
+ const cst4_entry *cst4_op;
+
+ /* If the constant's size was already set - nothing to do. */
+ if (size_was_set)
+ return;
+
+ /* Already dealt with negative numbers in process_label_constants. */
+ while (temp > 0)
+ {
+ temp >>= 1;
+ cnt_bits++;
+ }
+
+ if (IS_INSN_TYPE (ARITH_INS) && !relocatable && !signflag)
+ {
+ if (cnt_bits == 16)
+ {
+ crx_ins->arg[op_num].size = 17;
+ return;
+ }
+ }
+ /* If a signed +ve is represented in 6 bits then we have to represent
+ it in 22 bits in case of the index mode of addressing. */
+ if (IS_INSN_TYPE (LD_STOR_INS)
+ || IS_INSN_TYPE (LD_STOR_INS_INC)
+ || IS_INSN_TYPE (STOR_IMM_INS)
+ || IS_INSN_TYPE (CSTBIT_INS))
+ {
+ if (!signflag && crx_ins->arg[op_num].type == arg_icr)
+ {
+ if (cnt_bits == 6)
+ {
+ crx_ins->arg[op_num].size = 7;
+ return;
+ }
+ if (cnt_bits == 22)
+ as_bad (_("Offset out of range in Instruction `%s'"), ins_parse);
+ }
+ }
+ /* If a signed +ve is represnted in 16 bits in case of load/stor disp16
+ then change it to 17 bits.
+ If a signed +ve is represnted in 12 bits in post increment instruction
+ increase it to 13 bits. */
+ if (IS_INSN_TYPE (LD_STOR_INS))
+ {
+ if (!signflag && crx_ins->arg[op_num].type == arg_cr)
+ {
+ if (cnt_bits == 16)
+ {
+ crx_ins->arg[op_num].size = 17;
+ return;
+ }
+ if (cnt_bits == 32)
+ as_bad (_("Offset out of range in Instruction `%s'"), ins_parse);
+ }
+ }
+
+ if (IS_INSN_TYPE (CSTBIT_INS)
+ || IS_INSN_TYPE (LD_STOR_INS_INC)
+ || IS_INSN_TYPE (STOR_IMM_INS))
+ {
+ if (!signflag && crx_ins->arg[op_num].type == arg_cr)
+ {
+ if (cnt_bits == 12)
+ {
+ crx_ins->arg[op_num].size = 13;
+ if (IS_INSN_TYPE (LD_STOR_INS_INC))
+ as_bad (_("Offset out of range in Instruction `%s'"), ins_parse);
+ return;
+ }
+ if (IS_INSN_TYPE (CSTBIT_INS) || IS_INSN_TYPE (STOR_IMM_INS))
+ {
+ if (cnt_bits == 28)
+ as_bad (_("Offset out of range in Instruction `%s'"), ins_parse);
+ }
+
+ }
+ }
+
+ /* Handle negative cst4 mapping for arithmetic/cmp&br operations. */
+ if (signflag && !relocatable
+ && ((IS_INSN_TYPE (ARITH_INS) || IS_INSN_TYPE (ARITH_BYTE_INS))
+ || ((IS_INSN_TYPE (CMPBR_INS) && op_num == 0))))
+ {
+ for (cst4_op = cst4_map; cst4_op < (cst4_map + cst4_maps); cst4_op++)
+ {
+ if (crx_ins->arg[op_num].constant == (unsigned int)(-cst4_op->value))
+ {
+ crx_ins->arg[op_num].size = 4;
+ crx_ins->arg[op_num].constant = cst4_op->binary;
+ crx_ins->arg[op_num].signflag = 0;
+ return;
+ }
+ }
+ }
+ /* Because of the cst4 mapping -- -1 and -4 already handled above
+ as well as for relocatable cases. */
+ if (signflag && IS_INSN_TYPE (ARITH_BYTE_INS))
+ {
+ if (!relocatable)
+ {
+ if (crx_ins->arg[op_num].constant <= 0xffff)
+ crx_ins->arg[op_num].size = 16;
+ else
+ /* Setting to 18 so that there is no match. */
+ crx_ins->arg[op_num].size = 18;
+ }
+ else
+ crx_ins->arg[op_num].size = 16;
+ return;
+ }
+
+ if (signflag && IS_INSN_TYPE (ARITH_INS))
+ {
+ /* For all immediates which can be expressed in less than 16 bits. */
+ if (crx_ins->arg[op_num].constant <= 0xffff && !relocatable)
+ {
+ crx_ins->arg[op_num].size = 16;
+ return;
+ }
+ /* Either it is relocatable or not representable in 16 bits. */
+ if (crx_ins->arg[op_num].constant < 0xffffffff || relocatable)
+ {
+ crx_ins->arg[op_num].size = 32;
+ return;
+ }
+ crx_ins->arg[op_num].size = 33;
+ return;
+ }
+ if (signflag && !relocatable)
+ return;
+
+ if (!relocatable)
+ crx_ins->arg[op_num].size = cnt_bits;
+
+ /* Checking for Error Conditions. */
+ if (IS_INSN_TYPE (ARITH_INS) && !signflag)
+ {
+ if (cnt_bits > 32)
+ as_bad (_("Cannot represent Immediate in %d bits in Instruction `%s'"),
+ cnt_bits, ins_parse);
+ }
+ else if (IS_INSN_TYPE (ARITH_BYTE_INS) && !signflag)
+ {
+ if (cnt_bits > 16)
+ as_bad (_("Cannot represent Immediate in %d bits in Instruction `%s'"),
+ cnt_bits, ins_parse);
+ }
+}
+
+/* Handle the constants -immediate/absolute values and
+ Labels (jump targets/Memory locations). */
+
+static int
+process_label_constant (char *str, ins * crx_ins, int number)
+{
+ char *save;
+ unsigned long int temp, cnt;
+ const cst4_entry *cst4_op;
+ int is_cst4=0;
+ int constant_val = 0;
+ int cmp_br_type_flag = 0, i;
+ int br_type_flag = 0;
+ save = input_line_pointer;
+ signflag = 0;
+
+ if (str[0] == '-')
+ {
+ signflag = 1;
+ str++;
+ }
+ else if (str[0] == '+')
+ str++;
+
+ /* Preprocessing for cmpbr instruction and getting the size flag. */
+ if (strstr (str, ":s") != NULL && (IS_INSN_TYPE (CMPBR_INS)
+ || IS_INSN_TYPE (COP_BRANCH_INS)))
+ cmp_br_type_flag = 8;
+
+ if (strstr (str, ":l") != NULL && (IS_INSN_TYPE (CMPBR_INS)
+ || IS_INSN_TYPE (COP_BRANCH_INS)))
+ cmp_br_type_flag = 24;
+
+ /* Branch instruction preprocessing. */
+ if (IS_INSN_TYPE (BRANCH_INS))
+ {
+ if (strstr (str, ":s") != NULL)
+ br_type_flag = 8;
+ else if (strstr (str, ":m") != NULL)
+ br_type_flag = 16;
+ else if (strstr (str, ":l") != NULL)
+ br_type_flag = 32;
+ }
+ /* Making the label cleared for processing removing :lms etc from labels. */
+ if (cmp_br_type_flag != 0 || br_type_flag != 0)
+ {
+ i = 0;
+ while (str[i] != ':')
+ {
+ i++;
+ }
+ str[i] = '\0';
+ }
+ input_line_pointer = str;
+
+ expression (&crx_ins->exp);
+
+ switch (crx_ins->exp.X_op)
+ {
+ case O_constant:
+ crx_ins->arg[number].constant = crx_ins->exp.X_add_number;
+ constant_val = crx_ins->exp.X_add_number;
+ if ((IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (COP_BRANCH_INS))
+ && number == 2)
+ {
+ /* This variable causes a warning (is to be handles by string
+ type implementation). */
+ LONGLONG temp64 = 0;
+
+ char ptr[20];
+ char temp_str[30];
+ unsigned int jump_value = 0;
+ int BR_MASK = 0, BR_SIZE = 0;
+ temp_str[0] = '\0';
+ if (signflag)
+ {
+ temp_str[0] = '-';
+ temp_str[1] = '\0';
+ }
+ strncat (temp_str, str, strlen (str));
+ temp64 = strtol (temp_str, (char **) &ptr,0);
+ /* This is not accurate :
+ Actually overflow is allowed here (see comment below).
+ Originally the call was to 'strtoll', which isn't
+ identified by MSVC. */
+ if ((temp64 == LONG_MAX) || (temp64 == LONG_MIN))
+ as_bad (_("Overflow in displacement in Instruction `%s'"),
+ ins_parse);
+
+ /* If br *+x
+ It will be returned as '0' padded with 'x' uptill 64 bits
+ If br *-x
+ It will be returned as sign extended form
+
+ Then search for validity of representation
+ Check whether upper 38 bits are all zeroes or all ones
+ If not report error. */
+ if (!(((temp64 & UPPER31_MASK) == UPPER31_MASK)
+ || ((temp64 & UPPER31_MASK) == 0x0)))
+ as_bad (_("Overflow in displacement in Instruction `%s'"),
+ ins_parse);
+
+ if (temp64 % 2 != 0)
+ as_bad (_("Odd Offset in displacement in Instruction `%s'"),
+ ins_parse);
+
+ /* Determine the branch size. */
+ jump_value = (unsigned int)temp64 & 0xFFFFFFFF;
+ if (((jump_value & 0xFFFFFF00) == 0xFFFFFF00)
+ || ((jump_value & 0xFFFFFF00) == 0x0))
+ {
+ BR_MASK = 0xFF;
+ BR_SIZE = 8;
+ }
+ else
+ if (((jump_value & 0xFF000000) == 0xFF000000)
+ || ((jump_value & 0xFF000000) == 0x0))
+ {
+ BR_MASK = 0xFFFFFF;
+ BR_SIZE = 24;
+ }
+ jump_value = jump_value >> 1;
+ crx_ins->arg[number].constant = jump_value & BR_MASK;
+ crx_ins->arg[number].size = BR_SIZE;
+ size_was_set = 1;
+ crx_ins->arg[number].signflag = signflag;
+ input_line_pointer = save;
+ return crx_ins->exp.X_op;
+ }
+
+ if (IS_INSN_TYPE (BRANCH_INS)
+ || IS_INSN_MNEMONIC ("bal")
+ || IS_INSN_TYPE (DCR_BRANCH_INS))
+ {
+ LONGLONG temp64 = 0;
+ char ptr[20];
+ char temp_str[30];
+ unsigned int jump_value = 0;
+ int BR_MASK = 0, BR_SIZE = 0;
+
+ temp_str[0] = '\0';
+ if (signflag)
+ {
+ temp_str[0] = '-';
+ temp_str[1] = '\0';
+ }
+ strncat (temp_str, str, strlen (str));
+ temp64 = strtol (temp_str, (char **) &ptr,0);
+ /* This is not accurate :
+ Actually overflow is allowed here (see comment below).
+ Originally the call was to 'strtoll', which isn't
+ identified by MSVC. */
+ if ((temp64 == LONG_MAX) || (temp64 == LONG_MIN))
+ as_bad (_("Overflow in displacement in Instruction `%s'"),
+ ins_parse);
+
+ /* If br *+x
+ It will be returned as '0' padded with 'x' uptill 64 bits
+ If br *-x
+ It will be returned as sign extended form
+
+ Then search for validity of representation
+ Check whether upper 31 bits are all zeroes or all ones
+ If not report error. */
+ if (!(((temp64 & UPPER31_MASK) == UPPER31_MASK)
+ || ((temp64 & UPPER31_MASK) == 0x0)))
+ as_bad (_("Overflow in displacement in Instruction `%s'"),
+ ins_parse);
+
+ if (temp64 % 2 != 0)
+ as_bad (_("Odd Offset in displacement in Instruction `%s'"),
+ ins_parse);
+
+ /* Determine the branch size. */
+ jump_value = (unsigned int)temp64 & 0xFFFFFFFF;
+ if (!IS_INSN_MNEMONIC ("bal") && !IS_INSN_TYPE (DCR_BRANCH_INS)
+ && (((jump_value & 0xFFFFFF00) == 0xFFFFFF00)
+ || ((jump_value & 0xFFFFFF00) == 0x0)))
+ {
+ BR_MASK = 0xFF;
+ BR_SIZE = 8;
+ }
+ else
+ if (((jump_value & 0xFFFF0000) == 0xFFFF0000)
+ || ((jump_value & 0xFFFF0000) == 0x0))
+ {
+ BR_MASK = 0xFFFF;
+ BR_SIZE = 16;
+ }
+ else
+ {
+ BR_MASK = 0xFFFFFFFF;
+ BR_SIZE = 32;
+ }
+ jump_value = jump_value >> 1;
+ crx_ins->arg[number].constant = jump_value & BR_MASK;
+ crx_ins->arg[number].size = BR_SIZE;
+ size_was_set = 1;
+ crx_ins->arg[number].signflag = signflag;
+ input_line_pointer = save;
+ return crx_ins->exp.X_op;
+ }
+ /* Fix for movd $0xF12344, r0 -- signflag has to be set. */
+ if (constant_val < 0 && signflag != 1
+ && !IS_INSN_TYPE (LD_STOR_INS) && !IS_INSN_TYPE (LD_STOR_INS_INC)
+ && !IS_INSN_TYPE (CSTBIT_INS) && !IS_INSN_TYPE (STOR_IMM_INS)
+ && !IS_INSN_TYPE (BRANCH_INS) && !IS_INSN_MNEMONIC ("bal"))
+ {
+ crx_ins->arg[number].constant =
+ ~(crx_ins->arg[number].constant) + 1;
+ signflag = 1;
+ }
+ /* For load/store instruction when the value is in the offset part. */
+ if (constant_val < 0 && signflag != 1
+ && (IS_INSN_TYPE (LD_STOR_INS) || IS_INSN_TYPE (LD_STOR_INS_INC)
+ || IS_INSN_TYPE (CSTBIT_INS) || IS_INSN_TYPE (STOR_IMM_INS)))
+ {
+ if (crx_ins->arg[number].type == arg_cr
+ || crx_ins->arg[number].type == arg_icr)
+ {
+ crx_ins->arg[number].constant =
+ ~(crx_ins->arg[number].constant) + 1;
+ signflag = 1;
+ }
+ }
+ if (signflag)
+ {
+ /* Signflag in never set in case of load store instructions
+ Mapping in case of only the arithinsn case. */
+ if ((crx_ins->arg[number].constant != 1
+ && crx_ins->arg[number].constant != 4)
+ || (!IS_INSN_TYPE (ARITH_INS)
+ && !IS_INSN_TYPE (ARITH_BYTE_INS)
+ && !IS_INSN_TYPE (CMPBR_INS)))
+ {
+ /* Counting the number of bits required to represent
+ the constant. */
+ cnt = 0;
+ temp = crx_ins->arg[number].constant - 1;
+ while (temp > 0)
+ {
+ temp >>= 1;
+ cnt++;
+ }
+ crx_ins->arg[number].size = cnt + 1;
+ crx_ins->arg[number].constant =
+ ~(crx_ins->arg[number].constant) + 1;
+ if (IS_INSN_TYPE (ARITH_INS) || IS_INSN_TYPE (ARITH_BYTE_INS))
+ {
+ char ptr[30];
+ LONGLONG temp64;
+
+ /* Tomer - Originally the call was to 'strtoull', which isn't
+ identified by MSVC. Instead we check for overflow. */
+ temp64 = strtoul (str, (char **) &ptr, 0);
+ if (cnt < 4)
+ crx_ins->arg[number].size = 5;
+
+ if (IS_INSN_TYPE (ARITH_INS))
+ {
+ if (crx_ins->arg[number].size > 32
+ /* Tomer - check for overflow. */
+ || (temp64 == ULONG_MAX))
+ {
+ if (crx_ins->arg[number].size > 32)
+ as_bad (_("In Instruction `%s': Immediate size is \
+ %lu bits cannot be accomodated"),
+ ins_parse, cnt + 1);
+
+ /* Tomer - check for overflow. */
+ if (temp64 == ULONG_MAX)
+ as_bad (_("Value given more than 32 bits in \
+ Instruction `%s'"), ins_parse);
+ }
+ }
+ if (IS_INSN_TYPE (ARITH_BYTE_INS))
+ {
+ if (crx_ins->arg[number].size > 16
+ || !((temp64 & 0xFFFF0000) == 0xFFFF0000
+ || (temp64 & 0xFFFF0000) == 0x0))
+ {
+ if (crx_ins->arg[number].size > 16)
+ as_bad (_("In Instruction `%s': Immediate size is \
+ %lu bits cannot be accomodated"),
+ ins_parse, cnt + 1);
+
+ if (!((temp64 & 0xFFFF0000) == 0xFFFF0000
+ || (temp64 & 0xFFFF0000) == 0x0))
+ as_bad (_("Value given more than 16 bits in \
+ Instruction `%s'"), ins_parse);
+ }
+ }
+ }
+ if (IS_INSN_TYPE (LD_STOR_INS) && crx_ins->arg[number].type == arg_cr
+ && !post_inc_mode)
+ {
+ /* Cases handled ---
+ dispub4/dispuw4/dispud4 and for load store dispubwd4
+ is applicable only. */
+ if (crx_ins->arg[number].size <= 4)
+ crx_ins->arg[number].size = 5;
+ }
+ /* Argument number is checked to distinguish between
+ immediate and displacement in cmpbranch and bcopcond. */
+ if ((IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (COP_BRANCH_INS))
+ && number == 2)
+ {
+ if (crx_ins->arg[number].size != 32)
+ crx_ins->arg[number].constant =
+ crx_ins->arg[number].constant >> 1;
+ }
+
+ mask_const (&crx_ins->arg[number].constant,
+ (int) crx_ins->arg[number].size);
+ }
+ }
+ else
+ {
+ /* Argument number is checked to distinguish between
+ immediate and displacement in cmpbranch and bcopcond. */
+ if (((IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (COP_BRANCH_INS))
+ && number == 2)
+ || IS_INSN_TYPE (BRANCH_NEQ_INS))
+ {
+ if (IS_INSN_TYPE (BRANCH_NEQ_INS))
+ {
+ if (crx_ins->arg[number].constant == 0)
+ as_bad (_("Instruction `%s' has Zero offset"), ins_parse);
+ }
+
+ if (crx_ins->arg[number].constant % 2 != 0)
+ as_bad (_("Instruction `%s' has odd offset"), ins_parse);
+
+ if (IS_INSN_TYPE (BRANCH_NEQ_INS))
+ {
+ if (crx_ins->arg[number].constant > 32
+ || crx_ins->arg[number].constant < 2)
+ as_bad (_("Instruction `%s' has illegal offset (%ld)"),
+ ins_parse, crx_ins->arg[number].constant);
+
+ crx_ins->arg[number].constant -= 2;
+ }
+
+ crx_ins->arg[number].constant =
+ crx_ins->arg[number].constant >> 1;
+ get_number_of_bits (crx_ins, number);
+ }
+
+ /* Compare branch argument number zero to be compared -
+ mapped to cst4. */
+ if (IS_INSN_TYPE (CMPBR_INS) && number == 0)
+ {
+ for (cst4_op = cst4_map; cst4_op < (cst4_map + cst4_maps); cst4_op++)
+ {
+ if (crx_ins->arg[number].constant == (unsigned int)cst4_op->value)
+ {
+ crx_ins->arg[number].constant = cst4_op->binary;
+ is_cst4 = 1;
+ break;
+ }
+ }
+ if (!is_cst4)
+ as_bad (_("Instruction `%s' has invalid imm value as an \
+ operand"), ins_parse);
+ }
+ }
+ break;
+
+ case O_symbol:
+ case O_subtract:
+ crx_ins->arg[number].constant = 0;
+ relocatable = 1;
+
+ switch (crx_ins->arg[number].type)
+ {
+ case arg_cr:
+ /* Have to consider various cases here --load/stor++[bwd] rbase, reg. */
+ if (IS_INSN_TYPE (LD_STOR_INS_INC))
+ crx_ins->rtype = BFD_RELOC_CRX_REGREL12;
+ else if (IS_INSN_TYPE (CSTBIT_INS)
+ || IS_INSN_TYPE (STOR_IMM_INS))
+ /* 'stor[bwd] imm' and '[stc]bit[bwd]'. */
+ crx_ins->rtype = BFD_RELOC_CRX_REGREL28;
+ else
+ /* General load store instruction. */
+ crx_ins->rtype = BFD_RELOC_CRX_REGREL32;
+ break;
+ case arg_icr:
+ /* Index Mode 22 bits relocation. */
+ crx_ins->rtype = BFD_RELOC_CRX_REGREL22;
+ break;
+ case arg_c:
+ /* Absolute types. */
+ /* Case for jumps...dx types. */
+ /* For bal. */
+ if (IS_INSN_MNEMONIC ("bal") || IS_INSN_TYPE (DCR_BRANCH_INS))
+ crx_ins->rtype = BFD_RELOC_CRX_REL16;
+ else if (IS_INSN_TYPE (BRANCH_INS))
+ {
+ crx_ins->rtype = BFD_RELOC_CRX_REL8;
+
+ /* Overriding the above by the br_type_flag set above. */
+ switch (br_type_flag)
+ {
+ default:
+ break;
+ case 8:
+ crx_ins->rtype = BFD_RELOC_CRX_REL8;
+ break;
+ case 16:
+ crx_ins->rtype = BFD_RELOC_CRX_REL16;
+ break;
+ case 32:
+ crx_ins->rtype = BFD_RELOC_CRX_REL32;
+ break;
+ }
+ }
+ else if (IS_INSN_TYPE (LD_STOR_INS) || IS_INSN_TYPE (STOR_IMM_INS)
+ || IS_INSN_TYPE (CSTBIT_INS))
+ crx_ins->rtype = BFD_RELOC_CRX_ABS32;
+ else if (IS_INSN_TYPE (BRANCH_NEQ_INS))
+ crx_ins->rtype = BFD_RELOC_CRX_REL4;
+ else if (IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (COP_BRANCH_INS))
+ {
+ if (cmp_br_type_flag == 24)
+ crx_ins->rtype = BFD_RELOC_CRX_REL24;
+ else
+ crx_ins->rtype = BFD_RELOC_CRX_REL8_CMP;
+ }
+ break;
+ case arg_ic:
+ case arg_dc:
+ if (IS_INSN_TYPE (ARITH_INS))
+ crx_ins->rtype = BFD_RELOC_CRX_IMM32;
+ else if (IS_INSN_TYPE (ARITH_BYTE_INS))
+ crx_ins->rtype = BFD_RELOC_CRX_IMM16;
+ break;
+ default:
+ break;
+ }
+ crx_ins->arg[number].size = (bfd_reloc_type_lookup (stdoutput, crx_ins->rtype))->bitsize;
+ break;
+
+ default:
+ break;
+ }
+
+ input_line_pointer = save;
+ crx_ins->arg[number].signflag = signflag;
+ return crx_ins->exp.X_op;
+}
+
+/* Get the values of the scale to be encoded -
+ used for the scaled index mode of addressing. */
+
+static int
+exponent2scale (int val)
+{
+ int exponent;
+
+ /* If 'val' is 0, the following 'for' will be an endless loop. */
+ if (val == 0)
+ return 0;
+
+ for (exponent = 0; (val != 1); val >>= 1, exponent++)
+ ;
+
+ return exponent;
+}
+
+/* This is used to set the index mode parameters. Used to set the attributes of
+ an indexmode type of operand. op_num is the operand number. */
+
+static void
+set_indexmode_parameters (char *operand, ins * crx_ins, int op_num)
+{
+ char address_str[30];
+ char scale_str[MAX_OPERANDS];
+ int scale_cnt = 0;
+ char reg_name[MAX_REGNAME_LEN];
+ char regindex_name[MAX_REGNAME_LEN];
+ int i = 0;
+ int reg_counter = 0, addr_cnt = 0, temp_int_val = 0;
+
+ switch (crx_ins->arg[op_num].type)
+ {
+ case arg_icr:
+ while (operand[i] != '(')
+ {
+ address_str[addr_cnt++] = operand[i];
+ i++;
+ }
+ address_str[addr_cnt] = '\0';
+ process_label_constant (address_str, crx_ins, op_num);
+ i++;
+ reg_counter = 0;
+ while (operand[i] != ',' && operand[i] != ' ')
+ {
+ reg_name[reg_counter++] = operand[i];
+ i++;
+ }
+ reg_name[reg_counter] = '\0';
+ if ((crx_ins->arg[op_num].r = get_register (reg_name)) == nullregister)
+ as_bad (_("Illegal register `%s' in Instruction `%s'"),
+ reg_name, ins_parse);
+
+ i++;
+ while (operand[i] == ' ')
+ i++;
+
+ reg_counter = 0;
+ while (operand[i] != ')' && operand[i] != ',')
+ {
+ regindex_name[reg_counter++] = operand[i];
+ i++;
+ }
+ regindex_name[reg_counter] = '\0';
+ reg_counter = 0;
+ if ((crx_ins->arg[op_num].i_r = get_register (regindex_name))
+ == nullregister)
+ as_bad (_("Illegal register `%s' in Instruction `%s'"),
+ regindex_name, ins_parse);
+
+ /* Setting the scale parameters. */
+ while (operand[i] == ' ')
+ i++;
+
+ if (operand[i] == ')')
+ crx_ins->arg[op_num].scale = 0;
+ else
+ {
+ if (operand[i] == ',')
+ i++;
+
+ while (operand[i] != ' ' && operand[i] != ')')
+ {
+ scale_str[scale_cnt++] = operand[i];
+ i++;
+ }
+
+ scale_str[scale_cnt] = '\0';
+ /* Preprocess the scale string. */
+ if (strstr (scale_str, "0x") != NULL
+ || strstr (scale_str, "0X") != NULL)
+ {
+ sscanf (scale_str, "%x", &temp_int_val);
+ memset (&scale_str, '\0', sizeof (scale_str));
+ sprintf (scale_str, "%d", temp_int_val);
+ }
+ /* Preprocess over. */
+ temp_int_val = atoi (scale_str);
+
+ if (temp_int_val != 1 && temp_int_val != 2
+ && temp_int_val != 4 && temp_int_val != 8)
+ as_bad (_("Illegal Scale - `%s'"), scale_str);
+
+ crx_ins->arg[op_num].scale = exponent2scale (temp_int_val);
+ }
+ break;
+ default:
+ break;
+ }
+}
+
+/* Parsing the operands of types
+ - constants
+ - rbase -> (register)
+ - offset(rbase)
+ - offset(rbase)+ - post increment mode. */
+
+static void
+set_cons_rparams (char *operand, ins * crx_ins, int op_num)
+{
+ int i = 0, reg_count = 0;
+ char reg_name[MAX_REGNAME_LEN];
+ int change_flag = 0;
+
+ if (crx_ins->arg[op_num].type == arg_dc)
+ change_flag = 1;
+
+ switch (crx_ins->arg[op_num].type)
+ {
+ case arg_sc: /* Case *+347. */
+ case arg_dc: /* Case $18. */
+ i++;
+ case arg_c:/* Case where its a simple constant. */
+ process_label_constant (operand + i, crx_ins, op_num);
+ crx_ins->arg[op_num].type = arg_c;
+ break;
+ case arg_dcr: /* Case $9(r13). */
+ operand++;
+ case arg_cr: /* Case 9(r13. */
+ while (operand[i] != '(')
+ i++;
+ operand[i] = '\0';
+ process_label_constant (operand, crx_ins, op_num);
+ operand[i] = '(';
+ i++;
+ reg_count = 0;
+ while (operand[i] != ')')
+ {
+ reg_name[reg_count] = operand[i];
+ i++;
+ reg_count++;
+ }
+ reg_name[reg_count] = '\0';
+ if ((crx_ins->arg[op_num].r = get_register (reg_name)) == nullregister)
+ as_bad (_("Illegal register `%s' in Instruction `%s'"),
+ reg_name, ins_parse);
+
+ crx_ins->arg[op_num].type = arg_cr;
+ /* Post increment is represented in assembly as offset (register)+. */
+ if (strstr (operand + i, "+") != NULL)
+ /* There is a plus after the ')'. */
+ post_inc_mode = 1;
+ break;
+ default:
+ break;
+ }
+ if (change_flag == 1)
+ crx_ins->arg[op_num].type = arg_ic;
+}
+
+/* This is used to get the operand attributes -
+ operand - current operand to be used
+ number - operand number
+ crx_ins - current assembled instruction. */
+
+static void
+get_operandtype (char *operand, int number, ins * crx_ins)
+{
+ int ret_val;
+ char temp_operand[30];
+
+ switch (operand[0])
+ {
+ /* When it is a register. */
+ case 'r':
+ case 'c':
+ case 'i':
+ case 'u':
+ case 's':
+ case 'p':
+ case 'l':
+ case 'h':
+ /* Check whether this is a general processor register. */
+ ret_val = get_register (operand);
+ if (ret_val != nullregister)
+ {
+ crx_ins->arg[number].type = arg_r;
+ crx_ins->arg[number].r = ret_val;
+ crx_ins->arg[number].size = REG_SIZE;
+ }
+ else
+ {
+ /* Check whether this is a core [special] coprocessor register. */
+ ret_val = get_copregister (operand);
+ if (ret_val != nullcopregister)
+ {
+ crx_ins->arg[number].type = arg_copr;
+ if (ret_val >= cs0)
+ crx_ins->arg[number].type = arg_copsr;
+ crx_ins->arg[number].cr = ret_val;
+ crx_ins->arg[number].size = REG_SIZE;
+ }
+ else
+ {
+ if (strchr (operand, '(') != NULL)
+ {
+ if (strchr (operand, ',') != NULL
+ && (strchr (operand, ',') > strchr (operand, '(')))
+ {
+ crx_ins->arg[number].type = arg_icr;
+ crx_ins->arg[number].constant = 0;
+ set_indexmode_parameters (operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ return;
+ }
+ else
+ crx_ins->arg[number].type = arg_cr;
+ }
+ else
+ crx_ins->arg[number].type = arg_c;
+ crx_ins->arg[number].constant = 0;
+ set_cons_rparams (operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ }
+ }
+ break;
+ case '$':
+ if (strchr (operand, '(') != NULL)
+ crx_ins->arg[number].type = arg_dcr;
+ else
+ crx_ins->arg[number].type = arg_dc;
+ crx_ins->arg[number].constant = 0;
+ set_cons_rparams (operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ break;
+
+ case '(':
+ /* Augmenting a zero in front of an operand -- won't work for tbit/sbit. */
+ strcpy (temp_operand, "0");
+ strcat (temp_operand, operand);
+ if (strchr (temp_operand, ',') != NULL
+ && (strchr (temp_operand, ',') > strchr (temp_operand, '(')))
+ {
+ crx_ins->arg[number].type = arg_icr;
+ crx_ins->arg[number].constant = 0;
+ set_indexmode_parameters (temp_operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ return;
+ }
+ else
+ {
+ crx_ins->arg[number].type = arg_cr;
+ crx_ins->arg[number].constant = 0;
+ set_cons_rparams (operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ if ((! strneq (instruction->mnemonic, "load", 4))
+ && (! strneq (instruction->mnemonic, "stor", 4)))
+ {
+ crx_ins->arg[number].type = arg_rbase;
+ crx_ins->arg[number].size = REG_SIZE;
+ }
+ return;
+ }
+ break;
+ case '*':
+ crx_ins->arg[number].type = arg_sc;
+ crx_ins->arg[number].constant = 0;
+ set_cons_rparams (operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ break;
+ case '+':
+ case '-':
+ case '0':
+ case '1':
+ case '2':
+ case '3':
+ case '4':
+ case '5':
+ case '6':
+ case '7':
+ case '8':
+ case '9':
+ if (strchr (operand, '(') != NULL)
+ {
+ if (strchr (operand, ',') != NULL
+ && (strchr (operand, ',') > strchr (operand, '(')))
+ {
+ crx_ins->arg[number].type = arg_icr;
+ crx_ins->arg[number].constant = 0;
+ set_indexmode_parameters (operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ return;
+ }
+ else
+ crx_ins->arg[number].type = arg_cr;
+ }
+ else
+ crx_ins->arg[number].type = arg_c;
+ crx_ins->arg[number].constant = 0;
+ set_cons_rparams (operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ break;
+ default:
+ if (strchr (operand, '(') != NULL)
+ {
+ if (strchr (operand, ',') != NULL
+ && (strchr (operand, ',') > strchr (operand, '(')))
+ {
+ crx_ins->arg[number].type = arg_icr;
+ crx_ins->arg[number].constant = 0;
+ set_indexmode_parameters (operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ return;
+ }
+ else
+ crx_ins->arg[number].type = arg_cr;
+ }
+ else
+ crx_ins->arg[number].type = arg_c;
+ crx_ins->arg[number].constant = 0;
+ set_cons_rparams (operand, crx_ins, number);
+ get_number_of_bits (crx_ins, number);
+ break;
+ }
+}
+
+/* Operands are parsed over here, separated into various operands. Each operand
+ is then analyzed to fillup the fields in the crx_ins data structure. */
+
+static void
+parse_operands (ins * crx_ins, char *operands)
+{
+ char *operandS; /* Operands string. */
+ char *operandH, *operandT; /* Single operand head/tail pointers. */
+ int allocated = 0; /* Indicates a new operands string was allocated. */
+ char *operand[MAX_OPERANDS]; /* Separating the operands. */
+ int op_num = 0; /* Current operand number we are parsing. */
+ int bracket_flag = 0; /* Indicates a bracket '(' was found. */
+ int sq_bracket_flag = 0; /* Indicates a square bracket '[' was found. */
+
+ /* Preprocess the list of registers, if necessary. */
+ operandS = operandH = operandT = (INST_HAS_REG_LIST) ?
+ preprocess_reglist (operands, &allocated) : operands;
+
+ while (*operandT != '\0')
+ {
+ if (*operandT == ',' && bracket_flag != 1 && sq_bracket_flag != 1)
+ {
+ *operandT++ = '\0';
+ operand[op_num++] = strdup (operandH);
+ operandH = operandT;
+ continue;
+ }
+
+ if (*operandT == ' ')
+ as_bad (_("Illegal operands (whitespace): `%s'"), ins_parse);
+
+ if (*operandT == '(')
+ bracket_flag = 1;
+ else if (*operandT == '[')
+ sq_bracket_flag = 1;
+
+ if (*operandT == ')')
+ {
+ if (bracket_flag)
+ bracket_flag = 0;
+ else
+ as_fatal (_("Missing matching brackets : `%s'"), ins_parse);
+ }
+ else if (*operandT == ']')
+ {
+ if (sq_bracket_flag)
+ sq_bracket_flag = 0;
+ else
+ as_fatal (_("Missing matching brackets : `%s'"), ins_parse);
+ }
+
+ if (bracket_flag == 1 && *operandT == ')')
+ bracket_flag = 0;
+ else if (sq_bracket_flag == 1 && *operandT == ']')
+ sq_bracket_flag = 0;
+
+ operandT++;
+ }
+
+ /* Adding the last operand. */
+ operand[op_num++] = strdup (operandH);
+ crx_ins->nargs = op_num;
+
+ /* Verifying correct syntax of operands (all brackets should be closed). */
+ if (bracket_flag || sq_bracket_flag)
+ as_fatal (_("Missing matching brackets : `%s'"), ins_parse);
+
+ /* Now to recongnize the operand types. */
+ for (op_num = 0; op_num < crx_ins->nargs; op_num++)
+ {
+ get_operandtype (operand[op_num], op_num, crx_ins);
+ free (operand[op_num]);
+ }
+
+ if (allocated)
+ free (operandS);
+}
+
+/* Get the trap index in dispatch table, given its name.
+ This routine is used by assembling the 'excp' instruction. */
+
+static int
+gettrap (char *s)
+{
+ const trap_entry *trap;
+
+ for (trap = crx_traps; trap < (crx_traps + NUMTRAPS); trap++)
+ if (streq (trap->name, s))
+ return trap->entry;
+
+ as_bad (_("Unknown exception: `%s'"), s);
+ return 0;
+}
+
+/* Post-Increment instructions are a sub-group within load/stor instruction
+ groups. Therefore, when parsing a Post-Increment insn, we have to advance
+ the instruction pointer to the start of that sub-group. */
+
+static void
+handle_pi_insn (char *operands)
+{
+ /* Assuming Post-Increment insn has the following format :
+ 'MNEMONIC DISP(REG)+, REG' (e.g. 'loadw 12(r5)+, r6'). */
+ if (strstr (operands, ")+") != NULL)
+ while (! IS_INSN_TYPE (LD_STOR_INS_INC))
+ instruction++;
+}
+
+/* Top level module where instruction parsing starts.
+ crx_ins - data structure holds some information.
+ operands - holds the operands part of the whole instruction. */
+
+static void
+parse_insn (ins *insn, char *operands)
+{
+ /* Handle 'excp'/'cinv' */
+ if (IS_INSN_MNEMONIC ("excp") || IS_INSN_MNEMONIC ("cinv"))
+ {
+ insn->nargs = 1;
+ insn->arg[0].type = arg_ic;
+ insn->arg[0].size = 4;
+ insn->arg[0].constant = IS_INSN_MNEMONIC ("excp") ?
+ gettrap (operands) : get_cinv_parameters (operands);
+ return;
+ }
+
+ /* Handle load/stor post-increment instructions. */
+ if (IS_INSN_TYPE (LD_STOR_INS) || IS_INSN_TYPE (STOR_IMM_INS))
+ handle_pi_insn (operands);
+
+ if (operands != NULL)
+ parse_operands (insn, operands);
+}
+
+/* Cinv instruction requires special handling. */
+
+static int
+get_cinv_parameters (char * operand)
+{
+ char *p = operand;
+ int d_used = 0, i_used = 0, u_used = 0;
+
+ while (*++p != ']')
+ {
+ if (*p == ',' || *p == ' ')
+ continue;
+
+ if (*p == 'd')
+ d_used = 1;
+ else if (*p == 'i')
+ i_used = 1;
+ else if (*p == 'u')
+ u_used = 1;
+ else
+ as_bad (_("Illegal `cinv' parameter: `%c'"), *p);
+ }
+
+ return ((d_used ? 4 : 0)
+ + (i_used ? 2 : 0)
+ + (u_used ? 1 : 0));
+}
+
+/* Retrieve the opcode image of a given register.
+ If the register is illegal for the current instruction,
+ issue an error. */
+
+static int
+getreg_image (reg r)
+{
+ const reg_entry *reg;
+ char *reg_name;
+ int special_register_flag = 0;
+ int movpr_flag = 0; /* Nonzero means current mnemonic is 'mtpr'/'mfpr' */
+
+ if (IS_INSN_MNEMONIC ("mtpr") || IS_INSN_MNEMONIC ("mfpr"))
+ movpr_flag = 1;
+
+ if (((IS_INSN_MNEMONIC ("mtpr")) && (processing_arg_number == 1))
+ || ((IS_INSN_MNEMONIC ("mfpr")) && (processing_arg_number == 0)) )
+ special_register_flag = 1;
+
+ /* Check whether the register is in registers table. */
+ if (r < MAX_REG)
+ reg = &crx_regtab[r];
+ /* Check whether the register is in coprocessor registers table. */
+ else if (r < MAX_COPREG)
+ reg = &crx_copregtab[r-MAX_REG];
+ /* Register not found. */
+ else
+ {
+ as_bad (_("Unknown register: `%d'"), r);
+ return 0;
+ }
+
+ reg_name = reg->name;
+
+/* Issue a error message when register is illegal. */
+#define IMAGE_ERR \
+ as_bad (_("Illegal register (`%s') in Instruction: `%s'"), \
+ reg_name, ins_parse); \
+ break;
+
+ switch (reg->type)
+ {
+ case CRX_U_REGTYPE:
+ case CRX_CFG_REGTYPE:
+ case CRX_MTPR_REGTYPE:
+ if (movpr_flag && special_register_flag)
+ return reg->image;
+ else
+ IMAGE_ERR;
+
+ case CRX_R_REGTYPE:
+ case CRX_C_REGTYPE:
+ case CRX_CS_REGTYPE:
+ if (!(movpr_flag && special_register_flag))
+ return reg->image;
+ else
+ IMAGE_ERR;
+
+ default:
+ IMAGE_ERR;
+ }
+
+ return 0;
+}
+
+/* Routine used to get the binary-string equivalent of a integer constant
+ which currently require currbits to represent itself to be extended to
+ nbits. */
+
+static unsigned long int
+getconstant (unsigned long int x, int nbits)
+{
+ int cnt = 0;
+ unsigned long int temp = x;
+
+ while (temp > 0)
+ {
+ temp >>= 1;
+ cnt++;
+ }
+
+ /* Escape sequence to next 16bit immediate. */
+ if (cnt > nbits)
+ as_bad (_("Value `%ld' truncated to fit `%d' bits in instruction `%s'"),
+ x, cnt, ins_parse);
+ else
+ {
+ if (signflag)
+ x |= SET_BITS_MASK (cnt, nbits - cnt);
+ else
+ x &= CLEAR_BITS_MASK (cnt, nbits - cnt);
+ }
+
+ /* The following expression avoids overflow if
+ 'nbits' is the number of bits in 'bfd_vma'. */
+ return (x & ((((1 << (nbits - 1)) - 1) << 1) | 1));
+}
+
+/* Print a constant value to 'output_opcode':
+ ARG holds the operand's type and value.
+ SHIFT represents the location of the operand to be print into.
+ NBITS determines the size (in bits) of the constant. */
+
+static void
+print_constant (int nbits, int shift, argument *arg)
+{
+ unsigned long mask = 0;
+
+ long constant = getconstant (arg->constant, nbits);
+
+ switch (nbits)
+ {
+ case 32:
+ case 28:
+ case 24:
+ case 22:
+ /* mask the upper part of the constant, that is, the bits
+ going to the lowest byte of output_opcode[0].
+ The upper part of output_opcode[1] is always filled,
+ therefore it is always masked with 0xFFFF. */
+ mask = (1 << (nbits - 16)) - 1;
+ /* Divide the constant between two consecutive words :
+ 0 1 2 3
+ +---------+---------+---------+---------+
+ | | X X X X | X X X X | |
+ +---------+---------+---------+---------+
+ output_opcode[0] output_opcode[1] */
+
+ CRX_PRINT (0, (constant >> WORD_SHIFT) & mask, 0);
+ CRX_PRINT (1, (constant & 0xFFFF), WORD_SHIFT);
+ break;
+
+ case 16:
+ case 12:
+ /* Special case - in arg_cr, the SHIFT represents the location
+ of the REGISTER, not the constant, which is itself not shifted. */
+ if (arg->type == arg_cr)
+ {
+ CRX_PRINT (0, constant, 0);
+ break;
+ }
+
+ /* When instruction size is 3, a 16-bit constant is always
+ filling the upper part of output_opcode[1]. */
+ if (instruction->size > 2)
+ CRX_PRINT (1, constant, WORD_SHIFT);
+ else
+ CRX_PRINT (0, constant, shift);
+ break;
+
+ default:
+ CRX_PRINT (0, constant, shift);
+ break;
+ }
+}
+
+/* Print an operand to 'output_opcode', which later on will be
+ printed to the object file:
+ ARG holds the operand's type, size and value.
+ SHIFT represents the printing location of operand.
+ NBITS determines the size (in bits) of a constant operand. */
+
+static void
+print_operand (int nbits, int shift, argument *arg)
+{
+ switch (arg->type)
+ {
+ case arg_r:
+ CRX_PRINT (0, getreg_image (arg->r), shift);
+ break;
+
+ case arg_copr:
+ if (arg->cr < c0 || arg->cr > c15)
+ as_bad (_("Illegal Co-processor register in Instruction `%s' "),
+ ins_parse);
+ CRX_PRINT (0, getreg_image (arg->cr), shift);
+ break;
+
+ case arg_copsr:
+ if (arg->cr < cs0 || arg->cr > cs15)
+ as_bad (_("Illegal Co-processor special register in Instruction `%s' "),
+ ins_parse);
+ CRX_PRINT (0, getreg_image (arg->cr), shift);
+ break;
+
+ case arg_ic:
+ print_constant (nbits, shift, arg);
+ break;
+
+ case arg_icr:
+ /* 16 12 8 6 0
+ +--------------------------------+
+ | reg | r_base | scl| disp |
+ +--------------------------------+ */
+ CRX_PRINT (0, getreg_image (arg->r), 12);
+ CRX_PRINT (0, getreg_image (arg->i_r), 8);
+ CRX_PRINT (0, arg->scale, 6);
+ print_constant (nbits, shift, arg);
+ break;
+
+ case arg_rbase:
+ CRX_PRINT (0, getreg_image (arg->r), shift);
+ break;
+
+ case arg_cr:
+ /* case base_cst4. */
+ if ((instruction->flags & CST4MAP) && cst4flag)
+ output_opcode[0] |= (getconstant (arg->constant, nbits)
+ << (shift + REG_SIZE));
+ else
+ /* rbase_dispu<NN> and other such cases. */
+ print_constant (nbits, shift, arg);
+ /* Add the register argument to the output_opcode. */
+ CRX_PRINT (0, getreg_image (arg->r), shift);
+ break;
+
+ case arg_c:
+ print_constant (nbits, shift, arg);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/* Retrieve the number of operands for the current assembled instruction. */
+
+static int
+get_number_of_operands (void)
+{
+ int i;
+
+ for (i = 0; instruction->operands[i].op_type && i < MAX_OPERANDS; i++)
+ ;
+ return i;
+}
+
+/* Assemble a single instruction :
+ Instruction has been parsed and all operand values set appropriately.
+ Algorithm for assembling -
+ For instruction to be assembled:
+ Step 1: Find instruction in the array crx_instruction with same mnemonic.
+ Step 2: Find instruction with same operand types.
+ Step 3: If (size_of_operands) match then done, else increment the
+ array_index and goto Step3.
+ Step 4: Cannot assemble
+ Returns 1 upon success, 0 upon failure. */
+
+static int
+assemble_insn (char *mnemonic, ins *insn)
+{
+ /* Argument type of each operand in the instruction we are looking for. */
+ argtype atyp[MAX_OPERANDS];
+ /* Argument type of each operand in the current instruction. */
+ argtype atyp_act[MAX_OPERANDS];
+ /* Size (in bits) of each operand in the instruction we are looking for. */
+ int bits[MAX_OPERANDS];
+ /* Size (in bits) of each operand in the current instruction. */
+ int bits_act[MAX_OPERANDS];
+ /* Location (in bits) of each operand in the current instruction. */
+ int shift_act[MAX_OPERANDS];
+ int match = 0;
+ int done_flag = 0;
+ int cst4maptype = 0;
+ int changed_already = 0;
+ unsigned int temp_value = 0;
+ int instrtype, i;
+ /* A pointer to the argument's constant value. */
+ unsigned long int *cons;
+ /* Pointer to loop over all cst4_map entries. */
+ const cst4_entry *cst4_op;
+
+ /* Instruction has no operands -> copy only the constant opcode. */
+ if (insn->nargs == 0)
+ {
+ output_opcode[0] = BIN (instruction->match, instruction->match_bits);
+ return 1;
+ }
+
+ /* Find instruction with same number of operands. */
+ while (get_number_of_operands () != insn->nargs
+ && IS_INSN_MNEMONIC (mnemonic))
+ instruction++;
+
+ if (!IS_INSN_MNEMONIC (mnemonic))
+ return 0;
+
+ /* Initialize argument type and size of each given operand. */
+ for (i = 0; i < insn->nargs; i++)
+ {
+ atyp[i] = insn->arg[i].type;
+ bits[i] = insn->arg[i].size;
+ }
+
+ /* Initialize argument type and size of each operand in current inst. */
+ GET_ACTUAL_TYPE;
+ GET_ACTUAL_SIZE;
+
+ while (match != 1
+ /* Check we didn't get to end of table. */
+ && instruction->mnemonic != NULL
+ /* Check that the actual mnemonic is still available. */
+ && IS_INSN_MNEMONIC (mnemonic))
+ {
+ /* Check for argement type compatibility. */
+ for (i = 0; i < insn->nargs; i++)
+ {
+ if (atyp_act[i] == atyp[i])
+ done_flag = 1;
+ else
+ {
+ done_flag = 0;
+ break;
+ }
+ }
+ if (done_flag)
+ {
+ /* Check for post inc mode of the current instruction. */
+ if (post_inc_mode == 1 || IS_INSN_TYPE (LD_STOR_INS_INC))
+ done_flag = (post_inc_mode == IS_INSN_TYPE (LD_STOR_INS_INC));
+ }
+
+ if (done_flag == 0)
+ {
+ /* Try again with next instruction. */
+ instruction++;
+ GET_ACTUAL_TYPE;
+ GET_ACTUAL_SIZE;
+ continue;
+ }
+ else
+ {
+ /* Check for size compatibility. */
+ for (i = 0; i < insn->nargs; i++)
+ {
+ if (bits[i] > bits_act[i])
+ {
+ /* Actual size is too small - try again. */
+ done_flag = 0;
+ instruction++;
+ GET_ACTUAL_TYPE;
+ GET_ACTUAL_SIZE;
+ break;
+ }
+ }
+
+ }
+
+ if (done_flag == 1)
+ {
+ /* Full match is found. */
+ match = 1;
+ break;
+ }
+ }
+
+ if (match == 0)
+ /* We haven't found a match - instruction can't be assembled. */
+ return 0;
+ else
+ /* Full match - print the final image. */
+ {
+ /* Handle positive constants. */
+ if (!signflag)
+ {
+ if (IS_INSN_TYPE (LD_STOR_INS) && !relocatable)
+ {
+ /* Get the map type of the instruction. */
+ instrtype = instruction->flags & REVERSE_MATCH ? 0 : 1;
+ cons = &insn->arg[instrtype].constant;
+ cst4maptype = instruction->flags & CST4MAP;
+
+ switch (cst4maptype)
+ {
+ case DISPUB4:
+ /* 14 and 15 are reserved escape sequences of dispub4. */
+ if (*cons == 14 || *cons == 15)
+ {
+ instruction++;
+ GET_ACTUAL_SIZE;
+ }
+ break;
+
+ case DISPUW4:
+ /* Mapping has to be done. */
+ if (*cons <= 15 && *cons % 2 != 0)
+ {
+ instruction++;
+ GET_ACTUAL_SIZE;
+ }
+ else if (*cons > 15 && *cons < 27 && *cons % 2 == 0)
+ {
+ instruction--;
+ GET_ACTUAL_SIZE;
+ }
+ if (*cons < 27 && *cons % 2 == 0)
+ *cons /= 2;
+ break;
+
+ case DISPUD4:
+ /* Mapping has to be done. */
+ if (*cons <= 15 && *cons % 4 != 0)
+ {
+ instruction++;
+ GET_ACTUAL_SIZE;
+ }
+ else if (*cons > 15 && *cons < 53 && *cons % 4 == 0)
+ {
+ instruction--;
+ GET_ACTUAL_SIZE;
+ }
+ if (*cons < 53 && *cons % 4 == 0)
+ *cons /= 4;
+ break;
+ default:
+ break;
+ }
+ }
+ if ((IS_INSN_TYPE (ARITH_BYTE_INS) || IS_INSN_TYPE (ARITH_INS))
+ && !relocatable)
+ {
+ /* Check whether a cst4 mapping has to be done. */
+ if ((instruction->operands[0].op_type == cst4
+ || instruction->operands[0].op_type == i16)
+ && (instruction->operands[1].op_type == regr))
+ {
+ /* 'const' equals reserved escape sequences -->>
+ represent as i16. */
+ if (insn->arg[0].constant == ESC_16
+ || insn->arg[0].constant == ESC_32)
+ {
+ instruction++;
+ GET_ACTUAL_SIZE;
+ }
+ else
+ {
+ /* Loop over cst4_map entries. */
+ for (cst4_op = cst4_map; cst4_op < (cst4_map + cst4_maps);
+ cst4_op++)
+ {
+ /* 'const' equals a binary, which is already mapped
+ by a different value -->> represent as i16. */
+ if (insn->arg[0].constant == (unsigned int)cst4_op->binary
+ && cst4_op->binary != cst4_op->value)
+ {
+ instruction++;
+ GET_ACTUAL_SIZE;
+ }
+ /* 'const' equals a value bigger than 16 -->> map to
+ its binary and represent as cst4. */
+ else if (insn->arg[0].constant == (unsigned int)cst4_op->value
+ && insn->arg[0].constant >= 16)
+ {
+ instruction--;
+ insn->arg[0].constant = cst4_op->binary;
+ GET_ACTUAL_SIZE;
+ }
+ }
+ }
+ }
+ /* Special check for 'addub 0, r0' instruction -
+ The opcode '0000 0000 0000 0000' is not allowed. */
+ if (IS_INSN_MNEMONIC ("addub"))
+ {
+ if ((instruction->operands[0].op_type == cst4)
+ && instruction->operands[1].op_type == regr)
+ {
+ if (insn->arg[0].constant == 0 && insn->arg[1].r == r0)
+ instruction++;
+ }
+ }
+ }
+ if (IS_INSN_TYPE (LD_STOR_INS) || IS_INSN_TYPE (STOR_IMM_INS)
+ || IS_INSN_TYPE (LD_STOR_INS_INC))
+ {
+ instrtype = instruction->flags & REVERSE_MATCH ? 0 : 1;
+ if (instruction->operands[instrtype].op_type == rbase)
+ instruction++;
+ }
+ /* Error checking in case of post-increment instruction. */
+ if (IS_INSN_TYPE (LD_STOR_INS_INC))
+ {
+ if (!((strneq (instruction->mnemonic, "stor", 4))
+ && (insn->arg[0].type != arg_r)))
+ if (insn->arg[0].r == insn->arg[1].r)
+ as_bad (_("Invalid instruction : `%s' Source and Destination register \
+ same in Post INC mode"), ins_parse);
+ }
+ if (IS_INSN_TYPE (CSTBIT_INS) && !relocatable)
+ {
+ if (instruction->operands[1].op_type == rbase_dispu12)
+ {
+ if (insn->arg[1].constant == 0)
+ {
+ instruction--;
+ GET_ACTUAL_SIZE;
+ }
+ }
+ }
+ if ((IS_INSN_TYPE (LD_STOR_INS) || IS_INSN_TYPE (CSTBIT_INS)
+ || IS_INSN_TYPE (STOR_IMM_INS)
+ || IS_INSN_TYPE (LD_STOR_INS_INC)) & !relocatable)
+ {
+ instrtype = instruction->flags & REVERSE_MATCH ? 0 : 1;
+ changed_already = 0;
+ /* Convert 32 bits accesses to 16 bits accesses. */
+ if (instruction->operands[instrtype].op_type == abs32)
+ {
+ if ((insn->arg[instrtype].constant & 0xFFFF0000) == 0xFFFF0000)
+ {
+ instruction--;
+ insn->arg[instrtype].constant =
+ insn->arg[instrtype].constant & 0xFFFF;
+ insn->arg[instrtype].size = 16;
+ changed_already = 1;
+ GET_ACTUAL_SIZE;
+ }
+ }
+ /* Convert 16 bits accesses to 32 bits accesses. */
+ if (instruction->operands[instrtype].op_type == abs16
+ && changed_already != 1)
+ {
+ instruction++;
+ insn->arg[instrtype].constant =
+ insn->arg[instrtype].constant & 0xFFFF;
+ insn->arg[instrtype].size = 32;
+ GET_ACTUAL_SIZE;
+ }
+ changed_already = 0;
+ }
+ if (IS_INSN_TYPE (BRANCH_INS) && !relocatable)
+ {
+ /* 0x7e and 0x7f are reserved escape sequences of dispe9. */
+ if (insn->arg[0].constant == 0x7e || insn->arg[0].constant == 0x7f)
+ {
+ instruction++;
+ GET_ACTUAL_SIZE;
+ }
+ }
+ }
+
+ for (i = 0; i < insn->nargs; i++)
+ {
+ if (instruction->operands[i].op_type == cst4
+ || instruction->operands[i].op_type == rbase_cst4)
+ cst4flag = 1;
+ }
+
+ /* First, copy the instruction's opcode. */
+ output_opcode[0] = BIN (instruction->match, instruction->match_bits);
+
+ /* Swap the argument values in case bcop instructions. */
+ if (IS_INSN_TYPE (COP_BRANCH_INS))
+ {
+ temp_value = insn->arg[0].constant;
+ insn->arg[0].constant = insn->arg[1].constant;
+ insn->arg[1].constant = temp_value;
+ }
+
+ for (i = 0; i < insn->nargs; i++)
+ {
+ shift_act[i] = instruction->operands[i].shift;
+ signflag = insn->arg[i].signflag;
+ processing_arg_number = i;
+ print_operand (bits_act[i], shift_act[i], &insn->arg[i]);
+ }
+ }
+
+ return 1;
+}
+
+/* Set the appropriate bit for register 'r' in 'mask'.
+ This indicates that this register is loaded or stored by
+ the instruction. */
+
+static void
+mask_reg (int r, unsigned short int *mask)
+{
+ if ((reg)r > (reg)sp)
+ {
+ as_bad (_("Invalid Register in Register List"));
+ return;
+ }
+
+ *mask |= (1 << r);
+}
+
+/* Preprocess register list - create a 16-bit mask with one bit for each
+ of the 16 general purpose registers. If a bit is set, it indicates
+ that this register is loaded or stored by the instruction. */
+
+static char *
+preprocess_reglist (char *param, int *allocated)
+{
+ char reg_name[MAX_REGNAME_LEN]; /* Current parsed register name. */
+ char *regP; /* Pointer to 'reg_name' string. */
+ int reg_counter = 0; /* Count number of parsed registers. */
+ unsigned short int mask = 0; /* Mask for 16 general purpose registers. */
+ char *new_param; /* New created operands string. */
+ char *paramP = param; /* Pointer to original opearands string. */
+ char maskstring[10]; /* Array to print the mask as a string. */
+ reg r;
+ copreg cr;
+
+ /* If 'param' is already in form of a number, no need to preprocess. */
+ if (strchr (paramP, '{') == NULL)
+ return param;
+
+ /* Verifying correct syntax of operand. */
+ if (strchr (paramP, '}') == NULL)
+ as_fatal (_("Missing matching brackets : `%s'"), ins_parse);
+
+ while (*paramP++ != '{');
+
+ new_param = (char *)xcalloc (MAX_INST_LEN, sizeof (char));
+ *allocated = 1;
+ strncpy (new_param, param, paramP - param - 1);
+
+ while (*paramP != '}')
+ {
+ regP = paramP;
+ memset (®_name, '\0', sizeof (reg_name));
+
+ while (ISALNUM (*paramP))
+ paramP++;
+
+ strncpy (reg_name, regP, paramP - regP);
+
+ if (IS_INSN_TYPE (COP_REG_INS))
+ {
+ if ((cr = get_copregister (reg_name)) == nullcopregister)
+ as_bad (_("Illegal register `%s' in cop-register list"), reg_name);
+ mask_reg (getreg_image (cr - c0), &mask);
+ }
+ else
+ {
+ if ((r = get_register (reg_name)) == nullregister)
+ as_bad (_("Illegal register `%s' in register list"), reg_name);
+ mask_reg (getreg_image (r), &mask);
+ }
+
+ if (++reg_counter > MAX_REGS_IN_MASK16)
+ as_bad (_("Maximum %d bits may be set in `mask16' operand"),
+ MAX_REGS_IN_MASK16);
+
+ while (!ISALNUM (*paramP) && *paramP != '}')
+ paramP++;
+ }
+
+ if (*++paramP != '\0')
+ as_warn (_("rest of line ignored; first ignored character is `%c'"),
+ *paramP);
+
+ if (mask == 0)
+ as_bad (_("Illegal `mask16' operand, operation is undefined - `%s'"),
+ ins_parse);
+
+ sprintf (maskstring, "$0x%x", mask);
+ strcat (new_param, maskstring);
+ return new_param;
+}
+
+/* Print the instruction.
+ Handle also cases where the instruction is relaxable/relocatable. */
+
+void
+print_insn (ins *insn)
+{
+ unsigned int i, j, insn_size;
+ char *this_frag;
+ unsigned short words[4];
+
+ /* Arrange the insn encodings in a WORD size array. */
+ for (i = 0, j = 0; i < 2; i++)
+ {
+ words[j++] = (output_opcode[i] >> 16) & 0xFFFF;
+ words[j++] = output_opcode[i] & 0xFFFF;
+ }
+
+ /* Handle relaxtion. */
+ if ((instruction->flags & RELAXABLE) && relocatable)
+ {
+ int relax_subtype;
+
+ /* Write the maximal instruction size supported. */
+ insn_size = INSN_MAX_SIZE;
+
+ /* bCC */
+ if (IS_INSN_TYPE (BRANCH_INS))
+ relax_subtype = 0;
+ /* bal */
+ else if (IS_INSN_TYPE (DCR_BRANCH_INS) || IS_INSN_MNEMONIC ("bal"))
+ relax_subtype = 3;
+ /* cmpbr */
+ else if (IS_INSN_TYPE (CMPBR_INS))
+ relax_subtype = 5;
+ else
+ abort ();
+
+ this_frag = frag_var (rs_machine_dependent, insn_size * 2,
+ 4, relax_subtype,
+ insn->exp.X_add_symbol,
+ insn->exp.X_add_number,
+ 0);
+ }
+ else
+ {
+ insn_size = instruction->size;
+ this_frag = frag_more (insn_size * 2);
+
+ /* Handle relocation. */
+ if ((relocatable) && (insn->rtype != BFD_RELOC_NONE))
+ {
+ reloc_howto_type *reloc_howto;
+ int size;
+
+ reloc_howto = bfd_reloc_type_lookup (stdoutput, insn->rtype);
+
+ if (!reloc_howto)
+ abort ();
+
+ size = bfd_get_reloc_size (reloc_howto);
+
+ if (size < 1 || size > 4)
+ abort ();
+
+ fix_new_exp (frag_now, this_frag - frag_now->fr_literal,
+ size, &insn->exp, reloc_howto->pc_relative,
+ insn->rtype);
+ }
+ }
+
+ /* Write the instruction encoding to frag. */
+ for (i = 0; i < insn_size; i++)
+ {
+ md_number_to_chars (this_frag, (valueT) words[i], 2);
+ this_frag += 2;
+ }
+}
+
+/* This is the guts of the machine-dependent assembler. OP points to a
+ machine dependent instruction. This function is supposed to emit
+ the frags/bytes it assembles to. */
+
+void
+md_assemble (char *op)
+{
+ ins crx_ins;
+ char *param;
+ char c;
+
+ /* Reset global variables for a new instruction. */
+ reset_vars (op, &crx_ins);
+
+ /* Strip the mnemonic. */
+ for (param = op; *param != 0 && !ISSPACE (*param); param++)
+ ;
+ c = *param;
+ *param++ = '\0';
+
+ /* Find the instruction. */
+ instruction = (const inst *) hash_find (crx_inst_hash, op);
+ if (instruction == NULL)
+ {
+ as_bad (_("Unknown opcode: `%s'"), op);
+ return;
+ }
+
+ /* Tie dwarf2 debug info to the address at the start of the insn. */
+ dwarf2_emit_insn (0);
+
+ if (NO_OPERANDS_INST (op))
+ /* Handle instructions with no operands. */
+ crx_ins.nargs = 0;
+ else
+ /* Parse the instruction's operands. */
+ parse_insn (&crx_ins, param);
+
+ /* Assemble the instruction. */
+ if (assemble_insn (op, &crx_ins) == 0)
+ {
+ as_bad (_("Illegal operands in instruction : `%s'"), ins_parse);
+ return;
+ }
+
+ /* Print the instruction. */
+ print_insn (&crx_ins);
+}
--- /dev/null
+/* tc-crx.h -- Header file for tc-crx.c, the CRX GAS port.
+ Copyright 2004 Free Software Foundation, Inc.
+
+ Contributed by Tomer Levi, NSC, Israel.
+ Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
+ Updates, BFDizing, GNUifying and ELF support by Tomer Levi.
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to the
+ Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+ MA 02111-1307, USA. */
+
+#ifndef TC_CRX_H
+#define TC_CRX_H
+
+#define TC_CRX 1
+
+#define TARGET_BYTES_BIG_ENDIAN 0
+
+#define TARGET_FORMAT "elf32-crx"
+#define TARGET_ARCH bfd_arch_crx
+#define BFD_ARCH bfd_arch_crx
+
+#define WORKING_DOT_WORD
+#define NEED_FX_R_TYPE
+#define LOCAL_LABEL_PREFIX '.'
+
+#define md_undefined_symbol(s) 0
+#define md_number_to_chars number_to_chars_littleendian
+
+/* We do relaxing in the assembler as well as the linker. */
+extern const struct relax_type md_relax_table[];
+#define TC_GENERIC_RELAX_TABLE md_relax_table
+
+/* We do not want to adjust any relocations to make implementation of
+ linker relaxations easier. */
+#define tc_fix_adjustable(fixP) 0
+
+/* Fixup debug sections since we will never relax them. */
+#define TC_LINKRELAX_FIXUP(seg) (seg->flags & SEC_ALLOC)
+
+/* CRX instructions, with operands included, are a multiple
+ of two bytes long. */
+#define DWARF2_LINE_MIN_INSN_LENGTH 2
+
+/* This is called by emit_expr when creating a reloc for a cons.
+ We could use the definition there, except that we want to handle
+ the CRX reloc type specially, rather than the BFD_RELOC type. */
+#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) \
+ fix_new_exp (FRAG, OFF, (int)LEN, EXP, 0, \
+ LEN == 1 ? BFD_RELOC_CRX_NUM8 \
+ : LEN == 2 ? BFD_RELOC_CRX_NUM16 \
+ : LEN == 4 ? BFD_RELOC_CRX_NUM32 \
+ : BFD_RELOC_NONE);
+
+#endif /* TC_CRX_H */
sparc86x*) cpu_type=sparc arch=sparc86x ;;
sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c.
v850*) cpu_type=v850 ;;
+ crx*) cpu_type=crx endian=little ;;
xtensa*) cpu_type=xtensa arch=xtensa ;;
m32r) cpu_type=m32r target_cpu=m32r endian=big ;;
m32rle) cpu_type=m32r target_cpu=m32r endian=little ;;
cris-*-linux-gnu*) fmt=multi bfd_gas=yes em=linux ;;
cris-*-*) fmt=multi bfd_gas=yes ;;
+ crx-*-elf*) fmt=elf ;;
+
d10v-*-*) fmt=elf ;;
d30v-*-*) fmt=elf ;;
dlx-*-*) fmt=elf ;;
sparc86x*) cpu_type=sparc arch=sparc86x ;;
sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c.
v850*) cpu_type=v850 ;;
+ crx*) cpu_type=crx endian=little ;;
xtensa*) cpu_type=xtensa arch=xtensa ;;
m32r) cpu_type=m32r target_cpu=m32r endian=big ;;
m32rle) cpu_type=m32r target_cpu=m32r endian=little ;;
cris-*-linux-gnu*) fmt=multi bfd_gas=yes em=linux ;;
cris-*-*) fmt=multi bfd_gas=yes ;;
+ crx-*-elf*) fmt=elf ;;
+
d10v-*-*) fmt=elf ;;
d30v-*-*) fmt=elf ;;
dlx-*-*) fmt=elf ;;
+2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * dis-asm.h (print_insn_crx): Declare.
+
2004-06-24 Alan Modra <amodra@bigpond.net.au>
* bfdlink.h (struct bfd_link_order): Update comment.
extern int print_insn_mn10300 (bfd_vma, disassemble_info *);
extern int print_insn_msp430 (bfd_vma, disassemble_info *);
extern int print_insn_ns32k (bfd_vma, disassemble_info *);
+extern int print_insn_crx (bfd_vma, disassemble_info *);
extern int print_insn_openrisc (bfd_vma, disassemble_info *);
extern int print_insn_big_or32 (bfd_vma, disassemble_info *);
extern int print_insn_little_or32 (bfd_vma, disassemble_info *);
+2004-07-06 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * common.h (EM_CRX): Define.
+ * crx.h: New file.
+
2004-06-25 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* m32r.h: Add defintions of R_M32R_GOTOFF_HI_ULO,
#define EM_IP2K 101 /* Ubicom IP2022 micro controller */
#define EM_CR 103 /* National Semiconductor CompactRISC */
#define EM_MSP430 105 /* TI msp430 micro controller */
+#define EM_CRX 114 /* National Semiconductor CRX */
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
--- /dev/null
+/* CRX ELF support for BFD.
+ Copyright 2004 Free Software Foundation, Inc.
+ Contributed by Tomer Levi, NSC, Israel.
+ Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
+ Updates, BFDizing, GNUifying and ELF support by Tomer Levi.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _ELF_CRX_H
+#define _ELF_CRX_H
+
+#include "elf/reloc-macros.h"
+
+/* Creating indices for reloc_map_index array. */
+START_RELOC_NUMBERS(elf_crx_reloc_type)
+ RELOC_NUMBER (R_CRX_NONE, 0)
+ RELOC_NUMBER (R_CRX_REL4, 1)
+ RELOC_NUMBER (R_CRX_REL8, 2)
+ RELOC_NUMBER (R_CRX_REL8_CMP, 3)
+ RELOC_NUMBER (R_CRX_REL16, 4)
+ RELOC_NUMBER (R_CRX_REL24, 5)
+ RELOC_NUMBER (R_CRX_REL32, 6)
+ RELOC_NUMBER (R_CRX_REGREL12, 7)
+ RELOC_NUMBER (R_CRX_REGREL22, 8)
+ RELOC_NUMBER (R_CRX_REGREL28, 9)
+ RELOC_NUMBER (R_CRX_REGREL32, 10)
+ RELOC_NUMBER (R_CRX_ABS16, 11)
+ RELOC_NUMBER (R_CRX_ABS32, 12)
+ RELOC_NUMBER (R_CRX_NUM8, 13)
+ RELOC_NUMBER (R_CRX_NUM16, 14)
+ RELOC_NUMBER (R_CRX_NUM32, 15)
+ RELOC_NUMBER (R_CRX_IMM16, 16)
+ RELOC_NUMBER (R_CRX_IMM32, 17)
+END_RELOC_NUMBERS(R_CRX_MAX)
+
+#endif /* _ELF_CRX_H */
+2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * crx.h: New file.
+
2004-06-24 Alan Modra <amodra@bigpond.net.au>
* i386.h (i386_optab): Remove fildd, fistpd and fisttpd.
--- /dev/null
+/* crx.h -- Header file for CRX opcode and register tables.
+ Copyright 2004 Free Software Foundation, Inc.
+ Contributed by Tomer Levi, NSC, Israel.
+ Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
+ Updates, BFDizing, GNUifying and ELF support by Tomer Levi.
+
+ This file is part of GAS, GDB and the GNU binutils.
+
+ GAS, GDB, and GNU binutils is free software; you can redistribute it
+ and/or modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2, or (at your
+ option) any later version.
+
+ GAS, GDB, and GNU binutils are distributed in the hope that they will be
+ useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef _CRX_H_
+#define _CRX_H_
+
+/* CRX core/debug Registers :
+ The enums are used as indices to CRX registers table (crx_regtab).
+ Therefore, order MUST be preserved. */
+
+typedef enum
+ {
+ /* 32-bit general purpose registers. */
+ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9,
+ r10, r11, r12, r13, r14, r15, ra, sp,
+ /* 32-bit user registers. */
+ u0, u1, u2, u3, u4, u5, u6, u7, u8, u9,
+ u10, u11, u12, u13, u14, u15, ura, usp,
+ /* hi and lo registers. */
+ hi, lo,
+ /* hi and lo user registers. */
+ uhi, ulo,
+ /* Processor Status Register. */
+ psr,
+ /* Configuration Register. */
+ cfg,
+ /* Coprocessor Configuration Register. */
+ cpcfg,
+ /* Cashe Configuration Register. */
+ ccfg,
+ /* Interrupt Base Register. */
+ intbase,
+ /* Interrupt Stack Pointer Register. */
+ isp,
+ /* Coprocessor Enable Register. */
+ cen,
+ /* Program Counter Register. */
+ pc,
+ /* Not a register. */
+ nullregister,
+ MAX_REG
+ }
+reg;
+
+/* CRX Coprocessor registers and special registers :
+ The enums are used as indices to CRX coprocessor registers table
+ (crx_copregtab). Therefore, order MUST be preserved. */
+
+typedef enum
+ {
+ /* Coprocessor registers. */
+ c0 = MAX_REG, c1, c2, c3, c4, c5, c6, c7, c8,
+ c9, c10, c11, c12, c13, c14, c15,
+ /* Coprocessor special registers. */
+ cs0, cs1 ,cs2, cs3, cs4, cs5, cs6, cs7, cs8,
+ cs9, cs10, cs11, cs12, cs13, cs14, cs15,
+ /* Not a Coprocessor register. */
+ nullcopregister,
+ MAX_COPREG
+ }
+copreg;
+
+/* CRX Register types. */
+
+typedef enum
+ {
+ CRX_PC_REGTYPE, /* pc type */
+ CRX_R_REGTYPE, /* r<N> */
+ CRX_U_REGTYPE, /* u<N> */
+ CRX_C_REGTYPE, /* c<N> */
+ CRX_CS_REGTYPE, /* cs<N> */
+ CRX_MTPR_REGTYPE, /* mtpr */
+ CRX_CFG_REGTYPE /* *hi|lo, *cfg, psr */
+ }
+reg_type;
+
+/* CRX argument types :
+ The argument types correspond to instructions operands
+
+ Argument types :
+ r - register
+ c - constant
+ d - displacement
+ ic - immediate
+ icr - index register
+ rbase - register base
+ s - star ('*')
+ copr - coprocessor register
+ copsr - coprocessor special register. */
+
+typedef enum
+ {
+ arg_r, arg_c, arg_cr, arg_dc, arg_dcr, arg_sc,
+ arg_ic, arg_icr, arg_rbase, arg_copr, arg_copsr,
+ /* Not an argument. */
+ nullargs
+ }
+argtype;
+
+/* CRX operand types :
+ The operand types correspond to instructions operands
+
+ Operand Types :
+ cst4 - 4-bit encoded constant
+ iN - N-bit immediate field
+ d, dispsN - N-bit immediate signed displacement
+ dispuN - N-bit immediate unsigned displacement
+ absN - N-bit absolute address
+ rbase - 4-bit genaral-purpose register specifier
+ regr - 4-bit genaral-purpose register specifier
+ regr8 - 8-bit register address space
+ copregr - coprocessor register
+ copsregr - coprocessor special register
+ scl2 - 2-bit scaling factor for memory index
+ ridx - register index. */
+
+typedef enum
+ {
+ dummy, cst4, disps9,
+ i3, i4, i5, i8, i12, i16, i32,
+ d5, d9, d17, d25, d33,
+ abs16, abs32,
+ rbase, rbase_cst4,
+ rbase_dispu8, rbase_dispu12, rbase_dispu16, rbase_dispu28, rbase_dispu32,
+ rbase_ridx_scl2_dispu6, rbase_ridx_scl2_dispu22,
+ regr, regr8, copregr,copregr8,copsregr,
+ /* Not an operand. */
+ nulloperand,
+ /* Maximum supported operand. */
+ MAX_OPRD
+ }
+operand_type;
+
+/* CRX instruction types. */
+
+#define ARITH_INS 1
+#define LD_STOR_INS 2
+#define BRANCH_INS 3
+#define ARITH_BYTE_INS 4
+#define CMPBR_INS 5
+#define SHIFT_INS 6
+#define BRANCH_NEQ_INS 7
+#define LD_STOR_INS_INC 8
+#define STOR_IMM_INS 9
+#define CSTBIT_INS 10
+#define SYS_INS 11
+#define JMP_INS 12
+#define MUL_INS 13
+#define DIV_INS 14
+#define COP_BRANCH_INS 15
+#define COP_REG_INS 16
+#define DCR_BRANCH_INS 17
+#define MMC_INS 18
+#define MMU_INS 19
+
+/* Maximum value supported for instruction types. */
+#define CRX_INS_MAX (1 << 5)
+/* Mask to record an instruction type. */
+#define CRX_INS_MASK (CRX_INS_MAX - 1)
+/* Return instruction type, given instruction's attributes. */
+#define CRX_INS_TYPE(attr) ((attr) & CRX_INS_MASK)
+
+/* Indicates whether this instruction has a register list as parameter. */
+#define REG_LIST CRX_INS_MAX
+/* The operands in binary and assembly are placed in reverse order.
+ load - (REVERSE_MATCH)/store - (! REVERSE_MATCH). */
+#define REVERSE_MATCH (REG_LIST << 1)
+
+/* Kind of displacement map used DISPU[BWD]4. */
+#define DISPUB4 (REVERSE_MATCH << 1)
+#define DISPUW4 (DISPUB4 << 1)
+#define DISPUD4 (DISPUW4 << 1)
+#define CST4MAP (DISPUB4 | DISPUW4 | DISPUD4)
+
+/* Printing formats, where the instruction prefix isn't consecutive. */
+#define FMT_1 (DISPUD4 << 1) /* 0xF0F00000 */
+#define FMT_2 (FMT_1 << 1) /* 0xFFF0FF00 */
+#define FMT_3 (FMT_2 << 1) /* 0xFFF00F00 */
+#define FMT_4 (FMT_3 << 1) /* 0xFFF0F000 */
+#define FMT_5 (FMT_4 << 1) /* 0xFFF0FFF0 */
+#define FMT_CRX (FMT_1 | FMT_2 | FMT_3 | FMT_4 | FMT_5)
+
+#define RELAXABLE (FMT_5 << 1)
+
+/* Maximum operands per instruction. */
+#define MAX_OPERANDS 5
+/* Maximum words per instruction. */
+#define MAX_WORDS 3
+/* Maximum register name length. */
+#define MAX_REGNAME_LEN 10
+/* Maximum instruction length. */
+#define MAX_INST_LEN 256
+
+/* Single operand description. */
+
+typedef struct
+ {
+ /* Operand type. */
+ operand_type op_type;
+ /* Operand location within the opcode. */
+ unsigned int shift;
+ }
+operand_desc;
+
+/* Instruction data structure used in instruction table. */
+
+typedef struct
+ {
+ /* Name. */
+ const char *mnemonic;
+ /* Size (in words). */
+ unsigned int size;
+ /* Constant prefix (matched by the disassembler). */
+ unsigned long match;
+ /* Match size (in bits). */
+ int match_bits;
+ /* Attributes. */
+ unsigned int flags;
+ /* Operands (always last, so unreferenced operands are initialized). */
+ operand_desc operands[MAX_OPERANDS];
+ }
+inst;
+
+/* Data structure for a single instruction's arguments (Operands). */
+
+typedef struct
+ {
+ /* Register or base register. */
+ reg r;
+ /* Index register. */
+ reg i_r;
+ /* Coprocessor register. */
+ copreg cr;
+ /* Constant/immediate/absolute value. */
+ unsigned long int constant;
+ /* Scaled index mode. */
+ unsigned int scale;
+ /* Argument type. */
+ argtype type;
+ /* Size of the argument (in bits) required to represent. */
+ int size;
+ /* Indicates whether a constant is positive or negative. */
+ int signflag;
+ }
+argument;
+
+/* Internal structure to hold the various entities
+ corresponding to the current assembling instruction. */
+
+typedef struct
+ {
+ /* Number of arguments. */
+ int nargs;
+ /* The argument data structure for storing args (operands). */
+ argument arg[MAX_OPERANDS];
+/* The following fields are required only by CRX-assembler. */
+#ifdef TC_CRX
+ /* Expression used for setting the fixups (if any). */
+ expressionS exp;
+ bfd_reloc_code_real_type rtype;
+#endif /* TC_CRX */
+ /* Instruction size (in bytes). */
+ int size;
+ }
+ins;
+
+/* Structure to hold information about predefined operands. */
+
+typedef struct
+ {
+ /* Size (in bits). */
+ unsigned int bit_size;
+ /* Argument type. */
+ argtype arg_type;
+ }
+operand_entry;
+
+/* Structure to hold trap handler information. */
+
+typedef struct
+ {
+ /* Trap name. */
+ char *name;
+ /* Index in dispatch table. */
+ unsigned int entry;
+ }
+trap_entry;
+
+/* Structure to hold information about predefined registers. */
+
+typedef struct
+ {
+ /* Name (string representation). */
+ char *name;
+ /* Value (enum representation). */
+ union
+ {
+ /* Register. */
+ reg reg_val;
+ /* Coprocessor register. */
+ copreg copreg_val;
+ } value;
+ /* Register image. */
+ int image;
+ /* Register type. */
+ reg_type type;
+ }
+reg_entry;
+
+/* Structure to hold a cst4 operand mapping. */
+
+typedef struct
+ {
+ /* The binary value which is written to the object file. */
+ int binary;
+ /* The value which is mapped. */
+ int value;
+ }
+cst4_entry;
+
+/* CRX opcode table. */
+extern const inst crx_instruction[];
+extern const int crx_num_opcodes;
+#define NUMOPCODES crx_num_opcodes
+
+/* CRX operands table. */
+extern const operand_entry crx_optab[];
+
+/* CRX registers table. */
+extern const reg_entry crx_regtab[];
+extern const int crx_num_regs;
+#define NUMREGS crx_num_regs
+
+/* CRX coprocessor registers table. */
+extern const reg_entry crx_copregtab[];
+extern const int crx_num_copregs;
+#define NUMCOPREGS crx_num_copregs
+
+/* CRX trap/interrupt table. */
+extern const trap_entry crx_traps[];
+extern const int crx_num_traps;
+#define NUMTRAPS crx_num_traps
+
+/* cst4 operand mapping. */
+extern const cst4_entry cst4_map[];
+extern const int cst4_maps;
+
+/* Current instruction we're assembling. */
+extern const inst *instruction;
+
+/* A macro for representing the instruction "constant" opcode, that is,
+ the FIXED part of the instruction. The "constant" opcode is represented
+ as a 32-bit unsigned long, where OPC is expanded (by a left SHIFT)
+ over that range. */
+#define BIN(OPC,SHIFT) (OPC << SHIFT)
+
+/* Is the current instruction type is TYPE ? */
+#define IS_INSN_TYPE(TYPE) \
+ (CRX_INS_TYPE(instruction->flags) == TYPE)
+
+/* Is the current instruction mnemonic is MNEMONIC ? */
+#define IS_INSN_MNEMONIC(MNEMONIC) \
+ (strcmp(instruction->mnemonic,MNEMONIC) == 0)
+
+/* Does the current instruction has register list ? */
+#define INST_HAS_REG_LIST \
+ (instruction->flags & REG_LIST)
+
+/* Long long type handling. */
+/* Replace all appearances of 'long long int' with LONGLONG. */
+typedef long long int LONGLONG;
+typedef unsigned long long ULONGLONG;
+/* A mask for the upper 31 bits of a 64 bits type. */
+#define UPPER31_MASK 0xFFFFFFFE00000000LL
+
+#endif /* _CRX_H_ */
+2004-07-06 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * Makefile.am (ALL_EMULATIONS): Add eelf32crx.o.
+ (eelf32crx.c): New target.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Handle crx-*-elf*.
+ * emulparams/elf32crx.sh: New file.
+ * emultempl/crxelf.em: New file.
+ * scripttempl/elf32crx.sc: New file.
+ * NEWS: Mention new target.
+
2004-07-06 Nick Clifton <nickc@redhat.com>
* Makefile.am: Add eshlsymbian.c.
eelf32bmip.o \
eelf32bmipn32.o \
eelf32btsmip.o \
+ eelf32crx.o \
eelf32btsmipn32.o \
eelf32ltsmip.o \
eelf32ltsmipn32.o \
$(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32btsmip "$(tdir_elf32btsmip)"
+eelf32crx.c: $(srcdir)/emulparams/elf32crx.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/crxelf.em \
+ $(srcdir)/scripttempl/elf32crx.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32crx "$(tdir_elf32crx)"
eelf32btsmipn32.c: $(srcdir)/emulparams/elf32btsmipn32.sh \
$(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eelf32bmip.o \
eelf32bmipn32.o \
eelf32btsmip.o \
+ eelf32crx.o \
eelf32btsmipn32.o \
eelf32ltsmip.o \
eelf32ltsmipn32.o \
$(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32btsmip "$(tdir_elf32btsmip)"
+eelf32crx.c: $(srcdir)/emulparams/elf32crx.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/crxelf.em \
+ $(srcdir)/scripttempl/elf32crx.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32crx "$(tdir_elf32crx)"
eelf32btsmipn32.c: $(srcdir)/emulparams/elf32btsmipn32.sh \
$(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-*- text -*-
+* Support for the crx-elf target added.
+
+* Support for the sh-symbian-elf target added.
+
* A new linker command line switch has been added which allows the hash table
size to be set to a suitable prime value near to its argument. This switch
is --hash-size=<NUMBER>. Also if the switch --reduce-memory-overheads is
cris-*-*) targ_emul=criself
targ_extra_emuls="crisaout crislinux"
targ_extra_libpath=$targ_extra_emuls ;;
+crx-*-elf*) targ_emul=elf32crx ;;
d10v-*-*) targ_emul=d10velf ;;
d30v-*-*ext*) targ_emul=d30v_e; targ_extra_emuls="d30velf d30v_o" ;;
d30v-*-*onchip*) targ_emul=d30v_o; targ_extra_emuls="d30velf d30v_e" ;;
--- /dev/null
+SCRIPT_NAME=elf32crx
+TEMPLATE_NAME=elf32
+OUTPUT_FORMAT="elf32-crx"
+ARCH=crx
+ENTRY=_start
+EXTRA_EM_FILE=crxelf
--- /dev/null
+# This shell script emits a C file. -*- C -*-
+# Copyright 2004
+# Free Software Foundation, Inc.
+#
+# This file is part of GLD, the Gnu Linker.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#
+
+# This file is sourced from elf32.em, and defines extra crx-elf
+# specific routines.
+#
+cat >>e${EMULATION_NAME}.c <<EOF
+
+#include "ldctor.h"
+
+static void crxelf_after_parse (void);
+
+static void
+crxelf_after_parse (void)
+{
+ /* Always behave as if called with --sort-common command line
+ option.
+ This is to emulate the CRTools' method of keeping variables
+ of different alignment in separate sections. */
+ config.sort_common = TRUE;
+
+ /* Don't create a demand-paged executable, since this feature isn't
+ meaninful in CR16C embedded systems. Moreover, when magic_demand_paged
+ is true the link sometimes fails. */
+ config.magic_demand_paged = FALSE;
+}
+
+EOF
+
+# Put these extra crx-elf routines in ld_${EMULATION_NAME}_emulation
+#
+LDEMUL_AFTER_PARSE=crxelf_after_parse
--- /dev/null
+# Linker Script for National Semiconductor's CRX-ELF32.
+
+# The next line should be uncommented if it is desired to link
+# without libstart.o and directly enter main.
+
+# ENTRY=_main
+
+test -z "$ENTRY" && ENTRY=_start
+cat <<EOF
+
+/* Example Linker Script for linking NS CRX elf32 files. */
+
+/* The next line forces the entry point (${ENTRY} in this script)
+ to be entered in the output file as an undefined symbol.
+ It is needed in case the entry point is not called explicitly
+ (which is the usual case) AND is in an archive. */
+
+OUTPUT_FORMAT("${OUTPUT_FORMAT}")
+OUTPUT_ARCH(${ARCH})
+EXTERN(${ENTRY})
+ENTRY(${ENTRY})
+
+/* Define memory regions. */
+MEMORY
+{
+ rom : ORIGIN = 0x2, LENGTH = 3M
+ ram : ORIGIN = 4M, LENGTH = 10M
+}
+
+SECTIONS
+{
+ .text : { __TEXT_START = .; *(.text) *(.text.*) *(.gnu.linkonce.t.*) __TEXT_END = .; } > rom
+
+ .rdata : { __RDATA_START = .; *(.rdata_4) *(.rdata_2) *(.rdata_1) *(.rdata.*) *(.gnu.linkonce.r.*) __RDATA_END = .; } > rom
+
+ .ctor ALIGN(4) : { __CTOR_LIST = .; *(.ctors) __CTOR_END = .; } > rom
+
+ .dtor ALIGN(4) : { __DTOR_LIST = .; *(.dtors) __DTOR_END = .; } > rom
+
+ .data : { __DATA_START = .; *(.data_4) *(.data_2) *(.data_1) *(.data) *(.data.*) *(.gnu.linkonce.d.*) __DATA_END = .; } > ram AT > rom
+
+ .bss (NOLOAD) : { __BSS_START = .; *(.bss_4) *(.bss_2) *(.bss_1) *(.bss) *(COMMON) *(.bss.*) *(.gnu.linkonce.b.*) __BSS_END = .; } > ram
+
+/* You may change the sizes of the following sections to fit the actual
+ size your program requires.
+
+ The heap and stack are aligned to the bus width, as a speed optimization
+ for accessing data located there. */
+
+ .heap : { . = ALIGN(4); __HEAP_START = .; . += 0x2000; __HEAP_MAX = .; } > ram
+ .stack : { . = ALIGN(4); . += 0x6000; __STACK_START = .; } > ram
+ .istack : { . = ALIGN(4); . += 0x100; __ISTACK_START = .; } > ram
+}
+
+__DATA_IMAGE_START = LOADADDR(.data);
+EOF
+2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
+ (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
+ (crx-dis.lo): New target.
+ (crx-opc.lo): Likewise.
+ * Makefile.in: Regenerate.
+ * configure.in: Handle bfd_crx_arch.
+ * configure: Regenerate.
+ * crx-dis.c: New file.
+ * crx-opc.c: New file.
+ * disassemble.c (ARCH_crx): Define.
+ (disassembler): Handle ARCH_crx.
+
2004-06-29 James E Wilson <wilson@specifixinc.com>
* ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
cgen-opc.c \
cris-dis.c \
cris-opc.c \
+ crx-dis.c \
+ crx-opc.c \
d10v-dis.c \
d10v-opc.c \
d30v-dis.c \
cgen-opc.lo \
cris-dis.lo \
cris-opc.lo \
+ crx-dis.lo \
+ crx-opc.lo \
d10v-dis.lo \
d10v-opc.lo \
d30v-dis.lo \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
$(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h
cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h
+crx-dis.lo: crx-dis.c $(INCDIR)/opcode/crx.h \
+ $(INCDIR)/dis-asm.h sysdep.h $(INCDIR)/ansidecl.h
+crx-opc.lo: crx-opc.c $(INCDIR)/opcode/crx.h
d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/symcat.h
-# Makefile.in generated automatically by automake 1.4 from Makefile.am
+# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
-# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
+# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
cgen-opc.c \
cris-dis.c \
cris-opc.c \
+ crx-dis.c \
+ crx-opc.c \
d10v-dis.c \
d10v-opc.c \
d30v-dis.c \
cgen-opc.lo \
cris-dis.lo \
cris-opc.lo \
+ crx-dis.lo \
+ crx-opc.lo \
d10v-dis.lo \
d10v-opc.lo \
d30v-dis.lo \
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
-TAR = tar
+TAR = gtar
GZIP_ENV = --best
SOURCES = libopcodes.a.c $(libopcodes_la_SOURCES)
OBJECTS = libopcodes.a.$(OBJEXT) $(libopcodes_la_OBJECTS)
dot_seen=no; \
rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
rev="$$subdir $$rev"; \
- test "$$subdir" = "." && dot_seen=yes; \
+ test "$$subdir" != "." || dot_seen=yes; \
done; \
test "$$dot_seen" = "no" && rev=". $$rev"; \
target=`echo $@ | sed s/-recursive//`; \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
$(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h
cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h
+crx-dis.lo: crx-dis.c $(INCDIR)/opcode/crx.h \
+ $(INCDIR)/dis-asm.h sysdep.h $(INCDIR)/ansidecl.h
+crx-opc.lo: crx-opc.c $(INCDIR)/opcode/crx.h
d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/symcat.h
program_transform_name=s,x,x,
silent=
site=
+sitefile=
srcdir=
target=NONE
verbose=
--help print this message
--no-create do not create output files
--quiet, --silent do not print \`checking...' messages
+ --site-file=FILE use FILE as the site file
--version print the version of autoconf that created configure
Directory and file names:
--prefix=PREFIX install architecture-independent files in PREFIX
-site=* | --site=* | --sit=*)
site="$ac_optarg" ;;
+ -site-file | --site-file | --site-fil | --site-fi | --site-f)
+ ac_prev=sitefile ;;
+ -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*)
+ sitefile="$ac_optarg" ;;
+
-srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
ac_prev=srcdir ;;
-srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
# Prefer explicitly selected file to automatically selected ones.
-if test -z "$CONFIG_SITE"; then
- if test "x$prefix" != xNONE; then
- CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
- else
- CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
+if test -z "$sitefile"; then
+ if test -z "$CONFIG_SITE"; then
+ if test "x$prefix" != xNONE; then
+ CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
+ else
+ CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
+ fi
fi
+else
+ CONFIG_SITE="$sitefile"
fi
for ac_site_file in $CONFIG_SITE; do
if test -r "$ac_site_file"; then
fi
echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:554: checking for Cygwin environment" >&5
+echo "configure:565: checking for Cygwin environment" >&5
if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 559 "configure"
+#line 570 "configure"
#include "confdefs.h"
int main() {
return __CYGWIN__;
; return 0; }
EOF
-if { (eval echo configure:570: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:581: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_cygwin=yes
else
CYGWIN=
test "$ac_cv_cygwin" = yes && CYGWIN=yes
echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:587: checking for mingw32 environment" >&5
+echo "configure:598: checking for mingw32 environment" >&5
if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 592 "configure"
+#line 603 "configure"
#include "confdefs.h"
int main() {
return __MINGW32__;
; return 0; }
EOF
-if { (eval echo configure:599: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:610: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_mingw32=yes
else
fi
echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:664: checking host system type" >&5
+echo "configure:675: checking host system type" >&5
host_alias=$host
case "$host_alias" in
echo "$ac_t""$host" 1>&6
echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:685: checking target system type" >&5
+echo "configure:696: checking target system type" >&5
target_alias=$target
case "$target_alias" in
echo "$ac_t""$target" 1>&6
echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:703: checking build system type" >&5
+echo "configure:714: checking build system type" >&5
build_alias=$build
case "$build_alias" in
echo $ac_n "checking for strerror in -lcposix""... $ac_c" 1>&6
-echo "configure:727: checking for strerror in -lcposix" >&5
+echo "configure:738: checking for strerror in -lcposix" >&5
ac_lib_var=`echo cposix'_'strerror | sed 'y%./+-%__p_%'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
ac_save_LIBS="$LIBS"
LIBS="-lcposix $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 735 "configure"
+#line 746 "configure"
#include "confdefs.h"
/* Override any gcc2 internal prototype to avoid an error. */
/* We use char because int might match the return type of a gcc2
strerror()
; return 0; }
EOF
-if { (eval echo configure:746: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:757: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
# ./install, which can be erroneously created by make from ./install.sh.
echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:787: checking for a BSD compatible install" >&5
+echo "configure:798: checking for a BSD compatible install" >&5
if test -z "$INSTALL"; then
if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
echo $ac_n "checking whether build environment is sane""... $ac_c" 1>&6
-echo "configure:840: checking whether build environment is sane" >&5
+echo "configure:851: checking whether build environment is sane" >&5
# Just in case
sleep 1
echo timestamp > conftestfile
test "$program_transform_name" = "" && program_transform_name="s,x,x,"
echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6
-echo "configure:897: checking whether ${MAKE-make} sets \${MAKE}" >&5
+echo "configure:908: checking whether ${MAKE-make} sets \${MAKE}" >&5
set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'`
if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
missing_dir=`cd $ac_aux_dir && pwd`
echo $ac_n "checking for working aclocal-${am__api_version}""... $ac_c" 1>&6
-echo "configure:943: checking for working aclocal-${am__api_version}" >&5
+echo "configure:954: checking for working aclocal-${am__api_version}" >&5
# Run test in a subshell; some versions of sh will print an error if
# an executable is not found, even if stderr is redirected.
# Redirect stdin to placate older versions of autoconf. Sigh.
fi
echo $ac_n "checking for working autoconf""... $ac_c" 1>&6
-echo "configure:956: checking for working autoconf" >&5
+echo "configure:967: checking for working autoconf" >&5
# Run test in a subshell; some versions of sh will print an error if
# an executable is not found, even if stderr is redirected.
# Redirect stdin to placate older versions of autoconf. Sigh.
fi
echo $ac_n "checking for working automake-${am__api_version}""... $ac_c" 1>&6
-echo "configure:969: checking for working automake-${am__api_version}" >&5
+echo "configure:980: checking for working automake-${am__api_version}" >&5
# Run test in a subshell; some versions of sh will print an error if
# an executable is not found, even if stderr is redirected.
# Redirect stdin to placate older versions of autoconf. Sigh.
fi
echo $ac_n "checking for working autoheader""... $ac_c" 1>&6
-echo "configure:982: checking for working autoheader" >&5
+echo "configure:993: checking for working autoheader" >&5
# Run test in a subshell; some versions of sh will print an error if
# an executable is not found, even if stderr is redirected.
# Redirect stdin to placate older versions of autoconf. Sigh.
fi
echo $ac_n "checking for working makeinfo""... $ac_c" 1>&6
-echo "configure:995: checking for working makeinfo" >&5
+echo "configure:1006: checking for working makeinfo" >&5
# Run test in a subshell; some versions of sh will print an error if
# an executable is not found, even if stderr is redirected.
# Redirect stdin to placate older versions of autoconf. Sigh.
# Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
set dummy ${ac_tool_prefix}ar; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1018: checking for $ac_word" >&5
+echo "configure:1029: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args.
set dummy ${ac_tool_prefix}ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1050: checking for $ac_word" >&5
+echo "configure:1061: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "ranlib", so it can be a program name with args.
set dummy ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1082: checking for $ac_word" >&5
+echo "configure:1093: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "gcc", so it can be a program name with args.
set dummy gcc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1188: checking for $ac_word" >&5
+echo "configure:1199: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "cc", so it can be a program name with args.
set dummy cc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1218: checking for $ac_word" >&5
+echo "configure:1229: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "cl", so it can be a program name with args.
set dummy cl; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1269: checking for $ac_word" >&5
+echo "configure:1280: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1301: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+echo "configure:1312: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
ac_ext=c
# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
cat > conftest.$ac_ext << EOF
-#line 1312 "configure"
+#line 1323 "configure"
#include "confdefs.h"
main(){return(0);}
EOF
-if { (eval echo configure:1317: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:1328: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
ac_cv_prog_cc_works=yes
# If we can't run a trivial program, we are probably using a cross compiler.
if (./conftest; exit) 2>/dev/null; then
{ echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1343: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "configure:1354: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
cross_compiling=$ac_cv_prog_cc_cross
echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1348: checking whether we are using GNU C" >&5
+echo "configure:1359: checking whether we are using GNU C" >&5
if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
yes;
#endif
EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1357: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1368: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
ac_cv_prog_gcc=yes
else
ac_cv_prog_gcc=no
ac_save_CFLAGS="$CFLAGS"
CFLAGS=
echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1376: checking whether ${CC-cc} accepts -g" >&5
+echo "configure:1387: checking whether ${CC-cc} accepts -g" >&5
if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
if test "$GCC" = yes; then
# Check if gcc -print-prog-name=ld gives a path.
echo $ac_n "checking for ld used by GCC""... $ac_c" 1>&6
-echo "configure:1419: checking for ld used by GCC" >&5
+echo "configure:1430: checking for ld used by GCC" >&5
case $host in
*-*-mingw*)
# gcc leaves a trailing carriage return which upsets mingw
esac
elif test "$with_gnu_ld" = yes; then
echo $ac_n "checking for GNU ld""... $ac_c" 1>&6
-echo "configure:1449: checking for GNU ld" >&5
+echo "configure:1460: checking for GNU ld" >&5
else
echo $ac_n "checking for non-GNU ld""... $ac_c" 1>&6
-echo "configure:1452: checking for non-GNU ld" >&5
+echo "configure:1463: checking for non-GNU ld" >&5
fi
if eval "test \"`echo '$''{'lt_cv_path_LD'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
fi
test -z "$LD" && { echo "configure: error: no acceptable ld found in \$PATH" 1>&2; exit 1; }
echo $ac_n "checking if the linker ($LD) is GNU ld""... $ac_c" 1>&6
-echo "configure:1487: checking if the linker ($LD) is GNU ld" >&5
+echo "configure:1498: checking if the linker ($LD) is GNU ld" >&5
if eval "test \"`echo '$''{'lt_cv_prog_gnu_ld'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
echo $ac_n "checking for $LD option to reload object files""... $ac_c" 1>&6
-echo "configure:1504: checking for $LD option to reload object files" >&5
+echo "configure:1515: checking for $LD option to reload object files" >&5
if eval "test \"`echo '$''{'lt_cv_ld_reload_flag'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
test -n "$reload_flag" && reload_flag=" $reload_flag"
echo $ac_n "checking for BSD-compatible nm""... $ac_c" 1>&6
-echo "configure:1516: checking for BSD-compatible nm" >&5
+echo "configure:1527: checking for BSD-compatible nm" >&5
if eval "test \"`echo '$''{'lt_cv_path_NM'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
echo "$ac_t""$NM" 1>&6
echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6
-echo "configure:1554: checking whether ln -s works" >&5
+echo "configure:1565: checking whether ln -s works" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LN_S'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
echo $ac_n "checking how to recognise dependant libraries""... $ac_c" 1>&6
-echo "configure:1575: checking how to recognise dependant libraries" >&5
+echo "configure:1586: checking how to recognise dependant libraries" >&5
if eval "test \"`echo '$''{'lt_cv_deplibs_check_method'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
deplibs_check_method=$lt_cv_deplibs_check_method
echo $ac_n "checking for object suffix""... $ac_c" 1>&6
-echo "configure:1748: checking for object suffix" >&5
+echo "configure:1759: checking for object suffix" >&5
if eval "test \"`echo '$''{'ac_cv_objext'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
rm -f conftest*
echo 'int i = 1;' > conftest.$ac_ext
-if { (eval echo configure:1754: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:1765: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
for ac_file in conftest.*; do
case $ac_file in
*.c) ;;
echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:1774: checking for executable suffix" >&5
+echo "configure:1785: checking for executable suffix" >&5
if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
rm -f conftest*
echo 'int main () { return 0; }' > conftest.$ac_ext
ac_cv_exeext=
- if { (eval echo configure:1784: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+ if { (eval echo configure:1795: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
for file in conftest.*; do
case $file in
- *.c | *.o | *.obj) ;;
+ *.c | *.o | *.obj | *.ilk | *.pdb) ;;
*) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
esac
done
file_magic*)
if test "$file_magic_cmd" = '$MAGIC_CMD'; then
echo $ac_n "checking for ${ac_tool_prefix}file""... $ac_c" 1>&6
-echo "configure:1811: checking for ${ac_tool_prefix}file" >&5
+echo "configure:1822: checking for ${ac_tool_prefix}file" >&5
if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
if test -z "$lt_cv_path_MAGIC_CMD"; then
if test -n "$ac_tool_prefix"; then
echo $ac_n "checking for file""... $ac_c" 1>&6
-echo "configure:1873: checking for file" >&5
+echo "configure:1884: checking for file" >&5
if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args.
set dummy ${ac_tool_prefix}ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1944: checking for $ac_word" >&5
+echo "configure:1955: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "ranlib", so it can be a program name with args.
set dummy ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1976: checking for $ac_word" >&5
+echo "configure:1987: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
set dummy ${ac_tool_prefix}strip; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2011: checking for $ac_word" >&5
+echo "configure:2022: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "strip", so it can be a program name with args.
set dummy strip; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2043: checking for $ac_word" >&5
+echo "configure:2054: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
case $host in
*-*-irix6*)
# Find out which ABI we are using.
- echo '#line 2110 "configure"' > conftest.$ac_ext
- if { (eval echo configure:2111: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ echo '#line 2121 "configure"' > conftest.$ac_ext
+ if { (eval echo configure:2122: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
if test "$lt_cv_prog_gnu_ld" = yes; then
case `/usr/bin/file conftest.$ac_objext` in
*32-bit*)
ia64-*-hpux*)
# Find out which ABI we are using.
echo 'int i;' > conftest.$ac_ext
- if { (eval echo configure:2144: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ if { (eval echo configure:2155: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
case "`/usr/bin/file conftest.o`" in
*ELF-32*)
HPUX_IA64_MODE="32"
SAVE_CFLAGS="$CFLAGS"
CFLAGS="$CFLAGS -belf"
echo $ac_n "checking whether the C compiler needs -belf""... $ac_c" 1>&6
-echo "configure:2162: checking whether the C compiler needs -belf" >&5
+echo "configure:2173: checking whether the C compiler needs -belf" >&5
if eval "test \"`echo '$''{'lt_cv_cc_needs_belf'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cross_compiling=$ac_cv_prog_cc_cross
cat > conftest.$ac_ext <<EOF
-#line 2175 "configure"
+#line 2186 "configure"
#include "confdefs.h"
int main() {
; return 0; }
EOF
-if { (eval echo configure:2182: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:2193: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
lt_cv_cc_needs_belf=yes
else
fi
echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6
-echo "configure:2350: checking whether to enable maintainer-specific portions of Makefiles" >&5
+echo "configure:2361: checking whether to enable maintainer-specific portions of Makefiles" >&5
# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
if test "${enable_maintainer_mode+set}" = set; then
enableval="$enable_maintainer_mode"
echo $ac_n "checking whether to install libbfd""... $ac_c" 1>&6
-echo "configure:2373: checking whether to install libbfd" >&5
+echo "configure:2384: checking whether to install libbfd" >&5
# Check whether --enable-install-libbfd or --disable-install-libbfd was given.
if test "${enable_install_libbfd+set}" = set; then
enableval="$enable_install_libbfd"
echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:2410: checking for executable suffix" >&5
+echo "configure:2421: checking for executable suffix" >&5
if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
rm -f conftest*
echo 'int main () { return 0; }' > conftest.$ac_ext
ac_cv_exeext=
- if { (eval echo configure:2420: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+ if { (eval echo configure:2431: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
for file in conftest.*; do
case $file in
- *.c | *.o | *.obj) ;;
+ *.c | *.o | *.obj | *.ilk | *.pdb) ;;
*) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
esac
done
# Extract the first word of "gcc", so it can be a program name with args.
set dummy gcc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2446: checking for $ac_word" >&5
+echo "configure:2457: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "cc", so it can be a program name with args.
set dummy cc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2476: checking for $ac_word" >&5
+echo "configure:2487: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "cl", so it can be a program name with args.
set dummy cl; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2527: checking for $ac_word" >&5
+echo "configure:2538: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:2559: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+echo "configure:2570: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
ac_ext=c
# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
cat > conftest.$ac_ext << EOF
-#line 2570 "configure"
+#line 2581 "configure"
#include "confdefs.h"
main(){return(0);}
EOF
-if { (eval echo configure:2575: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:2586: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
ac_cv_prog_cc_works=yes
# If we can't run a trivial program, we are probably using a cross compiler.
if (./conftest; exit) 2>/dev/null; then
{ echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:2601: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "configure:2612: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
cross_compiling=$ac_cv_prog_cc_cross
echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:2606: checking whether we are using GNU C" >&5
+echo "configure:2617: checking whether we are using GNU C" >&5
if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
yes;
#endif
EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:2615: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:2626: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
ac_cv_prog_gcc=yes
else
ac_cv_prog_gcc=no
ac_save_CFLAGS="$CFLAGS"
CFLAGS=
echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:2634: checking whether ${CC-cc} accepts -g" >&5
+echo "configure:2645: checking whether ${CC-cc} accepts -g" >&5
if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ALL_LINGUAS="fr sv tr es da de id pt_BR ro nl"
echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
-echo "configure:2668: checking how to run the C preprocessor" >&5
+echo "configure:2679: checking how to run the C preprocessor" >&5
# On Suns, sometimes $CPP names a directory.
if test -n "$CPP" && test -d "$CPP"; then
CPP=
# On the NeXT, cc -E runs the code through the compiler's parser,
# not just through cpp.
cat > conftest.$ac_ext <<EOF
-#line 2683 "configure"
+#line 2694 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2689: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:2700: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
:
rm -rf conftest*
CPP="${CC-cc} -E -traditional-cpp"
cat > conftest.$ac_ext <<EOF
-#line 2700 "configure"
+#line 2711 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2706: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:2717: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
:
rm -rf conftest*
CPP="${CC-cc} -nologo -E"
cat > conftest.$ac_ext <<EOF
-#line 2717 "configure"
+#line 2728 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2723: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:2734: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
:
# Extract the first word of "ranlib", so it can be a program name with args.
set dummy ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2750: checking for $ac_word" >&5
+echo "configure:2761: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
-echo "configure:2778: checking for ANSI C header files" >&5
+echo "configure:2789: checking for ANSI C header files" >&5
if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 2783 "configure"
+#line 2794 "configure"
#include "confdefs.h"
#include <stdlib.h>
#include <stdarg.h>
#include <float.h>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2791: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:2802: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
if test $ac_cv_header_stdc = yes; then
# SunOS 4.x string.h does not declare mem*, contrary to ANSI.
cat > conftest.$ac_ext <<EOF
-#line 2808 "configure"
+#line 2819 "configure"
#include "confdefs.h"
#include <string.h>
EOF
if test $ac_cv_header_stdc = yes; then
# ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
cat > conftest.$ac_ext <<EOF
-#line 2826 "configure"
+#line 2837 "configure"
#include "confdefs.h"
#include <stdlib.h>
EOF
:
else
cat > conftest.$ac_ext <<EOF
-#line 2847 "configure"
+#line 2858 "configure"
#include "confdefs.h"
#include <ctype.h>
#define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
exit (0); }
EOF
-if { (eval echo configure:2858: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:2869: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
:
else
fi
echo $ac_n "checking for working const""... $ac_c" 1>&6
-echo "configure:2882: checking for working const" >&5
+echo "configure:2893: checking for working const" >&5
if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 2887 "configure"
+#line 2898 "configure"
#include "confdefs.h"
int main() {
; return 0; }
EOF
-if { (eval echo configure:2936: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2947: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_c_const=yes
else
fi
echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:2957: checking for inline" >&5
+echo "configure:2968: checking for inline" >&5
if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_cv_c_inline=no
for ac_kw in inline __inline__ __inline; do
cat > conftest.$ac_ext <<EOF
-#line 2964 "configure"
+#line 2975 "configure"
#include "confdefs.h"
int main() {
} $ac_kw foo() {
; return 0; }
EOF
-if { (eval echo configure:2971: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:2982: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_c_inline=$ac_kw; break
else
esac
echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:2997: checking for off_t" >&5
+echo "configure:3008: checking for off_t" >&5
if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3002 "configure"
+#line 3013 "configure"
#include "confdefs.h"
#include <sys/types.h>
#if STDC_HEADERS
fi
echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:3030: checking for size_t" >&5
+echo "configure:3041: checking for size_t" >&5
if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3035 "configure"
+#line 3046 "configure"
#include "confdefs.h"
#include <sys/types.h>
#if STDC_HEADERS
# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
# for constant arguments. Useless!
echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:3065: checking for working alloca.h" >&5
+echo "configure:3076: checking for working alloca.h" >&5
if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3070 "configure"
+#line 3081 "configure"
#include "confdefs.h"
#include <alloca.h>
int main() {
char *p = alloca(2 * sizeof(int));
; return 0; }
EOF
-if { (eval echo configure:3077: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3088: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
ac_cv_header_alloca_h=yes
else
fi
echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:3098: checking for alloca" >&5
+echo "configure:3109: checking for alloca" >&5
if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3103 "configure"
+#line 3114 "configure"
#include "confdefs.h"
#ifdef __GNUC__
char *p = (char *) alloca(1);
; return 0; }
EOF
-if { (eval echo configure:3131: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3142: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
ac_cv_func_alloca_works=yes
else
echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:3163: checking whether alloca needs Cray hooks" >&5
+echo "configure:3174: checking whether alloca needs Cray hooks" >&5
if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3168 "configure"
+#line 3179 "configure"
#include "confdefs.h"
#if defined(CRAY) && ! defined(CRAY2)
webecray
if test $ac_cv_os_cray = yes; then
for ac_func in _getb67 GETB67 getb67; do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3193: checking for $ac_func" >&5
+echo "configure:3204: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3198 "configure"
+#line 3209 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:3221: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3232: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
fi
echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:3248: checking stack direction for C alloca" >&5
+echo "configure:3259: checking stack direction for C alloca" >&5
if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_cv_c_stack_direction=0
else
cat > conftest.$ac_ext <<EOF
-#line 3256 "configure"
+#line 3267 "configure"
#include "confdefs.h"
find_stack_direction ()
{
exit (find_stack_direction() < 0);
}
EOF
-if { (eval echo configure:3275: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:3286: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_c_stack_direction=1
else
fi
-for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h
+for ac_hdr in unistd.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3300: checking for $ac_hdr" >&5
+echo "configure:3311: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3305 "configure"
+#line 3316 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3310: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:3321: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3339: checking for $ac_func" >&5
+echo "configure:3350: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3344 "configure"
+#line 3355 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:3367: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3378: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:3392: checking for working mmap" >&5
+echo "configure:3403: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
-#line 3400 "configure"
+#line 3411 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
#include <fcntl.h>
#include <sys/mman.h>
-#if HAVE_SYS_TYPES_H
-# include <sys/types.h>
-#endif
-
-#if HAVE_STDLIB_H
-# include <stdlib.h>
-#endif
-
-#if HAVE_SYS_STAT_H
-# include <sys/stat.h>
-#endif
-
-#if HAVE_UNISTD_H
-# include <unistd.h>
-#endif
-
/* This mess was copied from the GNU getpagesize.h. */
#ifndef HAVE_GETPAGESIZE
+# ifdef HAVE_UNISTD_H
+# include <unistd.h>
+# endif
/* Assume that all systems that can run configure have sys/param.h. */
# ifndef HAVE_SYS_PARAM_H
}
EOF
-if { (eval echo configure:3553: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:3551: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3581: checking for $ac_hdr" >&5
+echo "configure:3579: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3586 "configure"
+#line 3584 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3591: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:3589: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
__argz_count __argz_stringify __argz_next
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3621: checking for $ac_func" >&5
+echo "configure:3619: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3626 "configure"
+#line 3624 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:3649: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
for ac_func in stpcpy
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3678: checking for $ac_func" >&5
+echo "configure:3676: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3683 "configure"
+#line 3681 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:3706: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3704: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
if test $ac_cv_header_locale_h = yes; then
echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:3740: checking for LC_MESSAGES" >&5
+echo "configure:3738: checking for LC_MESSAGES" >&5
if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3745 "configure"
+#line 3743 "configure"
#include "confdefs.h"
#include <locale.h>
int main() {
return LC_MESSAGES
; return 0; }
EOF
-if { (eval echo configure:3752: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3750: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
am_cv_val_LC_MESSAGES=yes
else
fi
fi
echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:3773: checking whether NLS is requested" >&5
+echo "configure:3771: checking whether NLS is requested" >&5
# Check whether --enable-nls or --disable-nls was given.
if test "${enable_nls+set}" = set; then
enableval="$enable_nls"
EOF
echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:3793: checking whether included gettext is requested" >&5
+echo "configure:3791: checking whether included gettext is requested" >&5
# Check whether --with-included-gettext or --without-included-gettext was given.
if test "${with_included_gettext+set}" = set; then
withval="$with_included_gettext"
ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:3812: checking for libintl.h" >&5
+echo "configure:3810: checking for libintl.h" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3817 "configure"
+#line 3815 "configure"
#include "confdefs.h"
#include <libintl.h>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3822: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:3820: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
echo "$ac_t""yes" 1>&6
echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
-echo "configure:3839: checking for gettext in libc" >&5
+echo "configure:3837: checking for gettext in libc" >&5
if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3844 "configure"
+#line 3842 "configure"
#include "confdefs.h"
#include <libintl.h>
int main() {
return (int) gettext ("")
; return 0; }
EOF
-if { (eval echo configure:3851: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3849: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gt_cv_func_gettext_libc=yes
else
if test "$gt_cv_func_gettext_libc" != "yes"; then
echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6
-echo "configure:3867: checking for bindtextdomain in -lintl" >&5
+echo "configure:3865: checking for bindtextdomain in -lintl" >&5
ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
ac_save_LIBS="$LIBS"
LIBS="-lintl $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 3875 "configure"
+#line 3873 "configure"
#include "confdefs.h"
/* Override any gcc2 internal prototype to avoid an error. */
/* We use char because int might match the return type of a gcc2
bindtextdomain()
; return 0; }
EOF
-if { (eval echo configure:3886: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3884: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
echo "$ac_t""yes" 1>&6
echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6
-echo "configure:3902: checking for gettext in libintl" >&5
+echo "configure:3900: checking for gettext in libintl" >&5
if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3907 "configure"
+#line 3905 "configure"
#include "confdefs.h"
int main() {
return (int) gettext ("")
; return 0; }
EOF
-if { (eval echo configure:3914: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3912: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gt_cv_func_gettext_libintl=yes
else
# Extract the first word of "msgfmt", so it can be a program name with args.
set dummy msgfmt; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3942: checking for $ac_word" >&5
+echo "configure:3940: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
for ac_func in dcgettext
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3976: checking for $ac_func" >&5
+echo "configure:3974: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3981 "configure"
+#line 3979 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
; return 0; }
EOF
-if { (eval echo configure:4004: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4002: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
# Extract the first word of "gmsgfmt", so it can be a program name with args.
set dummy gmsgfmt; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4031: checking for $ac_word" >&5
+echo "configure:4029: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "xgettext", so it can be a program name with args.
set dummy xgettext; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4067: checking for $ac_word" >&5
+echo "configure:4065: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
fi
cat > conftest.$ac_ext <<EOF
-#line 4099 "configure"
+#line 4097 "configure"
#include "confdefs.h"
int main() {
return _nl_msg_cat_cntr
; return 0; }
EOF
-if { (eval echo configure:4107: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4105: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
CATOBJEXT=.gmo
DATADIRNAME=share
# Extract the first word of "msgfmt", so it can be a program name with args.
set dummy msgfmt; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4139: checking for $ac_word" >&5
+echo "configure:4137: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "gmsgfmt", so it can be a program name with args.
set dummy gmsgfmt; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4173: checking for $ac_word" >&5
+echo "configure:4171: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# Extract the first word of "xgettext", so it can be a program name with args.
set dummy xgettext; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4209: checking for $ac_word" >&5
+echo "configure:4207: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
LINGUAS=
else
echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:4299: checking for catalogs to be installed" >&5
+echo "configure:4297: checking for catalogs to be installed" >&5
NEW_LINGUAS=
for lang in ${LINGUAS=$ALL_LINGUAS}; do
case "$ALL_LINGUAS" in
if test "$CATOBJEXT" = ".cat"; then
ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:4327: checking for linux/version.h" >&5
+echo "configure:4325: checking for linux/version.h" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4332 "configure"
+#line 4330 "configure"
#include "confdefs.h"
#include <linux/version.h>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:4337: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:4335: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
EXEEXT_FOR_BUILD='$(EXEEXT)'
else
echo $ac_n "checking for build system executable suffix""... $ac_c" 1>&6
-echo "configure:4415: checking for build system executable suffix" >&5
+echo "configure:4413: checking for build system executable suffix" >&5
if eval "test \"`echo '$''{'bfd_cv_build_exeext'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
# ./install, which can be erroneously created by make from ./install.sh.
echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:4452: checking for a BSD compatible install" >&5
+echo "configure:4450: checking for a BSD compatible install" >&5
if test -z "$INSTALL"; then
if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:4509: checking for $ac_hdr" >&5
+echo "configure:4507: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4514 "configure"
+#line 4512 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:4519: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:4517: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
bfd_avr_arch) ta="$ta avr-dis.lo" ;;
bfd_convex_arch) ;;
bfd_cris_arch) ta="$ta cris-dis.lo cris-opc.lo" ;;
+ bfd_crx_arch) ta="$ta crx-dis.lo crx-opc.lo" ;;
bfd_d10v_arch) ta="$ta d10v-dis.lo d10v-opc.lo" ;;
bfd_d30v_arch) ta="$ta d30v-dis.lo d30v-opc.lo" ;;
bfd_dlx_arch) ta="$ta dlx-dis.lo" ;;
bfd_avr_arch) ta="$ta avr-dis.lo" ;;
bfd_convex_arch) ;;
bfd_cris_arch) ta="$ta cris-dis.lo cris-opc.lo" ;;
+ bfd_crx_arch) ta="$ta crx-dis.lo crx-opc.lo" ;;
bfd_d10v_arch) ta="$ta d10v-dis.lo d10v-opc.lo" ;;
bfd_d30v_arch) ta="$ta d30v-dis.lo d30v-opc.lo" ;;
bfd_dlx_arch) ta="$ta dlx-dis.lo" ;;
--- /dev/null
+/* Disassembler code for CRX.
+ Copyright 2004 Free Software Foundation, Inc.
+ Contributed by Tomer Levi, NSC, Israel.
+ Written by Tomer Levi.
+
+ This file is part of the GNU binutils and GDB, the GNU debugger.
+
+ This program is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "dis-asm.h"
+#include "sysdep.h"
+#include "opcode/crx.h"
+
+/* String to print when opcode was not matched. */
+#define ILLEGAL "illegal"
+ /* Escape to 16-bit immediate. */
+#define ESCAPE_16_BIT 0xE
+
+/* Extract 'n_bits' from 'a' starting from offset 'offs'. */
+#define EXTRACT(a, offs, n_bits) \
+ (n_bits == 32 ? (((a) >> (offs)) & ~0L) \
+ : (((a) >> (offs)) & ((1 << (n_bits)) -1)))
+
+/* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */
+#define SBM(offs) ((((1 << (32 - offs)) -1) << (offs)))
+
+typedef unsigned long dwordU;
+typedef unsigned short wordU;
+
+typedef struct
+{
+ dwordU val;
+ int nbits;
+} parameter;
+
+/* Structure to hold valid 'cinv' instruction options. */
+
+typedef struct
+ {
+ /* Cinv printed string. */
+ char *str;
+ /* Value corresponding to the string. */
+ unsigned int value;
+ }
+cinv_entry;
+
+/* CRX 'cinv' options. */
+const cinv_entry crx_cinvs[] =
+{
+ {"[i]", 2}, {"[i,u]", 3}, {"[d]", 4},
+ {"[d,u]", 5}, {"[d,i]", 6}, {"[d,i,u]", 7}
+};
+
+/* Number of valid 'cinv' instruction options. */
+int NUMCINVS = ((sizeof crx_cinvs)/(sizeof crx_cinvs[0]));
+/* Current opcode table entry we're disassembling. */
+const inst *instruction;
+/* Current instruction we're disassembling. */
+ins currInsn;
+/* The current instruction is read into 3 consecutive words. */
+wordU words[3];
+/* Contains all words in appropriate order. */
+ULONGLONG allWords;
+/* Holds the current processed argument number. */
+int processing_argument_number;
+/* Nonzero means a CST4 instruction. */
+int cst4flag;
+/* Nonzero means the instruction's original size is
+ incremented (escape sequence is used). */
+int size_changed;
+
+static int get_number_of_operands (void);
+static argtype getargtype (operand_type);
+static int getbits (operand_type);
+static char *getregname (reg);
+static char *getcopregname (copreg, reg_type);
+static char * getprocregname (int);
+static char *gettrapstring (unsigned);
+static char *getcinvstring (unsigned);
+static void getregliststring (int, char *, int);
+static wordU get_word_at_PC (bfd_vma, struct disassemble_info *);
+static void get_words_at_PC (bfd_vma, struct disassemble_info *);
+static unsigned long build_mask (void);
+static int powerof2 (int);
+static int match_opcode (void);
+static void make_instruction (void);
+static void print_arguments (ins *, struct disassemble_info *);
+static void print_arg (argument *, struct disassemble_info *);
+
+/* Retrieve the number of operands for the current assembled instruction. */
+
+static int
+get_number_of_operands (void)
+{
+ int i;
+
+ for (i = 0; instruction->operands[i].op_type && i < MAX_OPERANDS; i++)
+ ;
+
+ return i;
+}
+
+/* Return the bit size for a given operand. */
+
+static int
+getbits (operand_type op)
+{
+ if (op < MAX_OPRD)
+ return crx_optab[op].bit_size;
+ else
+ return 0;
+}
+
+/* Return the argument type of a given operand. */
+
+static argtype
+getargtype (operand_type op)
+{
+ if (op < MAX_OPRD)
+ return crx_optab[op].arg_type;
+ else
+ return nullargs;
+}
+
+/* Given the trap index in dispatch table, return its name.
+ This routine is used when disassembling the 'excp' instruction. */
+
+static char *
+gettrapstring (unsigned int index)
+{
+ const trap_entry *trap;
+
+ for (trap = crx_traps; trap < crx_traps + NUMTRAPS; trap++)
+ if (trap->entry == index)
+ return trap->name;
+
+ return ILLEGAL;
+}
+
+/* Given a 'cinv' instruction constant operand, return its corresponding string.
+ This routine is used when disassembling the 'cinv' instruction. */
+
+static char *
+getcinvstring (unsigned int num)
+{
+ const cinv_entry *cinv;
+
+ for (cinv = crx_cinvs; cinv < (crx_cinvs + NUMCINVS); cinv++)
+ if (cinv->value == num)
+ return cinv->str;
+
+ return ILLEGAL;
+}
+
+/* Given a register enum value, retrieve its name. */
+
+char *
+getregname (reg r)
+{
+ const reg_entry *reg = &crx_regtab[r];
+
+ if (reg->type != CRX_R_REGTYPE)
+ return ILLEGAL;
+ else
+ return reg->name;
+}
+
+/* Given a coprocessor register enum value, retrieve its name. */
+
+char *
+getcopregname (copreg r, reg_type type)
+{
+ const reg_entry *reg;
+
+ if (type == CRX_C_REGTYPE)
+ reg = &crx_copregtab[r];
+ else if (type == CRX_CS_REGTYPE)
+ reg = &crx_copregtab[r+(cs0-c0)];
+ else
+ return ILLEGAL;
+
+ return reg->name;
+}
+
+
+/* Getting a processor register name. */
+
+static char *
+getprocregname (int index)
+{
+ const reg_entry *r;
+
+ for (r = crx_regtab; r < crx_regtab + NUMREGS; r++)
+ if (r->image == index)
+ return r->name;
+
+ return "ILLEGAL REGISTER";
+}
+
+/* Get the power of two for a given integer. */
+
+static int
+powerof2 (int x)
+{
+ int product, i;
+
+ for (i = 0, product = 1; i < x; i++)
+ product *= 2;
+
+ return product;
+}
+
+/* Transform a register bit mask to a register list. */
+
+void
+getregliststring (int trap, char *string, int core_cop)
+{
+ char temp_string[5];
+ int i;
+
+ string[0] = '{';
+ string[1] = '\0';
+
+ for (i = 0; i < 16; i++)
+ {
+ if (trap & 0x1)
+ {
+ if (core_cop)
+ sprintf (temp_string, "r%d", i);
+ else
+ sprintf (temp_string, "c%d", i);
+ strcat (string, temp_string);
+ if (trap & 0xfffe)
+ strcat (string, ",");
+ }
+ trap = trap >> 1;
+ }
+
+ strcat (string, "}");
+}
+
+/* START and END are relating 'allWords' struct, which is 48 bits size.
+
+ START|--------|END
+ +---------+---------+---------+---------+
+ | | V | A | L |
+ +---------+---------+---------+---------+
+ 0 16 32 48
+ words [0] [1] [2] */
+
+static parameter
+makelongparameter (ULONGLONG val, int start, int end)
+{
+ parameter p;
+
+ p.val = (dwordU) EXTRACT(val, 48 - end, end - start);
+ p.nbits = end - start;
+ return p;
+}
+
+/* Build a mask of the instruction's 'constant' opcode,
+ based on the instruction's printing flags. */
+
+static unsigned long
+build_mask (void)
+{
+ unsigned int print_flags;
+ unsigned long mask;
+
+ print_flags = instruction->flags & FMT_CRX;
+ switch (print_flags)
+ {
+ case FMT_1:
+ mask = 0xF0F00000;
+ break;
+ case FMT_2:
+ mask = 0xFFF0FF00;
+ break;
+ case FMT_3:
+ mask = 0xFFF00F00;
+ break;
+ case FMT_4:
+ mask = 0xFFF0F000;
+ break;
+ case FMT_5:
+ mask = 0xFFF0FFF0;
+ break;
+ default:
+ mask = SBM(instruction->match_bits);
+ break;
+ }
+
+ return mask;
+}
+
+/* Search for a matching opcode. Return 1 for success, 0 for failure. */
+
+static int
+match_opcode (void)
+{
+ unsigned long mask;
+
+ /* The instruction 'constant' opcode doewsn't exceed 32 bits. */
+ unsigned long doubleWord = words[1] + (words[0] << 16);
+
+ /* Start searching from end of instruction table. */
+ instruction = &crx_instruction[NUMOPCODES - 2];
+
+ /* Loop over instruction table until a full match is found. */
+ while (instruction >= crx_instruction)
+ {
+ mask = build_mask ();
+ if ((doubleWord & mask) == BIN(instruction->match, instruction->match_bits))
+ return 1;
+ else
+ instruction--;
+ }
+ return 0;
+}
+
+/* Set the proper parameter value for different type of arguments. */
+
+static void
+make_argument (argument * a, int start_bits)
+{
+ int inst_bit_size, total_size;
+ parameter p;
+
+ if ((instruction->size == 3) && a->size >= 16)
+ inst_bit_size = 48;
+ else
+ inst_bit_size = 32;
+
+ switch (a->type)
+ {
+ case arg_copr:
+ case arg_copsr:
+ p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
+ inst_bit_size - start_bits);
+ a->cr = p.val;
+ break;
+
+ case arg_r:
+ p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
+ inst_bit_size - start_bits);
+ a->r = p.val;
+ break;
+
+ case arg_ic:
+ p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
+ inst_bit_size - start_bits);
+
+ if ((p.nbits == 4) && cst4flag)
+ {
+ if (IS_INSN_TYPE (CMPBR_INS) && (p.val == ESCAPE_16_BIT))
+ {
+ /* A special case, where the value is actually stored
+ in the last 4 bits. */
+ p = makelongparameter (allWords, 44, 48);
+ /* The size of the instruction should be incremented. */
+ size_changed = 1;
+ }
+
+ if (p.val == 6)
+ p.val = -1;
+ else if (p.val == 13)
+ p.val = 48;
+ else if (p.val == 5)
+ p.val = -4;
+ else if (p.val == 10)
+ p.val = 32;
+ else if (p.val == 11)
+ p.val = 20;
+ else if (p.val == 9)
+ p.val = 16;
+ }
+
+ a->constant = p.val;
+ break;
+
+ case arg_icr:
+ a->scale = 0;
+ total_size = a->size + 10; /* sizeof(rbase + ridx + scl2) = 10. */
+ p = makelongparameter (allWords, inst_bit_size - total_size,
+ inst_bit_size - (total_size - 4));
+ a->r = p.val;
+ p = makelongparameter (allWords, inst_bit_size - (total_size - 4),
+ inst_bit_size - (total_size - 8));
+ a->i_r = p.val;
+ p = makelongparameter (allWords, inst_bit_size - (total_size - 8),
+ inst_bit_size - (total_size - 10));
+ a->scale = p.val;
+ p = makelongparameter (allWords, inst_bit_size - (total_size - 10),
+ inst_bit_size);
+ a->constant = p.val;
+ break;
+
+ case arg_rbase:
+ p = makelongparameter (allWords, inst_bit_size - (start_bits + 4),
+ inst_bit_size - start_bits);
+ a->r = p.val;
+ break;
+
+ case arg_cr:
+ if (a->size <= 8)
+ {
+ p = makelongparameter (allWords, inst_bit_size - (start_bits + 4),
+ inst_bit_size - start_bits);
+ a->r = p.val;
+ /* Case for opc4 r dispu rbase. */
+ p = makelongparameter (allWords, inst_bit_size - (start_bits + 8),
+ inst_bit_size - (start_bits + 4));
+ }
+ else
+ {
+ /* The 'rbase' start_bits is always relative to a 32-bit data type. */
+ p = makelongparameter (allWords, 32 - (start_bits + 4),
+ 32 - start_bits);
+ a->r = p.val;
+ p = makelongparameter (allWords, 32 - start_bits,
+ inst_bit_size);
+ }
+ if ((p.nbits == 4) && cst4flag)
+ {
+ if (instruction->flags & DISPUW4)
+ p.val *= 2;
+ else if (instruction->flags & DISPUD4)
+ p.val *= 4;
+ }
+ a->constant = p.val;
+ break;
+
+ case arg_c:
+ p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
+ inst_bit_size - start_bits);
+ a->constant = p.val;
+ break;
+ default:
+ break;
+ }
+}
+
+/* Print a single argument. */
+
+static void
+print_arg (argument *a, struct disassemble_info *info)
+{
+ LONGLONG longdisp, mask;
+ char sign_flag;
+ int op_index = 0;
+ char string[200];
+ PTR stream = info->stream;
+ fprintf_ftype func = info->fprintf_func;
+
+ switch (a->type)
+ {
+ case arg_copr:
+ func (stream, "%s", getcopregname (a->cr, CRX_C_REGTYPE));
+ break;
+
+ case arg_copsr:
+ func (stream, "%s", getcopregname (a->cr, CRX_CS_REGTYPE));
+ break;
+
+ case arg_r:
+ if (IS_INSN_MNEMONIC ("mtpr") || IS_INSN_MNEMONIC ("mfpr"))
+ func (stream, "%s", getprocregname (a->r));
+ else
+ func (stream, "%s", getregname (a->r));
+ break;
+
+ case arg_ic:
+ if (IS_INSN_MNEMONIC ("excp"))
+ func (stream, "%s", gettrapstring (a->constant));
+
+ else if (IS_INSN_MNEMONIC ("cinv"))
+ func (stream, "%s", getcinvstring (a->constant));
+
+ else if (INST_HAS_REG_LIST)
+ {
+ if (!IS_INSN_TYPE (COP_REG_INS))
+ {
+ getregliststring (a->constant, string, 1);
+ func (stream, "%s", string);
+ }
+ else
+ {
+ /* Check for proper argument number. */
+ if (processing_argument_number == 2)
+ {
+ getregliststring (a->constant, string, 0);
+ func (stream, "%s", string);
+ }
+ else
+ func (stream, "$0x%x", a->constant);
+ }
+ }
+ else
+ func (stream, "$0x%x", a->constant);
+ break;
+
+ case arg_icr:
+ func (stream, "0x%x(%s,%s,%d)", a->constant, getregname (a->r),
+ getregname (a->i_r), powerof2 (a->scale));
+ break;
+
+ case arg_rbase:
+ func (stream, "(%s)", getregname (a->r));
+ break;
+
+ case arg_cr:
+ func (stream, "0x%x(%s)", a->constant, getregname (a->r));
+
+ if (IS_INSN_TYPE (LD_STOR_INS_INC))
+ func (stream, "+");
+ break;
+
+ case arg_c:
+ /* Removed the *2 part as because implicit zeros are no more required.
+ Have to fix this as this needs a bit of extension in terms of branchins.
+ Have to add support for cmp and branch instructions. */
+ if (IS_INSN_TYPE (BRANCH_INS) || IS_INSN_MNEMONIC ("bal")
+ || IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (DCR_BRANCH_INS)
+ || IS_INSN_TYPE (COP_BRANCH_INS))
+ {
+ func (stream, "%c", '*');
+ longdisp = a->constant;
+ longdisp <<= 1;
+ sign_flag = '+';
+
+ switch (a->size)
+ {
+ case 8:
+ case 16:
+ case 24:
+ case 32:
+ mask = ((LONGLONG)1 << a->size) - 1;
+ if (longdisp & ((LONGLONG)1 << a->size))
+ {
+ sign_flag = '-';
+ longdisp = ~(longdisp) + 1;
+ }
+ a->constant = (unsigned long int) (longdisp & mask);
+ break;
+ default:
+ func (stream,
+ "Wrong offset used in branch/bal instruction");
+ break;
+ }
+
+ func (stream, "%c", sign_flag);
+ }
+ /* For branch Neq instruction it is 2*offset + 2. */
+ if (IS_INSN_TYPE (BRANCH_NEQ_INS))
+ a->constant = 2 * a->constant + 2;
+ if (IS_INSN_TYPE (LD_STOR_INS_INC)
+ || IS_INSN_TYPE (LD_STOR_INS)
+ || IS_INSN_TYPE (STOR_IMM_INS)
+ || IS_INSN_TYPE (CSTBIT_INS))
+ {
+ op_index = instruction->flags & REVERSE_MATCH ? 0 : 1;
+ if (instruction->operands[op_index].op_type == abs16)
+ a->constant |= 0xFFFF0000;
+ }
+ func (stream, "0x%x", a->constant);
+ break;
+ default:
+ break;
+ }
+}
+
+/* Print all the arguments of CURRINSN instruction. */
+
+static void
+print_arguments (ins *currInsn, struct disassemble_info *info)
+{
+ int i;
+
+ for (i = 0; i < currInsn->nargs; i++)
+ {
+ processing_argument_number = i;
+
+ print_arg (&currInsn->arg[i], info);
+
+ if (i != currInsn->nargs - 1)
+ info->fprintf_func (info->stream, ", ");
+ }
+}
+
+/* Build the instruction's arguments. */
+
+static void
+make_instruction (void)
+{
+ int i;
+ unsigned int temp_value, shift;
+ argument a;
+
+ for (i = 0; i < currInsn.nargs; i++)
+ {
+ a.type = getargtype (instruction->operands[i].op_type);
+ if (instruction->operands[i].op_type == cst4
+ || instruction->operands[i].op_type == rbase_cst4)
+ cst4flag = 1;
+ a.size = getbits (instruction->operands[i].op_type);
+ shift = instruction->operands[i].shift;
+
+ make_argument (&a, shift);
+ currInsn.arg[i] = a;
+ }
+
+ /* Calculate instruction size (in bytes). */
+ currInsn.size = instruction->size + (size_changed ? 1 : 0);
+ currInsn.size *= 2;
+
+ /* Swapping first and second arguments. */
+ if (IS_INSN_TYPE (COP_BRANCH_INS))
+ {
+ temp_value = currInsn.arg[0].constant;
+ currInsn.arg[0].constant = currInsn.arg[1].constant;
+ currInsn.arg[1].constant = temp_value;
+ }
+}
+
+/* Retrieve a single word from a given memory address. */
+
+static wordU
+get_word_at_PC (bfd_vma memaddr, struct disassemble_info *info)
+{
+ bfd_byte buffer[4];
+ int status;
+ wordU insn = 0;
+
+ status = info->read_memory_func (memaddr, buffer, 2, info);
+
+ if (status == 0)
+ insn = (wordU) bfd_getl16 (buffer);
+
+ return insn;
+}
+
+/* Retrieve multiple words (3) from a given memory address. */
+
+static void
+get_words_at_PC (bfd_vma memaddr, struct disassemble_info *info)
+{
+ int i;
+ bfd_vma mem;
+
+ for (i = 0, mem = memaddr; i < 3; i++, mem += 2)
+ words[i] = get_word_at_PC (mem, info);
+
+ allWords =
+ ((ULONGLONG) words[0] << 32) + ((unsigned long) words[1] << 16) + words[2];
+}
+
+/* Prints the instruction by calling print_arguments after proper matching. */
+
+int
+print_insn_crx (memaddr, info)
+ bfd_vma memaddr;
+ struct disassemble_info *info;
+{
+ int is_decoded; /* Nonzero means instruction has a match. */
+
+ /* Initialize global variables. */
+ cst4flag = 0;
+ size_changed = 0;
+
+ /* Retrieve the encoding from current memory location. */
+ get_words_at_PC (memaddr, info);
+ /* Find a matching opcode in table. */
+ is_decoded = match_opcode ();
+ /* If found, print the instruction's mnemonic and arguments. */
+ if (is_decoded > 0 && (words[0] << 16 || words[1]) != 0)
+ {
+ info->fprintf_func (info->stream, "%s", instruction->mnemonic);
+ if ((currInsn.nargs = get_number_of_operands ()) != 0)
+ info->fprintf_func (info->stream, "\t");
+ make_instruction ();
+ print_arguments (&currInsn, info);
+ return currInsn.size;
+ }
+
+ /* No match found. */
+ info->fprintf_func (info->stream,"%s ",ILLEGAL);
+ return 2;
+}
--- /dev/null
+/* crx-opc.c -- Table of opcodes for the CRX processor.
+ Copyright 2004 Free Software Foundation, Inc.
+ Contributed by Tomer Levi NSC, Israel.
+ Originally written for GAS 2.12 by Tomer Levi.
+
+ This file is part of GAS, GDB and the GNU binutils.
+
+ GAS, GDB, and GNU binutils is free software; you can redistribute it
+ and/or modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2, or (at your
+ option) any later version.
+
+ GAS, GDB, and GNU binutils are distributed in the hope that they will be
+ useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include <stdio.h>
+#include "libiberty.h"
+#include "symcat.h"
+#include "opcode/crx.h"
+
+const inst crx_instruction[] =
+{
+/* Create an arithmetic instruction - INST[bw]. */
+#define ARITH_BYTE_INST(NAME, OPC) \
+ /* opc8 cst4 r */ \
+ {NAME, 1, OPC, 24, ARITH_BYTE_INS, {{cst4,20}, {regr,16}}}, \
+ /* opc8 i16 r */ \
+ {NAME, 2, (OPC<<4)+0xE, 20, ARITH_BYTE_INS, {{i16,0}, {regr,16}}}, \
+ /* opc8 r r */ \
+ {NAME, 1, OPC+0x40, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
+
+ ARITH_BYTE_INST ("addub", 0x0),
+ ARITH_BYTE_INST ("addb", 0x1),
+ ARITH_BYTE_INST ("addcb", 0x2),
+ ARITH_BYTE_INST ("andb", 0x3),
+ ARITH_BYTE_INST ("cmpb", 0x4),
+ ARITH_BYTE_INST ("movb", 0x5),
+ ARITH_BYTE_INST ("orb", 0x6),
+ ARITH_BYTE_INST ("subb", 0x7),
+ ARITH_BYTE_INST ("subcb", 0x8),
+ ARITH_BYTE_INST ("xorb", 0x9),
+ ARITH_BYTE_INST ("mulb", 0xA),
+
+ ARITH_BYTE_INST ("adduw", 0x10),
+ ARITH_BYTE_INST ("addw", 0x11),
+ ARITH_BYTE_INST ("addcw", 0x12),
+ ARITH_BYTE_INST ("andw", 0x13),
+ ARITH_BYTE_INST ("cmpw", 0x14),
+ ARITH_BYTE_INST ("movw", 0x15),
+ ARITH_BYTE_INST ("orw", 0x16),
+ ARITH_BYTE_INST ("subw", 0x17),
+ ARITH_BYTE_INST ("subcw", 0x18),
+ ARITH_BYTE_INST ("xorw", 0x19),
+ ARITH_BYTE_INST ("mulw", 0x1A),
+
+/* Create an arithmetic instruction - INST[d]. */
+#define ARITH_INST(NAME, OPC) \
+ /* opc8 cst4 r */ \
+ {NAME, 1, OPC, 24, ARITH_INS, {{cst4,20}, {regr,16}}}, \
+ /* opc8 i16 r */ \
+ {NAME, 2, (OPC<<4)+0xE, 20, ARITH_INS, {{i16,0}, {regr,16}}}, \
+ /* opc8 i32 r */ \
+ {NAME, 3, (OPC<<4)+0xF, 20, ARITH_INS, {{i32,0}, {regr,16}}}, \
+ /* opc8 r r */ \
+ {NAME, 1, OPC+0x40, 24, ARITH_INS, {{regr,20}, {regr,16}}}
+
+ ARITH_INST ("addud", 0x20),
+ ARITH_INST ("addd", 0x21),
+ ARITH_INST ("addcd", 0x22),
+ ARITH_INST ("andd", 0x23),
+ ARITH_INST ("cmpd", 0x24),
+ ARITH_INST ("movd", 0x25),
+ ARITH_INST ("ord", 0x26),
+ ARITH_INST ("subd", 0x27),
+ ARITH_INST ("subcd", 0x28),
+ ARITH_INST ("xord", 0x29),
+ ARITH_INST ("muld", 0x2A),
+
+/* Create a shift instruction. */
+#define SHIFT_INST(NAME, OPRD, OPC1, SHIFT1, OPC2) \
+ /* OPRD=i3 -->> opc9 i3 r */ \
+ /* OPRD=i4 -->> opc8 i4 r */ \
+ /* OPRD=i5 -->> opc7 i5 r */ \
+ {NAME, 1, OPC1, SHIFT1, SHIFT_INS, {{OPRD,20}, {regr,16}}}, \
+ /* opc8 r r */ \
+ {NAME, 1, OPC2, 24, SHIFT_INS, {{regr,20}, {regr,16}}}
+
+ SHIFT_INST ("sllb", i3, 0x1F8, 23, 0x4D),
+ SHIFT_INST ("srlb", i3, 0x1F9, 23, 0x4E),
+ SHIFT_INST ("srab", i3, 0x1FA, 23, 0x4F),
+
+ SHIFT_INST ("sllw", i4, 0xB6, 24, 0x5D),
+ SHIFT_INST ("srlw", i4, 0xB7, 24, 0x5E),
+ SHIFT_INST ("sraw", i4, 0xB8, 24, 0x5F),
+
+ SHIFT_INST ("slld", i5, 0x78, 25, 0x6D),
+ SHIFT_INST ("srld", i5, 0x79, 25, 0x6E),
+ SHIFT_INST ("srad", i5, 0x7A, 25, 0x6F),
+
+/* Create a conditional branch instruction. */
+#define BRANCH_INST(NAME, OPC) \
+ /* opc4 c4 dispe9 */ \
+ {NAME, 1, OPC, 24, BRANCH_INS | RELAXABLE, {{d9,16}}}, \
+ /* opc4 c4 disps17 */ \
+ {NAME, 2, (OPC<<8)+0x7E, 16, BRANCH_INS | RELAXABLE, {{d17,0}}}, \
+ /* opc4 c4 disps33 */ \
+ {NAME, 3, (OPC<<8)+0x7F, 16, BRANCH_INS | RELAXABLE, {{d33,0}}}
+
+ BRANCH_INST ("beq", 0x70),
+ BRANCH_INST ("bne", 0x71),
+ BRANCH_INST ("bcs", 0x72),
+ BRANCH_INST ("bcc", 0x73),
+ BRANCH_INST ("bhi", 0x74),
+ BRANCH_INST ("bls", 0x75),
+ BRANCH_INST ("bgt", 0x76),
+ BRANCH_INST ("ble", 0x77),
+ BRANCH_INST ("bfs", 0x78),
+ BRANCH_INST ("bfc", 0x79),
+ BRANCH_INST ("blo", 0x7A),
+ BRANCH_INST ("bhs", 0x7B),
+ BRANCH_INST ("blt", 0x7C),
+ BRANCH_INST ("bge", 0x7D),
+ BRANCH_INST ("br", 0x7E),
+
+/* Create a 'Branch if Equal to 0' instruction. */
+#define BRANCH_NEQ_INST(NAME, OPC) \
+ /* opc8 dispu5 r */ \
+ {NAME, 1, OPC, 24, BRANCH_NEQ_INS, {{regr,16}, {d5,20}}}
+
+ BRANCH_NEQ_INST ("beq0b", 0xB0),
+ BRANCH_NEQ_INST ("bne0b", 0xB1),
+ BRANCH_NEQ_INST ("beq0w", 0xB2),
+ BRANCH_NEQ_INST ("bne0w", 0xB3),
+ BRANCH_NEQ_INST ("beq0d", 0xB4),
+ BRANCH_NEQ_INST ("bne0d", 0xB5),
+
+/* Create instruction with no operands. */
+#define NO_OP_INST(NAME, OPC) \
+ /* opc16 */ \
+ {NAME, 1, OPC, 16, 0, {{0, 0}}}
+
+ NO_OP_INST ("nop", 0x3002),
+ NO_OP_INST ("retx", 0x3003),
+ NO_OP_INST ("di", 0x3004),
+ NO_OP_INST ("ei", 0x3005),
+ NO_OP_INST ("wait", 0x3006),
+ NO_OP_INST ("eiwait", 0x3007),
+
+/* Create a 'Compare & Branch' instruction. */
+#define CMPBR_INST(NAME, OPC1, OPC2, C4) \
+ /* opc12 r r c4 disps9 */ \
+ {NAME, 2, ((0x300+OPC1)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{regr,16}, {regr,12}, {d9,0}}}, \
+ /* opc12 r r c4 disps25 */ \
+ {NAME, 3, ((0x310+OPC1)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{regr,16}, {regr,12}, {d25,0}}}, \
+ /* opc12 i4cst4 r c4 disps9 */ \
+ {NAME, 2, ((0x300+OPC2)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{cst4,16}, {regr,12}, {d9,0}}}, \
+ /* opc12 i4cst4 r c4 disps25 */ \
+ {NAME, 3, ((0x310+OPC2)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{cst4,16}, {regr,12}, {d25,0}}}
+
+ CMPBR_INST ("cmpbeqb", 0x8, 0xC, 0x0),
+ CMPBR_INST ("cmpbneb", 0x8, 0xC, 0x1),
+ CMPBR_INST ("cmpbhib", 0x8, 0xC, 0x4),
+ CMPBR_INST ("cmpblsb", 0x8, 0xC, 0x5),
+ CMPBR_INST ("cmpbgtb", 0x8, 0xC, 0x6),
+ CMPBR_INST ("cmpbleb", 0x8, 0xC, 0x7),
+ CMPBR_INST ("cmpblob", 0x8, 0xC, 0xA),
+ CMPBR_INST ("cmpbhsb", 0x8, 0xC, 0xB),
+ CMPBR_INST ("cmpbltb", 0x8, 0xC, 0xC),
+ CMPBR_INST ("cmpbgeb", 0x8, 0xC, 0xD),
+
+ CMPBR_INST ("cmpbeqw", 0x9, 0xD, 0x0),
+ CMPBR_INST ("cmpbnew", 0x9, 0xD, 0x1),
+ CMPBR_INST ("cmpbhiw", 0x9, 0xD, 0x4),
+ CMPBR_INST ("cmpblsw", 0x9, 0xD, 0x5),
+ CMPBR_INST ("cmpbgtw", 0x9, 0xD, 0x6),
+ CMPBR_INST ("cmpblew", 0x9, 0xD, 0x7),
+ CMPBR_INST ("cmpblow", 0x9, 0xD, 0xA),
+ CMPBR_INST ("cmpbhsw", 0x9, 0xD, 0xB),
+ CMPBR_INST ("cmpbltw", 0x9, 0xD, 0xC),
+ CMPBR_INST ("cmpbgew", 0x9, 0xD, 0xD),
+
+ CMPBR_INST ("cmpbeqd", 0xA, 0xE, 0x0),
+ CMPBR_INST ("cmpbned", 0xA, 0xE, 0x1),
+ CMPBR_INST ("cmpbhid", 0xA, 0xE, 0x4),
+ CMPBR_INST ("cmpblsd", 0xA, 0xE, 0x5),
+ CMPBR_INST ("cmpbgtd", 0xA, 0xE, 0x6),
+ CMPBR_INST ("cmpbled", 0xA, 0xE, 0x7),
+ CMPBR_INST ("cmpblod", 0xA, 0xE, 0xA),
+ CMPBR_INST ("cmpbhsd", 0xA, 0xE, 0xB),
+ CMPBR_INST ("cmpbltd", 0xA, 0xE, 0xC),
+ CMPBR_INST ("cmpbged", 0xA, 0xE, 0xD),
+
+/* Create an instruction using a single register operand. */
+#define REG1_INST(NAME, OPC) \
+ /* opc8 c4 r */ \
+ {NAME, 1, OPC, 20, 0, {{regr,16}}}
+
+ /* JCond instructions */
+ REG1_INST ("jeq", 0xBA0),
+ REG1_INST ("jne", 0xBA1),
+ REG1_INST ("jcs", 0xBA2),
+ REG1_INST ("jcc", 0xBA3),
+ REG1_INST ("jhi", 0xBA4),
+ REG1_INST ("jls", 0xBA5),
+ REG1_INST ("jgt", 0xBA6),
+ REG1_INST ("jle", 0xBA7),
+ REG1_INST ("jfs", 0xBA8),
+ REG1_INST ("jfc", 0xBA9),
+ REG1_INST ("jlo", 0xBAA),
+ REG1_INST ("jhs", 0xBAB),
+ REG1_INST ("jlt", 0xBAC),
+ REG1_INST ("jge", 0xBAD),
+ REG1_INST ("jump", 0xBAE),
+
+ /* SCond instructions */
+ REG1_INST ("seq", 0xBB0),
+ REG1_INST ("sne", 0xBB1),
+ REG1_INST ("scs", 0xBB2),
+ REG1_INST ("scc", 0xBB3),
+ REG1_INST ("shi", 0xBB4),
+ REG1_INST ("sls", 0xBB5),
+ REG1_INST ("sgt", 0xBB6),
+ REG1_INST ("sle", 0xBB7),
+ REG1_INST ("sfs", 0xBB8),
+ REG1_INST ("sfc", 0xBB9),
+ REG1_INST ("slo", 0xBBA),
+ REG1_INST ("shs", 0xBBB),
+ REG1_INST ("slt", 0xBBC),
+ REG1_INST ("sge", 0xBBD),
+
+/* Create an instruction using two register operands. */
+#define REG2_INST(NAME, OPC) \
+ /* opc24 r r OR opc20 c4 r r */ \
+ {NAME, 2, 0x300800+OPC, 8, 0, {{regr,4}, {regr,0}}}
+
+ /* MULTIPLY INSTRUCTIONS */
+ REG2_INST ("macsb", 0x40),
+ REG2_INST ("macub", 0x41),
+ REG2_INST ("macqb", 0x42),
+
+ REG2_INST ("macsw", 0x50),
+ REG2_INST ("macuw", 0x51),
+ REG2_INST ("macqw", 0x52),
+
+ REG2_INST ("macsd", 0x60),
+ REG2_INST ("macud", 0x61),
+ REG2_INST ("macqd", 0x62),
+
+ REG2_INST ("mullsd", 0x65),
+ REG2_INST ("mullud", 0x66),
+
+ REG2_INST ("mulsbw", 0x3B),
+ REG2_INST ("mulubw", 0x3C),
+ REG2_INST ("mulswd", 0x3D),
+ REG2_INST ("muluwd", 0x3E),
+
+ /* SIGNEXTEND STUFF */
+ REG2_INST ("sextbw", 0x30),
+ REG2_INST ("sextbd", 0x31),
+ REG2_INST ("sextwd", 0x32),
+ REG2_INST ("zextbw", 0x34),
+ REG2_INST ("zextbd", 0x35),
+ REG2_INST ("zextwd", 0x36),
+
+ REG2_INST ("bswap", 0x3F),
+
+ REG2_INST ("maxsb", 0x80),
+ REG2_INST ("minsb", 0x81),
+ REG2_INST ("maxub", 0x82),
+ REG2_INST ("minub", 0x83),
+ REG2_INST ("absb", 0x84),
+ REG2_INST ("negb", 0x85),
+ REG2_INST ("cntl0b", 0x86),
+ REG2_INST ("cntl1b", 0x87),
+ REG2_INST ("popcntb",0x88),
+ REG2_INST ("rotlb", 0x89),
+ REG2_INST ("rotrb", 0x8A),
+ REG2_INST ("mulqb", 0x8B),
+ REG2_INST ("addqb", 0x8C),
+ REG2_INST ("subqb", 0x8D),
+ REG2_INST ("cntlsb", 0x8E),
+
+ REG2_INST ("maxsw", 0x90),
+ REG2_INST ("minsw", 0x91),
+ REG2_INST ("maxuw", 0x92),
+ REG2_INST ("minuw", 0x93),
+ REG2_INST ("absw", 0x94),
+ REG2_INST ("negw", 0x95),
+ REG2_INST ("cntl0w", 0x96),
+ REG2_INST ("cntl1w", 0x97),
+ REG2_INST ("popcntw",0x98),
+ REG2_INST ("rotlw", 0x99),
+ REG2_INST ("rotrw", 0x9A),
+ REG2_INST ("mulqw", 0x9B),
+ REG2_INST ("addqw", 0x9C),
+ REG2_INST ("subqw", 0x9D),
+ REG2_INST ("cntlsw", 0x9E),
+
+ REG2_INST ("maxsd", 0xA0),
+ REG2_INST ("minsd", 0xA1),
+ REG2_INST ("maxud", 0xA2),
+ REG2_INST ("minud", 0xA3),
+ REG2_INST ("absd", 0xA4),
+ REG2_INST ("negd", 0xA5),
+ REG2_INST ("cntl0d", 0xA6),
+ REG2_INST ("cntl1d", 0xA7),
+ REG2_INST ("popcntd",0xA8),
+ REG2_INST ("rotld", 0xA9),
+ REG2_INST ("rotrd", 0xAA),
+ REG2_INST ("mulqd", 0xAB),
+ REG2_INST ("addqd", 0xAC),
+ REG2_INST ("subqd", 0xAD),
+ REG2_INST ("cntlsd", 0xAE),
+
+/* Conditional move instructions */
+ REG2_INST ("cmoveqd", 0x70),
+ REG2_INST ("cmovned", 0x71),
+ REG2_INST ("cmovcsd", 0x72),
+ REG2_INST ("cmovccd", 0x73),
+ REG2_INST ("cmovhid", 0x74),
+ REG2_INST ("cmovlsd", 0x75),
+ REG2_INST ("cmovgtd", 0x76),
+ REG2_INST ("cmovled", 0x77),
+ REG2_INST ("cmovfsd", 0x78),
+ REG2_INST ("cmovfcd", 0x79),
+ REG2_INST ("cmovlod", 0x7A),
+ REG2_INST ("cmovhsd", 0x7B),
+ REG2_INST ("cmovltd", 0x7C),
+ REG2_INST ("cmovged", 0x7D),
+
+/* Load instructions (from memory to register). */
+#define LD_REG_INST(NAME, OPC1, OPC2, DISP) \
+ /* opc12 r abs16 */ \
+ {NAME, 2, 0x320+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{abs16,0}, {regr,16}}}, \
+ /* opc12 r abs32 */ \
+ {NAME, 3, 0x330+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{abs32,0}, {regr,16}}}, \
+ /* opc4 r c4 rbase */ \
+ {NAME, 1, ((0x8+OPC2)<<8), 20, LD_STOR_INS | DISP | FMT_1 | REVERSE_MATCH, {{rbase,20}, {regr,24}}},\
+ /* opc4 r rbase dispu[bwd]4 */ \
+ {NAME, 1, 0x8+OPC2, 28, LD_STOR_INS | DISP | REVERSE_MATCH, {{rbase_cst4,16}, {regr,24}}}, \
+ /* opc4 r rbase disps16 */ \
+ {NAME, 2, ((0x8+OPC2)<<8)+0xE, 20, LD_STOR_INS | DISP | FMT_1 | REVERSE_MATCH, {{rbase_dispu16,16}, {regr,24}}}, \
+ /* opc4 r rbase disps32 */ \
+ {NAME, 3, ((0x8+OPC2)<<8)+0xF, 20, LD_STOR_INS | FMT_1 | REVERSE_MATCH, {{rbase_dispu32,16}, {regr,24}}}, \
+ /* opc12 r rbase */ \
+ {NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC | REVERSE_MATCH, {{rbase,12}, {regr,16}}}, \
+ /* opc12 r rbase disps12 */ \
+ {NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC | REVERSE_MATCH, {{rbase_dispu12,12}, {regr,16}}}, \
+ /* opc12 r rbase ridx scl2 disps6 */ \
+ {NAME, 2, 0x32C+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{rbase_ridx_scl2_dispu6,0}, {regr,16}}}, \
+ /* opc12 r rbase ridx scl2 disps22 */ \
+ {NAME, 3, 0x33C+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{rbase_ridx_scl2_dispu22,0}, {regr,16}}}
+
+ LD_REG_INST ("loadb", 0x0, 0x0, DISPUB4),
+ LD_REG_INST ("loadw", 0x1, 0x1, DISPUW4),
+ LD_REG_INST ("loadd", 0x2, 0x2, DISPUD4),
+
+/* Store instructions (from Register to Memory). */
+#define ST_REG_INST(NAME, OPC1, OPC2, DISP) \
+ /* opc12 r abs16 */ \
+ {NAME, 2, 0x320+OPC1, 20, LD_STOR_INS, {{regr,16}, {abs16,0}}}, \
+ /* opc12 r abs32 */ \
+ {NAME, 3, 0x330+OPC1, 20, LD_STOR_INS, {{regr,16}, {abs32,0}}}, \
+ /* opc4 r c4 rbase */ \
+ {NAME, 1, ((0x8+OPC2)<<8), 20, LD_STOR_INS | DISP | FMT_1, {{regr,24}, {rbase,20}}},\
+ /* opc4 r rbase dispu[bwd]4 */ \
+ {NAME, 1, 0x8+OPC2, 28, LD_STOR_INS | DISP, {{regr,24}, {rbase_cst4,16}}}, \
+ /* opc4 r rbase disps16 */ \
+ {NAME, 2, ((0x8+OPC2)<<8)+0xE, 20, LD_STOR_INS | DISP | FMT_1, {{regr,24}, {rbase_dispu16,16}}}, \
+ /* opc4 r rbase disps32 */ \
+ {NAME, 3, ((0x8+OPC2)<<8)+0xF, 20, LD_STOR_INS | FMT_1, {{regr,24}, {rbase_dispu32,16}}}, \
+ /* opc12 r rbase */ \
+ {NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC, {{regr,16}, {rbase,12}}}, \
+ /* opc12 r rbase disps12 */ \
+ {NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC, {{regr,16}, {rbase_dispu12,12}}}, \
+ /* opc12 r rbase ridx scl2 disps6 */ \
+ {NAME, 2, 0x32C+OPC1, 20, LD_STOR_INS, {{regr,16}, {rbase_ridx_scl2_dispu6,0}}}, \
+ /* opc12 r rbase ridx scl2 disps22 */ \
+ {NAME, 3, 0x33C+OPC1, 20, LD_STOR_INS, {{regr,16}, {rbase_ridx_scl2_dispu22,0}}}
+
+/* Store instructions (Immediate to Memory). */
+#define ST_I_INST(NAME, OPC) \
+ /* opc12 i4 abs16 */ \
+ {NAME, 2, 0x360+OPC, 20, STOR_IMM_INS, {{i4,16}, {abs16,0}}}, \
+ /* opc12 i4 abs32 */ \
+ {NAME, 3, 0x370+OPC, 20, STOR_IMM_INS, {{i4,16}, {abs32,0}}}, \
+ /* opc12 i4 c4 rbase */ \
+ {NAME, 1, 0x368+OPC, 20, LD_STOR_INS_INC, {{i4,16}, {rbase,12}}}, \
+ /* opc12 i4 rbase disps12 */ \
+ {NAME, 2, 0x368+OPC, 20, LD_STOR_INS_INC, {{i4,16}, {rbase_dispu12,12}}}, \
+ /* opc4 i4 c4 rbase */ \
+ {NAME, 1, 0x364+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase,12}}}, \
+ /* opc12 i4 rbase disps12 */ \
+ {NAME, 2, 0x364+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_dispu12,12}}}, \
+ /* opc12 i4 rbase disps28 */ \
+ {NAME, 3, 0x374+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_dispu28,12}}}, \
+ /* opc12 i4 rbase ridx scl2 disps6 */ \
+ {NAME, 2, 0x36C+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_ridx_scl2_dispu6,0}}},\
+ /* opc12 i4 rbase ridx scl2 disps22 */ \
+ {NAME, 3, 0x37C+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_ridx_scl2_dispu22,0}}}
+
+ ST_REG_INST ("storb", 0x20, 0x4, DISPUB4),
+ ST_I_INST ("storb", 0x0),
+
+ ST_REG_INST ("storw", 0x21, 0x5, DISPUW4),
+ ST_I_INST ("storw", 0x1),
+
+ ST_REG_INST ("stord", 0x22, 0x6, DISPUD4),
+ ST_I_INST ("stord", 0x2),
+
+/* Create a bit instruction. */
+#define CSTBIT_INST(NAME, OP, OPC1, DIFF, SHIFT, OPC2) \
+ /* OP=i3 -->> opc13 i3 */ \
+ /* OP=i4 -->> opc12 i4 */ \
+ /* OP=i5 -->> opc11 i5 */ \
+ \
+ /* opcNN iN abs16 */ \
+ {NAME, 2, OPC1+0*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {abs16,0}}}, \
+ /* opcNN iN abs32 */ \
+ {NAME, 3, OPC1+1*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {abs32,0}}}, \
+ /* opcNN iN rbase */ \
+ {NAME, 1, OPC2, SHIFT+4, CSTBIT_INS, {{OP,20}, {rbase,16}}}, \
+ /* opcNN iN rbase disps12 */ \
+ {NAME, 2, OPC1+2*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_dispu12,12}}}, \
+ /* opcNN iN rbase disps28 */ \
+ {NAME, 3, OPC1+3*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_dispu28,12}}}, \
+ /* opcNN iN rbase ridx scl2 disps6 */ \
+ {NAME, 2, OPC1+4*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_ridx_scl2_dispu6,0}}}, \
+ /* opcNN iN rbase ridx scl2 disps22 */ \
+ {NAME, 3, OPC1+5*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_ridx_scl2_dispu22,0}}}
+
+ CSTBIT_INST ("cbitb", i3, 0x700, 0x20, 19, 0x1FC),
+ CSTBIT_INST ("cbitw", i4, 0x382, 0x10, 20, 0xBD),
+ CSTBIT_INST ("cbitd", i5, 0x1C3, 0x8, 21, 0x7B),
+ {"cbitd", 2, 0x300838, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
+ {"cbitd", 2, 0x18047B, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
+
+ CSTBIT_INST ("sbitb", i3, 0x701, 0x20, 19, 0x1FD),
+ CSTBIT_INST ("sbitw", i4, 0x383, 0x10, 20, 0xBE),
+ CSTBIT_INST ("sbitd", i5, 0x1C4, 0x8, 21, 0x7C),
+ {"sbitd", 2, 0x300839, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
+ {"sbitd", 2, 0x18047C, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
+
+ CSTBIT_INST ("tbitb", i3, 0x702, 0x20, 19, 0x1FE),
+ CSTBIT_INST ("tbitw", i4, 0x384, 0x10, 20, 0xBF),
+ CSTBIT_INST ("tbitd", i5, 0x1C5, 0x8, 21, 0x7D),
+ {"tbitd", 2, 0x30083A, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
+ {"tbitd", 2, 0x18047D, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
+
+/* Instructions including a register list (opcode is represented as a mask). */
+#define REGLIST_INST(NAME, OPC) \
+ /* opc12 r mask16 */ \
+ {NAME, 2, OPC, 20, REG_LIST, {{regr,16}, {i16,0}}}
+
+ REG1_INST ("getrfid", 0xFF9),
+ REG1_INST ("setrfid", 0xFFA),
+
+ REGLIST_INST ("push", 0x346),
+ REG1_INST ("push", 0xFFB),
+
+ REGLIST_INST ("pop", 0x324),
+ REG1_INST ("pop", 0xFFC),
+
+ REGLIST_INST ("popret", 0x326),
+ REG1_INST ("popret", 0xFFD),
+
+ REGLIST_INST ("loadm", 0x324),
+ REGLIST_INST ("loadma", 0x325),
+ REGLIST_INST ("popma", 0x325),
+
+ REGLIST_INST ("storm", 0x344),
+ REGLIST_INST ("storma", 0x345),
+ REGLIST_INST ("pushma", 0x345),
+
+/* Create a branch instruction. */
+#define BR_INST(NAME, OPC1, OPC2, INS_TYPE) \
+ /* opc12 r disps17 */ \
+ {NAME, 2, OPC1, 20, INS_TYPE | RELAXABLE, {{regr,16}, {d17,0}}}, \
+ /* opc12 r disps33 */ \
+ {NAME, 3, OPC2, 20, INS_TYPE | RELAXABLE, {{regr,16}, {d33,0}}}
+
+ BR_INST ("bal", 0x307, 0x317, 0),
+
+ /* Decrement and Branch instructions */
+ BR_INST ("dbnzb", 0x304, 0x314, DCR_BRANCH_INS),
+ BR_INST ("dbnzw", 0x305, 0x315, DCR_BRANCH_INS),
+ BR_INST ("dbnzd", 0x306, 0x316, DCR_BRANCH_INS),
+
+ /* Jump and link instructions */
+ REG1_INST ("jal", 0xFF8),
+ REG2_INST ("jal", 0x37),
+ REG2_INST ("jalid", 0x33),
+
+ /* opc12 c4 opc12 r mask16 */
+ {"loadmcr", 3, 0x3110300, 4, COP_REG_INS | REG_LIST | FMT_5, {{i4,16}, {regr,0}, {i16,0}}},
+ {"stormcr", 3, 0x3110301, 4, COP_REG_INS | REG_LIST | FMT_5, {{i4,16}, {regr,0}, {i16,0}}},
+
+ /* esc16 r procreg */
+ {"mtpr", 2, 0x3009, 16, 0, {{regr8,8}, {regr8,0}}},
+ /* esc16 procreg r */
+ {"mfpr", 2, 0x300A, 16, 0, {{regr8,8}, {regr8,0}}},
+ /* opc12 c4 opc8 r copreg */
+ {"mtcr", 2, 0x301030, 8, COP_REG_INS | FMT_2, {{i4,16}, {regr,4}, {copregr,0}}},
+ /* opc12 c4 opc8 copreg r */
+ {"mfcr", 2, 0x301031, 8, COP_REG_INS | FMT_2, {{i4,16}, {copregr,4}, {regr,0}}},
+ /* opc12 c4 opc8 r copsreg */
+ {"mtcsr", 2, 0x301032, 8, COP_REG_INS | FMT_2, {{i4,16}, {regr,4}, {copregr,0}}},
+ /* opc12 c4 opc8 copsreg r */
+ {"mfcsr", 2, 0x301033, 8, COP_REG_INS | FMT_2, {{i4,16}, {copregr,4}, {regr,0}}},
+
+ /* CO-processor extensions */
+ /* opc12 c4 opc4 i4 disps9 */
+ {"bcop", 2, 0x30107, 12, COP_BRANCH_INS | FMT_4, {{i4,16}, {i4,8}, {d9,0}}},
+ /* opc12 c4 opc4 i4 disps25 */
+ {"bcop", 3, 0x31107, 12, COP_BRANCH_INS | FMT_4, {{i4,16}, {i4,8}, {d25,0}}},
+
+ /* opc12 i4 */
+ {"excp", 1, 0xFFF, 20, 0, {{i4,16}}},
+ /* opc28 i4 */
+ {"cinv", 2, 0x3010000, 4, 0, {{i4,0}}},
+
+ /* opc9 i5 i5 i5 r r */
+ {"ram", 2, 0x7C, 23, 0, {{i5,18}, {i5,13}, {i5,8}, {regr,4}, {regr,0}}},
+ {"rim", 2, 0x7D, 23, 0, {{i5,18}, {i5,13}, {i5,8}, {regr,4}, {regr,0}}},
+
+ /* opc9 i3 r */
+ {"rotb", 1, 0x1FB, 23, 0, {{i3,20}, {regr,16}}},
+ /* opc8 i4 r */
+ {"rotw", 1, 0xB9, 24, 0, {{i4,20}, {regr,16}}},
+ /* opc23 i5 r */
+ {"rotd", 2, 0x180478, 9, 0, {{i5,4}, {regr,0}}},
+
+ {NULL, 0, 0, 0, 0, {{0, 0}}}
+};
+
+const int crx_num_opcodes = ARRAY_SIZE (crx_instruction);
+
+/* Macro to build a reg_entry, which have an opcode image :
+ For example :
+ REG(u4, 0x84, CRX_U_REGTYPE)
+ is interpreted as :
+ {"u4", u4, 0x84, CRX_U_REGTYPE} */
+#define REG(NAME, N, TYPE) {STRINGX(NAME), {NAME}, N, TYPE}
+
+const reg_entry crx_regtab[] =
+{
+/* Build a general purpose register r<N>. */
+#define REG_R(N) REG(CONCAT2(r,N), N, CRX_R_REGTYPE)
+
+ REG_R(0), REG_R(1), REG_R(2), REG_R(3),
+ REG_R(4), REG_R(5), REG_R(6), REG_R(7),
+ REG_R(8), REG_R(9), REG_R(10), REG_R(11),
+ REG_R(12), REG_R(13), REG_R(14), REG_R(15),
+ REG(ra, 0xe, CRX_R_REGTYPE),
+ REG(sp, 0xf, CRX_R_REGTYPE),
+
+/* Build a user register ur<N>. */
+#define REG_U(N) REG(CONCAT2(u,N), 0x80 + N, CRX_U_REGTYPE)
+
+ REG_U(0), REG_U(1), REG_U(2), REG_U(3),
+ REG_U(4), REG_U(5), REG_U(6), REG_U(7),
+ REG_U(8), REG_U(9), REG_U(10), REG_U(11),
+ REG_U(12), REG_U(13), REG_U(14), REG_U(15),
+ REG(ura, 0x8e, CRX_U_REGTYPE),
+ REG(usp, 0x8f, CRX_U_REGTYPE),
+
+/* Build a configuration register. */
+#define REG_CFG(NAME, N) REG(NAME, N, CRX_CFG_REGTYPE)
+
+ REG_CFG(hi, 0x10),
+ REG_CFG(lo, 0x11),
+ REG_CFG(uhi, 0x90),
+ REG_CFG(ulo, 0x91),
+ REG_CFG(psr, 0x12),
+ REG_CFG(cfg, 0x15),
+ REG_CFG(cpcfg, 0x16),
+ REG_CFG(ccfg, 0x1b),
+
+/* Build a mptr register. */
+#define REG_MPTR(NAME, N) REG(NAME, N, CRX_MTPR_REGTYPE)
+
+ REG_MPTR(intbase, 0x13),
+ REG_MPTR(isp, 0x14),
+ REG_MPTR(cen, 0x17),
+
+/* Build a pc register. */
+#define REG_PC(NAME, N) REG(NAME, N, CRX_PC_REGTYPE)
+
+ REG_PC(pc, 0x0)
+};
+
+const int crx_num_regs = ARRAY_SIZE (crx_regtab);
+
+const reg_entry crx_copregtab[] =
+{
+/* Build a Coprocessor register c<N>. */
+#define REG_C(N) REG(CONCAT2(c,N), N, CRX_C_REGTYPE)
+
+ REG_C(0), REG_C(1), REG_C(2), REG_C(3),
+ REG_C(4), REG_C(5), REG_C(6), REG_C(7),
+ REG_C(8), REG_C(9), REG_C(10), REG_C(11),
+ REG_C(12), REG_C(13), REG_C(14), REG_C(15),
+
+/* Build a Coprocessor Special register c<N>. */
+#define REG_CS(N) REG(CONCAT2(cs,N), N, CRX_CS_REGTYPE)
+
+ REG_CS(0), REG_CS(1), REG_CS(2), REG_CS(3),
+ REG_CS(4), REG_CS(5), REG_CS(6), REG_CS(7),
+ REG_CS(8), REG_CS(9), REG_CS(10), REG_CS(11),
+ REG_CS(12), REG_CS(13), REG_CS(14), REG_CS(15)
+};
+
+const int crx_num_copregs = ARRAY_SIZE (crx_copregtab);
+
+/* CRX operands table. */
+const operand_entry crx_optab[] =
+{
+ /* Index 0 is dummy, so we can count the instruction's operands. */
+ {0, nullargs}, /* dummy */
+ {4, arg_ic}, /* cst4 */
+ {8, arg_c}, /* disps9 */
+ {3, arg_ic}, /* i3 */
+ {4, arg_ic}, /* i4 */
+ {5, arg_ic}, /* i5 */
+ {8, arg_ic}, /* i8 */
+ {12, arg_ic}, /* i12 */
+ {16, arg_ic}, /* i16 */
+ {32, arg_ic}, /* i32 */
+ {4, arg_c}, /* d5 */
+ {8, arg_c}, /* d9 */
+ {16, arg_c}, /* d17 */
+ {24, arg_c}, /* d25 */
+ {32, arg_c}, /* d33 */
+ {16, arg_c}, /* abs16 */
+ {32, arg_c}, /* abs32 */
+ {4, arg_rbase}, /* rbase */
+ {4, arg_cr}, /* rbase_cst4 */
+ {8, arg_cr}, /* rbase_dispu8 */
+ {12, arg_cr}, /* rbase_dispu12 */
+ {16, arg_cr}, /* rbase_dispu16 */
+ {28, arg_cr}, /* rbase_dispu28 */
+ {32, arg_cr}, /* rbase_dispu32 */
+ {6, arg_icr}, /* rbase_ridx_scl2_dispu6 */
+ {22, arg_icr}, /* rbase_ridx_scl2_dispu22 */
+ {4, arg_r}, /* regr */
+ {8, arg_r}, /* regr8 */
+ {4, arg_copr}, /* copregr */
+ {8, arg_copr}, /* copregr8 */
+ {4, arg_copsr} /* copsregr */
+};
+
+/* CRX traps/interrupts. */
+const trap_entry crx_traps[] =
+{
+ {"nmi", 1}, {"svc", 5}, {"dvz", 6}, {"flg", 7},
+ {"bpt", 8}, {"und", 10}, {"prv", 11}, {"iberr", 12}
+};
+
+const int crx_num_traps = ARRAY_SIZE (crx_traps);
+
+/* cst4 operand mapping. */
+const cst4_entry cst4_map[] =
+{
+ {0,0}, {1,1}, {2,2}, {3,3}, {4,4}, {5,-4}, {6,-1},
+ {7,7}, {8,8}, {9,16}, {10,32}, {11,20}, {12,12}, {13,48}
+};
+
+const int cst4_maps = ARRAY_SIZE (cst4_map);
#define ARCH_arm
#define ARCH_avr
#define ARCH_cris
+#define ARCH_crx
#define ARCH_d10v
#define ARCH_d30v
#define ARCH_dlx
disassemble = cris_get_disassembler (abfd);
break;
#endif
+#ifdef ARCH_crx
+ case bfd_arch_crx:
+ disassemble = print_insn_crx;
+ break;
+#endif
#ifdef ARCH_d10v
case bfd_arch_d10v:
disassemble = print_insn_d10v;
projects / deliverable / binutils-gdb.git / commitdiff
