Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are inval...

gas/ChangeLog
	* gas/config/tc-i386.c: Not handle lret/iret.
	* gas/testsuite/gas/i386/lfence-ret-a.d: Adjust testcase.
	* gas/testsuite/gas/i386/lfence-ret-b.d: Ditto.
	* gas/testsuite/gas/i386/lfence-ret-c.d: Ditto.
	* gas/testsuite/gas/i386/lfence-ret-d.d: Ditto.
	* gas/testsuite/gas/i386/lfence-ret.s: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-a.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-b.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-c.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-d.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret-e.d: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret.s: Ditto.
	* gas/testsuite/gas/i386/x86-64-lfence-ret.e: Deleted.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2a987616ecee5dde864bfea08bafc97fecb1cd38..3b8ea166f0c2dd5ad710c01840a25cbf6a9680b0 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,19 @@
+2020-05-18  Hongtao Liu  <hongtao.liu@intel.com>
+
+       * config/tc-i386.c: Not handle lret/iret.
+       * testsuite/gas/i386/lfence-ret-a.d: Adjust testcase.
+       * testsuite/gas/i386/lfence-ret-b.d: Ditto.
+       * testsuite/gas/i386/lfence-ret-c.d: Ditto.
+       * testsuite/gas/i386/lfence-ret-d.d: Ditto.
+       * testsuite/gas/i386/lfence-ret.s: Ditto.
+       * testsuite/gas/i386/x86-64-lfence-ret-a.d: Ditto.
+       * testsuite/gas/i386/x86-64-lfence-ret-b.d: Ditto.
+       * testsuite/gas/i386/x86-64-lfence-ret-c.d: Ditto.
+       * testsuite/gas/i386/x86-64-lfence-ret-d.d: Ditto.
+       * testsuite/gas/i386/x86-64-lfence-ret-e.d: Ditto.
+       * testsuite/gas/i386/x86-64-lfence-ret.s: Ditto.
+       * testsuite/gas/i386/x86-64-lfence-ret.e: Deleted.
+
 2020-05-15  Alan Modra  <amodra@gmail.com>
            Alex Coplan  <alex.coplan@arm.com>
 

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 32fd6c15e1b6e815a1bb9df3837bf27492d876dd..ae1bd0d5bbc0fe3026e5de39949364999f8eef65 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4591,13 +4591,10 @@ insert_lfence_before (void)
       return;
     }
 
-  /* Output or/not/shl and lfence before ret/lret/iret.  */
+  /* Output or/not/shl and lfence before near ret.  */
   if (lfence_before_ret != lfence_before_ret_none
       && (i.tm.base_opcode == 0xc2
-         || i.tm.base_opcode == 0xc3
-         || i.tm.base_opcode == 0xca
-         || i.tm.base_opcode == 0xcb
-         || i.tm.base_opcode == 0xcf))
+         || i.tm.base_opcode == 0xc3))
     {
       if (last_insn.kind != last_insn_other
          && last_insn.seg == now_seg)
@@ -4608,17 +4605,10 @@ insert_lfence_before (void)
          return;
        }
 
-      /* lret or iret.  */
-      bfd_boolean lret = (i.tm.base_opcode | 0x5) == 0xcf;
-      bfd_boolean has_rexw = i.prefix[REX_PREFIX] & REX_W;
-      char prefix = 0x0;
-      /* Default operand size for far return is 32 bits,
-        64 bits for near return.  */
       /* Near ret ingore operand size override under CPU64.  */
-      if ((!lret && flag_code == CODE_64BIT) || has_rexw)
-       prefix = 0x48;
-      else if (i.prefix[DATA_PREFIX])
-       prefix = 0x66;
+      char prefix = flag_code == CODE_64BIT
+                   ? 0x48
+                   : i.prefix[DATA_PREFIX] ? 0x66 : 0x0;
 
       if (lfence_before_ret == lfence_before_ret_not)
        {

diff --git a/gas/testsuite/gas/i386/lfence-ret-a.d b/gas/testsuite/gas/i386/lfence-ret-a.d
index aa358576647d1f5a0c26ce850126914527583931..613d1d50a2c03a5476e55cf6ec37703f0e73538e 100644 (file)
--- a/gas/testsuite/gas/i386/lfence-ret-a.d
+++ b/gas/testsuite/gas/i386/lfence-ret-a.d
@@ -21,16 +21,4 @@ Disassembly of section .text:
  +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%esp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   c2 1e 00                ret    \$0x1e
- +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 cb                   lretw  
- +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
- +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   cb                      lret   
- +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   ca 28 00                lret   \$0x28
 #pass

diff --git a/gas/testsuite/gas/i386/lfence-ret-b.d b/gas/testsuite/gas/i386/lfence-ret-b.d
index 77001c425eff86a7ad435468fc1d20a325cce1ff..e6dd4f4bf6b9414c98b1d4e2d91cc1e8e010a7a4 100644 (file)
--- a/gas/testsuite/gas/i386/lfence-ret-b.d
+++ b/gas/testsuite/gas/i386/lfence-ret-b.d
@@ -25,20 +25,4 @@ Disassembly of section .text:
  +[a-f0-9]+:   f7 14 24                notl   \(%esp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   c2 1e 00                ret    \$0x1e
- +[a-f0-9]+:   66 f7 14 24             notw   \(%esp\)
- +[a-f0-9]+:   66 f7 14 24             notw   \(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 cb                   lretw  
- +[a-f0-9]+:   66 f7 14 24             notw   \(%esp\)
- +[a-f0-9]+:   66 f7 14 24             notw   \(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
- +[a-f0-9]+:   f7 14 24                notl   \(%esp\)
- +[a-f0-9]+:   f7 14 24                notl   \(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   cb                      lret   
- +[a-f0-9]+:   f7 14 24                notl   \(%esp\)
- +[a-f0-9]+:   f7 14 24                notl   \(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   ca 28 00                lret   \$0x28
 #pass

diff --git a/gas/testsuite/gas/i386/lfence-ret-c.d b/gas/testsuite/gas/i386/lfence-ret-c.d
index fceb0eb182a36d7580cec303e9910d3e03ab72ec..02f57fee70261a3d2411d31dae13ae36da58e9a3 100644 (file)
--- a/gas/testsuite/gas/i386/lfence-ret-c.d
+++ b/gas/testsuite/gas/i386/lfence-ret-c.d
@@ -1,7 +1,7 @@
 #source: lfence-ret.s
 #as: -mlfence-before-ret=or -mlfence-before-indirect-branch=all
 #objdump: -dw
-
+#name -mlfence-before-ret=or -mlfence-before-indirect-branch=all
 .*: +file format .*
 
 
@@ -20,16 +20,4 @@ Disassembly of section .text:
  +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%esp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   c2 1e 00                ret    \$0x1e
- +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 cb                   lretw  
- +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
- +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   cb                      lret   
- +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   ca 28 00                lret   \$0x28
 #pass

diff --git a/gas/testsuite/gas/i386/lfence-ret-d.d b/gas/testsuite/gas/i386/lfence-ret-d.d
index 03f8f88fd7bdfbfa807c8df83250a916f4dab06c..9078216e53e6047d3b6788ba9790666b5a097ef5 100644 (file)
--- a/gas/testsuite/gas/i386/lfence-ret-d.d
+++ b/gas/testsuite/gas/i386/lfence-ret-d.d
@@ -21,16 +21,4 @@ Disassembly of section .text:
  +[a-f0-9]+:   c1 24 24 00             shll   \$0x0,\(%esp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   c2 1e 00                ret    \$0x1e
- +[a-f0-9]+:   66 c1 24 24 00          shlw   \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 cb                   lretw  
- +[a-f0-9]+:   66 c1 24 24 00          shlw   \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
- +[a-f0-9]+:   c1 24 24 00             shll   \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   cb                      lret   
- +[a-f0-9]+:   c1 24 24 00             shll   \$0x0,\(%esp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   ca 28 00                lret   \$0x28
 #pass

diff --git a/gas/testsuite/gas/i386/lfence-ret.s b/gas/testsuite/gas/i386/lfence-ret.s
index f27fa5839e5db685f008092a4ab01193958698a4..5de4f08447e758727f250d3a02ee39c13f0f975f 100644 (file)
--- a/gas/testsuite/gas/i386/lfence-ret.s
+++ b/gas/testsuite/gas/i386/lfence-ret.s
@@ -4,7 +4,3 @@ _start:
        retw    $20
        ret
        ret     $30
-       lretw
-       lretw   $40
-       lret
-       lret    $40     

diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
index 345217b17c725358b2f98265a22551c3db52a4ba..96881677b63758315b65e3fcd3699e3f7b8fdfbc 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=or
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=or
 
@@ -28,22 +27,4 @@ Disassembly of section .text:
  +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   66 48 c2 28 00          data16 rex.W retq \$0x28
- +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 cb                   lretw  
- +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
- +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   cb                      lret   
- +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   ca 28 00                lret   \$0x28
- +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 cb                   lretq  
- +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 ca 28 00             lretq  \$0x28
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
index 3947660fea8aed4a9f3704af8e3dc92f7e3e59e7..4afad79bc64970941162b6f3c530f8d7014217d0 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=not
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=not
 
@@ -34,28 +33,4 @@ Disassembly of section .text:
  +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   66 48 c2 28 00          data16 rex.W retq \$0x28
- +[a-f0-9]+:   66 f7 14 24             notw   \(%rsp\)
- +[a-f0-9]+:   66 f7 14 24             notw   \(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 cb                   lretw  
- +[a-f0-9]+:   66 f7 14 24             notw   \(%rsp\)
- +[a-f0-9]+:   66 f7 14 24             notw   \(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
- +[a-f0-9]+:   f7 14 24                notl   \(%rsp\)
- +[a-f0-9]+:   f7 14 24                notl   \(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   cb                      lret   
- +[a-f0-9]+:   f7 14 24                notl   \(%rsp\)
- +[a-f0-9]+:   f7 14 24                notl   \(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   ca 28 00                lret   \$0x28
- +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
- +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 cb                   lretq  
- +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
- +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 ca 28 00             lretq  \$0x28
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d
index cd89a95bc439c5f1c1618a0fd40f1ba00ad37f4d..55b0ecb2f022d752a93c64e75ca0d236208ff076 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=or -mlfence-before-indirect-branch=all
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 
 .*: +file format .*
@@ -27,22 +26,4 @@ Disassembly of section .text:
  +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   66 48 c2 28 00          data16 rex.W retq \$0x28
- +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 cb                   lretw  
- +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
- +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   cb                      lret   
- +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   ca 28 00                lret   \$0x28
- +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 cb                   lretq  
- +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 ca 28 00             lretq  \$0x28
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
index 593b88943596a517f55c7842aa66b60fc3575ba5..efe928aceeda7aa7f0444db89984795e6a59b50c 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=shl
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=shl
 
@@ -28,22 +27,4 @@ Disassembly of section .text:
  +[a-f0-9]+:   48 c1 24 24 00          shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   66 48 c2 28 00          data16 rex.W retq \$0x28
- +[a-f0-9]+:   66 c1 24 24 00          shlw   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 cb                   lretw  
- +[a-f0-9]+:   66 c1 24 24 00          shlw   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
- +[a-f0-9]+:   c1 24 24 00             shll   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   cb                      lret   
- +[a-f0-9]+:   c1 24 24 00             shll   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   ca 28 00                lret   \$0x28
- +[a-f0-9]+:   48 c1 24 24 00          shlq   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 cb                   lretq  
- +[a-f0-9]+:   48 c1 24 24 00          shlq   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 ca 28 00             lretq  \$0x28
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d
index b4d229654cda45e10e98690e69feeb035b75ff8f..31286662de6f54fbc1493e7e8a79636c3f66697c 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d
@@ -1,6 +1,5 @@
 #source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=shl
-#warning_output: x86-64-lfence-ret.e
 #objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=yes
 
@@ -28,22 +27,4 @@ Disassembly of section .text:
  +[a-f0-9]+:   48 c1 24 24 00          shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   66 48 c2 28 00          data16 rex.W retq \$0x28
- +[a-f0-9]+:   66 c1 24 24 00          shlw   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 cb                   lretw  
- +[a-f0-9]+:   66 c1 24 24 00          shlw   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
- +[a-f0-9]+:   c1 24 24 00             shll   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   cb                      lret   
- +[a-f0-9]+:   c1 24 24 00             shll   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   ca 28 00                lret   \$0x28
- +[a-f0-9]+:   48 c1 24 24 00          shlq   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 cb                   lretq  
- +[a-f0-9]+:   48 c1 24 24 00          shlq   \$0x0,\(%rsp\)
- +[a-f0-9]+:   0f ae e8                lfence 
- +[a-f0-9]+:   48 ca 28 00             lretq  \$0x28
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret.e b/gas/testsuite/gas/i386/x86-64-lfence-ret.e
deleted file mode 100644 (file)
index 13730e5..0000000
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret.e
+++ /dev/null
@@ -1,3 +0,0 @@
-.*: Assembler messages:
-.*:??: Warning: no instruction mnemonic suffix given and no register operands; using default for `lret'
-.*:??: Warning: no instruction mnemonic suffix given and no register operands; using default for `lret'

diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret.s b/gas/testsuite/gas/i386/x86-64-lfence-ret.s
index 986239c222e914f27296d2db1924b61ebeeb783b..dd0961a49c9d8bb3629b1ccea047440bb4cf1e04 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret.s
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret.s
@@ -6,9 +6,3 @@ _start:
        ret     $30
        data16 rex.w ret
        data16 rex.w ret        $40
-       lretw
-       lretw   $40
-       lret
-       lret    $40
-       lretq
-       lretq   $40